[reland][libc][NFC] Implement `FPBits` in terms of `FloatProperties` to reduce clutter (#75196) (#75318)

Also make type naming consistent by using `UIntType` instead of
`intU_t`.
This patch is a reland of #75196 but does not include the "use `FPBits`
instead of `FPBits_t`, `FPB`" part. This needs more work.

Note that all the patches that implement support for declare-style
DPValues have tests that are "rotten green" test without this
patch (i.e., they pass at the moment without testing what we
want them to test). See the Pull Request for more detail on this.

Pass MemoryLocation as one argument, instead of passing all its
parts separately.

... for a potential constant expression. They are not defined now, but
might be defined later when the function is actually called.

This is a fix for 96ab8ef9

This bit was added to the AArch64 ABI by
https://github.com/ARM-software/abi-aa/pull/231.

.00cfg section is used by crt for load config and is merged by MS
link.exe into .rdata.

Fixes #75002. Found while running libc++'s tests with MSVC's STL.

This is a superset of #74961 that also fixes the product code
and adds a regression test. Thanks again, @cpplearner!

To summarize: `views::split` and `views::lazy_split` aren't unary,
aren't range adaptor **closure** objects, and can't be piped. However,
\[range.adaptor.object\]/8 says that `views::split(pattern)` and
`views::lazy_split(pattern)` produce unary, pipeable, range adaptor
closure objects.

This PR adjusts the test coverage accordingly, allowing it to portably
pass for libc++ and MSVC's STL.

[mlir][ArmSME][test] Use `only-if-required-by-ops` rather than `enable_arm_streaming_ignore` (NFC) (#75209)

This moves the fix out of the IR and into the pass description, which
seems nicer. It also works as an integration test for the
`only-if-required-by-ops` flag :)

Inject missing dependency between generated files that could cause build
issues.

Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>

This adds a link from the main docs page back to the README where
I have previously added a list of useful resources.

To that list, I've added a link to my recent llvm blog post.

This commit ensures that we model DI information for global constants
correctly. These constructs can lack scopes, names, and linkage names,
so these parameters were made optional for the DIGlobalVariable
attribute.

The disallowlist was used as a migration strategy while support was
extended to more side effecting operations. We now (to the best of our
knowledge) support all side effecting operations, so never fail
`isLegalToInline` on any LLVM operation.

There is no test included, because that's exactly the reason for this
change: there are no more unsupported operations in inlining; the
existing tests for unsupported inlines have already been burninated.

fix #72114
proof: https://alive2.llvm.org/ce/z/xqprFm

When doing sink-and-fold, the MachineSink clears the "killed" flags of
the operands of the sunk (and deleted) instruction. However, this is not
always sufficient. In some cases we can create the new load/store
instruction with operands other than the ones present in the deleted
instruction. One such example is folding a zero word extend into a
memory load on AArch64. The zero-extend is represented by a pair of
instructions - `MOV` (i.e. `ORRwrs`) followed by a `SUBREG_TO_REG`. The
`SUBREG_TO_REG` is deleted (it is the sunk instruction), but the new
load instruction mentions operands "killed" in the `MOV`, which is no
longer correct.

To fix this, clear the "killed" flags of the registers participating in
the addressing mode.

Fix unexpected pass after
https://github.com/llvm/llvm-project/pull/74786.

This patch is needed for the reduction instructions in sve2.1
 It add a new header to sve with all the fixed vector types.
  The new types are only added if neon is not declared.

This recovers more of the max-rss regression introduced by
https://reviews.llvm.org/D157657.

This is an about 1.2% max-rss improvement for the LTO link stage with
debuginfo on CTMark.

Reverts llvm/llvm-project#75196

GCC complains about change of meaning for `FPBits`
```
/home/llvm-libc-buildbot/buildbot-worker/libc-x86_64-debian-fullbuild/libc-x86_64-debian-gcc-fullbuild-dbg/llvm-project/libc/src/__support/FPUtil/generic/FMod.h:188:9: error: declaration of ‘using FPBits = struct __llvm_libc_18_0_0_git::fputil::FPBits<T>’ changes meaning of ‘FPBits’ [-fpermissive]
  188 |   using FPBits = FPBits<T>;
      |         ^~~~~~
```

I'll reland with a different name.

Implement Gram-Schmidt orthogonalisation for the FracMatrix class.
This requires dotProduct, which has been added as a util.

Also make type naming consistent:
 - `UIntType` instead of `intU_t`
 - `FPBits` instead of `FPBits_t`, `FPB`

If the rematerialize was placing a subregister into a super register,
and implicit operands referenced the original register, we need to add
undef flags to the now-subregister indexed implicit operands.

Depends #75152

This patch fixes cmake configuration when building with
LLVM_LIBC_INCLUDE_SCUDO. In libc, LIBC_TARGET_ARCHITECTURE is renamed
from `riscv64` to `riscv`. However, `compiler-rt`, hence `scudo`,
distinguishes `riscv32` and `riscv64` in the support list. As a result,
we need to translate the architecture name accordingly.

Most users of AddImm and CheckConstantInt only use 1 byte immediates, so
I added an opcode variants for those. That way all those instructions
save 7 bytes.
Also added an opcode for AddTempRegister for the cases where there are
no register flags.

Space savings:
    - AMDGPUGenGlobalISel: 470180 bytes to 422564 (-10%)
    - AArch64GenGlobalISel.inc: 383893 bytes to 374046

If the copy being hoisted was undef, we have the same problems that
eliminateUndefCopy needs to solve. We would effectively be introducing a
new live out implicit_def. We need to add an undef flag to avoid
artificially introducing a live through undef value. Previously, the
verifier would fail due to the dead def inside the loop providing the
live in value for the %1 use.