When the result is not a vectorType, there is an assert. This patch will
do the check and bail when the result is not a VectorType.

This patch tries to fold `G_CTTZ` if possible.

This builds on the previously added absolute difference cases, and adds
the reduction at the end.  This is mostly interesting for examining
impact of extend placement when changing the abdu lowering.

Test copied from aarch64 with minimal adaption.  We likely need addition
coverage, but this is a reasonable starting point.

Summary:
This patch factors common functions out of the `Plugin` interface prior
to its removal in a future patch. This simply temporarily renames it to
`PluginTy` so that we could re-use `Plugin::check` internally as this
needs to be defined statically per plugin now. We can refactor this
later.

The future patch will delete `PluginTy` and `PluginTy::get` entirely.
This simply tries to minimize a few changes to make it easier to land.

[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified register file case (#85860)

`ST.getMaxNumVGPRs(MF)` lowers to `AMDGPUBaseInfo.cpp:getTotalNumVGPRs`
which returns 512 for gfx90a. This is subsequently limited by
`AMDGPUBaseInfo:getAddressableNumVGPRs()`, which also returns 512 for
gfx90a. The ISA states we can have a total of 512 registers, but a
maximum of only 256 of each of AGPR and VGPR (gfx90a 3.6.4).

Therefore, in unified register file case, `ST.getMaxNumVGPRs(MF)`
calculates the maximum number of combined VGPR + AGPR. But, it is
currently used as the limit for accvgpr and as the limit for archvgpr.

This patch uses it as the combined limit, and accounts for the maximum addressable arch/acc VGPRs when calculating the per RegClass limits.

It is not unreasonable to think other clients of getTotalNumVGPRs are
using it in the wrong way.

This reverts commit b7d8c618. And
This reverts commit 2d40f179.

It caused a build failure i'll need to reproduce.
` error: could not convert ‘Rule’ from ‘llvm::Regex’ to ‘llvm::Expected<llvm::Regex>’`

Ternary operations cannot have a merge op in addition to their 3 sources
so there is no need for this option.

This target doesn't build on macOS (even with the upstream make based
build system) so this encodes that in the build without requiring
non-linux users to disable it manually with the starlark flag. The flag
is still respected for linux users.

This allows downstream consumers to depend on this file. Without this
target the include paths to this are mangled by bazel.

I didn't fix all the 80 column errors just the ones in template
arguments.

InstallAPI takes a json list of headers that is typically generated from
a build system like Xcode based on a project's attributes. Sometimes,
maintainers may want to alter this for tapi input. Using e.g.
`--extra-public-headers`, users can manipulate what headers will be used
for TBD file generation.

Fixes https://github.com/llvm/llvm-project/issues/85496

.

---------

Co-authored-by: Job Hernandez <h93@protonmail.com>

In CUDA Fortran data transfer can be done via assignment statements
between host and device variables.

This patch introduces a `fir.cuda_data_transfer` operation that
materialized the data transfer between two memory references.

Simple transfer not involving descriptors from host to device are also
lowered in this patch. When the rhs is an expression that required an
evaluation, a temporary is created. The evaluation is done on the host
and then the transfer is initiated.

Implicit transfer when device symbol are present on the rhs is not part
of this patch. Transfer from device to host is not part of this patch.

This reverts commit c00a5ab8. It is not
consistent with SelectionDAG.

This reverts commit a2476c99. It is not
consistent with SelectionDAG

This reverts commit 47681506. It is not
consistent with SelectionDAG.

We'll need to address this differently long term, but for now just
revert to the old behaviour to keep this test from failing.

Fixes #85884

Add missing tests for AUTH relocs defined in #74874

Noticed while trying to compare splat vs per-element shift perf stats for #39424

Confirmed with uops.info

I was unable to definitively locate a document number for this, but it
is potentially WG14 N759 based on the description in the C99 rationale
document.

We do implement the C89 and C99 scope rules for iteration and selection
statements, so claiming conformance here.

[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)

Integer RISCVISD::SELECT_CC doesn't create poison. If none of the,
operands are poison, the result is not poison.

This allows ISD::FREEZE to be hoisted above RISCVISD::SELECT_CC.

The documentation mentions manually pushing Docker images to the CI. The
preferred way is to use the proper GitHub action. This updates the
documentation.

---------

Co-authored-by: Will Hawkins <whh8b@obs.cr>

Amends d99cfa05

This should address a failure found by post commit CI:
https://lab.llvm.org/buildbot/#/builders/245/builds/22321

https://github.com/llvm/llvm-project/pull/84553 added
typeIsLegalBoolVec but it was missing a check for minimum element count.
This patch adds that.

This feature is listed in the C99 front matter as one of the changes to
C99, but there was no associated document with that title (or anything
close to it).

I eventually tracked this down to a new requirement in C99 that
implementations defining their own pedefined macros should not name
them with a __STDC_ prefix. Clang does not do this, but there's no
tests that would demonstrate we properly "implement" this feature. So
claiming full conformance without additional test coverage.

I had missed that both tblgens still both need a bunch of identical
cpp files. Let's just reintroduce the source_set() for them, even
though the CMake build removed the object library for them in favor
of duplicating the file list for some reason.

G_VSCALE should be lowered using VLENB.

fixes #86449

SelectionDAG has SELECT and VSELECT

SELECT restricts the condition operand to an i1 and the true and false operands
can be vectors. The result of a SELECT has the same type as the true and
false operands.

VSELECT has a vector condition operand and the true and false operands
must be vectors. The result of a VSELECT has a vector result.

GlobalISel has G_SELECT which has condition operand that is an i1 if the
true and false operands are scalar and a vector type with i1 elements if
the true and false operands are vector.

A G_SELECT acts like a ISD::SELECT when the operands are all scalar, and
an ISD::VSELECT when the operands are are scalar. A G_SELECT cannot act
like a ISD::SELECT with an i1 condition and vector operands because the
type system.

In this patch, we would like to take advantage of the patterns written
for SELECT and VSELECT, so we mark G_SELECT equivalent to both SELECT
and VSELECT to reuse the patterns. Since we cannot write a `G_SELECT (s1),
(vector-ty), (vector-ty)`, we don't have to worry about accidently
matching the SDAG patterns of that nature.

We will probably need a way to represent an i1 condition with vector
true and false operands in the future. That can be the topic of another
patch.