- Aug 04, 2023
-
-
Jack Koenig authored
This option will dump the .fir before invoking firtool. Additional changes: * Use os.lib for invoking firtool * Use lazy serialization to avoid holding the entire FIRRTL in memory. * Mix NoStackTrace into FirtoolNotFound * Fix detection of no firtool (cherry picked from commit 4db86b2f) # Conflicts: # src/main/scala/circt/stage/CIRCTOptions.scala # src/main/scala/circt/stage/ChiselStage.scala # src/main/scala/circt/stage/phases/CIRCT.scala
-
- Jul 18, 2023
-
-
mergify[bot] authored
* Sanitize Record._elements (#3419) This moves name sanitation a little earlier and ensures that the sanitized names are use more consistently throughout Chisel internals. This fixes a bug in D/I where unsanitary names would lead to a crash. (cherry picked from commit 5c282db5 ) * Keep Scala 2.12 support by not using VectorMap * Fix firrtl in tests for older firrtl spec version --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jul 07, 2023
-
-
mergify[bot] authored
* SRAM API: Add multiple-clocked port API (#3383) This PR adds new APIs for the SRAM module to instantiate a number of ports connected to individual clocks. This allows the creation of memories driven by multiple clocks, for use cases like clock domain crossover. (cherry picked from commit d79ae71e ) --------- Co-authored-by:
Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com> Co-authored-by:
Jared Barocsi <jared.barocsi@sifive.com>
-
- Jun 30, 2023
-
-
mergify[bot] authored
* Deprecate calling .viewAs on non-hardware (#3395) It's an error in most cases already, and in the cases it isn't, make it a warning. Also fix a crash that could occur when viewing a non-Data containing non-hardware Data. (cherry picked from commit 1e524de9 ) # Conflicts: # src/test/scala/chiselTests/experimental/DataView.scala * Resolve backport conflicts --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
This is not a functional bug. The recursive form of reify for Element would use the .topBinding from the wrong argument, so it would recurse an extra time, but it would ultimately converge to the right value. (cherry picked from commit 374b45b9 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jun 28, 2023
-
-
mergify[bot] authored
* Support literals and DontCare in DataView targets (#3389) (cherry picked from commit 0f803cd8 ) # Conflicts: # src/test/scala/chiselTests/experimental/DataView.scala * Resolve backport conflicts --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
* log2 functions * unsignedBitLength (cherry picked from commit 88fecfc1 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jun 23, 2023
-
-
mergify[bot] authored
(cherry picked from commit 2e95804f ) Co-authored-by:
Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
-
- Jun 22, 2023
-
-
Jiuyang Liu authored
-
- Jun 15, 2023
-
-
mergify[bot] authored
Implement a SyncReadMem wrapper with explicit read, write, and read/write ports (backport #3228) (#3361) * Implement a SyncReadMem wrapper with explicit read, write, and readwrite ports (#3228) Co-authored-by:
Jiuyang Liu <liu@jiuyang.me> Co-authored-by:
Jack Koenig <koenig@sifive.com> (cherry picked from commit 8851faed ) * Delete typeName def --------- Co-authored-by:
Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com> Co-authored-by:
Jared Barocsi <jared.barocsi@sifive.com>
-
- Jun 09, 2023
-
-
mergify[bot] authored
(cherry picked from commit b83f3695 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jun 08, 2023
-
-
mergify[bot] authored
(cherry picked from commit 308eb6a4 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jun 07, 2023
-
-
mergify[bot] authored
This enables Chisel users to use these newer Scala versions. (cherry picked from commit b22c3ba2 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Jun 02, 2023
-
-
mergify[bot] authored
(cherry picked from commit e20a0380 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
Don't emit implicit clock warnings for `SyncReadMem.readWrite` when explicit clocks are used (backport #3313) (#3315) * Don't emit implicit clock warnings when an explicit clock is used (#3313) (cherry picked from commit 9e392013 ) # Conflicts: # core/src/main/scala/chisel3/Mem.scala * Resolve backport conflicts --------- Co-authored-by:
Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com> Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- May 19, 2023
-
-
mergify[bot] authored
* Optimize BitPat equals, overlap, and cover (#3285) (cherry picked from commit f590ac9f ) * Fix binary compatibility issue --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- May 10, 2023
-
-
mergify[bot] authored
This does not seem to be required by Scala, but it is required by newer versions of SemanticDB (and thus to use Scala Metals). (cherry picked from commit 08369ef8 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- May 06, 2023
-
-
mergify[bot] authored
(cherry picked from commit b542b6ab ) Co-authored-by:
Sihao Liu <sihao@cs.ucla.edu> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
mergify[bot] authored
Change what DataView allows in its type checking to enable Reset to be viewed as either a UInt<1> or an AsyncReset. This enables more flexible DataViews which match already allowable Chisel and FIRRTL connection semantics. Signed-off-by:
Schuyler Eldridge <schuyler.eldridge@sifive.com> (cherry picked from commit 44ce96cf ) Co-authored-by:
Schuyler Eldridge <schuyler.eldridge@sifive.com>
-
mergify[bot] authored
* Add new workflow to fixup backports for release notes (#3252) The Mergify-generated backports do not currently include the information needed by the release notes generation automation. This new workflow will copy such information over to backport PRs. (cherry picked from commit 86ccd1b2) * Fix backport-fixup for labels with spaces (#3255) (cherry picked from commit 8f7e7e68 ) --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
(cherry picked from commit 7b57e591 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
(cherry picked from commit bc4d8f9a ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Apr 27, 2023
-
-
mergify[bot] authored
* Implement read-write memory accessors for SyncReadMem (#3190) Adds new APIs to generate explicit read-write (rdwr) ports for a SyncReadMem, and all masked or clocked variants. --------- Co-authored-by:
Megan Wachs <megan@sifive.com> (cherry picked from commit 1e6f2b4e ) * Add CompileOptions to SyncReadMem.readWrite methods --------- Co-authored-by:
Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com> Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
mergify[bot] authored
* Change many tests from simulation-based to checking the CHIRRTL. * Move tests that were hard to convert to new VecIntegrationSpec in integration-tests (cherry picked from commit 6b81f44c ) Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
- Apr 26, 2023
-
-
mergify[bot] authored
(cherry picked from commit 8ca8b2e1 ) Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
mergify[bot] authored
* Read previousVersions for bincompat checking from a file (#3202) This makes it much easier to automate checking new versions as they are released. --------- Co-authored-by:
Schuyler Eldridge <schuyler.eldridge@sifive.com> (cherry picked from commit 2c6028b0 ) # Conflicts: # build.sbt * Enable binary compatibility checking against 3.6.0 --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Apr 18, 2023
-
-
mergify[bot] authored
This adds a new Chisel template for using Chisel with Scala CLI, and adds some automation for uploading versions of this template on tagged releases (or workflow dispatch). (cherry picked from commit 20246185 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Apr 13, 2023
-
-
mergify[bot] authored
(cherry picked from commit 4b891ecf ) Co-authored-by:
Adam Izraelevitz <adam.izraelevitz@sifive.com>
-
mergify[bot] authored
* Report firtool version when firtool invocation errors (#3174) * the firtool version is now included in the BuildInfo * firtool now must be on the path when publishing, but is not required for building or testing * FirtoolNonZeroExitCode now no longer includes a stack trace (cherry picked from commit 06b569da ) # Conflicts: # build.sbt * Resolve backport conflicts * [CI] Install firtool in the publish step (#3176) --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Apr 07, 2023
-
-
mergify[bot] authored
* Fix naming for RHS of named unapply expressions (#3163) Previously, the naming plugin would not recurse for the RHS of an unapply, meaning that vals declared in blocks that ultimately return some result that is unapplied into some named Data would not be named. Also, audit and improve the naming mdocs. (cherry picked from commit 262caa73 ) # Conflicts: # docs/src/cookbooks/naming.md * Resolve backport conflicts --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Apr 04, 2023
-
-
mergify[bot] authored
(cherry picked from commit a6525268 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
Co-authored-by:
Jack Koenig <koenig@sifive.com> (cherry picked from commit f3d0f22d ) Co-authored-by:
Aditya Naik <91489422+adkian-sifive@users.noreply.github.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
mergify[bot] authored
* Detect bound hardware when processing record elements (#3037) Use new private Record._elements to validate Record elements. This allows us to check invariants earlier than on cloning or binding. (cherry picked from commit a8515661 ) # Conflicts: # core/src/main/scala/chisel3/internal/BiConnect.scala # core/src/main/scala/chisel3/internal/MonoConnect.scala * Fix backport conflicts --------- Co-authored-by:
Aditya Naik <91489422+adkian-sifive@users.noreply.github.com> Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Mar 24, 2023
-
-
mergify[bot] authored
(cherry picked from commit 29562386 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Mar 22, 2023
-
-
mergify[bot] authored
(cherry picked from commit 068eb8f7 ) Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
mergify[bot] authored
* Add SBT aliases for formatting including SBT files (#3125) Also run formatting on SBT files. (cherry picked from commit 3da4113e ) # Conflicts: # build.sbt # project/plugins.sbt * Resolve backport conflicts --------- Co-authored-by:
Jack Koenig <koenig@sifive.com>
-
- Mar 21, 2023
-
-
mergify[bot] authored
(cherry picked from commit ac10d5b8 ) Co-authored-by:
Sean Jensen-Grey <128454+seanjensengrey@users.noreply.github.com>
-
- Mar 19, 2023
-
-
mergify[bot] authored
Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> (cherry picked from commit baed66d4 ) Co-authored-by:
jensengrey <46599294+jensengrey@users.noreply.github.com>
-
mergify[bot] authored
It seems that deprecations on methods that are macro expanded away do not actually trigger a deprecation warning. Instead, we will just accept no source locator on the deprecated API (no released version of Chisel has the source locator). (cherry picked from commit 847343a3 ) Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-
mergify[bot] authored
* Deprecate ImplicitInvalidate * Suppress warnings from ImplicitInvalidate --------- Co-authored-by:
Adam Izraelevitz <adam.izraelevitz@sifive.com> Co-authored-by:
Jack Koenig <koenig@sifive.com> Co-authored-by:
mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
-