1. Jun 23, 2022
  2. Jun 22, 2022
  3. Jun 18, 2022
  4. Jun 17, 2022
    • mergify[bot]'s avatar
      [docs] Document partial register reset (#2582) (#2583) · 01100fa9
      mergify[bot] authored
      (cherry picked from commit d54a37a5
      
      )
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      01100fa9
    • mergify[bot]'s avatar
      Define leading '_' as API for creating temporaries (backport #2580) (#2581) · d001b34f
      mergify[bot] authored
      * Define leading '_' as API for creating temporaries
      
      Chisel and FIRRTL have long used signals with names beginning with an
      underscore as an API to specify that the name does not really matter.
      Tools like Verilator follow a similar convention and exclude signals
      with underscore names from waveform dumps by default. With the
      introduction of compiler-plugin prefixing in Chisel 3.4, the convention
      remained but was hard for users to use unless the unnnamed signal
      existed outside of any prefix domain. Notably, unnamed signals are most
      useful when creating wires inside of utility methods which almost always
      results in the signal ending up with a prefix.
      
      With this commit, Chisel explicitly recognizes signals whos val names
      start with an underscore and preserve that underscore regardless of any
      prefixing. Chisel will also ignore such underscores when generating
      prefixes based on the temporary signal, preventing accidental double
      underscores in the names of signals that are prefixed by the temporary.
      
      (cherry picked from commit bd943662)
      
      * Remove unused defaultPrefix argument from _computeName
      
      (cherry picked from commit ec178aa2
      
      )
      
      # Conflicts:
      #	core/src/main/scala/chisel3/Module.scala
      #	core/src/main/scala/chisel3/experimental/hierarchy/ModuleClone.scala
      
      * Resolve backport conflicts
      
      * Waive false positive binary compatibility errors
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      d001b34f
  5. Jun 14, 2022
  6. Jun 11, 2022
  7. Jun 09, 2022
  8. Jun 08, 2022
  9. Jun 07, 2022
    • mergify[bot]'s avatar
      Add --warn:reflective-naming (backport #2561) (#2565) · 42f5d890
      mergify[bot] authored
      * Factor buildName into reusable function
      
      The new function is chisel3.internal.buildName.
      
      (cherry picked from commit 370ca8ac)
      
      * Add --warn:reflective-naming
      
      This new argument (and associated annotation) will turn on a warning
      whenever reflective naming changes the name of a signal. This is
      provided to help migrate from Chisel 3.5 to 3.6 since reflective naming
      is removed in Chisel 3.6.
      
      (cherry picked from commit 97afd9b9
      
      )
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      42f5d890
  10. Jun 04, 2022
  11. Jun 03, 2022
  12. Jun 02, 2022
    • mergify[bot]'s avatar
      Add formatted Printable interpolator `cf` (#2528) (#2553) · 97fde23f
      mergify[bot] authored
      This is a formatted version of the p"..." interpolator analogous to
      Scala's f"..." interpolator. The primary difference is that it supports
      formatting interpolated variables by following the variable with
      "%<specifier>". For example:
      
      printf(cf"myWire = $myWire%x\n")
      
      This will format the hardware value "myWire" as a hexidecimal value in
      the emitted Verilog. Note that literal "%" must be escaped as "%%".
      
      Scala types and format specifiers are supported and are handled in the
      same manner as in standard Scala f"..." interpolators.
      
      (cherry picked from commit 037f7b2f
      
      )
      
      Co-authored-by: default avatarGirish Pai <girish.pai@sifive.com>
      97fde23f
  13. May 30, 2022
  14. May 28, 2022
  15. May 25, 2022
  16. May 20, 2022
  17. May 14, 2022
  18. May 13, 2022
  19. Apr 26, 2022
  20. Apr 21, 2022
  21. Apr 19, 2022
  22. Apr 18, 2022
  23. Apr 16, 2022
  24. Apr 12, 2022
  25. Apr 06, 2022
  26. Apr 05, 2022
  27. Apr 02, 2022
  28. Mar 31, 2022