(cherry picked from commit a54d37d2

)

Co-authored-by: Kalamár Ödön <kalamarodon@gmail.com>

(cherry picked from commit 9c9bc131

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Add CCC2021 info

* Update README.md

* Update README.md

(cherry picked from commit 7b8fbbe8

)

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>

* Update the FAQ and add doc on versioning
* Update modules.md

Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit 03ec2156

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Updates to chisel3 documentation for website:
* guard code examples with mdoc and fix errors encountered along the way
* move some website content here vs splitting the content across two repos
* Bring in the interval-types and loading memories content so that it will be visible from the website
* remove all references to the wiki (deprecated)
* Remove reference to Wiki from the README
* fix tabbing and compile of chisel3-vs-chisel2 section
* Appendix: faqs now guarded and compile
* FAQs: move to resources section

(cherry picked from commit f1ad5b58

)

Co-authored-by: Megan Wachs <megan@sifive.com>

Change top.cpp to deassert reset one time unit before the clock asserts.
This avoids a Verilator simultation issue in top.cpp where the eval()
function is only called once per simultation loop.  If the clock and
reset are both changed and eval() is only called once, then any
combinational update due to a change in reset is not visible to the
sequential logic.  This avoids issues where the downstream compilation
utilities move synchronous reset logic outside of an always block that
describes a synchronous reset flip flop.

Reset now deasserts on time unit 10 and the clock ticks on time unit
11.

h/t @albert-magyar

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit ac094a5e

)

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

Change a test to use emitChirrtl instead of emitFirrtl. This test
isn't supposed to be running the Scala FIRRTL Compiler, but the latter
method causes this to happen.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit 492a71d6

)

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* [plugin] Split ChiselComponent into its own file

(cherry picked from commit e80e9a3b)

* [plugin] Implement autoclonetype in the compiler plugin

(cherry picked from commit 14942312)

* [plugin] Stop autoclonetype stack traces when using plugin

The compiler plugin obviates the need for using stack traces to
determine outer objects in autoclonetype. When the plugin was used to
compile a given Bundle, it will no longer collect a stack trace upon
construction. This should have massive benefits to elaboration runtime.

(cherry picked from commit a8d32388)

* [plugin] Disable BundleComponent by default, add option to enable

(cherry picked from commit 3bea6167

)

* Fix plugin scalacOptions for 2.11

* allowReflectiveAutoCloneType must work outside of Builder context

Co-authored-by: Jack Koenig <koenig@sifive.com>

This annotation adds memory import with inline generation for the
emmiter.
Supports both readmemh and readmemb statements based on argument.

(cherry picked from commit 9ea57e03

)

Co-authored-by: Carlos Eduardo <carlosedp@gmail.com>

(cherry picked from commit 36e72239

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Adding ChiselEnum Documentation Entry

Added documentation for the ChiselEnum type with verified examples

* Fixed some doc ambiguity and repeated emitVerilog calls

* Added ChiselStage and commented out package definition since packages cannot be declared in single files

* Fixed issue with ChiselStage not being able to generate a module with parameters and bad package imports

* Opps on not adding _ after import

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Modified Bundle for ci and made changes to select naming scheme

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Added missing backticks

* Added space around error block quote

* Fixed md paragraph in code

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>

* Update docs/src/explanations/chisel-enum.md

Co-authored-by: Megan Wachs <megan@sifive.com>

* Fixed some comments and formatting

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>
(cherry picked from commit 73184b73

)

Co-authored-by: chrisbaldwin2 <75344803+chrisbaldwin2@users.noreply.github.com>

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
(cherry picked from commit 43de37fd

)

Co-authored-by: Jerry Zhao <qwertyuiopghb@gmail.com>

Not a Pokémon

(cherry picked from commit c2ba4098

)

Co-authored-by: edwardcwang <edwardcwang@users.noreply.github.com>

* Handle MemTypeBinding in Analog

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Fix stack trace trimming across ChiselStage

Fix bug in stack trace trimming behavior. Now, the following is what
happens:

1. The Builder, if catching accumulated errors, will now throw a
   ChiselException with a Scala-trimmed Stack trace. Previously, this
   would throw the full excpetion.
2. The Elaborate phase handles stack trace trimming. By default, any
   Throwable thrown during elaboration will have its stack
   trace *mutably* trimmed and is rethrown. A logger.error is printed
   stating that there was an error during elaboration and how the user
   can turn on the full stack trace. If the --full-stacktrace option
   is on, then the Throwable is not caught and only the first
   logger.error (saying that elaboration failed) will be printed.
3. ChiselStage (the class), ChiselStage$ (the object), and ChiselMain
   all inherit the behavior of (2).

Mutable stack trace trimming behavior is moved into an implicit
class (previously this was defined on ChiselException only) so this
can be applied to any Throwable.

No StageErrors are now thrown anymore. However, StageErrors may still
be caught by ChiselMain (since it is a StageMain).

Testing is added for ChiselMain, ChiselStage, and ChiselStage$ to test
all this behavior.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Fix stack trace trimming in Driver

Fix bug in stack trace trimming behavior. The Driver will now handle
fake stack trace printing to standard out directly instead of this
happening someplace else and relying on StageError to communicate
"fail immediately" behavior.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

* Add no-plugin-tests for testing Chisel without the compiler plugin

This is a new SBT build unit that symlinks in some files from the normal
chisel project tests, but builds them without the compiler plugin.

(cherry picked from commit 53b62047)

* Make it possible to GC Data instances

No longer create a pointer from parent to every HasId, only do it by
default for BaseModules and MemBases. Add pointer from parent to Data
upon binding the Data.

* Add MemTypeBinding for port types of Mems

This binding is similar to the SampleElementBinding for Vecs in that
these Data are not truly hardware, but are represented in the FIRRTL IR
and thus need some representation.

* Call _onModuleClose on unbound Records

This maintains some corner-case behavior that is nevertheless relied
upon. It ensures that refs are set for the elements of Records, even if
they are not bound to any real hardware.

(cherry picked from commit 0a0d7c6a)

Signed-off-by: Jean Bruant <jean.bruant@ovhcloud.com>
(cherry picked from commit e3b6cf4e

)

Co-authored-by: John's Brew <46595442+johnsbrew@users.noreply.github.com>

* Fix some botched formatting (replace ```mdoc scala with ```scala mdoc)
* Replace some unnecessary uses of triple backticks with single
  backticks
* Move appendix docs from wiki-deprecated/ to appendix/
  * This will require an update on the website as well
* Update Bundle literal docs

(cherry picked from commit 8fa46071

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Update reported width from div/rem to match FIRRTL results

* Add tests for width of % and / on UInt and SInt

* Add loop-based test for known UInt/SInt op result widths

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 98ce9194

)

Co-authored-by: Albert Magyar <albert.magyar@gmail.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

* Bump to Scala 2.12.13 (#1766)

(cherry picked from commit 445b5cec)

* Fix chisel3-plugin binary compatibility checking

chisel3-plugin not yet published for Scala 2.12.13, check binary
compatibility with Scala 2.12.12 instead.

If a method passed to higher function does not return any value,
it is prefer to use `foreach` instead of `map`.

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
(cherry picked from commit 654db98e

)

Co-authored-by: SoyaOhnishi <ohnishi.soya@arc.cs.okayama-u.ac.jp>

(cherry picked from commit d0db0b8b

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

This is a nit fix. no logic is changed.

* Rename `typeName` to `enumTypeName` in ScalaDoc
* Add return type at public method
* Rename `enum_records` into `enumRecords` to retain name consistency

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 2a967670

)

Co-authored-by: SoyaOhnishi <ohnishi.soya@arc.cs.okayama-u.ac.jp>

(cherry picked from commit e63b9667

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

This is useful for libraries to guard operations implemented via
annotations or BlackBoxes by the current when predicate

(cherry picked from commit cdb7bb27

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Make `toTarget` fail if called on a Literal (or would otherwise not serialize properly) (#1714) (#1721)

* Add (failing) Test for Data toTarget calls

Add scaladoc and clean up test

* Builder: don't let .toTarget pass if it won't be able to deserialize properly later

* Update src/test/scala/chiselTests/ReferenceTargetSpec.scala

* Rename and simplify tests for literal toTarget

(cherry picked from commit b578aa5e

)

Co-authored-by: Megan Wachs <megan@sifive.com>

(cherry picked from commit a600a95b

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Remove CircleCI (#1702)

Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
(cherry picked from commit eae69e95

)

# Conflicts:
#	.circleci/config.yml

* Resolve merge conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Switch to using Github Actions CI (#1690)

MiMa binary compatibility checks are now run on master, but the
mimaPreviousArtifacts are empty which makes the check a no-op. This
helps keep both the build.sbt and CI more consistent between master and
stable branches.

.mergify.yml is also updated with mergify.sc from chisel-repo-tools
using the following configuration:

conditions:
  - status-success=all tests passed
branches:
  - 3.2.x
  - 3.3.x
  - 3.4.x
(cherry picked from commit 25a417f8

)

# Conflicts:
#	.mergify.yml
#	build.sbt
#	project/plugins.sbt

* Resolve merge conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>

- fix build.sbt
- fix build.sc

(cherry picked from commit 315ff8c6

)

Co-authored-by: Chick Markley <chick@qrhino.com>

* Builder: use LazyLogging.logger.warn to print elaboration message

* add deprecation for chisel3.internal.ErrorLog.info.

* add test to check elaboration message still exist.

Co-authored-by: Kevin Laeufer <kevin.laeufer@sifive.com>
(cherry picked from commit e8f90ef5

)

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>

(cherry picked from commit ba05dcaf

)

Co-authored-by: Kevin Laeufer <electron.kiwi@gmail.com>

(cherry picked from commit e11d8b85

)

Co-authored-by: Jack Koenig <koenig@sifive.com>