1. Aug 17, 2022
  2. Aug 16, 2022
  3. Aug 13, 2022
  4. Aug 05, 2022
  5. Aug 03, 2022
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  7. Jul 31, 2022
  8. Jul 29, 2022
  9. Jul 25, 2022
  10. Jul 23, 2022
  11. Jul 22, 2022
  12. Jul 14, 2022
  13. Jul 13, 2022
  14. Jul 09, 2022
  15. Jul 07, 2022
  16. Jul 06, 2022
  17. Jun 28, 2022
  18. Jun 24, 2022
  19. Jun 23, 2022
  20. Jun 22, 2022
  21. Jun 18, 2022
  22. Jun 17, 2022
    • mergify[bot]'s avatar
      [docs] Document partial register reset (#2582) (#2583) · 01100fa9
      mergify[bot] authored
      (cherry picked from commit d54a37a5
      
      )
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      01100fa9
    • mergify[bot]'s avatar
      Define leading '_' as API for creating temporaries (backport #2580) (#2581) · d001b34f
      mergify[bot] authored
      * Define leading '_' as API for creating temporaries
      
      Chisel and FIRRTL have long used signals with names beginning with an
      underscore as an API to specify that the name does not really matter.
      Tools like Verilator follow a similar convention and exclude signals
      with underscore names from waveform dumps by default. With the
      introduction of compiler-plugin prefixing in Chisel 3.4, the convention
      remained but was hard for users to use unless the unnnamed signal
      existed outside of any prefix domain. Notably, unnamed signals are most
      useful when creating wires inside of utility methods which almost always
      results in the signal ending up with a prefix.
      
      With this commit, Chisel explicitly recognizes signals whos val names
      start with an underscore and preserve that underscore regardless of any
      prefixing. Chisel will also ignore such underscores when generating
      prefixes based on the temporary signal, preventing accidental double
      underscores in the names of signals that are prefixed by the temporary.
      
      (cherry picked from commit bd943662)
      
      * Remove unused defaultPrefix argument from _computeName
      
      (cherry picked from commit ec178aa2
      
      )
      
      # Conflicts:
      #	core/src/main/scala/chisel3/Module.scala
      #	core/src/main/scala/chisel3/experimental/hierarchy/ModuleClone.scala
      
      * Resolve backport conflicts
      
      * Waive false positive binary compatibility errors
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      d001b34f
  23. Jun 14, 2022
  24. Jun 11, 2022
  25. Jun 09, 2022
  26. Jun 08, 2022
  27. Jun 07, 2022
    • mergify[bot]'s avatar
      Add --warn:reflective-naming (backport #2561) (#2565) · 42f5d890
      mergify[bot] authored
      * Factor buildName into reusable function
      
      The new function is chisel3.internal.buildName.
      
      (cherry picked from commit 370ca8ac)
      
      * Add --warn:reflective-naming
      
      This new argument (and associated annotation) will turn on a warning
      whenever reflective naming changes the name of a signal. This is
      provided to help migrate from Chisel 3.5 to 3.6 since reflective naming
      is removed in Chisel 3.6.
      
      (cherry picked from commit 97afd9b9
      
      )
      
      Co-authored-by: default avatarJack Koenig <koenig@sifive.com>
      42f5d890
  28. Jun 04, 2022