Merge branch 'master' into gdbgdb

670 files changed, 107959 insertions, 221 deletions

diff --git a/.gitignore b/.gitignore
index e1cc4a7..f6ed0c2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -4,3 +4,4 @@
 
 _build/
 _sbuild/
+*.o
diff --git a/Makefile b/Makefile
index c500774..e4bf607 100644
--- a/Makefile
+++ b/Makefile
@@ -7,10 +7,13 @@ else ifeq ($(ARCH),64)
   override ARCH := RV64
 endif
 
+# Currently, we only have F with RV32, and both F and D with RV64.
 ifeq ($(ARCH),RV32)
   SAIL_XLEN := riscv_xlen32.sail
+  SAIL_FLEN := riscv_flen_F.sail
 else ifeq ($(ARCH),RV64)
   SAIL_XLEN := riscv_xlen64.sail
+  SAIL_FLEN := riscv_flen_D.sail
 else
   $(error '$(ARCH)' is not a valid architecture, must be one of: RV32, RV64)
 endif
@@ -18,6 +21,11 @@ endif
 # Instruction sources, depending on target
 SAIL_CHECK_SRCS = riscv_addr_checks_common.sail riscv_addr_checks.sail riscv_misa_ext.sail
 SAIL_DEFAULT_INST = riscv_insts_base.sail riscv_insts_aext.sail riscv_insts_cext.sail riscv_insts_mext.sail riscv_insts_zicsr.sail riscv_insts_next.sail
+SAIL_DEFAULT_INST += riscv_softfloat_interface.sail  riscv_insts_fext.sail
+ifeq ($(ARCH),RV64)
+SAIL_DEFAULT_INST +=riscv_insts_dext.sail
+endif
+
 SAIL_SEQ_INST  = $(SAIL_DEFAULT_INST) riscv_jalr_seq.sail
 SAIL_RMEM_INST = $(SAIL_DEFAULT_INST) riscv_jalr_rmem.sail riscv_insts_rmem.sail
 
@@ -30,6 +38,7 @@ SAIL_SYS_SRCS += riscv_next_regs.sail
 SAIL_SYS_SRCS += riscv_sys_exceptions.sail  # default basic helpers for exception handling
 SAIL_SYS_SRCS += riscv_sync_exception.sail  # define the exception structure used in the model
 SAIL_SYS_SRCS += riscv_next_control.sail    # helpers for the 'N' extension
+SAIL_SYS_SRCS += riscv_fdext_regs.sail riscv_fdext_control.sail
 SAIL_SYS_SRCS += riscv_csr_ext.sail         # access to CSR extensions
 SAIL_SYS_SRCS += riscv_sys_control.sail     # general exception handling
 
@@ -44,17 +53,18 @@ SAIL_VM_SRCS += $(SAIL_RV64_VM_SRCS)
 endif
 
 # Non-instruction sources
-PRELUDE = prelude.sail prelude_mapping.sail $(SAIL_XLEN) prelude_mem_metadata.sail prelude_mem.sail
+PRELUDE = prelude.sail prelude_mapping.sail $(SAIL_XLEN) $(SAIL_FLEN) prelude_mem_metadata.sail prelude_mem.sail
 
-SAIL_REGS_SRCS = riscv_reg_type.sail riscv_regs.sail riscv_pc_access.sail riscv_sys_regs.sail
+SAIL_REGS_SRCS = riscv_reg_type.sail riscv_freg_type.sail riscv_regs.sail riscv_pc_access.sail riscv_sys_regs.sail
 SAIL_REGS_SRCS += riscv_pmp_regs.sail riscv_pmp_control.sail
 SAIL_REGS_SRCS += riscv_ext_regs.sail $(SAIL_CHECK_SRCS)
 
 SAIL_ARCH_SRCS = $(PRELUDE)
-SAIL_ARCH_SRCS += riscv_types_ext.sail riscv_types.sail
+SAIL_ARCH_SRCS += riscv_types_common.sail riscv_types_ext.sail riscv_types.sail
 SAIL_ARCH_SRCS += riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail
 SAIL_ARCH_SRCS += riscv_mem.sail $(SAIL_VM_SRCS)
-SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS)
+SAIL_ARCH_RVFI_SRCS = $(PRELUDE) rvfi_dii.sail riscv_types_common.sail riscv_types_ext.sail riscv_types.sail riscv_vmem_types.sail $(SAIL_REGS_SRCS) $(SAIL_SYS_SRCS) riscv_platform.sail riscv_mem.sail $(SAIL_VM_SRCS)
+
 SAIL_STEP_SRCS = riscv_step_common.sail riscv_step_ext.sail riscv_decode_ext.sail riscv_fetch.sail riscv_step.sail
 RVFI_STEP_SRCS = riscv_step_common.sail riscv_step_rvfi.sail riscv_decode_ext.sail riscv_fetch_rvfi.sail riscv_step.sail
 
@@ -74,7 +84,7 @@ SAIL_RMEM_SRCS = $(addprefix model/,$(SAIL_ARCH_SRCS) $(SAIL_RMEM_INST_SRCS) $(S
 SAIL_RVFI_SRCS = $(addprefix model/,$(SAIL_ARCH_RVFI_SRCS) $(SAIL_SEQ_INST_SRCS) $(RVFI_STEP_SRCS))
 SAIL_COQ_SRCS  = $(addprefix model/,$(SAIL_ARCH_SRCS) $(SAIL_SEQ_INST_SRCS) $(SAIL_OTHER_COQ_SRCS))
 
-PLATFORM_OCAML_SRCS = $(addprefix ocaml_emulator/,platform.ml platform_impl.ml riscv_ocaml_sim.ml)
+PLATFORM_OCAML_SRCS = $(addprefix ocaml_emulator/,platform.ml platform_impl.ml softfloat.ml riscv_ocaml_sim.ml)
 
 SAIL_FLAGS += -dno_cast
 
@@ -99,8 +109,8 @@ BBV_DIR?=../bbv
 
 C_WARNINGS ?=
 #-Wall -Wextra -Wno-unused-label -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-unused-function
-C_INCS = $(addprefix c_emulator/,riscv_prelude.h riscv_platform_impl.h riscv_platform.h)
-C_SRCS = $(addprefix c_emulator/,riscv_prelude.c riscv_platform_impl.c riscv_platform.c riscv_sim.c)
+C_INCS = $(addprefix c_emulator/,riscv_prelude.h riscv_platform_impl.h riscv_platform.h riscv_softfloat.h)
+C_SRCS = $(addprefix c_emulator/,riscv_prelude.c riscv_platform_impl.c riscv_platform.c riscv_softfloat.c riscv_sim.c)
 C_INCS += $(addprefix c_emulator/gdb_remote/,gdb_utils.h gdb_arch.h gdb_rsp.h)
 C_SRCS += $(addprefix c_emulator/gdb_remote/,gdb_utils.c gdb_arch_riscv.c gdb_rsp.c)
 
@@ -108,8 +118,15 @@ C_SRCS += $(addprefix c_emulator/gdb_remote/,gdb_utils.c gdb_arch_riscv.c gdb_rs
 C_SYS_INCLUDES = -I /opt/local/include
 C_SYS_LIBDIRS  = -L /opt/local/lib
 
-C_FLAGS = $(C_SYS_INCLUDES) -I $(SAIL_LIB_DIR) -I c_emulator
-C_LIBS  = $(C_SYS_LIBDIRS) -lgmp -lz
+SOFTFLOAT_DIR    = c_emulator/SoftFloat-3e
+SOFTFLOAT_INCDIR = $(SOFTFLOAT_DIR)/source/include
+SOFTFLOAT_LIBDIR = $(SOFTFLOAT_DIR)/build/Linux-RISCV-GCC
+SOFTFLOAT_FLAGS  = -I $(SOFTFLOAT_INCDIR)
+SOFTFLOAT_LIBS   = $(SOFTFLOAT_LIBDIR)/softfloat.a
+SOFTFLOAT_SPECIALIZE_TYPE = RISCV
+
+C_FLAGS = $(C_SYS_INCLUDES) -I $(SAIL_LIB_DIR) -I c_emulator $(SOFTFLOAT_FLAGS)
+C_LIBS  = $(C_SYS_LIBDIRS) -lgmp -lz $(SOFTFLOAT_LIBS)
 
 # The C simulator can be built to be linked against Spike for tandem-verification.
 # This needs the C bindings to Spike from https://github.com/SRI-CSL/l3riscv
@@ -131,16 +148,19 @@ else
 C_FLAGS += -O3 -flto
 endif
 
+RISCV_EXTRAS_LEM_FILES = riscv_extras.lem mem_metadata.lem riscv_extras_fdext.lem
 # Feature detect if we are on the latest development version of Sail
 # and use an updated lem file if so. This is just until the opam
 # version catches up with changes to the barrier type.
 SAIL_LATEST := $(shell $(SAIL) -have_feature FEATURE_UNION_BARRIER 1>&2 2> /dev/null; echo $$?)
 ifeq ($(SAIL_LATEST),0)
-RISCV_EXTRAS_LEM = 0.11/riscv_extras.lem
+RISCV_EXTRAS_LEM = $(addprefix handwritten_support/0.11/,$(RISCV_EXTRAS_LEM_FILES))
 else
-RISCV_EXTRAS_LEM = riscv_extras.lem
+RISCV_EXTRAS_LEM = $(addprefix handwritten_support/,$(RISCV_EXTRAS_LEM_FILES))
 endif
 
+.PHONY:
+
 all: ocaml_emulator/riscv_ocaml_sim_$(ARCH) c_emulator/riscv_sim_$(ARCH) riscv_isa riscv_coq riscv_hol riscv_rmem
 .PHONY: all
 
@@ -193,7 +213,7 @@ gcovr:
 
 generated_definitions/ocaml/riscv_duopod_ocaml: $(PRELUDE_SRCS) model/riscv_duopod.sail
 	mkdir -p generated_definitions/ocaml
-	$(SAIL) $(SAIL_FLAGS) -ocaml -ocaml_build_dir generated_definitions/ocaml -o riscv_duopod_ocaml $^
+	$(SAIL) $(SAIL_FLAGS) -ocaml -ocaml_build_dir generated_definitions/ocaml -o riscv_duopod_ocaml model/riscv_duopod.sail
 
 ocaml_emulator/tracecmp: ocaml_emulator/tracecmp.ml
 	ocamlfind ocamlopt -annot -linkpkg -package unix $^ -o $@
@@ -202,15 +222,24 @@ generated_definitions/c/riscv_model_$(ARCH).c: $(SAIL_SRCS) model/main.sail Make
 	mkdir -p generated_definitions/c
 	$(SAIL) $(SAIL_FLAGS) -O -Oconstant_fold -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_SRCS) model/main.sail -o $(basename $@)
 
-c_emulator/riscv_sim_$(ARCH): generated_definitions/c/riscv_model_$(ARCH).c $(C_INCS) $(C_SRCS) Makefile
+$(SOFTFLOAT_LIBS):
+	$(MAKE) SPECIALIZE_TYPE=$(SOFTFLOAT_SPECIALIZE_TYPE) -C $(SOFTFLOAT_LIBDIR)
+
+# convenience target
+.PHONY: csim
+csim: c_emulator/riscv_sim_$(ARCH)
+.PHONY: rvfi
+rvfi: c_emulator/riscv_rvfi_$(ARCH)
+
+c_emulator/riscv_sim_$(ARCH): generated_definitions/c/riscv_model_$(ARCH).c $(C_INCS) $(C_SRCS) $(SOFTFLOAT_LIBS) Makefile
 	gcc -g $(C_WARNINGS) $(C_FLAGS) $< $(C_SRCS) $(SAIL_LIB_DIR)/*.c $(C_LIBS) -o $@
 
-generated_definitions/c/riscv_rvfi_model.c: $(SAIL_RVFI_SRCS) model/main.sail Makefile
+generated_definitions/c/riscv_rvfi_model_$(ARCH).c: $(SAIL_RVFI_SRCS) model/main.sail Makefile
 	mkdir -p generated_definitions/c
-	$(SAIL) $(SAIL_FLAGS) -O -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_RVFI_SRCS) model/main.sail -o $(basename $@)
+	$(SAIL) $(SAIL_FLAGS) -O -Oconstant_fold -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_RVFI_SRCS) model/main.sail -o $(basename $@)
 	sed -i -e '/^[[:space:]]*$$/d' $@
 
-c_emulator/riscv_rvfi: generated_definitions/c/riscv_rvfi_model.c $(C_INCS) $(C_SRCS) Makefile
+c_emulator/riscv_rvfi_$(ARCH): generated_definitions/c/riscv_rvfi_model_$(ARCH).c $(C_INCS) $(C_SRCS) $(SOFTFLOAT_LIBS) Makefile
 	gcc -g $(C_WARNINGS) $(C_FLAGS) $< -DRVFI_DII $(C_SRCS) $(SAIL_LIB_DIR)/*.c $(C_LIBS) -o $@
 
 latex: $(SAIL_SRCS) Makefile
@@ -223,10 +252,11 @@ generated_definitions/isabelle/$(ARCH)/ROOT: handwritten_support/ROOT
 
 generated_definitions/lem/riscv_duopod.lem: $(PRELUDE_SRCS) model/riscv_duopod.sail
 	mkdir -p generated_definitions/lem
-	$(SAIL) $(SAIL_FLAGS) -lem -lem_output_dir generated_definitions/lem -isa_output_dir generated_definitions/isabelle -lem_mwords -lem_lib Riscv_extras -o riscv_duopod $^
-generated_definitions/isabelle/Riscv_duopod.thy: generated_definitions/isabelle/ROOT generated_definitions/lem/riscv_duopod.lem handwritten_support/$(RISCV_EXTRAS_LEM)
+	$(SAIL) $(SAIL_FLAGS) -lem -lem_output_dir generated_definitions/lem -isa_output_dir generated_definitions/isabelle -lem_mwords -lem_lib Riscv_extras -lem_lib Mem_metadata -o riscv_duopod model/riscv_duopod.sail
+
+generated_definitions/isabelle/Riscv_duopod.thy: generated_definitions/isabelle/RV64/ROOT generated_definitions/lem/riscv_duopod.lem $(RISCV_EXTRAS_LEM)
 	lem -isa -outdir generated_definitions/isabelle -lib Sail=$(SAIL_SRC_DIR)/lem_interp -lib Sail=$(SAIL_SRC_DIR)/gen_lib \
-		handwritten_support/$(RISCV_EXTRAS_LEM) \
+		$(RISCV_EXTRAS_LEM) \
 		generated_definitions/lem/riscv_duopod_types.lem \
 		generated_definitions/lem/riscv_duopod.lem
 
@@ -246,30 +276,26 @@ endif
 
 generated_definitions/lem/$(ARCH)/riscv.lem: $(SAIL_SRCS) Makefile
 	mkdir -p generated_definitions/lem/$(ARCH) generated_definitions/isabelle/$(ARCH)
-	$(SAIL) $(SAIL_FLAGS) -lem -lem_output_dir generated_definitions/lem/$(ARCH) -isa_output_dir generated_definitions/isabelle/$(ARCH) -o riscv -lem_mwords -lem_lib Riscv_extras $(SAIL_SRCS)
-	echo "declare {isabelle} rename field sync_exception_ext = sync_exception_ext_exception" >> generated_definitions/lem/$(ARCH)/riscv_types.lem
-
-generated_definitions/lem/$(ARCH)/riscv_sequential.lem: $(SAIL_SRCS) Makefile
-	mkdir -p generated_definitions/lem/$(ARCH) generated_definitions/isabelle/$(ARCH)
-	$(SAIL_DIR)/sail -lem -lem_output_dir generated_definitions/lem/$(ARCH) -isa_output_dir generated_definitions/isabelle/$(ARCH) -lem_sequential -o riscv_sequential -lem_mwords -lem_lib Riscv_extras_sequential $(SAIL_SRCS)
+	$(SAIL) $(SAIL_FLAGS) -lem -lem_output_dir generated_definitions/lem/$(ARCH) -isa_output_dir generated_definitions/isabelle/$(ARCH) -o riscv -lem_mwords -lem_lib Riscv_extras -lem_lib Riscv_extras_fdext -lem_lib Mem_metadata $(SAIL_SRCS)
 	echo "declare {isabelle} rename field sync_exception_ext = sync_exception_ext_exception" >> generated_definitions/lem/$(ARCH)/riscv_types.lem
 
-generated_definitions/isabelle/$(ARCH)/Riscv.thy: generated_definitions/isabelle/$(ARCH)/ROOT generated_definitions/lem/$(ARCH)/riscv.lem handwritten_support/$(RISCV_EXTRAS_LEM) Makefile
+generated_definitions/isabelle/$(ARCH)/Riscv.thy: generated_definitions/isabelle/$(ARCH)/ROOT generated_definitions/lem/$(ARCH)/riscv.lem $(RISCV_EXTRAS_LEM) Makefile
 	lem -isa -outdir generated_definitions/isabelle/$(ARCH) -lib Sail=$(SAIL_SRC_DIR)/lem_interp -lib Sail=$(SAIL_SRC_DIR)/gen_lib \
-		handwritten_support/$(RISCV_EXTRAS_LEM) \
+		$(RISCV_EXTRAS_LEM) \
 		generated_definitions/lem/$(ARCH)/riscv_types.lem \
 		generated_definitions/lem/$(ARCH)/riscv.lem
 	sed -i 's/datatype ast/datatype (plugins only: size) ast/' generated_definitions/isabelle/$(ARCH)/Riscv_types.thy
 	sed -i "s/record( 'asidlen, 'valen, 'palen, 'ptelen) TLB_Entry/record (overloaded) ( 'asidlen, 'valen, 'palen, 'ptelen) TLB_Entry/" generated_definitions/isabelle/$(ARCH)/Riscv_types.thy
+	sed -i "s/by pat_completeness auto/by pat_completeness (auto intro!: let_cong bind_cong MemoryOpResult.case_cong)/" generated_definitions/isabelle/$(ARCH)/Riscv.thy
 
 generated_definitions/hol4/$(ARCH)/Holmakefile: handwritten_support/Holmakefile
 	mkdir -p generated_definitions/hol4/$(ARCH)
 	cp handwritten_support/Holmakefile generated_definitions/hol4/$(ARCH)
 
-generated_definitions/hol4/$(ARCH)/riscvScript.sml: generated_definitions/hol4/$(ARCH)/Holmakefile generated_definitions/lem/$(ARCH)/riscv.lem handwritten_support/$(RISCV_EXTRAS_LEM)
+generated_definitions/hol4/$(ARCH)/riscvScript.sml: generated_definitions/hol4/$(ARCH)/Holmakefile generated_definitions/lem/$(ARCH)/riscv.lem $(RISCV_EXTRAS_LEM)
 	lem -hol -outdir generated_definitions/hol4/$(ARCH) -lib $(SAIL_LIB_DIR)/hol -i $(SAIL_LIB_DIR)/hol/sail2_prompt_monad.lem -i $(SAIL_LIB_DIR)/hol/sail2_prompt.lem \
 	    -lib $(SAIL_DIR)/src/lem_interp -lib $(SAIL_DIR)/src/gen_lib \
-		handwritten_support/$(RISCV_EXTRAS_LEM) \
+		$(RISCV_EXTRAS_LEM) \
 		generated_definitions/lem/$(ARCH)/riscv_types.lem \
 		generated_definitions/lem/$(ARCH)/riscv.lem
 
@@ -294,10 +320,10 @@ riscv_coq_build: generated_definitions/coq/$(ARCH)/riscv.vo
 
 $(addprefix generated_definitions/coq/$(ARCH)/,riscv.v riscv_types.v): $(SAIL_COQ_SRCS) Makefile
 	mkdir -p generated_definitions/coq/$(ARCH)
-	$(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir generated_definitions/coq/$(ARCH) -o riscv -coq_lib riscv_extras $(SAIL_COQ_SRCS)
+	$(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir generated_definitions/coq/$(ARCH) -o riscv -coq_lib riscv_extras -coq_lib mem_metadata $(SAIL_COQ_SRCS)
 $(addprefix generated_definitions/coq/$(ARCH)/,riscv_duopod.v riscv_duopod_types.v): $(PRELUDE_SRCS) model/riscv_duopod.sail model/riscv_termination_duo.sail
 	mkdir -p generated_definitions/coq/$(ARCH)
-	$(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir generated_definitions/coq/$(ARCH) -o riscv_duopod -coq_lib riscv_extras $^
+	$(SAIL) $(SAIL_FLAGS) -dcoq_undef_axioms -coq -coq_output_dir generated_definitions/coq/$(ARCH) -o riscv_duopod -coq_lib riscv_extras -coq_lib mem_metadata $^
 
 %.vo: %.v
 ifeq ($(wildcard $(BBV_DIR)/theories),)
@@ -308,8 +334,8 @@ ifeq ($(wildcard $(SAIL_LIB_DIR)/coq),)
 endif
 	coqc $(COQ_LIBS) $<
 
-generated_definitions/coq/$(ARCH)/riscv.vo: generated_definitions/coq/$(ARCH)/riscv_types.vo handwritten_support/riscv_extras.vo
-generated_definitions/coq/$(ARCH)/riscv_duopod.vo: generated_definitions/coq/$(ARCH)/riscv_duopod_types.vo handwritten_support/riscv_extras.vo
+generated_definitions/coq/$(ARCH)/riscv.vo: generated_definitions/coq/$(ARCH)/riscv_types.vo handwritten_support/riscv_extras.vo handwritten_support/mem_metadata.vo
+generated_definitions/coq/$(ARCH)/riscv_duopod.vo: generated_definitions/coq/$(ARCH)/riscv_duopod_types.vo handwritten_support/riscv_extras.vo handwritten_support/mem_metadata.vo
 
 echo_rmem_srcs:
 	echo $(SAIL_RMEM_SRCS)
@@ -319,7 +345,7 @@ riscv_rmem: generated_definitions/for-rmem/riscv_toFromInterp2.ml
 riscv_rmem: generated_definitions/for-rmem/riscv.defs
 .PHONY: riscv_rmem
 
-generated_definitions/for-rmem/riscv.lem: SAIL_FLAGS += -lem_lib Riscv_extras
+generated_definitions/for-rmem/riscv.lem: SAIL_FLAGS += -lem_lib Riscv_extras -lem_lib Riscv_extras_fdext -lem_lib Mem_metadata
 generated_definitions/for-rmem/riscv.lem: $(SAIL_RMEM_SRCS)
 	mkdir -p $(dir $@)
 #	We do not need the isabelle .thy files, but sail always generates them
@@ -363,10 +389,12 @@ clean:
 	-rm -rf generated_definitions/ocaml/* generated_definitions/c/* generated_definitions/latex/*
 	-rm -rf generated_definitions/lem/* generated_definitions/isabelle/* generated_definitions/hol4/* generated_definitions/coq/*
 	-rm -rf generated_definitions/for-rmem/*
-	-rm -f c_emulator/riscv_sim_RV32 c_emulator/riscv_sim_RV64  c_emulator/riscv_rvfi
+	-$(MAKE) -C $(SOFTFLOAT_LIBDIR) clean
+	-rm -f c_emulator/riscv_sim_RV32 c_emulator/riscv_sim_RV64  c_emulator/riscv_rvfi_RV32 c_emulator/riscv_rvfi_RV64
 	-rm -rf ocaml_emulator/_sbuild ocaml_emulator/_build ocaml_emulator/riscv_ocaml_sim_RV32 ocaml_emulator/riscv_ocaml_sim_RV64 ocaml_emulator/tracecmp
 	-rm -f *.gcno *.gcda
 	-rm -f z3_problems
 	-Holmake cleanAll
 	-rm -f handwritten_support/riscv_extras.vo handwritten_support/riscv_extras.glob handwritten_support/.riscv_extras.aux
+	-rm -f handwritten_support/mem_metadata.vo handwritten_support/mem_metadata.glob handwritten_support/.mem_metadata.aux
 	ocamlbuild -clean
diff --git a/README.md b/README.md
index 2836ff6..7bd9f7e 100644
--- a/README.md
+++ b/README.md
@@ -17,6 +17,13 @@ A [reading guide](doc/ReadingGuide.md) to the model is provided in the
 extend](doc/ExtendingGuide.md) the model. 
 
 
+Latex definitions can be generated from the model that are suitable
+for inclusion in reference documentation.  Drafts of the RISC-V
+[unprivileged](https://github.com/rems-project/riscv-isa-manual/blob/sail/release/riscv-spec-sail-draft-alpha2.pdf)
+and [privileged](https://github.com/rems-project/riscv-isa-manual/blob/sail/release/riscv-privileged-sail-draft-alpha2.pdf)
+specifications that include the Sail formal definitions are available
+in the sail branch of this [risc-v-isa-manual repository](https://github.com/rems-project/riscv-isa-manual/tree/sail).
+
 This is one of [several formal models](https://github.com/riscv/ISA_Formal_Spec_Public_Review/blob/master/comparison_table.md) compared within the 
 [RISC-V ISA Formal Spec Public Review](https://github.com/riscv/ISA_Formal_Spec_Public_Review).
 
diff --git a/c_emulator/SoftFloat-3e/COPYING.txt b/c_emulator/SoftFloat-3e/COPYING.txt
new file mode 100644
index 0000000..9c05d49
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/COPYING.txt
@@ -0,0 +1,37 @@
+

+License for Berkeley SoftFloat Release 3e

+

+John R. Hauser

+2018 January 20

+

+The following applies to the whole of SoftFloat Release 3e as well as to

+each source file individually.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright

+    notice, this list of conditions, and the following disclaimer in the

+    documentation and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors

+    may be used to endorse or promote products derived from this software

+    without specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

diff --git a/c_emulator/SoftFloat-3e/README.html b/c_emulator/SoftFloat-3e/README.html
new file mode 100644
index 0000000..7989e0c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/README.html
@@ -0,0 +1,49 @@
+

+<HTML>

+

+<HEAD>

+<TITLE>Berkeley SoftFloat Package Overview</TITLE>

+</HEAD>

+

+<BODY>

+

+<H1>Package Overview for Berkeley SoftFloat Release 3e</H1>

+

+<P>

+John R. Hauser<BR>

+2018 January 20<BR>

+</P>

+

+<P>

+Berkeley SoftFloat is a software implementation of binary floating-point that

+conforms to the IEEE Standard for Floating-Point Arithmetic.

+SoftFloat is distributed in the form of C source code.

+Building the SoftFloat sources generates a library file (typically

+<CODE>softfloat.a</CODE> or <CODE>libsoftfloat.a</CODE>) containing the

+floating-point subroutines.

+</P>

+

+<P>

+The SoftFloat package is documented in the following files in the

+<CODE>doc</CODE> subdirectory:

+<BLOCKQUOTE>

+<TABLE>

+<TR>

+<TD><A HREF="doc/SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A></TD>

+<TD>Documentation for using the SoftFloat functions.</TD>

+</TR>

+<TR>

+<TD><A HREF="doc/SoftFloat-source.html"><NOBR><CODE>SoftFloat-source.html</CODE></NOBR></A></TD>

+<TD>Documentation for building SoftFloat.</TD>

+</TR>

+<TR>

+<TD><A HREF="doc/SoftFloat-history.html"><NOBR><CODE>SoftFloat-history.html</CODE></A><CODE>&nbsp;&nbsp;&nbsp;</CODE></NOBR></TD>

+<TD>History of the major changes to SoftFloat.</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+Other files in the package comprise the source code for SoftFloat.

+</P>

+

+</BODY>

+

diff --git a/c_emulator/SoftFloat-3e/README.txt b/c_emulator/SoftFloat-3e/README.txt
new file mode 100644
index 0000000..f819baa
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/README.txt
@@ -0,0 +1,21 @@
+

+Package Overview for Berkeley SoftFloat Release 3e

+

+John R. Hauser

+2018 January 20

+

+Berkeley SoftFloat is a software implementation of binary floating-point

+that conforms to the IEEE Standard for Floating-Point Arithmetic.  SoftFloat

+is distributed in the form of C source code.  Building the SoftFloat sources

+generates a library file (typically "softfloat.a" or "libsoftfloat.a")

+containing the floating-point subroutines.

+

+The SoftFloat package is documented in the following files in the "doc"

+subdirectory:

+

+    SoftFloat.html          Documentation for using the SoftFloat functions.

+    SoftFloat-source.html   Documentation for building SoftFloat.

+    SoftFloat-history.html  History of the major changes to SoftFloat.

+

+Other files in the package comprise the source code for SoftFloat.

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-386-GCC/Makefile b/c_emulator/SoftFloat-3e/build/Linux-386-GCC/Makefile
new file mode 100644
index 0000000..4181600
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-386-GCC/Makefile
@@ -0,0 +1,325 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \

+    $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-386-GCC/platform.h b/c_emulator/SoftFloat-3e/build/Linux-386-GCC/platform.h
new file mode 100644
index 0000000..420aa4e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-386-GCC/platform.h
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/Makefile b/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/Makefile
new file mode 100644
index 0000000..1cf6f5e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/Makefile
@@ -0,0 +1,325 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086-SSE

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \

+    $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/platform.h b/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/platform.h
new file mode 100644
index 0000000..420aa4e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-386-SSE2-GCC/platform.h
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/Makefile b/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/Makefile
new file mode 100644
index 0000000..2565fe5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/Makefile
@@ -0,0 +1,323 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= ARM-VFPv2

+

+SOFTFLOAT_OPTS ?= -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \

+    $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/platform.h b/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/platform.h
new file mode 100644
index 0000000..420aa4e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-ARM-VFPv2-GCC/platform.h
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/Makefile b/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/Makefile
new file mode 100644
index 0000000..9ec18f7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/Makefile
@@ -0,0 +1,380 @@
+
+#=============================================================================
+#
+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic
+# Package, Release 3e, by John R. Hauser.
+#
+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+# University of California.  All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#  1. Redistributions of source code must retain the above copyright notice,
+#     this list of conditions, and the following disclaimer.
+#
+#  2. Redistributions in binary form must reproduce the above copyright
+#     notice, this list of conditions, and the following disclaimer in the
+#     documentation and/or other materials provided with the distribution.
+#
+#  3. Neither the name of the University nor the names of its contributors
+#     may be used to endorse or promote products derived from this software
+#     without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#=============================================================================
+
+SOURCE_DIR ?= ../../source
+SPECIALIZE_TYPE ?= RISCV
+
+SOFTFLOAT_OPTS ?= \
+
+
+DELETE = rm -f
+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include
+COMPILE_C = \
+  gcc -c -Werror-implicit-function-declaration \
+    $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@
+MAKELIB = ar crs $@
+
+OBJ = .o
+LIB = .a
+
+OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h
+
+.PHONY: all
+all: softfloat$(LIB)
+
+OBJS_PRIMITIVES = \
+  s_eq128$(OBJ) \
+  s_le128$(OBJ) \
+  s_lt128$(OBJ) \
+  s_shortShiftLeft128$(OBJ) \
+  s_shortShiftRight128$(OBJ) \
+  s_shortShiftRightJam64$(OBJ) \
+  s_shortShiftRightJam64Extra$(OBJ) \
+  s_shortShiftRightJam128$(OBJ) \
+  s_shortShiftRightJam128Extra$(OBJ) \
+  s_shiftRightJam32$(OBJ) \
+  s_shiftRightJam64$(OBJ) \
+  s_shiftRightJam64Extra$(OBJ) \
+  s_shiftRightJam128$(OBJ) \
+  s_shiftRightJam128Extra$(OBJ) \
+  s_shiftRightJam256M$(OBJ) \
+  s_countLeadingZeros8$(OBJ) \
+  s_countLeadingZeros16$(OBJ) \
+  s_countLeadingZeros32$(OBJ) \
+  s_countLeadingZeros64$(OBJ) \
+  s_add128$(OBJ) \
+  s_add256M$(OBJ) \
+  s_sub128$(OBJ) \
+  s_sub256M$(OBJ) \
+  s_mul64ByShifted32To128$(OBJ) \
+  s_mul64To128$(OBJ) \
+  s_mul128By32$(OBJ) \
+  s_mul128To256M$(OBJ) \
+  s_approxRecip_1Ks$(OBJ) \
+  s_approxRecip32_1$(OBJ) \
+  s_approxRecipSqrt_1Ks$(OBJ) \
+  s_approxRecipSqrt32_1$(OBJ) \
+
+OBJS_SPECIALIZE = \
+  softfloat_raiseFlags$(OBJ) \
+  s_propagateNaNF16UI$(OBJ) \
+  s_f32UIToCommonNaN$(OBJ) \
+  s_commonNaNToF32UI$(OBJ) \
+  s_propagateNaNF32UI$(OBJ) \
+  s_f64UIToCommonNaN$(OBJ) \
+  s_commonNaNToF64UI$(OBJ) \
+  s_propagateNaNF64UI$(OBJ) \
+  s_propagateNaNF128UI$(OBJ)
+
+OBJS_OTHERS = \
+  s_roundToUI32$(OBJ) \
+  s_roundToUI64$(OBJ) \
+  s_roundToI32$(OBJ) \
+  s_roundToI64$(OBJ) \
+  s_normSubnormalF16Sig$(OBJ) \
+  s_roundPackToF16$(OBJ) \
+  s_normRoundPackToF16$(OBJ) \
+  s_addMagsF16$(OBJ) \
+  s_subMagsF16$(OBJ) \
+  s_mulAddF16$(OBJ) \
+  s_normSubnormalF32Sig$(OBJ) \
+  s_roundPackToF32$(OBJ) \
+  s_normRoundPackToF32$(OBJ) \
+  s_addMagsF32$(OBJ) \
+  s_subMagsF32$(OBJ) \
+  s_mulAddF32$(OBJ) \
+  s_normSubnormalF64Sig$(OBJ) \
+  s_roundPackToF64$(OBJ) \
+  s_normRoundPackToF64$(OBJ) \
+  s_addMagsF64$(OBJ) \
+  s_subMagsF64$(OBJ) \
+  s_mulAddF64$(OBJ) \
+  s_normSubnormalExtF80Sig$(OBJ) \
+  s_roundPackToExtF80$(OBJ) \
+  s_normRoundPackToExtF80$(OBJ) \
+  s_addMagsExtF80$(OBJ) \
+  s_subMagsExtF80$(OBJ) \
+  s_normSubnormalF128Sig$(OBJ) \
+  s_roundPackToF128$(OBJ) \
+  s_normRoundPackToF128$(OBJ) \
+  s_addMagsF128$(OBJ) \
+  s_subMagsF128$(OBJ) \
+  s_mulAddF128$(OBJ) \
+  softfloat_state$(OBJ) \
+  ui32_to_f16$(OBJ) \
+  ui32_to_f32$(OBJ) \
+  ui32_to_f64$(OBJ) \
+  ui32_to_extF80$(OBJ) \
+  ui32_to_extF80M$(OBJ) \
+  ui32_to_f128$(OBJ) \
+  ui32_to_f128M$(OBJ) \
+  ui64_to_f16$(OBJ) \
+  ui64_to_f32$(OBJ) \
+  ui64_to_f64$(OBJ) \
+  ui64_to_extF80$(OBJ) \
+  ui64_to_extF80M$(OBJ) \
+  ui64_to_f128$(OBJ) \
+  ui64_to_f128M$(OBJ) \
+  i32_to_f16$(OBJ) \
+  i32_to_f32$(OBJ) \
+  i32_to_f64$(OBJ) \
+  i32_to_extF80$(OBJ) \
+  i32_to_extF80M$(OBJ) \
+  i32_to_f128$(OBJ) \
+  i32_to_f128M$(OBJ) \
+  i64_to_f16$(OBJ) \
+  i64_to_f32$(OBJ) \
+  i64_to_f64$(OBJ) \
+  i64_to_extF80$(OBJ) \
+  i64_to_extF80M$(OBJ) \
+  i64_to_f128$(OBJ) \
+  i64_to_f128M$(OBJ) \
+  f16_to_ui32$(OBJ) \
+  f16_to_ui64$(OBJ) \
+  f16_to_i32$(OBJ) \
+  f16_to_i64$(OBJ) \
+  f16_to_ui32_r_minMag$(OBJ) \
+  f16_to_ui64_r_minMag$(OBJ) \
+  f16_to_i32_r_minMag$(OBJ) \
+  f16_to_i64_r_minMag$(OBJ) \
+  f16_to_f32$(OBJ) \
+  f16_to_f64$(OBJ) \
+  f16_to_extF80$(OBJ) \
+  f16_to_extF80M$(OBJ) \
+  f16_to_f128$(OBJ) \
+  f16_to_f128M$(OBJ) \
+  f16_roundToInt$(OBJ) \
+  f16_add$(OBJ) \
+  f16_sub$(OBJ) \
+  f16_mul$(OBJ) \
+  f16_mulAdd$(OBJ) \
+  f16_div$(OBJ) \
+  f16_rem$(OBJ) \
+  f16_sqrt$(OBJ) \
+  f16_eq$(OBJ) \
+  f16_le$(OBJ) \
+  f16_lt$(OBJ) \
+  f16_eq_signaling$(OBJ) \
+  f16_le_quiet$(OBJ) \
+  f16_lt_quiet$(OBJ) \
+  f16_isSignalingNaN$(OBJ) \
+  f32_to_ui32$(OBJ) \
+  f32_to_ui64$(OBJ) \
+  f32_to_i32$(OBJ) \
+  f32_to_i64$(OBJ) \
+  f32_to_ui32_r_minMag$(OBJ) \
+  f32_to_ui64_r_minMag$(OBJ) \
+  f32_to_i32_r_minMag$(OBJ) \
+  f32_to_i64_r_minMag$(OBJ) \
+  f32_to_f16$(OBJ) \
+  f32_to_f64$(OBJ) \
+  f32_to_extF80$(OBJ) \
+  f32_to_extF80M$(OBJ) \
+  f32_to_f128$(OBJ) \
+  f32_to_f128M$(OBJ) \
+  f32_roundToInt$(OBJ) \
+  f32_add$(OBJ) \
+  f32_sub$(OBJ) \
+  f32_mul$(OBJ) \
+  f32_mulAdd$(OBJ) \
+  f32_div$(OBJ) \
+  f32_rem$(OBJ) \
+  f32_sqrt$(OBJ) \
+  f32_eq$(OBJ) \
+  f32_le$(OBJ) \
+  f32_lt$(OBJ) \
+  f32_eq_signaling$(OBJ) \
+  f32_le_quiet$(OBJ) \
+  f32_lt_quiet$(OBJ) \
+  f32_isSignalingNaN$(OBJ) \
+  f64_to_ui32$(OBJ) \
+  f64_to_ui64$(OBJ) \
+  f64_to_i32$(OBJ) \
+  f64_to_i64$(OBJ) \
+  f64_to_ui32_r_minMag$(OBJ) \
+  f64_to_ui64_r_minMag$(OBJ) \
+  f64_to_i32_r_minMag$(OBJ) \
+  f64_to_i64_r_minMag$(OBJ) \
+  f64_to_f16$(OBJ) \
+  f64_to_f32$(OBJ) \
+  f64_to_extF80$(OBJ) \
+  f64_to_extF80M$(OBJ) \
+  f64_to_f128$(OBJ) \
+  f64_to_f128M$(OBJ) \
+  f64_roundToInt$(OBJ) \
+  f64_add$(OBJ) \
+  f64_sub$(OBJ) \
+  f64_mul$(OBJ) \
+  f64_mulAdd$(OBJ) \
+  f64_div$(OBJ) \
+  f64_rem$(OBJ) \
+  f64_sqrt$(OBJ) \
+  f64_eq$(OBJ) \
+  f64_le$(OBJ) \
+  f64_lt$(OBJ) \
+  f64_eq_signaling$(OBJ) \
+  f64_le_quiet$(OBJ) \
+  f64_lt_quiet$(OBJ) \
+  f64_isSignalingNaN$(OBJ) \
+  extF80_to_ui32$(OBJ) \
+  extF80_to_ui64$(OBJ) \
+  extF80_to_i32$(OBJ) \
+  extF80_to_i64$(OBJ) \
+  extF80_to_ui32_r_minMag$(OBJ) \
+  extF80_to_ui64_r_minMag$(OBJ) \
+  extF80_to_i32_r_minMag$(OBJ) \
+  extF80_to_i64_r_minMag$(OBJ) \
+  extF80_to_f16$(OBJ) \
+  extF80_to_f32$(OBJ) \
+  extF80_to_f64$(OBJ) \
+  extF80_to_f128$(OBJ) \
+  extF80_roundToInt$(OBJ) \
+  extF80_add$(OBJ) \
+  extF80_sub$(OBJ) \
+  extF80_mul$(OBJ) \
+  extF80_div$(OBJ) \
+  extF80_rem$(OBJ) \
+  extF80_sqrt$(OBJ) \
+  extF80_eq$(OBJ) \
+  extF80_le$(OBJ) \
+  extF80_lt$(OBJ) \
+  extF80_eq_signaling$(OBJ) \
+  extF80_le_quiet$(OBJ) \
+  extF80_lt_quiet$(OBJ) \
+  extF80_isSignalingNaN$(OBJ) \
+  extF80M_to_ui32$(OBJ) \
+  extF80M_to_ui64$(OBJ) \
+  extF80M_to_i32$(OBJ) \
+  extF80M_to_i64$(OBJ) \
+  extF80M_to_ui32_r_minMag$(OBJ) \
+  extF80M_to_ui64_r_minMag$(OBJ) \
+  extF80M_to_i32_r_minMag$(OBJ) \
+  extF80M_to_i64_r_minMag$(OBJ) \
+  extF80M_to_f16$(OBJ) \
+  extF80M_to_f32$(OBJ) \
+  extF80M_to_f64$(OBJ) \
+  extF80M_to_f128M$(OBJ) \
+  extF80M_roundToInt$(OBJ) \
+  extF80M_add$(OBJ) \
+  extF80M_sub$(OBJ) \
+  extF80M_mul$(OBJ) \
+  extF80M_div$(OBJ) \
+  extF80M_rem$(OBJ) \
+  extF80M_sqrt$(OBJ) \
+  extF80M_eq$(OBJ) \
+  extF80M_le$(OBJ) \
+  extF80M_lt$(OBJ) \
+  extF80M_eq_signaling$(OBJ) \
+  extF80M_le_quiet$(OBJ) \
+  extF80M_lt_quiet$(OBJ) \
+  f128_to_ui32$(OBJ) \
+  f128_to_ui64$(OBJ) \
+  f128_to_i32$(OBJ) \
+  f128_to_i64$(OBJ) \
+  f128_to_ui32_r_minMag$(OBJ) \
+  f128_to_ui64_r_minMag$(OBJ) \
+  f128_to_i32_r_minMag$(OBJ) \
+  f128_to_i64_r_minMag$(OBJ) \
+  f128_to_f16$(OBJ) \
+  f128_to_f32$(OBJ) \
+  f128_to_extF80$(OBJ) \
+  f128_to_f64$(OBJ) \
+  f128_roundToInt$(OBJ) \
+  f128_add$(OBJ) \
+  f128_sub$(OBJ) \
+  f128_mul$(OBJ) \
+  f128_mulAdd$(OBJ) \
+  f128_div$(OBJ) \
+  f128_rem$(OBJ) \
+  f128_sqrt$(OBJ) \
+  f128_eq$(OBJ) \
+  f128_le$(OBJ) \
+  f128_lt$(OBJ) \
+  f128_eq_signaling$(OBJ) \
+  f128_le_quiet$(OBJ) \
+  f128_lt_quiet$(OBJ) \
+  f128_isSignalingNaN$(OBJ) \
+  f128M_to_ui32$(OBJ) \
+  f128M_to_ui64$(OBJ) \
+  f128M_to_i32$(OBJ) \
+  f128M_to_i64$(OBJ) \
+  f128M_to_ui32_r_minMag$(OBJ) \
+  f128M_to_ui64_r_minMag$(OBJ) \
+  f128M_to_i32_r_minMag$(OBJ) \
+  f128M_to_i64_r_minMag$(OBJ) \
+  f128M_to_f16$(OBJ) \
+  f128M_to_f32$(OBJ) \
+  f128M_to_extF80M$(OBJ) \
+  f128M_to_f64$(OBJ) \
+  f128M_roundToInt$(OBJ) \
+  f128M_add$(OBJ) \
+  f128M_sub$(OBJ) \
+  f128M_mul$(OBJ) \
+  f128M_mulAdd$(OBJ) \
+  f128M_div$(OBJ) \
+  f128M_rem$(OBJ) \
+  f128M_sqrt$(OBJ) \
+  f128M_eq$(OBJ) \
+  f128M_le$(OBJ) \
+  f128M_lt$(OBJ) \
+  f128M_eq_signaling$(OBJ) \
+  f128M_le_quiet$(OBJ) \
+  f128M_lt_quiet$(OBJ) \
+
+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)
+
+$(OBJS_ALL): \
+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \
+  $(SOURCE_DIR)/include/primitives.h
+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \
+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \
+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \
+  $(SOURCE_DIR)/include/softfloat.h
+
+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c
+	$(COMPILE_C) $(SOURCE_DIR)/$*.c
+
+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c
+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c
+
+softfloat$(LIB): $(OBJS_ALL)
+	$(DELETE) $@
+	$(MAKELIB) $^
+
+.PHONY: clean
+clean:
+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)
+
diff --git a/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/platform.h b/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/platform.h
new file mode 100644
index 0000000..03dd429
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-RISCV-GCC/platform.h
@@ -0,0 +1,48 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3a, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define LITTLEENDIAN 1
+
+#define INLINE_LEVEL 5
+#define SOFTFLOAT_FAST_INT64
+#define SOFTFLOAT_FAST_DIV64TO32
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define INLINE static inline
+
diff --git a/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/Makefile b/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/Makefile
new file mode 100644
index 0000000..5703378
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/Makefile
@@ -0,0 +1,390 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086-SSE

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration -DSOFTFLOAT_FAST_INT64 \

+    $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_eq128$(OBJ) \

+  s_le128$(OBJ) \

+  s_lt128$(OBJ) \

+  s_shortShiftLeft128$(OBJ) \

+  s_shortShiftRight128$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJam64Extra$(OBJ) \

+  s_shortShiftRightJam128$(OBJ) \

+  s_shortShiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJam64Extra$(OBJ) \

+  s_shiftRightJam128$(OBJ) \

+  s_shiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam256M$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_add128$(OBJ) \

+  s_add256M$(OBJ) \

+  s_sub128$(OBJ) \

+  s_sub256M$(OBJ) \

+  s_mul64ByShifted32To128$(OBJ) \

+  s_mul64To128$(OBJ) \

+  s_mul128By32$(OBJ) \

+  s_mul128To256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80UIToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80UI$(OBJ) \

+  s_propagateNaNExtF80UI$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128UIToCommonNaN$(OBJ) \

+  s_commonNaNToF128UI$(OBJ) \

+  s_propagateNaNF128UI$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_normSubnormalExtF80Sig$(OBJ) \

+  s_roundPackToExtF80$(OBJ) \

+  s_normRoundPackToExtF80$(OBJ) \

+  s_addMagsExtF80$(OBJ) \

+  s_subMagsExtF80$(OBJ) \

+  s_normSubnormalF128Sig$(OBJ) \

+  s_roundPackToF128$(OBJ) \

+  s_normRoundPackToF128$(OBJ) \

+  s_addMagsF128$(OBJ) \

+  s_subMagsF128$(OBJ) \

+  s_mulAddF128$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80_to_ui32$(OBJ) \

+  extF80_to_ui64$(OBJ) \

+  extF80_to_i32$(OBJ) \

+  extF80_to_i64$(OBJ) \

+  extF80_to_ui32_r_minMag$(OBJ) \

+  extF80_to_ui64_r_minMag$(OBJ) \

+  extF80_to_i32_r_minMag$(OBJ) \

+  extF80_to_i64_r_minMag$(OBJ) \

+  extF80_to_f16$(OBJ) \

+  extF80_to_f32$(OBJ) \

+  extF80_to_f64$(OBJ) \

+  extF80_to_f128$(OBJ) \

+  extF80_roundToInt$(OBJ) \

+  extF80_add$(OBJ) \

+  extF80_sub$(OBJ) \

+  extF80_mul$(OBJ) \

+  extF80_div$(OBJ) \

+  extF80_rem$(OBJ) \

+  extF80_sqrt$(OBJ) \

+  extF80_eq$(OBJ) \

+  extF80_le$(OBJ) \

+  extF80_lt$(OBJ) \

+  extF80_eq_signaling$(OBJ) \

+  extF80_le_quiet$(OBJ) \

+  extF80_lt_quiet$(OBJ) \

+  extF80_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128_to_ui32$(OBJ) \

+  f128_to_ui64$(OBJ) \

+  f128_to_i32$(OBJ) \

+  f128_to_i64$(OBJ) \

+  f128_to_ui32_r_minMag$(OBJ) \

+  f128_to_ui64_r_minMag$(OBJ) \

+  f128_to_i32_r_minMag$(OBJ) \

+  f128_to_i64_r_minMag$(OBJ) \

+  f128_to_f16$(OBJ) \

+  f128_to_f32$(OBJ) \

+  f128_to_extF80$(OBJ) \

+  f128_to_f64$(OBJ) \

+  f128_roundToInt$(OBJ) \

+  f128_add$(OBJ) \

+  f128_sub$(OBJ) \

+  f128_mul$(OBJ) \

+  f128_mulAdd$(OBJ) \

+  f128_div$(OBJ) \

+  f128_rem$(OBJ) \

+  f128_sqrt$(OBJ) \

+  f128_eq$(OBJ) \

+  f128_le$(OBJ) \

+  f128_lt$(OBJ) \

+  f128_eq_signaling$(OBJ) \

+  f128_le_quiet$(OBJ) \

+  f128_lt_quiet$(OBJ) \

+  f128_isSignalingNaN$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/platform.h b/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/platform.h
new file mode 100644
index 0000000..2fccb6c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Linux-x86_64-GCC/platform.h
@@ -0,0 +1,54 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#define SOFTFLOAT_INTRINSIC_INT128 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Win32-MinGW/Makefile b/c_emulator/SoftFloat-3e/build/Win32-MinGW/Makefile
new file mode 100644
index 0000000..4181600
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win32-MinGW/Makefile
@@ -0,0 +1,325 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \

+    $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Win32-MinGW/platform.h b/c_emulator/SoftFloat-3e/build/Win32-MinGW/platform.h
new file mode 100644
index 0000000..420aa4e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win32-MinGW/platform.h
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/Makefile b/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/Makefile
new file mode 100644
index 0000000..1cf6f5e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/Makefile
@@ -0,0 +1,325 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086-SSE

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  gcc -c -Werror-implicit-function-declaration $(SOFTFLOAT_OPTS) \

+    $(C_INCLUDES) -O2 -o $@

+MAKELIB = ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/platform.h b/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/platform.h
new file mode 100644
index 0000000..420aa4e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win32-SSE2-MinGW/platform.h
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/Makefile b/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/Makefile
new file mode 100644
index 0000000..05bbf5b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/Makefile
@@ -0,0 +1,390 @@
+

+#=============================================================================

+#

+# This Makefile is part of the SoftFloat IEEE Floating-Point Arithmetic

+# Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+SOURCE_DIR ?= ../../source

+SPECIALIZE_TYPE ?= 8086-SSE

+

+SOFTFLOAT_OPTS ?= \

+  -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+  -DSOFTFLOAT_FAST_DIV64TO32

+

+DELETE = rm -f

+C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+COMPILE_C = \

+  x86_64-w64-mingw32-gcc -c -Werror-implicit-function-declaration \

+    -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@

+MAKELIB = x86_64-w64-mingw32-ar crs $@

+

+OBJ = .o

+LIB = .a

+

+OTHER_HEADERS = $(SOURCE_DIR)/include/opts-GCC.h

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_eq128$(OBJ) \

+  s_le128$(OBJ) \

+  s_lt128$(OBJ) \

+  s_shortShiftLeft128$(OBJ) \

+  s_shortShiftRight128$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJam64Extra$(OBJ) \

+  s_shortShiftRightJam128$(OBJ) \

+  s_shortShiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJam64Extra$(OBJ) \

+  s_shiftRightJam128$(OBJ) \

+  s_shiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam256M$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_add128$(OBJ) \

+  s_add256M$(OBJ) \

+  s_sub128$(OBJ) \

+  s_sub256M$(OBJ) \

+  s_mul64ByShifted32To128$(OBJ) \

+  s_mul64To128$(OBJ) \

+  s_mul128By32$(OBJ) \

+  s_mul128To256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80UIToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80UI$(OBJ) \

+  s_propagateNaNExtF80UI$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128UIToCommonNaN$(OBJ) \

+  s_commonNaNToF128UI$(OBJ) \

+  s_propagateNaNF128UI$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_normSubnormalExtF80Sig$(OBJ) \

+  s_roundPackToExtF80$(OBJ) \

+  s_normRoundPackToExtF80$(OBJ) \

+  s_addMagsExtF80$(OBJ) \

+  s_subMagsExtF80$(OBJ) \

+  s_normSubnormalF128Sig$(OBJ) \

+  s_roundPackToF128$(OBJ) \

+  s_normRoundPackToF128$(OBJ) \

+  s_addMagsF128$(OBJ) \

+  s_subMagsF128$(OBJ) \

+  s_mulAddF128$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80_to_ui32$(OBJ) \

+  extF80_to_ui64$(OBJ) \

+  extF80_to_i32$(OBJ) \

+  extF80_to_i64$(OBJ) \

+  extF80_to_ui32_r_minMag$(OBJ) \

+  extF80_to_ui64_r_minMag$(OBJ) \

+  extF80_to_i32_r_minMag$(OBJ) \

+  extF80_to_i64_r_minMag$(OBJ) \

+  extF80_to_f16$(OBJ) \

+  extF80_to_f32$(OBJ) \

+  extF80_to_f64$(OBJ) \

+  extF80_to_f128$(OBJ) \

+  extF80_roundToInt$(OBJ) \

+  extF80_add$(OBJ) \

+  extF80_sub$(OBJ) \

+  extF80_mul$(OBJ) \

+  extF80_div$(OBJ) \

+  extF80_rem$(OBJ) \

+  extF80_sqrt$(OBJ) \

+  extF80_eq$(OBJ) \

+  extF80_le$(OBJ) \

+  extF80_lt$(OBJ) \

+  extF80_eq_signaling$(OBJ) \

+  extF80_le_quiet$(OBJ) \

+  extF80_lt_quiet$(OBJ) \

+  extF80_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128_to_ui32$(OBJ) \

+  f128_to_ui64$(OBJ) \

+  f128_to_i32$(OBJ) \

+  f128_to_i64$(OBJ) \

+  f128_to_ui32_r_minMag$(OBJ) \

+  f128_to_ui64_r_minMag$(OBJ) \

+  f128_to_i32_r_minMag$(OBJ) \

+  f128_to_i64_r_minMag$(OBJ) \

+  f128_to_f16$(OBJ) \

+  f128_to_f32$(OBJ) \

+  f128_to_extF80$(OBJ) \

+  f128_to_f64$(OBJ) \

+  f128_roundToInt$(OBJ) \

+  f128_add$(OBJ) \

+  f128_sub$(OBJ) \

+  f128_mul$(OBJ) \

+  f128_mulAdd$(OBJ) \

+  f128_div$(OBJ) \

+  f128_rem$(OBJ) \

+  f128_sqrt$(OBJ) \

+  f128_eq$(OBJ) \

+  f128_le$(OBJ) \

+  f128_lt$(OBJ) \

+  f128_eq_signaling$(OBJ) \

+  f128_le_quiet$(OBJ) \

+  f128_lt_quiet$(OBJ) \

+  f128_isSignalingNaN$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/platform.h b/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/platform.h
new file mode 100644
index 0000000..2fccb6c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/Win64-MinGW-w64/platform.h
@@ -0,0 +1,54 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#ifdef __GNUC_STDC_INLINE__

+#define INLINE inline

+#else

+#define INLINE extern inline

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define SOFTFLOAT_BUILTIN_CLZ 1

+#define SOFTFLOAT_INTRINSIC_INT128 1

+#include "opts-GCC.h"

+

diff --git a/c_emulator/SoftFloat-3e/build/template-FAST_INT64/Makefile b/c_emulator/SoftFloat-3e/build/template-FAST_INT64/Makefile
new file mode 100644
index 0000000..c5005e6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/template-FAST_INT64/Makefile
@@ -0,0 +1,391 @@
+

+#=============================================================================

+#

+# This Makefile template is part of the SoftFloat IEEE Floating-Point

+# Arithmetic Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+# Edit lines marked with `==>'.  See "SoftFloat-source.html".

+

+==> SOURCE_DIR ?= ../../source

+==> SPECIALIZE_TYPE ?= 8086

+

+==> SOFTFLOAT_OPTS ?= \

+==>   -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+==>   -DSOFTFLOAT_FAST_DIV64TO32

+

+==> DELETE = rm -f

+==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+==> COMPILE_C = \

+==>   cc -c -DSOFTFLOAT_FAST_INT64 $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@

+==> MAKELIB = ar crs $@

+

+==> OBJ = .o

+==> LIB = .a

+

+==> OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_eq128$(OBJ) \

+  s_le128$(OBJ) \

+  s_lt128$(OBJ) \

+  s_shortShiftLeft128$(OBJ) \

+  s_shortShiftRight128$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJam64Extra$(OBJ) \

+  s_shortShiftRightJam128$(OBJ) \

+  s_shortShiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJam64Extra$(OBJ) \

+  s_shiftRightJam128$(OBJ) \

+  s_shiftRightJam128Extra$(OBJ) \

+  s_shiftRightJam256M$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_add128$(OBJ) \

+  s_add256M$(OBJ) \

+  s_sub128$(OBJ) \

+  s_sub256M$(OBJ) \

+  s_mul64ByShifted32To128$(OBJ) \

+  s_mul64To128$(OBJ) \

+  s_mul128By32$(OBJ) \

+  s_mul128To256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80UIToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80UI$(OBJ) \

+  s_propagateNaNExtF80UI$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128UIToCommonNaN$(OBJ) \

+  s_commonNaNToF128UI$(OBJ) \

+  s_propagateNaNF128UI$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_normSubnormalExtF80Sig$(OBJ) \

+  s_roundPackToExtF80$(OBJ) \

+  s_normRoundPackToExtF80$(OBJ) \

+  s_addMagsExtF80$(OBJ) \

+  s_subMagsExtF80$(OBJ) \

+  s_normSubnormalF128Sig$(OBJ) \

+  s_roundPackToF128$(OBJ) \

+  s_normRoundPackToF128$(OBJ) \

+  s_addMagsF128$(OBJ) \

+  s_subMagsF128$(OBJ) \

+  s_mulAddF128$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80_to_ui32$(OBJ) \

+  extF80_to_ui64$(OBJ) \

+  extF80_to_i32$(OBJ) \

+  extF80_to_i64$(OBJ) \

+  extF80_to_ui32_r_minMag$(OBJ) \

+  extF80_to_ui64_r_minMag$(OBJ) \

+  extF80_to_i32_r_minMag$(OBJ) \

+  extF80_to_i64_r_minMag$(OBJ) \

+  extF80_to_f16$(OBJ) \

+  extF80_to_f32$(OBJ) \

+  extF80_to_f64$(OBJ) \

+  extF80_to_f128$(OBJ) \

+  extF80_roundToInt$(OBJ) \

+  extF80_add$(OBJ) \

+  extF80_sub$(OBJ) \

+  extF80_mul$(OBJ) \

+  extF80_div$(OBJ) \

+  extF80_rem$(OBJ) \

+  extF80_sqrt$(OBJ) \

+  extF80_eq$(OBJ) \

+  extF80_le$(OBJ) \

+  extF80_lt$(OBJ) \

+  extF80_eq_signaling$(OBJ) \

+  extF80_le_quiet$(OBJ) \

+  extF80_lt_quiet$(OBJ) \

+  extF80_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128_to_ui32$(OBJ) \

+  f128_to_ui64$(OBJ) \

+  f128_to_i32$(OBJ) \

+  f128_to_i64$(OBJ) \

+  f128_to_ui32_r_minMag$(OBJ) \

+  f128_to_ui64_r_minMag$(OBJ) \

+  f128_to_i32_r_minMag$(OBJ) \

+  f128_to_i64_r_minMag$(OBJ) \

+  f128_to_f16$(OBJ) \

+  f128_to_f32$(OBJ) \

+  f128_to_extF80$(OBJ) \

+  f128_to_f64$(OBJ) \

+  f128_roundToInt$(OBJ) \

+  f128_add$(OBJ) \

+  f128_sub$(OBJ) \

+  f128_mul$(OBJ) \

+  f128_mulAdd$(OBJ) \

+  f128_div$(OBJ) \

+  f128_rem$(OBJ) \

+  f128_sqrt$(OBJ) \

+  f128_eq$(OBJ) \

+  f128_le$(OBJ) \

+  f128_lt$(OBJ) \

+  f128_eq_signaling$(OBJ) \

+  f128_le_quiet$(OBJ) \

+  f128_lt_quiet$(OBJ) \

+  f128_isSignalingNaN$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/template-FAST_INT64/platform.h b/c_emulator/SoftFloat-3e/build/template-FAST_INT64/platform.h
new file mode 100644
index 0000000..b63e2a7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/template-FAST_INT64/platform.h
@@ -0,0 +1,50 @@
+

+/*============================================================================

+

+This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+// Edit lines marked with `==>'.  See "SoftFloat-source.html".

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define INLINE inline

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define THREAD_LOCAL _Thread_local

+

diff --git a/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/Makefile b/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/Makefile
new file mode 100644
index 0000000..49fddfd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/Makefile
@@ -0,0 +1,325 @@
+

+#=============================================================================

+#

+# This Makefile template is part of the SoftFloat IEEE Floating-Point

+# Arithmetic Package, Release 3e, by John R. Hauser.

+#

+# Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+# University of California.  All rights reserved.

+#

+# Redistribution and use in source and binary forms, with or without

+# modification, are permitted provided that the following conditions are met:

+#

+#  1. Redistributions of source code must retain the above copyright notice,

+#     this list of conditions, and the following disclaimer.

+#

+#  2. Redistributions in binary form must reproduce the above copyright

+#     notice, this list of conditions, and the following disclaimer in the

+#     documentation and/or other materials provided with the distribution.

+#

+#  3. Neither the name of the University nor the names of its contributors

+#     may be used to endorse or promote products derived from this software

+#     without specific prior written permission.

+#

+# THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+# DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+#

+#=============================================================================

+

+# Edit lines marked with `==>'.  See "SoftFloat-source.html".

+

+==> SOURCE_DIR ?= ../../source

+==> SPECIALIZE_TYPE ?= 8086

+

+==> SOFTFLOAT_OPTS ?= \

+==>   -DSOFTFLOAT_ROUND_ODD -DINLINE_LEVEL=5 -DSOFTFLOAT_FAST_DIV32TO16 \

+==>   -DSOFTFLOAT_FAST_DIV64TO32

+

+==> DELETE = rm -f

+==> C_INCLUDES = -I. -I$(SOURCE_DIR)/$(SPECIALIZE_TYPE) -I$(SOURCE_DIR)/include

+==> COMPILE_C = cc -c $(SOFTFLOAT_OPTS) $(C_INCLUDES) -O2 -o $@

+==> MAKELIB = ar crs $@

+

+==> OBJ = .o

+==> LIB = .a

+

+==> OTHER_HEADERS =

+

+.PHONY: all

+all: softfloat$(LIB)

+

+OBJS_PRIMITIVES = \

+  s_compare96M$(OBJ) \

+  s_compare128M$(OBJ) \

+  s_shortShiftLeft64To96M$(OBJ) \

+  s_shortShiftLeftM$(OBJ) \

+  s_shiftLeftM$(OBJ) \

+  s_shortShiftRightM$(OBJ) \

+  s_shortShiftRightJam64$(OBJ) \

+  s_shortShiftRightJamM$(OBJ) \

+  s_shiftRightJam32$(OBJ) \

+  s_shiftRightJam64$(OBJ) \

+  s_shiftRightJamM$(OBJ) \

+  s_shiftRightM$(OBJ) \

+  s_countLeadingZeros8$(OBJ) \

+  s_countLeadingZeros16$(OBJ) \

+  s_countLeadingZeros32$(OBJ) \

+  s_countLeadingZeros64$(OBJ) \

+  s_addM$(OBJ) \

+  s_addCarryM$(OBJ) \

+  s_addComplCarryM$(OBJ) \

+  s_negXM$(OBJ) \

+  s_sub1XM$(OBJ) \

+  s_subM$(OBJ) \

+  s_mul64To128M$(OBJ) \

+  s_mul128MTo256M$(OBJ) \

+  s_approxRecip_1Ks$(OBJ) \

+  s_approxRecip32_1$(OBJ) \

+  s_approxRecipSqrt_1Ks$(OBJ) \

+  s_approxRecipSqrt32_1$(OBJ) \

+  s_remStepMBy32$(OBJ) \

+

+OBJS_SPECIALIZE = \

+  softfloat_raiseFlags$(OBJ) \

+  s_f16UIToCommonNaN$(OBJ) \

+  s_commonNaNToF16UI$(OBJ) \

+  s_propagateNaNF16UI$(OBJ) \

+  s_f32UIToCommonNaN$(OBJ) \

+  s_commonNaNToF32UI$(OBJ) \

+  s_propagateNaNF32UI$(OBJ) \

+  s_f64UIToCommonNaN$(OBJ) \

+  s_commonNaNToF64UI$(OBJ) \

+  s_propagateNaNF64UI$(OBJ) \

+  extF80M_isSignalingNaN$(OBJ) \

+  s_extF80MToCommonNaN$(OBJ) \

+  s_commonNaNToExtF80M$(OBJ) \

+  s_propagateNaNExtF80M$(OBJ) \

+  f128M_isSignalingNaN$(OBJ) \

+  s_f128MToCommonNaN$(OBJ) \

+  s_commonNaNToF128M$(OBJ) \

+  s_propagateNaNF128M$(OBJ) \

+

+OBJS_OTHERS = \

+  s_roundToUI32$(OBJ) \

+  s_roundMToUI64$(OBJ) \

+  s_roundToI32$(OBJ) \

+  s_roundMToI64$(OBJ) \

+  s_normSubnormalF16Sig$(OBJ) \

+  s_roundPackToF16$(OBJ) \

+  s_normRoundPackToF16$(OBJ) \

+  s_addMagsF16$(OBJ) \

+  s_subMagsF16$(OBJ) \

+  s_mulAddF16$(OBJ) \

+  s_normSubnormalF32Sig$(OBJ) \

+  s_roundPackToF32$(OBJ) \

+  s_normRoundPackToF32$(OBJ) \

+  s_addMagsF32$(OBJ) \

+  s_subMagsF32$(OBJ) \

+  s_mulAddF32$(OBJ) \

+  s_normSubnormalF64Sig$(OBJ) \

+  s_roundPackToF64$(OBJ) \

+  s_normRoundPackToF64$(OBJ) \

+  s_addMagsF64$(OBJ) \

+  s_subMagsF64$(OBJ) \

+  s_mulAddF64$(OBJ) \

+  s_tryPropagateNaNExtF80M$(OBJ) \

+  s_invalidExtF80M$(OBJ) \

+  s_normExtF80SigM$(OBJ) \

+  s_roundPackMToExtF80M$(OBJ) \

+  s_normRoundPackMToExtF80M$(OBJ) \

+  s_addExtF80M$(OBJ) \

+  s_compareNonnormExtF80M$(OBJ) \

+  s_isNaNF128M$(OBJ) \

+  s_tryPropagateNaNF128M$(OBJ) \

+  s_invalidF128M$(OBJ) \

+  s_shiftNormSigF128M$(OBJ) \

+  s_roundPackMToF128M$(OBJ) \

+  s_normRoundPackMToF128M$(OBJ) \

+  s_addF128M$(OBJ) \

+  s_mulAddF128M$(OBJ) \

+  softfloat_state$(OBJ) \

+  ui32_to_f16$(OBJ) \

+  ui32_to_f32$(OBJ) \

+  ui32_to_f64$(OBJ) \

+  ui32_to_extF80M$(OBJ) \

+  ui32_to_f128M$(OBJ) \

+  ui64_to_f16$(OBJ) \

+  ui64_to_f32$(OBJ) \

+  ui64_to_f64$(OBJ) \

+  ui64_to_extF80M$(OBJ) \

+  ui64_to_f128M$(OBJ) \

+  i32_to_f16$(OBJ) \

+  i32_to_f32$(OBJ) \

+  i32_to_f64$(OBJ) \

+  i32_to_extF80M$(OBJ) \

+  i32_to_f128M$(OBJ) \

+  i64_to_f16$(OBJ) \

+  i64_to_f32$(OBJ) \

+  i64_to_f64$(OBJ) \

+  i64_to_extF80M$(OBJ) \

+  i64_to_f128M$(OBJ) \

+  f16_to_ui32$(OBJ) \

+  f16_to_ui64$(OBJ) \

+  f16_to_i32$(OBJ) \

+  f16_to_i64$(OBJ) \

+  f16_to_ui32_r_minMag$(OBJ) \

+  f16_to_ui64_r_minMag$(OBJ) \

+  f16_to_i32_r_minMag$(OBJ) \

+  f16_to_i64_r_minMag$(OBJ) \

+  f16_to_f32$(OBJ) \

+  f16_to_f64$(OBJ) \

+  f16_to_extF80M$(OBJ) \

+  f16_to_f128M$(OBJ) \

+  f16_roundToInt$(OBJ) \

+  f16_add$(OBJ) \

+  f16_sub$(OBJ) \

+  f16_mul$(OBJ) \

+  f16_mulAdd$(OBJ) \

+  f16_div$(OBJ) \

+  f16_rem$(OBJ) \

+  f16_sqrt$(OBJ) \

+  f16_eq$(OBJ) \

+  f16_le$(OBJ) \

+  f16_lt$(OBJ) \

+  f16_eq_signaling$(OBJ) \

+  f16_le_quiet$(OBJ) \

+  f16_lt_quiet$(OBJ) \

+  f16_isSignalingNaN$(OBJ) \

+  f32_to_ui32$(OBJ) \

+  f32_to_ui64$(OBJ) \

+  f32_to_i32$(OBJ) \

+  f32_to_i64$(OBJ) \

+  f32_to_ui32_r_minMag$(OBJ) \

+  f32_to_ui64_r_minMag$(OBJ) \

+  f32_to_i32_r_minMag$(OBJ) \

+  f32_to_i64_r_minMag$(OBJ) \

+  f32_to_f16$(OBJ) \

+  f32_to_f64$(OBJ) \

+  f32_to_extF80M$(OBJ) \

+  f32_to_f128M$(OBJ) \

+  f32_roundToInt$(OBJ) \

+  f32_add$(OBJ) \

+  f32_sub$(OBJ) \

+  f32_mul$(OBJ) \

+  f32_mulAdd$(OBJ) \

+  f32_div$(OBJ) \

+  f32_rem$(OBJ) \

+  f32_sqrt$(OBJ) \

+  f32_eq$(OBJ) \

+  f32_le$(OBJ) \

+  f32_lt$(OBJ) \

+  f32_eq_signaling$(OBJ) \

+  f32_le_quiet$(OBJ) \

+  f32_lt_quiet$(OBJ) \

+  f32_isSignalingNaN$(OBJ) \

+  f64_to_ui32$(OBJ) \

+  f64_to_ui64$(OBJ) \

+  f64_to_i32$(OBJ) \

+  f64_to_i64$(OBJ) \

+  f64_to_ui32_r_minMag$(OBJ) \

+  f64_to_ui64_r_minMag$(OBJ) \

+  f64_to_i32_r_minMag$(OBJ) \

+  f64_to_i64_r_minMag$(OBJ) \

+  f64_to_f16$(OBJ) \

+  f64_to_f32$(OBJ) \

+  f64_to_extF80M$(OBJ) \

+  f64_to_f128M$(OBJ) \

+  f64_roundToInt$(OBJ) \

+  f64_add$(OBJ) \

+  f64_sub$(OBJ) \

+  f64_mul$(OBJ) \

+  f64_mulAdd$(OBJ) \

+  f64_div$(OBJ) \

+  f64_rem$(OBJ) \

+  f64_sqrt$(OBJ) \

+  f64_eq$(OBJ) \

+  f64_le$(OBJ) \

+  f64_lt$(OBJ) \

+  f64_eq_signaling$(OBJ) \

+  f64_le_quiet$(OBJ) \

+  f64_lt_quiet$(OBJ) \

+  f64_isSignalingNaN$(OBJ) \

+  extF80M_to_ui32$(OBJ) \

+  extF80M_to_ui64$(OBJ) \

+  extF80M_to_i32$(OBJ) \

+  extF80M_to_i64$(OBJ) \

+  extF80M_to_ui32_r_minMag$(OBJ) \

+  extF80M_to_ui64_r_minMag$(OBJ) \

+  extF80M_to_i32_r_minMag$(OBJ) \

+  extF80M_to_i64_r_minMag$(OBJ) \

+  extF80M_to_f16$(OBJ) \

+  extF80M_to_f32$(OBJ) \

+  extF80M_to_f64$(OBJ) \

+  extF80M_to_f128M$(OBJ) \

+  extF80M_roundToInt$(OBJ) \

+  extF80M_add$(OBJ) \

+  extF80M_sub$(OBJ) \

+  extF80M_mul$(OBJ) \

+  extF80M_div$(OBJ) \

+  extF80M_rem$(OBJ) \

+  extF80M_sqrt$(OBJ) \

+  extF80M_eq$(OBJ) \

+  extF80M_le$(OBJ) \

+  extF80M_lt$(OBJ) \

+  extF80M_eq_signaling$(OBJ) \

+  extF80M_le_quiet$(OBJ) \

+  extF80M_lt_quiet$(OBJ) \

+  f128M_to_ui32$(OBJ) \

+  f128M_to_ui64$(OBJ) \

+  f128M_to_i32$(OBJ) \

+  f128M_to_i64$(OBJ) \

+  f128M_to_ui32_r_minMag$(OBJ) \

+  f128M_to_ui64_r_minMag$(OBJ) \

+  f128M_to_i32_r_minMag$(OBJ) \

+  f128M_to_i64_r_minMag$(OBJ) \

+  f128M_to_f16$(OBJ) \

+  f128M_to_f32$(OBJ) \

+  f128M_to_f64$(OBJ) \

+  f128M_to_extF80M$(OBJ) \

+  f128M_roundToInt$(OBJ) \

+  f128M_add$(OBJ) \

+  f128M_sub$(OBJ) \

+  f128M_mul$(OBJ) \

+  f128M_mulAdd$(OBJ) \

+  f128M_div$(OBJ) \

+  f128M_rem$(OBJ) \

+  f128M_sqrt$(OBJ) \

+  f128M_eq$(OBJ) \

+  f128M_le$(OBJ) \

+  f128M_lt$(OBJ) \

+  f128M_eq_signaling$(OBJ) \

+  f128M_le_quiet$(OBJ) \

+  f128M_lt_quiet$(OBJ) \

+

+OBJS_ALL = $(OBJS_PRIMITIVES) $(OBJS_SPECIALIZE) $(OBJS_OTHERS)

+

+$(OBJS_ALL): \

+  $(OTHER_HEADERS) platform.h $(SOURCE_DIR)/include/primitiveTypes.h \

+  $(SOURCE_DIR)/include/primitives.h

+$(OBJS_SPECIALIZE) $(OBJS_OTHERS): \

+  $(SOURCE_DIR)/include/softfloat_types.h $(SOURCE_DIR)/include/internals.h \

+  $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/specialize.h \

+  $(SOURCE_DIR)/include/softfloat.h

+

+$(OBJS_PRIMITIVES) $(OBJS_OTHERS): %$(OBJ): $(SOURCE_DIR)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$*.c

+

+$(OBJS_SPECIALIZE): %$(OBJ): $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/%.c

+	$(COMPILE_C) $(SOURCE_DIR)/$(SPECIALIZE_TYPE)/$*.c

+

+softfloat$(LIB): $(OBJS_ALL)

+	$(DELETE) $@

+	$(MAKELIB) $^

+

+.PHONY: clean

+clean:

+	$(DELETE) $(OBJS_ALL) softfloat$(LIB)

+

diff --git a/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/platform.h b/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/platform.h
new file mode 100644
index 0000000..b63e2a7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/build/template-not-FAST_INT64/platform.h
@@ -0,0 +1,50 @@
+

+/*============================================================================

+

+This C header template is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+// Edit lines marked with `==>'.  See "SoftFloat-source.html".

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define LITTLEENDIAN 1

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define INLINE inline

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+==> #define THREAD_LOCAL _Thread_local

+

diff --git a/c_emulator/SoftFloat-3e/doc/SoftFloat-history.html b/c_emulator/SoftFloat-3e/doc/SoftFloat-history.html
new file mode 100644
index 0000000..daa48ca
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/doc/SoftFloat-history.html
@@ -0,0 +1,258 @@
+

+<HTML>

+

+<HEAD>

+<TITLE>Berkeley SoftFloat History</TITLE>

+</HEAD>

+

+<BODY>

+

+<H1>History of Berkeley SoftFloat, to Release 3e</H1>

+

+<P>

+John R. Hauser<BR>

+2018 January 20<BR>

+</P>

+

+

+<H3>Release 3e (2018 January)</H3>

+

+<UL>

+

+<LI>

+Changed the default numeric code for optional rounding mode <CODE>odd</CODE>

+(round to odd, also known as <EM>jamming</EM>) from 5 to 6.

+

+<LI>

+Modified the behavior of rounding mode <CODE>odd</CODE> when rounding to an

+integer value (either conversion to an integer format or a

+&lsquo;<CODE>roundToInt</CODE>&rsquo; function).

+Previously, for those cases only, rounding mode <CODE>odd</CODE> acted the same

+as rounding to minimum magnitude.

+Now all operations are rounded consistently.

+

+<LI>

+Fixed some errors in the specialization code modeling Intel x86 floating-point,

+specifically the integers returned on invalid operations and the propagation of

+NaN payloads in a few rare cases.

+

+<LI>

+Added specialization code modeling ARM floating-point, conforming to VFPv2 or

+later.

+

+<LI>

+Added an example target for ARM processors.

+

+<LI>

+Fixed a minor bug whereby function <CODE>f16_to_ui64</CODE> might return a

+different integer than expected in the case that the floating-point operand is

+negative.

+

+<LI>

+Added example target-specific optimization for GCC, employing GCC instrinsics

+and support for <NOBR>128-bit</NOBR> integer arithmetic.

+

+<LI>

+Made other minor improvements.

+

+</UL>

+

+

+<H3>Release 3d (2017 August)</H3>

+

+<UL>

+

+<LI>

+Fixed bugs in the square root functions for <NOBR>64-bit</NOBR>

+double-precision, <NOBR>80-bit</NOBR> double-extended-precision, and

+<NOBR>128-bit</NOBR> quadruple-precision.

+For <NOBR>64-bit</NOBR> double-precision (<CODE>f64_sqrt</CODE>), the result

+could sometimes be off by <NOBR>1 unit</NOBR> in the last place

+(<NOBR>1 ulp</NOBR>) from what it should be.

+For the larger formats, the square root could be wrong in a large portion of

+the less-significant bits.

+(A bug in <CODE>f128_sqrt</CODE> was first reported by Alexei Sibidanov.)

+

+</UL>

+

+

+<H3>Release 3c (2017 February)</H3>

+

+<UL>

+

+<LI>

+Added optional rounding mode <CODE>odd</CODE> (round to odd, also known as

+<EM>jamming</EM>).

+

+<LI>

+Corrected the documentation concerning non-canonical representations in

+<NOBR>80-bit</NOBR> double-extended-precision.

+

+</UL>

+

+

+<H3>Release 3b (2016 July)</H3>

+

+<UL>

+

+<LI>

+Implemented the common <NOBR>16-bit</NOBR> &ldquo;half-precision&rdquo;

+floating-point format (<CODE>float16_t</CODE>).

+

+<LI>

+Made the integer values returned on invalid conversions to integer formats

+be determined by the port-specific specialization instead of being the same for

+all ports.

+

+<LI>

+Added preprocessor macro <CODE>THREAD_LOCAL</CODE> to allow the floating-point

+state (modes and exception flags) to be made per-thread.

+

+<LI>

+Modified the provided Makefiles to allow some options to be overridden from the

+<CODE>make</CODE> command.

+

+<LI>

+Made other minor improvements.

+

+</UL>

+

+

+<H3>Release 3a (2015 October)</H3>

+

+<UL>

+

+<LI>

+Replaced the license text supplied by the University of California, Berkeley.

+

+</UL>

+

+

+<H3>Release 3 (2015 February)</H3>

+

+<UL>

+

+<LI>

+Complete rewrite, funded by the University of California, Berkeley, and

+consequently having a different use license than earlier releases.

+Major changes included renaming most types and functions, upgrading some

+algorithms, restructuring the source files, and making SoftFloat into a true

+library.

+

+<LI>

+Added functions to convert between floating-point and unsigned integers, both

+<NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> (<CODE>uint32_t</CODE> and

+<CODE>uint64_t</CODE>).

+

+<LI>

+Added functions for fused multiply-add, for all supported floating-point

+formats except <NOBR>80-bit</NOBR> double-extended-precision.

+

+<LI>

+Added support for a fifth rounding mode, <CODE>near_maxMag</CODE> (round to

+nearest, with ties to maximum magnitude, away from zero).

+

+<LI>

+Dropped the <CODE>timesoftfloat</CODE> program (now part of the Berkeley

+TestFloat package).

+

+</UL>

+

+

+<H3>Release 2c (2015 January)</H3>

+

+<UL>

+

+<LI>

+Fixed mistakes affecting some <NOBR>64-bit</NOBR> processors.

+

+<LI>

+Further improved the documentation and the wording for the legal restrictions

+on using SoftFloat releases <NOBR>through 2c</NOBR> (not applicable to

+<NOBR>Release 3</NOBR> or later).

+

+</UL>

+

+

+<H3>Release 2b (2002 May)</H3>

+

+<UL>

+

+<LI>

+Made minor updates to the documentation, including improved wording for the

+legal restrictions on using SoftFloat.

+

+</UL>

+

+

+<H3>Release 2a (1998 December)</H3>

+

+<UL>

+

+<LI>

+Added functions to convert between <NOBR>64-bit</NOBR> integers

+(<CODE>int64</CODE>) and all supported floating-point formats.

+

+<LI>

+Fixed a bug in all <NOBR>64-bit</NOBR>-version square root functions except

+<CODE>float32_sqrt</CODE> that caused the result sometimes to be off by

+<NOBR>1 unit</NOBR> in the last place (<NOBR>1 ulp</NOBR>) from what it should

+be.

+(Bug discovered by Paul Donahue.)

+

+<LI>

+Improved the Makefiles.

+</UL>

+

+

+<H3>Release 2 (1997 June)</H3>

+

+<UL>

+

+<LI>

+Created the <NOBR>64-bit</NOBR> (<CODE>bits64</CODE>) version, adding the

+<CODE>floatx80</CODE> and <CODE>float128</CODE> formats.

+

+<LI>

+Changed the source directory structure, splitting the sources into a

+<CODE>bits32</CODE> and a <CODE>bits64</CODE> version.

+Renamed <CODE>environment.h</CODE> to <CODE>milieu.h</CODE> to avoid confusion

+with environment variables.

+

+<LI>

+Fixed a small error that caused <CODE>float64_round_to_int</CODE> often to

+round the wrong way in nearest/even mode when the operand was between

+2<SUP>20</SUP> and 2<SUP>21</SUP> and halfway between two integers.

+

+</UL>

+

+

+<H3>Release 1a (1996 July)</H3>

+

+<UL>

+

+<LI>

+Corrected a mistake that caused borderline underflow cases not to raise the

+underflow flag when they should have.

+(Problem reported by Doug Priest.)

+

+<LI>

+Added the <CODE>float_detect_tininess</CODE> variable to control whether

+tininess is detected before or after rounding.

+

+</UL>

+

+

+<H3>Release 1 (1996 July)</H3>

+

+<UL>

+

+<LI>

+Original release, based on work done for the International Computer Science

+Institute (ICSI) in Berkeley, California.

+

+</UL>

+

+

+</BODY>

+

diff --git a/c_emulator/SoftFloat-3e/doc/SoftFloat-source.html b/c_emulator/SoftFloat-3e/doc/SoftFloat-source.html
new file mode 100644
index 0000000..d4b85f7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/doc/SoftFloat-source.html
@@ -0,0 +1,686 @@
+

+<HTML>

+

+<HEAD>

+<TITLE>Berkeley SoftFloat Source Documentation</TITLE>

+</HEAD>

+

+<BODY>

+

+<H1>Berkeley SoftFloat Release 3e: Source Documentation</H1>

+

+<P>

+John R. Hauser<BR>

+2018 January 20<BR>

+</P>

+

+

+<H2>Contents</H2>

+

+<BLOCKQUOTE>

+<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0>

+<COL WIDTH=25>

+<COL WIDTH=*>

+<TR><TD COLSPAN=2>1. Introduction</TD></TR>

+<TR><TD COLSPAN=2>2. Limitations</TD></TR>

+<TR><TD COLSPAN=2>3. Acknowledgments and License</TD></TR>

+<TR><TD COLSPAN=2>4. SoftFloat Package Directory Structure</TD></TR>

+<TR><TD COLSPAN=2>5. Issues for Porting SoftFloat to a New Target</TD></TR>

+<TR>

+  <TD></TD>

+  <TD>5.1. Standard Headers <CODE>&lt;stdbool.h&gt;</CODE> and

+    <CODE>&lt;stdint.h&gt;</CODE></TD>

+</TR>

+<TR><TD></TD><TD>5.2. Specializing Floating-Point Behavior</TD></TR>

+<TR><TD></TD><TD>5.3. Macros for Build Options</TD></TR>

+<TR><TD></TD><TD>5.4. Adapting a Template Target Directory</TD></TR>

+<TR>

+  <TD></TD><TD>5.5. Target-Specific Optimization of Primitive Functions</TD>

+</TR>

+<TR><TD COLSPAN=2>6. Testing SoftFloat</TD></TR>

+<TR>

+  <TD COLSPAN=2>7. Providing SoftFloat as a Common Library for Applications</TD>

+</TR>

+<TR><TD COLSPAN=2>8. Contact Information</TD></TR>

+</TABLE>

+</BLOCKQUOTE>

+

+

+<H2>1. Introduction</H2>

+

+<P>

+This document gives information needed for compiling and/or porting Berkeley

+SoftFloat, a library of C functions implementing binary floating-point

+conforming to the IEEE Standard for Floating-Point Arithmetic.

+For basic documentation about SoftFloat refer to

+<A HREF="SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A>.

+</P>

+

+<P>

+The source code for SoftFloat is intended to be relatively machine-independent

+and should be compilable with any ISO-Standard C compiler that also supports

+<NOBR>64-bit</NOBR> integers.

+SoftFloat has been successfully compiled with the GNU C Compiler

+(<CODE>gcc</CODE>) for several platforms.

+</P>

+

+<P>

+<NOBR>Release 3</NOBR> of SoftFloat was a complete rewrite relative to

+<NOBR>Release 2</NOBR> or earlier.

+Changes to the interface of SoftFloat functions are documented in

+<A HREF="SoftFloat.html"><NOBR><CODE>SoftFloat.html</CODE></NOBR></A>.

+The current version of SoftFloat is <NOBR>Release 3e</NOBR>.

+</P>

+

+

+<H2>2. Limitations</H2>

+

+<P>

+SoftFloat assumes the computer has an addressable byte size of either 8 or

+<NOBR>16 bits</NOBR>.

+(Nearly all computers in use today have <NOBR>8-bit</NOBR> bytes.)

+</P>

+

+<P>

+SoftFloat is written in C and is designed to work with other C code.

+The C compiler used must conform at a minimum to the 1989 ANSI standard for the

+C language (same as the 1990 ISO standard) and must in addition support basic

+arithmetic on <NOBR>64-bit</NOBR> integers.

+Earlier releases of SoftFloat included implementations of <NOBR>32-bit</NOBR>

+single-precision and <NOBR>64-bit</NOBR> double-precision floating-point that

+did not require <NOBR>64-bit</NOBR> integers, but this option is not supported

+starting with <NOBR>Release 3</NOBR>.

+Since 1999, ISO standards for C have mandated compiler support for

+<NOBR>64-bit</NOBR> integers.

+A compiler conforming to the 1999 C Standard or later is recommended but not

+strictly required.

+</P>

+

+<P>

+<NOBR>C Standard</NOBR> header files <CODE>&lt;stdbool.h&gt;</CODE> and

+<CODE>&lt;stdint.h&gt;</CODE> are required for defining standard Boolean and

+integer types.

+If these headers are not supplied with the C compiler, minimal substitutes must

+be provided.

+SoftFloat&rsquo;s dependence on these headers is detailed later in

+<NOBR>section 5.1</NOBR>, <I>Standard Headers <CODE>&lt;stdbool.h&gt;</CODE>

+and <CODE>&lt;stdint.h&gt;</CODE></I>.

+</P>

+

+

+<H2>3. Acknowledgments and License</H2>

+

+<P>

+The SoftFloat package was written by me, <NOBR>John R.</NOBR> Hauser.

+<NOBR>Release 3</NOBR> of SoftFloat was a completely new implementation

+supplanting earlier releases.

+The project to create <NOBR>Release 3</NOBR> (now <NOBR>through 3e</NOBR>) was

+done in the employ of the University of California, Berkeley, within the

+Department of Electrical Engineering and Computer Sciences, first for the

+Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab.

+The work was officially overseen by Prof. Krste Asanovic, with funding provided

+by these sources:

+<BLOCKQUOTE>

+<TABLE>

+<COL>

+<COL WIDTH=10>

+<COL>

+<TR>

+<TD VALIGN=TOP><NOBR>Par Lab:</NOBR></TD>

+<TD></TD>

+<TD>

+Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery

+(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia,

+NVIDIA, Oracle, and Samsung.

+</TD>

+</TR>

+<TR>

+<TD VALIGN=TOP><NOBR>ASPIRE Lab:</NOBR></TD>

+<TD></TD>

+<TD>

+DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from

+ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA,

+Oracle, and Samsung.

+</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+The following applies to the whole of SoftFloat <NOBR>Release 3e</NOBR> as well

+as to each source file individually.

+</P>

+

+<P>

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.

+All rights reserved.

+</P>

+

+<P>

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+<OL>

+

+<LI>

+<P>

+Redistributions of source code must retain the above copyright notice, this

+list of conditions, and the following disclaimer.

+</P>

+

+<LI>

+<P>

+Redistributions in binary form must reproduce the above copyright notice, this

+list of conditions, and the following disclaimer in the documentation and/or

+other materials provided with the distribution.

+</P>

+

+<LI>

+<P>

+Neither the name of the University nor the names of its contributors may be

+used to endorse or promote products derived from this software without specific

+prior written permission.

+</P>

+

+</OL>

+</P>

+

+<P>

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS &ldquo;AS IS&rdquo;,

+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.

+IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,

+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE

+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF

+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+</P>

+

+

+<H2>4. SoftFloat Package Directory Structure</H2>

+

+<P>

+Because SoftFloat is targeted to multiple platforms, its source code is

+slightly scattered between target-specific and target-independent directories

+and files.

+The supplied directory structure is as follows:

+<BLOCKQUOTE>

+<PRE>

+doc

+source

+    include

+    8086

+    8086-SSE

+    ARM-VFPv2

+    ARM-VFPv2-defaultNaN

+build

+    template-FAST_INT64

+    template-not-FAST_INT64

+    Linux-386-GCC

+    Linux-386-SSE2-GCC

+    Linux-x86_64-GCC

+    Linux-ARM-VFPv2-GCC

+    Win32-MinGW

+    Win32-SSE2-MinGW

+    Win64-MinGW-w64

+</PRE>

+</BLOCKQUOTE>

+The majority of the SoftFloat sources are provided in the <CODE>source</CODE>

+directory.

+The <CODE>include</CODE> subdirectory contains several header files

+(unsurprisingly), while the other subdirectories of <CODE>source</CODE> contain

+source files that specialize the floating-point behavior to match particular

+processor families:

+<BLOCKQUOTE>

+<DL>

+<DT><CODE>8086</CODE></DT>

+<DD>

+Intel&rsquo;s older, 8087-derived floating-point, extended to all supported

+floating-point types

+</DD>

+<DT><CODE>8086-SSE</CODE></DT>

+<DD>

+Intel&rsquo;s x86 processors with Streaming SIMD Extensions (SSE) and later

+compatible extensions, having 8087 behavior for <NOBR>80-bit</NOBR>

+double-extended-precision (<CODE>extFloat80_t</CODE>) and SSE behavior for

+other floating-point types

+</DD>

+<DT><CODE>ARM-VFPv2</CODE></DT>

+<DD>

+ARM&rsquo;s VFPv2 or later floating-point, with NaN payload propagation

+</DD>

+<DT><CODE>ARM-VFPv2-defaultNaN</CODE></DT>

+<DD>

+ARM&rsquo;s VFPv2 or later floating-point, with the &ldquo;default NaN&rdquo;

+option

+</DD>

+</DL>

+</BLOCKQUOTE>

+If other specializations are attempted, these would be expected to be other

+subdirectories of <CODE>source</CODE> alongside the ones listed above.

+Specialization is covered later, in <NOBR>section 5.2</NOBR>, <I>Specializing

+Floating-Point Behavior</I>.

+</P>

+

+<P>

+The <CODE>build</CODE> directory is intended to contain a subdirectory for each

+target platform for which a build of the SoftFloat library may be created.

+For each build target, the target&rsquo;s subdirectory is where all derived

+object files and the completed SoftFloat library (typically

+<CODE>softfloat.a</CODE> or <CODE>libsoftfloat.a</CODE>) are created.

+The two <CODE>template</CODE> subdirectories are not actual build targets but

+contain sample files for creating new target directories.

+(The meaning of <CODE>FAST_INT64</CODE> will be explained later.)

+</P>

+

+<P>

+Ignoring the <CODE>template</CODE> directories, the supplied target directories

+are intended to follow a naming system of

+<NOBR><CODE>&lt;<I>execution-environment</I>&gt;-&lt;<I>compiler</I>&gt;</CODE></NOBR>.

+For the example targets,

+<NOBR><CODE>&lt;<I>execution-environment</I>&gt;</CODE></NOBR> is

+<NOBR><CODE>Linux-386</CODE></NOBR>, <NOBR><CODE>Linux-386-SSE2</CODE></NOBR>,

+<NOBR><CODE>Linux-x86_64</CODE></NOBR>,

+<NOBR><CODE>Linux-ARM-VFPv2</CODE></NOBR>, <CODE>Win32</CODE>,

+<NOBR><CODE>Win32-SSE2</CODE></NOBR>, or <CODE>Win64</CODE>, and

+<NOBR><CODE>&lt;<I>compiler</I>&gt;</CODE></NOBR> is <CODE>GCC</CODE>,

+<CODE>MinGW</CODE>, or <NOBR><CODE>MinGW-w64</CODE></NOBR>.

+</P>

+

+<P>

+All of the supplied target directories are merely examples that may or may not

+be correct for compiling on any particular system.

+Despite requests, there are currently no plans to include and maintain in the

+SoftFloat package the build files needed for a great many users&rsquo;

+compilation environments, which can span a huge range of operating systems,

+compilers, and other tools.

+</P>

+

+<P>

+As supplied, each target directory contains two files:

+<BLOCKQUOTE>

+<PRE>

+Makefile

+platform.h

+</PRE>

+</BLOCKQUOTE>

+The provided <CODE>Makefile</CODE> is written for GNU <CODE>make</CODE>.

+A build of SoftFloat for the specific target is begun by executing the

+<CODE>make</CODE> command with the target directory as the current directory.

+A completely different build tool can be used if an appropriate

+<CODE>Makefile</CODE> equivalent is created.

+</P>

+

+<P>

+The <CODE>platform.h</CODE> header file exists to provide a location for

+additional C declarations specific to the build target.

+Every C source file of SoftFloat contains a <CODE>#include</CODE> for

+<CODE>platform.h</CODE>.

+In many cases, the contents of <CODE>platform.h</CODE> can be as simple as one

+or two lines of code.

+At the other extreme, to get maximal performance from SoftFloat, it may be

+desirable to include in header <CODE>platform.h</CODE> (directly or via

+<CODE>#include</CODE>) declarations for numerous target-specific optimizations.

+Such possibilities are discussed in the next section, <I>Issues for Porting

+SoftFloat to a New Target</I>.

+If the target&rsquo;s compiler or library has bugs or other shortcomings,

+workarounds for these issues may also be possible with target-specific

+declarations in <CODE>platform.h</CODE>, avoiding the need to modify the main

+SoftFloat sources.

+</P>

+

+

+<H2>5. Issues for Porting SoftFloat to a New Target</H2>

+

+<H3>5.1. Standard Headers <CODE>&lt;stdbool.h&gt;</CODE> and <CODE>&lt;stdint.h&gt;</CODE></H3>

+

+<P>

+The SoftFloat sources make use of standard headers

+<CODE>&lt;stdbool.h&gt;</CODE> and <CODE>&lt;stdint.h&gt;</CODE>, which have

+been part of the ISO C Standard Library since 1999.

+With any recent compiler, these standard headers are likely to be supported,

+even if the compiler does not claim complete conformance to the latest ISO C

+Standard.

+For older or nonstandard compilers, substitutes for

+<CODE>&lt;stdbool.h&gt;</CODE> and <CODE>&lt;stdint.h&gt;</CODE> may need to be

+created.

+SoftFloat depends on these names from <CODE>&lt;stdbool.h&gt;</CODE>:

+<BLOCKQUOTE>

+<PRE>

+bool

+true

+false

+</PRE>

+</BLOCKQUOTE>

+and on these names from <CODE>&lt;stdint.h&gt;</CODE>:

+<BLOCKQUOTE>

+<PRE>

+uint16_t

+uint32_t

+uint64_t

+int32_t

+int64_t

+UINT64_C

+INT64_C

+uint_least8_t

+uint_fast8_t

+uint_fast16_t

+uint_fast32_t

+uint_fast64_t

+int_fast8_t

+int_fast16_t

+int_fast32_t

+int_fast64_t

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+

+<H3>5.2. Specializing Floating-Point Behavior</H3>

+

+<P>

+The IEEE Floating-Point Standard allows for some flexibility in a conforming

+implementation, particularly concerning NaNs.

+The SoftFloat <CODE>source</CODE> directory is supplied with some

+<I>specialization</I> subdirectories containing possible definitions for this

+implementation-specific behavior.

+For example, the <CODE>8086</CODE> and <NOBR><CODE>8086-SSE</CODE></NOBR>

+subdirectories have source files that specialize SoftFloat&rsquo;s behavior to

+match that of Intel&rsquo;s x86 line of processors.

+The files in a specialization subdirectory must determine:

+<UL>

+<LI>

+whether tininess for underflow is detected before or after rounding by default;

+<LI>

+how signaling NaNs are distinguished from quiet NaNs;

+<LI>

+what (if anything) special happens when exceptions are raised;

+<LI>

+the default generated quiet NaNs;

+<LI>

+how NaNs are propagated from function inputs to output; and

+<LI>

+the integer results returned when conversions to integer type raise the

+<I>invalid</I> exception.

+</UL>

+</P>

+

+<P>

+As provided, the build process for a target expects to involve exactly

+<EM>one</EM> specialization directory that defines <EM>all</EM> of these

+implementation-specific details for the target.

+A specialization directory such as <CODE>8086</CODE> is expected to contain a

+header file called <CODE>specialize.h</CODE>, together with whatever other

+source files are needed to complete the specialization.

+</P>

+

+<P>

+A new build target may use an existing specialization, such as the ones

+provided by the <CODE>8086</CODE> and <NOBR><CODE>8086-SSE</CODE></NOBR>

+subdirectories.

+If a build target needs a new specialization, different from any existing ones,

+it is recommended that a new specialization directory be created for this

+purpose.

+The <CODE>specialize.h</CODE> header file from any of the provided

+specialization subdirectories can be used as a model for what definitions are

+needed.

+</P>

+

+

+<H3>5.3. Macros for Build Options</H3>

+

+<P>

+The SoftFloat source files adapt the floating-point implementation according to

+several C preprocessor macros:

+<BLOCKQUOTE>

+<DL>

+<DT><CODE>LITTLEENDIAN</CODE>

+<DD>

+Must be defined for little-endian machines; must not be defined for big-endian

+machines.

+<DT><CODE>INLINE</CODE>

+<DD>

+Specifies the sequence of tokens used to indicate that a C function should be

+inlined.

+If macro <CODE>INLINE_LEVEL</CODE> is defined with a value of 1 or higher, this

+macro must be defined; otherwise, this macro is ignored and need not be

+defined.

+For compilers that conform to the C Standard&rsquo;s rules for inline

+functions, this macro can be defined as the single keyword <CODE>inline</CODE>.

+For other compilers that follow a convention pre-dating the standardization of

+<CODE>inline</CODE>, this macro may need to be defined to <CODE>extern</CODE>

+<CODE>inline</CODE>.

+<DT><CODE>THREAD_LOCAL</CODE>

+<DD>

+Can be defined to a sequence of tokens that, when appearing at the start of a

+variable declaration, indicates to the C compiler that the variable is

+<I>per-thread</I>, meaning that each execution thread gets its own separate

+instance of the variable.

+This macro is used in header <CODE>softfloat.h</CODE> in the declarations of

+variables <CODE>softfloat_roundingMode</CODE>,

+<CODE>softfloat_detectTininess</CODE>, <CODE>extF80_roundingPrecision</CODE>,

+and <CODE>softfloat_exceptionFlags</CODE>.

+If macro <CODE>THREAD_LOCAL</CODE> is left undefined, these variables will

+default to being ordinary global variables.

+Depending on the compiler, possible valid definitions of this macro include

+<CODE>_Thread_local</CODE> and <CODE>__thread</CODE>.

+</DL>

+<DL>

+<DT><CODE>SOFTFLOAT_ROUND_ODD</CODE>

+<DD>

+Can be defined to enable support for optional rounding mode

+<CODE>softfloat_round_odd</CODE>.

+</DL>

+<DL>

+<DT><CODE>INLINE_LEVEL</CODE>

+<DD>

+Can be defined to an integer to determine the degree of inlining requested of

+the compiler.

+Larger numbers request that more inlining be done.

+If this macro is not defined or is defined to a value less <NOBR>than 1</NOBR>

+(zero or negative), no inlining is requested.

+The maximum effective value is no higher <NOBR>than 5</NOBR>.

+Defining this macro to a value greater than 5 is the same as defining it

+<NOBR>to 5</NOBR>.

+<DT><CODE>SOFTFLOAT_FAST_INT64</CODE>

+<DD>

+Can be defined to indicate that the build target&rsquo;s implementation of

+<NOBR>64-bit</NOBR> arithmetic is efficient.

+For newer <NOBR>64-bit</NOBR> processors, this macro should usually be defined.

+For very small microprocessors whose buses and registers are <NOBR>8-bit</NOBR>

+or <NOBR>16-bit</NOBR> in size, this macro should usually not be defined.

+Whether this macro should be defined for a <NOBR>32-bit</NOBR> processor may

+depend on the target machine and the applications that will use SoftFloat.

+<DT><CODE>SOFTFLOAT_FAST_DIV32TO16</CODE>

+<DD>

+Can be defined to indicate that the target&rsquo;s division operator

+<NOBR>in C</NOBR> (written as <CODE>/</CODE>) is reasonably efficient for

+dividing a <NOBR>32-bit</NOBR> unsigned integer by a <NOBR>16-bit</NOBR>

+unsigned integer.

+Setting this macro may affect the performance of function <CODE>f16_div</CODE>.

+<DT><CODE>SOFTFLOAT_FAST_DIV64TO32</CODE>

+<DD>

+Can be defined to indicate that the target&rsquo;s division operator

+<NOBR>in C</NOBR> (written as <CODE>/</CODE>) is reasonably efficient for

+dividing a <NOBR>64-bit</NOBR> unsigned integer by a <NOBR>32-bit</NOBR>

+unsigned integer.

+Setting this macro may affect the performance of division, remainder, and

+square root operations other than <CODE>f16_div</CODE>.

+</DL>

+</BLOCKQUOTE>

+</P>

+

+<P>

+Following the usual custom <NOBR>for C</NOBR>, for most of these macros (all

+except <CODE>INLINE</CODE>, <CODE>THREAD_LOCAL</CODE>, and

+<CODE>INLINE_LEVEL</CODE>), the content of any definition is irrelevant;

+what matters is a macro&rsquo;s effect on <CODE>#ifdef</CODE> directives.

+</P>

+

+<P>

+It is recommended that any definitions of macros <CODE>LITTLEENDIAN</CODE>,

+<CODE>INLINE</CODE>, and <CODE>THREAD_LOCAL</CODE> be made in a build

+target&rsquo;s <CODE>platform.h</CODE> header file, because these macros are

+expected to be determined inflexibly by the target machine and compiler.

+The other five macros select options and control optimization, and thus might

+be better located in the target&rsquo;s Makefile (or its equivalent).

+</P>

+

+

+<H3>5.4. Adapting a Template Target Directory</H3>

+

+<P>

+In the <CODE>build</CODE> directory, two <CODE>template</CODE> subdirectories

+provide models for new target directories.

+Two different templates exist because different functions are needed in the

+SoftFloat library depending on whether macro <CODE>SOFTFLOAT_FAST_INT64</CODE>

+is defined.

+If macro <CODE>SOFTFLOAT_FAST_INT64</CODE> will be defined,

+<NOBR><CODE>template-FAST_INT64</CODE></NOBR> is the template to use;

+otherwise, <NOBR><CODE>template-not-FAST_INT64</CODE></NOBR> is the appropriate

+template.

+A new target directory can be created by copying the correct template directory

+and editing the files inside.

+To avoid confusion, it would be wise to refrain from editing the files within a

+template directory directly.

+</P>

+

+

+<H3>5.5. Target-Specific Optimization of Primitive Functions</H3>

+

+<P>

+Header file <CODE>primitives.h</CODE> (in directory

+<CODE>source/include</CODE>) declares macros and functions for numerous

+underlying arithmetic operations upon which many of SoftFloat&rsquo;s

+floating-point functions are ultimately built.

+The SoftFloat sources include implementations of all of these functions/macros,

+written as standard C code, so a complete and correct SoftFloat library can be

+created using only the supplied code for all functions.

+However, for many targets, SoftFloat&rsquo;s performance can be improved by

+substituting target-specific implementations of some of the functions/macros

+declared in <CODE>primitives.h</CODE>.

+</P>

+

+<P>

+For example, <CODE>primitives.h</CODE> declares a function called

+<CODE>softfloat_countLeadingZeros32</CODE> that takes an unsigned

+<NOBR>32-bit</NOBR> integer as an argument and returns the number of the

+integer&rsquo;s most-significant bits that are zeros.

+While the SoftFloat sources include an implementation of this function written

+in <NOBR>standard C</NOBR>, many processors can perform this same function

+directly in only one or two machine instructions.

+An alternative, target-specific implementation that maps to those instructions

+is likely to be more efficient than the generic C code from the SoftFloat

+package.

+</P>

+

+<P>

+A build target can replace the supplied version of any function or macro of

+<CODE>primitives.h</CODE> by defining a macro with the same name in the

+target&rsquo;s <CODE>platform.h</CODE> header file.

+For this purpose, it may be helpful for <CODE>platform.h</CODE> to

+<CODE>#include</CODE> header file <CODE>primitiveTypes.h</CODE>, which defines

+types used for arguments and results of functions declared in

+<CODE>primitives.h</CODE>.

+When a desired replacement implementation is a function, not a macro, it is

+sufficient for <CODE>platform.h</CODE> to include the line

+<BLOCKQUOTE>

+<PRE>

+#define &lt;<I>function-name</I>&gt; &lt;<I>function-name</I>&gt;

+</PRE>

+</BLOCKQUOTE>

+where <NOBR><CODE>&lt;<I>function-name</I>&gt;</CODE></NOBR> is the name of the

+function.

+This technically defines <NOBR><CODE>&lt;<I>function-name</I>&gt;</CODE></NOBR>

+as a macro, but one that resolves to the same name, which may then be a

+function.

+(A preprocessor that conforms to the C Standard is required to limit recursive

+macro expansion from being applied more than once.)

+</P>

+

+<P>

+The supplied header file <CODE>opts-GCC.h</CODE> (in directory

+<CODE>source/include</CODE>) provides an example of target-specific

+optimization for the GCC compiler.

+Each GCC target example in the <CODE>build</CODE> directory has

+<BLOCKQUOTE>

+<CODE>#include "opts-GCC.h"</CODE>

+</BLOCKQUOTE>

+in its <CODE>platform.h</CODE> header file.

+Before <CODE>opts-GCC.h</CODE> is included, the following macros must be

+defined (or not) to control which features are invoked:

+<BLOCKQUOTE>

+<DL>

+<DT><CODE>SOFTFLOAT_BUILTIN_CLZ</CODE></DT>

+<DD>

+If defined, SoftFloat&rsquo;s internal

+&lsquo;<CODE>countLeadingZeros</CODE>&rsquo; functions use intrinsics

+<CODE>__builtin_clz</CODE> and <CODE>__builtin_clzll</CODE>.

+</DD>

+<DT><CODE>SOFTFLOAT_INTRINSIC_INT128</CODE></DT>

+<DD>

+If defined, SoftFloat makes use of GCC&rsquo;s nonstandard <NOBR>128-bit</NOBR>

+integer type <CODE>__int128</CODE>.

+</DD>

+</DL>

+</BLOCKQUOTE>

+On some machines, these improvements are observed to increase the speeds of

+<CODE>f64_mul</CODE> and <CODE>f128_mul</CODE> by around 20 to 25%, although

+other functions receive less dramatic boosts, or none at all.

+Results can vary greatly across different platforms.

+</P>

+

+

+<H2>6. Testing SoftFloat</H2>

+

+<P>

+SoftFloat can be tested using the <CODE>testsoftfloat</CODE> program by the

+same author.

+This program is part of the Berkeley TestFloat package available at the Web

+page

+<A HREF="http://www.jhauser.us/arithmetic/TestFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/TestFloat.html</CODE></NOBR></A>.

+The TestFloat package also has a program called <CODE>timesoftfloat</CODE> that

+measures the speed of SoftFloat&rsquo;s floating-point functions.

+</P>

+

+

+<H2>7. Providing SoftFloat as a Common Library for Applications</H2>

+

+<P>

+Header file <CODE>softfloat.h</CODE> defines the SoftFloat interface as seen by

+clients.

+If the SoftFloat library will be made a common library for programs on a

+system, the supplied <CODE>softfloat.h</CODE> has a couple of deficiencies for

+this purpose:

+<UL>

+<LI>

+As supplied, <CODE>softfloat.h</CODE> depends on another header,

+<CODE>softfloat_types.h</CODE>, that is not intended for public use but which

+must also be visible to the programmer&rsquo;s compiler.

+<LI>

+More troubling, at the time <CODE>softfloat.h</CODE> is included in a C source

+file, macros <CODE>SOFTFLOAT_FAST_INT64</CODE> and <CODE>THREAD_LOCAL</CODE>

+must be defined, or not defined, consistent with how these macro were defined

+when the SoftFloat library was built.

+</UL>

+In the situation that new programs may regularly <CODE>#include</CODE> header

+file <CODE>softfloat.h</CODE>, it is recommended that a custom, self-contained

+version of this header file be created that eliminates these issues.

+</P>

+

+

+<H2>8. Contact Information</H2>

+

+<P>

+At the time of this writing, the most up-to-date information about SoftFloat

+and the latest release can be found at the Web page

+<A HREF="http://www.jhauser.us/arithmetic/SoftFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/SoftFloat.html</CODE></NOBR></A>.

+</P>

+

+

+</BODY>

+

diff --git a/c_emulator/SoftFloat-3e/doc/SoftFloat.html b/c_emulator/SoftFloat-3e/doc/SoftFloat.html
new file mode 100644
index 0000000..bb41770
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/doc/SoftFloat.html
@@ -0,0 +1,1527 @@
+

+<HTML>

+

+<HEAD>

+<TITLE>Berkeley SoftFloat Library Interface</TITLE>

+</HEAD>

+

+<BODY>

+

+<H1>Berkeley SoftFloat Release 3e: Library Interface</H1>

+

+<P>

+John R. Hauser<BR>

+2018 January 20<BR>

+</P>

+

+

+<H2>Contents</H2>

+

+<BLOCKQUOTE>

+<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0>

+<COL WIDTH=25>

+<COL WIDTH=*>

+<TR><TD COLSPAN=2>1. Introduction</TD></TR>

+<TR><TD COLSPAN=2>2. Limitations</TD></TR>

+<TR><TD COLSPAN=2>3. Acknowledgments and License</TD></TR>

+<TR><TD COLSPAN=2>4. Types and Functions</TD></TR>

+<TR><TD></TD><TD>4.1. Boolean and Integer Types</TD></TR>

+<TR><TD></TD><TD>4.2. Floating-Point Types</TD></TR>

+<TR><TD></TD><TD>4.3. Supported Floating-Point Functions</TD></TR>

+<TR>

+  <TD></TD>

+  <TD>4.4. Non-canonical Representations in <CODE>extFloat80_t</CODE></TD>

+</TR>

+<TR><TD></TD><TD>4.5. Conventions for Passing Arguments and Results</TD></TR>

+<TR><TD COLSPAN=2>5. Reserved Names</TD></TR>

+<TR><TD COLSPAN=2>6. Mode Variables</TD></TR>

+<TR><TD></TD><TD>6.1. Rounding Mode</TD></TR>

+<TR><TD></TD><TD>6.2. Underflow Detection</TD></TR>

+<TR>

+  <TD></TD>

+  <TD>6.3. Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</TD>

+</TR>

+<TR><TD COLSPAN=2>7. Exceptions and Exception Flags</TD></TR>

+<TR><TD COLSPAN=2>8. Function Details</TD></TR>

+<TR><TD></TD><TD>8.1. Conversions from Integer to Floating-Point</TD></TR>

+<TR><TD></TD><TD>8.2. Conversions from Floating-Point to Integer</TD></TR>

+<TR><TD></TD><TD>8.3. Conversions Among Floating-Point Types</TD></TR>

+<TR><TD></TD><TD>8.4. Basic Arithmetic Functions</TD></TR>

+<TR><TD></TD><TD>8.5. Fused Multiply-Add Functions</TD></TR>

+<TR><TD></TD><TD>8.6. Remainder Functions</TD></TR>

+<TR><TD></TD><TD>8.7. Round-to-Integer Functions</TD></TR>

+<TR><TD></TD><TD>8.8. Comparison Functions</TD></TR>

+<TR><TD></TD><TD>8.9. Signaling NaN Test Functions</TD></TR>

+<TR><TD></TD><TD>8.10. Raise-Exception Function</TD></TR>

+<TR><TD COLSPAN=2>9. Changes from SoftFloat <NOBR>Release 2</NOBR></TD></TR>

+<TR><TD></TD><TD>9.1. Name Changes</TD></TR>

+<TR><TD></TD><TD>9.2. Changes to Function Arguments</TD></TR>

+<TR><TD></TD><TD>9.3. Added Capabilities</TD></TR>

+<TR><TD></TD><TD>9.4. Better Compatibility with the C Language</TD></TR>

+<TR><TD></TD><TD>9.5. New Organization as a Library</TD></TR>

+<TR><TD></TD><TD>9.6. Optimization Gains (and Losses)</TD></TR>

+<TR><TD COLSPAN=2>10. Future Directions</TD></TR>

+<TR><TD COLSPAN=2>11. Contact Information</TD></TR>

+</TABLE>

+</BLOCKQUOTE>

+

+

+<H2>1. Introduction</H2>

+

+<P>

+Berkeley SoftFloat is a software implementation of binary floating-point that

+conforms to the IEEE Standard for Floating-Point Arithmetic.

+The current release supports five binary formats:  <NOBR>16-bit</NOBR>

+half-precision, <NOBR>32-bit</NOBR> single-precision, <NOBR>64-bit</NOBR>

+double-precision, <NOBR>80-bit</NOBR> double-extended-precision, and

+<NOBR>128-bit</NOBR> quadruple-precision.

+The following functions are supported for each format:

+<UL>

+<LI>

+addition, subtraction, multiplication, division, and square root;

+<LI>

+fused multiply-add as defined by the IEEE Standard, except for

+<NOBR>80-bit</NOBR> double-extended-precision;

+<LI>

+remainder as defined by the IEEE Standard;

+<LI>

+round to integral value;

+<LI>

+comparisons;

+<LI>

+conversions to/from other supported formats; and

+<LI>

+conversions to/from <NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> integers,

+signed and unsigned.

+</UL>

+All operations required by the original 1985 version of the IEEE Floating-Point

+Standard are implemented, except for conversions to and from decimal.

+</P>

+

+<P>

+This document gives information about the types defined and the routines

+implemented by SoftFloat.

+It does not attempt to define or explain the IEEE Floating-Point Standard.

+Information about the standard is available elsewhere.

+</P>

+

+<P>

+The current version of SoftFloat is <NOBR>Release 3e</NOBR>.

+This release modifies the behavior of the rarely used <I>odd</I> rounding mode

+(<I>round to odd</I>, also known as <I>jamming</I>), and also adds some new

+specialization and optimization examples for those compiling SoftFloat.

+</P>

+

+<P>

+The previous <NOBR>Release 3d</NOBR> fixed bugs that were found in the square

+root functions for the <NOBR>64-bit</NOBR>, <NOBR>80-bit</NOBR>, and

+<NOBR>128-bit</NOBR> floating-point formats.

+(Thanks to Alexei Sibidanov at the University of Victoria for reporting an

+incorrect result.)

+The bugs affected all prior <NOBR>Release-3</NOBR> versions of SoftFloat

+<NOBR>through 3c</NOBR>.

+The flaw in the <NOBR>64-bit</NOBR> floating-point square root function was of

+very minor impact, causing a <NOBR>1-ulp</NOBR> error (<NOBR>1 unit</NOBR> in

+the last place) a few times out of a billion.

+The bugs in the <NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> square root

+functions were more serious.

+Although incorrect results again occurred only a few times out of a billion,

+when they did occur a large portion of the less-significant bits could be

+wrong.

+</P>

+

+<P>

+Among earlier releases, 3b was notable for adding support for the

+<NOBR>16-bit</NOBR> half-precision format.

+For more about the evolution of SoftFloat releases, see

+<A HREF="SoftFloat-history.html"><NOBR><CODE>SoftFloat-history.html</CODE></NOBR></A>.

+</P>

+

+<P>

+The functional interface of SoftFloat <NOBR>Release 3</NOBR> and later differs

+in many details from the releases that came before.

+For specifics of these differences, see <NOBR>section 9</NOBR> below,

+<I>Changes from SoftFloat <NOBR>Release 2</NOBR></I>.

+</P>

+

+

+<H2>2. Limitations</H2>

+

+<P>

+SoftFloat assumes the computer has an addressable byte size of 8 or

+<NOBR>16 bits</NOBR>.

+(Nearly all computers in use today have <NOBR>8-bit</NOBR> bytes.)

+</P>

+

+<P>

+SoftFloat is written in C and is designed to work with other C code.

+The C compiler used must conform at a minimum to the 1989 ANSI standard for the

+C language (same as the 1990 ISO standard) and must in addition support basic

+arithmetic on <NOBR>64-bit</NOBR> integers.

+Earlier releases of SoftFloat included implementations of <NOBR>32-bit</NOBR>

+single-precision and <NOBR>64-bit</NOBR> double-precision floating-point that

+did not require <NOBR>64-bit</NOBR> integers, but this option is not supported

+starting with <NOBR>Release 3</NOBR>.

+Since 1999, ISO standards for C have mandated compiler support for

+<NOBR>64-bit</NOBR> integers.

+A compiler conforming to the 1999 C Standard or later is recommended but not

+strictly required.

+</P>

+

+<P>

+Most operations not required by the original 1985 version of the IEEE

+Floating-Point Standard but added in the 2008 version are not yet supported in

+SoftFloat <NOBR>Release 3e</NOBR>.

+</P>

+

+

+<H2>3. Acknowledgments and License</H2>

+

+<P>

+The SoftFloat package was written by me, <NOBR>John R.</NOBR> Hauser.

+<NOBR>Release 3</NOBR> of SoftFloat was a completely new implementation

+supplanting earlier releases.

+The project to create <NOBR>Release 3</NOBR> (now <NOBR>through 3e</NOBR>) was

+done in the employ of the University of California, Berkeley, within the

+Department of Electrical Engineering and Computer Sciences, first for the

+Parallel Computing Laboratory (Par Lab) and then for the ASPIRE Lab.

+The work was officially overseen by Prof. Krste Asanovic, with funding provided

+by these sources:

+<BLOCKQUOTE>

+<TABLE>

+<COL>

+<COL WIDTH=10>

+<COL>

+<TR>

+<TD VALIGN=TOP><NOBR>Par Lab:</NOBR></TD>

+<TD></TD>

+<TD>

+Microsoft (Award #024263), Intel (Award #024894), and U.C. Discovery

+(Award #DIG07-10227), with additional support from Par Lab affiliates Nokia,

+NVIDIA, Oracle, and Samsung.

+</TD>

+</TR>

+<TR>

+<TD VALIGN=TOP><NOBR>ASPIRE Lab:</NOBR></TD>

+<TD></TD>

+<TD>

+DARPA PERFECT program (Award #HR0011-12-2-0016), with additional support from

+ASPIRE industrial sponsor Intel and ASPIRE affiliates Google, Nokia, NVIDIA,

+Oracle, and Samsung.

+</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+The following applies to the whole of SoftFloat <NOBR>Release 3e</NOBR> as well

+as to each source file individually.

+</P>

+

+<P>

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.

+All rights reserved.

+</P>

+

+<P>

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+<OL>

+

+<LI>

+<P>

+Redistributions of source code must retain the above copyright notice, this

+list of conditions, and the following disclaimer.

+</P>

+

+<LI>

+<P>

+Redistributions in binary form must reproduce the above copyright notice, this

+list of conditions, and the following disclaimer in the documentation and/or

+other materials provided with the distribution.

+</P>

+

+<LI>

+<P>

+Neither the name of the University nor the names of its contributors may be

+used to endorse or promote products derived from this software without specific

+prior written permission.

+</P>

+

+</OL>

+</P>

+

+<P>

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS &ldquo;AS IS&rdquo;,

+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.

+IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,

+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE

+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF

+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+</P>

+

+

+<H2>4. Types and Functions</H2>

+

+<P>

+The types and functions of SoftFloat are declared in header file

+<CODE>softfloat.h</CODE>.

+</P>

+

+<H3>4.1. Boolean and Integer Types</H3>

+

+<P>

+Header file <CODE>softfloat.h</CODE> depends on standard headers

+<CODE>&lt;stdbool.h&gt;</CODE> and <CODE>&lt;stdint.h&gt;</CODE> to define type

+<CODE>bool</CODE> and several integer types.

+These standard headers have been part of the ISO C Standard Library since 1999.

+With any recent compiler, they are likely to be supported, even if the compiler

+does not claim complete conformance to the latest ISO C Standard.

+For older or nonstandard compilers, a port of SoftFloat may have substitutes

+for these headers.

+Header <CODE>softfloat.h</CODE> depends only on the name <CODE>bool</CODE> from

+<CODE>&lt;stdbool.h&gt;</CODE> and on these type names from

+<CODE>&lt;stdint.h&gt;</CODE>:

+<BLOCKQUOTE>

+<PRE>

+uint16_t

+uint32_t

+uint64_t

+int32_t

+int64_t

+uint_fast8_t

+uint_fast32_t

+uint_fast64_t

+int_fast32_t

+int_fast64_t

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+

+<H3>4.2. Floating-Point Types</H3>

+

+<P>

+The <CODE>softfloat.h</CODE> header defines five floating-point types:

+<BLOCKQUOTE>

+<TABLE CELLSPACING=0 CELLPADDING=0>

+<TR>

+<TD><CODE>float16_t</CODE></TD>

+<TD><NOBR>16-bit</NOBR> half-precision binary format</TD>

+</TR>

+<TR>

+<TD><CODE>float32_t</CODE></TD>

+<TD><NOBR>32-bit</NOBR> single-precision binary format</TD>

+</TR>

+<TR>

+<TD><CODE>float64_t</CODE></TD>

+<TD><NOBR>64-bit</NOBR> double-precision binary format</TD>

+</TR>

+<TR>

+<TD><CODE>extFloat80_t&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD><NOBR>80-bit</NOBR> double-extended-precision binary format (old Intel or

+Motorola format)</TD>

+</TR>

+<TR>

+<TD><CODE>float128_t</CODE></TD>

+<TD><NOBR>128-bit</NOBR> quadruple-precision binary format</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+The non-extended types are each exactly the size specified:

+<NOBR>16 bits</NOBR> for <CODE>float16_t</CODE>, <NOBR>32 bits</NOBR> for

+<CODE>float32_t</CODE>, <NOBR>64 bits</NOBR> for <CODE>float64_t</CODE>, and

+<NOBR>128 bits</NOBR> for <CODE>float128_t</CODE>.

+Aside from these size requirements, the definitions of all these types may

+differ for different ports of SoftFloat to specific systems.

+A given port of SoftFloat may or may not define some of the floating-point

+types as aliases for the C standard types <CODE>float</CODE>,

+<CODE>double</CODE>, and <CODE>long</CODE> <CODE>double</CODE>.

+</P>

+

+<P>

+Header file <CODE>softfloat.h</CODE> also defines a structure,

+<CODE>struct</CODE> <CODE>extFloat80M</CODE>, for the representation of

+<NOBR>80-bit</NOBR> double-extended-precision floating-point values in memory.

+This structure is the same size as type <CODE>extFloat80_t</CODE> and contains

+at least these two fields (not necessarily in this order):

+<BLOCKQUOTE>

+<PRE>

+uint16_t signExp;

+uint64_t signif;

+</PRE>

+</BLOCKQUOTE>

+Field <CODE>signExp</CODE> contains the sign and exponent of the floating-point

+value, with the sign in the most significant bit (<NOBR>bit 15</NOBR>) and the

+encoded exponent in the other <NOBR>15 bits</NOBR>.

+Field <CODE>signif</CODE> is the complete <NOBR>64-bit</NOBR> significand of

+the floating-point value.

+(In the usual encoding for <NOBR>80-bit</NOBR> extended floating-point, the

+leading <NOBR>1 bit</NOBR> of normalized numbers is not implicit but is stored

+in the most significant bit of the significand.)

+</P>

+

+<H3>4.3. Supported Floating-Point Functions</H3>

+

+<P>

+SoftFloat implements these arithmetic operations for its floating-point types:

+<UL>

+<LI>

+conversions between any two floating-point formats;

+<LI>

+for each floating-point format, conversions to and from signed and unsigned

+<NOBR>32-bit</NOBR> and <NOBR>64-bit</NOBR> integers;

+<LI>

+for each format, the usual addition, subtraction, multiplication, division, and

+square root operations;

+<LI>

+for each format except <CODE>extFloat80_t</CODE>, the fused multiply-add

+operation defined by the IEEE Standard;

+<LI>

+for each format, the floating-point remainder operation defined by the IEEE

+Standard;

+<LI>

+for each format, a &ldquo;round to integer&rdquo; operation that rounds to the

+nearest integer value in the same format; and

+<LI>

+comparisons between two values in the same floating-point format.

+</UL>

+</P>

+

+<P>

+The following operations required by the 2008 IEEE Floating-Point Standard are

+not supported in SoftFloat <NOBR>Release 3e</NOBR>:

+<UL>

+<LI>

+<B>nextUp</B>, <B>nextDown</B>, <B>minNum</B>, <B>maxNum</B>, <B>minNumMag</B>,

+<B>maxNumMag</B>, <B>scaleB</B>, and <B>logB</B>;

+<LI>

+conversions between floating-point formats and decimal or hexadecimal character

+sequences;

+<LI>

+all &ldquo;quiet-computation&rdquo; operations (<B>copy</B>, <B>negate</B>,

+<B>abs</B>, and <B>copySign</B>, which all involve only simple copying and/or

+manipulation of the floating-point sign bit); and

+<LI>

+all &ldquo;non-computational&rdquo; operations other than <B>isSignaling</B>

+(which is supported).

+</UL>

+</P>

+

+<H3>4.4. Non-canonical Representations in <CODE>extFloat80_t</CODE></H3>

+

+<P>

+Because the <NOBR>80-bit</NOBR> double-extended-precision format,

+<CODE>extFloat80_t</CODE>, stores an explicit leading significand bit, many

+finite floating-point numbers are encodable in this type in multiple equivalent

+forms.

+Of these multiple encodings, there is always a unique one with the least

+encoded exponent value, and this encoding is considered the <I>canonical</I>

+representation of the floating-point number.

+Any other equivalent representations (having a higher encoded exponent value)

+are <I>non-canonical</I>.

+For a value in the subnormal range (including zero), the canonical

+representation always has an encoded exponent of zero and a leading significand

+bit <NOBR>of 0</NOBR>.

+For finite values outside the subnormal range, the canonical representation

+always has an encoded exponent that is nonzero and a leading significand bit

+<NOBR>of 1</NOBR>.

+</P>

+

+<P>

+For an infinity or NaN, the leading significand bit is similarly expected to

+<NOBR>be 1</NOBR>.

+An infinity or NaN with a leading significand bit <NOBR>of 0</NOBR> is again

+considered non-canonical.

+Hence, altogether, to be canonical, a value of type <CODE>extFloat80_t</CODE>

+must have a leading significand bit <NOBR>of 1</NOBR>, unless the value is

+subnormal or zero, in which case the leading significand bit and the encoded

+exponent must both be zero.

+</P>

+

+<P>

+SoftFloat&rsquo;s functions are not guaranteed to operate as expected when

+inputs of type <CODE>extFloat80_t</CODE> are non-canonical.

+Assuming all of a function&rsquo;s <CODE>extFloat80_t</CODE> inputs (if any)

+are canonical, function outputs of type <CODE>extFloat80_t</CODE> will always

+be canonical.

+</P>

+

+<H3>4.5. Conventions for Passing Arguments and Results</H3>

+

+<P>

+Values that are at most <NOBR>64 bits</NOBR> in size (i.e., not the

+<NOBR>80-bit</NOBR> or <NOBR>128-bit</NOBR> floating-point formats) are in all

+cases passed as function arguments by value.

+Likewise, when an output of a function is no more than <NOBR>64 bits</NOBR>, it

+is always returned directly as the function result.

+Thus, for example, the SoftFloat function for adding two <NOBR>64-bit</NOBR>

+floating-point values has this simple signature:

+<BLOCKQUOTE>

+<CODE>float64_t f64_add( float64_t, float64_t );</CODE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+The story is more complex when function inputs and outputs are

+<NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> floating-point.

+For these types, SoftFloat always provides a function that passes these larger

+values into or out of the function indirectly, via pointers.

+For example, for adding two <NOBR>128-bit</NOBR> floating-point values,

+SoftFloat supplies this function:

+<BLOCKQUOTE>

+<CODE>void f128M_add( const float128_t *, const float128_t *, float128_t * );</CODE>

+</BLOCKQUOTE>

+The first two arguments point to the values to be added, and the last argument

+points to the location where the sum will be stored.

+The <CODE>M</CODE> in the name <CODE>f128M_add</CODE> is mnemonic for the fact

+that the <NOBR>128-bit</NOBR> inputs and outputs are &ldquo;in memory&rdquo;,

+pointed to by pointer arguments.

+</P>

+

+<P>

+All ports of SoftFloat implement these <I>pass-by-pointer</I> functions for

+types <CODE>extFloat80_t</CODE> and <CODE>float128_t</CODE>.

+At the same time, SoftFloat ports may also implement alternate versions of

+these same functions that pass <CODE>extFloat80_t</CODE> and

+<CODE>float128_t</CODE> by value, like the smaller formats.

+Thus, besides the function with name <CODE>f128M_add</CODE> shown above, a

+SoftFloat port may also supply an equivalent function with this signature:

+<BLOCKQUOTE>

+<CODE>float128_t f128_add( float128_t, float128_t );</CODE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+As a general rule, on computers where the machine word size is

+<NOBR>32 bits</NOBR> or smaller, only the pass-by-pointer versions of functions

+(e.g., <CODE>f128M_add</CODE>) are provided for types <CODE>extFloat80_t</CODE>

+and <CODE>float128_t</CODE>, because passing such large types directly can have

+significant extra cost.

+On computers where the word size is <NOBR>64 bits</NOBR> or larger, both

+function versions (<CODE>f128M_add</CODE> and <CODE>f128_add</CODE>) are

+provided, because the cost of passing by value is then more reasonable.

+Applications that must be portable accross both classes of computers must use

+the pointer-based functions, as these are always implemented.

+However, if it is known that SoftFloat includes the by-value functions for all

+platforms of interest, programmers can use whichever version they prefer.

+</P>

+

+

+<H2>5. Reserved Names</H2>

+

+<P>

+In addition to the variables and functions documented here, SoftFloat defines

+some symbol names for its own private use.

+These private names always begin with the prefix

+&lsquo;<CODE>softfloat_</CODE>&rsquo;.

+When a program includes header <CODE>softfloat.h</CODE> or links with the

+SoftFloat library, all names with prefix &lsquo;<CODE>softfloat_</CODE>&rsquo;

+are reserved for possible use by SoftFloat.

+Applications that use SoftFloat should not define their own names with this

+prefix, and should reference only such names as are documented.

+</P>

+

+

+<H2>6. Mode Variables</H2>

+

+<P>

+The following global variables control rounding mode, underflow detection, and

+the <NOBR>80-bit</NOBR> extended format&rsquo;s rounding precision:

+<BLOCKQUOTE>

+<CODE>softfloat_roundingMode</CODE><BR>

+<CODE>softfloat_detectTininess</CODE><BR>

+<CODE>extF80_roundingPrecision</CODE>

+</BLOCKQUOTE>

+These mode variables are covered in the next several subsections.

+For some SoftFloat ports, these variables may be <I>per-thread</I> (declared

+<CODE>thread_local</CODE>), meaning that different execution threads have their

+own separate copies of the variables.

+</P>

+

+<H3>6.1. Rounding Mode</H3>

+

+<P>

+All five rounding modes defined by the 2008 IEEE Floating-Point Standard are

+implemented for all operations that require rounding.

+Some ports of SoftFloat may also implement the <I>round-to-odd</I> mode.

+</P>

+

+<P>

+The rounding mode is selected by the global variable

+<BLOCKQUOTE>

+<CODE>uint_fast8_t softfloat_roundingMode;</CODE>

+</BLOCKQUOTE>

+This variable may be set to one of the values

+<BLOCKQUOTE>

+<TABLE CELLSPACING=0 CELLPADDING=0>

+<TR>

+<TD><CODE>softfloat_round_near_even</CODE></TD>

+<TD>round to nearest, with ties to even</TD>

+</TR>

+<TR>

+<TD><CODE>softfloat_round_near_maxMag&nbsp;&nbsp;</CODE></TD>

+<TD>round to nearest, with ties to maximum magnitude (away from zero)</TD>

+</TR>

+<TR>

+<TD><CODE>softfloat_round_minMag</CODE></TD>

+<TD>round to minimum magnitude (toward zero)</TD>

+</TR>

+<TR>

+<TD><CODE>softfloat_round_min</CODE></TD>

+<TD>round to minimum (down)</TD>

+</TR>

+<TR>

+<TD><CODE>softfloat_round_max</CODE></TD>

+<TD>round to maximum (up)</TD>

+</TR>

+<TR>

+<TD><CODE>softfloat_round_odd</CODE></TD>

+<TD>round to odd (jamming), if supported by the SoftFloat port</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+Variable <CODE>softfloat_roundingMode</CODE> is initialized to

+<CODE>softfloat_round_near_even</CODE>.

+</P>

+

+<P>

+When <CODE>softfloat_round_odd</CODE> is the rounding mode for a function that

+rounds to an integer value (either conversion to an integer format or a

+&lsquo;<CODE>roundToInt</CODE>&rsquo; function), if the input is not already an

+integer, the rounded result is the closest <EM>odd</EM> integer.

+For other operations, this rounding mode acts as though the floating-point

+result is first rounded to minimum magnitude, the same as

+<CODE>softfloat_round_minMag</CODE>, and then, if the result is inexact, the

+least-significant bit of the result is set <NOBR>to 1</NOBR>.

+Rounding to odd is also known as <EM>jamming</EM>.

+</P>

+

+<H3>6.2. Underflow Detection</H3>

+

+<P>

+In the terminology of the IEEE Standard, SoftFloat can detect tininess for

+underflow either before or after rounding.

+The choice is made by the global variable

+<BLOCKQUOTE>

+<CODE>uint_fast8_t softfloat_detectTininess;</CODE>

+</BLOCKQUOTE>

+which can be set to either

+<BLOCKQUOTE>

+<CODE>softfloat_tininess_beforeRounding</CODE><BR>

+<CODE>softfloat_tininess_afterRounding</CODE>

+</BLOCKQUOTE>

+Detecting tininess after rounding is usually better because it results in fewer

+spurious underflow signals.

+The other option is provided for compatibility with some systems.

+Like most systems (and as required by the newer 2008 IEEE Standard), SoftFloat

+always detects loss of accuracy for underflow as an inexact result.

+</P>

+

+<H3>6.3. Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</H3>

+

+<P>

+For <CODE>extFloat80_t</CODE> only, the rounding precision of the basic

+arithmetic operations is controlled by the global variable

+<BLOCKQUOTE>

+<CODE>uint_fast8_t extF80_roundingPrecision;</CODE>

+</BLOCKQUOTE>

+The operations affected are:

+<BLOCKQUOTE>

+<CODE>extF80_add</CODE><BR>

+<CODE>extF80_sub</CODE><BR>

+<CODE>extF80_mul</CODE><BR>

+<CODE>extF80_div</CODE><BR>

+<CODE>extF80_sqrt</CODE>

+</BLOCKQUOTE>

+When <CODE>extF80_roundingPrecision</CODE> is set to its default value of 80,

+these operations are rounded to the full precision of the <NOBR>80-bit</NOBR>

+double-extended-precision format, like occurs for other formats.

+Setting <CODE>extF80_roundingPrecision</CODE> to 32 or to 64 causes the

+operations listed to be rounded to <NOBR>32-bit</NOBR> precision (equivalent to

+<CODE>float32_t</CODE>) or to <NOBR>64-bit</NOBR> precision (equivalent to

+<CODE>float64_t</CODE>), respectively.

+When rounding to reduced precision, additional bits in the result significand

+beyond the rounding point are set to zero.

+The consequences of setting <CODE>extF80_roundingPrecision</CODE> to a value

+other than 32, 64, or 80 is not specified.

+Operations other than the ones listed above are not affected by

+<CODE>extF80_roundingPrecision</CODE>.

+</P>

+

+

+<H2>7. Exceptions and Exception Flags</H2>

+

+<P>

+All five exception flags required by the IEEE Floating-Point Standard are

+implemented.

+Each flag is stored as a separate bit in the global variable

+<BLOCKQUOTE>

+<CODE>uint_fast8_t softfloat_exceptionFlags;</CODE>

+</BLOCKQUOTE>

+The positions of the exception flag bits within this variable are determined by

+the bit masks

+<BLOCKQUOTE>

+<CODE>softfloat_flag_inexact</CODE><BR>

+<CODE>softfloat_flag_underflow</CODE><BR>

+<CODE>softfloat_flag_overflow</CODE><BR>

+<CODE>softfloat_flag_infinite</CODE><BR>

+<CODE>softfloat_flag_invalid</CODE>

+</BLOCKQUOTE>

+Variable <CODE>softfloat_exceptionFlags</CODE> is initialized to all zeros,

+meaning no exceptions.

+</P>

+

+<P>

+For some SoftFloat ports, <CODE>softfloat_exceptionFlags</CODE> may be

+<I>per-thread</I> (declared <CODE>thread_local</CODE>), meaning that different

+execution threads have their own separate instances of it.

+</P>

+

+<P>

+An individual exception flag can be cleared with the statement

+<BLOCKQUOTE>

+<CODE>softfloat_exceptionFlags &= ~softfloat_flag_&lt;<I>exception</I>&gt;;</CODE>

+</BLOCKQUOTE>

+where <CODE>&lt;<I>exception</I>&gt;</CODE> is the appropriate name.

+To raise a floating-point exception, function <CODE>softfloat_raiseFlags</CODE>

+should normally be used.

+</P>

+

+<P>

+When SoftFloat detects an exception other than <I>inexact</I>, it calls

+<CODE>softfloat_raiseFlags</CODE>.

+The default version of this function simply raises the corresponding exception

+flags.

+Particular ports of SoftFloat may support alternate behavior, such as exception

+traps, by modifying the default <CODE>softfloat_raiseFlags</CODE>.

+A program may also supply its own <CODE>softfloat_raiseFlags</CODE> function to

+override the one from the SoftFloat library.

+</P>

+

+<P>

+Because inexact results occur frequently under most circumstances (and thus are

+hardly exceptional), SoftFloat does not ordinarily call

+<CODE>softfloat_raiseFlags</CODE> for <I>inexact</I> exceptions.

+It does always raise the <I>inexact</I> exception flag as required.

+</P>

+

+

+<H2>8. Function Details</H2>

+

+<P>

+In this section, <CODE>&lt;<I>float</I>&gt;</CODE> appears in function names as

+a substitute for one of these abbreviations:

+<BLOCKQUOTE>

+<TABLE CELLSPACING=0 CELLPADDING=0>

+<TR>

+<TD><CODE>f16</CODE></TD>

+<TD>indicates <CODE>float16_t</CODE>, passed by value</TD>

+</TR>

+<TR>

+<TD><CODE>f32</CODE></TD>

+<TD>indicates <CODE>float32_t</CODE>, passed by value</TD>

+</TR>

+<TR>

+<TD><CODE>f64</CODE></TD>

+<TD>indicates <CODE>float64_t</CODE>, passed by value</TD>

+</TR>

+<TR>

+<TD><CODE>extF80M&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD>indicates <CODE>extFloat80_t</CODE>, passed indirectly via pointers</TD>

+</TR>

+<TR>

+<TD><CODE>extF80</CODE></TD>

+<TD>indicates <CODE>extFloat80_t</CODE>, passed by value</TD>

+</TR>

+<TR>

+<TD><CODE>f128M</CODE></TD>

+<TD>indicates <CODE>float128_t</CODE>, passed indirectly via pointers</TD>

+</TR>

+<TR>

+<TD><CODE>f128</CODE></TD>

+<TD>indicates <CODE>float128_t</CODE>, passed by value</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+The circumstances under which values of floating-point types

+<CODE>extFloat80_t</CODE> and <CODE>float128_t</CODE> may be passed either by

+value or indirectly via pointers was discussed earlier in

+<NOBR>section 4.5</NOBR>, <I>Conventions for Passing Arguments and Results</I>.

+</P>

+

+<H3>8.1. Conversions from Integer to Floating-Point</H3>

+

+<P>

+All conversions from a <NOBR>32-bit</NOBR> or <NOBR>64-bit</NOBR> integer,

+signed or unsigned, to a floating-point format are supported.

+Functions performing these conversions have these names:

+<BLOCKQUOTE>

+<CODE>ui32_to_&lt;<I>float</I>&gt;</CODE><BR>

+<CODE>ui64_to_&lt;<I>float</I>&gt;</CODE><BR>

+<CODE>i32_to_&lt;<I>float</I>&gt;</CODE><BR>

+<CODE>i64_to_&lt;<I>float</I>&gt;</CODE>

+</BLOCKQUOTE>

+Conversions from <NOBR>32-bit</NOBR> integers to <NOBR>64-bit</NOBR>

+double-precision and larger formats are always exact, and likewise conversions

+from <NOBR>64-bit</NOBR> integers to <NOBR>80-bit</NOBR>

+double-extended-precision and <NOBR>128-bit</NOBR> quadruple-precision are also

+always exact.

+</P>

+

+<P>

+Each conversion function takes one input of the appropriate type and generates

+one output.

+The following illustrates the signatures of these functions in cases when the

+floating-point result is passed either by value or via pointers:

+<BLOCKQUOTE>

+<PRE>

+float64_t i32_to_f64( int32_t <I>a</I> );

+</PRE>

+<PRE>

+void i32_to_f128M( int32_t <I>a</I>, float128_t *<I>destPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<H3>8.2. Conversions from Floating-Point to Integer</H3>

+

+<P>

+Conversions from a floating-point format to a <NOBR>32-bit</NOBR> or

+<NOBR>64-bit</NOBR> integer, signed or unsigned, are supported with these

+functions:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_to_ui32</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_ui64</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_i32</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_i64</CODE>

+</BLOCKQUOTE>

+The functions have signatures as follows, depending on whether the

+floating-point input is passed by value or via pointers:

+<BLOCKQUOTE>

+<PRE>

+int_fast32_t f64_to_i32( float64_t <I>a</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> );

+</PRE>

+<PRE>

+int_fast32_t

+ f128M_to_i32( const float128_t *<I>aPtr</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+The <CODE><I>roundingMode</I></CODE> argument specifies the rounding mode for

+the conversion.

+The variable that usually indicates rounding mode,

+<CODE>softfloat_roundingMode</CODE>, is ignored.

+Argument <CODE><I>exact</I></CODE> determines whether the <I>inexact</I>

+exception flag is raised if the conversion is not exact.

+If <CODE><I>exact</I></CODE> is <CODE>true</CODE>, the <I>inexact</I> flag may

+be raised;

+otherwise, it will not be, even if the conversion is inexact.

+</P>

+

+<P>

+A conversion from floating-point to integer format raises the <I>invalid</I>

+exception if the source value cannot be rounded to a representable integer of

+the desired size (32 or 64 bits).

+In such circumstances, the integer result returned is determined by the

+particular port of SoftFloat, although typically this value will be either the

+maximum or minimum value of the integer format.

+The functions that convert to integer types never raise the floating-point

+<I>overflow</I> exception.

+</P>

+

+<P>

+Because languages such <NOBR>as C</NOBR> require that conversions to integers

+be rounded toward zero, the following functions are provided for improved speed

+and convenience:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_to_ui32_r_minMag</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_ui64_r_minMag</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_i32_r_minMag</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_to_i64_r_minMag</CODE>

+</BLOCKQUOTE>

+These functions round only toward zero (to minimum magnitude).

+The signatures for these functions are the same as above without the redundant

+<CODE><I>roundingMode</I></CODE> argument:

+<BLOCKQUOTE>

+<PRE>

+int_fast32_t f64_to_i32_r_minMag( float64_t <I>a</I>, bool <I>exact</I> );

+</PRE>

+<PRE>

+int_fast32_t f128M_to_i32_r_minMag( const float128_t *<I>aPtr</I>, bool <I>exact</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<H3>8.3. Conversions Among Floating-Point Types</H3>

+

+<P>

+Conversions between floating-point formats are done by functions with these

+names:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_to_&lt;<I>float</I>&gt;</CODE>

+</BLOCKQUOTE>

+All combinations of source and result type are supported where the source and

+result are different formats.

+There are four different styles of signature for these functions, depending on

+whether the input and the output floating-point values are passed by value or

+via pointers:

+<BLOCKQUOTE>

+<PRE>

+float32_t f64_to_f32( float64_t <I>a</I> );

+</PRE>

+<PRE>

+float32_t f128M_to_f32( const float128_t *<I>aPtr</I> );

+</PRE>

+<PRE>

+void f32_to_f128M( float32_t <I>a</I>, float128_t *<I>destPtr</I> );

+</PRE>

+<PRE>

+void extF80M_to_f128M( const extFloat80_t *<I>aPtr</I>, float128_t *<I>destPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+Conversions from a smaller to a larger floating-point format are always exact

+and so require no rounding.

+</P>

+

+<H3>8.4. Basic Arithmetic Functions</H3>

+

+<P>

+The following basic arithmetic functions are provided:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_add</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_sub</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_mul</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_div</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_sqrt</CODE>

+</BLOCKQUOTE>

+Each floating-point operation takes two operands, except for <CODE>sqrt</CODE>

+(square root) which takes only one.

+The operands and result are all of the same floating-point format.

+Signatures for these functions take the following forms:

+<BLOCKQUOTE>

+<PRE>

+float64_t f64_add( float64_t <I>a</I>, float64_t <I>b</I> );

+</PRE>

+<PRE>

+void

+ f128M_add(

+     const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I>, float128_t *<I>destPtr</I> );

+</PRE>

+<PRE>

+float64_t f64_sqrt( float64_t <I>a</I> );

+</PRE>

+<PRE>

+void f128M_sqrt( const float128_t *<I>aPtr</I>, float128_t *<I>destPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+When floating-point values are passed indirectly through pointers, arguments

+<CODE><I>aPtr</I></CODE> and <CODE><I>bPtr</I></CODE> point to the input

+operands, and the last argument, <CODE><I>destPtr</I></CODE>, points to the

+location where the result is stored.

+</P>

+

+<P>

+Rounding of the <NOBR>80-bit</NOBR> double-extended-precision

+(<CODE>extFloat80_t</CODE>) functions is affected by variable

+<CODE>extF80_roundingPrecision</CODE>, as explained earlier in

+<NOBR>section 6.3</NOBR>,

+<I>Rounding Precision for the <NOBR>80-Bit</NOBR> Extended Format</I>.

+</P>

+

+<H3>8.5. Fused Multiply-Add Functions</H3>

+

+<P>

+The 2008 version of the IEEE Floating-Point Standard defines a <I>fused

+multiply-add</I> operation that does a combined multiplication and addition

+with only a single rounding.

+SoftFloat implements fused multiply-add with functions

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_mulAdd</CODE>

+</BLOCKQUOTE>

+Unlike other operations, fused multiple-add is not supported for the

+<NOBR>80-bit</NOBR> double-extended-precision format,

+<CODE>extFloat80_t</CODE>.

+</P>

+

+<P>

+Depending on whether floating-point values are passed by value or via pointers,

+the fused multiply-add functions have signatures of these forms:

+<BLOCKQUOTE>

+<PRE>

+float64_t f64_mulAdd( float64_t <I>a</I>, float64_t <I>b</I>, float64_t <I>c</I> );

+</PRE>

+<PRE>

+void

+ f128M_mulAdd(

+     const float128_t *<I>aPtr</I>,

+     const float128_t *<I>bPtr</I>,

+     const float128_t *<I>cPtr</I>,

+     float128_t *<I>destPtr</I>

+ );

+</PRE>

+</BLOCKQUOTE>

+The functions compute

+<NOBR>(<CODE><I>a</I></CODE> &times; <CODE><I>b</I></CODE>)

+ + <CODE><I>c</I></CODE></NOBR>

+with a single rounding.

+When floating-point values are passed indirectly through pointers, arguments

+<CODE><I>aPtr</I></CODE>, <CODE><I>bPtr</I></CODE>, and

+<CODE><I>cPtr</I></CODE> point to operands <CODE><I>a</I></CODE>,

+<CODE><I>b</I></CODE>, and <CODE><I>c</I></CODE> respectively, and

+<CODE><I>destPtr</I></CODE> points to the location where the result is stored.

+</P>

+

+<P>

+If one of the multiplication operands <CODE><I>a</I></CODE> and

+<CODE><I>b</I></CODE> is infinite and the other is zero, these functions raise

+the invalid exception even if operand <CODE><I>c</I></CODE> is a quiet NaN.

+</P>

+

+<H3>8.6. Remainder Functions</H3>

+

+<P>

+For each format, SoftFloat implements the remainder operation defined by the

+IEEE Floating-Point Standard.

+The remainder functions have names

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_rem</CODE>

+</BLOCKQUOTE>

+Each remainder operation takes two floating-point operands of the same format

+and returns a result in the same format.

+Depending on whether floating-point values are passed by value or via pointers,

+the remainder functions have signatures of these forms:

+<BLOCKQUOTE>

+<PRE>

+float64_t f64_rem( float64_t <I>a</I>, float64_t <I>b</I> );

+</PRE>

+<PRE>

+void

+ f128M_rem(

+     const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I>, float128_t *<I>destPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+When floating-point values are passed indirectly through pointers, arguments

+<CODE><I>aPtr</I></CODE> and <CODE><I>bPtr</I></CODE> point to operands

+<CODE><I>a</I></CODE> and <CODE><I>b</I></CODE> respectively, and

+<CODE><I>destPtr</I></CODE> points to the location where the result is stored.

+</P>

+

+<P>

+The IEEE Standard remainder operation computes the value

+<NOBR><CODE><I>a</I></CODE>

+ &minus; <I>n</I> &times; <CODE><I>b</I></CODE></NOBR>,

+where <I>n</I> is the integer closest to

+<NOBR><CODE><I>a</I></CODE> &divide; <CODE><I>b</I></CODE></NOBR>.

+If <NOBR><CODE><I>a</I></CODE> &divide; <CODE><I>b</I></CODE></NOBR> is exactly

+halfway between two integers, <I>n</I> is the <EM>even</EM> integer closest to

+<NOBR><CODE><I>a</I></CODE> &divide; <CODE><I>b</I></CODE></NOBR>.

+The IEEE Standard&rsquo;s remainder operation is always exact and so requires

+no rounding.

+</P>

+

+<P>

+Depending on the relative magnitudes of the operands, the remainder

+functions can take considerably longer to execute than the other SoftFloat

+functions.

+This is an inherent characteristic of the remainder operation itself and is not

+a flaw in the SoftFloat implementation.

+</P>

+

+<H3>8.7. Round-to-Integer Functions</H3>

+

+<P>

+For each format, SoftFloat implements the round-to-integer operation specified

+by the IEEE Floating-Point Standard.

+These functions are named

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_roundToInt</CODE>

+</BLOCKQUOTE>

+Each round-to-integer operation takes a single floating-point operand.

+This operand is rounded to an integer according to a specified rounding mode,

+and the resulting integer value is returned in the same floating-point format.

+(Note that the result is not an integer type.)

+</P>

+

+<P>

+The signatures of the round-to-integer functions are similar to those for

+conversions to an integer type:

+<BLOCKQUOTE>

+<PRE>

+float64_t f64_roundToInt( float64_t <I>a</I>, uint_fast8_t <I>roundingMode</I>, bool <I>exact</I> );

+</PRE>

+<PRE>

+void

+ f128M_roundToInt(

+     const float128_t *<I>aPtr</I>,

+     uint_fast8_t <I>roundingMode</I>,

+     bool <I>exact</I>,

+     float128_t *<I>destPtr</I>

+ );

+</PRE>

+</BLOCKQUOTE>

+When floating-point values are passed indirectly through pointers,

+<CODE><I>aPtr</I></CODE> points to the input operand and

+<CODE><I>destPtr</I></CODE> points to the location where the result is stored.

+</P>

+

+<P>

+The <CODE><I>roundingMode</I></CODE> argument specifies the rounding mode to

+apply.

+The variable that usually indicates rounding mode,

+<CODE>softfloat_roundingMode</CODE>, is ignored.

+Argument <CODE><I>exact</I></CODE> determines whether the <I>inexact</I>

+exception flag is raised if the conversion is not exact.

+If <CODE><I>exact</I></CODE> is <CODE>true</CODE>, the <I>inexact</I> flag may

+be raised;

+otherwise, it will not be, even if the conversion is inexact.

+</P>

+

+<H3>8.8. Comparison Functions</H3>

+

+<P>

+For each format, the following floating-point comparison functions are

+provided:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_eq</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_le</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_lt</CODE>

+</BLOCKQUOTE>

+Each comparison takes two operands of the same type and returns a Boolean.

+The abbreviation <CODE>eq</CODE> stands for &ldquo;equal&rdquo; (=);

+<CODE>le</CODE> stands for &ldquo;less than or equal&rdquo; (&le;);

+and <CODE>lt</CODE> stands for &ldquo;less than&rdquo; (&lt;).

+Depending on whether the floating-point operands are passed by value or via

+pointers, the comparison functions have signatures of these forms:

+<BLOCKQUOTE>

+<PRE>

+bool f64_eq( float64_t <I>a</I>, float64_t <I>b</I> );

+</PRE>

+<PRE>

+bool f128M_eq( const float128_t *<I>aPtr</I>, const float128_t *<I>bPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+The usual greater-than (&gt;), greater-than-or-equal (&ge;), and not-equal

+(&ne;) comparisons are easily obtained from the functions provided.

+The not-equal function is just the logical complement of the equal function.

+The greater-than-or-equal function is identical to the less-than-or-equal

+function with the arguments in reverse order, and likewise the greater-than

+function is identical to the less-than function with the arguments reversed.

+</P>

+

+<P>

+The IEEE Floating-Point Standard specifies that the less-than-or-equal and

+less-than comparisons by default raise the <I>invalid</I> exception if either

+operand is any kind of NaN.

+Equality comparisons, on the other hand, are defined by default to raise the

+<I>invalid</I> exception only for signaling NaNs, not quiet NaNs.

+For completeness, SoftFloat provides these complementary functions:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_eq_signaling</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_le_quiet</CODE><BR>

+<CODE>&lt;<I>float</I>&gt;_lt_quiet</CODE>

+</BLOCKQUOTE>

+The <CODE>signaling</CODE> equality comparisons are identical to the default

+equality comparisons except that the <I>invalid</I> exception is raised for any

+NaN input, not just for signaling NaNs.

+Similarly, the <CODE>quiet</CODE> comparison functions are identical to their

+default counterparts except that the <I>invalid</I> exception is not raised for

+quiet NaNs.

+</P>

+

+<H3>8.9. Signaling NaN Test Functions</H3>

+

+<P>

+Functions for testing whether a floating-point value is a signaling NaN are

+provided with these names:

+<BLOCKQUOTE>

+<CODE>&lt;<I>float</I>&gt;_isSignalingNaN</CODE>

+</BLOCKQUOTE>

+The functions take one floating-point operand and return a Boolean indicating

+whether the operand is a signaling NaN.

+Accordingly, the functions have the forms

+<BLOCKQUOTE>

+<PRE>

+bool f64_isSignalingNaN( float64_t <I>a</I> );

+</PRE>

+<PRE>

+bool f128M_isSignalingNaN( const float128_t *<I>aPtr</I> );

+</PRE>

+</BLOCKQUOTE>

+</P>

+

+<H3>8.10. Raise-Exception Function</H3>

+

+<P>

+SoftFloat provides a single function for raising floating-point exceptions:

+<BLOCKQUOTE>

+<PRE>

+void softfloat_raiseFlags( uint_fast8_t <I>exceptions</I> );

+</PRE>

+</BLOCKQUOTE>

+The <CODE><I>exceptions</I></CODE> argument is a mask indicating the set of

+exceptions to raise.

+(See earlier section 7, <I>Exceptions and Exception Flags</I>.)

+In addition to setting the specified exception flags in variable

+<CODE>softfloat_exceptionFlags</CODE>, the <CODE>softfloat_raiseFlags</CODE>

+function may cause a trap or abort appropriate for the current system.

+</P>

+

+

+<H2>9. Changes from SoftFloat <NOBR>Release 2</NOBR></H2>

+

+<P>

+Apart from a change in the legal use license, <NOBR>Release 3</NOBR> of

+SoftFloat introduced numerous technical differences compared to earlier

+releases.

+</P>

+

+<H3>9.1. Name Changes</H3>

+

+<P>

+The most obvious and pervasive difference compared to <NOBR>Release 2</NOBR>

+is that the names of most functions and variables have changed, even when the

+behavior has not.

+First, the floating-point types, the mode variables, the exception flags

+variable, the function to raise exceptions, and various associated constants

+have been renamed as follows:

+<BLOCKQUOTE>

+<TABLE>

+<TR>

+<TD>old name, Release 2:</TD>

+<TD>new name, Release 3:</TD>

+</TR>

+<TR>

+<TD><CODE>float32</CODE></TD>

+<TD><CODE>float32_t</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float64</CODE></TD>

+<TD><CODE>float64_t</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>floatx80</CODE></TD>

+<TD><CODE>extFloat80_t</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float128</CODE></TD>

+<TD><CODE>float128_t</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_rounding_mode</CODE></TD>

+<TD><CODE>softfloat_roundingMode</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_round_nearest_even</CODE></TD>

+<TD><CODE>softfloat_round_near_even</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_round_to_zero</CODE></TD>

+<TD><CODE>softfloat_round_minMag</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_round_down</CODE></TD>

+<TD><CODE>softfloat_round_min</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_round_up</CODE></TD>

+<TD><CODE>softfloat_round_max</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_detect_tininess</CODE></TD>

+<TD><CODE>softfloat_detectTininess</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_tininess_before_rounding&nbsp;&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD><CODE>softfloat_tininess_beforeRounding</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_tininess_after_rounding</CODE></TD>

+<TD><CODE>softfloat_tininess_afterRounding</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>floatx80_rounding_precision</CODE></TD>

+<TD><CODE>extF80_roundingPrecision</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_exception_flags</CODE></TD>

+<TD><CODE>softfloat_exceptionFlags</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_flag_inexact</CODE></TD>

+<TD><CODE>softfloat_flag_inexact</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_flag_underflow</CODE></TD>

+<TD><CODE>softfloat_flag_underflow</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_flag_overflow</CODE></TD>

+<TD><CODE>softfloat_flag_overflow</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_flag_divbyzero</CODE></TD>

+<TD><CODE>softfloat_flag_infinite</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_flag_invalid</CODE></TD>

+<TD><CODE>softfloat_flag_invalid</CODE></TD>

+</TR>

+<TR>

+<TD><CODE>float_raise</CODE></TD>

+<TD><CODE>softfloat_raiseFlags</CODE></TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+</P>

+

+<P>

+Furthermore, <NOBR>Release 3</NOBR> adopted the following new abbreviations for

+function names:

+<BLOCKQUOTE>

+<TABLE>

+<TR>

+<TD>used in names in Release 2:<CODE>&nbsp;&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD>used in names in Release 3:</TD>

+</TR>

+<TR> <TD><CODE>int32</CODE></TD>    <TD><CODE>i32</CODE></TD>    </TR>

+<TR> <TD><CODE>int64</CODE></TD>    <TD><CODE>i64</CODE></TD>    </TR>

+<TR> <TD><CODE>float32</CODE></TD>  <TD><CODE>f32</CODE></TD>    </TR>

+<TR> <TD><CODE>float64</CODE></TD>  <TD><CODE>f64</CODE></TD>    </TR>

+<TR> <TD><CODE>floatx80</CODE></TD> <TD><CODE>extF80</CODE></TD> </TR>

+<TR> <TD><CODE>float128</CODE></TD> <TD><CODE>f128</CODE></TD>   </TR>

+</TABLE>

+</BLOCKQUOTE>

+Thus, for example, the function to add two <NOBR>32-bit</NOBR> floating-point

+numbers, previously called <CODE>float32_add</CODE> in <NOBR>Release 2</NOBR>,

+is now <CODE>f32_add</CODE>.

+Lastly, there have been a few other changes to function names:

+<BLOCKQUOTE>

+<TABLE>

+<TR>

+<TD>used in names in Release 2:<CODE>&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD>used in names in Release 3:<CODE>&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD>relevant functions:</TD>

+</TR>

+<TR>

+<TD><CODE>_round_to_zero</CODE></TD>

+<TD><CODE>_r_minMag</CODE></TD>

+<TD>conversions from floating-point to integer (<NOBR>section 8.2</NOBR>)</TD>

+</TR>

+<TR>

+<TD><CODE>round_to_int</CODE></TD>

+<TD><CODE>roundToInt</CODE></TD>

+<TD>round-to-integer functions (<NOBR>section 8.7</NOBR>)</TD>

+</TR>

+<TR>

+<TD><CODE>is_signaling_nan&nbsp;&nbsp;&nbsp;&nbsp;</CODE></TD>

+<TD><CODE>isSignalingNaN</CODE></TD>

+<TD>signaling NaN test functions (<NOBR>section 8.9</NOBR>)</TD>

+</TR>

+</TABLE>

+</BLOCKQUOTE>

+</P>

+

+<H3>9.2. Changes to Function Arguments</H3>

+

+<P>

+Besides simple name changes, some operations were given a different interface

+in <NOBR>Release 3</NOBR> than they had in <NOBR>Release 2</NOBR>:

+<UL>

+

+<LI>

+<P>

+Since <NOBR>Release 3</NOBR>, integer arguments and results of functions have

+standard types from header <CODE>&lt;stdint.h&gt;</CODE>, such as

+<CODE>uint32_t</CODE>, whereas previously their types could be defined

+differently for each port of SoftFloat, usually using traditional C types such

+as <CODE>unsigned</CODE> <CODE>int</CODE>.

+Likewise, functions in <NOBR>Release 3</NOBR> and later pass Booleans as

+standard type <CODE>bool</CODE> from <CODE>&lt;stdbool.h&gt;</CODE>, whereas

+previously these were again passed as a port-specific type (usually

+<CODE>int</CODE>).

+</P>

+

+<LI>

+<P>

+As explained earlier in <NOBR>section 4.5</NOBR>, <I>Conventions for Passing

+Arguments and Results</I>, SoftFloat functions in <NOBR>Release 3</NOBR> and

+later may pass <NOBR>80-bit</NOBR> and <NOBR>128-bit</NOBR> floating-point

+values through pointers, meaning that functions take pointer arguments and then

+read or write floating-point values at the locations indicated by the pointers.

+In <NOBR>Release 2</NOBR>, floating-point arguments and results were always

+passed by value, regardless of their size.

+</P>

+

+<LI>

+<P>

+Functions that round to an integer have additional

+<CODE><I>roundingMode</I></CODE> and <CODE><I>exact</I></CODE> arguments that

+they did not have in <NOBR>Release 2</NOBR>.

+Refer to sections 8.2 <NOBR>and 8.7</NOBR> for descriptions of these functions

+since <NOBR>Release 3</NOBR>.

+For <NOBR>Release 2</NOBR>, the rounding mode, when needed, was taken from the

+same global variable that affects the basic arithmetic operations (now called

+<CODE>softfloat_roundingMode</CODE> but previously known as

+<CODE>float_rounding_mode</CODE>).

+Also, for <NOBR>Release 2</NOBR>, if the original floating-point input was not

+an exact integer value, and if the <I>invalid</I> exception was not raised by

+the function, the <I>inexact</I> exception was always raised.

+<NOBR>Release 2</NOBR> had no option to suppress raising <I>inexact</I> in this

+case.

+Applications using SoftFloat <NOBR>Release 3</NOBR> or later can get the same

+effect as <NOBR>Release 2</NOBR> by passing variable

+<CODE>softfloat_roundingMode</CODE> for argument

+<CODE><I>roundingMode</I></CODE> and <CODE>true</CODE> for argument

+<CODE><I>exact</I></CODE>.

+</P>

+

+</UL>

+</P>

+

+<H3>9.3. Added Capabilities</H3>

+

+<P>

+With <NOBR>Release 3</NOBR>, some new features have been added that were not

+present in <NOBR>Release 2</NOBR>:

+<UL>

+

+<LI>

+<P>

+A port of SoftFloat can now define any of the floating-point types

+<CODE>float32_t</CODE>, <CODE>float64_t</CODE>, <CODE>extFloat80_t</CODE>, and

+<CODE>float128_t</CODE> as aliases for C&rsquo;s standard floating-point types

+<CODE>float</CODE>, <CODE>double</CODE>, and <CODE>long</CODE>

+<CODE>double</CODE>, using either <CODE>#define</CODE> or <CODE>typedef</CODE>.

+This potential convenience was not supported under <NOBR>Release 2</NOBR>.

+</P>

+

+<P>

+(Note, however, that there may be a performance cost to defining

+SoftFloat&rsquo;s floating-point types this way, depending on the platform and

+the applications using SoftFloat.

+Ports of SoftFloat may choose to forgo the convenience in favor of better

+speed.)

+</P>

+

+<P>

+<LI>

+As of <NOBR>Release 3b</NOBR>, <NOBR>16-bit</NOBR> half-precision,

+<CODE>float16_t</CODE>, is supported.

+</P>

+

+<P>

+<LI>

+Functions have been added for converting between the floating-point types and

+unsigned integers.

+<NOBR>Release 2</NOBR> supported only signed integers, not unsigned.

+</P>

+

+<P>

+<LI>

+Fused multiply-add functions have been added for all floating-point formats

+except <NOBR>80-bit</NOBR> double-extended-precision,

+<CODE>extFloat80_t</CODE>.

+</P>

+

+<P>

+<LI>

+New rounding modes are supported:

+<CODE>softfloat_round_near_maxMag</CODE> (round to nearest, with ties to

+maximum magnitude, away from zero), and, as of <NOBR>Release 3c</NOBR>,

+optional <CODE>softfloat_round_odd</CODE> (round to odd, also known as

+jamming).

+</P>

+

+</UL>

+</P>

+

+<H3>9.4. Better Compatibility with the C Language</H3>

+

+<P>

+<NOBR>Release 3</NOBR> of SoftFloat was written to conform better to the ISO C

+Standard&rsquo;s rules for portability.

+For example, older releases of SoftFloat employed type conversions in ways

+that, while commonly practiced, are not fully defined by the C Standard.

+Such problematic type conversions have generally been replaced by the use of

+unions, the behavior around which is more strictly regulated these days.

+</P>

+

+<H3>9.5. New Organization as a Library</H3>

+

+<P>

+Starting with <NOBR>Release 3</NOBR>, SoftFloat now builds as a library.

+Previously, SoftFloat compiled into a single, monolithic object file containing

+all the SoftFloat functions, with the consequence that a program linking with

+SoftFloat would get every SoftFloat function in its binary file even if only a

+few functions were actually used.

+With SoftFloat in the form of a library, a program that is linked by a standard

+linker will include only those functions of SoftFloat that it needs and no

+others.

+</P>

+

+<H3>9.6. Optimization Gains (and Losses)</H3>

+

+<P>

+Individual SoftFloat functions have been variously improved in

+<NOBR>Release 3</NOBR> compared to earlier releases.

+In particular, better, faster algorithms have been deployed for the operations

+of division, square root, and remainder.

+For functions operating on the larger <NOBR>80-bit</NOBR> and

+<NOBR>128-bit</NOBR> formats, <CODE>extFloat80_t</CODE> and

+<CODE>float128_t</CODE>, code size has also generally been reduced.

+</P>

+

+<P>

+However, because <NOBR>Release 2</NOBR> compiled all of SoftFloat together as a

+single object file, compilers could make optimizations across function calls

+when one SoftFloat function calls another.

+Now that the functions of SoftFloat are compiled separately and only afterward

+linked together into a program, there is not usually the same opportunity to

+optimize across function calls.

+Some loss of speed has been observed due to this change.

+</P>

+

+

+<H2>10. Future Directions</H2>

+

+<P>

+The following improvements are anticipated for future releases of SoftFloat:

+<UL>

+<LI>

+more functions from the 2008 version of the IEEE Floating-Point Standard;

+<LI>

+consistent, defined behavior for non-canonical representations of extended

+format <CODE>extFloat80_t</CODE> (discussed in <NOBR>section 4.4</NOBR>,

+<I>Non-canonical Representations in <CODE>extFloat80_t</CODE></I>).

+

+</UL>

+</P>

+

+

+<H2>11. Contact Information</H2>

+

+<P>

+At the time of this writing, the most up-to-date information about SoftFloat

+and the latest release can be found at the Web page

+<A HREF="http://www.jhauser.us/arithmetic/SoftFloat.html"><NOBR><CODE>http://www.jhauser.us/arithmetic/SoftFloat.html</CODE></NOBR></A>.

+</P>

+

+

+</BODY>

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/extF80M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..85ee211
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint64_t uiA0;

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;

+    uiA0 = aSPtr->signif;

+    return

+        ! (uiA0 & UINT64_C( 0x4000000000000000 ))

+            && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/f128M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..79a7077
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool f128M_isSignalingNaN( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;

+    return

+        ((uiA96 & 0x00007FFF) != 0)

+            || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                     | aWPtr[indexWord( 4, 0 )])

+                    != 0);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80M.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..3405b3b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| `zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )

+{

+

+    zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );

+    zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..cb7424f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;

+    uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128M.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128M.c
new file mode 100644
index 0000000..e7ea802
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by `zWPtr'.  Argument

+| `zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )

+{

+

+    softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );

+    zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..7a9423b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );

+    uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF16UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..d4e458a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF32UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..ed6c226
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF64UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..1182be3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )

+{

+

+    return

+        (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )

+            | aPtr->v64>>12;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..00baf35
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by `zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr )

+{

+

+    if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = signExtF80UI64( aSPtr->signExp );

+    zPtr->v64 = aSPtr->signif<<1;

+    zPtr->v0  = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..ab6311e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA64>>15;

+    zPtr->v64  = uiA0<<1;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..55ec25b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by `zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument `aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )

+{

+

+    if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;

+    softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..f838f02
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+    struct uint128 NaNSig;

+

+    if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );

+    zPtr->sign = uiA64>>63;

+    zPtr->v64  = NaNSig.v64;

+    zPtr->v0   = NaNSig.v0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_f16UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..c1e242d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF16UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>15;

+    zPtr->v64  = (uint_fast64_t) uiA<<54;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_f32UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..b21ba66
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF32UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>31;

+    zPtr->v64  = (uint_fast64_t) uiA<<41;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_f64UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..6529d2e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF64UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>63;

+    zPtr->v64  = uiA<<12;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80M.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..ea1d57a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80M.c
@@ -0,0 +1,107 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by `zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ )

+{

+    bool isSigNaNA;

+    const struct extFloat80M *sPtr;

+    bool isSigNaNB;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiMagA64, uiMagB64;

+

+    isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );

+    sPtr = aSPtr;

+    if ( ! bSPtr ) {

+        if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );

+        goto copy;

+    }

+    isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr );

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            uiB64 = bSPtr->signExp;

+            if ( isSigNaNB ) goto returnLargerUIMag;

+            uiB0 = bSPtr->signif;

+            if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB;

+            goto copy;

+        } else {

+            uiA64 = aSPtr->signExp;

+            uiA0 = aSPtr->signif;

+            if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy;

+            goto copyB;

+        }

+    }

+    uiB64 = bSPtr->signExp;

+ returnLargerUIMag:

+    uiA64 = aSPtr->signExp;

+    uiMagA64 = uiA64 & 0x7FFF;

+    uiMagB64 = uiB64 & 0x7FFF;

+    if ( uiMagA64 < uiMagB64 ) goto copyB;

+    if ( uiMagB64 < uiMagA64 ) goto copy;

+    uiA0 = aSPtr->signif;

+    uiB0 = bSPtr->signif;

+    if ( uiA0 < uiB0 ) goto copyB;

+    if ( uiB0 < uiA0 ) goto copy;

+    if ( uiA64 < uiB64 ) goto copy;

+ copyB:

+    sPtr = bSPtr;

+ copy:

+    zSPtr->signExp = sPtr->signExp;

+    zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..cc3f0f4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNExtF80UI.c
@@ -0,0 +1,106 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast64_t uiNonsigA0, uiNonsigB0;

+    uint_fast16_t uiMagA64, uiMagB64;

+    struct uint128 uiZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );

+    isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 );

+    uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB;

+            goto returnA;

+        } else {

+            if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA;

+            goto returnB;

+        }

+    }

+ returnLargerMag:

+    uiMagA64 = uiA64 & 0x7FFF;

+    uiMagB64 = uiB64 & 0x7FFF;

+    if ( uiMagA64 < uiMagB64 ) goto returnB;

+    if ( uiMagB64 < uiMagA64 ) goto returnA;

+    if ( uiA0 < uiB0 ) goto returnB;

+    if ( uiB0 < uiA0 ) goto returnA;

+    if ( uiA64 < uiB64 ) goto returnA;

+ returnB:

+    uiZ.v64 = uiB64;

+    uiZ.v0  = uiNonsigB0;

+    return uiZ;

+ returnA:

+    uiZ.v64 = uiA64;

+    uiZ.v0  = uiNonsigA0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128M.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128M.c
new file mode 100644
index 0000000..aa903bf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128M.c
@@ -0,0 +1,76 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by `zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of `aWPtr', `bWPtr',

+| and `zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )

+{

+    bool isSigNaNA;

+    const uint32_t *ptr;

+

+    ptr = aWPtr;

+    isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );

+    if (

+        isSigNaNA

+            || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) goto copy;

+    }

+    if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr;

+ copy:

+    zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;

+    zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..1c1c2f4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF128UI.c
@@ -0,0 +1,81 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating `uiA64' and

+| `uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating `uiB64' and `uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA;

+    struct uint128 uiZ;

+

+    isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );

+    if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) goto returnNonsigA;

+    }

+    if ( isNaNF128UI( uiA64, uiA0 ) ) {

+ returnNonsigA:

+        uiZ.v64 = uiA64;

+        uiZ.v0  = uiA0;

+    } else {

+        uiZ.v64 = uiB64;

+        uiZ.v0  = uiB0;

+    }

+    uiZ.v64 |= UINT64_C( 0x0000800000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF16UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..4e87ff4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF16UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF16UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) return uiA | 0x0200;

+    }

+    return (isNaNF16UI( uiA ) ? uiA : uiB) | 0x0200;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF32UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..e1a8755
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF32UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF32UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) return uiA | 0x00400000;

+    }

+    return (isNaNF32UI( uiA ) ? uiA : uiB) | 0x00400000;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF64UI.c b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..1af349f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/s_propagateNaNF64UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF64UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) return uiA | UINT64_C( 0x0008000000000000 );

+    }

+    return (isNaNF64UI( uiA ) ? uiA : uiB) | UINT64_C( 0x0008000000000000 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/softfloat_raiseFlags.c b/c_emulator/SoftFloat-3e/source/8086-SSE/softfloat_raiseFlags.c
new file mode 100644
index 0000000..3115306
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Raises the exceptions specified by `flags'.  Floating-point traps can be

+| defined here if desired.  It is currently not possible for such a trap

+| to substitute a result value.  If traps are not implemented, this routine

+| should be simply `softfloat_exceptionFlags |= flags;'.

+*----------------------------------------------------------------------------*/

+void softfloat_raiseFlags( uint_fast8_t flags )

+{

+

+    softfloat_exceptionFlags |= flags;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086-SSE/specialize.h b/c_emulator/SoftFloat-3e/source/8086-SSE/specialize.h
new file mode 100644
index 0000000..5fe119a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086-SSE/specialize.h
@@ -0,0 +1,376 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef specialize_h

+#define specialize_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitiveTypes.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Default value for 'softfloat_detectTininess'.

+*----------------------------------------------------------------------------*/

+#define init_detectTininess softfloat_tininess_afterRounding

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 32-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui32_fromPosOverflow 0xFFFFFFFF

+#define ui32_fromNegOverflow 0xFFFFFFFF

+#define ui32_fromNaN         0xFFFFFFFF

+#define i32_fromPosOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNegOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNaN          (-0x7FFFFFFF - 1)

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 64-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNaN         UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define i64_fromPosOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNegOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNaN          (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+

+/*----------------------------------------------------------------------------

+| "Common NaN" structure, used to transfer NaN representations from one format

+| to another.

+*----------------------------------------------------------------------------*/

+struct commonNaN {

+    bool sign;

+#ifdef LITTLEENDIAN

+    uint64_t v0, v64;

+#else

+    uint64_t v64, v0;

+#endif

+};

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 16-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF16UI 0xFE00

+

+/*----------------------------------------------------------------------------

+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a

+| 16-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 32-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF32UI 0xFFC00000

+

+/*----------------------------------------------------------------------------

+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a

+| 32-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 64-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a

+| 64-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 80-bit extended floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNExtF80UI64 0xFFFF

+#define defaultNaNExtF80UI0  UINT64_C( 0xC000000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 80-bit unsigned integer formed from concatenating

+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended

+| floating-point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 )

+#define defaultNaNF128UI0  UINT64_C( 0 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 128-bit unsigned integer formed from concatenating

+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-

+| point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+#else

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI96 0xFFFF8000

+#define defaultNaNF128UI64 0

+#define defaultNaNF128UI32 0

+#define defaultNaNF128UI0  0

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument 'aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/extF80M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/8086/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..85ee211
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint64_t uiA0;

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;

+    uiA0 = aSPtr->signif;

+    return

+        ! (uiA0 & UINT64_C( 0x4000000000000000 ))

+            && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/f128M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/8086/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..79a7077
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool f128M_isSignalingNaN( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;

+    return

+        ((uiA96 & 0x00007FFF) != 0)

+            || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                     | aWPtr[indexWord( 4, 0 )])

+                    != 0);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80M.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..3405b3b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| `zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )

+{

+

+    zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );

+    zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80UI.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..cb7424f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;

+    uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128M.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128M.c
new file mode 100644
index 0000000..e7ea802
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by `zWPtr'.  Argument

+| `zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )

+{

+

+    softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );

+    zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128UI.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..7a9423b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );

+    uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF16UI.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..d4e458a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF32UI.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..ed6c226
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF64UI.c b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..1182be3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by `aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )

+{

+

+    return

+        (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )

+            | aPtr->v64>>12;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_extF80MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..00baf35
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by `aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by `zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr )

+{

+

+    if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = signExtF80UI64( aSPtr->signExp );

+    zPtr->v64 = aSPtr->signif<<1;

+    zPtr->v0  = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_extF80UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..ab6311e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA64>>15;

+    zPtr->v64  = uiA0<<1;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_f128MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..55ec25b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by `aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by `zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument `aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )

+{

+

+    if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;

+    softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_f128UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..f838f02
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating `uiA64' and `uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+    struct uint128 NaNSig;

+

+    if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );

+    zPtr->sign = uiA64>>63;

+    zPtr->v64  = NaNSig.v64;

+    zPtr->v0   = NaNSig.v0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_f16UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..c1e242d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF16UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>15;

+    zPtr->v64  = (uint_fast64_t) uiA<<54;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_f32UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..b21ba66
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF32UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>31;

+    zPtr->v64  = (uint_fast64_t) uiA<<41;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_f64UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/8086/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..6529d2e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming `uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by `zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF64UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>63;

+    zPtr->v64  = uiA<<12;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80M.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..ea1d57a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80M.c
@@ -0,0 +1,107 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by `aSPtr' and `bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by `zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ )

+{

+    bool isSigNaNA;

+    const struct extFloat80M *sPtr;

+    bool isSigNaNB;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiMagA64, uiMagB64;

+

+    isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );

+    sPtr = aSPtr;

+    if ( ! bSPtr ) {

+        if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );

+        goto copy;

+    }

+    isSigNaNB = extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr );

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            uiB64 = bSPtr->signExp;

+            if ( isSigNaNB ) goto returnLargerUIMag;

+            uiB0 = bSPtr->signif;

+            if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto copyB;

+            goto copy;

+        } else {

+            uiA64 = aSPtr->signExp;

+            uiA0 = aSPtr->signif;

+            if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto copy;

+            goto copyB;

+        }

+    }

+    uiB64 = bSPtr->signExp;

+ returnLargerUIMag:

+    uiA64 = aSPtr->signExp;

+    uiMagA64 = uiA64 & 0x7FFF;

+    uiMagB64 = uiB64 & 0x7FFF;

+    if ( uiMagA64 < uiMagB64 ) goto copyB;

+    if ( uiMagB64 < uiMagA64 ) goto copy;

+    uiA0 = aSPtr->signif;

+    uiB0 = bSPtr->signif;

+    if ( uiA0 < uiB0 ) goto copyB;

+    if ( uiB0 < uiA0 ) goto copy;

+    if ( uiA64 < uiB64 ) goto copy;

+ copyB:

+    sPtr = bSPtr;

+ copy:

+    zSPtr->signExp = sPtr->signExp;

+    zSPtr->signif = sPtr->signif | UINT64_C( 0xC000000000000000 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80UI.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..cc3f0f4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNExtF80UI.c
@@ -0,0 +1,106 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast64_t uiNonsigA0, uiNonsigB0;

+    uint_fast16_t uiMagA64, uiMagB64;

+    struct uint128 uiZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );

+    isSigNaNB = softfloat_isSigNaNExtF80UI( uiB64, uiB0 );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA0 = uiA0 | UINT64_C( 0xC000000000000000 );

+    uiNonsigB0 = uiB0 | UINT64_C( 0xC000000000000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            if ( isNaNExtF80UI( uiB64, uiB0 ) ) goto returnB;

+            goto returnA;

+        } else {

+            if ( isNaNExtF80UI( uiA64, uiA0 ) ) goto returnA;

+            goto returnB;

+        }

+    }

+ returnLargerMag:

+    uiMagA64 = uiA64 & 0x7FFF;

+    uiMagB64 = uiB64 & 0x7FFF;

+    if ( uiMagA64 < uiMagB64 ) goto returnB;

+    if ( uiMagB64 < uiMagA64 ) goto returnA;

+    if ( uiA0 < uiB0 ) goto returnB;

+    if ( uiB0 < uiA0 ) goto returnA;

+    if ( uiA64 < uiB64 ) goto returnA;

+ returnB:

+    uiZ.v64 = uiB64;

+    uiZ.v0  = uiNonsigB0;

+    return uiZ;

+ returnA:

+    uiZ.v64 = uiA64;

+    uiZ.v0  = uiNonsigA0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128M.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128M.c
new file mode 100644
index 0000000..06554fb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128M.c
@@ -0,0 +1,108 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| `aWPtr' and `bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by `zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of `aWPtr', `bWPtr',

+| and `zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )

+{

+    bool isSigNaNA;

+    const uint32_t *ptr;

+    bool isSigNaNB;

+    uint32_t uiA96, uiB96, wordMagA, wordMagB;

+

+    isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );

+    ptr = aWPtr;

+    if ( ! bWPtr ) {

+        if ( isSigNaNA ) softfloat_raiseFlags( softfloat_flag_invalid );

+        goto copy;

+    }

+    isSigNaNB = f128M_isSignalingNaN( (const float128_t *) bWPtr );

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerUIMag;

+            if ( softfloat_isNaNF128M( bWPtr ) ) goto copyB;

+            goto copy;

+        } else {

+            if ( softfloat_isNaNF128M( aWPtr ) ) goto copy;

+            goto copyB;

+        }

+    }

+ returnLargerUIMag:

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    wordMagA = uiA96 & 0x7FFFFFFF;

+    wordMagB = uiB96 & 0x7FFFFFFF;

+    if ( wordMagA < wordMagB ) goto copyB;

+    if ( wordMagB < wordMagA ) goto copy;

+    wordMagA = aWPtr[indexWord( 4, 2 )];

+    wordMagB = bWPtr[indexWord( 4, 2 )];

+    if ( wordMagA < wordMagB ) goto copyB;

+    if ( wordMagB < wordMagA ) goto copy;

+    wordMagA = aWPtr[indexWord( 4, 1 )];

+    wordMagB = bWPtr[indexWord( 4, 1 )];

+    if ( wordMagA < wordMagB ) goto copyB;

+    if ( wordMagB < wordMagA ) goto copy;

+    wordMagA = aWPtr[indexWord( 4, 0 )];

+    wordMagB = bWPtr[indexWord( 4, 0 )];

+    if ( wordMagA < wordMagB ) goto copyB;

+    if ( wordMagB < wordMagA ) goto copy;

+    if ( uiA96 < uiB96 ) goto copy;

+ copyB:

+    ptr = bWPtr;

+ copy:

+    zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;

+    zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128UI.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..46b9f5f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF128UI.c
@@ -0,0 +1,105 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast64_t uiNonsigA64, uiNonsigB64, uiMagA64, uiMagB64;

+    struct uint128 uiZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );

+    isSigNaNB = softfloat_isSigNaNF128UI( uiB64, uiB0 );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA64 = uiA64 | UINT64_C( 0x0000800000000000 );

+    uiNonsigB64 = uiB64 | UINT64_C( 0x0000800000000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            if ( isNaNF128UI( uiB64, uiB0 ) ) goto returnB;

+            goto returnA;

+        } else {

+            if ( isNaNF128UI( uiA64, uiA0 ) ) goto returnA;

+            goto returnB;

+        }

+    }

+ returnLargerMag:

+    uiMagA64 = uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );

+    uiMagB64 = uiB64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );

+    if ( uiMagA64 < uiMagB64 ) goto returnB;

+    if ( uiMagB64 < uiMagA64 ) goto returnA;

+    if ( uiA0 < uiB0 ) goto returnB;

+    if ( uiB0 < uiA0 ) goto returnA;

+    if ( uiNonsigA64 < uiNonsigB64 ) goto returnA;

+ returnB:

+    uiZ.v64 = uiNonsigB64;

+    uiZ.v0  = uiB0;

+    return uiZ;

+ returnA:

+    uiZ.v64 = uiNonsigA64;

+    uiZ.v0  = uiA0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF16UI.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..89cc0fe
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF16UI.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast16_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNF16UI( uiA );

+    isSigNaNB = softfloat_isSigNaNF16UI( uiB );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA = uiA | 0x0200;

+    uiNonsigB = uiB | 0x0200;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            return isNaNF16UI( uiB ) ? uiNonsigB : uiNonsigA;

+        } else {

+            return isNaNF16UI( uiA ) ? uiNonsigA : uiNonsigB;

+        }

+    }

+ returnLargerMag:

+    uiMagA = uiA & 0x7FFF;

+    uiMagB = uiB & 0x7FFF;

+    if ( uiMagA < uiMagB ) return uiNonsigB;

+    if ( uiMagB < uiMagA ) return uiNonsigA;

+    return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF32UI.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..aeb6024
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF32UI.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast32_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNF32UI( uiA );

+    isSigNaNB = softfloat_isSigNaNF32UI( uiB );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA = uiA | 0x00400000;

+    uiNonsigB = uiB | 0x00400000;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            return isNaNF32UI( uiB ) ? uiNonsigB : uiNonsigA;

+        } else {

+            return isNaNF32UI( uiA ) ? uiNonsigA : uiNonsigB;

+        }

+    }

+ returnLargerMag:

+    uiMagA = uiA & 0x7FFFFFFF;

+    uiMagB = uiB & 0x7FFFFFFF;

+    if ( uiMagA < uiMagB ) return uiNonsigB;

+    if ( uiMagB < uiMagA ) return uiNonsigA;

+    return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF64UI.c b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..dabad40
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/s_propagateNaNF64UI.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )

+{

+    bool isSigNaNA, isSigNaNB;

+    uint_fast64_t uiNonsigA, uiNonsigB, uiMagA, uiMagB;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    isSigNaNA = softfloat_isSigNaNF64UI( uiA );

+    isSigNaNB = softfloat_isSigNaNF64UI( uiB );

+    /*------------------------------------------------------------------------

+    | Make NaNs non-signaling.

+    *------------------------------------------------------------------------*/

+    uiNonsigA = uiA | UINT64_C( 0x0008000000000000 );

+    uiNonsigB = uiB | UINT64_C( 0x0008000000000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isSigNaNA | isSigNaNB ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) {

+            if ( isSigNaNB ) goto returnLargerMag;

+            return isNaNF64UI( uiB ) ? uiNonsigB : uiNonsigA;

+        } else {

+            return isNaNF64UI( uiA ) ? uiNonsigA : uiNonsigB;

+        }

+    }

+ returnLargerMag:

+    uiMagA = uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF );

+    uiMagB = uiB & UINT64_C( 0x7FFFFFFFFFFFFFFF );

+    if ( uiMagA < uiMagB ) return uiNonsigB;

+    if ( uiMagB < uiMagA ) return uiNonsigA;

+    return (uiNonsigA < uiNonsigB) ? uiNonsigA : uiNonsigB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/softfloat_raiseFlags.c b/c_emulator/SoftFloat-3e/source/8086/softfloat_raiseFlags.c
new file mode 100644
index 0000000..3115306
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Raises the exceptions specified by `flags'.  Floating-point traps can be

+| defined here if desired.  It is currently not possible for such a trap

+| to substitute a result value.  If traps are not implemented, this routine

+| should be simply `softfloat_exceptionFlags |= flags;'.

+*----------------------------------------------------------------------------*/

+void softfloat_raiseFlags( uint_fast8_t flags )

+{

+

+    softfloat_exceptionFlags |= flags;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/8086/specialize.h b/c_emulator/SoftFloat-3e/source/8086/specialize.h
new file mode 100644
index 0000000..5fe119a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/8086/specialize.h
@@ -0,0 +1,376 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef specialize_h

+#define specialize_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitiveTypes.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Default value for 'softfloat_detectTininess'.

+*----------------------------------------------------------------------------*/

+#define init_detectTininess softfloat_tininess_afterRounding

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 32-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui32_fromPosOverflow 0xFFFFFFFF

+#define ui32_fromNegOverflow 0xFFFFFFFF

+#define ui32_fromNaN         0xFFFFFFFF

+#define i32_fromPosOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNegOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNaN          (-0x7FFFFFFF - 1)

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 64-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNegOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNaN         UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define i64_fromPosOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNegOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNaN          (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+

+/*----------------------------------------------------------------------------

+| "Common NaN" structure, used to transfer NaN representations from one format

+| to another.

+*----------------------------------------------------------------------------*/

+struct commonNaN {

+    bool sign;

+#ifdef LITTLEENDIAN

+    uint64_t v0, v64;

+#else

+    uint64_t v64, v0;

+#endif

+};

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 16-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF16UI 0xFE00

+

+/*----------------------------------------------------------------------------

+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a

+| 16-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 32-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF32UI 0xFFC00000

+

+/*----------------------------------------------------------------------------

+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a

+| 32-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 64-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF64UI UINT64_C( 0xFFF8000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a

+| 64-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 80-bit extended floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNExtF80UI64 0xFFFF

+#define defaultNaNExtF80UI0  UINT64_C( 0xC000000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 80-bit unsigned integer formed from concatenating

+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended

+| floating-point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI64 UINT64_C( 0xFFFF800000000000 )

+#define defaultNaNF128UI0  UINT64_C( 0 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 128-bit unsigned integer formed from concatenating

+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-

+| point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+#else

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI96 0xFFFF8000

+#define defaultNaNF128UI64 0

+#define defaultNaNF128UI32 0

+#define defaultNaNF128UI0  0

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument 'aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..85ee211
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint64_t uiA0;

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;

+    uiA0 = aSPtr->signif;

+    return

+        ! (uiA0 & UINT64_C( 0x4000000000000000 ))

+            && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..79a7077
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool f128M_isSignalingNaN( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;

+    return

+        ((uiA96 & 0x00007FFF) != 0)

+            || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                     | aWPtr[indexWord( 4, 0 )])

+                    != 0);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..54a50dc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80M.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "softfloat_types.h"

+

+#define softfloat_commonNaNToExtF80M softfloat_commonNaNToExtF80M

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )

+{

+

+    zSPtr->signExp = defaultNaNExtF80UI64;

+    zSPtr->signif  = defaultNaNExtF80UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..5b698f6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToExtF80UI.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#define softfloat_commonNaNToExtF80UI softfloat_commonNaNToExtF80UI

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ.v64 = defaultNaNExtF80UI64;

+    uiZ.v0  = defaultNaNExtF80UI0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c
new file mode 100644
index 0000000..b22baa8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128M.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#define softfloat_commonNaNToF128M softfloat_commonNaNToF128M

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )

+{

+

+    zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;

+    zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;

+    zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;

+    zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..70f0cf1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF128UI.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#define softfloat_commonNaNToF128UI softfloat_commonNaNToF128UI

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF16UI.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF32UI.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_commonNaNToF64UI.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80MToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_extF80UIToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128MToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f128UIToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f16UIToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f32UIToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..7c7d5c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_f64UIToCommonNaN.c
@@ -0,0 +1,5 @@
+

+/*----------------------------------------------------------------------------

+| This file intentionally contains no code.

+*----------------------------------------------------------------------------*/

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..1c6510c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80M.c
@@ -0,0 +1,74 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ )

+{

+    uint_fast16_t ui64;

+    uint_fast64_t ui0;

+

+    ui64 = aSPtr->signExp;

+    ui0  = aSPtr->signif;

+    if (

+        softfloat_isSigNaNExtF80UI( ui64, ui0 )

+            || (bSPtr

+                    && (ui64 = bSPtr->signExp,

+                        ui0  = bSPtr->signif,

+                        softfloat_isSigNaNExtF80UI( ui64, ui0 )))

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zSPtr->signExp = defaultNaNExtF80UI64;

+    zSPtr->signif  = defaultNaNExtF80UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..e1bb155
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNExtF80UI.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    struct uint128 uiZ;

+

+    if (

+           softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+        || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    uiZ.v64 = defaultNaNExtF80UI64;

+    uiZ.v0  = defaultNaNExtF80UI0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c
new file mode 100644
index 0000000..9bddee9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128M.c
@@ -0,0 +1,68 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )

+{

+

+    if (

+        f128M_isSignalingNaN( (const float128_t *) aWPtr );

+            || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;

+    zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;

+    zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;

+    zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..57fddd1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF128UI.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    struct uint128 uiZ;

+

+    if (

+           softfloat_isSigNaNF128UI( uiA64, uiA0 )

+        || softfloat_isSigNaNF128UI( uiB64, uiB0 )

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..0b08e00
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF16UI.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+

+    if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    return defaultNaNF16UI;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..cab7403
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF32UI.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+

+    if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    return defaultNaNF32UI;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..83b91d3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/s_propagateNaNF64UI.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )

+{

+

+    if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    return defaultNaNF64UI;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c
new file mode 100644
index 0000000..61046da
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Raises the exceptions specified by 'flags'.  Floating-point traps can be

+| defined here if desired.  It is currently not possible for such a trap

+| to substitute a result value.  If traps are not implemented, this routine

+| should be simply 'softfloat_exceptionFlags |= flags;'.

+*----------------------------------------------------------------------------*/

+void softfloat_raiseFlags( uint_fast8_t flags )

+{

+

+    softfloat_exceptionFlags |= flags;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/specialize.h b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/specialize.h
new file mode 100644
index 0000000..2c481a2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2-defaultNaN/specialize.h
@@ -0,0 +1,407 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef specialize_h

+#define specialize_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitiveTypes.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Default value for 'softfloat_detectTininess'.

+*----------------------------------------------------------------------------*/

+#define init_detectTininess softfloat_tininess_beforeRounding

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 32-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui32_fromPosOverflow 0xFFFFFFFF

+#define ui32_fromNegOverflow 0

+#define ui32_fromNaN         0

+#define i32_fromPosOverflow  0x7FFFFFFF

+#define i32_fromNegOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNaN          0

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 64-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNegOverflow 0

+#define ui64_fromNaN         0

+#define i64_fromPosOverflow  INT64_C( 0x7FFFFFFFFFFFFFFF )

+#define i64_fromNegOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNaN          0

+

+/*----------------------------------------------------------------------------

+| "Common NaN" structure, used to transfer NaN representations from one format

+| to another.

+*----------------------------------------------------------------------------*/

+struct commonNaN { char _unused; };

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 16-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF16UI 0x7E00

+

+/*----------------------------------------------------------------------------

+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a

+| 16-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI)

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 32-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF32UI 0x7FC00000

+

+/*----------------------------------------------------------------------------

+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a

+| 32-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI)

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 64-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a

+| 64-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI)

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 80-bit extended floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNExtF80UI64 0x7FFF

+#define defaultNaNExtF80UI0  UINT64_C( 0xC000000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 80-bit unsigned integer formed from concatenating

+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended

+| floating-point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI

+INLINE

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+    uiZ.v64 = defaultNaNExtF80UI64;

+    uiZ.v0  = defaultNaNExtF80UI0;

+    return uiZ;

+}

+#else

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );

+#endif

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )

+#define defaultNaNF128UI0  UINT64_C( 0 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 128-bit unsigned integer formed from concatenating

+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-

+| point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+#if defined INLINE && ! defined softfloat_commonNaNToF128UI

+INLINE

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+    return uiZ;

+}

+#else

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );

+#endif

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+#else

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+#if defined INLINE && ! defined softfloat_commonNaNToExtF80M

+INLINE

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )

+{

+    zSPtr->signExp = defaultNaNExtF80UI64;

+    zSPtr->signif  = defaultNaNExtF80UI0;

+}

+#else

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr );

+#endif

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI96 0x7FFF8000

+#define defaultNaNF128UI64 0

+#define defaultNaNF128UI32 0

+#define defaultNaNF128UI0  0

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument 'aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+#if defined INLINE && ! defined softfloat_commonNaNToF128M

+INLINE

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )

+{

+    zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;

+    zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;

+    zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;

+    zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;

+}

+#else

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );

+#endif

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/extF80M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/extF80M_isSignalingNaN.c
new file mode 100644
index 0000000..85ee211
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/extF80M_isSignalingNaN.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool extF80M_isSignalingNaN( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint64_t uiA0;

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    if ( (aSPtr->signExp & 0x7FFF) != 0x7FFF ) return false;

+    uiA0 = aSPtr->signif;

+    return

+        ! (uiA0 & UINT64_C( 0x4000000000000000 ))

+            && (uiA0 & UINT64_C( 0x3FFFFFFFFFFFFFFF));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/f128M_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/f128M_isSignalingNaN.c
new file mode 100644
index 0000000..79a7077
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/f128M_isSignalingNaN.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool f128M_isSignalingNaN( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    if ( (uiA96 & 0x7FFF8000) != 0x7FFF0000 ) return false;

+    return

+        ((uiA96 & 0x00007FFF) != 0)

+            || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                     | aWPtr[indexWord( 4, 0 )])

+                    != 0);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80M.c
new file mode 100644
index 0000000..543400b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )

+{

+

+    zSPtr->signExp = packToExtF80UI64( aPtr->sign, 0x7FFF );

+    zSPtr->signif = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80UI.c
new file mode 100644
index 0000000..6cf1d11
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToExtF80UI.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ.v64 = (uint_fast16_t) aPtr->sign<<15 | 0x7FFF;

+    uiZ.v0 = UINT64_C( 0xC000000000000000 ) | aPtr->v64>>1;

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128M.c
new file mode 100644
index 0000000..4e8ede0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )

+{

+

+    softfloat_shortShiftRight128M( (const uint32_t *) &aPtr->v0, 16, zWPtr );

+    zWPtr[indexWordHi( 4 )] |= (uint32_t) aPtr->sign<<31 | 0x7FFF8000;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128UI.c
new file mode 100644
index 0000000..f938c3f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF128UI.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )

+{

+    struct uint128 uiZ;

+

+    uiZ = softfloat_shortShiftRight128( aPtr->v64, aPtr->v0, 16 );

+    uiZ.v64 |= (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FFF800000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF16UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF16UI.c
new file mode 100644
index 0000000..6cd4fc1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF16UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast16_t) aPtr->sign<<15 | 0x7E00 | aPtr->v64>>54;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF32UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..7b38167
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF32UI.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr )

+{

+

+    return (uint_fast32_t) aPtr->sign<<31 | 0x7FC00000 | aPtr->v64>>41;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF64UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..1484702
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_commonNaNToF64UI.c
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr )

+{

+

+    return

+        (uint_fast64_t) aPtr->sign<<63 | UINT64_C( 0x7FF8000000000000 )

+            | aPtr->v64>>12;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80MToCommonNaN.c
new file mode 100644
index 0000000..82216cf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr )

+{

+

+    if ( extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = signExtF80UI64( aSPtr->signExp );

+    zPtr->v64 = aSPtr->signif<<1;

+    zPtr->v0  = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80UIToCommonNaN.c
new file mode 100644
index 0000000..2559fb6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_extF80UIToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA64>>15;

+    zPtr->v64  = uiA0<<1;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128MToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128MToCommonNaN.c
new file mode 100644
index 0000000..322d25a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128MToCommonNaN.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument 'aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr )

+{

+

+    if ( f128M_isSignalingNaN( (const float128_t *) aWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = aWPtr[indexWordHi( 4 )]>>31;

+    softfloat_shortShiftLeft128M( aWPtr, 16, (uint32_t *) &zPtr->v0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128UIToCommonNaN.c
new file mode 100644
index 0000000..843c187
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f128UIToCommonNaN.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr )

+{

+    struct uint128 NaNSig;

+

+    if ( softfloat_isSigNaNF128UI( uiA64, uiA0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    NaNSig = softfloat_shortShiftLeft128( uiA64, uiA0, 16 );

+    zPtr->sign = uiA64>>63;

+    zPtr->v64  = NaNSig.v64;

+    zPtr->v0   = NaNSig.v0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f16UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f16UIToCommonNaN.c
new file mode 100644
index 0000000..f5fe587
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f16UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF16UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>15;

+    zPtr->v64  = (uint_fast64_t) uiA<<54;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f32UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..58726a3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f32UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF32UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>31;

+    zPtr->v64  = (uint_fast64_t) uiA<<41;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f64UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..03761e4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_f64UIToCommonNaN.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr )

+{

+

+    if ( softfloat_isSigNaNF64UI( uiA ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    zPtr->sign = uiA>>63;

+    zPtr->v64  = uiA<<12;

+    zPtr->v0   = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80M.c
new file mode 100644
index 0000000..f10ed0b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80M.c
@@ -0,0 +1,86 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ )

+{

+    const struct extFloat80M *sPtr;

+    bool isSigNaNA;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+

+    sPtr = aSPtr;

+    isSigNaNA = extF80M_isSignalingNaN( (const extFloat80_t *) aSPtr );

+    if (

+        isSigNaNA

+            || (bSPtr

+                    && extF80M_isSignalingNaN( (const extFloat80_t *) bSPtr ))

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) goto copyNonsig;

+        goto copyNonsigB;

+    }

+    uiZ64 = sPtr->signExp;

+    uiZ0  = sPtr->signif;

+    if ( isNaNExtF80UI( uiZ64, uiZ0 ) ) goto returnNonsig;

+ copyNonsigB:

+    sPtr = bSPtr;

+ copyNonsig:

+    uiZ64 = sPtr->signExp;

+    uiZ0  = sPtr->signif;

+ returnNonsig:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = uiZ0 | UINT64_C( 0xC000000000000000 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80UI.c
new file mode 100644
index 0000000..bd23c24
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNExtF80UI.c
@@ -0,0 +1,83 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA;

+    struct uint128 uiZ;

+

+    isSigNaNA = softfloat_isSigNaNExtF80UI( uiA64, uiA0 );

+    if ( isSigNaNA || softfloat_isSigNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) goto returnNonsigA;

+        goto returnNonsigB;

+    }

+    if ( isNaNExtF80UI( uiA64, uiA0 ) ) {

+ returnNonsigA:

+        uiZ.v64 = uiA64;

+        uiZ.v0  = uiA0;

+    } else {

+ returnNonsigB:

+        uiZ.v64 = uiB64;

+        uiZ.v0  = uiB0;

+    }

+    uiZ.v0 | UINT64_C( 0xC000000000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128M.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128M.c
new file mode 100644
index 0000000..23e766a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128M.c
@@ -0,0 +1,77 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )

+{

+    const uint32_t *ptr;

+    bool isSigNaNA;

+

+    ptr = aWPtr;

+    isSigNaNA = f128M_isSignalingNaN( (const float128_t *) aWPtr );

+    if (

+        isSigNaNA

+            || (bWPtr && f128M_isSignalingNaN( (const float128_t *) bWPtr ))

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( ! isSigNaNA ) ptr = bWPtr;

+        goto copyNonsig;

+    }

+    if ( ! softfloat_isNaNF128M( aWPtr ) ) ptr = bWPtr;

+ copyNonsig:

+    zWPtr[indexWordHi( 4 )] = ptr[indexWordHi( 4 )] | 0x00008000;

+    zWPtr[indexWord( 4, 2 )] = ptr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = ptr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = ptr[indexWord( 4, 0 )];

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..b8882d7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF128UI.c
@@ -0,0 +1,83 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ )

+{

+    bool isSigNaNA;

+    struct uint128 uiZ;

+

+    isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );

+    if ( isSigNaNA || softfloat_isSigNaNF128UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        if ( isSigNaNA ) goto returnNonsigA;

+        goto returnNonsigB;

+    }

+    if ( isNaNF128UI( uiA64, uiA0 ) ) {

+ returnNonsigA:

+        uiZ.v64 = uiA64;

+        uiZ.v0  = uiA0;

+    } else {

+ returnNonsigB:

+        uiZ.v64 = uiB64;

+        uiZ.v0  = uiB0;

+    }

+    uiZ.v64 |= UINT64_C( 0x0000800000000000 );

+    return uiZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF16UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..e333328
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF16UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF16UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return (isSigNaNA ? uiA : uiB) | 0x0200;

+    }

+    return isNaNF16UI( uiA ) ? uiA : uiB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF32UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..c7508ae
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF32UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF32UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return (isSigNaNA ? uiA : uiB) | 0x00400000;

+    }

+    return isNaNF32UI( uiA ) ? uiA : uiB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF64UI.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..8c67763
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/s_propagateNaNF64UI.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )

+{

+    bool isSigNaNA;

+

+    isSigNaNA = softfloat_isSigNaNF64UI( uiA );

+    if ( isSigNaNA || softfloat_isSigNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return (isSigNaNA ? uiA : uiB) | UINT64_C( 0x0008000000000000 );

+    }

+    return isNaNF64UI( uiA ) ? uiA : uiB;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/softfloat_raiseFlags.c b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/softfloat_raiseFlags.c
new file mode 100644
index 0000000..61046da
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Raises the exceptions specified by 'flags'.  Floating-point traps can be

+| defined here if desired.  It is currently not possible for such a trap

+| to substitute a result value.  If traps are not implemented, this routine

+| should be simply 'softfloat_exceptionFlags |= flags;'.

+*----------------------------------------------------------------------------*/

+void softfloat_raiseFlags( uint_fast8_t flags )

+{

+

+    softfloat_exceptionFlags |= flags;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ARM-VFPv2/specialize.h b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/specialize.h
new file mode 100644
index 0000000..5321f33
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ARM-VFPv2/specialize.h
@@ -0,0 +1,376 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef specialize_h

+#define specialize_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitiveTypes.h"

+#include "softfloat.h"

+

+/*----------------------------------------------------------------------------

+| Default value for 'softfloat_detectTininess'.

+*----------------------------------------------------------------------------*/

+#define init_detectTininess softfloat_tininess_beforeRounding

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 32-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui32_fromPosOverflow 0xFFFFFFFF

+#define ui32_fromNegOverflow 0

+#define ui32_fromNaN         0

+#define i32_fromPosOverflow  0x7FFFFFFF

+#define i32_fromNegOverflow  (-0x7FFFFFFF - 1)

+#define i32_fromNaN          0

+

+/*----------------------------------------------------------------------------

+| The values to return on conversions to 64-bit integer formats that raise an

+| invalid exception.

+*----------------------------------------------------------------------------*/

+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )

+#define ui64_fromNegOverflow 0

+#define ui64_fromNaN         0

+#define i64_fromPosOverflow  INT64_C( 0x7FFFFFFFFFFFFFFF )

+#define i64_fromNegOverflow  (-INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)

+#define i64_fromNaN          0

+

+/*----------------------------------------------------------------------------

+| "Common NaN" structure, used to transfer NaN representations from one format

+| to another.

+*----------------------------------------------------------------------------*/

+struct commonNaN {

+    bool sign;

+#ifdef LITTLEENDIAN

+    uint64_t v0, v64;

+#else

+    uint64_t v64, v0;

+#endif

+};

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 16-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF16UI 0x7E00

+

+/*----------------------------------------------------------------------------

+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a

+| 16-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f16UIToCommonNaN( uint_fast16_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast16_t softfloat_commonNaNToF16UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast16_t

+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 32-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF32UI 0x7FC00000

+

+/*----------------------------------------------------------------------------

+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a

+| 32-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f32UIToCommonNaN( uint_fast32_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_commonNaNToF32UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast32_t

+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 64-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a

+| 64-bit floating-point signaling NaN.

+| Note:  This macro evaluates its argument more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))

+

+/*----------------------------------------------------------------------------

+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void softfloat_f64UIToCommonNaN( uint_fast64_t uiA, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+uint_fast64_t softfloat_commonNaNToF64UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-

+| point values, at least one of which is a NaN, returns the bit pattern of

+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a

+| signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+uint_fast64_t

+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 80-bit extended floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNExtF80UI64 0x7FFF

+#define defaultNaNExtF80UI0  UINT64_C( 0xC000000000000000 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 80-bit unsigned integer formed from concatenating

+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended

+| floating-point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of an 80-bit extended floating-point NaN, converts

+| this NaN to the common NaN form, and stores the resulting common NaN at the

+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80UIToCommonNaN(

+     uint_fast16_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and returns the bit pattern of this value as an unsigned

+| integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting

+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 80-bit extended floating-point value, and assuming at least on of these

+| floating-point values is a NaN, returns the bit pattern of the combined NaN

+| result.  If either original floating-point value is a signaling NaN, the

+| invalid exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNExtF80UI(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )

+#define defaultNaNF128UI0  UINT64_C( 0 )

+

+/*----------------------------------------------------------------------------

+| Returns true when the 128-bit unsigned integer formed from concatenating

+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-

+| point signaling NaN.

+| Note:  This macro evaluates its arguments more than once.

+*----------------------------------------------------------------------------*/

+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))

+

+/*----------------------------------------------------------------------------

+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'

+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to

+| the common NaN form, and stores the resulting common NaN at the location

+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception

+| is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128UIToCommonNaN(

+     uint_fast64_t uiA64, uint_fast64_t uiA0, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and returns the bit pattern of this value as an unsigned integer.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );

+

+/*----------------------------------------------------------------------------

+| Interpreting the unsigned integer formed from concatenating 'uiA64' and

+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the

+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another

+| 128-bit floating-point value, and assuming at least on of these floating-

+| point values is a NaN, returns the bit pattern of the combined NaN result.

+| If either original floating-point value is a signaling NaN, the invalid

+| exception is raised.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_propagateNaNF128UI(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0

+ );

+

+#else

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not

+| defined.

+*----------------------------------------------------------------------------*/

+

+/*----------------------------------------------------------------------------

+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is

+| a NaN, converts this NaN to the common NaN form, and stores the resulting

+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling

+| NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_extF80MToCommonNaN(

+     const struct extFloat80M *aSPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended

+| floating-point NaN, and stores this NaN at the location pointed to by

+| 'zSPtr'.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToExtF80M(

+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 80-bit extended floating-point values

+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result

+| at the location pointed to by 'zSPtr'.  If either original floating-point

+| value is a signaling NaN, the invalid exception is raised.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ );

+

+/*----------------------------------------------------------------------------

+| The bit pattern for a default generated 128-bit floating-point NaN.

+*----------------------------------------------------------------------------*/

+#define defaultNaNF128UI96 0x7FFF8000

+#define defaultNaNF128UI64 0

+#define defaultNaNF128UI32 0

+#define defaultNaNF128UI0  0

+

+/*----------------------------------------------------------------------------

+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,

+| converts this NaN to the common NaN form, and stores the resulting common

+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,

+| the invalid exception is raised.  Argument 'aWPtr' points to an array of

+| four 32-bit elements that concatenate in the platform's normal endian order

+| to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_f128MToCommonNaN( const uint32_t *aWPtr, struct commonNaN *zPtr );

+

+/*----------------------------------------------------------------------------

+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point

+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument

+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the

+| platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );

+

+/*----------------------------------------------------------------------------

+| Assuming at least one of the two 128-bit floating-point values pointed to by

+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location

+| pointed to by 'zWPtr'.  If either original floating-point value is a

+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',

+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in

+| the platform's normal endian order to form a 128-bit floating-point value.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_propagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF32UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF32UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF32UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF64UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF64UI.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_commonNaNToF64UI.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_f32UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/RISCV/s_f32UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_f32UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_f64UIToCommonNaN.c b/c_emulator/SoftFloat-3e/source/RISCV/s_f64UIToCommonNaN.c
new file mode 100644
index 0000000..861b269
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_f64UIToCommonNaN.c
@@ -0,0 +1,5 @@
+
+/*----------------------------------------------------------------------------
+| This file intentionally contains no code.
+*----------------------------------------------------------------------------*/
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF128UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF128UI.c
new file mode 100644
index 0000000..6caecd2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF128UI.c
@@ -0,0 +1,105 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2018 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "platform.h"
+#include "internals.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+     uint_fast64_t uiA64,
+     uint_fast64_t uiA0,
+     uint_fast64_t uiB64,
+     uint_fast64_t uiB0
+ )
+{
+    bool isSigNaNA, isSigNaNB;
+    uint_fast64_t uiNonsigA64, uiNonsigB64, uiMagA64, uiMagB64;
+    struct uint128 uiZ;
+
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );
+    isSigNaNB = softfloat_isSigNaNF128UI( uiB64, uiB0 );
+    /*------------------------------------------------------------------------
+    | Make NaNs non-signaling.
+    *------------------------------------------------------------------------*/
+    uiNonsigA64 = uiA64 | UINT64_C( 0x0000800000000000 );
+    uiNonsigB64 = uiB64 | UINT64_C( 0x0000800000000000 );
+    /*------------------------------------------------------------------------
+    *------------------------------------------------------------------------*/
+    if ( isSigNaNA | isSigNaNB ) {
+        softfloat_raiseFlags( softfloat_flag_invalid );
+        if ( isSigNaNA ) {
+            if ( isSigNaNB ) goto returnLargerMag;
+            if ( isNaNF128UI( uiB64, uiB0 ) ) goto returnB;
+            goto returnA;
+        } else {
+            if ( isNaNF128UI( uiA64, uiA0 ) ) goto returnA;
+            goto returnB;
+        }
+    }
+ returnLargerMag:
+    uiMagA64 = uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+    uiMagB64 = uiB64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
+    if ( uiMagA64 < uiMagB64 ) goto returnB;
+    if ( uiMagB64 < uiMagA64 ) goto returnA;
+    if ( uiA0 < uiB0 ) goto returnB;
+    if ( uiB0 < uiA0 ) goto returnA;
+    if ( uiNonsigA64 < uiNonsigB64 ) goto returnA;
+ returnB:
+    uiZ.v64 = uiNonsigB64;
+    uiZ.v0  = uiB0;
+    return uiZ;
+ returnA:
+    uiZ.v64 = uiNonsigA64;
+    uiZ.v0  = uiA0;
+    return uiZ;
+
+}
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF16UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF16UI.c
new file mode 100644
index 0000000..3ecd4c9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF16UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3d, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB )
+{
+
+    if ( softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB ) ) {
+        softfloat_raiseFlags( softfloat_flag_invalid );
+    }
+    return defaultNaNF16UI;
+
+}
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF32UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF32UI.c
new file mode 100644
index 0000000..b97fa41
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF32UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3d, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB )
+{
+
+    if ( softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB ) ) {
+        softfloat_raiseFlags( softfloat_flag_invalid );
+    }
+    return defaultNaNF32UI;
+
+}
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF64UI.c b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF64UI.c
new file mode 100644
index 0000000..9c2d359
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/s_propagateNaNF64UI.c
@@ -0,0 +1,58 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3d, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include <stdint.h>
+#include "platform.h"
+#include "specialize.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Interpreting `uiA' and `uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either `uiA' or `uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB )
+{
+
+    if ( softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB ) ) {
+        softfloat_raiseFlags( softfloat_flag_invalid );
+    }
+    return defaultNaNF64UI;
+
+}
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/softfloat_raiseFlags.c b/c_emulator/SoftFloat-3e/source/RISCV/softfloat_raiseFlags.c
new file mode 100644
index 0000000..7a1aee9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/softfloat_raiseFlags.c
@@ -0,0 +1,52 @@
+
+/*============================================================================
+
+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#include "platform.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Raises the exceptions specified by `flags'.  Floating-point traps can be
+| defined here if desired.  It is currently not possible for such a trap
+| to substitute a result value.  If traps are not implemented, this routine
+| should be simply `softfloat_exceptionFlags |= flags;'.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t flags )
+{
+
+    softfloat_exceptionFlags |= flags;
+
+}
+
diff --git a/c_emulator/SoftFloat-3e/source/RISCV/specialize.h b/c_emulator/SoftFloat-3e/source/RISCV/specialize.h
new file mode 100644
index 0000000..509c241
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/RISCV/specialize.h
@@ -0,0 +1,407 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2018 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef specialize_h
+#define specialize_h 1
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "primitiveTypes.h"
+#include "softfloat.h"
+
+/*----------------------------------------------------------------------------
+| Default value for 'softfloat_detectTininess'.
+*----------------------------------------------------------------------------*/
+#define init_detectTininess softfloat_tininess_afterRounding
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 32-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui32_fromPosOverflow 0xFFFFFFFF
+#define ui32_fromNegOverflow 0
+#define ui32_fromNaN         0xFFFFFFFF
+#define i32_fromPosOverflow  0x7FFFFFFF
+#define i32_fromNegOverflow  (-0x7FFFFFFF - 1)
+#define i32_fromNaN          0x7FFFFFFF
+
+/*----------------------------------------------------------------------------
+| The values to return on conversions to 64-bit integer formats that raise an
+| invalid exception.
+*----------------------------------------------------------------------------*/
+#define ui64_fromPosOverflow UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define ui64_fromNegOverflow 0
+#define ui64_fromNaN         UINT64_C( 0xFFFFFFFFFFFFFFFF )
+#define i64_fromPosOverflow  UINT64_C( 0x7FFFFFFFFFFFFFFF )
+#define i64_fromNegOverflow  (-UINT64_C( 0x7FFFFFFFFFFFFFFF ) - 1)
+#define i64_fromNaN          UINT64_C( 0x7FFFFFFFFFFFFFFF )
+
+/*----------------------------------------------------------------------------
+| "Common NaN" structure, used to transfer NaN representations from one format
+| to another.
+*----------------------------------------------------------------------------*/
+struct commonNaN { char _unused; };
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 16-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF16UI 0x7E00
+
+/*----------------------------------------------------------------------------
+| Returns true when 16-bit unsigned integer 'uiA' has the bit pattern of a
+| 16-bit floating-point signaling NaN.
+| Note:  This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF16UI( uiA ) ((((uiA) & 0x7E00) == 0x7C00) && ((uiA) & 0x01FF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 16-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f16UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x0200) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 16-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF16UI( aPtr ) ((uint_fast16_t) defaultNaNF16UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 16-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast16_t
+ softfloat_propagateNaNF16UI( uint_fast16_t uiA, uint_fast16_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 32-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF32UI 0x7FC00000
+
+/*----------------------------------------------------------------------------
+| Returns true when 32-bit unsigned integer 'uiA' has the bit pattern of a
+| 32-bit floating-point signaling NaN.
+| Note:  This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF32UI( uiA ) ((((uiA) & 0x7FC00000) == 0x7F800000) && ((uiA) & 0x003FFFFF))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 32-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f32UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & 0x00400000) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 32-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF32UI( aPtr ) ((uint_fast32_t) defaultNaNF32UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 32-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_propagateNaNF32UI( uint_fast32_t uiA, uint_fast32_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 64-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF64UI UINT64_C( 0x7FF8000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when 64-bit unsigned integer 'uiA' has the bit pattern of a
+| 64-bit floating-point signaling NaN.
+| Note:  This macro evaluates its argument more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF64UI( uiA ) ((((uiA) & UINT64_C( 0x7FF8000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((uiA) & UINT64_C( 0x0007FFFFFFFFFFFF )))
+
+/*----------------------------------------------------------------------------
+| Assuming 'uiA' has the bit pattern of a 64-bit floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 64-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#define softfloat_commonNaNToF64UI( aPtr ) ((uint_fast64_t) defaultNaNF64UI)
+
+/*----------------------------------------------------------------------------
+| Interpreting 'uiA' and 'uiB' as the bit patterns of two 64-bit floating-
+| point values, at least one of which is a NaN, returns the bit pattern of
+| the combined NaN result.  If either 'uiA' or 'uiB' has the pattern of a
+| signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+uint_fast64_t
+ softfloat_propagateNaNF64UI( uint_fast64_t uiA, uint_fast64_t uiB );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 80-bit extended floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNExtF80UI64 0x7FFF
+#define defaultNaNExtF80UI0  UINT64_C( 0xC000000000000000 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 80-bit unsigned integer formed from concatenating
+| 16-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of an 80-bit extended
+| floating-point signaling NaN.
+| Note:  This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNExtF80UI( uiA64, uiA0 ) ((((uiA64) & 0x7FFF) == 0x7FFF) && ! ((uiA0) & UINT64_C( 0x4000000000000000 )) && ((uiA0) & UINT64_C( 0x3FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of an 80-bit extended floating-point NaN, converts
+| this NaN to the common NaN form, and stores the resulting common NaN at the
+| location pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA0) & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and returns the bit pattern of this value as an unsigned
+| integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80UI
+INLINE
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr )
+{
+    struct uint128 uiZ;
+    uiZ.v64 = defaultNaNExtF80UI64;
+    uiZ.v0  = defaultNaNExtF80UI0;
+    return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToExtF80UI( const struct commonNaN *aPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as an 80-bit extended floating-point value, and likewise interpreting
+| the unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 80-bit extended floating-point value, and assuming at least on of these
+| floating-point values is a NaN, returns the bit pattern of the combined NaN
+| result.  If either original floating-point value is a signaling NaN, the
+| invalid exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNExtF80UI(
+     uint_fast16_t uiA64,
+     uint_fast64_t uiA0,
+     uint_fast16_t uiB64,
+     uint_fast64_t uiB0
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI64 UINT64_C( 0x7FFF800000000000 )
+#define defaultNaNF128UI0  UINT64_C( 0 )
+
+/*----------------------------------------------------------------------------
+| Returns true when the 128-bit unsigned integer formed from concatenating
+| 64-bit 'uiA64' and 64-bit 'uiA0' has the bit pattern of a 128-bit floating-
+| point signaling NaN.
+| Note:  This macro evaluates its arguments more than once.
+*----------------------------------------------------------------------------*/
+#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
+
+/*----------------------------------------------------------------------------
+| Assuming the unsigned integer formed from concatenating 'uiA64' and 'uiA0'
+| has the bit pattern of a 128-bit floating-point NaN, converts this NaN to
+| the common NaN form, and stores the resulting common NaN at the location
+| pointed to by 'zPtr'.  If the NaN is a signaling NaN, the invalid exception
+| is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128UIToCommonNaN( uiA64, uiA0, zPtr ) if ( ! ((uiA64) & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and returns the bit pattern of this value as an unsigned integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128UI
+INLINE
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN *aPtr )
+{
+    struct uint128 uiZ;
+    uiZ.v64 = defaultNaNF128UI64;
+    uiZ.v0  = defaultNaNF128UI0;
+    return uiZ;
+}
+#else
+struct uint128 softfloat_commonNaNToF128UI( const struct commonNaN * );
+#endif
+
+/*----------------------------------------------------------------------------
+| Interpreting the unsigned integer formed from concatenating 'uiA64' and
+| 'uiA0' as a 128-bit floating-point value, and likewise interpreting the
+| unsigned integer formed from concatenating 'uiB64' and 'uiB0' as another
+| 128-bit floating-point value, and assuming at least on of these floating-
+| point values is a NaN, returns the bit pattern of the combined NaN result.
+| If either original floating-point value is a signaling NaN, the invalid
+| exception is raised.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_propagateNaNF128UI(
+     uint_fast64_t uiA64,
+     uint_fast64_t uiA0,
+     uint_fast64_t uiB64,
+     uint_fast64_t uiB0
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+/*----------------------------------------------------------------------------
+| Assuming the 80-bit extended floating-point value pointed to by 'aSPtr' is
+| a NaN, converts this NaN to the common NaN form, and stores the resulting
+| common NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling
+| NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+#define softfloat_extF80MToCommonNaN( aSPtr, zPtr ) if ( ! ((aSPtr)->signif & UINT64_C( 0x4000000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into an 80-bit extended
+| floating-point NaN, and stores this NaN at the location pointed to by
+| 'zSPtr'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToExtF80M
+INLINE
+void
+ softfloat_commonNaNToExtF80M(
+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr )
+{
+    zSPtr->signExp = defaultNaNExtF80UI64;
+    zSPtr->signif  = defaultNaNExtF80UI0;
+}
+#else
+void
+ softfloat_commonNaNToExtF80M(
+     const struct commonNaN *aPtr, struct extFloat80M *zSPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 80-bit extended floating-point values
+| pointed to by 'aSPtr' and 'bSPtr' is a NaN, stores the combined NaN result
+| at the location pointed to by 'zSPtr'.  If either original floating-point
+| value is a signaling NaN, the invalid exception is raised.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNExtF80M(
+     const struct extFloat80M *aSPtr,
+     const struct extFloat80M *bSPtr,
+     struct extFloat80M *zSPtr
+ );
+
+/*----------------------------------------------------------------------------
+| The bit pattern for a default generated 128-bit floating-point NaN.
+*----------------------------------------------------------------------------*/
+#define defaultNaNF128UI96 0x7FFF8000
+#define defaultNaNF128UI64 0
+#define defaultNaNF128UI32 0
+#define defaultNaNF128UI0  0
+
+/*----------------------------------------------------------------------------
+| Assuming the 128-bit floating-point value pointed to by 'aWPtr' is a NaN,
+| converts this NaN to the common NaN form, and stores the resulting common
+| NaN at the location pointed to by 'zPtr'.  If the NaN is a signaling NaN,
+| the invalid exception is raised.  Argument 'aWPtr' points to an array of
+| four 32-bit elements that concatenate in the platform's normal endian order
+| to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#define softfloat_f128MToCommonNaN( aWPtr, zPtr ) if ( ! ((aWPtr)[indexWordHi( 4 )] & UINT64_C( 0x0000800000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
+
+/*----------------------------------------------------------------------------
+| Converts the common NaN pointed to by 'aPtr' into a 128-bit floating-point
+| NaN, and stores this NaN at the location pointed to by 'zWPtr'.  Argument
+| 'zWPtr' points to an array of four 32-bit elements that concatenate in the
+| platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+#if defined INLINE && ! defined softfloat_commonNaNToF128M
+INLINE
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
+{
+    zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
+    zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
+    zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
+    zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
+}
+#else
+void
+ softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr );
+#endif
+
+/*----------------------------------------------------------------------------
+| Assuming at least one of the two 128-bit floating-point values pointed to by
+| 'aWPtr' and 'bWPtr' is a NaN, stores the combined NaN result at the location
+| pointed to by 'zWPtr'.  If either original floating-point value is a
+| signaling NaN, the invalid exception is raised.  Each of 'aWPtr', 'bWPtr',
+| and 'zWPtr' points to an array of four 32-bit elements that concatenate in
+| the platform's normal endian order to form a 128-bit floating-point value.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_propagateNaNF128M(
+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr );
+
+#endif
+
+#endif
+
diff --git a/c_emulator/SoftFloat-3e/source/extF80M_add.c b/c_emulator/SoftFloat-3e/source/extF80M_add.c
new file mode 100644
index 0000000..02e415f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_add.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_add(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    extFloat80_t

+        (*magsFuncPtr)(

+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+#endif

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    signA = signExtF80UI64( uiA64 );

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    signB = signExtF80UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;

+    *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

+#else

+

+void

+ extF80M_add(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+

+    softfloat_addExtF80M(

+        (const struct extFloat80M *) aPtr,

+        (const struct extFloat80M *) bPtr,

+        (struct extFloat80M *) zPtr,

+        false

+    );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_div.c b/c_emulator/SoftFloat-3e/source/extF80M_div.c
new file mode 100644
index 0000000..4d543ce
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_div.c
@@ -0,0 +1,194 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_div(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+

+    *zPtr = extF80_div( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ extF80M_div(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiA64;

+    int32_t expA;

+    uint_fast16_t uiB64;

+    int32_t expB;

+    bool signZ;

+    uint64_t sigA, x64;

+    int32_t expZ;

+    int shiftDist;

+    uint32_t y[3], recip32, sigB[3];

+    int ix;

+    uint32_t q, qs[2];

+    uint_fast16_t uiZ64;

+    uint64_t uiZ0;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    expA = expExtF80UI64( uiA64 );

+    uiB64 = bSPtr->signExp;

+    expB = expExtF80UI64( uiB64 );

+    signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;

+        if ( expA == 0x7FFF ) {

+            if ( expB == 0x7FFF ) goto invalid;

+            goto infinity;

+        }

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigA = aSPtr->signif;

+    x64 = bSPtr->signif;

+    if ( ! expB ) expB = 1;

+    if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! x64 ) {

+            if ( ! sigA ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        expB += softfloat_normExtF80SigM( &x64 );

+    }

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) goto zero;

+        expA += softfloat_normExtF80SigM( &sigA );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x3FFF;

+    shiftDist = 29;

+    if ( sigA < x64 ) {

+        --expZ;

+        shiftDist = 30;

+    }

+    softfloat_shortShiftLeft64To96M( sigA, shiftDist, y );

+    recip32 = softfloat_approxRecip32_1( x64>>32 );

+    sigB[indexWord( 3, 0 )] = (uint32_t) x64<<30;

+    x64 >>= 2;

+    sigB[indexWord( 3, 2 )] = x64>>32;

+    sigB[indexWord( 3, 1 )] = x64;

+    ix = 2;

+    for (;;) {

+        x64 = (uint64_t) y[indexWordHi( 3 )] * recip32;

+        q = (x64 + 0x80000000)>>32;

+        --ix;

+        if ( ix < 0 ) break;

+        softfloat_remStep96MBy32( y, 29, sigB, q, y );

+        if ( y[indexWordHi( 3 )] & 0x80000000 ) {

+            --q;

+            softfloat_add96M( y, sigB, y );

+        }

+        qs[ix] = q;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ((q + 1) & 0x3FFFFF) < 2 ) {

+        softfloat_remStep96MBy32( y, 29, sigB, q, y );

+        if ( y[indexWordHi( 3 )] & 0x80000000 ) {

+            --q;

+            softfloat_add96M( y, sigB, y );

+        } else if ( softfloat_compare96M( sigB, y ) <= 0 ) {

+            ++q;

+            softfloat_sub96M( y, sigB, y );

+        }

+        if (

+            y[indexWordLo( 3 )] || y[indexWord( 3, 1 )] || y[indexWord( 3, 2 )]

+        ) {

+            q |= 1;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    x64 = (uint64_t) q<<9;

+    y[indexWord( 3, 0 )] = x64;

+    x64 = ((uint64_t) qs[0]<<6) + (x64>>32);

+    y[indexWord( 3, 1 )] = x64;

+    y[indexWord( 3, 2 )] = (qs[1]<<3) + (x64>>32);

+    softfloat_roundPackMToExtF80M(

+        signZ, expZ, y, extF80_roundingPrecision, zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidExtF80M( zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ64 = packToExtF80UI64( signZ, 0x7FFF );

+    uiZ0  = UINT64_C( 0x8000000000000000 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ64 = packToExtF80UI64( signZ, 0 );

+    uiZ0  = 0;

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif  = uiZ0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_eq.c b/c_emulator/SoftFloat-3e/source/extF80M_eq.c
new file mode 100644
index 0000000..e17aa24
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_eq.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_eq( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_eq( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( uiA0 == uiB0 ) {

+        return (uiA64 == uiB64) || ! uiA0;

+    } else {

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr );

+        }

+        return false;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_eq_signaling.c b/c_emulator/SoftFloat-3e/source/extF80M_eq_signaling.c
new file mode 100644
index 0000000..c4a7322
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_eq_signaling.c
@@ -0,0 +1,92 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_eq_signaling( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_eq_signaling( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( uiA0 == uiB0 ) {

+        return (uiA64 == uiB64) || ! uiA0;

+    } else {

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return ! softfloat_compareNonnormExtF80M( aSPtr, bSPtr );

+        }

+        return false;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_le.c b/c_emulator/SoftFloat-3e/source/extF80M_le.c
new file mode 100644
index 0000000..e54eb9e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_le.c
@@ -0,0 +1,106 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_le( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_le( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    bool signA, ltMags;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signExtF80UI64( uiA64 );

+    if ( (uiA64 ^ uiB64) & 0x8000 ) {

+        /*--------------------------------------------------------------------

+        | Signs are different.

+        *--------------------------------------------------------------------*/

+        return signA || ! (uiA0 | uiB0);

+    } else {

+        /*--------------------------------------------------------------------

+        | Signs are the same.

+        *--------------------------------------------------------------------*/

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0);

+        }

+        if ( uiA64 == uiB64 ) {

+            if ( uiA0 == uiB0 ) return true;

+            ltMags = (uiA0 < uiB0);

+        } else {

+            ltMags = (uiA64 < uiB64);

+        }

+        return signA ^ ltMags;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_le_quiet.c b/c_emulator/SoftFloat-3e/source/extF80M_le_quiet.c
new file mode 100644
index 0000000..943f262
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_le_quiet.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_le_quiet( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_le_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    bool signA, ltMags;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signExtF80UI64( uiA64 );

+    if ( (uiA64 ^ uiB64) & 0x8000 ) {

+        /*--------------------------------------------------------------------

+        | Signs are different.

+        *--------------------------------------------------------------------*/

+        return signA || ! (uiA0 | uiB0);

+    } else {

+        /*--------------------------------------------------------------------

+        | Signs are the same.

+        *--------------------------------------------------------------------*/

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) <= 0);

+        }

+        if ( uiA64 == uiB64 ) {

+            if ( uiA0 == uiB0 ) return true;

+            ltMags = (uiA0 < uiB0);

+        } else {

+            ltMags = (uiA64 < uiB64);

+        }

+        return signA ^ ltMags;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_lt.c b/c_emulator/SoftFloat-3e/source/extF80M_lt.c
new file mode 100644
index 0000000..cbc562f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_lt.c
@@ -0,0 +1,106 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_lt( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_lt( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    bool signA, ltMags;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signExtF80UI64( uiA64 );

+    if ( (uiA64 ^ uiB64) & 0x8000 ) {

+        /*--------------------------------------------------------------------

+        | Signs are different.

+        *--------------------------------------------------------------------*/

+        return signA && ((uiA0 | uiB0) != 0);

+    } else {

+        /*--------------------------------------------------------------------

+        | Signs are the same.

+        *--------------------------------------------------------------------*/

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0);

+        }

+        if ( uiA64 == uiB64 ) {

+            if ( uiA0 == uiB0 ) return false;

+            ltMags = (uiA0 < uiB0);

+        } else {

+            ltMags = (uiA64 < uiB64);

+        }

+        return signA ^ ltMags;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_lt_quiet.c b/c_emulator/SoftFloat-3e/source/extF80M_lt_quiet.c
new file mode 100644
index 0000000..650586d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_lt_quiet.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+

+    return extF80_lt_quiet( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool extF80M_lt_quiet( const extFloat80_t *aPtr, const extFloat80_t *bPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint64_t uiA0;

+    uint_fast16_t uiB64;

+    uint64_t uiB0;

+    bool signA, ltMags;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signExtF80UI64( uiA64 );

+    if ( (uiA64 ^ uiB64) & 0x8000 ) {

+        /*--------------------------------------------------------------------

+        | Signs are different.

+        *--------------------------------------------------------------------*/

+        return signA && ((uiA0 | uiB0) != 0);

+    } else {

+        /*--------------------------------------------------------------------

+        | Signs are the same.

+        *--------------------------------------------------------------------*/

+        if ( ! ((uiA0 & uiB0) & UINT64_C( 0x8000000000000000 )) ) {

+            return (softfloat_compareNonnormExtF80M( aSPtr, bSPtr ) < 0);

+        }

+        if ( uiA64 == uiB64 ) {

+            if ( uiA0 == uiB0 ) return false;

+            ltMags = (uiA0 < uiB0);

+        } else {

+            ltMags = (uiA64 < uiB64);

+        }

+        return signA ^ ltMags;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_mul.c b/c_emulator/SoftFloat-3e/source/extF80M_mul.c
new file mode 100644
index 0000000..281394f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_mul.c
@@ -0,0 +1,139 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_mul(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+

+    *zPtr = extF80_mul( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ extF80M_mul(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiA64;

+    int32_t expA;

+    uint_fast16_t uiB64;

+    int32_t expB;

+    bool signZ;

+    uint_fast16_t exp, uiZ64;

+    uint64_t uiZ0, sigA, sigB;

+    int32_t expZ;

+    uint32_t sigProd[4], *extSigZPtr;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    expA = expExtF80UI64( uiA64 );

+    uiB64 = bSPtr->signExp;

+    expB = expExtF80UI64( uiB64 );

+    signZ = signExtF80UI64( uiA64 ) ^ signExtF80UI64( uiB64 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;

+        if (

+               (! aSPtr->signif && (expA != 0x7FFF))

+            || (! bSPtr->signif && (expB != 0x7FFF))

+        ) {

+            softfloat_invalidExtF80M( zSPtr );

+            return;

+        }

+        uiZ64 = packToExtF80UI64( signZ, 0x7FFF );

+        uiZ0  = UINT64_C( 0x8000000000000000 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) expA = 1;

+    sigA = aSPtr->signif;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) goto zero;

+        expA += softfloat_normExtF80SigM( &sigA );

+    }

+    if ( ! expB ) expB = 1;

+    sigB = bSPtr->signif;

+    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigB ) goto zero;

+        expB += softfloat_normExtF80SigM( &sigB );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FFE;

+    softfloat_mul64To128M( sigA, sigB, sigProd );

+    if ( sigProd[indexWordLo( 4 )] ) sigProd[indexWord( 4, 1 )] |= 1;

+    extSigZPtr = &sigProd[indexMultiwordHi( 4, 3 )];

+    if ( sigProd[indexWordHi( 4 )] < 0x80000000 ) {

+        --expZ;

+        softfloat_add96M( extSigZPtr, extSigZPtr, extSigZPtr );

+    }

+    softfloat_roundPackMToExtF80M(

+        signZ, expZ, extSigZPtr, extF80_roundingPrecision, zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ64 = packToExtF80UI64( signZ, 0 );

+    uiZ0  = 0;

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif  = uiZ0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_rem.c b/c_emulator/SoftFloat-3e/source/extF80M_rem.c
new file mode 100644
index 0000000..4aff18a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_rem.c
@@ -0,0 +1,204 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_rem(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+

+    *zPtr = extF80_rem( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ extF80M_rem(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiA64;

+    int32_t expA, expB;

+    uint64_t x64;

+    bool signRem;

+    uint64_t sigA;

+    int32_t expDiff;

+    uint32_t rem[3], x[3], sig32B, q, recip32, rem2[3], *remPtr, *altRemPtr;

+    uint32_t *newRemPtr, wordMeanRem;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    expA = expExtF80UI64( uiA64 );

+    expB = expExtF80UI64( bSPtr->signExp );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;

+        if ( expA == 0x7FFF ) goto invalid;

+        /*--------------------------------------------------------------------

+        | If we get here, then argument b is an infinity and `expB' is 0x7FFF;

+        | Doubling `expB' is an easy way to ensure that `expDiff' later is

+        | less than -1, which will result in returning a canonicalized version

+        | of argument a.

+        *--------------------------------------------------------------------*/

+        expB += expB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) expB = 1;

+    x64 = bSPtr->signif;

+    if ( ! (x64 & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! x64 ) goto invalid;

+        expB += softfloat_normExtF80SigM( &x64 );

+    }

+    signRem = signExtF80UI64( uiA64 );

+    if ( ! expA ) expA = 1;

+    sigA = aSPtr->signif;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) {

+            expA = 0;

+            goto copyA;

+        }

+        expA += softfloat_normExtF80SigM( &sigA );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( expDiff < -1 ) goto copyA;

+    rem[indexWord( 3, 2 )] = sigA>>34;

+    rem[indexWord( 3, 1 )] = sigA>>2;

+    rem[indexWord( 3, 0 )] = (uint32_t) sigA<<30;

+    x[indexWord( 3, 0 )] = (uint32_t) x64<<30;

+    sig32B = x64>>32;

+    x64 >>= 2;

+    x[indexWord( 3, 2 )] = x64>>32;

+    x[indexWord( 3, 1 )] = x64;

+    if ( expDiff < 1 ) {

+        if ( expDiff ) {

+            --expB;

+            softfloat_add96M( x, x, x );

+            q = 0;

+        } else {

+            q = (softfloat_compare96M( x, rem ) <= 0);

+            if ( q ) softfloat_sub96M( rem, x, rem );

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( sig32B );

+        expDiff -= 30;

+        for (;;) {

+            x64 = (uint64_t) rem[indexWordHi( 3 )] * recip32;

+            if ( expDiff < 0 ) break;

+            q = (x64 + 0x80000000)>>32;

+            softfloat_remStep96MBy32( rem, 29, x, q, rem );

+            if ( rem[indexWordHi( 3 )] & 0x80000000 ) {

+                softfloat_add96M( rem, x, rem );

+            }

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -29 here.)

+        *--------------------------------------------------------------------*/

+        q = (uint32_t) (x64>>32)>>(~expDiff & 31);

+        softfloat_remStep96MBy32( rem, expDiff + 30, x, q, rem );

+        if ( rem[indexWordHi( 3 )] & 0x80000000 ) {

+            remPtr = rem;

+            altRemPtr = rem2;

+            softfloat_add96M( remPtr, x, altRemPtr );

+            goto selectRem;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    remPtr = rem;

+    altRemPtr = rem2;

+    do {

+        ++q;

+        newRemPtr = altRemPtr;

+        softfloat_sub96M( remPtr, x, newRemPtr );

+        altRemPtr = remPtr;

+        remPtr = newRemPtr;

+    } while ( ! (remPtr[indexWordHi( 3 )] & 0x80000000) );

+ selectRem:

+    softfloat_add96M( remPtr, altRemPtr, x );

+    wordMeanRem = x[indexWordHi( 3 )];

+    if (

+        (wordMeanRem & 0x80000000)

+            || (! wordMeanRem && (q & 1) && ! x[indexWord( 3, 0 )]

+                    && ! x[indexWord( 3, 1 )])

+    ) {

+        remPtr = altRemPtr;

+    }

+    if ( remPtr[indexWordHi( 3 )] & 0x80000000 ) {

+        signRem = ! signRem;

+        softfloat_negX96M( remPtr );

+    }

+    softfloat_normRoundPackMToExtF80M( signRem, expB + 2, remPtr, 80, zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidExtF80M( zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ copyA:

+    if ( expA < 1 ) {

+        sigA >>= 1 - expA;

+        expA = 0;

+    }

+    zSPtr->signExp = packToExtF80UI64( signRem, expA );

+    zSPtr->signif = sigA;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_roundToInt.c b/c_emulator/SoftFloat-3e/source/extF80M_roundToInt.c
new file mode 100644
index 0000000..2e85729
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_roundToInt.c
@@ -0,0 +1,176 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_roundToInt(

+     const extFloat80_t *aPtr,

+     uint_fast8_t roundingMode,

+     bool exact,

+     extFloat80_t *zPtr

+ )

+{

+

+    *zPtr = extF80_roundToInt( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+void

+ extF80M_roundToInt(

+     const extFloat80_t *aPtr,

+     uint_fast8_t roundingMode,

+     bool exact,

+     extFloat80_t *zPtr

+ )

+{

+    const struct extFloat80M *aSPtr;

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiA64, signUI64;

+    int32_t exp;

+    uint64_t sigA;

+    uint_fast16_t uiZ64;

+    uint64_t sigZ, lastBitMask, roundBitsMask;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    signUI64 = uiA64 & packToExtF80UI64( 1, 0 );

+    exp = expExtF80UI64( uiA64 );

+    sigA = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) {

+        if ( !sigA ) {

+            uiZ64 = signUI64;

+            sigZ = 0;

+            goto uiZ;

+        }

+        exp += softfloat_normExtF80SigM( &sigA );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp <= 0x3FFE ) {

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0x3FFE ) goto mag1;

+            break;

+         case softfloat_round_min:

+            if ( signUI64 ) goto mag1;

+            break;

+         case softfloat_round_max:

+            if ( !signUI64 ) goto mag1;

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            goto mag1;

+#endif

+        }

+        uiZ64 = signUI64;

+        sigZ = 0;

+        goto uiZ;

+     mag1:

+        uiZ64 = signUI64 | 0x3FFF;

+        sigZ = UINT64_C( 0x8000000000000000 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x403E <= exp ) {

+        if ( exp == 0x7FFF ) {

+            if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+                softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr );

+                return;

+            }

+            sigZ = UINT64_C( 0x8000000000000000 );

+        } else {

+            sigZ = sigA;

+        }

+        uiZ64 = signUI64 | exp;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = signUI64 | exp;

+    lastBitMask = (uint64_t) 1<<(0x403E - exp);

+    roundBitsMask = lastBitMask - 1;

+    sigZ = sigA;

+    if ( roundingMode == softfloat_round_near_maxMag ) {

+        sigZ += lastBitMask>>1;

+    } else if ( roundingMode == softfloat_round_near_even ) {

+        sigZ += lastBitMask>>1;

+        if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask;

+    } else if (

+        roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max)

+    ) {

+        sigZ += roundBitsMask;

+    }

+    sigZ &= ~roundBitsMask;

+    if ( !sigZ ) {

+        ++uiZ64;

+        sigZ = UINT64_C( 0x8000000000000000 );

+    }

+    if ( sigZ != sigA ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = sigZ;

+    return;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_sqrt.c b/c_emulator/SoftFloat-3e/source/extF80M_sqrt.c
new file mode 100644
index 0000000..7ee91e0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_sqrt.c
@@ -0,0 +1,180 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr )

+{

+

+    *zPtr = extF80_sqrt( *aPtr );

+

+}

+

+#else

+

+void extF80M_sqrt( const extFloat80_t *aPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr;

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiA64, signUI64;

+    int32_t expA;

+    uint64_t rem64;

+    int32_t expZ;

+    uint32_t rem96[3], sig32A, recipSqrt32, sig32Z, q;

+    uint64_t sig64Z, x64;

+    uint32_t rem32, term[4], rem[4], extSigZ[3];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    signUI64 = uiA64 & packToExtF80UI64( 1, 0 );

+    expA = expExtF80UI64( uiA64 );

+    rem64 = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if ( rem64 & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_propagateNaNExtF80M( aSPtr, 0, zSPtr );

+            return;

+        }

+        if ( signUI64 ) goto invalid;

+        rem64 = UINT64_C( 0x8000000000000000 );

+        goto copyA;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) expA = 1;

+    if ( ! (rem64 & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! rem64 ) {

+            uiA64 = signUI64;

+            goto copyA;

+        }

+        expA += softfloat_normExtF80SigM( &rem64 );

+    }

+    if ( signUI64 ) goto invalid;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x3FFF)>>1) + 0x3FFF;

+    expA &= 1;

+    softfloat_shortShiftLeft64To96M( rem64, 30 - expA, rem96 );

+    sig32A = rem64>>32;

+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );

+    sig32Z = ((uint64_t) sig32A * recipSqrt32)>>32;

+    if ( expA ) sig32Z >>= 1;

+    rem64 =

+        ((uint64_t) rem96[indexWord( 3, 2 )]<<32 | rem96[indexWord( 3, 1 )])

+            - (uint64_t) sig32Z * sig32Z;

+    rem96[indexWord( 3, 2 )] = rem64>>32;

+    rem96[indexWord( 3, 1 )] = rem64;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32;

+    sig64Z = ((uint64_t) sig32Z<<32) + ((uint64_t) q<<3);

+    term[indexWord( 3, 2 )] = 0;

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        x64 = ((uint64_t) sig32Z<<32) + sig64Z;

+        term[indexWord( 3, 1 )] = x64>>32;

+        term[indexWord( 3, 0 )] = x64;

+        softfloat_remStep96MBy32(

+            rem96, 29, term, q, &rem[indexMultiwordHi( 4, 3 )] );

+        rem32 = rem[indexWord( 4, 3 )];

+        if ( ! (rem32 & 0x80000000) ) break;

+        --q;

+        sig64Z -= 1<<3;

+    }

+    rem64 = (uint64_t) rem32<<32 | rem[indexWord( 4, 2 )];

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = (((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32) + 2;

+    if ( rem64>>34 ) q += recipSqrt32;

+    x64 = (uint64_t) q<<7;

+    extSigZ[indexWord( 3, 0 )] = x64;

+    x64 = (sig64Z<<1) + (x64>>32);

+    extSigZ[indexWord( 3, 2 )] = x64>>32;

+    extSigZ[indexWord( 3, 1 )] = x64;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (q & 0xFFFFFF) <= 2 ) {

+        q &= ~(uint32_t) 0xFFFF;

+        extSigZ[indexWordLo( 3 )] = q<<7;

+        x64 = sig64Z + (q>>27);

+        term[indexWord( 4, 3 )] = 0;

+        term[indexWord( 4, 2 )] = x64>>32;

+        term[indexWord( 4, 1 )] = x64;

+        term[indexWord( 4, 0 )] = q<<5;

+        rem[indexWord( 4, 0 )] = 0;

+        softfloat_remStep128MBy32( rem, 28, term, q, rem );

+        q = rem[indexWordHi( 4 )];

+        if ( q & 0x80000000 ) {

+            softfloat_sub1X96M( extSigZ );

+        } else {

+            if ( q || rem[indexWord( 4, 1 )] || rem[indexWord( 4, 2 )] ) {

+                extSigZ[indexWordLo( 3 )] |= 1;

+            }

+        }

+    }

+    softfloat_roundPackMToExtF80M(

+        0, expZ, extSigZ, extF80_roundingPrecision, zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidExtF80M( zSPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ copyA:

+    zSPtr->signExp = uiA64;

+    zSPtr->signif  = rem64;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_sub.c b/c_emulator/SoftFloat-3e/source/extF80M_sub.c
new file mode 100644
index 0000000..5d1895c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_sub.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ extF80M_sub(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+    const struct extFloat80M *aSPtr, *bSPtr;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    extFloat80_t

+        (*magsFuncPtr)(

+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+#endif

+

+    aSPtr = (const struct extFloat80M *) aPtr;

+    bSPtr = (const struct extFloat80M *) bPtr;

+    uiA64 = aSPtr->signExp;

+    uiA0  = aSPtr->signif;

+    signA = signExtF80UI64( uiA64 );

+    uiB64 = bSPtr->signExp;

+    uiB0  = bSPtr->signif;

+    signB = signExtF80UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        *zPtr = softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        *zPtr = softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;

+    *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

+#else

+

+void

+ extF80M_sub(

+     const extFloat80_t *aPtr, const extFloat80_t *bPtr, extFloat80_t *zPtr )

+{

+

+    softfloat_addExtF80M(

+        (const struct extFloat80M *) aPtr,

+        (const struct extFloat80M *) bPtr,

+        (struct extFloat80M *) zPtr,

+        true

+    );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_f128M.c b/c_emulator/SoftFloat-3e/source/extF80M_to_f128M.c
new file mode 100644
index 0000000..da81e8d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_f128M.c
@@ -0,0 +1,125 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr )

+{

+

+    *zPtr = extF80_to_f128( *aPtr );

+

+}

+

+#else

+

+void extF80M_to_f128M( const extFloat80_t *aPtr, float128_t *zPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint32_t *zWPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    struct commonNaN commonNaN;

+    uint32_t uiZ96;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr[indexWord( 4, 0 )] = 0;

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );

+            softfloat_commonNaNToF128M( &commonNaN, zWPtr );

+            return;

+        }

+        uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) --exp;

+    if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sig ) {

+            uiZ96 = packToF128UI96( sign, 0, 0 );

+            goto uiZ;

+        }

+        exp += softfloat_normExtF80SigM( &sig );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr[indexWord( 4, 1 )] = (uint32_t) sig<<17;

+    sig >>= 15;

+    zWPtr[indexWord( 4, 2 )] = sig;

+    if ( exp < 0 ) {

+        zWPtr[indexWordHi( 4 )] = sig>>32;

+        softfloat_shiftRight96M(

+            &zWPtr[indexMultiwordHi( 4, 3 )],

+            -exp,

+            &zWPtr[indexMultiwordHi( 4, 3 )]

+        );

+        exp = 0;

+        sig = (uint64_t) zWPtr[indexWordHi( 4 )]<<32;

+    }

+    zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp, sig>>32 );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_f16.c b/c_emulator/SoftFloat-3e/source/extF80M_to_f16.c
new file mode 100644
index 0000000..5ae38d0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_f16.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float16_t extF80M_to_f16( const extFloat80_t *aPtr )

+{

+

+    return extF80_to_f16( *aPtr );

+

+}

+

+#else

+

+float16_t extF80M_to_f16( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    struct commonNaN commonNaN;

+    uint16_t uiZ, sig16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sig ) {

+            uiZ = packToF16UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        exp += softfloat_normExtF80SigM( &sig );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig16 = softfloat_shortShiftRightJam64( sig, 49 );

+    exp -= 0x3FF1;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x40 ) exp = -0x40;

+    }

+    return softfloat_roundPackToF16( sign, exp, sig16 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_f32.c b/c_emulator/SoftFloat-3e/source/extF80M_to_f32.c
new file mode 100644
index 0000000..47cf224
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_f32.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float32_t extF80M_to_f32( const extFloat80_t *aPtr )

+{

+

+    return extF80_to_f32( *aPtr );

+

+}

+

+#else

+

+float32_t extF80M_to_f32( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    struct commonNaN commonNaN;

+    uint32_t uiZ, sig32;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sig ) {

+            uiZ = packToF32UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        exp += softfloat_normExtF80SigM( &sig );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = softfloat_shortShiftRightJam64( sig, 33 );

+    exp -= 0x3F81;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF32( sign, exp, sig32 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_f64.c b/c_emulator/SoftFloat-3e/source/extF80M_to_f64.c
new file mode 100644
index 0000000..5f8f4aa
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_f64.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float64_t extF80M_to_f64( const extFloat80_t *aPtr )

+{

+

+    return extF80_to_f64( *aPtr );

+

+}

+

+#else

+

+float64_t extF80M_to_f64( const extFloat80_t *aPtr )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    struct commonNaN commonNaN;

+    uint64_t uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80MToCommonNaN( aSPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! (sig & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sig ) {

+            uiZ = packToF64UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        exp += softfloat_normExtF80SigM( &sig );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = softfloat_shortShiftRightJam64( sig, 1 );

+    exp -= 0x3C01;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF64( sign, exp, sig );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_i32.c b/c_emulator/SoftFloat-3e/source/extF80M_to_i32.c
new file mode 100644
index 0000000..06394e3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_i32.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast32_t

+ extF80M_to_i32(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return extF80_to_i32( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+int_fast32_t

+ extF80M_to_i32(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x4032 - exp;

+    if ( shiftDist <= 0 ) {

+        if ( sig>>32 ) goto invalid;

+        if ( -32 < shiftDist ) {

+            sig <<= -shiftDist;

+        } else {

+            if ( (uint32_t) sig ) goto invalid;

+        }

+    } else {

+        sig = softfloat_shiftRightJam64( sig, shiftDist );

+    }

+    return softfloat_roundToI32( sign, sig, roundingMode, exact );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i32_fromNaN

+            : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80M_to_i32_r_minMag.c
new file mode 100644
index 0000000..5f5cf59
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_i32_r_minMag.c
@@ -0,0 +1,120 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+

+    return extF80_to_i32_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    bool sign, raiseInexact;

+    int32_t z;

+    uint64_t shiftedSig;

+    uint32_t absZ;

+    union { uint32_t ui; int32_t i; } u;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! sig && (exp != 0x7FFF) ) return 0;

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        raiseInexact = exact;

+        z = 0;

+    } else {

+        sign = signExtF80UI64( uiA64 );

+        raiseInexact = false;

+        if ( shiftDist < 0 ) {

+            if ( sig>>32 || (shiftDist <= -31) ) goto invalid;

+            shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist;

+            if ( shiftedSig>>32 ) goto invalid;

+            absZ = shiftedSig;

+        } else {

+            shiftedSig = sig;

+            if ( shiftDist ) shiftedSig >>= shiftDist;

+            if ( shiftedSig>>32 ) goto invalid;

+            absZ = shiftedSig;

+            if ( exact && shiftDist ) {

+                raiseInexact = ((uint64_t) absZ<<shiftDist != sig);

+            }

+        }

+        if ( sign ) {

+            if ( 0x80000000 < absZ ) goto invalid;

+            u.ui = -absZ;

+            z = u.i;

+        } else {

+            if ( 0x80000000 <= absZ ) goto invalid;

+            z = absZ;

+        }

+    }

+    if ( raiseInexact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i32_fromNaN

+            : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_i64.c b/c_emulator/SoftFloat-3e/source/extF80M_to_i64.c
new file mode 100644
index 0000000..1b751dc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_i64.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast64_t

+ extF80M_to_i64(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return extF80_to_i64( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+int_fast64_t

+ extF80M_to_i64(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    uint32_t extSig[3];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist < 0 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    extSig[indexWord( 3, 2 )] = sig>>32;

+    extSig[indexWord( 3, 1 )] = sig;

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    return softfloat_roundMToI64( sign, extSig, roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80M_to_i64_r_minMag.c
new file mode 100644
index 0000000..ec9b928
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_i64_r_minMag.c
@@ -0,0 +1,115 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+

+    return extF80_to_i64_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    bool sign, raiseInexact;

+    int64_t z;

+    uint64_t absZ;

+    union { uint64_t ui; int64_t i; } u;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! sig && (exp != 0x7FFF) ) return 0;

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        raiseInexact = exact;

+        z = 0;

+    } else {

+        sign = signExtF80UI64( uiA64 );

+        raiseInexact = false;

+        if ( shiftDist < 0 ) {

+            if ( shiftDist <= -63 ) goto invalid;

+            shiftDist = -shiftDist;

+            absZ = sig<<shiftDist;

+            if ( absZ>>shiftDist != sig ) goto invalid;

+        } else {

+            absZ = sig;

+            if ( shiftDist ) absZ >>= shiftDist;

+            if ( exact && shiftDist ) raiseInexact = (absZ<<shiftDist != sig);

+        }

+        if ( sign ) {

+            if ( UINT64_C( 0x8000000000000000 ) < absZ ) goto invalid;

+            u.ui = -absZ;

+            z = u.i;

+        } else {

+            if ( UINT64_C( 0x8000000000000000 ) <= absZ ) goto invalid;

+            z = absZ;

+        }

+    }

+    if ( raiseInexact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ? i64_fromNaN

+            : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_ui32.c b/c_emulator/SoftFloat-3e/source/extF80M_to_ui32.c
new file mode 100644
index 0000000..983a1ee
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_ui32.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast32_t

+ extF80M_to_ui32(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return extF80_to_ui32( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+uint_fast32_t

+ extF80M_to_ui32(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x4032 - exp;

+    if ( shiftDist <= 0 ) {

+        if ( sig>>32 ) goto invalid;

+        if ( -32 < shiftDist ) {

+            sig <<= -shiftDist;

+        } else {

+            if ( (uint32_t) sig ) goto invalid;

+        }

+    } else {

+        sig = softfloat_shiftRightJam64( sig, shiftDist );

+    }

+    return softfloat_roundToUI32( sign, sig, roundingMode, exact );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            ? ui32_fromNaN

+            : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80M_to_ui32_r_minMag.c
new file mode 100644
index 0000000..e28b08d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_ui32_r_minMag.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+

+    return extF80_to_ui32_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    bool sign;

+    uint64_t shiftedSig;

+    uint32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! sig && (exp != 0x7FFF) ) return 0;

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( shiftDist < 0 ) {

+        if ( sign || sig>>32 || (shiftDist <= -31) ) goto invalid;

+        shiftedSig = (uint64_t) (uint32_t) sig<<-shiftDist;

+        if ( shiftedSig>>32 ) goto invalid;

+        z = shiftedSig;

+    } else {

+        shiftedSig = sig;

+        if ( shiftDist ) shiftedSig >>= shiftDist;

+        if ( shiftedSig>>32 ) goto invalid;

+        z = shiftedSig;

+        if ( sign && z ) goto invalid;

+        if ( exact && shiftDist && ((uint64_t) z<<shiftDist != sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            ? ui32_fromNaN

+            : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_ui64.c b/c_emulator/SoftFloat-3e/source/extF80M_to_ui64.c
new file mode 100644
index 0000000..9d4ef4a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_ui64.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast64_t

+ extF80M_to_ui64(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return extF80_to_ui64( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+uint_fast64_t

+ extF80M_to_ui64(

+     const extFloat80_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    bool sign;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    uint32_t extSig[3];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist < 0 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    extSig[indexWord( 3, 2 )] = sig>>32;

+    extSig[indexWord( 3, 1 )] = sig;

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    return softfloat_roundMToUI64( sign, extSig, roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80M_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80M_to_ui64_r_minMag.c
new file mode 100644
index 0000000..87d8089
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80M_to_ui64_r_minMag.c
@@ -0,0 +1,108 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+

+    return extF80_to_ui64_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *aPtr, bool exact )

+{

+    const struct extFloat80M *aSPtr;

+    uint_fast16_t uiA64;

+    int32_t exp;

+    uint64_t sig;

+    int32_t shiftDist;

+    bool sign;

+    uint64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aSPtr = (const struct extFloat80M *) aPtr;

+    uiA64 = aSPtr->signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = aSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! sig && (exp != 0x7FFF) ) return 0;

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( shiftDist < 0 ) {

+        if ( sign || (shiftDist <= -63) ) goto invalid;

+        shiftDist = -shiftDist;

+        z = sig<<shiftDist;

+        if ( z>>shiftDist != sig ) goto invalid;

+    } else {

+        z = sig;

+        if ( shiftDist ) z >>= shiftDist;

+        if ( sign && z ) goto invalid;

+        if ( exact && shiftDist && (z<<shiftDist != sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            ? ui64_fromNaN

+            : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_add.c b/c_emulator/SoftFloat-3e/source/extF80_add.c
new file mode 100644
index 0000000..164cb05
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_add.c
@@ -0,0 +1,80 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_add( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    extFloat80_t

+        (*magsFuncPtr)(

+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    signB = signExtF80UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_addMagsExtF80 : softfloat_subMagsExtF80;

+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_div.c b/c_emulator/SoftFloat-3e/source/extF80_div.c
new file mode 100644
index 0000000..28dfb13
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_div.c
@@ -0,0 +1,203 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_div( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+    int_fast32_t expB;

+    uint_fast64_t sigB;

+    bool signZ;

+    struct exp32_sig64 normExpSig;

+    int_fast32_t expZ;

+    struct uint128 rem;

+    uint_fast32_t recip32;

+    uint_fast64_t sigZ;

+    int ix;

+    uint_fast64_t q64;

+    uint_fast32_t q;

+    struct uint128 term;

+    uint_fast64_t sigZExtra;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    expA  = expExtF80UI64( uiA64 );

+    sigA  = uiA0;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    signB = signExtF80UI64( uiB64 );

+    expB  = expExtF80UI64( uiB64 );

+    sigB  = uiB0;

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        if ( expB == 0x7FFF ) {

+            if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+            goto invalid;

+        }

+        goto infinity;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) expB = 1;

+    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigB ) {

+            if ( ! sigA ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigB );

+        expB += normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigA );

+        expA += normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x3FFF;

+    if ( sigA < sigB ) {

+        --expZ;

+        rem = softfloat_shortShiftLeft128( 0, sigA, 32 );

+    } else {

+        rem = softfloat_shortShiftLeft128( 0, sigA, 31 );

+    }

+    recip32 = softfloat_approxRecip32_1( sigB>>32 );

+    sigZ = 0;

+    ix = 2;

+    for (;;) {

+        q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32;

+        q = (q64 + 0x80000000)>>32;

+        --ix;

+        if ( ix < 0 ) break;

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+        term = softfloat_mul64ByShifted32To128( sigB, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            --q;

+            rem = softfloat_add128( rem.v64, rem.v0, sigB>>32, sigB<<32 );

+        }

+        sigZ = (sigZ<<29) + q;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ((q + 1) & 0x3FFFFF) < 2 ) {

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+        term = softfloat_mul64ByShifted32To128( sigB, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        term = softfloat_shortShiftLeft128( 0, sigB, 32 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            --q;

+            rem = softfloat_add128( rem.v64, rem.v0, term.v64, term.v0 );

+        } else if ( softfloat_le128( term.v64, term.v0, rem.v64, rem.v0 ) ) {

+            ++q;

+            rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        }

+        if ( rem.v64 | rem.v0 ) q |= 1;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigZ = (sigZ<<6) + (q>>23);

+    sigZExtra = (uint64_t) ((uint_fast64_t) q<<41);

+    return

+        softfloat_roundPackToExtF80(

+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );

+    uiZ64 = uiZ.v64;

+    uiZ0  = uiZ.v0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ64 = defaultNaNExtF80UI64;

+    uiZ0  = defaultNaNExtF80UI0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ64 = packToExtF80UI64( signZ, 0x7FFF );

+    uiZ0  = UINT64_C( 0x8000000000000000 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ64 = packToExtF80UI64( signZ, 0 );

+    uiZ0  = 0;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_eq.c b/c_emulator/SoftFloat-3e/source/extF80_eq.c
new file mode 100644
index 0000000..efcbc37
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_eq.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_eq( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    return

+           (uiA0 == uiB0)

+        && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF)));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_eq_signaling.c b/c_emulator/SoftFloat-3e/source/extF80_eq_signaling.c
new file mode 100644
index 0000000..193b191
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_eq_signaling.c
@@ -0,0 +1,67 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool extF80_eq_signaling( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    return

+           (uiA0 == uiB0)

+        && ((uiA64 == uiB64) || (! uiA0 && ! ((uiA64 | uiB64) & 0x7FFF)));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/extF80_isSignalingNaN.c
new file mode 100644
index 0000000..33d2abd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_isSignalingNaN.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_isSignalingNaN( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+

+    uA.f = a;

+    return softfloat_isSigNaNExtF80UI( uA.s.signExp, uA.s.signif );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_le.c b/c_emulator/SoftFloat-3e/source/extF80_le.c
new file mode 100644
index 0000000..4e23c51
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_le.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_le( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signExtF80UI64( uiA64 );

+    signB = signExtF80UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)

+            : ((uiA64 == uiB64) && (uiA0 == uiB0))

+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_le_quiet.c b/c_emulator/SoftFloat-3e/source/extF80_le_quiet.c
new file mode 100644
index 0000000..9839e47
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_le_quiet.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_le_quiet( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signExtF80UI64( uiA64 );

+    signB = signExtF80UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA || ! (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)

+            : ((uiA64 == uiB64) && (uiA0 == uiB0))

+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_lt.c b/c_emulator/SoftFloat-3e/source/extF80_lt.c
new file mode 100644
index 0000000..a4ac69f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_lt.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_lt( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signExtF80UI64( uiA64 );

+    signB = signExtF80UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)

+            : ((uiA64 != uiB64) || (uiA0 != uiB0))

+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_lt_quiet.c b/c_emulator/SoftFloat-3e/source/extF80_lt_quiet.c
new file mode 100644
index 0000000..00f4d47
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_lt_quiet.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool extF80_lt_quiet( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    if ( isNaNExtF80UI( uiA64, uiA0 ) || isNaNExtF80UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNExtF80UI( uiA64, uiA0 )

+            || softfloat_isSigNaNExtF80UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signExtF80UI64( uiA64 );

+    signB = signExtF80UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA && (((uiA64 | uiB64) & 0x7FFF) | uiA0 | uiB0)

+            : ((uiA64 != uiB64) || (uiA0 != uiB0))

+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_mul.c b/c_emulator/SoftFloat-3e/source/extF80_mul.c
new file mode 100644
index 0000000..39ce401
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_mul.c
@@ -0,0 +1,158 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_mul( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+    int_fast32_t expB;

+    uint_fast64_t sigB;

+    bool signZ;

+    uint_fast64_t magBits;

+    struct exp32_sig64 normExpSig;

+    int_fast32_t expZ;

+    struct uint128 sig128Z, uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    expA  = expExtF80UI64( uiA64 );

+    sigA  = uiA0;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    signB = signExtF80UI64( uiB64 );

+    expB  = expExtF80UI64( uiB64 );

+    sigB  = uiB0;

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if (

+               (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF )))

+        ) {

+            goto propagateNaN;

+        }

+        magBits = expB | sigB;

+        goto infArg;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        magBits = expA | sigA;

+        goto infArg;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigA );

+        expA += normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) expB = 1;

+    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigB ) goto zero;

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigB );

+        expB += normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FFE;

+    sig128Z = softfloat_mul64To128( sigA, sigB );

+    if ( sig128Z.v64 < UINT64_C( 0x8000000000000000 ) ) {

+        --expZ;

+        sig128Z =

+            softfloat_add128(

+                sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0 );

+    }

+    return

+        softfloat_roundPackToExtF80(

+            signZ, expZ, sig128Z.v64, sig128Z.v0, extF80_roundingPrecision );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );

+    uiZ64 = uiZ.v64;

+    uiZ0  = uiZ.v0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infArg:

+    if ( ! magBits ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ64 = defaultNaNExtF80UI64;

+        uiZ0  = defaultNaNExtF80UI0;

+    } else {

+        uiZ64 = packToExtF80UI64( signZ, 0x7FFF );

+        uiZ0  = UINT64_C( 0x8000000000000000 );

+    }

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ64 = packToExtF80UI64( signZ, 0 );

+    uiZ0  = 0;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_rem.c b/c_emulator/SoftFloat-3e/source/extF80_rem.c
new file mode 100644
index 0000000..5ad9775
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_rem.c
@@ -0,0 +1,225 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_rem( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    int_fast32_t expB;

+    uint_fast64_t sigB;

+    struct exp32_sig64 normExpSig;

+    int_fast32_t expDiff;

+    struct uint128 rem, shiftedSigB;

+    uint_fast32_t q, recip32;

+    uint_fast64_t q64;

+    struct uint128 term, altRem, meanRem;

+    bool signRem;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    expA  = expExtF80UI64( uiA64 );

+    sigA  = uiA0;

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    expB  = expExtF80UI64( uiB64 );

+    sigB  = uiB0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if (

+               (sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            || ((expB == 0x7FFF) && (sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF )))

+        ) {

+            goto propagateNaN;

+        }

+        goto invalid;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        /*--------------------------------------------------------------------

+        | Argument b is an infinity.  Doubling `expB' is an easy way to ensure

+        | that `expDiff' later is less than -1, which will result in returning

+        | a canonicalized version of argument a.

+        *--------------------------------------------------------------------*/

+        expB += expB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) expB = 1;

+    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigB ) goto invalid;

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigB );

+        expB += normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) {

+            expA = 0;

+            goto copyA;

+        }

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigA );

+        expA += normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( expDiff < -1 ) goto copyA;

+    rem = softfloat_shortShiftLeft128( 0, sigA, 32 );

+    shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 32 );

+    if ( expDiff < 1 ) {

+        if ( expDiff ) {

+            --expB;

+            shiftedSigB = softfloat_shortShiftLeft128( 0, sigB, 33 );

+            q = 0;

+        } else {

+            q = (sigB <= sigA);

+            if ( q ) {

+                rem =

+                    softfloat_sub128(

+                        rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );

+            }

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( sigB>>32 );

+        expDiff -= 30;

+        for (;;) {

+            q64 = (uint_fast64_t) (uint32_t) (rem.v64>>2) * recip32;

+            if ( expDiff < 0 ) break;

+            q = (q64 + 0x80000000)>>32;

+            rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+            term = softfloat_mul64ByShifted32To128( sigB, q );

+            rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+            if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+                rem =

+                    softfloat_add128(

+                        rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );

+            }

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -29 here.)

+        *--------------------------------------------------------------------*/

+        q = (uint32_t) (q64>>32)>>(~expDiff & 31);

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 );

+        term = softfloat_mul64ByShifted32To128( sigB, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            altRem =

+                softfloat_add128(

+                    rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );

+            goto selectRem;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    do {

+        altRem = rem;

+        ++q;

+        rem =

+            softfloat_sub128(

+                rem.v64, rem.v0, shiftedSigB.v64, shiftedSigB.v0 );

+    } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) );

+ selectRem:

+    meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 );

+    if (

+        (meanRem.v64 & UINT64_C( 0x8000000000000000 ))

+            || (! (meanRem.v64 | meanRem.v0) && (q & 1))

+    ) {

+        rem = altRem;

+    }

+    signRem = signA;

+    if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+        signRem = ! signRem;

+        rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 );

+    }

+    return

+        softfloat_normRoundPackToExtF80(

+            signRem, rem.v64 | rem.v0 ? expB + 32 : 0, rem.v64, rem.v0, 80 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );

+    uiZ64 = uiZ.v64;

+    uiZ0  = uiZ.v0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ64 = defaultNaNExtF80UI64;

+    uiZ0  = defaultNaNExtF80UI0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ copyA:

+    if ( expA < 1 ) {

+        sigA >>= 1 - expA;

+        expA = 0;

+    }

+    uiZ64 = packToExtF80UI64( signA, expA );

+    uiZ0  = sigA;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_roundToInt.c b/c_emulator/SoftFloat-3e/source/extF80_roundToInt.c
new file mode 100644
index 0000000..6c12d84
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_roundToInt.c
@@ -0,0 +1,154 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t

+ extF80_roundToInt( extFloat80_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64, signUI64;

+    int_fast32_t exp;

+    uint_fast64_t sigA;

+    uint_fast16_t uiZ64;

+    uint_fast64_t sigZ;

+    struct exp32_sig64 normExpSig;

+    struct uint128 uiZ;

+    uint_fast64_t lastBitMask, roundBitsMask;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    signUI64 = uiA64 & packToExtF80UI64( 1, 0 );

+    exp = expExtF80UI64( uiA64 );

+    sigA = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( !(sigA & UINT64_C( 0x8000000000000000 )) && (exp != 0x7FFF) ) {

+        if ( !sigA ) {

+            uiZ64 = signUI64;

+            sigZ = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigA );

+        exp += normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x403E <= exp ) {

+        if ( exp == 0x7FFF ) {

+            if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+                uiZ = softfloat_propagateNaNExtF80UI( uiA64, sigA, 0, 0 );

+                uiZ64 = uiZ.v64;

+                sigZ  = uiZ.v0;

+                goto uiZ;

+            }

+            sigZ = UINT64_C( 0x8000000000000000 );

+        } else {

+            sigZ = sigA;

+        }

+        uiZ64 = signUI64 | exp;

+        goto uiZ;

+    }

+    if ( exp <= 0x3FFE ) {

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !(sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0x3FFE ) goto mag1;

+            break;

+         case softfloat_round_min:

+            if ( signUI64 ) goto mag1;

+            break;

+         case softfloat_round_max:

+            if ( !signUI64 ) goto mag1;

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            goto mag1;

+#endif

+        }

+        uiZ64 = signUI64;

+        sigZ  = 0;

+        goto uiZ;

+     mag1:

+        uiZ64 = signUI64 | 0x3FFF;

+        sigZ  = UINT64_C( 0x8000000000000000 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = signUI64 | exp;

+    lastBitMask = (uint_fast64_t) 1<<(0x403E - exp);

+    roundBitsMask = lastBitMask - 1;

+    sigZ = sigA;

+    if ( roundingMode == softfloat_round_near_maxMag ) {

+        sigZ += lastBitMask>>1;

+    } else if ( roundingMode == softfloat_round_near_even ) {

+        sigZ += lastBitMask>>1;

+        if ( !(sigZ & roundBitsMask) ) sigZ &= ~lastBitMask;

+    } else if (

+        roundingMode == (signUI64 ? softfloat_round_min : softfloat_round_max)

+    ) {

+        sigZ += roundBitsMask;

+    }

+    sigZ &= ~roundBitsMask;

+    if ( !sigZ ) {

+        ++uiZ64;

+        sigZ = UINT64_C( 0x8000000000000000 );

+    }

+    if ( sigZ != sigA ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) sigZ |= lastBitMask;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif = sigZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_sqrt.c b/c_emulator/SoftFloat-3e/source/extF80_sqrt.c
new file mode 100644
index 0000000..af8c496
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_sqrt.c
@@ -0,0 +1,176 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_sqrt( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    struct exp32_sig64 normExpSig;

+    int_fast32_t expZ;

+    uint_fast32_t sig32A, recipSqrt32, sig32Z;

+    struct uint128 rem;

+    uint_fast64_t q, x64, sigZ;

+    struct uint128 y, term;

+    uint_fast64_t sigZExtra;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    expA  = expExtF80UI64( uiA64 );

+    sigA  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, 0, 0 );

+            uiZ64 = uiZ.v64;

+            uiZ0  = uiZ.v0;

+            goto uiZ;

+        }

+        if ( ! signA ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signA ) {

+        if ( ! sigA ) goto zero;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalExtF80Sig( sigA );

+        expA += normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    | (`sig32Z' is guaranteed to be a lower bound on the square root of

+    | `sig32A', which makes `sig32Z' also a lower bound on the square root of

+    | `sigA'.)

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x3FFF)>>1) + 0x3FFF;

+    expA &= 1;

+    sig32A = sigA>>32;

+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );

+    sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32;

+    if ( expA ) {

+        sig32Z >>= 1;

+        rem = softfloat_shortShiftLeft128( 0, sigA, 61 );

+    } else {

+        rem = softfloat_shortShiftLeft128( 0, sigA, 62 );

+    }

+    rem.v64 -= (uint_fast64_t) sig32Z * sig32Z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32;

+    x64 = (uint_fast64_t) sig32Z<<32;

+    sigZ = x64 + (q<<3);

+    y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        term = softfloat_mul64ByShifted32To128( x64 + sigZ, q );

+        rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );

+        if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;

+        --q;

+        sigZ -= 1<<3;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = (((rem.v64>>2) * recipSqrt32)>>32) + 2;

+    x64 = sigZ;

+    sigZ = (sigZ<<1) + (q>>25);

+    sigZExtra = (uint64_t) (q<<39);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (q & 0xFFFFFF) <= 2 ) {

+        q &= ~(uint_fast64_t) 0xFFFF;

+        sigZExtra = (uint64_t) (q<<39);

+        term = softfloat_mul64ByShifted32To128( x64 + (q>>27), q );

+        x64 = (uint32_t) (q<<5) * (uint_fast64_t) (uint32_t) q;

+        term = softfloat_add128( term.v64, term.v0, 0, x64 );

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 28 );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            if ( ! sigZExtra ) --sigZ;

+            --sigZExtra;

+        } else {

+            if ( rem.v64 | rem.v0 ) sigZExtra |= 1;

+        }

+    }

+    return

+        softfloat_roundPackToExtF80(

+            0, expZ, sigZ, sigZExtra, extF80_roundingPrecision );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ64 = defaultNaNExtF80UI64;

+    uiZ0  = defaultNaNExtF80UI0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ64 = packToExtF80UI64( signA, 0 );

+    uiZ0  = 0;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_sub.c b/c_emulator/SoftFloat-3e/source/extF80_sub.c
new file mode 100644
index 0000000..770c756
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_sub.c
@@ -0,0 +1,80 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t extF80_sub( extFloat80_t a, extFloat80_t b )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool signA;

+    union { struct extFloat80M s; extFloat80_t f; } uB;

+    uint_fast16_t uiB64;

+    uint_fast64_t uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    extFloat80_t

+        (*magsFuncPtr)(

+            uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    signA = signExtF80UI64( uiA64 );

+    uB.f = b;

+    uiB64 = uB.s.signExp;

+    uiB0  = uB.s.signif;

+    signB = signExtF80UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_subMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        return softfloat_addMagsExtF80( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_subMagsExtF80 : softfloat_addMagsExtF80;

+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_f128.c b/c_emulator/SoftFloat-3e/source/extF80_to_f128.c
new file mode 100644
index 0000000..4de90ae
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_f128.c
@@ -0,0 +1,75 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t extF80_to_f128( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    uint_fast16_t exp;

+    uint_fast64_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    bool sign;

+    struct uint128 frac128;

+    union ui128_f128 uZ;

+

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    exp = expExtF80UI64( uiA64 );

+    frac = uiA0 & UINT64_C( 0x7FFFFFFFFFFFFFFF );

+    if ( (exp == 0x7FFF) && frac ) {

+        softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );

+        uiZ = softfloat_commonNaNToF128UI( &commonNaN );

+    } else {

+        sign = signExtF80UI64( uiA64 );

+        frac128 = softfloat_shortShiftLeft128( 0, frac, 49 );

+        uiZ.v64 = packToF128UI64( sign, exp, frac128.v64 );

+        uiZ.v0  = frac128.v0;

+    }

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_f16.c b/c_emulator/SoftFloat-3e/source/extF80_to_f16.c
new file mode 100644
index 0000000..5919403
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_f16.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t extF80_to_f16( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ, sig16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig16 = softfloat_shortShiftRightJam64( sig, 49 );

+    if ( ! (exp | sig16) ) {

+        uiZ = packToF16UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3FF1;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x40 ) exp = -0x40;

+    }

+    return softfloat_roundPackToF16( sign, exp, sig16 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_f32.c b/c_emulator/SoftFloat-3e/source/extF80_to_f32.c
new file mode 100644
index 0000000..77fcfdc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_f32.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t extF80_to_f32( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    struct commonNaN commonNaN;

+    uint_fast32_t uiZ, sig32;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = softfloat_shortShiftRightJam64( sig, 33 );

+    if ( ! (exp | sig32) ) {

+        uiZ = packToF32UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3F81;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF32( sign, exp, sig32 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_f64.c b/c_emulator/SoftFloat-3e/source/extF80_to_f64.c
new file mode 100644
index 0000000..410d662
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_f64.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t extF80_to_f64( extFloat80_t a )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    uint_fast64_t uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    struct commonNaN commonNaN;

+    uint_fast64_t uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    uiA0  = uA.s.signif;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! (exp | sig) ) {

+        uiZ = packToF64UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            softfloat_extF80UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = softfloat_shortShiftRightJam64( sig, 1 );

+    exp -= 0x3C01;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF64( sign, exp, sig );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_i32.c b/c_emulator/SoftFloat-3e/source/extF80_to_i32.c
new file mode 100644
index 0000000..9acdc3c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_i32.c
@@ -0,0 +1,83 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t

+ extF80_to_i32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) {

+#if (i32_fromNaN == i32_fromPosOverflow)

+        sign = 0;

+#elif (i32_fromNaN == i32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return i32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x4032 - exp;

+    if ( shiftDist <= 0 ) shiftDist = 1;

+    sig = softfloat_shiftRightJam64( sig, shiftDist );

+    return softfloat_roundToI32( sign, sig, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80_to_i32_r_minMag.c
new file mode 100644
index 0000000..0322467
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_i32_r_minMag.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t extF80_to_i32_r_minMag( extFloat80_t a, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    bool sign;

+    int_fast32_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( shiftDist < 33 ) {

+        if (

+            (uiA64 == packToExtF80UI64( 1, 0x401E ))

+                && (sig < UINT64_C( 0x8000000100000000 ))

+        ) {

+            if ( exact && (sig & UINT64_C( 0x00000000FFFFFFFF )) ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return -0x7FFFFFFF - 1;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    absZ = sig>>shiftDist;

+    if ( exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_i64.c b/c_emulator/SoftFloat-3e/source/extF80_to_i64.c
new file mode 100644
index 0000000..ba307a6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_i64.c
@@ -0,0 +1,89 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t

+ extF80_to_i64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    uint_fast64_t sigExtra;

+    struct uint64_extra sig64Extra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist <= 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( shiftDist ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            return

+                (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                    ? i64_fromNaN

+                    : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sigExtra = 0;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );

+        sig = sig64Extra.v;

+        sigExtra = sig64Extra.extra;

+    }

+    return softfloat_roundToI64( sign, sig, sigExtra, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80_to_i64_r_minMag.c
new file mode 100644
index 0000000..8871d01
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_i64_r_minMag.c
@@ -0,0 +1,94 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t extF80_to_i64_r_minMag( extFloat80_t a, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    bool sign;

+    int_fast64_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( shiftDist <= 0 ) {

+        if (

+            (uiA64 == packToExtF80UI64( 1, 0x403E ))

+                && (sig == UINT64_C( 0x8000000000000000 ))

+        ) {

+            return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    absZ = sig>>shiftDist;

+    if ( exact && (uint64_t) (sig<<(-shiftDist & 63)) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_ui32.c b/c_emulator/SoftFloat-3e/source/extF80_to_ui32.c
new file mode 100644
index 0000000..5812977
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_ui32.c
@@ -0,0 +1,83 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t

+ extF80_to_ui32( extFloat80_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) {

+#if (ui32_fromNaN == ui32_fromPosOverflow)

+        sign = 0;

+#elif (ui32_fromNaN == ui32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return ui32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x4032 - exp;

+    if ( shiftDist <= 0 ) shiftDist = 1;

+    sig = softfloat_shiftRightJam64( sig, shiftDist );

+    return softfloat_roundToUI32( sign, sig, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80_to_ui32_r_minMag.c
new file mode 100644
index 0000000..be2c53b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_ui32_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t a, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    bool sign;

+    uint_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( sign || (shiftDist < 32) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    z = sig>>shiftDist;

+    if ( exact && ((uint_fast64_t) z<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_ui64.c b/c_emulator/SoftFloat-3e/source/extF80_to_ui64.c
new file mode 100644
index 0000000..490b26a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_ui64.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t

+ extF80_to_ui64( extFloat80_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    uint_fast64_t sigExtra;

+    struct uint64_extra sig64Extra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    sign = signExtF80UI64( uiA64 );

+    exp  = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist < 0 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigExtra = 0;

+    if ( shiftDist ) {

+        sig64Extra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );

+        sig = sig64Extra.v;

+        sigExtra = sig64Extra.extra;

+    }

+    return softfloat_roundToUI64( sign, sig, sigExtra, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/extF80_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/extF80_to_ui64_r_minMag.c
new file mode 100644
index 0000000..eca688c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/extF80_to_ui64_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t a, bool exact )

+{

+    union { struct extFloat80M s; extFloat80_t f; } uA;

+    uint_fast16_t uiA64;

+    int_fast32_t exp;

+    uint_fast64_t sig;

+    int_fast32_t shiftDist;

+    bool sign;

+    uint_fast64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.s.signExp;

+    exp = expExtF80UI64( uiA64 );

+    sig = uA.s.signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signExtF80UI64( uiA64 );

+    if ( sign || (shiftDist < 0) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && (sig & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    z = sig>>shiftDist;

+    if ( exact && (z<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_add.c b/c_emulator/SoftFloat-3e/source/f128M_add.c
new file mode 100644
index 0000000..3062bee
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_add.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+    const uint64_t *aWPtr, *bWPtr;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float128_t

+        (*magsFuncPtr)(

+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    aWPtr = (const uint64_t *) aPtr;

+    bWPtr = (const uint64_t *) bPtr;

+    uiA64 = aWPtr[indexWord( 2, 1 )];

+    uiA0  = aWPtr[indexWord( 2, 0 )];

+    signA = signF128UI64( uiA64 );

+    uiB64 = bWPtr[indexWord( 2, 1 )];

+    uiB0  = bWPtr[indexWord( 2, 0 )];

+    signB = signF128UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        *zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        *zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128;

+    *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

+#else

+

+void

+ f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+

+    softfloat_addF128M(

+        (const uint32_t *) aPtr,

+        (const uint32_t *) bPtr,

+        (uint32_t *) zPtr,

+        false

+    );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_div.c b/c_emulator/SoftFloat-3e/source/f128M_div.c
new file mode 100644
index 0000000..b443548
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_div.c
@@ -0,0 +1,187 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+

+    *zPtr = f128_div( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ f128M_div( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t *zWPtr, uiA96;

+    bool signA;

+    int32_t expA;

+    uint32_t uiB96;

+    bool signB;

+    int32_t expB;

+    bool signZ;

+    uint32_t y[5], sigB[4];

+    int32_t expZ;

+    uint32_t recip32;

+    int ix;

+    uint64_t q64;

+    uint32_t q, qs[3], uiZ96;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    expA  = expF128UI96( uiA96 );

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    signB = signF128UI96( uiB96 );

+    expB  = expF128UI96( uiB96 );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;

+        if ( expA == 0x7FFF ) {

+            if ( expB == 0x7FFF ) goto invalid;

+            goto infinity;

+        }

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = softfloat_shiftNormSigF128M( aWPtr, 13, y );

+    expB = softfloat_shiftNormSigF128M( bWPtr, 13, sigB );

+    if ( expA == -128 ) {

+        if ( expB == -128 ) goto invalid;

+        goto zero;

+    }

+    if ( expB == -128 ) {

+        softfloat_raiseFlags( softfloat_flag_infinite );

+        goto infinity;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x3FFE;

+    if ( softfloat_compare128M( y, sigB ) < 0 ) {

+        --expZ;

+        softfloat_add128M( y, y, y );

+    }

+    recip32 =

+        softfloat_approxRecip32_1(

+            ((uint64_t) sigB[indexWord( 4, 3 )]<<32 | sigB[indexWord( 4, 2 )])

+                >>30

+        );

+    ix = 3;

+    for (;;) {

+        q64 = (uint64_t) y[indexWordHi( 4 )] * recip32;

+        q = (q64 + 0x80000000)>>32;

+        --ix;

+        if ( ix < 0 ) break;

+        softfloat_remStep128MBy32( y, 29, sigB, q, y );

+        if ( y[indexWordHi( 4 )] & 0x80000000 ) {

+            --q;

+            softfloat_add128M( y, sigB, y );

+        }

+        qs[ix] = q;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ((q + 1) & 7) < 2 ) {

+        softfloat_remStep128MBy32( y, 29, sigB, q, y );

+        if ( y[indexWordHi( 4 )] & 0x80000000 ) {

+            --q;

+            softfloat_add128M( y, sigB, y );

+        } else if ( softfloat_compare128M( sigB, y ) <= 0 ) {

+            ++q;

+            softfloat_sub128M( y, sigB, y );

+        }

+        if (

+            y[indexWordLo( 4 )] || y[indexWord( 4, 1 )]

+                || (y[indexWord( 4, 2 )] | y[indexWord( 4, 3 )])

+        ) {

+            q |= 1;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q64 = (uint64_t) q<<28;

+    y[indexWord( 5, 0 )] = q64;

+    q64 = ((uint64_t) qs[0]<<25) + (q64>>32);

+    y[indexWord( 5, 1 )] = q64;

+    q64 = ((uint64_t) qs[1]<<22) + (q64>>32);

+    y[indexWord( 5, 2 )] = q64;

+    q64 = ((uint64_t) qs[2]<<19) + (q64>>32);

+    y[indexWord( 5, 3 )] = q64;

+    y[indexWord( 5, 4 )] = q64>>32;

+    softfloat_roundPackMToF128M( signZ, expZ, y, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidF128M( zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 );

+    goto uiZ96;

+ zero:

+    uiZ96 = packToF128UI96( signZ, 0, 0 );

+ uiZ96:

+    zWPtr[indexWordHi( 4 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_eq.c b/c_emulator/SoftFloat-3e/source/f128M_eq.c
new file mode 100644
index 0000000..497fdbf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_eq.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_eq( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_eq( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t wordA, wordB, uiA96, uiB96;

+    bool possibleOppositeZeros;

+    uint32_t mashWord;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    wordA = aWPtr[indexWord( 4, 2 )];

+    wordB = bWPtr[indexWord( 4, 2 )];

+    if ( wordA != wordB ) goto false_checkSigNaNs;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    possibleOppositeZeros = false;

+    if ( uiA96 != uiB96 ) {

+        possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0);

+        if ( ! possibleOppositeZeros ) goto false_checkSigNaNs;

+    }

+    mashWord = wordA | wordB;

+    wordA = aWPtr[indexWord( 4, 1 )];

+    wordB = bWPtr[indexWord( 4, 1 )];

+    if ( wordA != wordB ) goto false_checkSigNaNs;

+    mashWord |= wordA | wordB;

+    wordA = aWPtr[indexWord( 4, 0 )];

+    wordB = bWPtr[indexWord( 4, 0 )];

+    if ( wordA != wordB ) goto false_checkSigNaNs;

+    if ( possibleOppositeZeros && ((mashWord | wordA | wordB) != 0) ) {

+        goto false_checkSigNaNs;

+    }

+    if ( ! softfloat_isNaNF128M( aWPtr ) && ! softfloat_isNaNF128M( bWPtr ) ) {

+        return true;

+    }

+ false_checkSigNaNs:

+    if (

+           f128M_isSignalingNaN( (const float128_t *) aWPtr )

+        || f128M_isSignalingNaN( (const float128_t *) bWPtr )

+    ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+    }

+    return false;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_eq_signaling.c b/c_emulator/SoftFloat-3e/source/f128M_eq_signaling.c
new file mode 100644
index 0000000..a9fa4d5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_eq_signaling.c
@@ -0,0 +1,92 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_eq_signaling( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_eq_signaling( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t wordA, wordB, uiA96, uiB96;

+    bool possibleOppositeZeros;

+    uint32_t mashWord;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    wordA = aWPtr[indexWord( 4, 2 )];

+    wordB = bWPtr[indexWord( 4, 2 )];

+    if ( wordA != wordB ) return false;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    possibleOppositeZeros = false;

+    if ( uiA96 != uiB96 ) {

+        possibleOppositeZeros = (((uiA96 | uiB96) & 0x7FFFFFFF) == 0);

+        if ( ! possibleOppositeZeros ) return false;

+    }

+    mashWord = wordA | wordB;

+    wordA = aWPtr[indexWord( 4, 1 )];

+    wordB = bWPtr[indexWord( 4, 1 )];

+    if ( wordA != wordB ) return false;

+    mashWord |= wordA | wordB;

+    wordA = aWPtr[indexWord( 4, 0 )];

+    wordB = bWPtr[indexWord( 4, 0 )];

+    return

+        (wordA == wordB)

+            && (! possibleOppositeZeros || ((mashWord | wordA | wordB) == 0));

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_le.c b/c_emulator/SoftFloat-3e/source/f128M_le.c
new file mode 100644
index 0000000..7306e45
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_le.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_le( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_le( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_le( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t uiA96, uiB96;

+    bool signA, signB;

+    uint32_t wordA, wordB;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    signB = signF128UI96( uiB96 );

+    if ( signA != signB ) {

+        if ( signA ) return true;

+        if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false;

+        wordA = aWPtr[indexWord( 4, 2 )];

+        wordB = bWPtr[indexWord( 4, 2 )];

+        if ( wordA | wordB ) return false;

+        wordA = aWPtr[indexWord( 4, 1 )];

+        wordB = bWPtr[indexWord( 4, 1 )];

+        if ( wordA | wordB ) return false;

+        wordA = aWPtr[indexWord( 4, 0 )];

+        wordB = bWPtr[indexWord( 4, 0 )];

+        return ((wordA | wordB) == 0);

+    }

+    if ( signA ) {

+        aWPtr = (const uint32_t *) bPtr;

+        bWPtr = (const uint32_t *) aPtr;

+    }

+    return (softfloat_compare128M( aWPtr, bWPtr ) <= 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_le_quiet.c b/c_emulator/SoftFloat-3e/source/f128M_le_quiet.c
new file mode 100644
index 0000000..d9e4429
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_le_quiet.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_le_quiet( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_le_quiet( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t uiA96, uiB96;

+    bool signA, signB;

+    uint32_t wordA, wordB;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    signB = signF128UI96( uiB96 );

+    if ( signA != signB ) {

+        if ( signA ) return true;

+        if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return false;

+        wordA = aWPtr[indexWord( 4, 2 )];

+        wordB = bWPtr[indexWord( 4, 2 )];

+        if ( wordA | wordB ) return false;

+        wordA = aWPtr[indexWord( 4, 1 )];

+        wordB = bWPtr[indexWord( 4, 1 )];

+        if ( wordA | wordB ) return false;

+        wordA = aWPtr[indexWord( 4, 0 )];

+        wordB = bWPtr[indexWord( 4, 0 )];

+        return ((wordA | wordB) == 0);

+    }

+    if ( signA ) {

+        aWPtr = (const uint32_t *) bPtr;

+        bWPtr = (const uint32_t *) aPtr;

+    }

+    return (softfloat_compare128M( aWPtr, bWPtr ) <= 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_lt.c b/c_emulator/SoftFloat-3e/source/f128M_lt.c
new file mode 100644
index 0000000..d2f797f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_lt.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_lt( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_lt( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t uiA96, uiB96;

+    bool signA, signB;

+    uint32_t wordA, wordB;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    signB = signF128UI96( uiB96 );

+    if ( signA != signB ) {

+        if ( signB ) return false;

+        if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true;

+        wordA = aWPtr[indexWord( 4, 2 )];

+        wordB = bWPtr[indexWord( 4, 2 )];

+        if ( wordA | wordB ) return true;

+        wordA = aWPtr[indexWord( 4, 1 )];

+        wordB = bWPtr[indexWord( 4, 1 )];

+        if ( wordA | wordB ) return true;

+        wordA = aWPtr[indexWord( 4, 0 )];

+        wordB = bWPtr[indexWord( 4, 0 )];

+        return ((wordA | wordB) != 0);

+    }

+    if ( signA ) {

+        aWPtr = (const uint32_t *) bPtr;

+        bWPtr = (const uint32_t *) aPtr;

+    }

+    return (softfloat_compare128M( aWPtr, bWPtr ) < 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_lt_quiet.c b/c_emulator/SoftFloat-3e/source/f128M_lt_quiet.c
new file mode 100644
index 0000000..adbddea
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_lt_quiet.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr )

+{

+

+    return f128_lt_quiet( *aPtr, *bPtr );

+

+}

+

+#else

+

+bool f128M_lt_quiet( const float128_t *aPtr, const float128_t *bPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t uiA96, uiB96;

+    bool signA, signB;

+    uint32_t wordA, wordB;

+

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        if ( f128M_isSignalingNaN( aPtr ) || f128M_isSignalingNaN( bPtr ) ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    signB = signF128UI96( uiB96 );

+    if ( signA != signB ) {

+        if ( signB ) return false;

+        if ( (uiA96 | uiB96) & 0x7FFFFFFF ) return true;

+        wordA = aWPtr[indexWord( 4, 2 )];

+        wordB = bWPtr[indexWord( 4, 2 )];

+        if ( wordA | wordB ) return true;

+        wordA = aWPtr[indexWord( 4, 1 )];

+        wordB = bWPtr[indexWord( 4, 1 )];

+        if ( wordA | wordB ) return true;

+        wordA = aWPtr[indexWord( 4, 0 )];

+        wordB = bWPtr[indexWord( 4, 0 )];

+        return ((wordA | wordB) != 0);

+    }

+    if ( signA ) {

+        aWPtr = (const uint32_t *) bPtr;

+        bWPtr = (const uint32_t *) aPtr;

+    }

+    return (softfloat_compare128M( aWPtr, bWPtr ) < 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_mul.c b/c_emulator/SoftFloat-3e/source/f128M_mul.c
new file mode 100644
index 0000000..4b8292a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_mul.c
@@ -0,0 +1,158 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+

+    *zPtr = f128_mul( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ f128M_mul( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t *zWPtr;

+    uint32_t uiA96;

+    int32_t expA;

+    uint32_t uiB96;

+    int32_t expB;

+    bool signZ;

+    const uint32_t *ptr;

+    uint32_t uiZ96, sigA[4];

+    uint_fast8_t shiftDist;

+    uint32_t sigB[4];

+    int32_t expZ;

+    uint32_t sigProd[8], *extSigZPtr;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    expA = expF128UI96( uiA96 );

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    expB = expF128UI96( uiB96 );

+    signZ = signF128UI96( uiA96 ) ^ signF128UI96( uiB96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;

+        ptr = aWPtr;

+        if ( ! expA ) goto possiblyInvalid;

+        if ( ! expB ) {

+            ptr = bWPtr;

+     possiblyInvalid:

+            if (

+                ! fracF128UI96( ptr[indexWordHi( 4 )] )

+                    && ! (ptr[indexWord( 4, 2 )] | ptr[indexWord( 4, 1 )]

+                              | ptr[indexWord( 4, 0 )])

+            ) {

+                softfloat_invalidF128M( zWPtr );

+                return;

+            }

+        }

+        uiZ96 = packToF128UI96( signZ, 0x7FFF, 0 );

+        goto uiZ96;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA ) {

+        sigA[indexWordHi( 4 )] = fracF128UI96( uiA96 ) | 0x00010000;

+        sigA[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+        sigA[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+        sigA[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+    } else {

+        expA = softfloat_shiftNormSigF128M( aWPtr, 0, sigA );

+        if ( expA == -128 ) goto zero;

+    }

+    if ( expB ) {

+        sigB[indexWordHi( 4 )] = fracF128UI96( uiB96 ) | 0x00010000;

+        sigB[indexWord( 4, 2 )] = bWPtr[indexWord( 4, 2 )];

+        sigB[indexWord( 4, 1 )] = bWPtr[indexWord( 4, 1 )];

+        sigB[indexWord( 4, 0 )] = bWPtr[indexWord( 4, 0 )];

+    } else {

+        expB = softfloat_shiftNormSigF128M( bWPtr, 0, sigB );

+        if ( expB == -128 ) goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x4000;

+    softfloat_mul128MTo256M( sigA, sigB, sigProd );

+    if (

+        sigProd[indexWord( 8, 2 )]

+            || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )])

+    ) {

+        sigProd[indexWord( 8, 3 )] |= 1;

+    }

+    extSigZPtr = &sigProd[indexMultiwordHi( 8, 5 )];

+    shiftDist = 16;

+    if ( extSigZPtr[indexWordHi( 5 )] & 2 ) {

+        ++expZ;

+        shiftDist = 15;

+    }

+    softfloat_shortShiftLeft160M( extSigZPtr, shiftDist, extSigZPtr );

+    softfloat_roundPackMToF128M( signZ, expZ, extSigZPtr, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ96 = packToF128UI96( signZ, 0, 0 );

+ uiZ96:

+    zWPtr[indexWordHi( 4 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_mulAdd.c b/c_emulator/SoftFloat-3e/source/f128M_mulAdd.c
new file mode 100644
index 0000000..2b0b7fe
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_mulAdd.c
@@ -0,0 +1,92 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_mulAdd(

+     const float128_t *aPtr,

+     const float128_t *bPtr,

+     const float128_t *cPtr,

+     float128_t *zPtr

+ )

+{

+    const uint64_t *aWPtr, *bWPtr, *cWPtr;

+    uint_fast64_t uiA64, uiA0;

+    uint_fast64_t uiB64, uiB0;

+    uint_fast64_t uiC64, uiC0;

+

+    aWPtr = (const uint64_t *) aPtr;

+    bWPtr = (const uint64_t *) bPtr;

+    cWPtr = (const uint64_t *) cPtr;

+    uiA64 = aWPtr[indexWord( 2, 1 )];

+    uiA0  = aWPtr[indexWord( 2, 0 )];

+    uiB64 = bWPtr[indexWord( 2, 1 )];

+    uiB0  = bWPtr[indexWord( 2, 0 )];

+    uiC64 = cWPtr[indexWord( 2, 1 )];

+    uiC0  = cWPtr[indexWord( 2, 0 )];

+    *zPtr = softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 );

+

+}

+

+#else

+

+void

+ f128M_mulAdd(

+     const float128_t *aPtr,

+     const float128_t *bPtr,

+     const float128_t *cPtr,

+     float128_t *zPtr

+ )

+{

+

+    softfloat_mulAddF128M(

+        (const uint32_t *) aPtr,

+        (const uint32_t *) bPtr,

+        (const uint32_t *) cPtr,

+        (uint32_t *) zPtr,

+        0

+    );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_rem.c b/c_emulator/SoftFloat-3e/source/f128M_rem.c
new file mode 100644
index 0000000..39aafdd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_rem.c
@@ -0,0 +1,182 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+

+    *zPtr = f128_rem( *aPtr, *bPtr );

+

+}

+

+#else

+

+void

+ f128M_rem( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+    const uint32_t *aWPtr, *bWPtr;

+    uint32_t *zWPtr, uiA96;

+    int32_t expA, expB;

+    uint32_t x[4], rem1[5], *remPtr;

+    bool signRem;

+    int32_t expDiff;

+    uint32_t q, recip32;

+    uint64_t q64;

+    uint32_t rem2[5], *altRemPtr, *newRemPtr, wordMeanRem;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    bWPtr = (const uint32_t *) bPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    expA = expF128UI96( uiA96 );

+    expB = expF128UI96( bWPtr[indexWordHi( 4 )] );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;

+        if ( expA == 0x7FFF ) goto invalid;

+        goto copyA;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA < expB - 1 ) goto copyA;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expB = softfloat_shiftNormSigF128M( bWPtr, 13, x );

+    if ( expB == -128 ) goto invalid;

+    remPtr = &rem1[indexMultiwordLo( 5, 4 )];

+    expA = softfloat_shiftNormSigF128M( aWPtr, 13, remPtr );

+    if ( expA == -128 ) goto copyA;

+    signRem = signF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( expDiff < 1 ) {

+        if ( expDiff < -1 ) goto copyA;

+        if ( expDiff ) {

+            --expB;

+            softfloat_add128M( x, x, x );

+            q = 0;

+        } else {

+            q = (softfloat_compare128M( x, remPtr ) <= 0);

+            if ( q ) softfloat_sub128M( remPtr, x, remPtr );

+        }

+    } else {

+        recip32 =

+            softfloat_approxRecip32_1(

+                ((uint64_t) x[indexWord( 4, 3 )]<<32 | x[indexWord( 4, 2 )])

+                    >>30

+            );

+        expDiff -= 30;

+        for (;;) {

+            q64 = (uint64_t) remPtr[indexWordHi( 4 )] * recip32;

+            if ( expDiff < 0 ) break;

+            q = (q64 + 0x80000000)>>32;

+            softfloat_remStep128MBy32( remPtr, 29, x, q, remPtr );

+            if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {

+                softfloat_add128M( remPtr, x, remPtr );

+            }

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -29 here.)

+        *--------------------------------------------------------------------*/

+        q = (uint32_t) (q64>>32)>>(~expDiff & 31);

+        softfloat_remStep128MBy32( remPtr, expDiff + 30, x, q, remPtr );

+        if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {

+            altRemPtr = &rem2[indexMultiwordLo( 5, 4 )];

+            softfloat_add128M( remPtr, x, altRemPtr );

+            goto selectRem;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    altRemPtr = &rem2[indexMultiwordLo( 5, 4 )];

+    do {

+        ++q;

+        newRemPtr = altRemPtr;

+        softfloat_sub128M( remPtr, x, newRemPtr );

+        altRemPtr = remPtr;

+        remPtr = newRemPtr;

+    } while ( ! (remPtr[indexWordHi( 4 )] & 0x80000000) );

+ selectRem:

+    softfloat_add128M( remPtr, altRemPtr, x );

+    wordMeanRem = x[indexWordHi( 4 )];

+    if (

+        (wordMeanRem & 0x80000000)

+            || (! wordMeanRem && (q & 1) && ! x[indexWord( 4, 0 )]

+                    && ! (x[indexWord( 4, 2 )] | x[indexWord( 4, 1 )]))

+    ) {

+        remPtr = altRemPtr;

+    }

+    if ( remPtr[indexWordHi( 4 )] & 0x80000000 ) {

+        signRem = ! signRem;

+        softfloat_negX128M( remPtr );

+    }

+    remPtr -= indexMultiwordLo( 5, 4 );

+    remPtr[indexWordHi( 5 )] = 0;

+    softfloat_normRoundPackMToF128M( signRem, expB + 18, remPtr, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidF128M( zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ copyA:

+    zWPtr[indexWordHi( 4 )] = uiA96;

+    zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_roundToInt.c b/c_emulator/SoftFloat-3e/source/f128M_roundToInt.c
new file mode 100644
index 0000000..b96d742
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_roundToInt.c
@@ -0,0 +1,223 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_roundToInt(

+     const float128_t *aPtr,

+     uint_fast8_t roundingMode,

+     bool exact,

+     float128_t *zPtr

+ )

+{

+

+    *zPtr = f128_roundToInt( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+void

+ f128M_roundToInt(

+     const float128_t *aPtr,

+     uint_fast8_t roundingMode,

+     bool exact,

+     float128_t *zPtr

+ )

+{

+    const uint32_t *aWPtr;

+    uint32_t *zWPtr;

+    uint32_t ui96;

+    int32_t exp;

+    uint32_t sigExtra;

+    bool sign;

+    uint_fast8_t bitPos;

+    bool roundNear;

+    unsigned int index, lastIndex;

+    bool extra;

+    uint32_t wordA, bit, wordZ;

+    uint_fast8_t carry;

+    uint32_t extrasMask;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    ui96 = aWPtr[indexWordHi( 4 )];

+    exp = expF128UI96( ui96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp < 0x3FFF ) {

+        zWPtr[indexWord( 4, 2 )] = 0;

+        zWPtr[indexWord( 4, 1 )] = 0;

+        zWPtr[indexWord( 4, 0 )] = 0;

+        sigExtra = aWPtr[indexWord( 4, 2 )];

+        if ( !sigExtra ) {

+            sigExtra = aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )];

+        }

+        if ( !sigExtra && !(ui96 & 0x7FFFFFFF) ) goto ui96;

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        sign = signF128UI96( ui96 );

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !fracF128UI96( ui96 ) && !sigExtra ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0x3FFE ) goto mag1;

+            break;

+         case softfloat_round_min:

+            if ( sign ) goto mag1;

+            break;

+         case softfloat_round_max:

+            if ( !sign ) goto mag1;

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            goto mag1;

+#endif

+        }

+        ui96 = packToF128UI96( sign, 0, 0 );

+        goto ui96;

+     mag1:

+        ui96 = packToF128UI96( sign, 0x3FFF, 0 );

+        goto ui96;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x406F <= exp ) {

+        if (

+            (exp == 0x7FFF)

+                && (fracF128UI96( ui96 )

+                        || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                                | aWPtr[indexWord( 4, 0 )]))

+        ) {

+            softfloat_propagateNaNF128M( aWPtr, 0, zWPtr );

+            return;

+        }

+        zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+        zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+        zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+        goto ui96;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    bitPos = 0x406F - exp;

+    roundNear =

+           (roundingMode == softfloat_round_near_maxMag)

+        || (roundingMode == softfloat_round_near_even);

+    bitPos -= roundNear;

+    index = indexWordLo( 4 );

+    lastIndex = indexWordHi( 4 );

+    extra = 0;

+    for (;;) {

+        wordA = aWPtr[index];

+        if ( bitPos < 32 ) break;

+        if ( wordA ) extra = 1;

+        zWPtr[index] = 0;

+        index += wordIncr;

+        bitPos -= 32;

+    }

+    bit = (uint32_t) 1<<bitPos;

+    if ( roundNear ) {

+        wordZ = wordA + bit;

+        carry = (wordZ < wordA);

+        bit <<= 1;

+        extrasMask = bit - 1;

+        if ( exact && (extra || (wordA & extrasMask)) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        if (

+            (roundingMode == softfloat_round_near_even)

+                && !extra && !(wordZ & extrasMask)

+        ) {

+            if ( !bit ) {

+                zWPtr[index] = wordZ;

+                index += wordIncr;

+                wordZ = aWPtr[index] + carry;

+                carry &= !wordZ;

+                zWPtr[index] = wordZ & ~1;

+                goto propagateCarry;

+            }

+            wordZ &= ~bit;

+        }

+    } else {

+        wordZ = wordA;

+        carry = 0;

+        extrasMask = bit - 1;

+        if ( extra || (wordA & extrasMask) ) {

+            if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+            if (

+                roundingMode

+                    == (signF128UI96( ui96 ) ? softfloat_round_min

+                            : softfloat_round_max)

+            ) {

+                wordZ += bit;

+                carry = (wordZ < wordA);

+#ifdef SOFTFLOAT_ROUND_ODD

+            } else if ( roundingMode == softfloat_round_odd ) {

+                wordZ |= bit;

+#endif

+            }

+        }

+    }

+    wordZ &= ~extrasMask;

+    zWPtr[index] = wordZ;

+ propagateCarry:

+    while ( index != lastIndex ) {

+        index += wordIncr;

+        wordZ = aWPtr[index] + carry;

+        zWPtr[index] = wordZ;

+        carry &= !wordZ;

+    }

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ ui96:

+    zWPtr[indexWordHi( 4 )] = ui96;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_sqrt.c b/c_emulator/SoftFloat-3e/source/f128M_sqrt.c
new file mode 100644
index 0000000..a984208
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_sqrt.c
@@ -0,0 +1,228 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f128M_sqrt( const float128_t *aPtr, float128_t *zPtr )

+{

+

+    *zPtr = f128_sqrt( *aPtr );

+

+}

+

+#else

+

+void f128M_sqrt( const float128_t *aPtr, float128_t *zPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t *zWPtr;

+    uint32_t uiA96;

+    bool signA;

+    int32_t rawExpA;

+    uint32_t rem[6];

+    int32_t expA, expZ;

+    uint64_t rem64;

+    uint32_t sig32A, recipSqrt32, sig32Z, qs[3], q;

+    uint64_t sig64Z;

+    uint32_t term[5];

+    uint64_t x64;

+    uint32_t y[5], rem32;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    signA = signF128UI96( uiA96 );

+    rawExpA  = expF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( rawExpA == 0x7FFF ) {

+        if (

+            fracF128UI96( uiA96 )

+                || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                        | aWPtr[indexWord( 4, 0 )])

+        ) {

+            softfloat_propagateNaNF128M( aWPtr, 0, zWPtr );

+            return;

+        }

+        if ( ! signA ) goto copyA;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = softfloat_shiftNormSigF128M( aWPtr, 13 - (rawExpA & 1), rem );

+    if ( expA == -128 ) goto copyA;

+    if ( signA ) goto invalid;

+    /*------------------------------------------------------------------------

+    | (`sig32Z' is guaranteed to be a lower bound on the square root of

+    | `sig32A', which makes `sig32Z' also a lower bound on the square root of

+    | `sigA'.)

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x3FFF)>>1) + 0x3FFE;

+    expA &= 1;

+    rem64 = (uint64_t) rem[indexWord( 4, 3 )]<<32 | rem[indexWord( 4, 2 )];

+    if ( expA ) {

+        if ( ! rawExpA ) {

+            softfloat_shortShiftRight128M( rem, 1, rem );

+            rem64 >>= 1;

+        }

+        sig32A = rem64>>29;

+    } else {

+        sig32A = rem64>>30;

+    }

+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );

+    sig32Z = ((uint64_t) sig32A * recipSqrt32)>>32;

+    if ( expA ) sig32Z >>= 1;

+    qs[2] = sig32Z;

+    rem64 -= (uint64_t) sig32Z * sig32Z;

+    rem[indexWord( 4, 3 )] = rem64>>32;

+    rem[indexWord( 4, 2 )] = rem64;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32;

+    sig64Z = ((uint64_t) sig32Z<<32) + ((uint64_t) q<<3);

+    term[indexWord( 4, 3 )] = 0;

+    term[indexWord( 4, 0 )] = 0;

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        x64 = ((uint64_t) sig32Z<<32) + sig64Z;

+        term[indexWord( 4, 2 )] = x64>>32;

+        term[indexWord( 4, 1 )] = x64;

+        softfloat_remStep128MBy32( rem, 29, term, q, y );

+        rem32 = y[indexWord( 4, 3 )];

+        if ( ! (rem32 & 0x80000000) ) break;

+        --q;

+        sig64Z -= 1<<3;

+    }

+    qs[1] = q;

+    rem64 = (uint64_t) rem32<<32 | y[indexWord( 4, 2 )];

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32;

+    if ( rem64>>34 ) q += recipSqrt32;

+    sig64Z <<= 1;

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        x64 = sig64Z + (q>>26);

+        term[indexWord( 4, 2 )] = x64>>32;

+        term[indexWord( 4, 1 )] = x64;

+        term[indexWord( 4, 0 )] = q<<6;

+        softfloat_remStep128MBy32(

+            y, 29, term, q, &rem[indexMultiwordHi( 6, 4 )] );

+        rem32 = rem[indexWordHi( 6 )];

+        if ( ! (rem32 & 0x80000000) ) break;

+        --q;

+    }

+    qs[0] = q;

+    rem64 = (uint64_t) rem32<<32 | rem[indexWord( 6, 4 )];

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = (((uint32_t) (rem64>>2) * (uint64_t) recipSqrt32)>>32) + 2;

+    if ( rem64>>34 ) q += recipSqrt32;

+    x64 = (uint64_t) q<<27;

+    y[indexWord( 5, 0 )] = x64;

+    x64 = ((uint64_t) qs[0]<<24) + (x64>>32);

+    y[indexWord( 5, 1 )] = x64;

+    x64 = ((uint64_t) qs[1]<<21) + (x64>>32);

+    y[indexWord( 5, 2 )] = x64;

+    x64 = ((uint64_t) qs[2]<<18) + (x64>>32);

+    y[indexWord( 5, 3 )] = x64;

+    y[indexWord( 5, 4 )] = x64>>32;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (q & 0xF) <= 2 ) {

+        q &= ~3;

+        y[indexWordLo( 5 )] = q<<27;

+        term[indexWord( 5, 4 )] = 0;

+        term[indexWord( 5, 3 )] = 0;

+        term[indexWord( 5, 2 )] = 0;

+        term[indexWord( 5, 1 )] = q>>6;

+        term[indexWord( 5, 0 )] = q<<26;

+        softfloat_sub160M( y, term, term );

+        rem[indexWord( 6, 1 )] = 0;

+        rem[indexWord( 6, 0 )] = 0;

+        softfloat_remStep160MBy32(

+            &rem[indexMultiwordLo( 6, 5 )],

+            14,

+            term,

+            q,

+            &rem[indexMultiwordLo( 6, 5 )]

+        );

+        rem32 = rem[indexWord( 6, 4 )];

+        if ( rem32 & 0x80000000 ) {

+            softfloat_sub1X160M( y );

+        } else {

+            if (

+                rem32 || rem[indexWord( 6, 0 )] || rem[indexWord( 6, 1 )]

+                    || (rem[indexWord( 6, 3 )] | rem[indexWord( 6, 2 )])

+            ) {

+                y[indexWordLo( 5 )] |= 1;

+            }

+        }

+    }

+    softfloat_roundPackMToF128M( 0, expZ, y, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidF128M( zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ copyA:

+    zWPtr[indexWordHi( 4 )] = uiA96;

+    zWPtr[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_sub.c b/c_emulator/SoftFloat-3e/source/f128M_sub.c
new file mode 100644
index 0000000..5d65c79
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_sub.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void

+ f128M_sub( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+    const uint64_t *aWPtr, *bWPtr;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float128_t

+        (*magsFuncPtr)(

+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    aWPtr = (const uint64_t *) aPtr;

+    bWPtr = (const uint64_t *) bPtr;

+    uiA64 = aWPtr[indexWord( 2, 1 )];

+    uiA0  = aWPtr[indexWord( 2, 0 )];

+    signA = signF128UI64( uiA64 );

+    uiB64 = bWPtr[indexWord( 2, 1 )];

+    uiB0  = bWPtr[indexWord( 2, 0 )];

+    signB = signF128UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        *zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        *zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_subMagsF128 : softfloat_addMagsF128;

+    *zPtr = (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

+#else

+

+void

+ f128M_sub( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )

+{

+

+    softfloat_addF128M(

+        (const uint32_t *) aPtr,

+        (const uint32_t *) bPtr,

+        (uint32_t *) zPtr,

+        true

+    );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_extF80M.c b/c_emulator/SoftFloat-3e/source/f128M_to_extF80M.c
new file mode 100644
index 0000000..b0340c7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_extF80M.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f128M_to_extF80M( const float128_t *aPtr, extFloat80_t *zPtr )

+{

+

+    *zPtr = f128_to_extF80( *aPtr );

+

+}

+

+#else

+

+void f128M_to_extF80M( const float128_t *aPtr, extFloat80_t *zPtr )

+{

+    const uint32_t *aWPtr;

+    struct extFloat80M *zSPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    struct commonNaN commonNaN;

+    uint32_t sig[4];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    zSPtr = (struct extFloat80M *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( softfloat_isNaNF128M( aWPtr ) ) {

+            softfloat_f128MToCommonNaN( aWPtr, &commonNaN );

+            softfloat_commonNaNToExtF80M( &commonNaN, zSPtr );

+            return;

+        }

+        zSPtr->signExp = packToExtF80UI64( sign, 0x7FFF );

+        zSPtr->signif = UINT64_C( 0x8000000000000000 );

+        return;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp = softfloat_shiftNormSigF128M( aWPtr, 15, sig );

+    if ( exp == -128 ) {

+        zSPtr->signExp = packToExtF80UI64( sign, 0 );

+        zSPtr->signif = 0;

+        return;

+    }

+    if ( sig[indexWord( 4, 0 )] ) sig[indexWord( 4, 1 )] |= 1;

+    softfloat_roundPackMToExtF80M(

+        sign, exp, &sig[indexMultiwordHi( 4, 3 )], 80, zSPtr );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_f16.c b/c_emulator/SoftFloat-3e/source/f128M_to_f16.c
new file mode 100644
index 0000000..95109a7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_f16.c
@@ -0,0 +1,113 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float16_t f128M_to_f16( const float128_t *aPtr )

+{

+

+    return f128_to_f16( *aPtr );

+

+}

+

+#else

+

+float16_t f128M_to_f16( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint32_t frac32;

+    struct commonNaN commonNaN;

+    uint16_t uiZ, frac16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    frac32 =

+        fracF128UI96( uiA96 )

+            | ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                    | aWPtr[indexWord( 4, 0 )])

+                   != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac32 ) {

+            softfloat_f128MToCommonNaN( aWPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac16 = frac32>>2 | (frac32 & 3);

+    if ( ! (exp | frac16) ) {

+        uiZ = packToF16UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3FF1;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x40 ) exp = -0x40;

+    }

+    return softfloat_roundPackToF16( sign, exp, frac16 | 0x4000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_f32.c b/c_emulator/SoftFloat-3e/source/f128M_to_f32.c
new file mode 100644
index 0000000..4542deb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_f32.c
@@ -0,0 +1,109 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float32_t f128M_to_f32( const float128_t *aPtr )

+{

+

+    return f128_to_f32( *aPtr );

+

+}

+

+#else

+

+float32_t f128M_to_f32( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint64_t frac64;

+    struct commonNaN commonNaN;

+    uint32_t uiZ, frac32;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    frac64 =

+        (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )]

+            | ((aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )]) != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 ) {

+            softfloat_f128MToCommonNaN( aWPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac32 = softfloat_shortShiftRightJam64( frac64, 18 );

+    if ( ! (exp | frac32) ) {

+        uiZ = packToF32UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3F81;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF32( sign, exp, frac32 | 0x40000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_f64.c b/c_emulator/SoftFloat-3e/source/f128M_to_f64.c
new file mode 100644
index 0000000..6213bb7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_f64.c
@@ -0,0 +1,112 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float64_t f128M_to_f64( const float128_t *aPtr )

+{

+

+    return f128_to_f64( *aPtr );

+

+}

+

+#else

+

+float64_t f128M_to_f64( const float128_t *aPtr )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint64_t frac64;

+    struct commonNaN commonNaN;

+    uint64_t uiZ;

+    uint32_t frac32;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    frac64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )];

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 || aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) {

+            softfloat_f128MToCommonNaN( aWPtr, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac32 = aWPtr[indexWord( 4, 1 )];

+    frac64 = frac64<<14 | frac32>>18;

+    if ( (frac32 & 0x0003FFFF) || aWPtr[indexWord( 4, 0 )] ) frac64 |= 1;

+    if ( ! (exp | frac64) ) {

+        uiZ = packToF64UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3C01;

+    if ( sizeof (int_fast16_t) < sizeof (int32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return

+        softfloat_roundPackToF64(

+            sign, exp, frac64 | UINT64_C( 0x4000000000000000 ) );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_i32.c b/c_emulator/SoftFloat-3e/source/f128M_to_i32.c
new file mode 100644
index 0000000..54cc6f6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_i32.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast32_t

+ f128M_to_i32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return f128_to_i32( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+int_fast32_t

+ f128M_to_i32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint64_t sig64;

+    int32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )];

+    if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && sig64 ) {

+#if (i32_fromNaN == i32_fromPosOverflow)

+        sign = 0;

+#elif (i32_fromNaN == i32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return i32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+    shiftDist = 0x4023 - exp;

+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    return softfloat_roundToI32( sign, sig64, roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128M_to_i32_r_minMag.c
new file mode 100644
index 0000000..1f22039
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_i32_r_minMag.c
@@ -0,0 +1,106 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast32_t f128M_to_i32_r_minMag( const float128_t *aPtr, bool exact )

+{

+

+    return f128_to_i32_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+int_fast32_t f128M_to_i32_r_minMag( const float128_t *aPtr, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint64_t sig64;

+    int32_t shiftDist;

+    uint32_t absZ, uiZ;

+    union { uint32_t ui; int32_t i; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )];

+    if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp < 0x3FFF ) {

+        if ( exact && (exp | sig64) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x401F <= exp ) goto invalid;

+    shiftDist = 0x402F - exp;

+    sig64 |= UINT64_C( 0x0001000000000000 );

+    absZ = sig64>>shiftDist;

+    uiZ = sign ? -absZ : absZ;

+    if ( uiZ>>31 != sign ) goto invalid;

+    if ( exact && ((uint64_t) absZ<<shiftDist != sig64) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    uZ.ui = uiZ;

+    return uZ.i;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && sig64 ? i32_fromNaN

+            : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_i64.c b/c_emulator/SoftFloat-3e/source/f128M_to_i64.c
new file mode 100644
index 0000000..08844b6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_i64.c
@@ -0,0 +1,102 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast64_t

+ f128M_to_i64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return f128_to_i64( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+int_fast64_t

+ f128M_to_i64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint32_t sig96;

+    int32_t shiftDist;

+    uint32_t sig[4];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign  = signF128UI96( uiA96 );

+    exp   = expF128UI96( uiA96 );

+    sig96 = fracF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x404F - exp;

+    if ( shiftDist < 17 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF)

+                && (sig96

+                        || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                                | aWPtr[indexWord( 4, 0 )]))

+                ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig96 |= 0x00010000;

+    sig[indexWord( 4, 3 )] = sig96;

+    sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+    sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+    sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+    softfloat_shiftRightJam128M( sig, shiftDist, sig );

+    return

+        softfloat_roundMToI64(

+            sign, sig + indexMultiwordLo( 4, 3 ), roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128M_to_i64_r_minMag.c
new file mode 100644
index 0000000..da3d28a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_i64_r_minMag.c
@@ -0,0 +1,124 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+int_fast64_t f128M_to_i64_r_minMag( const float128_t *aPtr, bool exact )

+{

+

+    return f128_to_i64_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+int_fast64_t f128M_to_i64_r_minMag( const float128_t *aPtr, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint32_t sig96;

+    int32_t shiftDist;

+    uint32_t sig[4];

+    uint64_t uiZ;

+    union { uint64_t ui; int64_t i; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign  = signF128UI96( uiA96 );

+    exp   = expF128UI96( uiA96 );

+    sig96 = fracF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist < 0 ) goto invalid;

+    if ( exact ) {

+        if ( exp ) sig96 |= 0x00010000;

+        sig[indexWord( 4, 3 )] = sig96;

+        sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+        sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+        sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+        softfloat_shiftRightJam128M( sig, shiftDist + 17, sig );

+        uiZ = (uint64_t) sig[indexWord( 4, 2 )]<<32 | sig[indexWord( 4, 1 )];

+        if ( uiZ>>63 && (! sign || (uiZ != UINT64_C( 0x8000000000000000 ))) ) {

+            goto invalid;

+        }

+        if ( sig[indexWordLo( 4 )] ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    } else {

+        if ( 64 <= shiftDist ) return 0;

+        uiZ =

+              (uint64_t) sig96<<47

+            | (uint64_t) aWPtr[indexWord( 4, 2 )]<<15

+            | aWPtr[indexWord( 4, 1 )]>>17;

+        if ( shiftDist ) {

+            uiZ |= UINT64_C( 0x8000000000000000 );

+            uiZ >>= shiftDist;

+        } else {

+            if ( uiZ || ! sign ) goto invalid;

+            uiZ |= UINT64_C( 0x8000000000000000 );

+        }

+    }

+    if ( sign ) uiZ = -uiZ;

+    uZ.ui = uiZ;

+    return uZ.i;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF)

+            && (sig96

+                    || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                            | aWPtr[indexWord( 4, 0 )]))

+            ? i64_fromNaN

+            : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_ui32.c b/c_emulator/SoftFloat-3e/source/f128M_to_ui32.c
new file mode 100644
index 0000000..c1baa06
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_ui32.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast32_t

+ f128M_to_ui32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return f128_to_ui32( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+uint_fast32_t

+ f128M_to_ui32( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint64_t sig64;

+    int32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign = signF128UI96( uiA96 );

+    exp  = expF128UI96( uiA96 );

+    sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )];

+    if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && sig64 ) {

+#if (ui32_fromNaN == ui32_fromPosOverflow)

+        sign = 0;

+#elif (ui32_fromNaN == ui32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return ui32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+    shiftDist = 0x4023 - exp;

+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    return softfloat_roundToUI32( sign, sig64, roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128M_to_ui32_r_minMag.c
new file mode 100644
index 0000000..a1aca62
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_ui32_r_minMag.c
@@ -0,0 +1,102 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *aPtr, bool exact )

+{

+

+    return f128_to_ui32_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *aPtr, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    int32_t exp;

+    uint64_t sig64;

+    int32_t shiftDist;

+    bool sign;

+    uint32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    exp = expF128UI96( uiA96 );

+    sig64 = (uint64_t) fracF128UI96( uiA96 )<<32 | aWPtr[indexWord( 4, 2 )];

+    if ( aWPtr[indexWord( 4, 1 )] | aWPtr[indexWord( 4, 0 )] ) sig64 |= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( 49 <= shiftDist ) {

+        if ( exact && (exp | sig64) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF128UI96( uiA96 );

+    if ( sign || (shiftDist < 17) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && sig64 ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig64 |= UINT64_C( 0x0001000000000000 );

+    z = sig64>>shiftDist;

+    if ( exact && ((uint64_t) z<<shiftDist != sig64) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_ui64.c b/c_emulator/SoftFloat-3e/source/f128M_to_ui64.c
new file mode 100644
index 0000000..abaa855
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_ui64.c
@@ -0,0 +1,102 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast64_t

+ f128M_to_ui64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+

+    return f128_to_ui64( *aPtr, roundingMode, exact );

+

+}

+

+#else

+

+uint_fast64_t

+ f128M_to_ui64( const float128_t *aPtr, uint_fast8_t roundingMode, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint32_t sig96;

+    int32_t shiftDist;

+    uint32_t sig[4];

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign  = signF128UI96( uiA96 );

+    exp   = expF128UI96( uiA96 );

+    sig96 = fracF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x404F - exp;

+    if ( shiftDist < 17 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF)

+                && (sig96

+                        || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                                | aWPtr[indexWord( 4, 0 )]))

+                ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig96 |= 0x00010000;

+    sig[indexWord( 4, 3 )] = sig96;

+    sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+    sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+    sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+    softfloat_shiftRightJam128M( sig, shiftDist, sig );

+    return

+        softfloat_roundMToUI64(

+            sign, sig + indexMultiwordLo( 4, 3 ), roundingMode, exact );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128M_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128M_to_ui64_r_minMag.c
new file mode 100644
index 0000000..7a1b602
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128M_to_ui64_r_minMag.c
@@ -0,0 +1,114 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *aPtr, bool exact )

+{

+

+    return f128_to_ui64_r_minMag( *aPtr, exact );

+

+}

+

+#else

+

+uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *aPtr, bool exact )

+{

+    const uint32_t *aWPtr;

+    uint32_t uiA96;

+    bool sign;

+    int32_t exp;

+    uint32_t sig96;

+    int32_t shiftDist;

+    uint32_t sig[4];

+    uint64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    aWPtr = (const uint32_t *) aPtr;

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    sign  = signF128UI96( uiA96 );

+    exp   = expF128UI96( uiA96 );

+    sig96 = fracF128UI96( uiA96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x403E - exp;

+    if ( shiftDist < 0 ) goto invalid;

+    if ( exact ) {

+        if ( exp ) sig96 |= 0x00010000;

+        sig[indexWord( 4, 3 )] = sig96;

+        sig[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+        sig[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+        sig[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+        softfloat_shiftRightJam128M( sig, shiftDist + 17, sig );

+        z = (uint64_t) sig[indexWord( 4, 2 )]<<32 | sig[indexWord( 4, 1 )];

+        if ( sign && z ) goto invalid;

+        if ( sig[indexWordLo( 4 )] ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    } else {

+        if ( 64 <= shiftDist ) return 0;

+        if ( sign ) goto invalid;

+        z =   UINT64_C( 0x8000000000000000 )

+            | (uint64_t) sig96<<47

+            | (uint64_t) aWPtr[indexWord( 4, 2 )]<<15

+            | aWPtr[indexWord( 4, 1 )]>>17;

+        z >>= shiftDist;

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF)

+            && (sig96

+                    || (aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                            | aWPtr[indexWord( 4, 0 )]))

+            ? ui64_fromNaN

+            : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_add.c b/c_emulator/SoftFloat-3e/source/f128_add.c
new file mode 100644
index 0000000..e9caba6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_add.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t f128_add( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float128_t

+        (*magsFuncPtr)(

+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    signB = signF128UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        return softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_addMagsF128 : softfloat_subMagsF128;

+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_div.c b/c_emulator/SoftFloat-3e/source/f128_div.c
new file mode 100644
index 0000000..0693db7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_div.c
@@ -0,0 +1,199 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f128_div( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    int_fast32_t expA;

+    struct uint128 sigA;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+    int_fast32_t expB;

+    struct uint128 sigB;

+    bool signZ;

+    struct exp32_sig128 normExpSig;

+    int_fast32_t expZ;

+    struct uint128 rem;

+    uint_fast32_t recip32;

+    int ix;

+    uint_fast64_t q64;

+    uint_fast32_t q;

+    struct uint128 term;

+    uint_fast32_t qs[3];

+    uint_fast64_t sigZExtra;

+    struct uint128 sigZ, uiZ;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    expA  = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    signB = signF128UI64( uiB64 );

+    expB  = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if ( sigA.v64 | sigA.v0 ) goto propagateNaN;

+        if ( expB == 0x7FFF ) {

+            if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+            goto invalid;

+        }

+        goto infinity;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! (sigB.v64 | sigB.v0) ) {

+            if ( ! (expA | sigA.v64 | sigA.v0) ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! (sigA.v64 | sigA.v0) ) goto zero;

+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x3FFE;

+    sigA.v64 |= UINT64_C( 0x0001000000000000 );

+    sigB.v64 |= UINT64_C( 0x0001000000000000 );

+    rem = sigA;

+    if ( softfloat_lt128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 ) ) {

+        --expZ;

+        rem = softfloat_add128( sigA.v64, sigA.v0, sigA.v64, sigA.v0 );

+    }

+    recip32 = softfloat_approxRecip32_1( sigB.v64>>17 );

+    ix = 3;

+    for (;;) {

+        q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32;

+        q = (q64 + 0x80000000)>>32;

+        --ix;

+        if ( ix < 0 ) break;

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            --q;

+            rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+        }

+        qs[ix] = q;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ((q + 1) & 7) < 2 ) {

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            --q;

+            rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+        } else if ( softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 ) ) {

+            ++q;

+            rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+        }

+        if ( rem.v64 | rem.v0 ) q |= 1;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigZExtra = (uint64_t) ((uint_fast64_t) q<<60);

+    term = softfloat_shortShiftLeft128( 0, qs[1], 54 );

+    sigZ =

+        softfloat_add128(

+            (uint_fast64_t) qs[2]<<19, ((uint_fast64_t) qs[0]<<25) + (q>>4),

+            term.v64, term.v0

+        );

+    return

+        softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );

+    goto uiZ0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ.v64 = packToF128UI64( signZ, 0, 0 );

+ uiZ0:

+    uiZ.v0 = 0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_eq.c b/c_emulator/SoftFloat-3e/source/f128_eq.c
new file mode 100644
index 0000000..9462fc2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_eq.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f128_eq( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNF128UI( uiA64, uiA0 )

+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    return

+           (uiA0 == uiB0)

+        && (   (uiA64 == uiB64)

+            || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))

+           );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_eq_signaling.c b/c_emulator/SoftFloat-3e/source/f128_eq_signaling.c
new file mode 100644
index 0000000..5d0819d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_eq_signaling.c
@@ -0,0 +1,67 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f128_eq_signaling( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    return

+           (uiA0 == uiB0)

+        && (   (uiA64 == uiB64)

+            || (! uiA0 && ! ((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))

+           );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/f128_isSignalingNaN.c
new file mode 100644
index 0000000..a764ff6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_isSignalingNaN.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f128_isSignalingNaN( float128_t a )

+{

+    union ui128_f128 uA;

+

+    uA.f = a;

+    return softfloat_isSigNaNF128UI( uA.ui.v64, uA.ui.v0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_le.c b/c_emulator/SoftFloat-3e/source/f128_le.c
new file mode 100644
index 0000000..521a1cb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_le.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f128_le( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF128UI64( uiA64 );

+    signB = signF128UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA

+                  || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                            | uiA0 | uiB0)

+            : ((uiA64 == uiB64) && (uiA0 == uiB0))

+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_le_quiet.c b/c_emulator/SoftFloat-3e/source/f128_le_quiet.c
new file mode 100644
index 0000000..820b28b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_le_quiet.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f128_le_quiet( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNF128UI( uiA64, uiA0 )

+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF128UI64( uiA64 );

+    signB = signF128UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA

+                  || ! (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                            | uiA0 | uiB0)

+            : ((uiA64 == uiB64) && (uiA0 == uiB0))

+                  || (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_lt.c b/c_emulator/SoftFloat-3e/source/f128_lt.c
new file mode 100644
index 0000000..fa46ae2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_lt.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f128_lt( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF128UI64( uiA64 );

+    signB = signF128UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA

+                  && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                          | uiA0 | uiB0)

+            : ((uiA64 != uiB64) || (uiA0 != uiB0))

+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_lt_quiet.c b/c_emulator/SoftFloat-3e/source/f128_lt_quiet.c
new file mode 100644
index 0000000..d491de2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_lt_quiet.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f128_lt_quiet( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    if ( isNaNF128UI( uiA64, uiA0 ) || isNaNF128UI( uiB64, uiB0 ) ) {

+        if (

+               softfloat_isSigNaNF128UI( uiA64, uiA0 )

+            || softfloat_isSigNaNF128UI( uiB64, uiB0 )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF128UI64( uiA64 );

+    signB = signF128UI64( uiB64 );

+    return

+        (signA != signB)

+            ? signA

+                  && (((uiA64 | uiB64) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                          | uiA0 | uiB0)

+            : ((uiA64 != uiB64) || (uiA0 != uiB0))

+                  && (signA ^ softfloat_lt128( uiA64, uiA0, uiB64, uiB0 ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_mul.c b/c_emulator/SoftFloat-3e/source/f128_mul.c
new file mode 100644
index 0000000..24af86a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_mul.c
@@ -0,0 +1,163 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f128_mul( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    int_fast32_t expA;

+    struct uint128 sigA;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+    int_fast32_t expB;

+    struct uint128 sigB;

+    bool signZ;

+    uint_fast64_t magBits;

+    struct exp32_sig128 normExpSig;

+    int_fast32_t expZ;

+    uint64_t sig256Z[4];

+    uint_fast64_t sigZExtra;

+    struct uint128 sigZ;

+    struct uint128_extra sig128Extra;

+    struct uint128 uiZ;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    expA  = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    signB = signF128UI64( uiB64 );

+    expB  = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if (

+            (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0))

+        ) {

+            goto propagateNaN;

+        }

+        magBits = expB | sigB.v64 | sigB.v0;

+        goto infArg;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+        magBits = expA | sigA.v64 | sigA.v0;

+        goto infArg;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! (sigA.v64 | sigA.v0) ) goto zero;

+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! (sigB.v64 | sigB.v0) ) goto zero;

+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x4000;

+    sigA.v64 |= UINT64_C( 0x0001000000000000 );

+    sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 16 );

+    softfloat_mul128To256M( sigA.v64, sigA.v0, sigB.v64, sigB.v0, sig256Z );

+    sigZExtra = sig256Z[indexWord( 4, 1 )] | (sig256Z[indexWord( 4, 0 )] != 0);

+    sigZ =

+        softfloat_add128(

+            sig256Z[indexWord( 4, 3 )], sig256Z[indexWord( 4, 2 )],

+            sigA.v64, sigA.v0

+        );

+    if ( UINT64_C( 0x0002000000000000 ) <= sigZ.v64 ) {

+        ++expZ;

+        sig128Extra =

+            softfloat_shortShiftRightJam128Extra(

+                sigZ.v64, sigZ.v0, sigZExtra, 1 );

+        sigZ = sig128Extra.v;

+        sigZExtra = sig128Extra.extra;

+    }

+    return

+        softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infArg:

+    if ( ! magBits ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ.v64 = defaultNaNF128UI64;

+        uiZ.v0  = defaultNaNF128UI0;

+        goto uiZ;

+    }

+    uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );

+    goto uiZ0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ.v64 = packToF128UI64( signZ, 0, 0 );

+ uiZ0:

+    uiZ.v0 = 0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_mulAdd.c b/c_emulator/SoftFloat-3e/source/f128_mulAdd.c
new file mode 100644
index 0000000..c7272d4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_mulAdd.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t f128_mulAdd( float128_t a, float128_t b, float128_t c )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    union ui128_f128 uC;

+    uint_fast64_t uiC64, uiC0;

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    uC.f = c;

+    uiC64 = uC.ui.v64;

+    uiC0  = uC.ui.v0;

+    return softfloat_mulAddF128( uiA64, uiA0, uiB64, uiB0, uiC64, uiC0, 0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_rem.c b/c_emulator/SoftFloat-3e/source/f128_rem.c
new file mode 100644
index 0000000..f525f69
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_rem.c
@@ -0,0 +1,190 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f128_rem( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    int_fast32_t expA;

+    struct uint128 sigA;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    int_fast32_t expB;

+    struct uint128 sigB;

+    struct exp32_sig128 normExpSig;

+    struct uint128 rem;

+    int_fast32_t expDiff;

+    uint_fast32_t q, recip32;

+    uint_fast64_t q64;

+    struct uint128 term, altRem, meanRem;

+    bool signRem;

+    struct uint128 uiZ;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    expA  = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    expB  = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if (

+            (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0))

+        ) {

+            goto propagateNaN;

+        }

+        goto invalid;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! (sigB.v64 | sigB.v0) ) goto invalid;

+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! (sigA.v64 | sigA.v0) ) return a;

+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigA.v64 |= UINT64_C( 0x0001000000000000 );

+    sigB.v64 |= UINT64_C( 0x0001000000000000 );

+    rem = sigA;

+    expDiff = expA - expB;

+    if ( expDiff < 1 ) {

+        if ( expDiff < -1 ) return a;

+        if ( expDiff ) {

+            --expB;

+            sigB = softfloat_add128( sigB.v64, sigB.v0, sigB.v64, sigB.v0 );

+            q = 0;

+        } else {

+            q = softfloat_le128( sigB.v64, sigB.v0, rem.v64, rem.v0 );

+            if ( q ) {

+                rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+            }

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( sigB.v64>>17 );

+        expDiff -= 30;

+        for (;;) {

+            q64 = (uint_fast64_t) (uint32_t) (rem.v64>>19) * recip32;

+            if ( expDiff < 0 ) break;

+            q = (q64 + 0x80000000)>>32;

+            rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+            term = softfloat_mul128By32( sigB.v64, sigB.v0, q );

+            rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+            if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+                rem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+            }

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -29 here.)

+        *--------------------------------------------------------------------*/

+        q = (uint32_t) (q64>>32)>>(~expDiff & 31);

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, expDiff + 30 );

+        term = softfloat_mul128By32( sigB.v64, sigB.v0, q );

+        rem = softfloat_sub128( rem.v64, rem.v0, term.v64, term.v0 );

+        if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            altRem = softfloat_add128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+            goto selectRem;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    do {

+        altRem = rem;

+        ++q;

+        rem = softfloat_sub128( rem.v64, rem.v0, sigB.v64, sigB.v0 );

+    } while ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) );

+ selectRem:

+    meanRem = softfloat_add128( rem.v64, rem.v0, altRem.v64, altRem.v0 );

+    if (

+        (meanRem.v64 & UINT64_C( 0x8000000000000000 ))

+            || (! (meanRem.v64 | meanRem.v0) && (q & 1))

+    ) {

+        rem = altRem;

+    }

+    signRem = signA;

+    if ( rem.v64 & UINT64_C( 0x8000000000000000 ) ) {

+        signRem = ! signRem;

+        rem = softfloat_sub128( 0, 0, rem.v64, rem.v0 );

+    }

+    return softfloat_normRoundPackToF128( signRem, expB - 1, rem.v64, rem.v0 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_roundToInt.c b/c_emulator/SoftFloat-3e/source/f128_roundToInt.c
new file mode 100644
index 0000000..69185d6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_roundToInt.c
@@ -0,0 +1,172 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t

+ f128_roundToInt( float128_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    int_fast32_t exp;

+    struct uint128 uiZ;

+    uint_fast64_t lastBitMask0, roundBitsMask;

+    bool roundNearEven;

+    uint_fast64_t lastBitMask64;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    exp = expF128UI64( uiA64 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x402F <= exp ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( 0x406F <= exp ) {

+            if ( (exp == 0x7FFF) && (fracF128UI64( uiA64 ) | uiA0) ) {

+                uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, 0, 0 );

+                goto uiZ;

+            }

+            return a;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        lastBitMask0 = (uint_fast64_t) 2<<(0x406E - exp);

+        roundBitsMask = lastBitMask0 - 1;

+        uiZ.v64 = uiA64;

+        uiZ.v0  = uiA0;

+        roundNearEven = (roundingMode == softfloat_round_near_even);

+        if ( roundNearEven || (roundingMode == softfloat_round_near_maxMag) ) {

+            if ( exp == 0x402F ) {

+                if ( UINT64_C( 0x8000000000000000 ) <= uiZ.v0 ) {

+                    ++uiZ.v64;

+                    if (

+                        roundNearEven

+                            && (uiZ.v0 == UINT64_C( 0x8000000000000000 ))

+                    ) {

+                        uiZ.v64 &= ~1;

+                    }

+                }

+            } else {

+                uiZ = softfloat_add128( uiZ.v64, uiZ.v0, 0, lastBitMask0>>1 );

+                if ( roundNearEven && !(uiZ.v0 & roundBitsMask) ) {

+                    uiZ.v0 &= ~lastBitMask0;

+                }

+            }

+        } else if (

+            roundingMode

+                == (signF128UI64( uiZ.v64 ) ? softfloat_round_min

+                        : softfloat_round_max)

+        ) {

+            uiZ = softfloat_add128( uiZ.v64, uiZ.v0, 0, roundBitsMask );

+        }

+        uiZ.v0 &= ~roundBitsMask;

+        lastBitMask64 = !lastBitMask0;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( exp < 0x3FFF ) {

+            if ( !((uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF )) | uiA0) ) return a;

+            if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+            uiZ.v64 = uiA64 & packToF128UI64( 1, 0, 0 );

+            uiZ.v0  = 0;

+            switch ( roundingMode ) {

+             case softfloat_round_near_even:

+                if ( !(fracF128UI64( uiA64 ) | uiA0) ) break;

+             case softfloat_round_near_maxMag:

+                if ( exp == 0x3FFE ) uiZ.v64 |= packToF128UI64( 0, 0x3FFF, 0 );

+                break;

+             case softfloat_round_min:

+                if ( uiZ.v64 ) uiZ.v64 = packToF128UI64( 1, 0x3FFF, 0 );

+                break;

+             case softfloat_round_max:

+                if ( !uiZ.v64 ) uiZ.v64 = packToF128UI64( 0, 0x3FFF, 0 );

+                break;

+#ifdef SOFTFLOAT_ROUND_ODD

+             case softfloat_round_odd:

+                uiZ.v64 |= packToF128UI64( 0, 0x3FFF, 0 );

+                break;

+#endif

+            }

+            goto uiZ;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        uiZ.v64 = uiA64;

+        uiZ.v0  = 0;

+        lastBitMask64 = (uint_fast64_t) 1<<(0x402F - exp);

+        roundBitsMask = lastBitMask64 - 1;

+        if ( roundingMode == softfloat_round_near_maxMag ) {

+            uiZ.v64 += lastBitMask64>>1;

+        } else if ( roundingMode == softfloat_round_near_even ) {

+            uiZ.v64 += lastBitMask64>>1;

+            if ( !((uiZ.v64 & roundBitsMask) | uiA0) ) {

+                uiZ.v64 &= ~lastBitMask64;

+            }

+        } else if (

+            roundingMode

+                == (signF128UI64( uiZ.v64 ) ? softfloat_round_min

+                        : softfloat_round_max)

+        ) {

+            uiZ.v64 = (uiZ.v64 | (uiA0 != 0)) + roundBitsMask;

+        }

+        uiZ.v64 &= ~roundBitsMask;

+        lastBitMask0 = 0;

+    }

+    if ( (uiZ.v64 != uiA64) || (uiZ.v0 != uiA0) ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            uiZ.v64 |= lastBitMask64;

+            uiZ.v0  |= lastBitMask0;

+        }

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_sqrt.c b/c_emulator/SoftFloat-3e/source/f128_sqrt.c
new file mode 100644
index 0000000..f1d9bac
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_sqrt.c
@@ -0,0 +1,201 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f128_sqrt( float128_t a )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    int_fast32_t expA;

+    struct uint128 sigA, uiZ;

+    struct exp32_sig128 normExpSig;

+    int_fast32_t expZ;

+    uint_fast32_t sig32A, recipSqrt32, sig32Z;

+    struct uint128 rem;

+    uint32_t qs[3];

+    uint_fast32_t q;

+    uint_fast64_t x64, sig64Z;

+    struct uint128 y, term;

+    uint_fast64_t sigZExtra;

+    struct uint128 sigZ;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    expA  = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if ( sigA.v64 | sigA.v0 ) {

+            uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, 0, 0 );

+            goto uiZ;

+        }

+        if ( ! signA ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signA ) {

+        if ( ! (expA | sigA.v64 | sigA.v0) ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! (sigA.v64 | sigA.v0) ) return a;

+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    | (`sig32Z' is guaranteed to be a lower bound on the square root of

+    | `sig32A', which makes `sig32Z' also a lower bound on the square root of

+    | `sigA'.)

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x3FFF)>>1) + 0x3FFE;

+    expA &= 1;

+    sigA.v64 |= UINT64_C( 0x0001000000000000 );

+    sig32A = sigA.v64>>17;

+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );

+    sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32;

+    if ( expA ) {

+        sig32Z >>= 1;

+        rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 12 );

+    } else {

+        rem = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 13 );

+    }

+    qs[2] = sig32Z;

+    rem.v64 -= (uint_fast64_t) sig32Z * sig32Z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((uint32_t) (rem.v64>>2) * (uint_fast64_t) recipSqrt32)>>32;

+    x64 = (uint_fast64_t) sig32Z<<32;

+    sig64Z = x64 + ((uint_fast64_t) q<<3);

+    y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        term = softfloat_mul64ByShifted32To128( x64 + sig64Z, q );

+        rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );

+        if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;

+        --q;

+        sig64Z -= 1<<3;

+    }

+    qs[1] = q;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = ((rem.v64>>2) * recipSqrt32)>>32;

+    y = softfloat_shortShiftLeft128( rem.v64, rem.v0, 29 );

+    sig64Z <<= 1;

+    /*------------------------------------------------------------------------

+    | (Repeating this loop is a rare occurrence.)

+    *------------------------------------------------------------------------*/

+    for (;;) {

+        term = softfloat_shortShiftLeft128( 0, sig64Z, 32 );

+        term = softfloat_add128( term.v64, term.v0, 0, (uint_fast64_t) q<<6 );

+        term = softfloat_mul128By32( term.v64, term.v0, q );

+        rem = softfloat_sub128( y.v64, y.v0, term.v64, term.v0 );

+        if ( ! (rem.v64 & UINT64_C( 0x8000000000000000 )) ) break;

+        --q;

+    }

+    qs[0] = q;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    q = (((rem.v64>>2) * recipSqrt32)>>32) + 2;

+    sigZExtra = (uint64_t) ((uint_fast64_t) q<<59);

+    term = softfloat_shortShiftLeft128( 0, qs[1], 53 );

+    sigZ =

+        softfloat_add128(

+            (uint_fast64_t) qs[2]<<18, ((uint_fast64_t) qs[0]<<24) + (q>>5),

+            term.v64, term.v0

+        );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (q & 0xF) <= 2 ) {

+        q &= ~3;

+        sigZExtra = (uint64_t) ((uint_fast64_t) q<<59);

+        y = softfloat_shortShiftLeft128( sigZ.v64, sigZ.v0, 6 );

+        y.v0 |= sigZExtra>>58;

+        term = softfloat_sub128( y.v64, y.v0, 0, q );

+        y    = softfloat_mul64ByShifted32To128( term.v0,  q );

+        term = softfloat_mul64ByShifted32To128( term.v64, q );

+        term = softfloat_add128( term.v64, term.v0, 0, y.v64 );

+        rem = softfloat_shortShiftLeft128( rem.v64, rem.v0, 20 );

+        term = softfloat_sub128( term.v64, term.v0, rem.v64, rem.v0 );

+        /*--------------------------------------------------------------------

+        | The concatenation of `term' and `y.v0' is now the negative remainder

+        | (3 words altogether).

+        *--------------------------------------------------------------------*/

+        if ( term.v64 & UINT64_C( 0x8000000000000000 ) ) {

+            sigZExtra |= 1;

+        } else {

+            if ( term.v64 | term.v0 | y.v0 ) {

+                if ( sigZExtra ) {

+                    --sigZExtra;

+                } else {

+                    sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, 0, 1 );

+                    sigZExtra = ~0;

+                }

+            }

+        }

+    }

+    return softfloat_roundPackToF128( 0, expZ, sigZ.v64, sigZ.v0, sigZExtra );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_sub.c b/c_emulator/SoftFloat-3e/source/f128_sub.c
new file mode 100644
index 0000000..5181cc5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_sub.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t f128_sub( float128_t a, float128_t b )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool signA;

+    union ui128_f128 uB;

+    uint_fast64_t uiB64, uiB0;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float128_t

+        (*magsFuncPtr)(

+            uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    signA = signF128UI64( uiA64 );

+    uB.f = b;

+    uiB64 = uB.ui.v64;

+    uiB0  = uB.ui.v0;

+    signB = signF128UI64( uiB64 );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    } else {

+        return softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_subMagsF128 : softfloat_addMagsF128;

+    return (*magsFuncPtr)( uiA64, uiA0, uiB64, uiB0, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_extF80.c b/c_emulator/SoftFloat-3e/source/f128_to_extF80.c
new file mode 100644
index 0000000..ec169c0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_extF80.c
@@ -0,0 +1,109 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t f128_to_extF80( float128_t a )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t frac64, frac0;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    struct exp32_sig128 normExpSig;

+    struct uint128 sig128;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign   = signF128UI64( uiA64 );

+    exp    = expF128UI64( uiA64 );

+    frac64 = fracF128UI64( uiA64 );

+    frac0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 | frac0 ) {

+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );

+            uiZ64 = uiZ.v64;

+            uiZ0  = uiZ.v0;

+        } else {

+            uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+            uiZ0  = UINT64_C( 0x8000000000000000 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! (frac64 | frac0) ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF128Sig( frac64, frac0 );

+        exp   = normExpSig.exp;

+        frac64 = normExpSig.sig.v64;

+        frac0  = normExpSig.sig.v0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig128 =

+        softfloat_shortShiftLeft128(

+            frac64 | UINT64_C( 0x0001000000000000 ), frac0, 15 );

+    return softfloat_roundPackToExtF80( sign, exp, sig128.v64, sig128.v0, 80 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_f16.c b/c_emulator/SoftFloat-3e/source/f128_to_f16.c
new file mode 100644
index 0000000..5a8ee72
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_f16.c
@@ -0,0 +1,95 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f128_to_f16( float128_t a )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t frac64;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ, frac16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 ) {

+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac16 = softfloat_shortShiftRightJam64( frac64, 34 );

+    if ( ! (exp | frac16) ) {

+        uiZ = packToF16UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3FF1;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x40 ) exp = -0x40;

+    }

+    return softfloat_roundPackToF16( sign, exp, frac16 | 0x4000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_f32.c b/c_emulator/SoftFloat-3e/source/f128_to_f32.c
new file mode 100644
index 0000000..07e4a80
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_f32.c
@@ -0,0 +1,95 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f128_to_f32( float128_t a )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t frac64;

+    struct commonNaN commonNaN;

+    uint_fast32_t uiZ, frac32;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    frac64 = fracF128UI64( uiA64 ) | (uiA0 != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 ) {

+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac32 = softfloat_shortShiftRightJam64( frac64, 18 );

+    if ( ! (exp | frac32) ) {

+        uiZ = packToF32UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3F81;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return softfloat_roundPackToF32( sign, exp, frac32 | 0x40000000 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_f64.c b/c_emulator/SoftFloat-3e/source/f128_to_f64.c
new file mode 100644
index 0000000..f791938
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_f64.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f128_to_f64( float128_t a )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t frac64, frac0;

+    struct commonNaN commonNaN;

+    uint_fast64_t uiZ;

+    struct uint128 frac128;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    frac64 = fracF128UI64( uiA64 );

+    frac0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FFF ) {

+        if ( frac64 | frac0 ) {

+            softfloat_f128UIToCommonNaN( uiA64, uiA0, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac128 = softfloat_shortShiftLeft128( frac64, frac0, 14 );

+    frac64 = frac128.v64 | (frac128.v0 != 0);

+    if ( ! (exp | frac64) ) {

+        uiZ = packToF64UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    exp -= 0x3C01;

+    if ( sizeof (int_fast16_t) < sizeof (int_fast32_t) ) {

+        if ( exp < -0x1000 ) exp = -0x1000;

+    }

+    return

+        softfloat_roundPackToF64(

+            sign, exp, frac64 | UINT64_C( 0x4000000000000000 ) );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_i32.c b/c_emulator/SoftFloat-3e/source/f128_to_i32.c
new file mode 100644
index 0000000..16c4a3c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_i32.c
@@ -0,0 +1,85 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f128_to_i32( float128_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64, sig0;

+    int_fast32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 );

+    sig0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && (sig64 | sig0) ) {

+#if (i32_fromNaN == i32_fromPosOverflow)

+        sign = 0;

+#elif (i32_fromNaN == i32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return i32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+    sig64 |= (sig0 != 0);

+    shiftDist = 0x4023 - exp;

+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    return softfloat_roundToI32( sign, sig64, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128_to_i32_r_minMag.c
new file mode 100644
index 0000000..18cfeae
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_i32_r_minMag.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f128_to_i32_r_minMag( float128_t a, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    int_fast32_t exp;

+    uint_fast64_t sig64;

+    int_fast32_t shiftDist;

+    bool sign;

+    int_fast32_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( 49 <= shiftDist ) {

+        if ( exact && (exp | sig64) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF128UI64( uiA64 );

+    if ( shiftDist < 18 ) {

+        if (

+            sign && (shiftDist == 17)

+                && (sig64 < UINT64_C( 0x0000000000020000 ))

+        ) {

+            if ( exact && sig64 ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return -0x7FFFFFFF - 1;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && sig64 ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig64 |= UINT64_C( 0x0001000000000000 );

+    absZ = sig64>>shiftDist;

+    if (

+        exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig64)

+    ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_i64.c b/c_emulator/SoftFloat-3e/source/f128_to_i64.c
new file mode 100644
index 0000000..f554660
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_i64.c
@@ -0,0 +1,95 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f128_to_i64( float128_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64, sig0;

+    int_fast32_t shiftDist;

+    struct uint128 sig128;

+    struct uint64_extra sigExtra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 );

+    sig0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( shiftDist <= 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( shiftDist < -15 ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            return

+                (exp == 0x7FFF) && (sig64 | sig0) ? i64_fromNaN

+                    : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        if ( shiftDist ) {

+            sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist );

+            sig64 = sig128.v64;

+            sig0  = sig128.v0;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+        sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist );

+        sig64 = sigExtra.v;

+        sig0  = sigExtra.extra;

+    }

+    return softfloat_roundToI64( sign, sig64, sig0, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128_to_i64_r_minMag.c
new file mode 100644
index 0000000..e2cc62e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_i64_r_minMag.c
@@ -0,0 +1,113 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f128_to_i64_r_minMag( float128_t a, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64, sig0;

+    int_fast32_t shiftDist;

+    int_fast8_t negShiftDist;

+    int_fast64_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 );

+    sig0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( shiftDist < 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( shiftDist < -14 ) {

+            if (

+                   (uiA64 == UINT64_C( 0xC03E000000000000 ))

+                && (sig0 < UINT64_C( 0x0002000000000000 ))

+            ) {

+                if ( exact && sig0 ) {

+                    softfloat_exceptionFlags |= softfloat_flag_inexact;

+                }

+                return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;

+            }

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            return

+                (exp == 0x7FFF) && (sig64 | sig0) ? i64_fromNaN

+                    : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        negShiftDist = -shiftDist;

+        absZ = sig64<<negShiftDist | sig0>>(shiftDist & 63);

+        if ( exact && (uint64_t) (sig0<<negShiftDist) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( 49 <= shiftDist ) {

+            if ( exact && (exp | sig64 | sig0) ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return 0;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        absZ = sig64>>shiftDist;

+        if ( exact && (sig0 || (absZ<<shiftDist != sig64)) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_ui32.c b/c_emulator/SoftFloat-3e/source/f128_to_ui32.c
new file mode 100644
index 0000000..7d8f3f8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_ui32.c
@@ -0,0 +1,86 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t

+ f128_to_ui32( float128_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64;

+    int_fast32_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)

+    if ( (exp == 0x7FFF) && sig64 ) {

+#if (ui32_fromNaN == ui32_fromPosOverflow)

+        sign = 0;

+#elif (ui32_fromNaN == ui32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return ui32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+    shiftDist = 0x4023 - exp;

+    if ( 0 < shiftDist ) {

+        sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    }

+    return softfloat_roundToUI32( sign, sig64, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128_to_ui32_r_minMag.c
new file mode 100644
index 0000000..92facd5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_ui32_r_minMag.c
@@ -0,0 +1,89 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f128_to_ui32_r_minMag( float128_t a, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    int_fast32_t exp;

+    uint_fast64_t sig64;

+    int_fast32_t shiftDist;

+    bool sign;

+    uint_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 ) | (uiA0 != 0);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( 49 <= shiftDist ) {

+        if ( exact && (exp | sig64) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF128UI64( uiA64 );

+    if ( sign || (shiftDist < 17) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FFF) && sig64 ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig64 |= UINT64_C( 0x0001000000000000 );

+    z = sig64>>shiftDist;

+    if ( exact && ((uint_fast64_t) z<<shiftDist != sig64) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_ui64.c b/c_emulator/SoftFloat-3e/source/f128_to_ui64.c
new file mode 100644
index 0000000..3c38882
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_ui64.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t

+ f128_to_ui64( float128_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64, sig0;

+    int_fast32_t shiftDist;

+    struct uint128 sig128;

+    struct uint64_extra sigExtra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 );

+    sig0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( shiftDist <= 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( shiftDist < -15 ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            return

+                (exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN

+                    : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        if ( shiftDist ) {

+            sig128 = softfloat_shortShiftLeft128( sig64, sig0, -shiftDist );

+            sig64 = sig128.v64;

+            sig0  = sig128.v0;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( exp ) sig64 |= UINT64_C( 0x0001000000000000 );

+        sigExtra = softfloat_shiftRightJam64Extra( sig64, sig0, shiftDist );

+        sig64 = sigExtra.v;

+        sig0  = sigExtra.extra;

+    }

+    return softfloat_roundToUI64( sign, sig64, sig0, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f128_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f128_to_ui64_r_minMag.c
new file mode 100644
index 0000000..edeafd3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f128_to_ui64_r_minMag.c
@@ -0,0 +1,105 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f128_to_ui64_r_minMag( float128_t a, bool exact )

+{

+    union ui128_f128 uA;

+    uint_fast64_t uiA64, uiA0;

+    bool sign;

+    int_fast32_t exp;

+    uint_fast64_t sig64, sig0;

+    int_fast32_t shiftDist;

+    int_fast8_t negShiftDist;

+    uint_fast64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA64 = uA.ui.v64;

+    uiA0  = uA.ui.v0;

+    sign  = signF128UI64( uiA64 );

+    exp   = expF128UI64( uiA64 );

+    sig64 = fracF128UI64( uiA64 );

+    sig0  = uiA0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x402F - exp;

+    if ( shiftDist < 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( sign || (shiftDist < -15) ) goto invalid;

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        negShiftDist = -shiftDist;

+        z = sig64<<negShiftDist | sig0>>(shiftDist & 63);

+        if ( exact && (uint64_t) (sig0<<negShiftDist) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( 49 <= shiftDist ) {

+            if ( exact && (exp | sig64 | sig0) ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return 0;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( sign ) goto invalid;

+        sig64 |= UINT64_C( 0x0001000000000000 );

+        z = sig64>>shiftDist;

+        if ( exact && (sig0 || (z<<shiftDist != sig64)) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FFF) && (sig64 | sig0) ? ui64_fromNaN

+            : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_add.c b/c_emulator/SoftFloat-3e/source/f16_add.c
new file mode 100644
index 0000000..ff6ec25
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_add.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t f16_add( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1)

+    float16_t (*magsFuncPtr)( uint_fast16_t, uint_fast16_t );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)

+    if ( signF16UI( uiA ^ uiB ) ) {

+        return softfloat_subMagsF16( uiA, uiB );

+    } else {

+        return softfloat_addMagsF16( uiA, uiB );

+    }

+#else

+    magsFuncPtr =

+        signF16UI( uiA ^ uiB ) ? softfloat_subMagsF16 : softfloat_addMagsF16;

+    return (*magsFuncPtr)( uiA, uiB );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_div.c b/c_emulator/SoftFloat-3e/source/f16_div.c
new file mode 100644
index 0000000..77f9a2c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_div.c
@@ -0,0 +1,186 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extern const uint16_t softfloat_approxRecip_1k0s[];

+extern const uint16_t softfloat_approxRecip_1k1s[];

+

+float16_t f16_div( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool signA;

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signB;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    bool signZ;

+    struct exp8_sig16 normExpSig;

+    int_fast8_t expZ;

+#ifdef SOFTFLOAT_FAST_DIV32TO16

+    uint_fast32_t sig32A;

+    uint_fast16_t sigZ;

+#else

+    int index;

+    uint16_t r0;

+    uint_fast16_t sigZ, rem;

+#endif

+    uint_fast16_t uiZ;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF16UI( uiA );

+    expA  = expF16UI( uiA );

+    sigA  = fracF16UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF16UI( uiB );

+    expB  = expF16UI( uiB );

+    sigB  = fracF16UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x1F ) {

+        if ( sigA ) goto propagateNaN;

+        if ( expB == 0x1F ) {

+            if ( sigB ) goto propagateNaN;

+            goto invalid;

+        }

+        goto infinity;

+    }

+    if ( expB == 0x1F ) {

+        if ( sigB ) goto propagateNaN;

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) {

+            if ( ! (expA | sigA) ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF16Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0xE;

+    sigA |= 0x0400;

+    sigB |= 0x0400;

+#ifdef SOFTFLOAT_FAST_DIV32TO16

+    if ( sigA < sigB ) {

+        --expZ;

+        sig32A = (uint_fast32_t) sigA<<15;

+    } else {

+        sig32A = (uint_fast32_t) sigA<<14;

+    }

+    sigZ = sig32A / sigB;

+    if ( ! (sigZ & 7) ) sigZ |= ((uint_fast32_t) sigB * sigZ != sig32A);

+#else

+    if ( sigA < sigB ) {

+        --expZ;

+        sigA <<= 5;

+    } else {

+        sigA <<= 4;

+    }

+    index = sigB>>6 & 0xF;

+    r0 = softfloat_approxRecip_1k0s[index]

+             - (((uint_fast32_t) softfloat_approxRecip_1k1s[index]

+                     * (sigB & 0x3F))

+                    >>10);

+    sigZ = ((uint_fast32_t) sigA * r0)>>16;

+    rem = (sigA<<10) - sigZ * sigB;

+    sigZ += (rem * (uint_fast32_t) r0)>>26;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    ++sigZ;

+    if ( ! (sigZ & 7) ) {

+        sigZ &= ~1;

+        rem = (sigA<<10) - sigZ * sigB;

+        if ( rem & 0x8000 ) {

+            sigZ -= 2;

+        } else {

+            if ( rem ) sigZ |= 1;

+        }

+    }

+#endif

+    return softfloat_roundPackToF16( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF16UI;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ = packToF16UI( signZ, 0x1F, 0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF16UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_eq.c b/c_emulator/SoftFloat-3e/source/f16_eq.c
new file mode 100644
index 0000000..692fa03
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_eq.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f16_eq( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    return (uiA == uiB) || ! (uint16_t) ((uiA | uiB)<<1);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_eq_signaling.c b/c_emulator/SoftFloat-3e/source/f16_eq_signaling.c
new file mode 100644
index 0000000..c1e7a50
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_eq_signaling.c
@@ -0,0 +1,61 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f16_eq_signaling( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    return (uiA == uiB) || ! (uint16_t) ((uiA | uiB)<<1);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/f16_isSignalingNaN.c
new file mode 100644
index 0000000..3eb3d4c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_isSignalingNaN.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f16_isSignalingNaN( float16_t a )

+{

+    union ui16_f16 uA;

+

+    uA.f = a;

+    return softfloat_isSigNaNF16UI( uA.ui );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_le.c b/c_emulator/SoftFloat-3e/source/f16_le.c
new file mode 100644
index 0000000..d7313de
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_le.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f16_le( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF16UI( uiA );

+    signB = signF16UI( uiB );

+    return

+        (signA != signB) ? signA || ! (uint16_t) ((uiA | uiB)<<1)

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_le_quiet.c b/c_emulator/SoftFloat-3e/source/f16_le_quiet.c
new file mode 100644
index 0000000..15181c2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_le_quiet.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f16_le_quiet( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF16UI( uiA );

+    signB = signF16UI( uiB );

+    return

+        (signA != signB) ? signA || ! (uint16_t) ((uiA | uiB)<<1)

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_lt.c b/c_emulator/SoftFloat-3e/source/f16_lt.c
new file mode 100644
index 0000000..7745699
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_lt.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f16_lt( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF16UI( uiA );

+    signB = signF16UI( uiB );

+    return

+        (signA != signB) ? signA && ((uint16_t) ((uiA | uiB)<<1) != 0)

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_lt_quiet.c b/c_emulator/SoftFloat-3e/source/f16_lt_quiet.c
new file mode 100644
index 0000000..a31e4a1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_lt_quiet.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f16_lt_quiet( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF16UI( uiA ) || isNaNF16UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF16UI( uiA ) || softfloat_isSigNaNF16UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF16UI( uiA );

+    signB = signF16UI( uiB );

+    return

+        (signA != signB) ? signA && ((uint16_t) ((uiA | uiB)<<1) != 0)

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_mul.c b/c_emulator/SoftFloat-3e/source/f16_mul.c
new file mode 100644
index 0000000..a47cab8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_mul.c
@@ -0,0 +1,140 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f16_mul( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool signA;

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    bool signB;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    bool signZ;

+    uint_fast16_t magBits;

+    struct exp8_sig16 normExpSig;

+    int_fast8_t expZ;

+    uint_fast32_t sig32Z;

+    uint_fast16_t sigZ, uiZ;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF16UI( uiA );

+    expA  = expF16UI( uiA );

+    sigA  = fracF16UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF16UI( uiB );

+    expB  = expF16UI( uiB );

+    sigB  = fracF16UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x1F ) {

+        if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN;

+        magBits = expB | sigB;

+        goto infArg;

+    }

+    if ( expB == 0x1F ) {

+        if ( sigB ) goto propagateNaN;

+        magBits = expA | sigA;

+        goto infArg;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF16Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zero;

+        normExpSig = softfloat_normSubnormalF16Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0xF;

+    sigA = (sigA | 0x0400)<<4;

+    sigB = (sigB | 0x0400)<<5;

+    sig32Z = (uint_fast32_t) sigA * sigB;

+    sigZ = sig32Z>>16;

+    if ( sig32Z & 0xFFFF ) sigZ |= 1;

+    if ( sigZ < 0x4000 ) {

+        --expZ;

+        sigZ <<= 1;

+    }

+    return softfloat_roundPackToF16( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infArg:

+    if ( ! magBits ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ = defaultNaNF16UI;

+    } else {

+        uiZ = packToF16UI( signZ, 0x1F, 0 );

+    }

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF16UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_mulAdd.c b/c_emulator/SoftFloat-3e/source/f16_mulAdd.c
new file mode 100644
index 0000000..e97571a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_mulAdd.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t f16_mulAdd( float16_t a, float16_t b, float16_t c )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    union ui16_f16 uC;

+    uint_fast16_t uiC;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    uC.f = c;

+    uiC = uC.ui;

+    return softfloat_mulAddF16( uiA, uiB, uiC, 0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_rem.c b/c_emulator/SoftFloat-3e/source/f16_rem.c
new file mode 100644
index 0000000..0ffa498
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_rem.c
@@ -0,0 +1,171 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f16_rem( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool signA;

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    struct exp8_sig16 normExpSig;

+    uint16_t rem;

+    int_fast8_t expDiff;

+    uint_fast16_t q;

+    uint32_t recip32, q32;

+    uint16_t altRem, meanRem;

+    bool signRem;

+    uint_fast16_t uiZ;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF16UI( uiA );

+    expA  = expF16UI( uiA );

+    sigA  = fracF16UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    expB = expF16UI( uiB );

+    sigB = fracF16UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x1F ) {

+        if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN;

+        goto invalid;

+    }

+    if ( expB == 0x1F ) {

+        if ( sigB ) goto propagateNaN;

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) goto invalid;

+        normExpSig = softfloat_normSubnormalF16Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF16Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    rem = sigA | 0x0400;

+    sigB |= 0x0400;

+    expDiff = expA - expB;

+    if ( expDiff < 1 ) {

+        if ( expDiff < -1 ) return a;

+        sigB <<= 3;

+        if ( expDiff ) {

+            rem <<= 2;

+            q = 0;

+        } else {

+            rem <<= 3;

+            q = (sigB <= rem);

+            if ( q ) rem -= sigB;

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( (uint_fast32_t) sigB<<21 );

+        /*--------------------------------------------------------------------

+        | Changing the shift of `rem' here requires also changing the initial

+        | subtraction from `expDiff'.

+        *--------------------------------------------------------------------*/

+        rem <<= 4;

+        expDiff -= 31;

+        /*--------------------------------------------------------------------

+        | The scale of `sigB' affects how many bits are obtained during each

+        | cycle of the loop.  Currently this is 29 bits per loop iteration,

+        | which is believed to be the maximum possible.

+        *--------------------------------------------------------------------*/

+        sigB <<= 3;

+        for (;;) {

+            q32 = (rem * (uint_fast64_t) recip32)>>16;

+            if ( expDiff < 0 ) break;

+            rem = -((uint_fast16_t) q32 * sigB);

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -30 here.)

+        *--------------------------------------------------------------------*/

+        q32 >>= ~expDiff & 31;

+        q = q32;

+        rem = (rem<<(expDiff + 30)) - q * sigB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    do {

+        altRem = rem;

+        ++q;

+        rem -= sigB;

+    } while ( ! (rem & 0x8000) );

+    meanRem = rem + altRem;

+    if ( (meanRem & 0x8000) || (! meanRem && (q & 1)) ) rem = altRem;

+    signRem = signA;

+    if ( 0x8000 <= rem ) {

+        signRem = ! signRem;

+        rem = -rem;

+    }

+    return softfloat_normRoundPackToF16( signRem, expB, rem );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto uiZ;

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF16UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_roundToInt.c b/c_emulator/SoftFloat-3e/source/f16_roundToInt.c
new file mode 100644
index 0000000..a567d51
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_roundToInt.c
@@ -0,0 +1,120 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f16_roundToInt( float16_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    int_fast8_t exp;

+    uint_fast16_t uiZ, lastBitMask, roundBitsMask;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp <= 0xE ) {

+        if ( !(uint16_t) (uiA<<1) ) return a;

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        uiZ = uiA & packToF16UI( 1, 0, 0 );

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !fracF16UI( uiA ) ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0xE ) uiZ |= packToF16UI( 0, 0xF, 0 );

+            break;

+         case softfloat_round_min:

+            if ( uiZ ) uiZ = packToF16UI( 1, 0xF, 0 );

+            break;

+         case softfloat_round_max:

+            if ( !uiZ ) uiZ = packToF16UI( 0, 0xF, 0 );

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            uiZ |= packToF16UI( 0, 0xF, 0 );

+            break;

+#endif

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x19 <= exp ) {

+        if ( (exp == 0x1F) && fracF16UI( uiA ) ) {

+            uiZ = softfloat_propagateNaNF16UI( uiA, 0 );

+            goto uiZ;

+        }

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = uiA;

+    lastBitMask = (uint_fast16_t) 1<<(0x19 - exp);

+    roundBitsMask = lastBitMask - 1;

+    if ( roundingMode == softfloat_round_near_maxMag ) {

+        uiZ += lastBitMask>>1;

+    } else if ( roundingMode == softfloat_round_near_even ) {

+        uiZ += lastBitMask>>1;

+        if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask;

+    } else if (

+        roundingMode

+            == (signF16UI( uiZ ) ? softfloat_round_min : softfloat_round_max)

+    ) {

+        uiZ += roundBitsMask;

+    }

+    uiZ &= ~roundBitsMask;

+    if ( uiZ != uiA ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_sqrt.c b/c_emulator/SoftFloat-3e/source/f16_sqrt.c
new file mode 100644
index 0000000..47a3bbf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_sqrt.c
@@ -0,0 +1,136 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extern const uint16_t softfloat_approxRecipSqrt_1k0s[];

+extern const uint16_t softfloat_approxRecipSqrt_1k1s[];

+

+float16_t f16_sqrt( float16_t a )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool signA;

+    int_fast8_t expA;

+    uint_fast16_t sigA, uiZ;

+    struct exp8_sig16 normExpSig;

+    int_fast8_t expZ;

+    int index;

+    uint_fast16_t r0;

+    uint_fast32_t ESqrR0;

+    uint16_t sigma0;

+    uint_fast16_t recipSqrt16, sigZ, shiftedSigZ;

+    uint16_t negRem;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF16UI( uiA );

+    expA  = expF16UI( uiA );

+    sigA  = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x1F ) {

+        if ( sigA ) {

+            uiZ = softfloat_propagateNaNF16UI( uiA, 0 );

+            goto uiZ;

+        }

+        if ( ! signA ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signA ) {

+        if ( ! (expA | sigA) ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF16Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0xF)>>1) + 0xE;

+    expA &= 1;

+    sigA |= 0x0400;

+    index = (sigA>>6 & 0xE) + expA;

+    r0 = softfloat_approxRecipSqrt_1k0s[index]

+             - (((uint_fast32_t) softfloat_approxRecipSqrt_1k1s[index]

+                     * (sigA & 0x7F))

+                    >>11);

+    ESqrR0 = ((uint_fast32_t) r0 * r0)>>1;

+    if ( expA ) ESqrR0 >>= 1;

+    sigma0 = ~(uint_fast16_t) ((ESqrR0 * sigA)>>16);

+    recipSqrt16 = r0 + (((uint_fast32_t) r0 * sigma0)>>25);

+    if ( ! (recipSqrt16 & 0x8000) ) recipSqrt16 = 0x8000;

+    sigZ = ((uint_fast32_t) (sigA<<5) * recipSqrt16)>>16;

+    if ( expA ) sigZ >>= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    ++sigZ;

+    if ( ! (sigZ & 7) ) {

+        shiftedSigZ = sigZ>>1;

+        negRem = shiftedSigZ * shiftedSigZ;

+        sigZ &= ~1;

+        if ( negRem & 0x8000 ) {

+            sigZ |= 1;

+        } else {

+            if ( negRem ) --sigZ;

+        }

+    }

+    return softfloat_roundPackToF16( 0, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF16UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_sub.c b/c_emulator/SoftFloat-3e/source/f16_sub.c
new file mode 100644
index 0000000..03a87cf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_sub.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t f16_sub( float16_t a, float16_t b )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    union ui16_f16 uB;

+    uint_fast16_t uiB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1)

+    float16_t (*magsFuncPtr)( uint_fast16_t, uint_fast16_t );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)

+    if ( signF16UI( uiA ^ uiB ) ) {

+        return softfloat_addMagsF16( uiA, uiB );

+    } else {

+        return softfloat_subMagsF16( uiA, uiB );

+    }

+#else

+    magsFuncPtr =

+        signF16UI( uiA ^ uiB ) ? softfloat_addMagsF16 : softfloat_subMagsF16;

+    return (*magsFuncPtr)( uiA, uiB );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_extF80.c b/c_emulator/SoftFloat-3e/source/f16_to_extF80.c
new file mode 100644
index 0000000..99c2dfc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_extF80.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t f16_to_extF80( float16_t a )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    struct exp8_sig16 normExpSig;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );

+            uiZ64 = uiZ.v64;

+            uiZ0  = uiZ.v0;

+        } else {

+            uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+            uiZ0  = UINT64_C( 0x8000000000000000 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3FF0 );

+    uiZ0  = (uint_fast64_t) (frac | 0x0400)<<53;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_extF80M.c b/c_emulator/SoftFloat-3e/source/f16_to_extF80M.c
new file mode 100644
index 0000000..7f2d534
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_extF80M.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f16_to_extF80M( float16_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = f16_to_extF80( a );

+

+}

+

+#else

+

+void f16_to_extF80M( float16_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    union ui16_f16 uA;

+    uint16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint16_t frac;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ64;

+    uint32_t uiZ32;

+    struct exp8_sig16 normExpSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zSPtr = (struct extFloat80M *) zPtr;

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToExtF80M( &commonNaN, zSPtr );

+            return;

+        }

+        uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+        uiZ32 = 0x80000000;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ32 = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3FF0 );

+    uiZ32 = 0x80000000 | (uint32_t) frac<<21;

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = (uint64_t) uiZ32<<32;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_f128.c b/c_emulator/SoftFloat-3e/source/f16_to_f128.c
new file mode 100644
index 0000000..c4b81dc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_f128.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f16_to_f128( float16_t a )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    struct exp8_sig16 normExpSig;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF128UI( &commonNaN );

+        } else {

+            uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 );

+            uiZ.v0  = 0;

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ.v64 = packToF128UI64( sign, 0, 0 );

+            uiZ.v0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ.v64 = packToF128UI64( sign, exp + 0x3FF0, (uint_fast64_t) frac<<38 );

+    uiZ.v0  = 0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_f128M.c b/c_emulator/SoftFloat-3e/source/f16_to_f128M.c
new file mode 100644
index 0000000..b4fc873
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_f128M.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f16_to_f128M( float16_t a, float128_t *zPtr )

+{

+

+    *zPtr = f16_to_f128( a );

+

+}

+

+#else

+

+void f16_to_f128M( float16_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr;

+    union ui16_f16 uA;

+    uint16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint16_t frac;

+    struct commonNaN commonNaN;

+    uint32_t uiZ96;

+    struct exp8_sig16 normExpSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToF128M( &commonNaN, zWPtr );

+            return;

+        }

+        uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ96 = packToF128UI96( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ96 = packToF128UI96( sign, exp + 0x3FF0, (uint32_t) frac<<6 );

+ uiZ:

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_f32.c b/c_emulator/SoftFloat-3e/source/f16_to_f32.c
new file mode 100644
index 0000000..a219454
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_f32.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f16_to_f32( float16_t a )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    struct commonNaN commonNaN;

+    uint_fast32_t uiZ;

+    struct exp8_sig16 normExpSig;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ = packToF32UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = packToF32UI( sign, exp + 0x70, (uint_fast32_t) frac<<13 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_f64.c b/c_emulator/SoftFloat-3e/source/f16_to_f64.c
new file mode 100644
index 0000000..7e87c25
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_f64.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f16_to_f64( float16_t a )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    struct commonNaN commonNaN;

+    uint_fast64_t uiZ;

+    struct exp8_sig16 normExpSig;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        if ( frac ) {

+            softfloat_f16UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ = packToF64UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = packToF64UI( sign, exp + 0x3F0, (uint_fast64_t) frac<<42 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_i32.c b/c_emulator/SoftFloat-3e/source/f16_to_i32.c
new file mode 100644
index 0000000..805c4e5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_i32.c
@@ -0,0 +1,87 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f16_to_i32( float16_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast32_t sig32;

+    int_fast8_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            frac ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = frac;

+    if ( exp ) {

+        sig32 |= 0x0400;

+        shiftDist = exp - 0x19;

+        if ( 0 <= shiftDist ) {

+            sig32 <<= shiftDist;

+            return sign ? -sig32 : sig32;

+        }

+        shiftDist = exp - 0x0D;

+        if ( 0 < shiftDist ) sig32 <<= shiftDist;

+    }

+    return

+        softfloat_roundToI32(

+            sign, (uint_fast32_t) sig32, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f16_to_i32_r_minMag.c
new file mode 100644
index 0000000..b1f9963
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_i32_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f16_to_i32_r_minMag( float16_t a, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast8_t shiftDist;

+    bool sign;

+    int_fast32_t alignedSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = exp - 0x0F;

+    if ( shiftDist < 0 ) {

+        if ( exact && (exp | frac) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF16UI( uiA );

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x1F) && frac ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    alignedSig = (int_fast32_t) (frac | 0x0400)<<shiftDist;

+    if ( exact && (alignedSig & 0x3FF) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    alignedSig >>= 10;

+    return sign ? -alignedSig : alignedSig;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_i64.c b/c_emulator/SoftFloat-3e/source/f16_to_i64.c
new file mode 100644
index 0000000..e3c0065
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_i64.c
@@ -0,0 +1,87 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f16_to_i64( float16_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast32_t sig32;

+    int_fast8_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            frac ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = frac;

+    if ( exp ) {

+        sig32 |= 0x0400;

+        shiftDist = exp - 0x19;

+        if ( 0 <= shiftDist ) {

+            sig32 <<= shiftDist;

+            return sign ? -sig32 : sig32;

+        }

+        shiftDist = exp - 0x0D;

+        if ( 0 < shiftDist ) sig32 <<= shiftDist;

+    }

+    return

+        softfloat_roundToI32(

+            sign, (uint_fast32_t) sig32, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f16_to_i64_r_minMag.c
new file mode 100644
index 0000000..a5a6a07
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_i64_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f16_to_i64_r_minMag( float16_t a, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast8_t shiftDist;

+    bool sign;

+    int_fast32_t alignedSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = exp - 0x0F;

+    if ( shiftDist < 0 ) {

+        if ( exact && (exp | frac) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF16UI( uiA );

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x1F) && frac ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    alignedSig = (int_fast32_t) (frac | 0x0400)<<shiftDist;

+    if ( exact && (alignedSig & 0x3FF) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    alignedSig >>= 10;

+    return sign ? -alignedSig : alignedSig;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_ui32.c b/c_emulator/SoftFloat-3e/source/f16_to_ui32.c
new file mode 100644
index 0000000..5371ca3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_ui32.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f16_to_ui32( float16_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    uint_fast32_t sig32;

+    int_fast8_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            frac ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = frac;

+    if ( exp ) {

+        sig32 |= 0x0400;

+        shiftDist = exp - 0x19;

+        if ( (0 <= shiftDist) && ! sign ) {

+            return sig32<<shiftDist;

+        }

+        shiftDist = exp - 0x0D;

+        if ( 0 < shiftDist ) sig32 <<= shiftDist;

+    }

+    return softfloat_roundToUI32( sign, sig32, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f16_to_ui32_r_minMag.c
new file mode 100644
index 0000000..5d51df5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_ui32_r_minMag.c
@@ -0,0 +1,87 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f16_to_ui32_r_minMag( float16_t a, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast8_t shiftDist;

+    bool sign;

+    uint_fast32_t alignedSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = exp - 0x0F;

+    if ( shiftDist < 0 ) {

+        if ( exact && (exp | frac) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF16UI( uiA );

+    if ( sign || (exp == 0x1F) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x1F) && frac ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    alignedSig = (uint_fast32_t) (frac | 0x0400)<<shiftDist;

+    if ( exact && (alignedSig & 0x3FF) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return alignedSig>>10;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_ui64.c b/c_emulator/SoftFloat-3e/source/f16_to_ui64.c
new file mode 100644
index 0000000..e6cb000
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_ui64.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017, 2018 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f16_to_ui64( float16_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    bool sign;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    uint_fast32_t sig32;

+    int_fast8_t shiftDist;

+#ifndef SOFTFLOAT_FAST_INT64

+    uint32_t extSig[3];

+#endif

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF16UI( uiA );

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x1F ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            frac ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig32 = frac;

+    if ( exp ) {

+        sig32 |= 0x0400;

+        shiftDist = exp - 0x19;

+        if ( (0 <= shiftDist) && ! sign ) {

+            return sig32<<shiftDist;

+        }

+        shiftDist = exp - 0x0D;

+        if ( 0 < shiftDist ) sig32 <<= shiftDist;

+    }

+#ifdef SOFTFLOAT_FAST_INT64

+    return

+        softfloat_roundToUI64(

+            sign, sig32>>12, (uint_fast64_t) sig32<<52, roundingMode, exact );

+#else

+    extSig[indexWord( 3, 2 )] = 0;

+    extSig[indexWord( 3, 1 )] = sig32>>12;

+    extSig[indexWord( 3, 0 )] = sig32<<20;

+    return softfloat_roundMToUI64( sign, extSig, roundingMode, exact );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f16_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f16_to_ui64_r_minMag.c
new file mode 100644
index 0000000..b4f975f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f16_to_ui64_r_minMag.c
@@ -0,0 +1,87 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f16_to_ui64_r_minMag( float16_t a, bool exact )

+{

+    union ui16_f16 uA;

+    uint_fast16_t uiA;

+    int_fast8_t exp;

+    uint_fast16_t frac;

+    int_fast8_t shiftDist;

+    bool sign;

+    uint_fast32_t alignedSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp  = expF16UI( uiA );

+    frac = fracF16UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = exp - 0x0F;

+    if ( shiftDist < 0 ) {

+        if ( exact && (exp | frac) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF16UI( uiA );

+    if ( sign || (exp == 0x1F) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x1F) && frac ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    alignedSig = (uint_fast32_t) (frac | 0x0400)<<shiftDist;

+    if ( exact && (alignedSig & 0x3FF) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return alignedSig>>10;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_add.c b/c_emulator/SoftFloat-3e/source/f32_add.c
new file mode 100644
index 0000000..70e03e7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_add.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t f32_add( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1)

+    float32_t (*magsFuncPtr)( uint_fast32_t, uint_fast32_t );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)

+    if ( signF32UI( uiA ^ uiB ) ) {

+        return softfloat_subMagsF32( uiA, uiB );

+    } else {

+        return softfloat_addMagsF32( uiA, uiB );

+    }

+#else

+    magsFuncPtr =

+        signF32UI( uiA ^ uiB ) ? softfloat_subMagsF32 : softfloat_addMagsF32;

+    return (*magsFuncPtr)( uiA, uiB );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_div.c b/c_emulator/SoftFloat-3e/source/f32_div.c
new file mode 100644
index 0000000..05ec701
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_div.c
@@ -0,0 +1,180 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f32_div( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    bool signZ;

+    struct exp16_sig32 normExpSig;

+    int_fast16_t expZ;

+#ifdef SOFTFLOAT_FAST_DIV64TO32

+    uint_fast64_t sig64A;

+    uint_fast32_t sigZ;

+#else

+    uint_fast32_t sigZ;

+    uint_fast64_t rem;

+#endif

+    uint_fast32_t uiZ;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF32UI( uiA );

+    expA  = expF32UI( uiA );

+    sigA  = fracF32UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF32UI( uiB );

+    expB  = expF32UI( uiB );

+    sigB  = fracF32UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0xFF ) {

+        if ( sigA ) goto propagateNaN;

+        if ( expB == 0xFF ) {

+            if ( sigB ) goto propagateNaN;

+            goto invalid;

+        }

+        goto infinity;

+    }

+    if ( expB == 0xFF ) {

+        if ( sigB ) goto propagateNaN;

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) {

+            if ( ! (expA | sigA) ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF32Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x7E;

+    sigA |= 0x00800000;

+    sigB |= 0x00800000;

+#ifdef SOFTFLOAT_FAST_DIV64TO32

+    if ( sigA < sigB ) {

+        --expZ;

+        sig64A = (uint_fast64_t) sigA<<31;

+    } else {

+        sig64A = (uint_fast64_t) sigA<<30;

+    }

+    sigZ = sig64A / sigB;

+    if ( ! (sigZ & 0x3F) ) sigZ |= ((uint_fast64_t) sigB * sigZ != sig64A);

+#else

+    if ( sigA < sigB ) {

+        --expZ;

+        sigA <<= 8;

+    } else {

+        sigA <<= 7;

+    }

+    sigB <<= 8;

+    sigZ = ((uint_fast64_t) sigA * softfloat_approxRecip32_1( sigB ))>>32;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigZ += 2;

+    if ( (sigZ & 0x3F) < 2 ) {

+        sigZ &= ~3;

+#ifdef SOFTFLOAT_FAST_INT64

+        rem = ((uint_fast64_t) sigA<<31) - (uint_fast64_t) sigZ * sigB;

+#else

+        rem = ((uint_fast64_t) sigA<<32) - (uint_fast64_t) (sigZ<<1) * sigB;

+#endif

+        if ( rem & UINT64_C( 0x8000000000000000 ) ) {

+            sigZ -= 4;

+        } else {

+            if ( rem ) sigZ |= 1;

+        }

+    }

+#endif

+    return softfloat_roundPackToF32( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF32UI;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ = packToF32UI( signZ, 0xFF, 0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF32UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_eq.c b/c_emulator/SoftFloat-3e/source/f32_eq.c
new file mode 100644
index 0000000..801bbfd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_eq.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f32_eq( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    return (uiA == uiB) || ! (uint32_t) ((uiA | uiB)<<1);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_eq_signaling.c b/c_emulator/SoftFloat-3e/source/f32_eq_signaling.c
new file mode 100644
index 0000000..4c610ff
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_eq_signaling.c
@@ -0,0 +1,61 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f32_eq_signaling( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    return (uiA == uiB) || ! (uint32_t) ((uiA | uiB)<<1);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/f32_isSignalingNaN.c
new file mode 100644
index 0000000..f5954cb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_isSignalingNaN.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f32_isSignalingNaN( float32_t a )

+{

+    union ui32_f32 uA;

+

+    uA.f = a;

+    return softfloat_isSigNaNF32UI( uA.ui );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_le.c b/c_emulator/SoftFloat-3e/source/f32_le.c
new file mode 100644
index 0000000..d89d1e8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_le.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f32_le( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF32UI( uiA );

+    signB = signF32UI( uiB );

+    return

+        (signA != signB) ? signA || ! (uint32_t) ((uiA | uiB)<<1)

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_le_quiet.c b/c_emulator/SoftFloat-3e/source/f32_le_quiet.c
new file mode 100644
index 0000000..c2d4297
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_le_quiet.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f32_le_quiet( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF32UI( uiA );

+    signB = signF32UI( uiB );

+    return

+        (signA != signB) ? signA || ! (uint32_t) ((uiA | uiB)<<1)

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_lt.c b/c_emulator/SoftFloat-3e/source/f32_lt.c
new file mode 100644
index 0000000..5b5fd22
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_lt.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f32_lt( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF32UI( uiA );

+    signB = signF32UI( uiB );

+    return

+        (signA != signB) ? signA && ((uint32_t) ((uiA | uiB)<<1) != 0)

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_lt_quiet.c b/c_emulator/SoftFloat-3e/source/f32_lt_quiet.c
new file mode 100644
index 0000000..0153881
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_lt_quiet.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f32_lt_quiet( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF32UI( uiA ) || isNaNF32UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF32UI( uiA ) || softfloat_isSigNaNF32UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF32UI( uiA );

+    signB = signF32UI( uiB );

+    return

+        (signA != signB) ? signA && ((uint32_t) ((uiA | uiB)<<1) != 0)

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_mul.c b/c_emulator/SoftFloat-3e/source/f32_mul.c
new file mode 100644
index 0000000..f5c8560
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_mul.c
@@ -0,0 +1,137 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f32_mul( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    bool signZ;

+    uint_fast32_t magBits;

+    struct exp16_sig32 normExpSig;

+    int_fast16_t expZ;

+    uint_fast32_t sigZ, uiZ;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF32UI( uiA );

+    expA  = expF32UI( uiA );

+    sigA  = fracF32UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF32UI( uiB );

+    expB  = expF32UI( uiB );

+    sigB  = fracF32UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0xFF ) {

+        if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN;

+        magBits = expB | sigB;

+        goto infArg;

+    }

+    if ( expB == 0xFF ) {

+        if ( sigB ) goto propagateNaN;

+        magBits = expA | sigA;

+        goto infArg;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF32Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zero;

+        normExpSig = softfloat_normSubnormalF32Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x7F;

+    sigA = (sigA | 0x00800000)<<7;

+    sigB = (sigB | 0x00800000)<<8;

+    sigZ = softfloat_shortShiftRightJam64( (uint_fast64_t) sigA * sigB, 32 );

+    if ( sigZ < 0x40000000 ) {

+        --expZ;

+        sigZ <<= 1;

+    }

+    return softfloat_roundPackToF32( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infArg:

+    if ( ! magBits ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ = defaultNaNF32UI;

+    } else {

+        uiZ = packToF32UI( signZ, 0xFF, 0 );

+    }

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF32UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_mulAdd.c b/c_emulator/SoftFloat-3e/source/f32_mulAdd.c
new file mode 100644
index 0000000..9a28e21
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_mulAdd.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t f32_mulAdd( float32_t a, float32_t b, float32_t c )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    union ui32_f32 uC;

+    uint_fast32_t uiC;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    uC.f = c;

+    uiC = uC.ui;

+    return softfloat_mulAddF32( uiA, uiB, uiC, 0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_rem.c b/c_emulator/SoftFloat-3e/source/f32_rem.c
new file mode 100644
index 0000000..b29bf41
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_rem.c
@@ -0,0 +1,168 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f32_rem( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    struct exp16_sig32 normExpSig;

+    uint32_t rem;

+    int_fast16_t expDiff;

+    uint32_t q, recip32, altRem, meanRem;

+    bool signRem;

+    uint_fast32_t uiZ;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF32UI( uiA );

+    expA  = expF32UI( uiA );

+    sigA  = fracF32UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    expB = expF32UI( uiB );

+    sigB = fracF32UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0xFF ) {

+        if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN;

+        goto invalid;

+    }

+    if ( expB == 0xFF ) {

+        if ( sigB ) goto propagateNaN;

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) goto invalid;

+        normExpSig = softfloat_normSubnormalF32Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF32Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    rem = sigA | 0x00800000;

+    sigB |= 0x00800000;

+    expDiff = expA - expB;

+    if ( expDiff < 1 ) {

+        if ( expDiff < -1 ) return a;

+        sigB <<= 6;

+        if ( expDiff ) {

+            rem <<= 5;

+            q = 0;

+        } else {

+            rem <<= 6;

+            q = (sigB <= rem);

+            if ( q ) rem -= sigB;

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( sigB<<8 );

+        /*--------------------------------------------------------------------

+        | Changing the shift of `rem' here requires also changing the initial

+        | subtraction from `expDiff'.

+        *--------------------------------------------------------------------*/

+        rem <<= 7;

+        expDiff -= 31;

+        /*--------------------------------------------------------------------

+        | The scale of `sigB' affects how many bits are obtained during each

+        | cycle of the loop.  Currently this is 29 bits per loop iteration,

+        | which is believed to be the maximum possible.

+        *--------------------------------------------------------------------*/

+        sigB <<= 6;

+        for (;;) {

+            q = (rem * (uint_fast64_t) recip32)>>32;

+            if ( expDiff < 0 ) break;

+            rem = -(q * (uint32_t) sigB);

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -30 here.)

+        *--------------------------------------------------------------------*/

+        q >>= ~expDiff & 31;

+        rem = (rem<<(expDiff + 30)) - q * (uint32_t) sigB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    do {

+        altRem = rem;

+        ++q;

+        rem -= sigB;

+    } while ( ! (rem & 0x80000000) );

+    meanRem = rem + altRem;

+    if ( (meanRem & 0x80000000) || (! meanRem && (q & 1)) ) rem = altRem;

+    signRem = signA;

+    if ( 0x80000000 <= rem ) {

+        signRem = ! signRem;

+        rem = -rem;

+    }

+    return softfloat_normRoundPackToF32( signRem, expB, rem );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+    goto uiZ;

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF32UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_roundToInt.c b/c_emulator/SoftFloat-3e/source/f32_roundToInt.c
new file mode 100644
index 0000000..305af79
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_roundToInt.c
@@ -0,0 +1,120 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f32_roundToInt( float32_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    int_fast16_t exp;

+    uint_fast32_t uiZ, lastBitMask, roundBitsMask;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp <= 0x7E ) {

+        if ( !(uint32_t) (uiA<<1) ) return a;

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        uiZ = uiA & packToF32UI( 1, 0, 0 );

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !fracF32UI( uiA ) ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0x7E ) uiZ |= packToF32UI( 0, 0x7F, 0 );

+            break;

+         case softfloat_round_min:

+            if ( uiZ ) uiZ = packToF32UI( 1, 0x7F, 0 );

+            break;

+         case softfloat_round_max:

+            if ( !uiZ ) uiZ = packToF32UI( 0, 0x7F, 0 );

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            uiZ |= packToF32UI( 0, 0x7F, 0 );

+            break;

+#endif

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x96 <= exp ) {

+        if ( (exp == 0xFF) && fracF32UI( uiA ) ) {

+            uiZ = softfloat_propagateNaNF32UI( uiA, 0 );

+            goto uiZ;

+        }

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = uiA;

+    lastBitMask = (uint_fast32_t) 1<<(0x96 - exp);

+    roundBitsMask = lastBitMask - 1;

+    if ( roundingMode == softfloat_round_near_maxMag ) {

+        uiZ += lastBitMask>>1;

+    } else if ( roundingMode == softfloat_round_near_even ) {

+        uiZ += lastBitMask>>1;

+        if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask;

+    } else if (

+        roundingMode

+            == (signF32UI( uiZ ) ? softfloat_round_min : softfloat_round_max)

+    ) {

+        uiZ += roundBitsMask;

+    }

+    uiZ &= ~roundBitsMask;

+    if ( uiZ != uiA ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_sqrt.c b/c_emulator/SoftFloat-3e/source/f32_sqrt.c
new file mode 100644
index 0000000..9263bde
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_sqrt.c
@@ -0,0 +1,121 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f32_sqrt( float32_t a )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast32_t sigA, uiZ;

+    struct exp16_sig32 normExpSig;

+    int_fast16_t expZ;

+    uint_fast32_t sigZ, shiftedSigZ;

+    uint32_t negRem;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF32UI( uiA );

+    expA  = expF32UI( uiA );

+    sigA  = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0xFF ) {

+        if ( sigA ) {

+            uiZ = softfloat_propagateNaNF32UI( uiA, 0 );

+            goto uiZ;

+        }

+        if ( ! signA ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signA ) {

+        if ( ! (expA | sigA) ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF32Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x7F)>>1) + 0x7E;

+    expA &= 1;

+    sigA = (sigA | 0x00800000)<<8;

+    sigZ =

+        ((uint_fast64_t) sigA * softfloat_approxRecipSqrt32_1( expA, sigA ))

+            >>32;

+    if ( expA ) sigZ >>= 1;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sigZ += 2;

+    if ( (sigZ & 0x3F) < 2 ) {

+        shiftedSigZ = sigZ>>2;

+        negRem = shiftedSigZ * shiftedSigZ;

+        sigZ &= ~3;

+        if ( negRem & 0x80000000 ) {

+            sigZ |= 1;

+        } else {

+            if ( negRem ) --sigZ;

+        }

+    }

+    return softfloat_roundPackToF32( 0, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF32UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_sub.c b/c_emulator/SoftFloat-3e/source/f32_sub.c
new file mode 100644
index 0000000..383484d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_sub.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t f32_sub( float32_t a, float32_t b )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    union ui32_f32 uB;

+    uint_fast32_t uiB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 1)

+    float32_t (*magsFuncPtr)( uint_fast32_t, uint_fast32_t );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)

+    if ( signF32UI( uiA ^ uiB ) ) {

+        return softfloat_addMagsF32( uiA, uiB );

+    } else {

+        return softfloat_subMagsF32( uiA, uiB );

+    }

+#else

+    magsFuncPtr =

+        signF32UI( uiA ^ uiB ) ? softfloat_addMagsF32 : softfloat_subMagsF32;

+    return (*magsFuncPtr)( uiA, uiB );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_extF80.c b/c_emulator/SoftFloat-3e/source/f32_to_extF80.c
new file mode 100644
index 0000000..742ed64
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_extF80.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t f32_to_extF80( float32_t a )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    struct exp16_sig32 normExpSig;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );

+            uiZ64 = uiZ.v64;

+            uiZ0  = uiZ.v0;

+        } else {

+            uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+            uiZ0  = UINT64_C( 0x8000000000000000 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3F80 );

+    uiZ0  = (uint_fast64_t) (frac | 0x00800000)<<40;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_extF80M.c b/c_emulator/SoftFloat-3e/source/f32_to_extF80M.c
new file mode 100644
index 0000000..af7e32a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_extF80M.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f32_to_extF80M( float32_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = f32_to_extF80( a );

+

+}

+

+#else

+

+void f32_to_extF80M( float32_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    union ui32_f32 uA;

+    uint32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint32_t frac;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ64;

+    uint32_t uiZ32;

+    struct exp16_sig32 normExpSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zSPtr = (struct extFloat80M *) zPtr;

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToExtF80M( &commonNaN, zSPtr );

+            return;

+        }

+        uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+        uiZ32 = 0x80000000;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ32 = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3F80 );

+    uiZ32 = 0x80000000 | (uint32_t) frac<<8;

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = (uint64_t) uiZ32<<32;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_f128.c b/c_emulator/SoftFloat-3e/source/f32_to_f128.c
new file mode 100644
index 0000000..6a765a4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_f128.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f32_to_f128( float32_t a )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    struct exp16_sig32 normExpSig;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF128UI( &commonNaN );

+        } else {

+            uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 );

+            uiZ.v0  = 0;

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ.v64 = packToF128UI64( sign, 0, 0 );

+            uiZ.v0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ.v64 = packToF128UI64( sign, exp + 0x3F80, (uint_fast64_t) frac<<25 );

+    uiZ.v0  = 0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_f128M.c b/c_emulator/SoftFloat-3e/source/f32_to_f128M.c
new file mode 100644
index 0000000..ee7e6b3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_f128M.c
@@ -0,0 +1,115 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f32_to_f128M( float32_t a, float128_t *zPtr )

+{

+

+    *zPtr = f32_to_f128( a );

+

+}

+

+#else

+

+void f32_to_f128M( float32_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr;

+    union ui32_f32 uA;

+    uint32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint32_t frac, uiZ64;

+    struct commonNaN commonNaN;

+    uint32_t uiZ96;

+    struct exp16_sig32 normExpSig;

+    uint64_t frac64;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = 0;

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToF128M( &commonNaN, zWPtr );

+            return;

+        }

+        uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ96 = packToF128UI96( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac64 = (uint64_t) frac<<25;

+    uiZ96 = packToF128UI96( sign, exp + 0x3F80, frac64>>32 );

+    uiZ64 = frac64;

+ uiZ:

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = uiZ64;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_f16.c b/c_emulator/SoftFloat-3e/source/f32_to_f16.c
new file mode 100644
index 0000000..a9e77b7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_f16.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f32_to_f16( float32_t a )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t frac;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ, frac16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac16 = frac>>9 | ((frac & 0x1FF) != 0);

+    if ( ! (exp | frac16) ) {

+        uiZ = packToF16UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    return softfloat_roundPackToF16( sign, exp - 0x71, frac16 | 0x4000 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_f64.c b/c_emulator/SoftFloat-3e/source/f32_to_f64.c
new file mode 100644
index 0000000..4f97519
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_f64.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f32_to_f64( float32_t a )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t frac;

+    struct commonNaN commonNaN;

+    uint_fast64_t uiZ;

+    struct exp16_sig32 normExpSig;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    frac = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0xFF ) {

+        if ( frac ) {

+            softfloat_f32UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF64UI( &commonNaN );

+        } else {

+            uiZ = packToF64UI( sign, 0x7FF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ = packToF64UI( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = packToF64UI( sign, exp + 0x380, (uint_fast64_t) frac<<29 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_i32.c b/c_emulator/SoftFloat-3e/source/f32_to_i32.c
new file mode 100644
index 0000000..7d0356f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_i32.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f32_to_i32( float32_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    uint_fast64_t sig64;

+    int_fast16_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    sig  = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)

+    if ( (exp == 0xFF) && sig ) {

+#if (i32_fromNaN == i32_fromPosOverflow)

+        sign = 0;

+#elif (i32_fromNaN == i32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return i32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= 0x00800000;

+    sig64 = (uint_fast64_t) sig<<32;

+    shiftDist = 0xAA - exp;

+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    return softfloat_roundToI32( sign, sig64, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f32_to_i32_r_minMag.c
new file mode 100644
index 0000000..7652f2e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_i32_r_minMag.c
@@ -0,0 +1,89 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f32_to_i32_r_minMag( float32_t a, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    int_fast32_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF32UI( uiA );

+    sig = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x9E - exp;

+    if ( 32 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF32UI( uiA );

+    if ( shiftDist <= 0 ) {

+        if ( uiA == packToF32UI( 1, 0x9E, 0 ) ) return -0x7FFFFFFF - 1;

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = (sig | 0x00800000)<<8;

+    absZ = sig>>shiftDist;

+    if ( exact && ((uint_fast32_t) absZ<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_i64.c b/c_emulator/SoftFloat-3e/source/f32_to_i64.c
new file mode 100644
index 0000000..4b12544
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_i64.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f32_to_i64( float32_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+#ifdef SOFTFLOAT_FAST_INT64

+    uint_fast64_t sig64, extra;

+    struct uint64_extra sig64Extra;

+#else

+    uint32_t extSig[3];

+#endif

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    sig  = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0xBE - exp;

+    if ( shiftDist < 0 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= 0x00800000;

+#ifdef SOFTFLOAT_FAST_INT64

+    sig64 = (uint_fast64_t) sig<<40;

+    extra = 0;

+    if ( shiftDist ) {

+        sig64Extra = softfloat_shiftRightJam64Extra( sig64, 0, shiftDist );

+        sig64 = sig64Extra.v;

+        extra = sig64Extra.extra;

+    }

+    return softfloat_roundToI64( sign, sig64, extra, roundingMode, exact );

+#else

+    extSig[indexWord( 3, 2 )] = sig<<8;

+    extSig[indexWord( 3, 1 )] = 0;

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    return softfloat_roundMToI64( sign, extSig, roundingMode, exact );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f32_to_i64_r_minMag.c
new file mode 100644
index 0000000..397ddf6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_i64_r_minMag.c
@@ -0,0 +1,94 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f32_to_i64_r_minMag( float32_t a, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    uint_fast64_t sig64;

+    int_fast64_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF32UI( uiA );

+    sig = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0xBE - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF32UI( uiA );

+    if ( shiftDist <= 0 ) {

+        if ( uiA == packToF32UI( 1, 0xBE, 0 ) ) {

+            return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? i64_fromNaN

+                : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig |= 0x00800000;

+    sig64 = (uint_fast64_t) sig<<40;

+    absZ = sig64>>shiftDist;

+    shiftDist = 40 - shiftDist;

+    if ( exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31)) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_ui32.c b/c_emulator/SoftFloat-3e/source/f32_to_ui32.c
new file mode 100644
index 0000000..cb47d94
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_ui32.c
@@ -0,0 +1,84 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f32_to_ui32( float32_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    uint_fast64_t sig64;

+    int_fast16_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    sig  = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)

+    if ( (exp == 0xFF) && sig ) {

+#if (ui32_fromNaN == ui32_fromPosOverflow)

+        sign = 0;

+#elif (ui32_fromNaN == ui32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return ui32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= 0x00800000;

+    sig64 = (uint_fast64_t) sig<<32;

+    shiftDist = 0xAA - exp;

+    if ( 0 < shiftDist ) sig64 = softfloat_shiftRightJam64( sig64, shiftDist );

+    return softfloat_roundToUI32( sign, sig64, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f32_to_ui32_r_minMag.c
new file mode 100644
index 0000000..cdeb75f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_ui32_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f32_to_ui32_r_minMag( float32_t a, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    uint_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF32UI( uiA );

+    sig = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x9E - exp;

+    if ( 32 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF32UI( uiA );

+    if ( sign || (shiftDist < 0) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = (sig | 0x00800000)<<8;

+    z = sig>>shiftDist;

+    if ( exact && (z<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_ui64.c b/c_emulator/SoftFloat-3e/source/f32_to_ui64.c
new file mode 100644
index 0000000..61f204a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_ui64.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f32_to_ui64( float32_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+#ifdef SOFTFLOAT_FAST_INT64

+    uint_fast64_t sig64, extra;

+    struct uint64_extra sig64Extra;

+#else

+    uint32_t extSig[3];

+#endif

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF32UI( uiA );

+    exp  = expF32UI( uiA );

+    sig  = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0xBE - exp;

+    if ( shiftDist < 0 ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= 0x00800000;

+#ifdef SOFTFLOAT_FAST_INT64

+    sig64 = (uint_fast64_t) sig<<40;

+    extra = 0;

+    if ( shiftDist ) {

+        sig64Extra = softfloat_shiftRightJam64Extra( sig64, 0, shiftDist );

+        sig64 = sig64Extra.v;

+        extra = sig64Extra.extra;

+    }

+    return softfloat_roundToUI64( sign, sig64, extra, roundingMode, exact );

+#else

+    extSig[indexWord( 3, 2 )] = sig<<8;

+    extSig[indexWord( 3, 1 )] = 0;

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist ) softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    return softfloat_roundMToUI64( sign, extSig, roundingMode, exact );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f32_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f32_to_ui64_r_minMag.c
new file mode 100644
index 0000000..c0fe54f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f32_to_ui64_r_minMag.c
@@ -0,0 +1,90 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f32_to_ui64_r_minMag( float32_t a, bool exact )

+{

+    union ui32_f32 uA;

+    uint_fast32_t uiA;

+    int_fast16_t exp;

+    uint_fast32_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    uint_fast64_t sig64, z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF32UI( uiA );

+    sig = fracF32UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0xBE - exp;

+    if ( 64 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF32UI( uiA );

+    if ( sign || (shiftDist < 0) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0xFF) && sig ? ui64_fromNaN

+                : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig |= 0x00800000;

+    sig64 = (uint_fast64_t) sig<<40;

+    z = sig64>>shiftDist;

+    shiftDist = 40 - shiftDist;

+    if ( exact && (shiftDist < 0) && (uint32_t) (sig<<(shiftDist & 31)) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_add.c b/c_emulator/SoftFloat-3e/source/f64_add.c
new file mode 100644
index 0000000..42f840d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_add.c
@@ -0,0 +1,74 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t f64_add( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float64_t (*magsFuncPtr)( uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF64UI( uiB );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_addMagsF64( uiA, uiB, signA );

+    } else {

+        return softfloat_subMagsF64( uiA, uiB, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_addMagsF64 : softfloat_subMagsF64;

+    return (*magsFuncPtr)( uiA, uiB, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_div.c b/c_emulator/SoftFloat-3e/source/f64_div.c
new file mode 100644
index 0000000..9c967bb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_div.c
@@ -0,0 +1,172 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f64_div( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    bool signZ;

+    struct exp16_sig64 normExpSig;

+    int_fast16_t expZ;

+    uint32_t recip32, sig32Z, doubleTerm;

+    uint_fast64_t rem;

+    uint32_t q;

+    uint_fast64_t sigZ;

+    uint_fast64_t uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF64UI( uiB );

+    expB  = expF64UI( uiB );

+    sigB  = fracF64UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA ) goto propagateNaN;

+        if ( expB == 0x7FF ) {

+            if ( sigB ) goto propagateNaN;

+            goto invalid;

+        }

+        goto infinity;

+    }

+    if ( expB == 0x7FF ) {

+        if ( sigB ) goto propagateNaN;

+        goto zero;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) {

+            if ( ! (expA | sigA) ) goto invalid;

+            softfloat_raiseFlags( softfloat_flag_infinite );

+            goto infinity;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA - expB + 0x3FE;

+    sigA |= UINT64_C( 0x0010000000000000 );

+    sigB |= UINT64_C( 0x0010000000000000 );

+    if ( sigA < sigB ) {

+        --expZ;

+        sigA <<= 11;

+    } else {

+        sigA <<= 10;

+    }

+    sigB <<= 11;

+    recip32 = softfloat_approxRecip32_1( sigB>>32 ) - 2;

+    sig32Z = ((uint32_t) (sigA>>32) * (uint_fast64_t) recip32)>>32;

+    doubleTerm = sig32Z<<1;

+    rem =

+        ((sigA - (uint_fast64_t) doubleTerm * (uint32_t) (sigB>>32))<<28)

+            - (uint_fast64_t) doubleTerm * ((uint32_t) sigB>>4);

+    q = (((uint32_t) (rem>>32) * (uint_fast64_t) recip32)>>32) + 4;

+    sigZ = ((uint_fast64_t) sig32Z<<32) + ((uint_fast64_t) q<<4);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (sigZ & 0x1FF) < 4<<4 ) {

+        q &= ~7;

+        sigZ &= ~(uint_fast64_t) 0x7F;

+        doubleTerm = q<<1;

+        rem =

+            ((rem - (uint_fast64_t) doubleTerm * (uint32_t) (sigB>>32))<<28)

+                - (uint_fast64_t) doubleTerm * ((uint32_t) sigB>>4);

+        if ( rem & UINT64_C( 0x8000000000000000 ) ) {

+            sigZ -= 1<<7;

+        } else {

+            if ( rem ) sigZ |= 1;

+        }

+    }

+    return softfloat_roundPackToF64( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF64UI;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infinity:

+    uiZ = packToF64UI( signZ, 0x7FF, 0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF64UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_eq.c b/c_emulator/SoftFloat-3e/source/f64_eq.c
new file mode 100644
index 0000000..3602003
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_eq.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f64_eq( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    return (uiA == uiB) || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_eq_signaling.c b/c_emulator/SoftFloat-3e/source/f64_eq_signaling.c
new file mode 100644
index 0000000..5daa179
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_eq_signaling.c
@@ -0,0 +1,61 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f64_eq_signaling( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    return (uiA == uiB) || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_isSignalingNaN.c b/c_emulator/SoftFloat-3e/source/f64_isSignalingNaN.c
new file mode 100644
index 0000000..e5d3832
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_isSignalingNaN.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f64_isSignalingNaN( float64_t a )

+{

+    union ui64_f64 uA;

+

+    uA.f = a;

+    return softfloat_isSigNaNF64UI( uA.ui );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_le.c b/c_emulator/SoftFloat-3e/source/f64_le.c
new file mode 100644
index 0000000..0b43d04
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_le.c
@@ -0,0 +1,67 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f64_le( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF64UI( uiA );

+    signB = signF64UI( uiB );

+    return

+        (signA != signB)

+            ? signA || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_le_quiet.c b/c_emulator/SoftFloat-3e/source/f64_le_quiet.c
new file mode 100644
index 0000000..832eee7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_le_quiet.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f64_le_quiet( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF64UI( uiA );

+    signB = signF64UI( uiB );

+    return

+        (signA != signB)

+            ? signA || ! ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            : (uiA == uiB) || (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_lt.c b/c_emulator/SoftFloat-3e/source/f64_lt.c
new file mode 100644
index 0000000..49ee05b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_lt.c
@@ -0,0 +1,67 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+bool f64_lt( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return false;

+    }

+    signA = signF64UI( uiA );

+    signB = signF64UI( uiB );

+    return

+        (signA != signB)

+            ? signA && ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_lt_quiet.c b/c_emulator/SoftFloat-3e/source/f64_lt_quiet.c
new file mode 100644
index 0000000..d640880
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_lt_quiet.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+bool f64_lt_quiet( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signA, signB;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    if ( isNaNF64UI( uiA ) || isNaNF64UI( uiB ) ) {

+        if (

+            softfloat_isSigNaNF64UI( uiA ) || softfloat_isSigNaNF64UI( uiB )

+        ) {

+            softfloat_raiseFlags( softfloat_flag_invalid );

+        }

+        return false;

+    }

+    signA = signF64UI( uiA );

+    signB = signF64UI( uiB );

+    return

+        (signA != signB)

+            ? signA && ((uiA | uiB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+            : (uiA != uiB) && (signA ^ (uiA < uiB));

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_mul.c b/c_emulator/SoftFloat-3e/source/f64_mul.c
new file mode 100644
index 0000000..222e91d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_mul.c
@@ -0,0 +1,150 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f64_mul( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    bool signZ;

+    uint_fast64_t magBits;

+    struct exp16_sig64 normExpSig;

+    int_fast16_t expZ;

+#ifdef SOFTFLOAT_FAST_INT64

+    struct uint128 sig128Z;

+#else

+    uint32_t sig128Z[4];

+#endif

+    uint_fast64_t sigZ, uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF64UI( uiB );

+    expB  = expF64UI( uiB );

+    sigB  = fracF64UI( uiB );

+    signZ = signA ^ signB;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN;

+        magBits = expB | sigB;

+        goto infArg;

+    }

+    if ( expB == 0x7FF ) {

+        if ( sigB ) goto propagateNaN;

+        magBits = expA | sigA;

+        goto infArg;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zero;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zero;

+        normExpSig = softfloat_normSubnormalF64Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FF;

+    sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10;

+    sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<11;

+#ifdef SOFTFLOAT_FAST_INT64

+    sig128Z = softfloat_mul64To128( sigA, sigB );

+    sigZ = sig128Z.v64 | (sig128Z.v0 != 0);

+#else

+    softfloat_mul64To128M( sigA, sigB, sig128Z );

+    sigZ =

+        (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 | sig128Z[indexWord( 4, 2 )];

+    if ( sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )] ) sigZ |= 1;

+#endif

+    if ( sigZ < UINT64_C( 0x4000000000000000 ) ) {

+        --expZ;

+        sigZ <<= 1;

+    }

+    return softfloat_roundPackToF64( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infArg:

+    if ( ! magBits ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ = defaultNaNF64UI;

+    } else {

+        uiZ = packToF64UI( signZ, 0x7FF, 0 );

+    }

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zero:

+    uiZ = packToF64UI( signZ, 0, 0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_mulAdd.c b/c_emulator/SoftFloat-3e/source/f64_mulAdd.c
new file mode 100644
index 0000000..fea3d96
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_mulAdd.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t f64_mulAdd( float64_t a, float64_t b, float64_t c )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    union ui64_f64 uC;

+    uint_fast64_t uiC;

+

+    uA.f = a;

+    uiA = uA.ui;

+    uB.f = b;

+    uiB = uB.ui;

+    uC.f = c;

+    uiC = uC.ui;

+    return softfloat_mulAddF64( uiA, uiB, uiC, 0 );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_rem.c b/c_emulator/SoftFloat-3e/source/f64_rem.c
new file mode 100644
index 0000000..ffce679
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_rem.c
@@ -0,0 +1,189 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f64_rem( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    struct exp16_sig64 normExpSig;

+    uint64_t rem;

+    int_fast16_t expDiff;

+    uint32_t q, recip32;

+    uint_fast64_t q64;

+    uint64_t altRem, meanRem;

+    bool signRem;

+    uint_fast64_t uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    expB = expF64UI( uiB );

+    sigB = fracF64UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN;

+        goto invalid;

+    }

+    if ( expB == 0x7FF ) {

+        if ( sigB ) goto propagateNaN;

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA < expB - 1 ) return a;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expB ) {

+        if ( ! sigB ) goto invalid;

+        normExpSig = softfloat_normSubnormalF64Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    rem = sigA | UINT64_C( 0x0010000000000000 );

+    sigB |= UINT64_C( 0x0010000000000000 );

+    expDiff = expA - expB;

+    if ( expDiff < 1 ) {

+        if ( expDiff < -1 ) return a;

+        sigB <<= 9;

+        if ( expDiff ) {

+            rem <<= 8;

+            q = 0;

+        } else {

+            rem <<= 9;

+            q = (sigB <= rem);

+            if ( q ) rem -= sigB;

+        }

+    } else {

+        recip32 = softfloat_approxRecip32_1( sigB>>21 );

+        /*--------------------------------------------------------------------

+        | Changing the shift of `rem' here requires also changing the initial

+        | subtraction from `expDiff'.

+        *--------------------------------------------------------------------*/

+        rem <<= 9;

+        expDiff -= 30;

+        /*--------------------------------------------------------------------

+        | The scale of `sigB' affects how many bits are obtained during each

+        | cycle of the loop.  Currently this is 29 bits per loop iteration,

+        | the maximum possible.

+        *--------------------------------------------------------------------*/

+        sigB <<= 9;

+        for (;;) {

+            q64 = (uint32_t) (rem>>32) * (uint_fast64_t) recip32;

+            if ( expDiff < 0 ) break;

+            q = (q64 + 0x80000000)>>32;

+#ifdef SOFTFLOAT_FAST_INT64

+            rem <<= 29;

+#else

+            rem = (uint_fast64_t) (uint32_t) (rem>>3)<<32;

+#endif

+            rem -= q * (uint64_t) sigB;

+            if ( rem & UINT64_C( 0x8000000000000000 ) ) rem += sigB;

+            expDiff -= 29;

+        }

+        /*--------------------------------------------------------------------

+        | (`expDiff' cannot be less than -29 here.)

+        *--------------------------------------------------------------------*/

+        q = (uint32_t) (q64>>32)>>(~expDiff & 31);

+        rem = (rem<<(expDiff + 30)) - q * (uint64_t) sigB;

+        if ( rem & UINT64_C( 0x8000000000000000 ) ) {

+            altRem = rem + sigB;

+            goto selectRem;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    do {

+        altRem = rem;

+        ++q;

+        rem -= sigB;

+    } while ( ! (rem & UINT64_C( 0x8000000000000000 )) );

+ selectRem:

+    meanRem = rem + altRem;

+    if (

+        (meanRem & UINT64_C( 0x8000000000000000 )) || (! meanRem && (q & 1))

+    ) {

+        rem = altRem;

+    }

+    signRem = signA;

+    if ( rem & UINT64_C( 0x8000000000000000 ) ) {

+        signRem = ! signRem;

+        rem = -rem;

+    }

+    return softfloat_normRoundPackToF64( signRem, expB, rem );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+    goto uiZ;

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF64UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_roundToInt.c b/c_emulator/SoftFloat-3e/source/f64_roundToInt.c
new file mode 100644
index 0000000..54e7b05
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_roundToInt.c
@@ -0,0 +1,120 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f64_roundToInt( float64_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    int_fast16_t exp;

+    uint_fast64_t uiZ, lastBitMask, roundBitsMask;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp <= 0x3FE ) {

+        if ( !(uiA & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) return a;

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+        uiZ = uiA & packToF64UI( 1, 0, 0 );

+        switch ( roundingMode ) {

+         case softfloat_round_near_even:

+            if ( !fracF64UI( uiA ) ) break;

+         case softfloat_round_near_maxMag:

+            if ( exp == 0x3FE ) uiZ |= packToF64UI( 0, 0x3FF, 0 );

+            break;

+         case softfloat_round_min:

+            if ( uiZ ) uiZ = packToF64UI( 1, 0x3FF, 0 );

+            break;

+         case softfloat_round_max:

+            if ( !uiZ ) uiZ = packToF64UI( 0, 0x3FF, 0 );

+            break;

+#ifdef SOFTFLOAT_ROUND_ODD

+         case softfloat_round_odd:

+            uiZ |= packToF64UI( 0, 0x3FF, 0 );

+            break;

+#endif

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x433 <= exp ) {

+        if ( (exp == 0x7FF) && fracF64UI( uiA ) ) {

+            uiZ = softfloat_propagateNaNF64UI( uiA, 0 );

+            goto uiZ;

+        }

+        return a;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ = uiA;

+    lastBitMask = (uint_fast64_t) 1<<(0x433 - exp);

+    roundBitsMask = lastBitMask - 1;

+    if ( roundingMode == softfloat_round_near_maxMag ) {

+        uiZ += lastBitMask>>1;

+    } else if ( roundingMode == softfloat_round_near_even ) {

+        uiZ += lastBitMask>>1;

+        if ( !(uiZ & roundBitsMask) ) uiZ &= ~lastBitMask;

+    } else if (

+        roundingMode

+            == (signF64UI( uiZ ) ? softfloat_round_min : softfloat_round_max)

+    ) {

+        uiZ += roundBitsMask;

+    }

+    uiZ &= ~roundBitsMask;

+    if ( uiZ != uiA ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) uiZ |= lastBitMask;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_sqrt.c b/c_emulator/SoftFloat-3e/source/f64_sqrt.c
new file mode 100644
index 0000000..f9f226b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_sqrt.c
@@ -0,0 +1,133 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t f64_sqrt( float64_t a )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    int_fast16_t expA;

+    uint_fast64_t sigA, uiZ;

+    struct exp16_sig64 normExpSig;

+    int_fast16_t expZ;

+    uint32_t sig32A, recipSqrt32, sig32Z;

+    uint_fast64_t rem;

+    uint32_t q;

+    uint_fast64_t sigZ, shiftedSigZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA ) {

+            uiZ = softfloat_propagateNaNF64UI( uiA, 0 );

+            goto uiZ;

+        }

+        if ( ! signA ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signA ) {

+        if ( ! (expA | sigA) ) return a;

+        goto invalid;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) return a;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    | (`sig32Z' is guaranteed to be a lower bound on the square root of

+    | `sig32A', which makes `sig32Z' also a lower bound on the square root of

+    | `sigA'.)

+    *------------------------------------------------------------------------*/

+    expZ = ((expA - 0x3FF)>>1) + 0x3FE;

+    expA &= 1;

+    sigA |= UINT64_C( 0x0010000000000000 );

+    sig32A = sigA>>21;

+    recipSqrt32 = softfloat_approxRecipSqrt32_1( expA, sig32A );

+    sig32Z = ((uint_fast64_t) sig32A * recipSqrt32)>>32;

+    if ( expA ) {

+        sigA <<= 8;

+        sig32Z >>= 1;

+    } else {

+        sigA <<= 9;

+    }

+    rem = sigA - (uint_fast64_t) sig32Z * sig32Z;

+    q = ((uint32_t) (rem>>2) * (uint_fast64_t) recipSqrt32)>>32;

+    sigZ = ((uint_fast64_t) sig32Z<<32 | 1<<5) + ((uint_fast64_t) q<<3);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (sigZ & 0x1FF) < 0x22 ) {

+        sigZ &= ~(uint_fast64_t) 0x3F;

+        shiftedSigZ = sigZ>>6;

+        rem = (sigA<<52) - shiftedSigZ * shiftedSigZ;

+        if ( rem & UINT64_C( 0x8000000000000000 ) ) {

+            --sigZ;

+        } else {

+            if ( rem ) sigZ |= 1;

+        }

+    }

+    return softfloat_roundPackToF64( 0, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF64UI;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_sub.c b/c_emulator/SoftFloat-3e/source/f64_sub.c
new file mode 100644
index 0000000..b5ccb88
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_sub.c
@@ -0,0 +1,74 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t f64_sub( float64_t a, float64_t b )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool signA;

+    union ui64_f64 uB;

+    uint_fast64_t uiB;

+    bool signB;

+#if ! defined INLINE_LEVEL || (INLINE_LEVEL < 2)

+    float64_t (*magsFuncPtr)( uint_fast64_t, uint_fast64_t, bool );

+#endif

+

+    uA.f = a;

+    uiA = uA.ui;

+    signA = signF64UI( uiA );

+    uB.f = b;

+    uiB = uB.ui;

+    signB = signF64UI( uiB );

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+    if ( signA == signB ) {

+        return softfloat_subMagsF64( uiA, uiB, signA );

+    } else {

+        return softfloat_addMagsF64( uiA, uiB, signA );

+    }

+#else

+    magsFuncPtr =

+        (signA == signB) ? softfloat_subMagsF64 : softfloat_addMagsF64;

+    return (*magsFuncPtr)( uiA, uiB, signA );

+#endif

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_extF80.c b/c_emulator/SoftFloat-3e/source/f64_to_extF80.c
new file mode 100644
index 0000000..2799d9b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_extF80.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t f64_to_extF80( float64_t a )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    struct exp16_sig64 normExpSig;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToExtF80UI( &commonNaN );

+            uiZ64 = uiZ.v64;

+            uiZ0  = uiZ.v0;

+        } else {

+            uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+            uiZ0  = UINT64_C( 0x8000000000000000 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3C00 );

+    uiZ0  = (frac | UINT64_C( 0x0010000000000000 ))<<11;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_extF80M.c b/c_emulator/SoftFloat-3e/source/f64_to_extF80M.c
new file mode 100644
index 0000000..a2e67e4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_extF80M.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f64_to_extF80M( float64_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = f64_to_extF80( a );

+

+}

+

+#else

+

+void f64_to_extF80M( float64_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    union ui64_f64 uA;

+    uint64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint64_t frac;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ64;

+    uint64_t uiZ0;

+    struct exp16_sig64 normExpSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zSPtr = (struct extFloat80M *) zPtr;

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToExtF80M( &commonNaN, zSPtr );

+            return;

+        }

+        uiZ64 = packToExtF80UI64( sign, 0x7FFF );

+        uiZ0  = UINT64_C( 0x8000000000000000 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ64 = packToExtF80UI64( sign, 0 );

+            uiZ0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( frac );

+        exp = normExpSig.exp;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiZ64 = packToExtF80UI64( sign, exp + 0x3C00 );

+    uiZ0  = UINT64_C( 0x8000000000000000 ) | frac<<11;

+ uiZ:

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif  = uiZ0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_f128.c b/c_emulator/SoftFloat-3e/source/f64_to_f128.c
new file mode 100644
index 0000000..60af3b0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_f128.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t f64_to_f128( float64_t a )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t frac;

+    struct commonNaN commonNaN;

+    struct uint128 uiZ;

+    struct exp16_sig64 normExpSig;

+    struct uint128 frac128;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF128UI( &commonNaN );

+        } else {

+            uiZ.v64 = packToF128UI64( sign, 0x7FFF, 0 );

+            uiZ.v0  = 0;

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ.v64 = packToF128UI64( sign, 0, 0 );

+            uiZ.v0  = 0;

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac128 = softfloat_shortShiftLeft128( 0, frac, 60 );

+    uiZ.v64 = packToF128UI64( sign, exp + 0x3C00, frac128.v64 );

+    uiZ.v0  = frac128.v0;

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_f128M.c b/c_emulator/SoftFloat-3e/source/f64_to_f128M.c
new file mode 100644
index 0000000..fbc4515
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_f128M.c
@@ -0,0 +1,117 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void f64_to_f128M( float64_t a, float128_t *zPtr )

+{

+

+    *zPtr = f64_to_f128( a );

+

+}

+

+#else

+

+void f64_to_f128M( float64_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr;

+    union ui64_f64 uA;

+    uint64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint64_t frac;

+    struct commonNaN commonNaN;

+    uint32_t uiZ96;

+    struct exp16_sig64 normExpSig;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr = (uint32_t *) zPtr;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr[indexWord( 4, 0 )] = 0;

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            softfloat_commonNaNToF128M( &commonNaN, zWPtr );

+            return;

+        }

+        uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! exp ) {

+        if ( ! frac ) {

+            uiZ96 = packToF128UI96( sign, 0, 0 );

+            goto uiZ;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( frac );

+        exp = normExpSig.exp - 1;

+        frac = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    zWPtr[indexWord( 4, 1 )] = (uint32_t) frac<<28;

+    frac >>= 4;

+    zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp + 0x3C00, frac>>32 );

+    zWPtr[indexWord( 4, 2 )] = frac;

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ uiZ:

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_f16.c b/c_emulator/SoftFloat-3e/source/f64_to_f16.c
new file mode 100644
index 0000000..121e306
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_f16.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t f64_to_f16( float64_t a )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t frac;

+    struct commonNaN commonNaN;

+    uint_fast16_t uiZ, frac16;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF16UI( &commonNaN );

+        } else {

+            uiZ = packToF16UI( sign, 0x1F, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac16 = softfloat_shortShiftRightJam64( frac, 38 );

+    if ( ! (exp | frac16) ) {

+        uiZ = packToF16UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    return softfloat_roundPackToF16( sign, exp - 0x3F1, frac16 | 0x4000 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_f32.c b/c_emulator/SoftFloat-3e/source/f64_to_f32.c
new file mode 100644
index 0000000..a181065
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_f32.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t f64_to_f32( float64_t a )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t frac;

+    struct commonNaN commonNaN;

+    uint_fast32_t uiZ, frac32;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    frac = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp == 0x7FF ) {

+        if ( frac ) {

+            softfloat_f64UIToCommonNaN( uiA, &commonNaN );

+            uiZ = softfloat_commonNaNToF32UI( &commonNaN );

+        } else {

+            uiZ = packToF32UI( sign, 0xFF, 0 );

+        }

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    frac32 = softfloat_shortShiftRightJam64( frac, 22 );

+    if ( ! (exp | frac32) ) {

+        uiZ = packToF32UI( sign, 0, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    return softfloat_roundPackToF32( sign, exp - 0x381, frac32 | 0x40000000 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_i32.c b/c_emulator/SoftFloat-3e/source/f64_to_i32.c
new file mode 100644
index 0000000..8d9785b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_i32.c
@@ -0,0 +1,82 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f64_to_i32( float64_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    sig  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (i32_fromNaN != i32_fromPosOverflow) || (i32_fromNaN != i32_fromNegOverflow)

+    if ( (exp == 0x7FF) && sig ) {

+#if (i32_fromNaN == i32_fromPosOverflow)

+        sign = 0;

+#elif (i32_fromNaN == i32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return i32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= UINT64_C( 0x0010000000000000 );

+    shiftDist = 0x427 - exp;

+    if ( 0 < shiftDist ) sig = softfloat_shiftRightJam64( sig, shiftDist );

+    return softfloat_roundToI32( sign, sig, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_i32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f64_to_i32_r_minMag.c
new file mode 100644
index 0000000..8b7a91f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_i32_r_minMag.c
@@ -0,0 +1,96 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t f64_to_i32_r_minMag( float64_t a, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    int_fast32_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF64UI( uiA );

+    sig = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x433 - exp;

+    if ( 53 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF64UI( uiA );

+    if ( shiftDist < 22 ) {

+        if (

+            sign && (exp == 0x41E) && (sig < UINT64_C( 0x0000000000200000 ))

+        ) {

+            if ( exact && sig ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return -0x7FFFFFFF - 1;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FF) && sig ? i32_fromNaN

+                : sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig |= UINT64_C( 0x0010000000000000 );

+    absZ = sig>>shiftDist;

+    if ( exact && ((uint_fast64_t) (uint_fast32_t) absZ<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_i64.c b/c_emulator/SoftFloat-3e/source/f64_to_i64.c
new file mode 100644
index 0000000..7199643
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_i64.c
@@ -0,0 +1,103 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f64_to_i64( float64_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+#ifdef SOFTFLOAT_FAST_INT64

+    struct uint64_extra sigExtra;

+#else

+    uint32_t extSig[3];

+#endif

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    sig  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= UINT64_C( 0x0010000000000000 );

+    shiftDist = 0x433 - exp;

+#ifdef SOFTFLOAT_FAST_INT64

+    if ( shiftDist <= 0 ) {

+        if ( shiftDist < -11 ) goto invalid;

+        sigExtra.v = sig<<-shiftDist;

+        sigExtra.extra = 0;

+    } else {

+        sigExtra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );

+    }

+    return

+        softfloat_roundToI64(

+            sign, sigExtra.v, sigExtra.extra, roundingMode, exact );

+#else

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist <= 0 ) {

+        if ( shiftDist < -11 ) goto invalid;

+        sig <<= -shiftDist;

+        extSig[indexWord( 3, 2 )] = sig>>32;

+        extSig[indexWord( 3, 1 )] = sig;

+    } else {

+        extSig[indexWord( 3, 2 )] = sig>>32;

+        extSig[indexWord( 3, 1 )] = sig;

+        softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    }

+    return softfloat_roundMToI64( sign, extSig, roundingMode, exact );

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FF) && fracF64UI( uiA ) ? i64_fromNaN

+            : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_i64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f64_to_i64_r_minMag.c
new file mode 100644
index 0000000..56c6a10
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_i64_r_minMag.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t f64_to_i64_r_minMag( float64_t a, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+    int_fast64_t absZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    sig  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x433 - exp;

+    if ( shiftDist <= 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( shiftDist < -10 ) {

+            if ( uiA == packToF64UI( 1, 0x43E, 0 ) ) {

+                return -INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;

+            }

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            return

+                (exp == 0x7FF) && sig ? i64_fromNaN

+                    : sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig |= UINT64_C( 0x0010000000000000 );

+        absZ = sig<<-shiftDist;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( 53 <= shiftDist ) {

+            if ( exact && (exp | sig) ) {

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+            }

+            return 0;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig |= UINT64_C( 0x0010000000000000 );

+        absZ = sig>>shiftDist;

+        if ( exact && (absZ<<shiftDist != sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return sign ? -absZ : absZ;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_ui32.c b/c_emulator/SoftFloat-3e/source/f64_to_ui32.c
new file mode 100644
index 0000000..9d21146
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_ui32.c
@@ -0,0 +1,82 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f64_to_ui32( float64_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    sig  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+#if (ui32_fromNaN != ui32_fromPosOverflow) || (ui32_fromNaN != ui32_fromNegOverflow)

+    if ( (exp == 0x7FF) && sig ) {

+#if (ui32_fromNaN == ui32_fromPosOverflow)

+        sign = 0;

+#elif (ui32_fromNaN == ui32_fromNegOverflow)

+        sign = 1;

+#else

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return ui32_fromNaN;

+#endif

+    }

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= UINT64_C( 0x0010000000000000 );

+    shiftDist = 0x427 - exp;

+    if ( 0 < shiftDist ) sig = softfloat_shiftRightJam64( sig, shiftDist );

+    return softfloat_roundToUI32( sign, sig, roundingMode, exact );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_ui32_r_minMag.c b/c_emulator/SoftFloat-3e/source/f64_to_ui32_r_minMag.c
new file mode 100644
index 0000000..6e3d14e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_ui32_r_minMag.c
@@ -0,0 +1,88 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t f64_to_ui32_r_minMag( float64_t a, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    uint_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF64UI( uiA );

+    sig = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x433 - exp;

+    if ( 53 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF64UI( uiA );

+    if ( sign || (shiftDist < 21) ) {

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        return

+            (exp == 0x7FF) && sig ? ui32_fromNaN

+                : sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig |= UINT64_C( 0x0010000000000000 );

+    z = sig>>shiftDist;

+    if ( exact && ((uint_fast64_t) z<<shiftDist != sig) ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_ui64.c b/c_emulator/SoftFloat-3e/source/f64_to_ui64.c
new file mode 100644
index 0000000..292e47a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_ui64.c
@@ -0,0 +1,103 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f64_to_ui64( float64_t a, uint_fast8_t roundingMode, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    bool sign;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+#ifdef SOFTFLOAT_FAST_INT64

+    struct uint64_extra sigExtra;

+#else

+    uint32_t extSig[3];

+#endif

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    sign = signF64UI( uiA );

+    exp  = expF64UI( uiA );

+    sig  = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( exp ) sig |= UINT64_C( 0x0010000000000000 );

+    shiftDist = 0x433 - exp;

+#ifdef SOFTFLOAT_FAST_INT64

+    if ( shiftDist <= 0 ) {

+        if ( shiftDist < -11 ) goto invalid;

+        sigExtra.v = sig<<-shiftDist;

+        sigExtra.extra = 0;

+    } else {

+        sigExtra = softfloat_shiftRightJam64Extra( sig, 0, shiftDist );

+    }

+    return

+        softfloat_roundToUI64(

+            sign, sigExtra.v, sigExtra.extra, roundingMode, exact );

+#else

+    extSig[indexWord( 3, 0 )] = 0;

+    if ( shiftDist <= 0 ) {

+        if ( shiftDist < -11 ) goto invalid;

+        sig <<= -shiftDist;

+        extSig[indexWord( 3, 2 )] = sig>>32;

+        extSig[indexWord( 3, 1 )] = sig;

+    } else {

+        extSig[indexWord( 3, 2 )] = sig>>32;

+        extSig[indexWord( 3, 1 )] = sig;

+        softfloat_shiftRightJam96M( extSig, shiftDist, extSig );

+    }

+    return softfloat_roundMToUI64( sign, extSig, roundingMode, exact );

+#endif

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FF) && fracF64UI( uiA ) ? ui64_fromNaN

+            : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/f64_to_ui64_r_minMag.c b/c_emulator/SoftFloat-3e/source/f64_to_ui64_r_minMag.c
new file mode 100644
index 0000000..87eb0d0
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/f64_to_ui64_r_minMag.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t f64_to_ui64_r_minMag( float64_t a, bool exact )

+{

+    union ui64_f64 uA;

+    uint_fast64_t uiA;

+    int_fast16_t exp;

+    uint_fast64_t sig;

+    int_fast16_t shiftDist;

+    bool sign;

+    uint_fast64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uA.f = a;

+    uiA = uA.ui;

+    exp = expF64UI( uiA );

+    sig = fracF64UI( uiA );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 0x433 - exp;

+    if ( 53 <= shiftDist ) {

+        if ( exact && (exp | sig) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+        return 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sign = signF64UI( uiA );

+    if ( sign ) goto invalid;

+    if ( shiftDist <= 0 ) {

+        if ( shiftDist < -11 ) goto invalid;

+        z = (sig | UINT64_C( 0x0010000000000000 ))<<-shiftDist;

+    } else {

+        sig |= UINT64_C( 0x0010000000000000 );

+        z = sig>>shiftDist;

+        if ( exact && (uint64_t) (sig<<(-shiftDist & 63)) ) {

+            softfloat_exceptionFlags |= softfloat_flag_inexact;

+        }

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return

+        (exp == 0x7FF) && sig ? ui64_fromNaN

+            : sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_extF80.c b/c_emulator/SoftFloat-3e/source/i32_to_extF80.c
new file mode 100644
index 0000000..8036fa9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_extF80.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t i32_to_extF80( int32_t a )

+{

+    uint_fast16_t uiZ64;

+    uint_fast32_t absA;

+    bool sign;

+    int_fast8_t shiftDist;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    uiZ64 = 0;

+    absA = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;

+        shiftDist = softfloat_countLeadingZeros32( absA );

+        uiZ64 = packToExtF80UI64( sign, 0x401E - shiftDist );

+        absA <<= shiftDist;

+    }

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif = (uint_fast64_t) absA<<32;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_extF80M.c b/c_emulator/SoftFloat-3e/source/i32_to_extF80M.c
new file mode 100644
index 0000000..6d5431c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_extF80M.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void i32_to_extF80M( int32_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = i32_to_extF80( a );

+

+}

+

+#else

+

+void i32_to_extF80M( int32_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiZ64;

+    uint64_t sigZ;

+    bool sign;

+    uint32_t absA;

+    int_fast8_t shiftDist;

+

+    zSPtr = (struct extFloat80M *) zPtr;

+    uiZ64 = 0;

+    sigZ = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint32_t) a : (uint32_t) a;

+        shiftDist = softfloat_countLeadingZeros32( absA );

+        uiZ64 = packToExtF80UI64( sign, 0x401E - shiftDist );

+        sigZ = (uint64_t) (absA<<shiftDist)<<32;

+    }

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = sigZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_f128.c b/c_emulator/SoftFloat-3e/source/i32_to_f128.c
new file mode 100644
index 0000000..a7d55cb
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_f128.c
@@ -0,0 +1,64 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t i32_to_f128( int32_t a )

+{

+    uint_fast64_t uiZ64;

+    bool sign;

+    uint_fast32_t absA;

+    int_fast8_t shiftDist;

+    union ui128_f128 uZ;

+

+    uiZ64 = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;

+        shiftDist = softfloat_countLeadingZeros32( absA ) + 17;

+        uiZ64 =

+            packToF128UI64(

+                sign, 0x402E - shiftDist, (uint_fast64_t) absA<<shiftDist );

+    }

+    uZ.ui.v64 = uiZ64;

+    uZ.ui.v0  = 0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_f128M.c b/c_emulator/SoftFloat-3e/source/i32_to_f128M.c
new file mode 100644
index 0000000..beb3c10
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_f128M.c
@@ -0,0 +1,81 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void i32_to_f128M( int32_t a, float128_t *zPtr )

+{

+

+    *zPtr = i32_to_f128( a );

+

+}

+

+#else

+

+void i32_to_f128M( int32_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr;

+    uint32_t uiZ96, uiZ64;

+    bool sign;

+    uint32_t absA;

+    int_fast8_t shiftDist;

+    uint64_t normAbsA;

+

+    zWPtr = (uint32_t *) zPtr;

+    uiZ96 = 0;

+    uiZ64 = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint32_t) a : (uint32_t) a;

+        shiftDist = softfloat_countLeadingZeros32( absA ) + 17;

+        normAbsA = (uint64_t) absA<<shiftDist;

+        uiZ96 = packToF128UI96( sign, 0x402E - shiftDist, normAbsA>>32 );

+        uiZ64 = normAbsA;

+    }

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = uiZ64;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_f16.c b/c_emulator/SoftFloat-3e/source/i32_to_f16.c
new file mode 100644
index 0000000..d311724
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_f16.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t i32_to_f16( int32_t a )

+{

+    bool sign;

+    uint_fast32_t absA;

+    int_fast8_t shiftDist;

+    union ui16_f16 u;

+    uint_fast16_t sig;

+

+    sign = (a < 0);

+    absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;

+    shiftDist = softfloat_countLeadingZeros32( absA ) - 21;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF16UI(

+                    sign, 0x18 - shiftDist, (uint_fast16_t) absA<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 4;

+        sig =

+            (shiftDist < 0)

+                ? absA>>(-shiftDist)

+                      | ((uint32_t) (absA<<(shiftDist & 31)) != 0)

+                : (uint_fast16_t) absA<<shiftDist;

+        return softfloat_roundPackToF16( sign, 0x1C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_f32.c b/c_emulator/SoftFloat-3e/source/i32_to_f32.c
new file mode 100644
index 0000000..e6de3e8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_f32.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t i32_to_f32( int32_t a )

+{

+    bool sign;

+    union ui32_f32 uZ;

+    uint_fast32_t absA;

+

+    sign = (a < 0);

+    if ( ! (a & 0x7FFFFFFF) ) {

+        uZ.ui = sign ? packToF32UI( 1, 0x9E, 0 ) : 0;

+        return uZ.f;

+    }

+    absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;

+    return softfloat_normRoundPackToF32( sign, 0x9C, absA );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i32_to_f64.c b/c_emulator/SoftFloat-3e/source/i32_to_f64.c
new file mode 100644
index 0000000..24feda5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i32_to_f64.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t i32_to_f64( int32_t a )

+{

+    uint_fast64_t uiZ;

+    bool sign;

+    uint_fast32_t absA;

+    int_fast8_t shiftDist;

+    union ui64_f64 uZ;

+

+    if ( ! a ) {

+        uiZ = 0;

+    } else {

+        sign = (a < 0);

+        absA = sign ? -(uint_fast32_t) a : (uint_fast32_t) a;

+        shiftDist = softfloat_countLeadingZeros32( absA ) + 21;

+        uiZ =

+            packToF64UI(

+                sign, 0x432 - shiftDist, (uint_fast64_t) absA<<shiftDist );

+    }

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_extF80.c b/c_emulator/SoftFloat-3e/source/i64_to_extF80.c
new file mode 100644
index 0000000..a1000be
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_extF80.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t i64_to_extF80( int64_t a )

+{

+    uint_fast16_t uiZ64;

+    uint_fast64_t absA;

+    bool sign;

+    int_fast8_t shiftDist;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    uiZ64 = 0;

+    absA = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a;

+        shiftDist = softfloat_countLeadingZeros64( absA );

+        uiZ64 = packToExtF80UI64( sign, 0x403E - shiftDist );

+        absA <<= shiftDist;

+    }

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = absA;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_extF80M.c b/c_emulator/SoftFloat-3e/source/i64_to_extF80M.c
new file mode 100644
index 0000000..4838dde
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_extF80M.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void i64_to_extF80M( int64_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = i64_to_extF80( a );

+

+}

+

+#else

+

+void i64_to_extF80M( int64_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiZ64;

+    uint64_t sigZ;

+    bool sign;

+    uint64_t absA;

+    int_fast8_t shiftDist;

+

+    zSPtr = (struct extFloat80M *) zPtr;

+    uiZ64 = 0;

+    sigZ = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint64_t) a : (uint64_t) a;

+        shiftDist = softfloat_countLeadingZeros64( absA );

+        uiZ64 = packToExtF80UI64( sign, 0x403E - shiftDist );

+        sigZ = absA<<shiftDist;

+    }

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = sigZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_f128.c b/c_emulator/SoftFloat-3e/source/i64_to_f128.c
new file mode 100644
index 0000000..fcb0179
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_f128.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t i64_to_f128( int64_t a )

+{

+    uint_fast64_t uiZ64, uiZ0;

+    bool sign;

+    uint_fast64_t absA;

+    int_fast8_t shiftDist;

+    struct uint128 zSig;

+    union ui128_f128 uZ;

+

+    if ( ! a ) {

+        uiZ64 = 0;

+        uiZ0  = 0;

+    } else {

+        sign = (a < 0);

+        absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a;

+        shiftDist = softfloat_countLeadingZeros64( absA ) + 49;

+        if ( 64 <= shiftDist ) {

+            zSig.v64 = absA<<(shiftDist - 64);

+            zSig.v0  = 0;

+        } else {

+            zSig = softfloat_shortShiftLeft128( 0, absA, shiftDist );

+        }

+        uiZ64 = packToF128UI64( sign, 0x406E - shiftDist, zSig.v64 );

+        uiZ0  = zSig.v0;

+    }

+    uZ.ui.v64 = uiZ64;

+    uZ.ui.v0  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_f128M.c b/c_emulator/SoftFloat-3e/source/i64_to_f128M.c
new file mode 100644
index 0000000..0a04eb8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_f128M.c
@@ -0,0 +1,92 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void i64_to_f128M( int64_t a, float128_t *zPtr )

+{

+

+    *zPtr = i64_to_f128( a );

+

+}

+

+#else

+

+void i64_to_f128M( int64_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr;

+    uint32_t uiZ96, uiZ64;

+    bool sign;

+    uint64_t absA;

+    uint_fast8_t shiftDist;

+    uint32_t *ptr;

+

+    zWPtr = (uint32_t *) zPtr;

+    uiZ96 = 0;

+    uiZ64 = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+    if ( a ) {

+        sign = (a < 0);

+        absA = sign ? -(uint64_t) a : (uint64_t) a;

+        shiftDist = softfloat_countLeadingZeros64( absA ) + 17;

+        if ( shiftDist < 32 ) {

+            ptr = zWPtr + indexMultiwordHi( 4, 3 );

+            ptr[indexWord( 3, 2 )] = 0;

+            ptr[indexWord( 3, 1 )] = absA>>32;

+            ptr[indexWord( 3, 0 )] = absA;

+            softfloat_shortShiftLeft96M( ptr, shiftDist, ptr );

+            ptr[indexWordHi( 3 )] =

+                packToF128UI96(

+                    sign, 0x404E - shiftDist, ptr[indexWordHi( 3 )] );

+            return;

+        }

+        absA <<= shiftDist - 32;

+        uiZ96 = packToF128UI96( sign, 0x404E - shiftDist, absA>>32 );

+        uiZ64 = absA;

+    }

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = uiZ64;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_f16.c b/c_emulator/SoftFloat-3e/source/i64_to_f16.c
new file mode 100644
index 0000000..cef7b61
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_f16.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t i64_to_f16( int64_t a )

+{

+    bool sign;

+    uint_fast64_t absA;

+    int_fast8_t shiftDist;

+    union ui16_f16 u;

+    uint_fast16_t sig;

+

+    sign = (a < 0);

+    absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a;

+    shiftDist = softfloat_countLeadingZeros64( absA ) - 53;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF16UI(

+                    sign, 0x18 - shiftDist, (uint_fast16_t) absA<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 4;

+        sig =

+            (shiftDist < 0)

+                ? softfloat_shortShiftRightJam64( absA, -shiftDist )

+                : (uint_fast16_t) absA<<shiftDist;

+        return softfloat_roundPackToF16( sign, 0x1C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_f32.c b/c_emulator/SoftFloat-3e/source/i64_to_f32.c
new file mode 100644
index 0000000..ca1dc74
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_f32.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t i64_to_f32( int64_t a )

+{

+    bool sign;

+    uint_fast64_t absA;

+    int_fast8_t shiftDist;

+    union ui32_f32 u;

+    uint_fast32_t sig;

+

+    sign = (a < 0);

+    absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a;

+    shiftDist = softfloat_countLeadingZeros64( absA ) - 40;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF32UI(

+                    sign, 0x95 - shiftDist, (uint_fast32_t) absA<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 7;

+        sig =

+            (shiftDist < 0)

+                ? softfloat_shortShiftRightJam64( absA, -shiftDist )

+                : (uint_fast32_t) absA<<shiftDist;

+        return softfloat_roundPackToF32( sign, 0x9C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/i64_to_f64.c b/c_emulator/SoftFloat-3e/source/i64_to_f64.c
new file mode 100644
index 0000000..ea9e821
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/i64_to_f64.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t i64_to_f64( int64_t a )

+{

+    bool sign;

+    union ui64_f64 uZ;

+    uint_fast64_t absA;

+

+    sign = (a < 0);

+    if ( ! (a & UINT64_C( 0x7FFFFFFFFFFFFFFF )) ) {

+        uZ.ui = sign ? packToF64UI( 1, 0x43E, 0 ) : 0;

+        return uZ.f;

+    }

+    absA = sign ? -(uint_fast64_t) a : (uint_fast64_t) a;

+    return softfloat_normRoundPackToF64( sign, 0x43C, absA );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/include/internals.h b/c_emulator/SoftFloat-3e/source/include/internals.h
new file mode 100644
index 0000000..020b340
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/internals.h
@@ -0,0 +1,278 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef internals_h

+#define internals_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitives.h"

+#include "softfloat_types.h"

+

+union ui16_f16 { uint16_t ui; float16_t f; };

+union ui32_f32 { uint32_t ui; float32_t f; };

+union ui64_f64 { uint64_t ui; float64_t f; };

+

+#ifdef SOFTFLOAT_FAST_INT64

+union extF80M_extF80 { struct extFloat80M fM; extFloat80_t f; };

+union ui128_f128 { struct uint128 ui; float128_t f; };

+#endif

+

+enum {

+    softfloat_mulAdd_subC    = 1,

+    softfloat_mulAdd_subProd = 2

+};

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+uint_fast32_t softfloat_roundToUI32( bool, uint_fast64_t, uint_fast8_t, bool );

+

+#ifdef SOFTFLOAT_FAST_INT64

+uint_fast64_t

+ softfloat_roundToUI64(

+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );

+#else

+uint_fast64_t softfloat_roundMToUI64( bool, uint32_t *, uint_fast8_t, bool );

+#endif

+

+int_fast32_t softfloat_roundToI32( bool, uint_fast64_t, uint_fast8_t, bool );

+

+#ifdef SOFTFLOAT_FAST_INT64

+int_fast64_t

+ softfloat_roundToI64(

+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );

+#else

+int_fast64_t softfloat_roundMToI64( bool, uint32_t *, uint_fast8_t, bool );

+#endif

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signF16UI( a ) ((bool) ((uint16_t) (a)>>15))

+#define expF16UI( a ) ((int_fast8_t) ((a)>>10) & 0x1F)

+#define fracF16UI( a ) ((a) & 0x03FF)

+#define packToF16UI( sign, exp, sig ) (((uint16_t) (sign)<<15) + ((uint16_t) (exp)<<10) + (sig))

+

+#define isNaNF16UI( a ) (((~(a) & 0x7C00) == 0) && ((a) & 0x03FF))

+

+struct exp8_sig16 { int_fast8_t exp; uint_fast16_t sig; };

+struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t );

+

+float16_t softfloat_roundPackToF16( bool, int_fast16_t, uint_fast16_t );

+float16_t softfloat_normRoundPackToF16( bool, int_fast16_t, uint_fast16_t );

+

+float16_t softfloat_addMagsF16( uint_fast16_t, uint_fast16_t );

+float16_t softfloat_subMagsF16( uint_fast16_t, uint_fast16_t );

+float16_t

+ softfloat_mulAddF16(

+     uint_fast16_t, uint_fast16_t, uint_fast16_t, uint_fast8_t );

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signF32UI( a ) ((bool) ((uint32_t) (a)>>31))

+#define expF32UI( a ) ((int_fast16_t) ((a)>>23) & 0xFF)

+#define fracF32UI( a ) ((a) & 0x007FFFFF)

+#define packToF32UI( sign, exp, sig ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<23) + (sig))

+

+#define isNaNF32UI( a ) (((~(a) & 0x7F800000) == 0) && ((a) & 0x007FFFFF))

+

+struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; };

+struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );

+

+float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t );

+float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t );

+

+float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t );

+float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t );

+float32_t

+ softfloat_mulAddF32(

+     uint_fast32_t, uint_fast32_t, uint_fast32_t, uint_fast8_t );

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signF64UI( a ) ((bool) ((uint64_t) (a)>>63))

+#define expF64UI( a ) ((int_fast16_t) ((a)>>52) & 0x7FF)

+#define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))

+#define packToF64UI( sign, exp, sig ) ((uint64_t) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<52) + (sig)))

+

+#define isNaNF64UI( a ) (((~(a) & UINT64_C( 0x7FF0000000000000 )) == 0) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )))

+

+struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };

+struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );

+

+float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t );

+float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t );

+

+float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );

+float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool );

+float64_t

+ softfloat_mulAddF64(

+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signExtF80UI64( a64 ) ((bool) ((uint16_t) (a64)>>15))

+#define expExtF80UI64( a64 ) ((a64) & 0x7FFF)

+#define packToExtF80UI64( sign, exp ) ((uint_fast16_t) (sign)<<15 | (exp))

+

+#define isNaNExtF80UI( a64, a0 ) ((((a64) & 0x7FFF) == 0x7FFF) && ((a0) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+

+struct exp32_sig64 { int_fast32_t exp; uint64_t sig; };

+struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t );

+

+extFloat80_t

+ softfloat_roundPackToExtF80(

+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );

+extFloat80_t

+ softfloat_normRoundPackToExtF80(

+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );

+

+extFloat80_t

+ softfloat_addMagsExtF80(

+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+extFloat80_t

+ softfloat_subMagsExtF80(

+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signF128UI64( a64 ) ((bool) ((uint64_t) (a64)>>63))

+#define expF128UI64( a64 ) ((int_fast32_t) ((a64)>>48) & 0x7FFF)

+#define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))

+#define packToF128UI64( sign, exp, sig64 ) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<48) + (sig64))

+

+#define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))))

+

+struct exp32_sig128 { int_fast32_t exp; struct uint128 sig; };

+struct exp32_sig128

+ softfloat_normSubnormalF128Sig( uint_fast64_t, uint_fast64_t );

+

+float128_t

+ softfloat_roundPackToF128(

+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast64_t );

+float128_t

+ softfloat_normRoundPackToF128(

+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t );

+

+float128_t

+ softfloat_addMagsF128(

+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+float128_t

+ softfloat_subMagsF128(

+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );

+float128_t

+ softfloat_mulAddF128(

+     uint_fast64_t,

+     uint_fast64_t,

+     uint_fast64_t,

+     uint_fast64_t,

+     uint_fast64_t,

+     uint_fast64_t,

+     uint_fast8_t

+ );

+

+#else

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+

+bool

+ softfloat_tryPropagateNaNExtF80M(

+     const struct extFloat80M *,

+     const struct extFloat80M *,

+     struct extFloat80M *

+ );

+void softfloat_invalidExtF80M( struct extFloat80M * );

+

+int softfloat_normExtF80SigM( uint64_t * );

+

+void

+ softfloat_roundPackMToExtF80M(

+     bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * );

+void

+ softfloat_normRoundPackMToExtF80M(

+     bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * );

+

+void

+ softfloat_addExtF80M(

+     const struct extFloat80M *,

+     const struct extFloat80M *,

+     struct extFloat80M *,

+     bool

+ );

+

+int

+ softfloat_compareNonnormExtF80M(

+     const struct extFloat80M *, const struct extFloat80M * );

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+#define signF128UI96( a96 ) ((bool) ((uint32_t) (a96)>>31))

+#define expF128UI96( a96 ) ((int32_t) ((a96)>>16) & 0x7FFF)

+#define fracF128UI96( a96 ) ((a96) & 0x0000FFFF)

+#define packToF128UI96( sign, exp, sig96 ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<16) + (sig96))

+

+bool softfloat_isNaNF128M( const uint32_t * );

+

+bool

+ softfloat_tryPropagateNaNF128M(

+     const uint32_t *, const uint32_t *, uint32_t * );

+void softfloat_invalidF128M( uint32_t * );

+

+int softfloat_shiftNormSigF128M( const uint32_t *, uint_fast8_t, uint32_t * );

+

+void softfloat_roundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * );

+void softfloat_normRoundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * );

+

+void

+ softfloat_addF128M( const uint32_t *, const uint32_t *, uint32_t *, bool );

+void

+ softfloat_mulAddF128M(

+     const uint32_t *,

+     const uint32_t *,

+     const uint32_t *,

+     uint32_t *,

+     uint_fast8_t

+ );

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/include/opts-GCC.h b/c_emulator/SoftFloat-3e/source/include/opts-GCC.h
new file mode 100644
index 0000000..18c1523
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/opts-GCC.h
@@ -0,0 +1,114 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2017 The Regents of the University of California.  All rights

+reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef opts_GCC_h

+#define opts_GCC_h 1

+

+#ifdef INLINE

+

+#include <stdint.h>

+#include "primitiveTypes.h"

+

+#ifdef SOFTFLOAT_BUILTIN_CLZ

+

+INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a )

+    { return a ? __builtin_clz( a ) - 16 : 16; }

+#define softfloat_countLeadingZeros16 softfloat_countLeadingZeros16

+

+INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )

+    { return a ? __builtin_clz( a ) : 32; }

+#define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32

+

+INLINE uint_fast8_t softfloat_countLeadingZeros64( uint64_t a )

+    { return a ? __builtin_clzll( a ) : 64; }

+#define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64

+

+#endif

+

+#ifdef SOFTFLOAT_INTRINSIC_INT128

+

+INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )

+{

+    union { unsigned __int128 ui; struct uint128 s; } uZ;

+    uZ.ui = (unsigned __int128) a * ((uint_fast64_t) b<<32);

+    return uZ.s;

+}

+#define softfloat_mul64ByShifted32To128 softfloat_mul64ByShifted32To128

+

+INLINE struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b )

+{

+    union { unsigned __int128 ui; struct uint128 s; } uZ;

+    uZ.ui = (unsigned __int128) a * b;

+    return uZ.s;

+}

+#define softfloat_mul64To128 softfloat_mul64To128

+

+INLINE

+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b )

+{

+    union { unsigned __int128 ui; struct uint128 s; } uZ;

+    uZ.ui = ((unsigned __int128) a64<<64 | a0) * b;

+    return uZ.s;

+}

+#define softfloat_mul128By32 softfloat_mul128By32

+

+INLINE

+void

+ softfloat_mul128To256M(

+     uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr )

+{

+    unsigned __int128 z0, mid1, mid, z128;

+    z0 = (unsigned __int128) a0 * b0;

+    mid1 = (unsigned __int128) a64 * b0;

+    mid = mid1 + (unsigned __int128) a0 * b64;

+    z128 = (unsigned __int128) a64 * b64;

+    z128 += (unsigned __int128) (mid < mid1)<<64 | mid>>64;

+    mid <<= 64;

+    z0 += mid;

+    z128 += (z0 < mid);

+    zPtr[indexWord( 4, 0 )] = z0;

+    zPtr[indexWord( 4, 1 )] = z0>>64;

+    zPtr[indexWord( 4, 2 )] = z128;

+    zPtr[indexWord( 4, 3 )] = z128>>64;

+}

+#define softfloat_mul128To256M softfloat_mul128To256M

+

+#endif

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/include/primitiveTypes.h b/c_emulator/SoftFloat-3e/source/include/primitiveTypes.h
new file mode 100644
index 0000000..a4a6dd1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/primitiveTypes.h
@@ -0,0 +1,85 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef primitiveTypes_h

+#define primitiveTypes_h 1

+

+#include <stdint.h>

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+#ifdef LITTLEENDIAN

+struct uint128 { uint64_t v0, v64; };

+struct uint64_extra { uint64_t extra, v; };

+struct uint128_extra { uint64_t extra; struct uint128 v; };

+#else

+struct uint128 { uint64_t v64, v0; };

+struct uint64_extra { uint64_t v, extra; };

+struct uint128_extra { struct uint128 v; uint64_t extra; };

+#endif

+

+#endif

+

+/*----------------------------------------------------------------------------

+| These macros are used to isolate the differences in word order between big-

+| endian and little-endian platforms.

+*----------------------------------------------------------------------------*/

+#ifdef LITTLEENDIAN

+#define wordIncr 1

+#define indexWord( total, n ) (n)

+#define indexWordHi( total ) ((total) - 1)

+#define indexWordLo( total ) 0

+#define indexMultiword( total, m, n ) (n)

+#define indexMultiwordHi( total, n ) ((total) - (n))

+#define indexMultiwordLo( total, n ) 0

+#define indexMultiwordHiBut( total, n ) (n)

+#define indexMultiwordLoBut( total, n ) 0

+#define INIT_UINTM4( v3, v2, v1, v0 ) { v0, v1, v2, v3 }

+#else

+#define wordIncr -1

+#define indexWord( total, n ) ((total) - 1 - (n))

+#define indexWordHi( total ) 0

+#define indexWordLo( total ) ((total) - 1)

+#define indexMultiword( total, m, n ) ((total) - 1 - (m))

+#define indexMultiwordHi( total, n ) 0

+#define indexMultiwordLo( total, n ) ((total) - (n))

+#define indexMultiwordHiBut( total, n ) 0

+#define indexMultiwordLoBut( total, n ) (n)

+#define INIT_UINTM4( v3, v2, v1, v0 ) { v3, v2, v1, v0 }

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/include/primitives.h b/c_emulator/SoftFloat-3e/source/include/primitives.h
new file mode 100644
index 0000000..863ab45
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/primitives.h
@@ -0,0 +1,1160 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef primitives_h

+#define primitives_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightJam64

+/*----------------------------------------------------------------------------

+| Shifts 'a' right by the number of bits given in 'dist', which must be in

+| the range 1 to 63.  If any nonzero bits are shifted off, they are "jammed"

+| into the least-significant bit of the shifted value by setting the least-

+| significant bit to 1.  This shifted-and-jammed value is returned.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist )

+    { return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0); }

+#else

+uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shiftRightJam32

+/*----------------------------------------------------------------------------

+| Shifts 'a' right by the number of bits given in 'dist', which must not

+| be zero.  If any nonzero bits are shifted off, they are "jammed" into the

+| least-significant bit of the shifted value by setting the least-significant

+| bit to 1.  This shifted-and-jammed value is returned.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is

+| greater than 32, the result will be either 0 or 1, depending on whether 'a'

+| is zero or nonzero.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist )

+{

+    return

+        (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0);

+}

+#else

+uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shiftRightJam64

+/*----------------------------------------------------------------------------

+| Shifts 'a' right by the number of bits given in 'dist', which must not

+| be zero.  If any nonzero bits are shifted off, they are "jammed" into the

+| least-significant bit of the shifted value by setting the least-significant

+| bit to 1.  This shifted-and-jammed value is returned.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is

+| greater than 64, the result will be either 0 or 1, depending on whether 'a'

+| is zero or nonzero.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)

+INLINE uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist )

+{

+    return

+        (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0);

+}

+#else

+uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist );

+#endif

+#endif

+

+/*----------------------------------------------------------------------------

+| A constant table that translates an 8-bit unsigned integer (the array index)

+| into the number of leading 0 bits before the most-significant 1 of that

+| integer.  For integer zero (index 0), the corresponding table element is 8.

+*----------------------------------------------------------------------------*/

+extern const uint_least8_t softfloat_countLeadingZeros8[256];

+

+#ifndef softfloat_countLeadingZeros16

+/*----------------------------------------------------------------------------

+| Returns the number of leading 0 bits before the most-significant 1 bit of

+| 'a'.  If 'a' is zero, 16 is returned.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a )

+{

+    uint_fast8_t count = 8;

+    if ( 0x100 <= a ) {

+        count = 0;

+        a >>= 8;

+    }

+    count += softfloat_countLeadingZeros8[a];

+    return count;

+}

+#else

+uint_fast8_t softfloat_countLeadingZeros16( uint16_t a );

+#endif

+#endif

+

+#ifndef softfloat_countLeadingZeros32

+/*----------------------------------------------------------------------------

+| Returns the number of leading 0 bits before the most-significant 1 bit of

+| 'a'.  If 'a' is zero, 32 is returned.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)

+INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )

+{

+    uint_fast8_t count = 0;

+    if ( a < 0x10000 ) {

+        count = 16;

+        a <<= 16;

+    }

+    if ( a < 0x1000000 ) {

+        count += 8;

+        a <<= 8;

+    }

+    count += softfloat_countLeadingZeros8[a>>24];

+    return count;

+}

+#else

+uint_fast8_t softfloat_countLeadingZeros32( uint32_t a );

+#endif

+#endif

+

+#ifndef softfloat_countLeadingZeros64

+/*----------------------------------------------------------------------------

+| Returns the number of leading 0 bits before the most-significant 1 bit of

+| 'a'.  If 'a' is zero, 64 is returned.

+*----------------------------------------------------------------------------*/

+uint_fast8_t softfloat_countLeadingZeros64( uint64_t a );

+#endif

+

+extern const uint16_t softfloat_approxRecip_1k0s[16];

+extern const uint16_t softfloat_approxRecip_1k1s[16];

+

+#ifndef softfloat_approxRecip32_1

+/*----------------------------------------------------------------------------

+| Returns an approximation to the reciprocal of the number represented by 'a',

+| where 'a' is interpreted as an unsigned fixed-point number with one integer

+| bit and 31 fraction bits.  The 'a' input must be "normalized", meaning that

+| its most-significant bit (bit 31) must be 1.  Thus, if A is the value of

+| the fixed-point interpretation of 'a', then 1 <= A < 2.  The returned value

+| is interpreted as a pure unsigned fraction, having no integer bits and 32

+| fraction bits.  The approximation returned is never greater than the true

+| reciprocal 1/A, and it differs from the true reciprocal by at most 2.006 ulp

+| (units in the last place).

+*----------------------------------------------------------------------------*/

+#ifdef SOFTFLOAT_FAST_DIV64TO32

+#define softfloat_approxRecip32_1( a ) ((uint32_t) (UINT64_C( 0x7FFFFFFFFFFFFFFF ) / (uint32_t) (a)))

+#else

+uint32_t softfloat_approxRecip32_1( uint32_t a );

+#endif

+#endif

+

+extern const uint16_t softfloat_approxRecipSqrt_1k0s[16];

+extern const uint16_t softfloat_approxRecipSqrt_1k1s[16];

+

+#ifndef softfloat_approxRecipSqrt32_1

+/*----------------------------------------------------------------------------

+| Returns an approximation to the reciprocal of the square root of the number

+| represented by 'a', where 'a' is interpreted as an unsigned fixed-point

+| number either with one integer bit and 31 fraction bits or with two integer

+| bits and 30 fraction bits.  The format of 'a' is determined by 'oddExpA',

+| which must be either 0 or 1.  If 'oddExpA' is 1, 'a' is interpreted as

+| having one integer bit, and if 'oddExpA' is 0, 'a' is interpreted as having

+| two integer bits.  The 'a' input must be "normalized", meaning that its

+| most-significant bit (bit 31) must be 1.  Thus, if A is the value of the

+| fixed-point interpretation of 'a', it follows that 1 <= A < 2 when 'oddExpA'

+| is 1, and 2 <= A < 4 when 'oddExpA' is 0.

+|   The returned value is interpreted as a pure unsigned fraction, having

+| no integer bits and 32 fraction bits.  The approximation returned is never

+| greater than the true reciprocal 1/sqrt(A), and it differs from the true

+| reciprocal by at most 2.06 ulp (units in the last place).  The approximation

+| returned is also always within the range 0.5 to 1; thus, the most-

+| significant bit of the result is always set.

+*----------------------------------------------------------------------------*/

+uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a );

+#endif

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is

+| defined.

+*----------------------------------------------------------------------------*/

+

+#ifndef softfloat_eq128

+/*----------------------------------------------------------------------------

+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'

+| and 'a0' is equal to the 128-bit unsigned integer formed by concatenating

+| 'b64' and 'b0'.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)

+INLINE

+bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+    { return (a64 == b64) && (a0 == b0); }

+#else

+bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );

+#endif

+#endif

+

+#ifndef softfloat_le128

+/*----------------------------------------------------------------------------

+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'

+| and 'a0' is less than or equal to the 128-bit unsigned integer formed by

+| concatenating 'b64' and 'b0'.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+    { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); }

+#else

+bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );

+#endif

+#endif

+

+#ifndef softfloat_lt128

+/*----------------------------------------------------------------------------

+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'

+| and 'a0' is less than the 128-bit unsigned integer formed by concatenating

+| 'b64' and 'b0'.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+    { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); }

+#else

+bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftLeft128

+/*----------------------------------------------------------------------------

+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' left by the

+| number of bits given in 'dist', which must be in the range 1 to 63.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+struct uint128

+ softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    struct uint128 z;

+    z.v64 = a64<<dist | a0>>(-dist & 63);

+    z.v0 = a0<<dist;

+    return z;

+}

+#else

+struct uint128

+ softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftRight128

+/*----------------------------------------------------------------------------

+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the

+| number of bits given in 'dist', which must be in the range 1 to 63.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+struct uint128

+ softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    struct uint128 z;

+    z.v64 = a64>>dist;

+    z.v0 = a64<<(-dist & 63) | a0>>dist;

+    return z;

+}

+#else

+struct uint128

+ softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftRightJam64Extra

+/*----------------------------------------------------------------------------

+| This function is the same as 'softfloat_shiftRightJam64Extra' (below),

+| except that 'dist' must be in the range 1 to 63.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+struct uint64_extra

+ softfloat_shortShiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast8_t dist )

+{

+    struct uint64_extra z;

+    z.v = a>>dist;

+    z.extra = a<<(-dist & 63) | (extra != 0);

+    return z;

+}

+#else

+struct uint64_extra

+ softfloat_shortShiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftRightJam128

+/*----------------------------------------------------------------------------

+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the

+| number of bits given in 'dist', which must be in the range 1 to 63.  If any

+| nonzero bits are shifted off, they are "jammed" into the least-significant

+| bit of the shifted value by setting the least-significant bit to 1.  This

+| shifted-and-jammed value is returned.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)

+INLINE

+struct uint128

+ softfloat_shortShiftRightJam128(

+     uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    uint_fast8_t negDist = -dist;

+    struct uint128 z;

+    z.v64 = a64>>dist;

+    z.v0 =

+        a64<<(negDist & 63) | a0>>dist

+            | ((uint64_t) (a0<<(negDist & 63)) != 0);

+    return z;

+}

+#else

+struct uint128

+ softfloat_shortShiftRightJam128(

+     uint64_t a64, uint64_t a0, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftRightJam128Extra

+/*----------------------------------------------------------------------------

+| This function is the same as 'softfloat_shiftRightJam128Extra' (below),

+| except that 'dist' must be in the range 1 to 63.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)

+INLINE

+struct uint128_extra

+ softfloat_shortShiftRightJam128Extra(

+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist )

+{

+    uint_fast8_t negDist = -dist;

+    struct uint128_extra z;

+    z.v.v64 = a64>>dist;

+    z.v.v0 = a64<<(negDist & 63) | a0>>dist;

+    z.extra = a0<<(negDist & 63) | (extra != 0);

+    return z;

+}

+#else

+struct uint128_extra

+ softfloat_shortShiftRightJam128Extra(

+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shiftRightJam64Extra

+/*----------------------------------------------------------------------------

+| Shifts the 128 bits formed by concatenating 'a' and 'extra' right by 64

+| _plus_ the number of bits given in 'dist', which must not be zero.  This

+| shifted value is at most 64 nonzero bits and is returned in the 'v' field

+| of the 'struct uint64_extra' result.  The 64-bit 'extra' field of the result

+| contains a value formed as follows from the bits that were shifted off:  The

+| _last_ bit shifted off is the most-significant bit of the 'extra' field, and

+| the other 63 bits of the 'extra' field are all zero if and only if _all_but_

+| _the_last_ bits shifted off were all zero.

+|   (This function makes more sense if 'a' and 'extra' are considered to form

+| an unsigned fixed-point number with binary point between 'a' and 'extra'.

+| This fixed-point value is shifted right by the number of bits given in

+| 'dist', and the integer part of this shifted value is returned in the 'v'

+| field of the result.  The fractional part of the shifted value is modified

+| as described above and returned in the 'extra' field of the result.)

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL)

+INLINE

+struct uint64_extra

+ softfloat_shiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast32_t dist )

+{

+    struct uint64_extra z;

+    if ( dist < 64 ) {

+        z.v = a>>dist;

+        z.extra = a<<(-dist & 63);

+    } else {

+        z.v = 0;

+        z.extra = (dist == 64) ? a : (a != 0);

+    }

+    z.extra |= (extra != 0);

+    return z;

+}

+#else

+struct uint64_extra

+ softfloat_shiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast32_t dist );

+#endif

+#endif

+

+#ifndef softfloat_shiftRightJam128

+/*----------------------------------------------------------------------------

+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the

+| number of bits given in 'dist', which must not be zero.  If any nonzero bits

+| are shifted off, they are "jammed" into the least-significant bit of the

+| shifted value by setting the least-significant bit to 1.  This shifted-and-

+| jammed value is returned.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is

+| greater than 128, the result will be either 0 or 1, depending on whether the

+| original 128 bits are all zeros.

+*----------------------------------------------------------------------------*/

+struct uint128

+ softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist );

+#endif

+

+#ifndef softfloat_shiftRightJam128Extra

+/*----------------------------------------------------------------------------

+| Shifts the 192 bits formed by concatenating 'a64', 'a0', and 'extra' right

+| by 64 _plus_ the number of bits given in 'dist', which must not be zero.

+| This shifted value is at most 128 nonzero bits and is returned in the 'v'

+| field of the 'struct uint128_extra' result.  The 64-bit 'extra' field of the

+| result contains a value formed as follows from the bits that were shifted

+| off:  The _last_ bit shifted off is the most-significant bit of the 'extra'

+| field, and the other 63 bits of the 'extra' field are all zero if and only

+| if _all_but_the_last_ bits shifted off were all zero.

+|   (This function makes more sense if 'a64', 'a0', and 'extra' are considered

+| to form an unsigned fixed-point number with binary point between 'a0' and

+| 'extra'.  This fixed-point value is shifted right by the number of bits

+| given in 'dist', and the integer part of this shifted value is returned

+| in the 'v' field of the result.  The fractional part of the shifted value

+| is modified as described above and returned in the 'extra' field of the

+| result.)

+*----------------------------------------------------------------------------*/

+struct uint128_extra

+ softfloat_shiftRightJam128Extra(

+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist );

+#endif

+

+#ifndef softfloat_shiftRightJam256M

+/*----------------------------------------------------------------------------

+| Shifts the 256-bit unsigned integer pointed to by 'aPtr' right by the number

+| of bits given in 'dist', which must not be zero.  If any nonzero bits are

+| shifted off, they are "jammed" into the least-significant bit of the shifted

+| value by setting the least-significant bit to 1.  This shifted-and-jammed

+| value is stored at the location pointed to by 'zPtr'.  Each of 'aPtr' and

+| 'zPtr' points to an array of four 64-bit elements that concatenate in the

+| platform's normal endian order to form a 256-bit integer.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist'

+| is greater than 256, the stored result will be either 0 or 1, depending on

+| whether the original 256 bits are all zeros.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shiftRightJam256M(

+     const uint64_t *aPtr, uint_fast32_t dist, uint64_t *zPtr );

+#endif

+

+#ifndef softfloat_add128

+/*----------------------------------------------------------------------------

+| Returns the sum of the 128-bit integer formed by concatenating 'a64' and

+| 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'.  The

+| addition is modulo 2^128, so any carry out is lost.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+struct uint128

+ softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+    struct uint128 z;

+    z.v0 = a0 + b0;

+    z.v64 = a64 + b64 + (z.v0 < a0);

+    return z;

+}

+#else

+struct uint128

+ softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );

+#endif

+#endif

+

+#ifndef softfloat_add256M

+/*----------------------------------------------------------------------------

+| Adds the two 256-bit integers pointed to by 'aPtr' and 'bPtr'.  The addition

+| is modulo 2^256, so any carry out is lost.  The sum is stored at the

+| location pointed to by 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to

+| an array of four 64-bit elements that concatenate in the platform's normal

+| endian order to form a 256-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_add256M(

+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr );

+#endif

+

+#ifndef softfloat_sub128

+/*----------------------------------------------------------------------------

+| Returns the difference of the 128-bit integer formed by concatenating 'a64'

+| and 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'.

+| The subtraction is modulo 2^128, so any borrow out (carry out) is lost.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+struct uint128

+ softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+    struct uint128 z;

+    z.v0 = a0 - b0;

+    z.v64 = a64 - b64;

+    z.v64 -= (a0 < b0);

+    return z;

+}

+#else

+struct uint128

+ softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );

+#endif

+#endif

+

+#ifndef softfloat_sub256M

+/*----------------------------------------------------------------------------

+| Subtracts the 256-bit integer pointed to by 'bPtr' from the 256-bit integer

+| pointed to by 'aPtr'.  The addition is modulo 2^256, so any borrow out

+| (carry out) is lost.  The difference is stored at the location pointed to

+| by 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to an array of four

+| 64-bit elements that concatenate in the platform's normal endian order to

+| form a 256-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_sub256M(

+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr );

+#endif

+

+#ifndef softfloat_mul64ByShifted32To128

+/*----------------------------------------------------------------------------

+| Returns the 128-bit product of 'a', 'b', and 2^32.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)

+INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )

+{

+    uint_fast64_t mid;

+    struct uint128 z;

+    mid = (uint_fast64_t) (uint32_t) a * b;

+    z.v0 = mid<<32;

+    z.v64 = (uint_fast64_t) (uint32_t) (a>>32) * b + (mid>>32);

+    return z;

+}

+#else

+struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b );

+#endif

+#endif

+

+#ifndef softfloat_mul64To128

+/*----------------------------------------------------------------------------

+| Returns the 128-bit product of 'a' and 'b'.

+*----------------------------------------------------------------------------*/

+struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b );

+#endif

+

+#ifndef softfloat_mul128By32

+/*----------------------------------------------------------------------------

+| Returns the product of the 128-bit integer formed by concatenating 'a64' and

+| 'a0', multiplied by 'b'.  The multiplication is modulo 2^128; any overflow

+| bits are discarded.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL)

+INLINE

+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b )

+{

+    struct uint128 z;

+    uint_fast64_t mid;

+    uint_fast32_t carry;

+    z.v0 = a0 * b;

+    mid = (uint_fast64_t) (uint32_t) (a0>>32) * b;

+    carry = (uint32_t) ((uint_fast32_t) (z.v0>>32) - (uint_fast32_t) mid);

+    z.v64 = a64 * b + (uint_fast32_t) ((mid + carry)>>32);

+    return z;

+}

+#else

+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b );

+#endif

+#endif

+

+#ifndef softfloat_mul128To256M

+/*----------------------------------------------------------------------------

+| Multiplies the 128-bit unsigned integer formed by concatenating 'a64' and

+| 'a0' by the 128-bit unsigned integer formed by concatenating 'b64' and

+| 'b0'.  The 256-bit product is stored at the location pointed to by 'zPtr'.

+| Argument 'zPtr' points to an array of four 64-bit elements that concatenate

+| in the platform's normal endian order to form a 256-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_mul128To256M(

+     uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr );

+#endif

+

+#else

+

+/*----------------------------------------------------------------------------

+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not

+| defined.

+*----------------------------------------------------------------------------*/

+

+#ifndef softfloat_compare96M

+/*----------------------------------------------------------------------------

+| Compares the two 96-bit unsigned integers pointed to by 'aPtr' and 'bPtr'.

+| Returns -1 if the first integer (A) is less than the second (B); returns 0

+| if the two integers are equal; and returns +1 if the first integer (A)

+| is greater than the second (B).  (The result is thus the signum of A - B.)

+| Each of 'aPtr' and 'bPtr' points to an array of three 32-bit elements that

+| concatenate in the platform's normal endian order to form a 96-bit integer.

+*----------------------------------------------------------------------------*/

+int_fast8_t softfloat_compare96M( const uint32_t *aPtr, const uint32_t *bPtr );

+#endif

+

+#ifndef softfloat_compare128M

+/*----------------------------------------------------------------------------

+| Compares the two 128-bit unsigned integers pointed to by 'aPtr' and 'bPtr'.

+| Returns -1 if the first integer (A) is less than the second (B); returns 0

+| if the two integers are equal; and returns +1 if the first integer (A)

+| is greater than the second (B).  (The result is thus the signum of A - B.)

+| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that

+| concatenate in the platform's normal endian order to form a 128-bit integer.

+*----------------------------------------------------------------------------*/

+int_fast8_t

+ softfloat_compare128M( const uint32_t *aPtr, const uint32_t *bPtr );

+#endif

+

+#ifndef softfloat_shortShiftLeft64To96M

+/*----------------------------------------------------------------------------

+| Extends 'a' to 96 bits and shifts the value left by the number of bits given

+| in 'dist', which must be in the range 1 to 31.  The result is stored at the

+| location pointed to by 'zPtr'.  Argument 'zPtr' points to an array of three

+| 32-bit elements that concatenate in the platform's normal endian order to

+| form a 96-bit integer.

+*----------------------------------------------------------------------------*/

+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)

+INLINE

+void

+ softfloat_shortShiftLeft64To96M(

+     uint64_t a, uint_fast8_t dist, uint32_t *zPtr )

+{

+    zPtr[indexWord( 3, 0 )] = (uint32_t) a<<dist;

+    a >>= 32 - dist;

+    zPtr[indexWord( 3, 2 )] = a>>32;

+    zPtr[indexWord( 3, 1 )] = a;

+}

+#else

+void

+ softfloat_shortShiftLeft64To96M(

+     uint64_t a, uint_fast8_t dist, uint32_t *zPtr );

+#endif

+#endif

+

+#ifndef softfloat_shortShiftLeftM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must be in the range 1 to 31.  Any nonzero bits shifted off are lost.  The

+| shifted N-bit result is stored at the location pointed to by 'zPtr'.  Each

+| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements

+| that concatenate in the platform's normal endian order to form an N-bit

+| integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shortShiftLeftM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_shortShiftLeft96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftLeftM' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftLeft96M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 3, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shortShiftLeft128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftLeftM' with

+| 'size_words' = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftLeft128M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 4, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shortShiftLeft160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftLeftM' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftLeft160M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 5, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftLeftM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must not be zero.  Any nonzero bits shifted off are lost.  The shifted

+| N-bit result is stored at the location pointed to by 'zPtr'.  Each of 'aPtr'

+| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that

+| concatenate in the platform's normal endian order to form an N-bit integer.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is

+| greater than N, the stored result will be 0.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shiftLeftM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_shiftLeft96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftLeftM' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftLeft96M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 3, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftLeft128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftLeftM' with

+| 'size_words' = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftLeft128M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 4, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftLeft160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftLeftM' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftLeft160M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 5, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shortShiftRightM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must be in the range 1 to 31.  Any nonzero bits shifted off are lost.  The

+| shifted N-bit result is stored at the location pointed to by 'zPtr'.  Each

+| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements

+| that concatenate in the platform's normal endian order to form an N-bit

+| integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shortShiftRightM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_shortShiftRight128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftRightM' with

+| 'size_words' = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftRight128M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 4, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shortShiftRight160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftRightM' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftRight160M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 5, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shortShiftRightJamM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must be in the range 1 to 31.  If any nonzero bits are shifted off, they are

+| "jammed" into the least-significant bit of the shifted value by setting the

+| least-significant bit to 1.  This shifted-and-jammed N-bit result is stored

+| at the location pointed to by 'zPtr'.  Each of 'aPtr' and 'zPtr' points

+| to a 'size_words'-long array of 32-bit elements that concatenate in the

+| platform's normal endian order to form an N-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shortShiftRightJamM(

+     uint_fast8_t, const uint32_t *, uint_fast8_t, uint32_t * );

+#endif

+

+#ifndef softfloat_shortShiftRightJam160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shortShiftRightJamM' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_shortShiftRightJam160M( aPtr, dist, zPtr ) softfloat_shortShiftRightJamM( 5, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftRightM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must not be zero.  Any nonzero bits shifted off are lost.  The shifted

+| N-bit result is stored at the location pointed to by 'zPtr'.  Each of 'aPtr'

+| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that

+| concatenate in the platform's normal endian order to form an N-bit integer.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is

+| greater than N, the stored result will be 0.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shiftRightM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_shiftRight96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftRightM' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftRight96M( aPtr, dist, zPtr ) softfloat_shiftRightM( 3, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftRightJamM

+/*----------------------------------------------------------------------------

+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number

+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'

+| must not be zero.  If any nonzero bits are shifted off, they are "jammed"

+| into the least-significant bit of the shifted value by setting the least-

+| significant bit to 1.  This shifted-and-jammed N-bit result is stored

+| at the location pointed to by 'zPtr'.  Each of 'aPtr' and 'zPtr' points

+| to a 'size_words'-long array of 32-bit elements that concatenate in the

+| platform's normal endian order to form an N-bit integer.

+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist'

+| is greater than N, the stored result will be either 0 or 1, depending on

+| whether the original N bits are all zeros.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_shiftRightJamM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_shiftRightJam96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftRightJamM' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftRightJam96M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 3, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftRightJam128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftRightJamM' with

+| 'size_words' = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftRightJam128M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 4, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_shiftRightJam160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_shiftRightJamM' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_shiftRightJam160M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 5, aPtr, dist, zPtr )

+#endif

+

+#ifndef softfloat_addM

+/*----------------------------------------------------------------------------

+| Adds the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N =

+| 'size_words' * 32.  The addition is modulo 2^N, so any carry out is lost.

+| The N-bit sum is stored at the location pointed to by 'zPtr'.  Each of

+| 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long array of 32-bit

+| elements that concatenate in the platform's normal endian order to form an

+| N-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_addM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_add96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_addM' with 'size_words'

+| = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_add96M( aPtr, bPtr, zPtr ) softfloat_addM( 3, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_add128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_addM' with 'size_words'

+| = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_add128M( aPtr, bPtr, zPtr ) softfloat_addM( 4, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_add160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_addM' with 'size_words'

+| = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_add160M( aPtr, bPtr, zPtr ) softfloat_addM( 5, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_addCarryM

+/*----------------------------------------------------------------------------

+| Adds the two N-bit unsigned integers pointed to by 'aPtr' and 'bPtr', where

+| N = 'size_words' * 32, plus 'carry', which must be either 0 or 1.  The N-bit

+| sum (modulo 2^N) is stored at the location pointed to by 'zPtr', and any

+| carry out is returned as the result.  Each of 'aPtr', 'bPtr', and 'zPtr'

+| points to a 'size_words'-long array of 32-bit elements that concatenate in

+| the platform's normal endian order to form an N-bit integer.

+*----------------------------------------------------------------------------*/

+uint_fast8_t

+ softfloat_addCarryM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint_fast8_t carry,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_addComplCarryM

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_addCarryM', except that

+| the value of the unsigned integer pointed to by 'bPtr' is bit-wise completed

+| before the addition.

+*----------------------------------------------------------------------------*/

+uint_fast8_t

+ softfloat_addComplCarryM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint_fast8_t carry,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_addComplCarry96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_addComplCarryM' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_addComplCarry96M( aPtr, bPtr, carry, zPtr ) softfloat_addComplCarryM( 3, aPtr, bPtr, carry, zPtr )

+#endif

+

+#ifndef softfloat_negXM

+/*----------------------------------------------------------------------------

+| Replaces the N-bit unsigned integer pointed to by 'zPtr' by the

+| 2s-complement of itself, where N = 'size_words' * 32.  Argument 'zPtr'

+| points to a 'size_words'-long array of 32-bit elements that concatenate in

+| the platform's normal endian order to form an N-bit integer.

+*----------------------------------------------------------------------------*/

+void softfloat_negXM( uint_fast8_t size_words, uint32_t *zPtr );

+#endif

+

+#ifndef softfloat_negX96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_negXM' with 'size_words'

+| = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_negX96M( zPtr ) softfloat_negXM( 3, zPtr )

+#endif

+

+#ifndef softfloat_negX128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_negXM' with 'size_words'

+| = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_negX128M( zPtr ) softfloat_negXM( 4, zPtr )

+#endif

+

+#ifndef softfloat_negX160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_negXM' with 'size_words'

+| = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_negX160M( zPtr ) softfloat_negXM( 5, zPtr )

+#endif

+

+#ifndef softfloat_negX256M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_negXM' with 'size_words'

+| = 8 (N = 256).

+*----------------------------------------------------------------------------*/

+#define softfloat_negX256M( zPtr ) softfloat_negXM( 8, zPtr )

+#endif

+

+#ifndef softfloat_sub1XM

+/*----------------------------------------------------------------------------

+| Subtracts 1 from the N-bit integer pointed to by 'zPtr', where N =

+| 'size_words' * 32.  The subtraction is modulo 2^N, so any borrow out (carry

+| out) is lost.  Argument 'zPtr' points to a 'size_words'-long array of 32-bit

+| elements that concatenate in the platform's normal endian order to form an

+| N-bit integer.

+*----------------------------------------------------------------------------*/

+void softfloat_sub1XM( uint_fast8_t size_words, uint32_t *zPtr );

+#endif

+

+#ifndef softfloat_sub1X96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_sub1XM' with 'size_words'

+| = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_sub1X96M( zPtr ) softfloat_sub1XM( 3, zPtr )

+#endif

+

+#ifndef softfloat_sub1X160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_sub1XM' with 'size_words'

+| = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_sub1X160M( zPtr ) softfloat_sub1XM( 5, zPtr )

+#endif

+

+#ifndef softfloat_subM

+/*----------------------------------------------------------------------------

+| Subtracts the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N =

+| 'size_words' * 32.  The subtraction is modulo 2^N, so any borrow out (carry

+| out) is lost.  The N-bit difference is stored at the location pointed to by

+| 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long

+| array of 32-bit elements that concatenate in the platform's normal endian

+| order to form an N-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_subM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_sub96M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_subM' with 'size_words'

+| = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_sub96M( aPtr, bPtr, zPtr ) softfloat_subM( 3, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_sub128M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_subM' with 'size_words'

+| = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_sub128M( aPtr, bPtr, zPtr ) softfloat_subM( 4, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_sub160M

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_subM' with 'size_words'

+| = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_sub160M( aPtr, bPtr, zPtr ) softfloat_subM( 5, aPtr, bPtr, zPtr )

+#endif

+

+#ifndef softfloat_mul64To128M

+/*----------------------------------------------------------------------------

+| Multiplies 'a' and 'b' and stores the 128-bit product at the location

+| pointed to by 'zPtr'.  Argument 'zPtr' points to an array of four 32-bit

+| elements that concatenate in the platform's normal endian order to form a

+| 128-bit integer.

+*----------------------------------------------------------------------------*/

+void softfloat_mul64To128M( uint64_t a, uint64_t b, uint32_t *zPtr );

+#endif

+

+#ifndef softfloat_mul128MTo256M

+/*----------------------------------------------------------------------------

+| Multiplies the two 128-bit unsigned integers pointed to by 'aPtr' and

+| 'bPtr', and stores the 256-bit product at the location pointed to by 'zPtr'.

+| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that

+| concatenate in the platform's normal endian order to form a 128-bit integer.

+| Argument 'zPtr' points to an array of eight 32-bit elements that concatenate

+| to form a 256-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_mul128MTo256M(

+     const uint32_t *aPtr, const uint32_t *bPtr, uint32_t *zPtr );

+#endif

+

+#ifndef softfloat_remStepMBy32

+/*----------------------------------------------------------------------------

+| Performs a "remainder reduction step" as follows:  Arguments 'remPtr' and

+| 'bPtr' both point to N-bit unsigned integers, where N = 'size_words' * 32.

+| Defining R and B as the values of those integers, the expression (R<<'dist')

+| - B * q is computed modulo 2^N, and the N-bit result is stored at the

+| location pointed to by 'zPtr'.  Each of 'remPtr', 'bPtr', and 'zPtr' points

+| to a 'size_words'-long array of 32-bit elements that concatenate in the

+| platform's normal endian order to form an N-bit integer.

+*----------------------------------------------------------------------------*/

+void

+ softfloat_remStepMBy32(

+     uint_fast8_t size_words,

+     const uint32_t *remPtr,

+     uint_fast8_t dist,

+     const uint32_t *bPtr,

+     uint32_t q,

+     uint32_t *zPtr

+ );

+#endif

+

+#ifndef softfloat_remStep96MBy32

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_remStepMBy32' with

+| 'size_words' = 3 (N = 96).

+*----------------------------------------------------------------------------*/

+#define softfloat_remStep96MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 3, remPtr, dist, bPtr, q, zPtr )

+#endif

+

+#ifndef softfloat_remStep128MBy32

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_remStepMBy32' with

+| 'size_words' = 4 (N = 128).

+*----------------------------------------------------------------------------*/

+#define softfloat_remStep128MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 4, remPtr, dist, bPtr, q, zPtr )

+#endif

+

+#ifndef softfloat_remStep160MBy32

+/*----------------------------------------------------------------------------

+| This function or macro is the same as 'softfloat_remStepMBy32' with

+| 'size_words' = 5 (N = 160).

+*----------------------------------------------------------------------------*/

+#define softfloat_remStep160MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 5, remPtr, dist, bPtr, q, zPtr )

+#endif

+

+#endif

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/include/softfloat.h b/c_emulator/SoftFloat-3e/source/include/softfloat.h
new file mode 100644
index 0000000..b33374c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/softfloat.h
@@ -0,0 +1,372 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+

+/*============================================================================

+| Note:  If SoftFloat is made available as a general library for programs to

+| use, it is strongly recommended that a platform-specific version of this

+| header, "softfloat.h", be created that folds in "softfloat_types.h" and that

+| eliminates all dependencies on compile-time macros.

+*============================================================================*/

+

+

+#ifndef softfloat_h

+#define softfloat_h 1

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "softfloat_types.h"

+

+#ifndef THREAD_LOCAL

+#define THREAD_LOCAL

+#endif

+

+/*----------------------------------------------------------------------------

+| Software floating-point underflow tininess-detection mode.

+*----------------------------------------------------------------------------*/

+extern THREAD_LOCAL uint_fast8_t softfloat_detectTininess;

+enum {

+    softfloat_tininess_beforeRounding = 0,

+    softfloat_tininess_afterRounding  = 1

+};

+

+/*----------------------------------------------------------------------------

+| Software floating-point rounding mode.  (Mode "odd" is supported only if

+| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.)

+*----------------------------------------------------------------------------*/

+extern THREAD_LOCAL uint_fast8_t softfloat_roundingMode;

+enum {

+    softfloat_round_near_even   = 0,

+    softfloat_round_minMag      = 1,

+    softfloat_round_min         = 2,

+    softfloat_round_max         = 3,

+    softfloat_round_near_maxMag = 4,

+    softfloat_round_odd         = 6

+};

+

+/*----------------------------------------------------------------------------

+| Software floating-point exception flags.

+*----------------------------------------------------------------------------*/

+extern THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags;

+enum {

+    softfloat_flag_inexact   =  1,

+    softfloat_flag_underflow =  2,

+    softfloat_flag_overflow  =  4,

+    softfloat_flag_infinite  =  8,

+    softfloat_flag_invalid   = 16

+};

+

+/*----------------------------------------------------------------------------

+| Routine to raise any or all of the software floating-point exception flags.

+*----------------------------------------------------------------------------*/

+void softfloat_raiseFlags( uint_fast8_t );

+

+/*----------------------------------------------------------------------------

+| Integer-to-floating-point conversion routines.

+*----------------------------------------------------------------------------*/

+float16_t ui32_to_f16( uint32_t );

+float32_t ui32_to_f32( uint32_t );

+float64_t ui32_to_f64( uint32_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t ui32_to_extF80( uint32_t );

+float128_t ui32_to_f128( uint32_t );

+#endif

+void ui32_to_extF80M( uint32_t, extFloat80_t * );

+void ui32_to_f128M( uint32_t, float128_t * );

+float16_t ui64_to_f16( uint64_t );

+float32_t ui64_to_f32( uint64_t );

+float64_t ui64_to_f64( uint64_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t ui64_to_extF80( uint64_t );

+float128_t ui64_to_f128( uint64_t );

+#endif

+void ui64_to_extF80M( uint64_t, extFloat80_t * );

+void ui64_to_f128M( uint64_t, float128_t * );

+float16_t i32_to_f16( int32_t );

+float32_t i32_to_f32( int32_t );

+float64_t i32_to_f64( int32_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t i32_to_extF80( int32_t );

+float128_t i32_to_f128( int32_t );

+#endif

+void i32_to_extF80M( int32_t, extFloat80_t * );

+void i32_to_f128M( int32_t, float128_t * );

+float16_t i64_to_f16( int64_t );

+float32_t i64_to_f32( int64_t );

+float64_t i64_to_f64( int64_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t i64_to_extF80( int64_t );

+float128_t i64_to_f128( int64_t );

+#endif

+void i64_to_extF80M( int64_t, extFloat80_t * );

+void i64_to_f128M( int64_t, float128_t * );

+

+/*----------------------------------------------------------------------------

+| 16-bit (half-precision) floating-point operations.

+*----------------------------------------------------------------------------*/

+uint_fast32_t f16_to_ui32( float16_t, uint_fast8_t, bool );

+uint_fast64_t f16_to_ui64( float16_t, uint_fast8_t, bool );

+int_fast32_t f16_to_i32( float16_t, uint_fast8_t, bool );

+int_fast64_t f16_to_i64( float16_t, uint_fast8_t, bool );

+uint_fast32_t f16_to_ui32_r_minMag( float16_t, bool );

+uint_fast64_t f16_to_ui64_r_minMag( float16_t, bool );

+int_fast32_t f16_to_i32_r_minMag( float16_t, bool );

+int_fast64_t f16_to_i64_r_minMag( float16_t, bool );

+float32_t f16_to_f32( float16_t );

+float64_t f16_to_f64( float16_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t f16_to_extF80( float16_t );

+float128_t f16_to_f128( float16_t );

+#endif

+void f16_to_extF80M( float16_t, extFloat80_t * );

+void f16_to_f128M( float16_t, float128_t * );

+float16_t f16_roundToInt( float16_t, uint_fast8_t, bool );

+float16_t f16_add( float16_t, float16_t );

+float16_t f16_sub( float16_t, float16_t );

+float16_t f16_mul( float16_t, float16_t );

+float16_t f16_mulAdd( float16_t, float16_t, float16_t );

+float16_t f16_div( float16_t, float16_t );

+float16_t f16_rem( float16_t, float16_t );

+float16_t f16_sqrt( float16_t );

+bool f16_eq( float16_t, float16_t );

+bool f16_le( float16_t, float16_t );

+bool f16_lt( float16_t, float16_t );

+bool f16_eq_signaling( float16_t, float16_t );

+bool f16_le_quiet( float16_t, float16_t );

+bool f16_lt_quiet( float16_t, float16_t );

+bool f16_isSignalingNaN( float16_t );

+

+/*----------------------------------------------------------------------------

+| 32-bit (single-precision) floating-point operations.

+*----------------------------------------------------------------------------*/

+uint_fast32_t f32_to_ui32( float32_t, uint_fast8_t, bool );

+uint_fast64_t f32_to_ui64( float32_t, uint_fast8_t, bool );

+int_fast32_t f32_to_i32( float32_t, uint_fast8_t, bool );

+int_fast64_t f32_to_i64( float32_t, uint_fast8_t, bool );

+uint_fast32_t f32_to_ui32_r_minMag( float32_t, bool );

+uint_fast64_t f32_to_ui64_r_minMag( float32_t, bool );

+int_fast32_t f32_to_i32_r_minMag( float32_t, bool );

+int_fast64_t f32_to_i64_r_minMag( float32_t, bool );

+float16_t f32_to_f16( float32_t );

+float64_t f32_to_f64( float32_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t f32_to_extF80( float32_t );

+float128_t f32_to_f128( float32_t );

+#endif

+void f32_to_extF80M( float32_t, extFloat80_t * );

+void f32_to_f128M( float32_t, float128_t * );

+float32_t f32_roundToInt( float32_t, uint_fast8_t, bool );

+float32_t f32_add( float32_t, float32_t );

+float32_t f32_sub( float32_t, float32_t );

+float32_t f32_mul( float32_t, float32_t );

+float32_t f32_mulAdd( float32_t, float32_t, float32_t );

+float32_t f32_div( float32_t, float32_t );

+float32_t f32_rem( float32_t, float32_t );

+float32_t f32_sqrt( float32_t );

+bool f32_eq( float32_t, float32_t );

+bool f32_le( float32_t, float32_t );

+bool f32_lt( float32_t, float32_t );

+bool f32_eq_signaling( float32_t, float32_t );

+bool f32_le_quiet( float32_t, float32_t );

+bool f32_lt_quiet( float32_t, float32_t );

+bool f32_isSignalingNaN( float32_t );

+

+/*----------------------------------------------------------------------------

+| 64-bit (double-precision) floating-point operations.

+*----------------------------------------------------------------------------*/

+uint_fast32_t f64_to_ui32( float64_t, uint_fast8_t, bool );

+uint_fast64_t f64_to_ui64( float64_t, uint_fast8_t, bool );

+int_fast32_t f64_to_i32( float64_t, uint_fast8_t, bool );

+int_fast64_t f64_to_i64( float64_t, uint_fast8_t, bool );

+uint_fast32_t f64_to_ui32_r_minMag( float64_t, bool );

+uint_fast64_t f64_to_ui64_r_minMag( float64_t, bool );

+int_fast32_t f64_to_i32_r_minMag( float64_t, bool );

+int_fast64_t f64_to_i64_r_minMag( float64_t, bool );

+float16_t f64_to_f16( float64_t );

+float32_t f64_to_f32( float64_t );

+#ifdef SOFTFLOAT_FAST_INT64

+extFloat80_t f64_to_extF80( float64_t );

+float128_t f64_to_f128( float64_t );

+#endif

+void f64_to_extF80M( float64_t, extFloat80_t * );

+void f64_to_f128M( float64_t, float128_t * );

+float64_t f64_roundToInt( float64_t, uint_fast8_t, bool );

+float64_t f64_add( float64_t, float64_t );

+float64_t f64_sub( float64_t, float64_t );

+float64_t f64_mul( float64_t, float64_t );

+float64_t f64_mulAdd( float64_t, float64_t, float64_t );

+float64_t f64_div( float64_t, float64_t );

+float64_t f64_rem( float64_t, float64_t );

+float64_t f64_sqrt( float64_t );

+bool f64_eq( float64_t, float64_t );

+bool f64_le( float64_t, float64_t );

+bool f64_lt( float64_t, float64_t );

+bool f64_eq_signaling( float64_t, float64_t );

+bool f64_le_quiet( float64_t, float64_t );

+bool f64_lt_quiet( float64_t, float64_t );

+bool f64_isSignalingNaN( float64_t );

+

+/*----------------------------------------------------------------------------

+| Rounding precision for 80-bit extended double-precision floating-point.

+| Valid values are 32, 64, and 80.

+*----------------------------------------------------------------------------*/

+extern THREAD_LOCAL uint_fast8_t extF80_roundingPrecision;

+

+/*----------------------------------------------------------------------------

+| 80-bit extended double-precision floating-point operations.

+*----------------------------------------------------------------------------*/

+#ifdef SOFTFLOAT_FAST_INT64

+uint_fast32_t extF80_to_ui32( extFloat80_t, uint_fast8_t, bool );

+uint_fast64_t extF80_to_ui64( extFloat80_t, uint_fast8_t, bool );

+int_fast32_t extF80_to_i32( extFloat80_t, uint_fast8_t, bool );

+int_fast64_t extF80_to_i64( extFloat80_t, uint_fast8_t, bool );

+uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t, bool );

+uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t, bool );

+int_fast32_t extF80_to_i32_r_minMag( extFloat80_t, bool );

+int_fast64_t extF80_to_i64_r_minMag( extFloat80_t, bool );

+float16_t extF80_to_f16( extFloat80_t );

+float32_t extF80_to_f32( extFloat80_t );

+float64_t extF80_to_f64( extFloat80_t );

+float128_t extF80_to_f128( extFloat80_t );

+extFloat80_t extF80_roundToInt( extFloat80_t, uint_fast8_t, bool );

+extFloat80_t extF80_add( extFloat80_t, extFloat80_t );

+extFloat80_t extF80_sub( extFloat80_t, extFloat80_t );

+extFloat80_t extF80_mul( extFloat80_t, extFloat80_t );

+extFloat80_t extF80_div( extFloat80_t, extFloat80_t );

+extFloat80_t extF80_rem( extFloat80_t, extFloat80_t );

+extFloat80_t extF80_sqrt( extFloat80_t );

+bool extF80_eq( extFloat80_t, extFloat80_t );

+bool extF80_le( extFloat80_t, extFloat80_t );

+bool extF80_lt( extFloat80_t, extFloat80_t );

+bool extF80_eq_signaling( extFloat80_t, extFloat80_t );

+bool extF80_le_quiet( extFloat80_t, extFloat80_t );

+bool extF80_lt_quiet( extFloat80_t, extFloat80_t );

+bool extF80_isSignalingNaN( extFloat80_t );

+#endif

+uint_fast32_t extF80M_to_ui32( const extFloat80_t *, uint_fast8_t, bool );

+uint_fast64_t extF80M_to_ui64( const extFloat80_t *, uint_fast8_t, bool );

+int_fast32_t extF80M_to_i32( const extFloat80_t *, uint_fast8_t, bool );

+int_fast64_t extF80M_to_i64( const extFloat80_t *, uint_fast8_t, bool );

+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *, bool );

+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *, bool );

+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *, bool );

+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *, bool );

+float16_t extF80M_to_f16( const extFloat80_t * );

+float32_t extF80M_to_f32( const extFloat80_t * );

+float64_t extF80M_to_f64( const extFloat80_t * );

+void extF80M_to_f128M( const extFloat80_t *, float128_t * );

+void

+ extF80M_roundToInt(

+     const extFloat80_t *, uint_fast8_t, bool, extFloat80_t * );

+void extF80M_add( const extFloat80_t *, const extFloat80_t *, extFloat80_t * );

+void extF80M_sub( const extFloat80_t *, const extFloat80_t *, extFloat80_t * );

+void extF80M_mul( const extFloat80_t *, const extFloat80_t *, extFloat80_t * );

+void extF80M_div( const extFloat80_t *, const extFloat80_t *, extFloat80_t * );

+void extF80M_rem( const extFloat80_t *, const extFloat80_t *, extFloat80_t * );

+void extF80M_sqrt( const extFloat80_t *, extFloat80_t * );

+bool extF80M_eq( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_le( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_lt( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_eq_signaling( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_le_quiet( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_lt_quiet( const extFloat80_t *, const extFloat80_t * );

+bool extF80M_isSignalingNaN( const extFloat80_t * );

+

+/*----------------------------------------------------------------------------

+| 128-bit (quadruple-precision) floating-point operations.

+*----------------------------------------------------------------------------*/

+#ifdef SOFTFLOAT_FAST_INT64

+uint_fast32_t f128_to_ui32( float128_t, uint_fast8_t, bool );

+uint_fast64_t f128_to_ui64( float128_t, uint_fast8_t, bool );

+int_fast32_t f128_to_i32( float128_t, uint_fast8_t, bool );

+int_fast64_t f128_to_i64( float128_t, uint_fast8_t, bool );

+uint_fast32_t f128_to_ui32_r_minMag( float128_t, bool );

+uint_fast64_t f128_to_ui64_r_minMag( float128_t, bool );

+int_fast32_t f128_to_i32_r_minMag( float128_t, bool );

+int_fast64_t f128_to_i64_r_minMag( float128_t, bool );

+float16_t f128_to_f16( float128_t );

+float32_t f128_to_f32( float128_t );

+float64_t f128_to_f64( float128_t );

+extFloat80_t f128_to_extF80( float128_t );

+float128_t f128_roundToInt( float128_t, uint_fast8_t, bool );

+float128_t f128_add( float128_t, float128_t );

+float128_t f128_sub( float128_t, float128_t );

+float128_t f128_mul( float128_t, float128_t );

+float128_t f128_mulAdd( float128_t, float128_t, float128_t );

+float128_t f128_div( float128_t, float128_t );

+float128_t f128_rem( float128_t, float128_t );

+float128_t f128_sqrt( float128_t );

+bool f128_eq( float128_t, float128_t );

+bool f128_le( float128_t, float128_t );

+bool f128_lt( float128_t, float128_t );

+bool f128_eq_signaling( float128_t, float128_t );

+bool f128_le_quiet( float128_t, float128_t );

+bool f128_lt_quiet( float128_t, float128_t );

+bool f128_isSignalingNaN( float128_t );

+#endif

+uint_fast32_t f128M_to_ui32( const float128_t *, uint_fast8_t, bool );

+uint_fast64_t f128M_to_ui64( const float128_t *, uint_fast8_t, bool );

+int_fast32_t f128M_to_i32( const float128_t *, uint_fast8_t, bool );

+int_fast64_t f128M_to_i64( const float128_t *, uint_fast8_t, bool );

+uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *, bool );

+uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *, bool );

+int_fast32_t f128M_to_i32_r_minMag( const float128_t *, bool );

+int_fast64_t f128M_to_i64_r_minMag( const float128_t *, bool );

+float16_t f128M_to_f16( const float128_t * );

+float32_t f128M_to_f32( const float128_t * );

+float64_t f128M_to_f64( const float128_t * );

+void f128M_to_extF80M( const float128_t *, extFloat80_t * );

+void f128M_roundToInt( const float128_t *, uint_fast8_t, bool, float128_t * );

+void f128M_add( const float128_t *, const float128_t *, float128_t * );

+void f128M_sub( const float128_t *, const float128_t *, float128_t * );

+void f128M_mul( const float128_t *, const float128_t *, float128_t * );

+void

+ f128M_mulAdd(

+     const float128_t *, const float128_t *, const float128_t *, float128_t *

+ );

+void f128M_div( const float128_t *, const float128_t *, float128_t * );

+void f128M_rem( const float128_t *, const float128_t *, float128_t * );

+void f128M_sqrt( const float128_t *, float128_t * );

+bool f128M_eq( const float128_t *, const float128_t * );

+bool f128M_le( const float128_t *, const float128_t * );

+bool f128M_lt( const float128_t *, const float128_t * );

+bool f128M_eq_signaling( const float128_t *, const float128_t * );

+bool f128M_le_quiet( const float128_t *, const float128_t * );

+bool f128M_lt_quiet( const float128_t *, const float128_t * );

+bool f128M_isSignalingNaN( const float128_t * );

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/include/softfloat_types.h b/c_emulator/SoftFloat-3e/source/include/softfloat_types.h
new file mode 100644
index 0000000..bc30e31
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/include/softfloat_types.h
@@ -0,0 +1,81 @@
+

+/*============================================================================

+

+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#ifndef softfloat_types_h

+#define softfloat_types_h 1

+

+#include <stdint.h>

+

+/*----------------------------------------------------------------------------

+| Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point

+| arguments and results to/from functions.  These types must be exactly

+| 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively.  Where a

+| platform has "native" support for IEEE-Standard floating-point formats,

+| the types below may, if desired, be defined as aliases for the native types

+| (typically 'float' and 'double', and possibly 'long double').

+*----------------------------------------------------------------------------*/

+typedef struct { uint16_t v; } float16_t;

+typedef struct { uint32_t v; } float32_t;

+typedef struct { uint64_t v; } float64_t;

+typedef struct { uint64_t v[2]; } float128_t;

+

+/*----------------------------------------------------------------------------

+| The format of an 80-bit extended floating-point number in memory.  This

+| structure must contain a 16-bit field named 'signExp' and a 64-bit field

+| named 'signif'.

+*----------------------------------------------------------------------------*/

+#ifdef LITTLEENDIAN

+struct extFloat80M { uint64_t signif; uint16_t signExp; };

+#else

+struct extFloat80M { uint16_t signExp; uint64_t signif; };

+#endif

+

+/*----------------------------------------------------------------------------

+| The type used to pass 80-bit extended floating-point arguments and

+| results to/from functions.  This type must have size identical to

+| 'struct extFloat80M'.  Type 'extFloat80_t' can be defined as an alias for

+| 'struct extFloat80M'.  Alternatively, if a platform has "native" support

+| for IEEE-Standard 80-bit extended floating-point, it may be possible,

+| if desired, to define 'extFloat80_t' as an alias for the native type

+| (presumably either 'long double' or a nonstandard compiler-intrinsic type).

+| In that case, the 'signif' and 'signExp' fields of 'struct extFloat80M'

+| must align exactly with the locations in memory of the sign, exponent, and

+| significand of the native type.

+*----------------------------------------------------------------------------*/

+typedef struct extFloat80M extFloat80_t;

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_add128.c b/c_emulator/SoftFloat-3e/source/s_add128.c
new file mode 100644
index 0000000..5a9d508
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_add128.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_add128

+

+struct uint128

+ softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+    struct uint128 z;

+

+    z.v0 = a0 + b0;

+    z.v64 = a64 + b64 + (z.v0 < a0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_add256M.c b/c_emulator/SoftFloat-3e/source/s_add256M.c
new file mode 100644
index 0000000..4fb46a1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_add256M.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_add256M

+

+void

+ softfloat_add256M(

+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr )

+{

+    unsigned int index;

+    uint_fast8_t carry;

+    uint64_t wordA, wordZ;

+

+    index = indexWordLo( 4 );

+    carry = 0;

+    for (;;) {

+        wordA = aPtr[index];

+        wordZ = wordA + bPtr[index] + carry;

+        zPtr[index] = wordZ;

+        if ( index == indexWordHi( 4 ) ) break;

+        if ( wordZ != wordA ) carry = (wordZ < wordA);

+        index += wordIncr;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addCarryM.c b/c_emulator/SoftFloat-3e/source/s_addCarryM.c
new file mode 100644
index 0000000..f0ccf67
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addCarryM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_addCarryM

+

+uint_fast8_t

+ softfloat_addCarryM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint_fast8_t carry,

+     uint32_t *zPtr

+ )

+{

+    unsigned int index, lastIndex;

+    uint32_t wordA, wordZ;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    for (;;) {

+        wordA = aPtr[index];

+        wordZ = wordA + bPtr[index] + carry;

+        zPtr[index] = wordZ;

+        if ( wordZ != wordA ) carry = (wordZ < wordA);

+        if ( index == lastIndex ) break;

+        index += wordIncr;

+    }

+    return carry;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addComplCarryM.c b/c_emulator/SoftFloat-3e/source/s_addComplCarryM.c
new file mode 100644
index 0000000..e1584c6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addComplCarryM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_addComplCarryM

+

+uint_fast8_t

+ softfloat_addComplCarryM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint_fast8_t carry,

+     uint32_t *zPtr

+ )

+{

+    unsigned int index, lastIndex;

+    uint32_t wordA, wordZ;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    for (;;) {

+        wordA = aPtr[index];

+        wordZ = wordA + ~bPtr[index] + carry;

+        zPtr[index] = wordZ;

+        if ( wordZ != wordA ) carry = (wordZ < wordA);

+        if ( index == lastIndex ) break;

+        index += wordIncr;

+    }

+    return carry;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addExtF80M.c b/c_emulator/SoftFloat-3e/source/s_addExtF80M.c
new file mode 100644
index 0000000..febfb65
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addExtF80M.c
@@ -0,0 +1,186 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+void

+ softfloat_addExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr,

+     bool negateB

+ )

+{

+    uint32_t uiA64;

+    int32_t expA;

+    uint32_t uiB64;

+    int32_t expB;

+    uint32_t uiZ64;

+    bool signZ, signB;

+    const struct extFloat80M *tempSPtr;

+    uint64_t sigZ, sigB;

+    void

+     (*roundPackRoutinePtr)(

+         bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * );

+    int32_t expDiff;

+    uint32_t extSigX[3], sigZExtra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    expA = expExtF80UI64( uiA64 );

+    uiB64 = bSPtr->signExp;

+    expB = expExtF80UI64( uiB64 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNExtF80M( aSPtr, bSPtr, zSPtr ) ) return;

+        uiZ64 = uiA64;

+        if ( expB == 0x7FFF ) {

+            uiZ64 = uiB64 ^ packToExtF80UI64( negateB, 0 );

+            if ( (expA == 0x7FFF) && (uiZ64 != uiA64) ) {

+                softfloat_invalidExtF80M( zSPtr );

+                return;

+            }

+        }

+        zSPtr->signExp = uiZ64;

+        zSPtr->signif = UINT64_C( 0x8000000000000000 );

+        return;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signZ = signExtF80UI64( uiA64 );

+    signB = signExtF80UI64( uiB64 ) ^ negateB;

+    negateB = (signZ != signB);

+    if ( expA < expB ) {

+        signZ = signB;

+        expA = expB;

+        expB = expExtF80UI64( uiA64 );

+        tempSPtr = aSPtr;

+        aSPtr = bSPtr;

+        bSPtr = tempSPtr;

+    }

+    if ( ! expB ) {

+        expB = 1;

+        if ( ! expA ) expA = 1;

+    }

+    sigZ = aSPtr->signif;

+    sigB = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundPackRoutinePtr = softfloat_roundPackMToExtF80M;

+    expDiff = expA - expB;

+    if ( expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        extSigX[indexWord( 3, 2 )] = sigB>>32;

+        extSigX[indexWord( 3, 1 )] = sigB;

+        extSigX[indexWord( 3, 0 )] = 0;

+        softfloat_shiftRightJam96M( extSigX, expDiff, extSigX );

+        sigB =

+            (uint64_t) extSigX[indexWord( 3, 2 )]<<32

+                | extSigX[indexWord( 3, 1 )];

+        if ( negateB ) {

+            sigZ -= sigB;

+            sigZExtra = extSigX[indexWordLo( 3 )];

+            if ( sigZExtra ) {

+                --sigZ;

+                sigZExtra = -sigZExtra;

+            }

+            if ( ! (sigZ & UINT64_C( 0x8000000000000000 )) ) {

+                if ( sigZ & UINT64_C( 0x4000000000000000 ) ) {

+                    --expA;

+                    sigZ = sigZ<<1 | sigZExtra>>31;

+                    sigZExtra <<= 1;

+                } else {

+                    roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M;

+                }

+            }

+        } else {

+            sigZ += sigB;

+            if ( sigZ & UINT64_C( 0x8000000000000000 ) ) goto sigZ;

+            sigZExtra = (uint32_t) sigZ<<31 | (extSigX[indexWordLo( 3 )] != 0);

+            goto completeNormAfterAdd;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sigZExtra = 0;

+        if ( negateB ) {

+            if ( sigZ < sigB ) {

+                signZ = ! signZ;

+                sigZ = sigB - sigZ;

+            } else {

+                sigZ -= sigB;

+                if ( ! sigZ ) {

+                    signZ = (softfloat_roundingMode == softfloat_round_min);

+                    zSPtr->signExp = packToExtF80UI64( signZ, 0 );

+                    zSPtr->signif = 0;

+                    return;

+                }

+            }

+            roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M;

+        } else {

+            sigZ += sigB;

+            if ( sigZ < sigB ) {

+                sigZExtra = (uint32_t) sigZ<<31;

+ completeNormAfterAdd:

+                ++expA;

+                sigZ = UINT64_C( 0x8000000000000000 ) | sigZ>>1;

+            } else {

+                if ( ! (sigZ & UINT64_C( 0x8000000000000000 )) ) {

+                    roundPackRoutinePtr = softfloat_normRoundPackMToExtF80M;

+                }

+            }

+        }

+    }

+    extSigX[indexWord( 3, 0 )] = sigZExtra;

+ sigZ:

+    extSigX[indexWord( 3, 2 )] = sigZ>>32;

+    extSigX[indexWord( 3, 1 )] = sigZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ roundPack:

+    (*roundPackRoutinePtr)(

+        signZ, expA, extSigX, extF80_roundingPrecision, zSPtr );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addF128M.c b/c_emulator/SoftFloat-3e/source/s_addF128M.c
new file mode 100644
index 0000000..8ed9d27
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addF128M.c
@@ -0,0 +1,211 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+void

+ softfloat_addF128M(

+     const uint32_t *aWPtr,

+     const uint32_t *bWPtr,

+     uint32_t *zWPtr,

+     bool negateB

+ )

+{

+    uint32_t uiA96;

+    int32_t expA;

+    uint32_t uiB96;

+    int32_t expB;

+    uint32_t uiZ96;

+    bool signZ, signB;

+    const uint32_t *tempPtr;

+    uint32_t sig96A, sig96B;

+    int32_t expDiff;

+    uint_fast8_t

+     (*addCarryMRoutinePtr)(

+         uint_fast8_t,

+         const uint32_t *,

+         const uint32_t *,

+         uint_fast8_t,

+         uint32_t *

+     );

+    uint32_t extSigZ[5], wordSigZ;

+    uint_fast8_t carry;

+    void (*roundPackRoutinePtr)( bool, int32_t, uint32_t *, uint32_t * );

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    expA = expF128UI96( uiA96 );

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    expB = expF128UI96( uiB96 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) return;

+        uiZ96 = uiA96;

+        if ( expB == 0x7FFF ) {

+            uiZ96 = uiB96 ^ packToF128UI96( negateB, 0, 0 );

+            if ( (expA == 0x7FFF) && (uiZ96 != uiA96) ) {

+                softfloat_invalidF128M( zWPtr );

+                return;

+            }

+        }

+        zWPtr[indexWordHi( 4 )] = uiZ96;

+        zWPtr[indexWord( 4, 2 )] = 0;

+        zWPtr[indexWord( 4, 1 )] = 0;

+        zWPtr[indexWord( 4, 0 )] = 0;

+        return;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signZ = signF128UI96( uiA96 );

+    signB = signF128UI96( uiB96 ) ^ negateB;

+    negateB = (signZ != signB);

+    if ( (uint32_t) (uiA96<<1) < (uint32_t) (uiB96<<1) ) {

+        signZ = signB;

+        expA = expB;

+        expB = expF128UI96( uiA96 );

+        tempPtr = aWPtr;

+        aWPtr = bWPtr;

+        bWPtr = tempPtr;

+        uiA96 = uiB96;

+        uiB96 = bWPtr[indexWordHi( 4 )];

+    }

+    sig96A = fracF128UI96( uiA96 );

+    sig96B = fracF128UI96( uiB96 );

+    if ( expA ) {

+        --expA;

+        sig96A |= 0x00010000;

+        if ( expB ) {

+            --expB;

+            sig96B |= 0x00010000;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    addCarryMRoutinePtr =

+        negateB ? softfloat_addComplCarryM : softfloat_addCarryM;

+    expDiff = expA - expB;

+    if ( expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        extSigZ[indexWordHi( 5 )] = sig96B;

+        extSigZ[indexWord( 5, 3 )] = bWPtr[indexWord( 4, 2 )];

+        extSigZ[indexWord( 5, 2 )] = bWPtr[indexWord( 4, 1 )];

+        extSigZ[indexWord( 5, 1 )] = bWPtr[indexWord( 4, 0 )];

+        extSigZ[indexWord( 5, 0 )] = 0;

+        softfloat_shiftRightJam160M( extSigZ, expDiff, extSigZ );

+        sig96B = extSigZ[indexWordHi( 5 )];

+        carry = 0;

+        if ( negateB ) {

+            sig96B = ~sig96B;

+            wordSigZ = extSigZ[indexWordLo( 5 )];

+            extSigZ[indexWordLo( 5 )] = -wordSigZ;

+            carry = ! wordSigZ;

+        }

+        carry =

+            (*addCarryMRoutinePtr)(

+                3,

+                &aWPtr[indexMultiwordLo( 4, 3 )],

+                &extSigZ[indexMultiword( 5, 3, 1 )],

+                carry,

+                &extSigZ[indexMultiword( 5, 3, 1 )]

+            );

+        wordSigZ = sig96A + sig96B + carry;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        extSigZ[indexWordLo( 5 )] = 0;

+        carry =

+            (*addCarryMRoutinePtr)(

+                3,

+                &aWPtr[indexMultiwordLo( 4, 3 )],

+                &bWPtr[indexMultiwordLo( 4, 3 )],

+                negateB,

+                &extSigZ[indexMultiword( 5, 3, 1 )]

+            );

+        if ( negateB ) {

+            wordSigZ = sig96A + ~sig96B + carry;

+            if ( wordSigZ & 0x80000000 ) {

+                signZ = ! signZ;

+                carry =

+                    softfloat_addComplCarry96M(

+                        &bWPtr[indexMultiwordLo( 4, 3 )],

+                        &aWPtr[indexMultiwordLo( 4, 3 )],

+                        1,

+                        &extSigZ[indexMultiword( 5, 3, 1 )]

+                    );

+                wordSigZ = sig96B + ~sig96A + carry;

+            } else {

+                if (

+                    ! wordSigZ && ! extSigZ[indexWord( 5, 3 )]

+                        && ! (  extSigZ[indexWord( 5, 2 )]

+                              | extSigZ[indexWord( 5, 1 )]

+                              | extSigZ[indexWord( 5, 0 )]

+                             )

+                ) {

+                    signZ = (softfloat_roundingMode == softfloat_round_min);

+                    zWPtr[indexWordHi( 4 )] = packToF128UI96( signZ, 0, 0 );

+                    zWPtr[indexWord( 4, 2 )] = 0;

+                    zWPtr[indexWord( 4, 1 )] = 0;

+                    zWPtr[indexWord( 4, 0 )] = 0;

+                    return;

+                }

+            }

+        } else {

+            wordSigZ = sig96A + sig96B + carry;

+        }

+    }

+    extSigZ[indexWordHi( 5 )] = wordSigZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundPackRoutinePtr = softfloat_normRoundPackMToF128M;

+    if ( 0x00010000 <= wordSigZ ) {

+        if ( 0x00020000 <= wordSigZ ) {

+            ++expA;

+            softfloat_shortShiftRightJam160M( extSigZ, 1, extSigZ );

+        }

+        roundPackRoutinePtr = softfloat_roundPackMToF128M;

+    }

+    (*roundPackRoutinePtr)( signZ, expA, extSigZ, zWPtr );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addM.c b/c_emulator/SoftFloat-3e/source/s_addM.c
new file mode 100644
index 0000000..c935baa
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_addM

+

+void

+ softfloat_addM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint32_t *zPtr

+ )

+{

+    unsigned int index, lastIndex;

+    uint_fast8_t carry;

+    uint32_t wordA, wordZ;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    carry = 0;

+    for (;;) {

+        wordA = aPtr[index];

+        wordZ = wordA + bPtr[index] + carry;

+        zPtr[index] = wordZ;

+        if ( index == lastIndex ) break;

+        if ( wordZ != wordA ) carry = (wordZ < wordA);

+        index += wordIncr;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addMagsExtF80.c b/c_emulator/SoftFloat-3e/source/s_addMagsExtF80.c
new file mode 100644
index 0000000..b1bb5db
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addMagsExtF80.c
@@ -0,0 +1,156 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t

+ softfloat_addMagsExtF80(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0,

+     bool signZ

+ )

+{

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    int_fast32_t expB;

+    uint_fast64_t sigB;

+    int_fast32_t expDiff;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0, sigZ, sigZExtra;

+    struct exp32_sig64 normExpSig;

+    int_fast32_t expZ;

+    struct uint64_extra sig64Extra;

+    struct uint128 uiZ;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expExtF80UI64( uiA64 );

+    sigA = uiA0;

+    expB = expExtF80UI64( uiB64 );

+    sigB = uiB0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        if ( expA == 0x7FFF ) {

+            if ( (sigA | sigB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+                goto propagateNaN;

+            }

+            uiZ64 = uiA64;

+            uiZ0  = uiA0;

+            goto uiZ;

+        }

+        sigZ = sigA + sigB;

+        sigZExtra = 0;

+        if ( ! expA ) {

+            normExpSig = softfloat_normSubnormalExtF80Sig( sigZ );

+            expZ = normExpSig.exp + 1;

+            sigZ = normExpSig.sig;

+            goto roundAndPack;

+        }

+        expZ = expA;

+        goto shiftRight1;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expDiff < 0 ) {

+        if ( expB == 0x7FFF ) {

+            if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+            uiZ64 = packToExtF80UI64( signZ, 0x7FFF );

+            uiZ0  = uiB0;

+            goto uiZ;

+        }

+        expZ = expB;

+        if ( ! expA ) {

+            ++expDiff;

+            sigZExtra = 0;

+            if ( ! expDiff ) goto newlyAligned;

+        }

+        sig64Extra = softfloat_shiftRightJam64Extra( sigA, 0, -expDiff );

+        sigA = sig64Extra.v;

+        sigZExtra = sig64Extra.extra;

+    } else {

+        if ( expA == 0x7FFF ) {

+            if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+            uiZ64 = uiA64;

+            uiZ0  = uiA0;

+            goto uiZ;

+        }

+        expZ = expA;

+        if ( ! expB ) {

+            --expDiff;

+            sigZExtra = 0;

+            if ( ! expDiff ) goto newlyAligned;

+        }

+        sig64Extra = softfloat_shiftRightJam64Extra( sigB, 0, expDiff );

+        sigB = sig64Extra.v;

+        sigZExtra = sig64Extra.extra;

+    }

+ newlyAligned:

+    sigZ = sigA + sigB;

+    if ( sigZ & UINT64_C( 0x8000000000000000 ) ) goto roundAndPack;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ shiftRight1:

+    sig64Extra = softfloat_shortShiftRightJam64Extra( sigZ, sigZExtra, 1 );

+    sigZ = sig64Extra.v | UINT64_C( 0x8000000000000000 );

+    sigZExtra = sig64Extra.extra;

+    ++expZ;

+ roundAndPack:

+    return

+        softfloat_roundPackToExtF80(

+            signZ, expZ, sigZ, sigZExtra, extF80_roundingPrecision );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );

+    uiZ64 = uiZ.v64;

+    uiZ0  = uiZ.v0;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addMagsF128.c b/c_emulator/SoftFloat-3e/source/s_addMagsF128.c
new file mode 100644
index 0000000..8e5ce5b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addMagsF128.c
@@ -0,0 +1,154 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+float128_t

+ softfloat_addMagsF128(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0,

+     bool signZ

+ )

+{

+    int_fast32_t expA;

+    struct uint128 sigA;

+    int_fast32_t expB;

+    struct uint128 sigB;

+    int_fast32_t expDiff;

+    struct uint128 uiZ, sigZ;

+    int_fast32_t expZ;

+    uint_fast64_t sigZExtra;

+    struct uint128_extra sig128Extra;

+    union ui128_f128 uZ;

+

+    expA = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    expB = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        if ( expA == 0x7FFF ) {

+            if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN;

+            uiZ.v64 = uiA64;

+            uiZ.v0  = uiA0;

+            goto uiZ;

+        }

+        sigZ = softfloat_add128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 );

+        if ( ! expA ) {

+            uiZ.v64 = packToF128UI64( signZ, 0, sigZ.v64 );

+            uiZ.v0  = sigZ.v0;

+            goto uiZ;

+        }

+        expZ = expA;

+        sigZ.v64 |= UINT64_C( 0x0002000000000000 );

+        sigZExtra = 0;

+        goto shiftRight1;

+    }

+    if ( expDiff < 0 ) {

+        if ( expB == 0x7FFF ) {

+            if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+            uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );

+            uiZ.v0  = 0;

+            goto uiZ;

+        }

+        expZ = expB;

+        if ( expA ) {

+            sigA.v64 |= UINT64_C( 0x0001000000000000 );

+        } else {

+            ++expDiff;

+            sigZExtra = 0;

+            if ( ! expDiff ) goto newlyAligned;

+        }

+        sig128Extra =

+            softfloat_shiftRightJam128Extra( sigA.v64, sigA.v0, 0, -expDiff );

+        sigA = sig128Extra.v;

+        sigZExtra = sig128Extra.extra;

+    } else {

+        if ( expA == 0x7FFF ) {

+            if ( sigA.v64 | sigA.v0 ) goto propagateNaN;

+            uiZ.v64 = uiA64;

+            uiZ.v0  = uiA0;

+            goto uiZ;

+        }

+        expZ = expA;

+        if ( expB ) {

+            sigB.v64 |= UINT64_C( 0x0001000000000000 );

+        } else {

+            --expDiff;

+            sigZExtra = 0;

+            if ( ! expDiff ) goto newlyAligned;

+        }

+        sig128Extra =

+            softfloat_shiftRightJam128Extra( sigB.v64, sigB.v0, 0, expDiff );

+        sigB = sig128Extra.v;

+        sigZExtra = sig128Extra.extra;

+    }

+ newlyAligned:

+    sigZ =

+        softfloat_add128(

+            sigA.v64 | UINT64_C( 0x0001000000000000 ),

+            sigA.v0,

+            sigB.v64,

+            sigB.v0

+        );

+    --expZ;

+    if ( sigZ.v64 < UINT64_C( 0x0002000000000000 ) ) goto roundAndPack;

+    ++expZ;

+ shiftRight1:

+    sig128Extra =

+        softfloat_shortShiftRightJam128Extra(

+            sigZ.v64, sigZ.v0, sigZExtra, 1 );

+    sigZ = sig128Extra.v;

+    sigZExtra = sig128Extra.extra;

+ roundAndPack:

+    return

+        softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addMagsF16.c b/c_emulator/SoftFloat-3e/source/s_addMagsF16.c
new file mode 100644
index 0000000..b7fba09
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addMagsF16.c
@@ -0,0 +1,183 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t softfloat_addMagsF16( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    int_fast8_t expDiff;

+    uint_fast16_t uiZ;

+    bool signZ;

+    int_fast8_t expZ;

+    uint_fast16_t sigZ;

+    uint_fast16_t sigX, sigY;

+    int_fast8_t shiftDist;

+    uint_fast32_t sig32Z;

+    int_fast8_t roundingMode;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF16UI( uiA );

+    sigA = fracF16UI( uiA );

+    expB = expF16UI( uiB );

+    sigB = fracF16UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( ! expA ) {

+            uiZ = uiA + sigB;

+            goto uiZ;

+        }

+        if ( expA == 0x1F ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            uiZ = uiA;

+            goto uiZ;

+        }

+        signZ = signF16UI( uiA );

+        expZ = expA;

+        sigZ = 0x0800 + sigA + sigB;

+        if ( ! (sigZ & 1) && (expZ < 0x1E) ) {

+            sigZ >>= 1;

+            goto pack;

+        }

+        sigZ <<= 3;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signF16UI( uiA );

+        if ( expDiff < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            if ( expB == 0x1F ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF16UI( signZ, 0x1F, 0 );

+                goto uiZ;

+            }

+            if ( expDiff <= -13 ) {

+                uiZ = packToF16UI( signZ, expB, sigB );

+                if ( expA | sigA ) goto addEpsilon;

+                goto uiZ;

+            }

+            expZ = expB;

+            sigX = sigB | 0x0400;

+            sigY = sigA + (expA ? 0x0400 : sigA);

+            shiftDist = 19 + expDiff;

+        } else {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            uiZ = uiA;

+            if ( expA == 0x1F ) {

+                if ( sigA ) goto propagateNaN;

+                goto uiZ;

+            }

+            if ( 13 <= expDiff ) {

+                if ( expB | sigB ) goto addEpsilon;

+                goto uiZ;

+            }

+            expZ = expA;

+            sigX = sigA | 0x0400;

+            sigY = sigB + (expB ? 0x0400 : sigB);

+            shiftDist = 19 - expDiff;

+        }

+        sig32Z =

+            ((uint_fast32_t) sigX<<19) + ((uint_fast32_t) sigY<<shiftDist);

+        if ( sig32Z < 0x40000000 ) {

+            --expZ;

+            sig32Z <<= 1;

+        }

+        sigZ = sig32Z>>16;

+        if ( sig32Z & 0xFFFF ) {

+            sigZ |= 1;

+        } else {

+            if ( ! (sigZ & 0xF) && (expZ < 0x1E) ) {

+                sigZ >>= 4;

+                goto pack;

+            }

+        }

+    }

+    return softfloat_roundPackToF16( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ addEpsilon:

+    roundingMode = softfloat_roundingMode;

+    if ( roundingMode != softfloat_round_near_even ) {

+        if (

+            roundingMode

+                == (signF16UI( uiZ ) ? softfloat_round_min

+                        : softfloat_round_max)

+        ) {

+            ++uiZ;

+            if ( (uint16_t) (uiZ<<1) == 0xF800 ) {

+                softfloat_raiseFlags(

+                    softfloat_flag_overflow | softfloat_flag_inexact );

+            }

+        }

+#ifdef SOFTFLOAT_ROUND_ODD

+        else if ( roundingMode == softfloat_round_odd ) {

+            uiZ |= 1;

+        }

+#endif

+    }

+    softfloat_exceptionFlags |= softfloat_flag_inexact;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ pack:

+    uiZ = packToF16UI( signZ, expZ, sigZ );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addMagsF32.c b/c_emulator/SoftFloat-3e/source/s_addMagsF32.c
new file mode 100644
index 0000000..b74489d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addMagsF32.c
@@ -0,0 +1,126 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+float32_t softfloat_addMagsF32( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    int_fast16_t expDiff;

+    uint_fast32_t uiZ;

+    bool signZ;

+    int_fast16_t expZ;

+    uint_fast32_t sigZ;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF32UI( uiA );

+    sigA = fracF32UI( uiA );

+    expB = expF32UI( uiB );

+    sigB = fracF32UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( ! expA ) {

+            uiZ = uiA + sigB;

+            goto uiZ;

+        }

+        if ( expA == 0xFF ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            uiZ = uiA;

+            goto uiZ;

+        }

+        signZ = signF32UI( uiA );

+        expZ = expA;

+        sigZ = 0x01000000 + sigA + sigB;

+        if ( ! (sigZ & 1) && (expZ < 0xFE) ) {

+            uiZ = packToF32UI( signZ, expZ, sigZ>>1 );

+            goto uiZ;

+        }

+        sigZ <<= 6;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signF32UI( uiA );

+        sigA <<= 6;

+        sigB <<= 6;

+        if ( expDiff < 0 ) {

+            if ( expB == 0xFF ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF32UI( signZ, 0xFF, 0 );

+                goto uiZ;

+            }

+            expZ = expB;

+            sigA += expA ? 0x20000000 : sigA;

+            sigA = softfloat_shiftRightJam32( sigA, -expDiff );

+        } else {

+            if ( expA == 0xFF ) {

+                if ( sigA ) goto propagateNaN;

+                uiZ = uiA;

+                goto uiZ;

+            }

+            expZ = expA;

+            sigB += expB ? 0x20000000 : sigB;

+            sigB = softfloat_shiftRightJam32( sigB, expDiff );

+        }

+        sigZ = 0x20000000 + sigA + sigB;

+        if ( sigZ < 0x40000000 ) {

+            --expZ;

+            sigZ <<= 1;

+        }

+    }

+    return softfloat_roundPackToF32( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_addMagsF64.c b/c_emulator/SoftFloat-3e/source/s_addMagsF64.c
new file mode 100644
index 0000000..e8a4898
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_addMagsF64.c
@@ -0,0 +1,128 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+float64_t

+ softfloat_addMagsF64( uint_fast64_t uiA, uint_fast64_t uiB, bool signZ )

+{

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    int_fast16_t expDiff;

+    uint_fast64_t uiZ;

+    int_fast16_t expZ;

+    uint_fast64_t sigZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF64UI( uiA );

+    sigA = fracF64UI( uiA );

+    expB = expF64UI( uiB );

+    sigB = fracF64UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( ! expA ) {

+            uiZ = uiA + sigB;

+            goto uiZ;

+        }

+        if ( expA == 0x7FF ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            uiZ = uiA;

+            goto uiZ;

+        }

+        expZ = expA;

+        sigZ = UINT64_C( 0x0020000000000000 ) + sigA + sigB;

+        sigZ <<= 9;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sigA <<= 9;

+        sigB <<= 9;

+        if ( expDiff < 0 ) {

+            if ( expB == 0x7FF ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF64UI( signZ, 0x7FF, 0 );

+                goto uiZ;

+            }

+            expZ = expB;

+            if ( expA ) {

+                sigA += UINT64_C( 0x2000000000000000 );

+            } else {

+                sigA <<= 1;

+            }

+            sigA = softfloat_shiftRightJam64( sigA, -expDiff );

+        } else {

+            if ( expA == 0x7FF ) {

+                if ( sigA ) goto propagateNaN;

+                uiZ = uiA;

+                goto uiZ;

+            }

+            expZ = expA;

+            if ( expB ) {

+                sigB += UINT64_C( 0x2000000000000000 );

+            } else {

+                sigB <<= 1;

+            }

+            sigB = softfloat_shiftRightJam64( sigB, expDiff );

+        }

+        sigZ = UINT64_C( 0x2000000000000000 ) + sigA + sigB;

+        if ( sigZ < UINT64_C( 0x4000000000000000 ) ) {

+            --expZ;

+            sigZ <<= 1;

+        }

+    }

+    return softfloat_roundPackToF64( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_approxRecip32_1.c b/c_emulator/SoftFloat-3e/source/s_approxRecip32_1.c
new file mode 100644
index 0000000..4a326a4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_approxRecip32_1.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_approxRecip32_1

+

+extern const uint16_t softfloat_approxRecip_1k0s[16];

+extern const uint16_t softfloat_approxRecip_1k1s[16];

+

+uint32_t softfloat_approxRecip32_1( uint32_t a )

+{

+    int index;

+    uint16_t eps, r0;

+    uint32_t sigma0;

+    uint_fast32_t r;

+    uint32_t sqrSigma0;

+

+    index = a>>27 & 0xF;

+    eps = (uint16_t) (a>>11);

+    r0 = softfloat_approxRecip_1k0s[index]

+             - ((softfloat_approxRecip_1k1s[index] * (uint_fast32_t) eps)>>20);

+    sigma0 = ~(uint_fast32_t) ((r0 * (uint_fast64_t) a)>>7);

+    r = ((uint_fast32_t) r0<<16) + ((r0 * (uint_fast64_t) sigma0)>>24);

+    sqrSigma0 = ((uint_fast64_t) sigma0 * sigma0)>>32;

+    r += ((uint32_t) r * (uint_fast64_t) sqrSigma0)>>48;

+    return r;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt32_1.c b/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt32_1.c
new file mode 100644
index 0000000..b3fdeba
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt32_1.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_approxRecipSqrt32_1

+

+extern const uint16_t softfloat_approxRecipSqrt_1k0s[];

+extern const uint16_t softfloat_approxRecipSqrt_1k1s[];

+

+uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a )

+{

+    int index;

+    uint16_t eps, r0;

+    uint_fast32_t ESqrR0;

+    uint32_t sigma0;

+    uint_fast32_t r;

+    uint32_t sqrSigma0;

+

+    index = (a>>27 & 0xE) + oddExpA;

+    eps = (uint16_t) (a>>12);

+    r0 = softfloat_approxRecipSqrt_1k0s[index]

+             - ((softfloat_approxRecipSqrt_1k1s[index] * (uint_fast32_t) eps)

+                    >>20);

+    ESqrR0 = (uint_fast32_t) r0 * r0;

+    if ( ! oddExpA ) ESqrR0 <<= 1;

+    sigma0 = ~(uint_fast32_t) (((uint32_t) ESqrR0 * (uint_fast64_t) a)>>23);

+    r = ((uint_fast32_t) r0<<16) + ((r0 * (uint_fast64_t) sigma0)>>25);

+    sqrSigma0 = ((uint_fast64_t) sigma0 * sigma0)>>32;

+    r += ((uint32_t) ((r>>1) + (r>>3) - ((uint_fast32_t) r0<<14))

+              * (uint_fast64_t) sqrSigma0)

+             >>48;

+    if ( ! (r & 0x80000000) ) r = 0x80000000;

+    return r;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt_1Ks.c b/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt_1Ks.c
new file mode 100644
index 0000000..38a2798
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_approxRecipSqrt_1Ks.c
@@ -0,0 +1,49 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+

+const uint16_t softfloat_approxRecipSqrt_1k0s[16] = {

+    0xB4C9, 0xFFAB, 0xAA7D, 0xF11C, 0xA1C5, 0xE4C7, 0x9A43, 0xDA29,

+    0x93B5, 0xD0E5, 0x8DED, 0xC8B7, 0x88C6, 0xC16D, 0x8424, 0xBAE1

+};

+const uint16_t softfloat_approxRecipSqrt_1k1s[16] = {

+    0xA5A5, 0xEA42, 0x8C21, 0xC62D, 0x788F, 0xAA7F, 0x6928, 0x94B6,

+    0x5CC7, 0x8335, 0x52A6, 0x74E2, 0x4A3E, 0x68FE, 0x432B, 0x5EFD

+};

+

diff --git a/c_emulator/SoftFloat-3e/source/s_approxRecip_1Ks.c b/c_emulator/SoftFloat-3e/source/s_approxRecip_1Ks.c
new file mode 100644
index 0000000..f1fca74
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_approxRecip_1Ks.c
@@ -0,0 +1,49 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+

+const uint16_t softfloat_approxRecip_1k0s[16] = {

+    0xFFC4, 0xF0BE, 0xE363, 0xD76F, 0xCCAD, 0xC2F0, 0xBA16, 0xB201,

+    0xAA97, 0xA3C6, 0x9D7A, 0x97A6, 0x923C, 0x8D32, 0x887E, 0x8417

+};

+const uint16_t softfloat_approxRecip_1k1s[16] = {

+    0xF0F1, 0xD62C, 0xBFA1, 0xAC77, 0x9C0A, 0x8DDB, 0x8185, 0x76BA,

+    0x6D3B, 0x64D4, 0x5D5C, 0x56B1, 0x50B6, 0x4B55, 0x4679, 0x4211

+};

+

diff --git a/c_emulator/SoftFloat-3e/source/s_compare128M.c b/c_emulator/SoftFloat-3e/source/s_compare128M.c
new file mode 100644
index 0000000..dc97ce9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_compare128M.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_compare128M

+

+int_fast8_t softfloat_compare128M( const uint32_t *aPtr, const uint32_t *bPtr )

+{

+    unsigned int index, lastIndex;

+    uint32_t wordA, wordB;

+

+    index = indexWordHi( 4 );

+    lastIndex = indexWordLo( 4 );

+    for (;;) {

+        wordA = aPtr[index];

+        wordB = bPtr[index];

+        if ( wordA != wordB ) return (wordA < wordB) ? -1 : 1;

+        if ( index == lastIndex ) break;

+        index -= wordIncr;

+    }

+    return 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_compare96M.c b/c_emulator/SoftFloat-3e/source/s_compare96M.c
new file mode 100644
index 0000000..2681c46
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_compare96M.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_compare96M

+

+int_fast8_t softfloat_compare96M( const uint32_t *aPtr, const uint32_t *bPtr )

+{

+    unsigned int index, lastIndex;

+    uint32_t wordA, wordB;

+

+    index = indexWordHi( 3 );

+    lastIndex = indexWordLo( 3 );

+    for (;;) {

+        wordA = aPtr[index];

+        wordB = bPtr[index];

+        if ( wordA != wordB ) return (wordA < wordB) ? -1 : 1;

+        if ( index == lastIndex ) break;

+        index -= wordIncr;

+    }

+    return 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_compareNonnormExtF80M.c b/c_emulator/SoftFloat-3e/source/s_compareNonnormExtF80M.c
new file mode 100644
index 0000000..2673153
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_compareNonnormExtF80M.c
@@ -0,0 +1,111 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat_types.h"

+

+int

+ softfloat_compareNonnormExtF80M(

+     const struct extFloat80M *aSPtr, const struct extFloat80M *bSPtr )

+{

+    uint_fast16_t uiA64, uiB64;

+    uint64_t sigA;

+    bool signB;

+    uint64_t sigB;

+    int32_t expA, expB;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA64 = aSPtr->signExp;

+    uiB64 = bSPtr->signExp;

+    sigA = aSPtr->signif;

+    signB = signExtF80UI64( uiB64 );

+    sigB = bSPtr->signif;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( (uiA64 ^ uiB64) & 0x8000 ) {

+        if ( ! (sigA | sigB) ) return 0;

+        goto resultFromSignB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expExtF80UI64( uiA64 );

+    expB = expExtF80UI64( uiB64 );

+    if ( expA == 0x7FFF ) {

+        if (expB == 0x7FFF) return 0;

+        signB = ! signB;

+        goto resultFromSignB;

+    }

+    if ( expB == 0x7FFF ) {

+        goto resultFromSignB;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) expA = 1;

+    if ( ! (sigA & UINT64_C( 0x8000000000000000 )) ) {

+        if ( sigA ) {

+            expA += softfloat_normExtF80SigM( &sigA );

+        } else {

+            expA = -128;

+        }

+    }

+    if ( ! expB ) expB = 1;

+    if ( ! (sigB & UINT64_C( 0x8000000000000000 )) ) {

+        if ( sigB ) {

+            expB += softfloat_normExtF80SigM( &sigB );

+        } else {

+            expB = -128;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signB ) {

+        if ( expA < expB ) return 1;

+        if ( (expB < expA) || (sigB < sigA) ) return -1;

+    } else {

+        if ( expB < expA ) return 1;

+        if ( (expA < expB) || (sigA < sigB) ) return -1;

+    }

+    return (sigA != sigB);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ resultFromSignB:

+    return signB ? 1 : -1;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_countLeadingZeros16.c b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros16.c
new file mode 100644
index 0000000..7a68da5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros16.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_countLeadingZeros16

+

+#define softfloat_countLeadingZeros16 softfloat_countLeadingZeros16

+#include "primitives.h"

+

+uint_fast8_t softfloat_countLeadingZeros16( uint16_t a )

+{

+    uint_fast8_t count;

+

+    count = 8;

+    if ( 0x100 <= a ) {

+        count = 0;

+        a >>= 8;

+    }

+    count += softfloat_countLeadingZeros8[a];

+    return count;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_countLeadingZeros32.c b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros32.c
new file mode 100644
index 0000000..53ab228
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros32.c
@@ -0,0 +1,64 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_countLeadingZeros32

+

+#define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32

+#include "primitives.h"

+

+uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )

+{

+    uint_fast8_t count;

+

+    count = 0;

+    if ( a < 0x10000 ) {

+        count = 16;

+        a <<= 16;

+    }

+    if ( a < 0x1000000 ) {

+        count += 8;

+        a <<= 8;

+    }

+    count += softfloat_countLeadingZeros8[a>>24];

+    return count;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_countLeadingZeros64.c b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros64.c
new file mode 100644
index 0000000..13a2224
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros64.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_countLeadingZeros64

+

+#define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64

+#include "primitives.h"

+

+uint_fast8_t softfloat_countLeadingZeros64( uint64_t a )

+{

+    uint_fast8_t count;

+    uint32_t a32;

+

+    count = 0;

+    a32 = a>>32;

+    if ( ! a32 ) {

+        count = 32;

+        a32 = a;

+    }

+    /*------------------------------------------------------------------------

+    | From here, result is current count + count leading zeros of `a32'.

+    *------------------------------------------------------------------------*/

+    if ( a32 < 0x10000 ) {

+        count += 16;

+        a32 <<= 16;

+    }

+    if ( a32 < 0x1000000 ) {

+        count += 8;

+        a32 <<= 8;

+    }

+    count += softfloat_countLeadingZeros8[a32>>24];

+    return count;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_countLeadingZeros8.c b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros8.c
new file mode 100644
index 0000000..a56f5a4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_countLeadingZeros8.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+

+const uint_least8_t softfloat_countLeadingZeros8[256] = {

+    8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,

+    3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,

+    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,

+    2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,

+    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

+    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

+    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

+    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

+    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0

+};

+

diff --git a/c_emulator/SoftFloat-3e/source/s_eq128.c b/c_emulator/SoftFloat-3e/source/s_eq128.c
new file mode 100644
index 0000000..275b8ae
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_eq128.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_eq128

+

+bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+

+    return (a64 == b64) && (a0 == b0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_invalidExtF80M.c b/c_emulator/SoftFloat-3e/source/s_invalidExtF80M.c
new file mode 100644
index 0000000..237d217
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_invalidExtF80M.c
@@ -0,0 +1,49 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include "platform.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+void softfloat_invalidExtF80M( struct extFloat80M *zSPtr )

+{

+

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    zSPtr->signExp = defaultNaNExtF80UI64;

+    zSPtr->signif  = defaultNaNExtF80UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_invalidF128M.c b/c_emulator/SoftFloat-3e/source/s_invalidF128M.c
new file mode 100644
index 0000000..a20840e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_invalidF128M.c
@@ -0,0 +1,53 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+void softfloat_invalidF128M( uint32_t *zWPtr )

+{

+

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;

+    zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;

+    zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;

+    zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_isNaNF128M.c b/c_emulator/SoftFloat-3e/source/s_isNaNF128M.c
new file mode 100644
index 0000000..6008cf3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_isNaNF128M.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "primitives.h"

+

+/*----------------------------------------------------------------------------

+*----------------------------------------------------------------------------*/

+bool softfloat_isNaNF128M( const uint32_t *aWPtr )

+{

+    uint32_t uiA96;

+

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    if ( (~uiA96 & 0x7FFF0000) != 0 ) return false;

+    return

+        ((uiA96 & 0x0000FFFF) != 0)

+            || ((aWPtr[indexWord( 4, 2 )] | aWPtr[indexWord( 4, 1 )]

+                     | aWPtr[indexWord( 4, 0 )])

+                    != 0);

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_le128.c b/c_emulator/SoftFloat-3e/source/s_le128.c
new file mode 100644
index 0000000..1fce7af
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_le128.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_le128

+

+bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+

+    return (a64 < b64) || ((a64 == b64) && (a0 <= b0));

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_lt128.c b/c_emulator/SoftFloat-3e/source/s_lt128.c
new file mode 100644
index 0000000..d7ce3b9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_lt128.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_lt128

+

+bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+

+    return (a64 < b64) || ((a64 == b64) && (a0 < b0));

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul128By32.c b/c_emulator/SoftFloat-3e/source/s_mul128By32.c
new file mode 100644
index 0000000..7c0fdc8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul128By32.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_mul128By32

+

+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b )

+{

+    struct uint128 z;

+    uint_fast64_t mid;

+    uint_fast32_t carry;

+

+    z.v0 = a0 * b;

+    mid = (uint_fast64_t) (uint32_t) (a0>>32) * b;

+    carry = (uint32_t) ((uint_fast32_t) (z.v0>>32) - (uint_fast32_t) mid);

+    z.v64 = a64 * b + (uint_fast32_t) ((mid + carry)>>32);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul128MTo256M.c b/c_emulator/SoftFloat-3e/source/s_mul128MTo256M.c
new file mode 100644
index 0000000..ea8865e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul128MTo256M.c
@@ -0,0 +1,100 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_mul128MTo256M

+

+void

+ softfloat_mul128MTo256M(

+     const uint32_t *aPtr, const uint32_t *bPtr, uint32_t *zPtr )

+{

+    uint32_t *lastZPtr, wordB;

+    uint64_t dwordProd;

+    uint32_t wordZ;

+    uint_fast8_t carry;

+

+    bPtr += indexWordLo( 4 );

+    lastZPtr = zPtr + indexMultiwordHi( 8, 5 );

+    zPtr += indexMultiwordLo( 8, 5 );

+    wordB = *bPtr;

+    dwordProd = (uint64_t) aPtr[indexWord( 4, 0 )] * wordB;

+    zPtr[indexWord( 5, 0 )] = dwordProd;

+    dwordProd = (uint64_t) aPtr[indexWord( 4, 1 )] * wordB + (dwordProd>>32);

+    zPtr[indexWord( 5, 1 )] = dwordProd;

+    dwordProd = (uint64_t) aPtr[indexWord( 4, 2 )] * wordB + (dwordProd>>32);

+    zPtr[indexWord( 5, 2 )] = dwordProd;

+    dwordProd = (uint64_t) aPtr[indexWord( 4, 3 )] * wordB + (dwordProd>>32);

+    zPtr[indexWord( 5, 3 )] = dwordProd;

+    zPtr[indexWord( 5, 4 )] = dwordProd>>32;

+    do {

+        bPtr += wordIncr;

+        zPtr += wordIncr;

+        wordB = *bPtr;

+        dwordProd = (uint64_t) aPtr[indexWord( 4, 0 )] * wordB;

+        wordZ = zPtr[indexWord( 5, 0 )] + (uint32_t) dwordProd;

+        zPtr[indexWord( 5, 0 )] = wordZ;

+        carry = (wordZ < (uint32_t) dwordProd);

+        dwordProd =

+            (uint64_t) aPtr[indexWord( 4, 1 )] * wordB + (dwordProd>>32);

+        wordZ = zPtr[indexWord( 5, 1 )] + (uint32_t) dwordProd + carry;

+        zPtr[indexWord( 5, 1 )] = wordZ;

+        if ( wordZ != (uint32_t) dwordProd ) {

+            carry = (wordZ < (uint32_t) dwordProd);

+        }

+        dwordProd =

+            (uint64_t) aPtr[indexWord( 4, 2 )] * wordB + (dwordProd>>32);

+        wordZ = zPtr[indexWord( 5, 2 )] + (uint32_t) dwordProd + carry;

+        zPtr[indexWord( 5, 2 )] = wordZ;

+        if ( wordZ != (uint32_t) dwordProd ) {

+            carry = (wordZ < (uint32_t) dwordProd);

+        }

+        dwordProd =

+            (uint64_t) aPtr[indexWord( 4, 3 )] * wordB + (dwordProd>>32);

+        wordZ = zPtr[indexWord( 5, 3 )] + (uint32_t) dwordProd + carry;

+        zPtr[indexWord( 5, 3 )] = wordZ;

+        if ( wordZ != (uint32_t) dwordProd ) {

+            carry = (wordZ < (uint32_t) dwordProd);

+        }

+        zPtr[indexWord( 5, 4 )] = (dwordProd>>32) + carry;

+    } while ( zPtr != lastZPtr );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul128To256M.c b/c_emulator/SoftFloat-3e/source/s_mul128To256M.c
new file mode 100644
index 0000000..7c9d9b5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul128To256M.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_mul128To256M

+

+#define softfloat_mul128To256M softfloat_mul128To256M

+#include "primitives.h"

+

+void

+ softfloat_mul128To256M(

+     uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr )

+{

+    struct uint128 p0, p64, p128;

+    uint_fast64_t z64, z128, z192;

+

+    p0 = softfloat_mul64To128( a0, b0 );

+    zPtr[indexWord( 4, 0 )] = p0.v0;

+    p64 = softfloat_mul64To128( a64, b0 );

+    z64 = p64.v0 + p0.v64;

+    z128 = p64.v64 + (z64 < p64.v0);

+    p128 = softfloat_mul64To128( a64, b64 );

+    z128 += p128.v0;

+    z192 = p128.v64 + (z128 < p128.v0);

+    p64 = softfloat_mul64To128( a0, b64 );

+    z64 += p64.v0;

+    zPtr[indexWord( 4, 1 )] = z64;

+    p64.v64 += (z64 < p64.v0);

+    z128 += p64.v64;

+    zPtr[indexWord( 4, 2 )] = z128;

+    zPtr[indexWord( 4, 3 )] = z192 + (z128 < p64.v64);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul64ByShifted32To128.c b/c_emulator/SoftFloat-3e/source/s_mul64ByShifted32To128.c
new file mode 100644
index 0000000..57e5288
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul64ByShifted32To128.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_mul64ByShifted32To128

+

+struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )

+{

+    uint_fast64_t mid;

+    struct uint128 z;

+

+    mid = (uint_fast64_t) (uint32_t) a * b;

+    z.v0 = mid<<32;

+    z.v64 = (uint_fast64_t) (uint32_t) (a>>32) * b + (mid>>32);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul64To128.c b/c_emulator/SoftFloat-3e/source/s_mul64To128.c
new file mode 100644
index 0000000..5d360aa
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul64To128.c
@@ -0,0 +1,66 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_mul64To128

+

+struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b )

+{

+    uint32_t a32, a0, b32, b0;

+    struct uint128 z;

+    uint64_t mid1, mid;

+

+    a32 = a>>32;

+    a0 = a;

+    b32 = b>>32;

+    b0 = b;

+    z.v0 = (uint_fast64_t) a0 * b0;

+    mid1 = (uint_fast64_t) a32 * b0;

+    mid = mid1 + (uint_fast64_t) a0 * b32;

+    z.v64 = (uint_fast64_t) a32 * b32;

+    z.v64 += (uint_fast64_t) (mid < mid1)<<32 | mid>>32;

+    mid <<= 32;

+    z.v0 += mid;

+    z.v64 += (z.v0 < mid);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mul64To128M.c b/c_emulator/SoftFloat-3e/source/s_mul64To128M.c
new file mode 100644
index 0000000..ed10be3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mul64To128M.c
@@ -0,0 +1,68 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_mul64To128M

+

+void softfloat_mul64To128M( uint64_t a, uint64_t b, uint32_t *zPtr )

+{

+    uint32_t a32, a0, b32, b0;

+    uint64_t z0, mid1, z64, mid;

+

+    a32 = a>>32;

+    a0 = a;

+    b32 = b>>32;

+    b0 = b;

+    z0 = (uint64_t) a0 * b0;

+    mid1 = (uint64_t) a32 * b0;

+    mid = mid1 + (uint64_t) a0 * b32;

+    z64 = (uint64_t) a32 * b32;

+    z64 += (uint64_t) (mid < mid1)<<32 | mid>>32;

+    mid <<= 32;

+    z0 += mid;

+    zPtr[indexWord( 4, 1 )] = z0>>32;

+    zPtr[indexWord( 4, 0 )] = z0;

+    z64 += (z0 < mid);

+    zPtr[indexWord( 4, 3 )] = z64>>32;

+    zPtr[indexWord( 4, 2 )] = z64;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mulAddF128.c b/c_emulator/SoftFloat-3e/source/s_mulAddF128.c
new file mode 100644
index 0000000..f6b2b45
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mulAddF128.c
@@ -0,0 +1,350 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t

+ softfloat_mulAddF128(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0,

+     uint_fast64_t uiC64,

+     uint_fast64_t uiC0,

+     uint_fast8_t op

+ )

+{

+    bool signA;

+    int_fast32_t expA;

+    struct uint128 sigA;

+    bool signB;

+    int_fast32_t expB;

+    struct uint128 sigB;

+    bool signC;

+    int_fast32_t expC;

+    struct uint128 sigC;

+    bool signZ;

+    uint_fast64_t magBits;

+    struct uint128 uiZ;

+    struct exp32_sig128 normExpSig;

+    int_fast32_t expZ;

+    uint64_t sig256Z[4];

+    struct uint128 sigZ;

+    int_fast32_t shiftDist, expDiff;

+    struct uint128 x128;

+    uint64_t sig256C[4];

+    static uint64_t zero256[4] = INIT_UINTM4( 0, 0, 0, 0 );

+    uint_fast64_t sigZExtra, sig256Z0;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signF128UI64( uiA64 );

+    expA  = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    signB = signF128UI64( uiB64 );

+    expB  = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    signC = signF128UI64( uiC64 ) ^ (op == softfloat_mulAdd_subC);

+    expC  = expF128UI64( uiC64 );

+    sigC.v64 = fracF128UI64( uiC64 );

+    sigC.v0  = uiC0;

+    signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FFF ) {

+        if (

+            (sigA.v64 | sigA.v0) || ((expB == 0x7FFF) && (sigB.v64 | sigB.v0))

+        ) {

+            goto propagateNaN_ABC;

+        }

+        magBits = expB | sigB.v64 | sigB.v0;

+        goto infProdArg;

+    }

+    if ( expB == 0x7FFF ) {

+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN_ABC;

+        magBits = expA | sigA.v64 | sigA.v0;

+        goto infProdArg;

+    }

+    if ( expC == 0x7FFF ) {

+        if ( sigC.v64 | sigC.v0 ) {

+            uiZ.v64 = 0;

+            uiZ.v0  = 0;

+            goto propagateNaN_ZC;

+        }

+        uiZ.v64 = uiC64;

+        uiZ.v0  = uiC0;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! (sigA.v64 | sigA.v0) ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF128Sig( sigA.v64, sigA.v0 );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! (sigB.v64 | sigB.v0) ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF128Sig( sigB.v64, sigB.v0 );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FFE;

+    sigA.v64 |= UINT64_C( 0x0001000000000000 );

+    sigB.v64 |= UINT64_C( 0x0001000000000000 );

+    sigA = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 8 );

+    sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 15 );

+    softfloat_mul128To256M( sigA.v64, sigA.v0, sigB.v64, sigB.v0, sig256Z );

+    sigZ.v64 = sig256Z[indexWord( 4, 3 )];

+    sigZ.v0  = sig256Z[indexWord( 4, 2 )];

+    shiftDist = 0;

+    if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) {

+        --expZ;

+        shiftDist = -1;

+    }

+    if ( ! expC ) {

+        if ( ! (sigC.v64 | sigC.v0) ) {

+            shiftDist += 8;

+            goto sigZ;

+        }

+        normExpSig = softfloat_normSubnormalF128Sig( sigC.v64, sigC.v0 );

+        expC = normExpSig.exp;

+        sigC = normExpSig.sig;

+    }

+    sigC.v64 |= UINT64_C( 0x0001000000000000 );

+    sigC = softfloat_shortShiftLeft128( sigC.v64, sigC.v0, 8 );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expZ - expC;

+    if ( expDiff < 0 ) {

+        expZ = expC;

+        if ( (signZ == signC) || (expDiff < -1) ) {

+            shiftDist -= expDiff;

+            if ( shiftDist ) {

+                sigZ =

+                    softfloat_shiftRightJam128( sigZ.v64, sigZ.v0, shiftDist );

+            }

+        } else {

+            if ( ! shiftDist ) {

+                x128 =

+                    softfloat_shortShiftRight128(

+                        sig256Z[indexWord( 4, 1 )], sig256Z[indexWord( 4, 0 )],

+                        1

+                    );

+                sig256Z[indexWord( 4, 1 )] = (sigZ.v0<<63) | x128.v64;

+                sig256Z[indexWord( 4, 0 )] = x128.v0;

+                sigZ = softfloat_shortShiftRight128( sigZ.v64, sigZ.v0, 1 );

+                sig256Z[indexWord( 4, 3 )] = sigZ.v64;

+                sig256Z[indexWord( 4, 2 )] = sigZ.v0;

+            }

+        }

+    } else {

+        if ( shiftDist ) softfloat_add256M( sig256Z, sig256Z, sig256Z );

+        if ( ! expDiff ) {

+            sigZ.v64 = sig256Z[indexWord( 4, 3 )];

+            sigZ.v0  = sig256Z[indexWord( 4, 2 )];

+        } else {

+            sig256C[indexWord( 4, 3 )] = sigC.v64;

+            sig256C[indexWord( 4, 2 )] = sigC.v0;

+            sig256C[indexWord( 4, 1 )] = 0;

+            sig256C[indexWord( 4, 0 )] = 0;

+            softfloat_shiftRightJam256M( sig256C, expDiff, sig256C );

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    shiftDist = 8;

+    if ( signZ == signC ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff <= 0 ) {

+            sigZ = softfloat_add128( sigC.v64, sigC.v0, sigZ.v64, sigZ.v0 );

+        } else {

+            softfloat_add256M( sig256Z, sig256C, sig256Z );

+            sigZ.v64 = sig256Z[indexWord( 4, 3 )];

+            sigZ.v0  = sig256Z[indexWord( 4, 2 )];

+        }

+        if ( sigZ.v64 & UINT64_C( 0x0200000000000000 ) ) {

+            ++expZ;

+            shiftDist = 9;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff < 0 ) {

+            signZ = signC;

+            if ( expDiff < -1 ) {

+                sigZ =

+                    softfloat_sub128( sigC.v64, sigC.v0, sigZ.v64, sigZ.v0 );

+                sigZExtra =

+                    sig256Z[indexWord( 4, 1 )] | sig256Z[indexWord( 4, 0 )];

+                if ( sigZExtra ) {

+                    sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, 0, 1 );

+                }

+                if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) {

+                    --expZ;

+                    shiftDist = 7;

+                }

+                goto shiftRightRoundPack;

+            } else {

+                sig256C[indexWord( 4, 3 )] = sigC.v64;

+                sig256C[indexWord( 4, 2 )] = sigC.v0;

+                sig256C[indexWord( 4, 1 )] = 0;

+                sig256C[indexWord( 4, 0 )] = 0;

+                softfloat_sub256M( sig256C, sig256Z, sig256Z );

+            }

+        } else if ( ! expDiff ) {

+            sigZ = softfloat_sub128( sigZ.v64, sigZ.v0, sigC.v64, sigC.v0 );

+            if (

+                ! (sigZ.v64 | sigZ.v0) && ! sig256Z[indexWord( 4, 1 )]

+                    && ! sig256Z[indexWord( 4, 0 )]

+            ) {

+                goto completeCancellation;

+            }

+            sig256Z[indexWord( 4, 3 )] = sigZ.v64;

+            sig256Z[indexWord( 4, 2 )] = sigZ.v0;

+            if ( sigZ.v64 & UINT64_C( 0x8000000000000000 ) ) {

+                signZ = ! signZ;

+                softfloat_sub256M( zero256, sig256Z, sig256Z );

+            }

+        } else {

+            softfloat_sub256M( sig256Z, sig256C, sig256Z );

+            if ( 1 < expDiff ) {

+                sigZ.v64 = sig256Z[indexWord( 4, 3 )];

+                sigZ.v0  = sig256Z[indexWord( 4, 2 )];

+                if ( ! (sigZ.v64 & UINT64_C( 0x0100000000000000 )) ) {

+                    --expZ;

+                    shiftDist = 7;

+                }

+                goto sigZ;

+            }

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sigZ.v64  = sig256Z[indexWord( 4, 3 )];

+        sigZ.v0   = sig256Z[indexWord( 4, 2 )];

+        sigZExtra = sig256Z[indexWord( 4, 1 )];

+        sig256Z0  = sig256Z[indexWord( 4, 0 )];

+        if ( sigZ.v64 ) {

+            if ( sig256Z0 ) sigZExtra |= 1;

+        } else {

+            expZ -= 64;

+            sigZ.v64  = sigZ.v0;

+            sigZ.v0   = sigZExtra;

+            sigZExtra = sig256Z0;

+            if ( ! sigZ.v64 ) {

+                expZ -= 64;

+                sigZ.v64  = sigZ.v0;

+                sigZ.v0   = sigZExtra;

+                sigZExtra = 0;

+                if ( ! sigZ.v64 ) {

+                    expZ -= 64;

+                    sigZ.v64 = sigZ.v0;

+                    sigZ.v0  = 0;

+                }

+            }

+        }

+        shiftDist = softfloat_countLeadingZeros64( sigZ.v64 );

+        expZ += 7 - shiftDist;

+        shiftDist = 15 - shiftDist;

+        if ( 0 < shiftDist ) goto shiftRightRoundPack;

+        if ( shiftDist ) {

+            shiftDist = -shiftDist;

+            sigZ = softfloat_shortShiftLeft128( sigZ.v64, sigZ.v0, shiftDist );

+            x128 = softfloat_shortShiftLeft128( 0, sigZExtra, shiftDist );

+            sigZ.v0 |= x128.v64;

+            sigZExtra = x128.v0;

+        }

+        goto roundPack;

+    }

+ sigZ:

+    sigZExtra = sig256Z[indexWord( 4, 1 )] | sig256Z[indexWord( 4, 0 )];

+ shiftRightRoundPack:

+    sigZExtra = (uint64_t) (sigZ.v0<<(64 - shiftDist)) | (sigZExtra != 0);

+    sigZ = softfloat_shortShiftRight128( sigZ.v64, sigZ.v0, shiftDist );

+ roundPack:

+    return

+        softfloat_roundPackToF128(

+            signZ, expZ - 1, sigZ.v64, sigZ.v0, sigZExtra );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN_ABC:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+    goto propagateNaN_ZC;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infProdArg:

+    if ( magBits ) {

+        uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );

+        uiZ.v0 = 0;

+        if ( expC != 0x7FFF ) goto uiZ;

+        if ( sigC.v64 | sigC.v0 ) goto propagateNaN_ZC;

+        if ( signZ == signC ) goto uiZ;

+    }

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ.v64 = defaultNaNF128UI64;

+    uiZ.v0  = defaultNaNF128UI0;

+ propagateNaN_ZC:

+    uiZ = softfloat_propagateNaNF128UI( uiZ.v64, uiZ.v0, uiC64, uiC0 );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    uiZ.v64 = uiC64;

+    uiZ.v0  = uiC0;

+    if ( ! (expC | sigC.v64 | sigC.v0) && (signZ != signC) ) {

+ completeCancellation:

+        uiZ.v64 =

+            packToF128UI64(

+                (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+        uiZ.v0 = 0;

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mulAddF128M.c b/c_emulator/SoftFloat-3e/source/s_mulAddF128M.c
new file mode 100644
index 0000000..f51fc71
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mulAddF128M.c
@@ -0,0 +1,382 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+void

+ softfloat_mulAddF128M(

+     const uint32_t *aWPtr,

+     const uint32_t *bWPtr,

+     const uint32_t *cWPtr,

+     uint32_t *zWPtr,

+     uint_fast8_t op

+ )

+{

+    uint32_t uiA96;

+    int32_t expA;

+    uint32_t uiB96;

+    int32_t expB;

+    uint32_t uiC96;

+    bool signC;

+    int32_t expC;

+    bool signProd, prodIsInfinite;

+    uint32_t *ptr, uiZ96, sigA[4];

+    uint_fast8_t shiftDist;

+    uint32_t sigX[5];

+    int32_t expProd;

+    uint32_t sigProd[8], wordSig;

+    bool doSub;

+    uint_fast8_t

+     (*addCarryMRoutinePtr)(

+         uint_fast8_t,

+         const uint32_t *,

+         const uint32_t *,

+         uint_fast8_t,

+         uint32_t *

+     );

+    int32_t expDiff;

+    bool signZ;

+    int32_t expZ;

+    uint32_t *extSigPtr;

+    uint_fast8_t carry;

+    void (*roundPackRoutinePtr)( bool, int32_t, uint32_t *, uint32_t * );

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uiA96 = aWPtr[indexWordHi( 4 )];

+    expA = expF128UI96( uiA96 );

+    uiB96 = bWPtr[indexWordHi( 4 )];

+    expB = expF128UI96( uiB96 );

+    uiC96 = cWPtr[indexWordHi( 4 )];

+    signC = signF128UI96( uiC96 ) ^ (op == softfloat_mulAdd_subC);

+    expC = expF128UI96( uiC96 );

+    signProd =

+        signF128UI96( uiA96 ) ^ signF128UI96( uiB96 )

+            ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    prodIsInfinite = false;

+    if ( (expA == 0x7FFF) || (expB == 0x7FFF) ) {

+        if ( softfloat_tryPropagateNaNF128M( aWPtr, bWPtr, zWPtr ) ) {

+            goto propagateNaN_ZC;

+        }

+        ptr = (uint32_t *) aWPtr;

+        if ( ! (uint32_t) (uiA96<<1) ) goto possibleInvalidProd;

+        if ( ! (uint32_t) (uiB96<<1) ) {

+            ptr = (uint32_t *) bWPtr;

+     possibleInvalidProd:

+            if (

+                ! (ptr[indexWord( 4, 2 )] | ptr[indexWord( 4, 1 )]

+                       | ptr[indexWord( 4, 0 )])

+            ) {

+                goto invalid;

+            }

+        }

+        prodIsInfinite = true;

+    }

+    if ( expC == 0x7FFF ) {

+        if (

+            fracF128UI96( uiC96 )

+                || (cWPtr[indexWord( 4, 2 )] | cWPtr[indexWord( 4, 1 )]

+                        | cWPtr[indexWord( 4, 0 )])

+        ) {

+            zWPtr[indexWordHi( 4 )] = 0;

+            goto propagateNaN_ZC;

+        }

+        if ( prodIsInfinite && (signProd != signC) ) goto invalid;

+        goto copyC;

+    }

+    if ( prodIsInfinite ) {

+        uiZ96 = packToF128UI96( signProd, 0x7FFF, 0 );

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA ) {

+        sigA[indexWordHi( 4 )] = fracF128UI96( uiA96 ) | 0x00010000;

+        sigA[indexWord( 4, 2 )] = aWPtr[indexWord( 4, 2 )];

+        sigA[indexWord( 4, 1 )] = aWPtr[indexWord( 4, 1 )];

+        sigA[indexWord( 4, 0 )] = aWPtr[indexWord( 4, 0 )];

+    } else {

+        expA = softfloat_shiftNormSigF128M( aWPtr, 0, sigA );

+        if ( expA == -128 ) goto zeroProd;

+    }

+    if ( expB ) {

+        sigX[indexWordHi( 4 )] = fracF128UI96( uiB96 ) | 0x00010000;

+        sigX[indexWord( 4, 2 )] = bWPtr[indexWord( 4, 2 )];

+        sigX[indexWord( 4, 1 )] = bWPtr[indexWord( 4, 1 )];

+        sigX[indexWord( 4, 0 )] = bWPtr[indexWord( 4, 0 )];

+    } else {

+        expB = softfloat_shiftNormSigF128M( bWPtr, 0, sigX );

+        if ( expB == -128 ) goto zeroProd;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expProd = expA + expB - 0x3FF0;

+    softfloat_mul128MTo256M( sigA, sigX, sigProd );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    wordSig = fracF128UI96( uiC96 );

+    if ( expC ) {

+        --expC;

+        wordSig |= 0x00010000;

+    }

+    sigX[indexWordHi( 5 )] = wordSig;

+    sigX[indexWord( 5, 3 )] = cWPtr[indexWord( 4, 2 )];

+    sigX[indexWord( 5, 2 )] = cWPtr[indexWord( 4, 1 )];

+    sigX[indexWord( 5, 1 )] = cWPtr[indexWord( 4, 0 )];

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    doSub = (signProd != signC);

+    addCarryMRoutinePtr =

+        doSub ? softfloat_addComplCarryM : softfloat_addCarryM;

+    expDiff = expProd - expC;

+    if ( expDiff <= 0 ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signC;

+        expZ = expC;

+        if (

+            sigProd[indexWord( 8, 2 )]

+                || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )])

+        ) {

+            sigProd[indexWord( 8, 3 )] |= 1;

+        }

+        extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )];

+        if ( expDiff ) {

+            softfloat_shiftRightJam160M( extSigPtr, -expDiff, extSigPtr );

+        }

+        carry = 0;

+        if ( doSub ) {

+            wordSig = extSigPtr[indexWordLo( 5 )];

+            extSigPtr[indexWordLo( 5 )] = -wordSig;

+            carry = ! wordSig;

+        }

+        (*addCarryMRoutinePtr)(

+            4,

+            &sigX[indexMultiwordHi( 5, 4 )],

+            extSigPtr + indexMultiwordHi( 5, 4 ),

+            carry,

+            extSigPtr + indexMultiwordHi( 5, 4 )

+        );

+        wordSig = extSigPtr[indexWordHi( 5 )];

+        if ( ! expZ ) {

+            if ( wordSig & 0x80000000 ) {

+                signZ = ! signZ;

+                softfloat_negX160M( extSigPtr );

+                wordSig = extSigPtr[indexWordHi( 5 )];

+            }

+            goto checkCancellation;

+        }

+        if ( wordSig < 0x00010000 ) {

+            --expZ;

+            softfloat_add160M( extSigPtr, extSigPtr, extSigPtr );

+            goto roundPack;

+        }

+        goto extSigReady_noCancellation;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signProd;

+        expZ = expProd;

+        sigX[indexWordLo( 5 )] = 0;

+        expDiff -= 128;

+        if ( 0 <= expDiff ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            if ( expDiff ) softfloat_shiftRightJam160M( sigX, expDiff, sigX );

+            wordSig = sigX[indexWordLo( 5 )];

+            carry = 0;

+            if ( doSub ) {

+                carry = ! wordSig;

+                wordSig = -wordSig;

+            }

+            carry =

+                (*addCarryMRoutinePtr)(

+                    4,

+                    &sigProd[indexMultiwordLo( 8, 4 )],

+                    &sigX[indexMultiwordHi( 5, 4 )],

+                    carry,

+                    &sigProd[indexMultiwordLo( 8, 4 )]

+                );

+            sigProd[indexWord( 8, 2 )] |= wordSig;

+            ptr = &sigProd[indexWord( 8, 4 )];

+        } else {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            shiftDist = expDiff & 31;

+            if ( shiftDist ) {

+                softfloat_shortShiftRight160M( sigX, shiftDist, sigX );

+            }

+            expDiff >>= 5;

+            extSigPtr =

+                &sigProd[indexMultiwordLo( 8, 5 )] - wordIncr

+                    + expDiff * -wordIncr;

+            carry =

+                (*addCarryMRoutinePtr)( 5, extSigPtr, sigX, doSub, extSigPtr );

+            if ( expDiff == -4 ) {

+                /*------------------------------------------------------------

+                *------------------------------------------------------------*/

+                wordSig = sigProd[indexWordHi( 8 )];

+                if ( wordSig & 0x80000000 ) {

+                    signZ = ! signZ;

+                    softfloat_negX256M( sigProd );

+                    wordSig = sigProd[indexWordHi( 8 )];

+                }

+                /*------------------------------------------------------------

+                *------------------------------------------------------------*/

+                if ( wordSig ) goto expProdBigger_noWordShift;

+                wordSig = sigProd[indexWord( 8, 6 )];

+                if ( 0x00040000 <= wordSig ) goto expProdBigger_noWordShift;

+                expZ -= 32;

+                extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )] - wordIncr;

+                for (;;) {

+                    if ( wordSig ) break;

+                    wordSig = extSigPtr[indexWord( 5, 3 )];

+                    if ( 0x00040000 <= wordSig ) break;

+                    expZ -= 32;

+                    extSigPtr -= wordIncr;

+                    if ( extSigPtr == &sigProd[indexMultiwordLo( 8, 5 )] ) {

+                        goto checkCancellation;

+                    }

+                }

+                /*------------------------------------------------------------

+                *------------------------------------------------------------*/

+                ptr = extSigPtr + indexWordLo( 5 );

+                do {

+                    ptr -= wordIncr;

+                    if ( *ptr ) {

+                        extSigPtr[indexWordLo( 5 )] |= 1;

+                        break;

+                    }

+                } while ( ptr != &sigProd[indexWordLo( 8 )] );

+                wordSig = extSigPtr[indexWordHi( 5 )];

+                goto extSigReady;

+            }

+            ptr = extSigPtr + indexWordHi( 5 ) + wordIncr;

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( carry != doSub ) {

+            if ( doSub ) {

+                do {

+                    wordSig = *ptr;

+                    *ptr = wordSig - 1;

+                    ptr += wordIncr;

+                } while ( ! wordSig );

+            } else {

+                do {

+                    wordSig = *ptr + 1;

+                    *ptr = wordSig;

+                    ptr += wordIncr;

+                } while ( ! wordSig );

+            }

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+     expProdBigger_noWordShift:

+        if (

+            sigProd[indexWord( 8, 2 )]

+                || (sigProd[indexWord( 8, 1 )] | sigProd[indexWord( 8, 0 )])

+        ) {

+            sigProd[indexWord( 8, 3 )] |= 1;

+        }

+        extSigPtr = &sigProd[indexMultiwordHi( 8, 5 )];

+        wordSig = extSigPtr[indexWordHi( 5 )];

+    }

+ extSigReady:

+    roundPackRoutinePtr = softfloat_normRoundPackMToF128M;

+    if ( wordSig < 0x00010000 ) goto doRoundPack;

+ extSigReady_noCancellation:

+    if ( 0x00020000 <= wordSig ) {

+        ++expZ;

+        softfloat_shortShiftRightJam160M( extSigPtr, 1, extSigPtr );

+    }

+ roundPack:

+    roundPackRoutinePtr = softfloat_roundPackMToF128M;

+ doRoundPack:

+    (*roundPackRoutinePtr)( signZ, expZ, extSigPtr, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_invalidF128M( zWPtr );

+ propagateNaN_ZC:

+    softfloat_propagateNaNF128M( zWPtr, cWPtr, zWPtr );

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    if (

+        ! (uint32_t) (uiC96<<1) && (signProd != signC)

+            && ! cWPtr[indexWord( 4, 2 )]

+            && ! (cWPtr[indexWord( 4, 1 )] | cWPtr[indexWord( 4, 0 )])

+    ) {

+        goto completeCancellation;

+    }

+ copyC:

+    zWPtr[indexWordHi( 4 )] = uiC96;

+    zWPtr[indexWord( 4, 2 )] = cWPtr[indexWord( 4, 2 )];

+    zWPtr[indexWord( 4, 1 )] = cWPtr[indexWord( 4, 1 )];

+    zWPtr[indexWord( 4, 0 )] = cWPtr[indexWord( 4, 0 )];

+    return;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ checkCancellation:

+    if (

+        wordSig

+            || (extSigPtr[indexWord( 5, 3 )] | extSigPtr[indexWord( 5, 2 )])

+            || (extSigPtr[indexWord( 5, 1 )] | extSigPtr[indexWord( 5, 0 )])

+    ) {

+        goto extSigReady;

+    }

+ completeCancellation:

+    uiZ96 =

+        packToF128UI96(

+            (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+ uiZ:

+    zWPtr[indexWordHi( 4 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mulAddF16.c b/c_emulator/SoftFloat-3e/source/s_mulAddF16.c
new file mode 100644
index 0000000..3a684ac
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mulAddF16.c
@@ -0,0 +1,226 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t

+ softfloat_mulAddF16(

+     uint_fast16_t uiA, uint_fast16_t uiB, uint_fast16_t uiC, uint_fast8_t op )

+{

+    bool signA;

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    bool signB;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    bool signC;

+    int_fast8_t expC;

+    uint_fast16_t sigC;

+    bool signProd;

+    uint_fast16_t magBits, uiZ;

+    struct exp8_sig16 normExpSig;

+    int_fast8_t expProd;

+    uint_fast32_t sigProd;

+    bool signZ;

+    int_fast8_t expZ;

+    uint_fast16_t sigZ;

+    int_fast8_t expDiff;

+    uint_fast32_t sig32Z, sig32C;

+    int_fast8_t shiftDist;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signF16UI( uiA );

+    expA  = expF16UI( uiA );

+    sigA  = fracF16UI( uiA );

+    signB = signF16UI( uiB );

+    expB  = expF16UI( uiB );

+    sigB  = fracF16UI( uiB );

+    signC = signF16UI( uiC ) ^ (op == softfloat_mulAdd_subC);

+    expC  = expF16UI( uiC );

+    sigC  = fracF16UI( uiC );

+    signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x1F ) {

+        if ( sigA || ((expB == 0x1F) && sigB) ) goto propagateNaN_ABC;

+        magBits = expB | sigB;

+        goto infProdArg;

+    }

+    if ( expB == 0x1F ) {

+        if ( sigB ) goto propagateNaN_ABC;

+        magBits = expA | sigA;

+        goto infProdArg;

+    }

+    if ( expC == 0x1F ) {

+        if ( sigC ) {

+            uiZ = 0;

+            goto propagateNaN_ZC;

+        }

+        uiZ = uiC;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF16Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF16Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expProd = expA + expB - 0xE;

+    sigA = (sigA | 0x0400)<<4;

+    sigB = (sigB | 0x0400)<<4;

+    sigProd = (uint_fast32_t) sigA * sigB;

+    if ( sigProd < 0x20000000 ) {

+        --expProd;

+        sigProd <<= 1;

+    }

+    signZ = signProd;

+    if ( ! expC ) {

+        if ( ! sigC ) {

+            expZ = expProd - 1;

+            sigZ = sigProd>>15 | ((sigProd & 0x7FFF) != 0);

+            goto roundPack;

+        }

+        normExpSig = softfloat_normSubnormalF16Sig( sigC );

+        expC = normExpSig.exp;

+        sigC = normExpSig.sig;

+    }

+    sigC = (sigC | 0x0400)<<3;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expProd - expC;

+    if ( signProd == signC ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff <= 0 ) {

+            expZ = expC;

+            sigZ = sigC + softfloat_shiftRightJam32( sigProd, 16 - expDiff );

+        } else {

+            expZ = expProd;

+            sig32Z =

+                sigProd

+                    + softfloat_shiftRightJam32(

+                          (uint_fast32_t) sigC<<16, expDiff );

+            sigZ = sig32Z>>16 | ((sig32Z & 0xFFFF) != 0 );

+        }

+        if ( sigZ < 0x4000 ) {

+            --expZ;

+            sigZ <<= 1;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig32C = (uint_fast32_t) sigC<<16;

+        if ( expDiff < 0 ) {

+            signZ = signC;

+            expZ = expC;

+            sig32Z = sig32C - softfloat_shiftRightJam32( sigProd, -expDiff );

+        } else if ( ! expDiff ) {

+            expZ = expProd;

+            sig32Z = sigProd - sig32C;

+            if ( ! sig32Z ) goto completeCancellation;

+            if ( sig32Z & 0x80000000 ) {

+                signZ = ! signZ;

+                sig32Z = -sig32Z;

+            }

+        } else {

+            expZ = expProd;

+            sig32Z = sigProd - softfloat_shiftRightJam32( sig32C, expDiff );

+        }

+        shiftDist = softfloat_countLeadingZeros32( sig32Z ) - 1;

+        expZ -= shiftDist;

+        shiftDist -= 16;

+        if ( shiftDist < 0 ) {

+            sigZ =

+                sig32Z>>(-shiftDist)

+                    | ((uint32_t) (sig32Z<<(shiftDist & 31)) != 0);

+        } else {

+            sigZ = (uint_fast16_t) sig32Z<<shiftDist;

+        }

+    }

+ roundPack:

+    return softfloat_roundPackToF16( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN_ABC:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto propagateNaN_ZC;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infProdArg:

+    if ( magBits ) {

+        uiZ = packToF16UI( signProd, 0x1F, 0 );

+        if ( expC != 0x1F ) goto uiZ;

+        if ( sigC ) goto propagateNaN_ZC;

+        if ( signProd == signC ) goto uiZ;

+    }

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF16UI;

+ propagateNaN_ZC:

+    uiZ = softfloat_propagateNaNF16UI( uiZ, uiC );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    uiZ = uiC;

+    if ( ! (expC | sigC) && (signProd != signC) ) {

+ completeCancellation:

+        uiZ =

+            packToF16UI(

+                (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mulAddF32.c b/c_emulator/SoftFloat-3e/source/s_mulAddF32.c
new file mode 100644
index 0000000..6cdd9fd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mulAddF32.c
@@ -0,0 +1,224 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t

+ softfloat_mulAddF32(

+     uint_fast32_t uiA, uint_fast32_t uiB, uint_fast32_t uiC, uint_fast8_t op )

+{

+    bool signA;

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    bool signC;

+    int_fast16_t expC;

+    uint_fast32_t sigC;

+    bool signProd;

+    uint_fast32_t magBits, uiZ;

+    struct exp16_sig32 normExpSig;

+    int_fast16_t expProd;

+    uint_fast64_t sigProd;

+    bool signZ;

+    int_fast16_t expZ;

+    uint_fast32_t sigZ;

+    int_fast16_t expDiff;

+    uint_fast64_t sig64Z, sig64C;

+    int_fast8_t shiftDist;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signF32UI( uiA );

+    expA  = expF32UI( uiA );

+    sigA  = fracF32UI( uiA );

+    signB = signF32UI( uiB );

+    expB  = expF32UI( uiB );

+    sigB  = fracF32UI( uiB );

+    signC = signF32UI( uiC ) ^ (op == softfloat_mulAdd_subC);

+    expC  = expF32UI( uiC );

+    sigC  = fracF32UI( uiC );

+    signProd = signA ^ signB ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0xFF ) {

+        if ( sigA || ((expB == 0xFF) && sigB) ) goto propagateNaN_ABC;

+        magBits = expB | sigB;

+        goto infProdArg;

+    }

+    if ( expB == 0xFF ) {

+        if ( sigB ) goto propagateNaN_ABC;

+        magBits = expA | sigA;

+        goto infProdArg;

+    }

+    if ( expC == 0xFF ) {

+        if ( sigC ) {

+            uiZ = 0;

+            goto propagateNaN_ZC;

+        }

+        uiZ = uiC;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF32Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF32Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expProd = expA + expB - 0x7E;

+    sigA = (sigA | 0x00800000)<<7;

+    sigB = (sigB | 0x00800000)<<7;

+    sigProd = (uint_fast64_t) sigA * sigB;

+    if ( sigProd < UINT64_C( 0x2000000000000000 ) ) {

+        --expProd;

+        sigProd <<= 1;

+    }

+    signZ = signProd;

+    if ( ! expC ) {

+        if ( ! sigC ) {

+            expZ = expProd - 1;

+            sigZ = softfloat_shortShiftRightJam64( sigProd, 31 );

+            goto roundPack;

+        }

+        normExpSig = softfloat_normSubnormalF32Sig( sigC );

+        expC = normExpSig.exp;

+        sigC = normExpSig.sig;

+    }

+    sigC = (sigC | 0x00800000)<<6;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expProd - expC;

+    if ( signProd == signC ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff <= 0 ) {

+            expZ = expC;

+            sigZ = sigC + softfloat_shiftRightJam64( sigProd, 32 - expDiff );

+        } else {

+            expZ = expProd;

+            sig64Z =

+                sigProd

+                    + softfloat_shiftRightJam64(

+                          (uint_fast64_t) sigC<<32, expDiff );

+            sigZ = softfloat_shortShiftRightJam64( sig64Z, 32 );

+        }

+        if ( sigZ < 0x40000000 ) {

+            --expZ;

+            sigZ <<= 1;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sig64C = (uint_fast64_t) sigC<<32;

+        if ( expDiff < 0 ) {

+            signZ = signC;

+            expZ = expC;

+            sig64Z = sig64C - softfloat_shiftRightJam64( sigProd, -expDiff );

+        } else if ( ! expDiff ) {

+            expZ = expProd;

+            sig64Z = sigProd - sig64C;

+            if ( ! sig64Z ) goto completeCancellation;

+            if ( sig64Z & UINT64_C( 0x8000000000000000 ) ) {

+                signZ = ! signZ;

+                sig64Z = -sig64Z;

+            }

+        } else {

+            expZ = expProd;

+            sig64Z = sigProd - softfloat_shiftRightJam64( sig64C, expDiff );

+        }

+        shiftDist = softfloat_countLeadingZeros64( sig64Z ) - 1;

+        expZ -= shiftDist;

+        shiftDist -= 32;

+        if ( shiftDist < 0 ) {

+            sigZ = softfloat_shortShiftRightJam64( sig64Z, -shiftDist );

+        } else {

+            sigZ = (uint_fast32_t) sig64Z<<shiftDist;

+        }

+    }

+ roundPack:

+    return softfloat_roundPackToF32( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN_ABC:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+    goto propagateNaN_ZC;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infProdArg:

+    if ( magBits ) {

+        uiZ = packToF32UI( signProd, 0xFF, 0 );

+        if ( expC != 0xFF ) goto uiZ;

+        if ( sigC ) goto propagateNaN_ZC;

+        if ( signProd == signC ) goto uiZ;

+    }

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF32UI;

+ propagateNaN_ZC:

+    uiZ = softfloat_propagateNaNF32UI( uiZ, uiC );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    uiZ = uiC;

+    if ( ! (expC | sigC) && (signProd != signC) ) {

+ completeCancellation:

+        uiZ =

+            packToF32UI(

+                (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_mulAddF64.c b/c_emulator/SoftFloat-3e/source/s_mulAddF64.c
new file mode 100644
index 0000000..b8bb4c4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_mulAddF64.c
@@ -0,0 +1,496 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+float64_t

+ softfloat_mulAddF64(

+     uint_fast64_t uiA, uint_fast64_t uiB, uint_fast64_t uiC, uint_fast8_t op )

+{

+    bool signA;

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    bool signB;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    bool signC;

+    int_fast16_t expC;

+    uint_fast64_t sigC;

+    bool signZ;

+    uint_fast64_t magBits, uiZ;

+    struct exp16_sig64 normExpSig;

+    int_fast16_t expZ;

+    struct uint128 sig128Z;

+    uint_fast64_t sigZ;

+    int_fast16_t expDiff;

+    struct uint128 sig128C;

+    int_fast8_t shiftDist;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    signB = signF64UI( uiB );

+    expB  = expF64UI( uiB );

+    sigB  = fracF64UI( uiB );

+    signC = signF64UI( uiC ) ^ (op == softfloat_mulAdd_subC);

+    expC  = expF64UI( uiC );

+    sigC  = fracF64UI( uiC );

+    signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN_ABC;

+        magBits = expB | sigB;

+        goto infProdArg;

+    }

+    if ( expB == 0x7FF ) {

+        if ( sigB ) goto propagateNaN_ABC;

+        magBits = expA | sigA;

+        goto infProdArg;

+    }

+    if ( expC == 0x7FF ) {

+        if ( sigC ) {

+            uiZ = 0;

+            goto propagateNaN_ZC;

+        }

+        uiZ = uiC;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF64Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FE;

+    sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10;

+    sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<10;

+    sig128Z = softfloat_mul64To128( sigA, sigB );

+    if ( sig128Z.v64 < UINT64_C( 0x2000000000000000 ) ) {

+        --expZ;

+        sig128Z =

+            softfloat_add128(

+                sig128Z.v64, sig128Z.v0, sig128Z.v64, sig128Z.v0 );

+    }

+    if ( ! expC ) {

+        if ( ! sigC ) {

+            --expZ;

+            sigZ = sig128Z.v64<<1 | (sig128Z.v0 != 0);

+            goto roundPack;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( sigC );

+        expC = normExpSig.exp;

+        sigC = normExpSig.sig;

+    }

+    sigC = (sigC | UINT64_C( 0x0010000000000000 ))<<9;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expZ - expC;

+    if ( expDiff < 0 ) {

+        expZ = expC;

+        if ( (signZ == signC) || (expDiff < -1) ) {

+            sig128Z.v64 = softfloat_shiftRightJam64( sig128Z.v64, -expDiff );

+        } else {

+            sig128Z =

+                softfloat_shortShiftRightJam128( sig128Z.v64, sig128Z.v0, 1 );

+        }

+    } else if ( expDiff ) {

+        sig128C = softfloat_shiftRightJam128( sigC, 0, expDiff );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signZ == signC ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff <= 0 ) {

+            sigZ = (sigC + sig128Z.v64) | (sig128Z.v0 != 0);

+        } else {

+            sig128Z =

+                softfloat_add128(

+                    sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0 );

+            sigZ = sig128Z.v64 | (sig128Z.v0 != 0);

+        }

+        if ( sigZ < UINT64_C( 0x4000000000000000 ) ) {

+            --expZ;

+            sigZ <<= 1;

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff < 0 ) {

+            signZ = signC;

+            sig128Z = softfloat_sub128( sigC, 0, sig128Z.v64, sig128Z.v0 );

+        } else if ( ! expDiff ) {

+            sig128Z.v64 = sig128Z.v64 - sigC;

+            if ( ! (sig128Z.v64 | sig128Z.v0) ) goto completeCancellation;

+            if ( sig128Z.v64 & UINT64_C( 0x8000000000000000 ) ) {

+                signZ = ! signZ;

+                sig128Z = softfloat_sub128( 0, 0, sig128Z.v64, sig128Z.v0 );

+            }

+        } else {

+            sig128Z =

+                softfloat_sub128(

+                    sig128Z.v64, sig128Z.v0, sig128C.v64, sig128C.v0 );

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( ! sig128Z.v64 ) {

+            expZ -= 64;

+            sig128Z.v64 = sig128Z.v0;

+            sig128Z.v0 = 0;

+        }

+        shiftDist = softfloat_countLeadingZeros64( sig128Z.v64 ) - 1;

+        expZ -= shiftDist;

+        if ( shiftDist < 0 ) {

+            sigZ = softfloat_shortShiftRightJam64( sig128Z.v64, -shiftDist );

+        } else {

+            sig128Z =

+                softfloat_shortShiftLeft128(

+                    sig128Z.v64, sig128Z.v0, shiftDist );

+            sigZ = sig128Z.v64;

+        }

+        sigZ |= (sig128Z.v0 != 0);

+    }

+ roundPack:

+    return softfloat_roundPackToF64( signZ, expZ, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN_ABC:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+    goto propagateNaN_ZC;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infProdArg:

+    if ( magBits ) {

+        uiZ = packToF64UI( signZ, 0x7FF, 0 );

+        if ( expC != 0x7FF ) goto uiZ;

+        if ( sigC ) goto propagateNaN_ZC;

+        if ( signZ == signC ) goto uiZ;

+    }

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF64UI;

+ propagateNaN_ZC:

+    uiZ = softfloat_propagateNaNF64UI( uiZ, uiC );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    uiZ = uiC;

+    if ( ! (expC | sigC) && (signZ != signC) ) {

+ completeCancellation:

+        uiZ =

+            packToF64UI(

+                (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#else

+

+float64_t

+ softfloat_mulAddF64(

+     uint_fast64_t uiA, uint_fast64_t uiB, uint_fast64_t uiC, uint_fast8_t op )

+{

+    bool signA;

+    int_fast16_t expA;

+    uint64_t sigA;

+    bool signB;

+    int_fast16_t expB;

+    uint64_t sigB;

+    bool signC;

+    int_fast16_t expC;

+    uint64_t sigC;

+    bool signZ;

+    uint64_t magBits, uiZ;

+    struct exp16_sig64 normExpSig;

+    int_fast16_t expZ;

+    uint32_t sig128Z[4];

+    uint64_t sigZ;

+    int_fast16_t shiftDist, expDiff;

+    uint32_t sig128C[4];

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    signA = signF64UI( uiA );

+    expA  = expF64UI( uiA );

+    sigA  = fracF64UI( uiA );

+    signB = signF64UI( uiB );

+    expB  = expF64UI( uiB );

+    sigB  = fracF64UI( uiB );

+    signC = signF64UI( uiC ) ^ (op == softfloat_mulAdd_subC);

+    expC  = expF64UI( uiC );

+    sigC  = fracF64UI( uiC );

+    signZ = signA ^ signB ^ (op == softfloat_mulAdd_subProd);

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( expA == 0x7FF ) {

+        if ( sigA || ((expB == 0x7FF) && sigB) ) goto propagateNaN_ABC;

+        magBits = expB | sigB;

+        goto infProdArg;

+    }

+    if ( expB == 0x7FF ) {

+        if ( sigB ) goto propagateNaN_ABC;

+        magBits = expA | sigA;

+        goto infProdArg;

+    }

+    if ( expC == 0x7FF ) {

+        if ( sigC ) {

+            uiZ = 0;

+            goto propagateNaN_ZC;

+        }

+        uiZ = uiC;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( ! expA ) {

+        if ( ! sigA ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF64Sig( sigA );

+        expA = normExpSig.exp;

+        sigA = normExpSig.sig;

+    }

+    if ( ! expB ) {

+        if ( ! sigB ) goto zeroProd;

+        normExpSig = softfloat_normSubnormalF64Sig( sigB );

+        expB = normExpSig.exp;

+        sigB = normExpSig.sig;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA + expB - 0x3FE;

+    sigA = (sigA | UINT64_C( 0x0010000000000000 ))<<10;

+    sigB = (sigB | UINT64_C( 0x0010000000000000 ))<<11;

+    softfloat_mul64To128M( sigA, sigB, sig128Z );

+    sigZ =

+        (uint64_t) sig128Z[indexWord( 4, 3 )]<<32 | sig128Z[indexWord( 4, 2 )];

+    shiftDist = 0;

+    if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) {

+        --expZ;

+        shiftDist = -1;

+    }

+    if ( ! expC ) {

+        if ( ! sigC ) {

+            if ( shiftDist ) sigZ <<= 1;

+            goto sigZ;

+        }

+        normExpSig = softfloat_normSubnormalF64Sig( sigC );

+        expC = normExpSig.exp;

+        sigC = normExpSig.sig;

+    }

+    sigC = (sigC | UINT64_C( 0x0010000000000000 ))<<10;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expZ - expC;

+    if ( expDiff < 0 ) {

+        expZ = expC;

+        if ( (signZ == signC) || (expDiff < -1) ) {

+            shiftDist -= expDiff;

+            if ( shiftDist) {

+                sigZ = softfloat_shiftRightJam64( sigZ, shiftDist );

+            }

+        } else {

+            if ( ! shiftDist ) {

+                softfloat_shortShiftRight128M( sig128Z, 1, sig128Z );

+            }

+        }

+    } else {

+        if ( shiftDist ) softfloat_add128M( sig128Z, sig128Z, sig128Z );

+        if ( ! expDiff ) {

+            sigZ =

+                (uint64_t) sig128Z[indexWord( 4, 3 )]<<32

+                    | sig128Z[indexWord( 4, 2 )];

+        } else {

+            sig128C[indexWord( 4, 3 )] = sigC>>32;

+            sig128C[indexWord( 4, 2 )] = sigC;

+            sig128C[indexWord( 4, 1 )] = 0;

+            sig128C[indexWord( 4, 0 )] = 0;

+            softfloat_shiftRightJam128M( sig128C, expDiff, sig128C );

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( signZ == signC ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff <= 0 ) {

+            sigZ += sigC;

+        } else {

+            softfloat_add128M( sig128Z, sig128C, sig128Z );

+            sigZ =

+                (uint64_t) sig128Z[indexWord( 4, 3 )]<<32

+                    | sig128Z[indexWord( 4, 2 )];

+        }

+        if ( sigZ & UINT64_C( 0x8000000000000000 ) ) {

+            ++expZ;

+            sigZ = softfloat_shortShiftRightJam64( sigZ, 1 );

+        }

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expDiff < 0 ) {

+            signZ = signC;

+            if ( expDiff < -1 ) {

+                sigZ = sigC - sigZ;

+                if (

+                    sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )]

+                ) {

+                    sigZ = (sigZ - 1) | 1;

+                }

+                if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) {

+                    --expZ;

+                    sigZ <<= 1;

+                }

+                goto roundPack;

+            } else {

+                sig128C[indexWord( 4, 3 )] = sigC>>32;

+                sig128C[indexWord( 4, 2 )] = sigC;

+                sig128C[indexWord( 4, 1 )] = 0;

+                sig128C[indexWord( 4, 0 )] = 0;

+                softfloat_sub128M( sig128C, sig128Z, sig128Z );

+            }

+        } else if ( ! expDiff ) {

+            sigZ -= sigC;

+            if (

+                ! sigZ && ! sig128Z[indexWord( 4, 1 )]

+                    && ! sig128Z[indexWord( 4, 0 )]

+            ) {

+                goto completeCancellation;

+            }

+            sig128Z[indexWord( 4, 3 )] = sigZ>>32;

+            sig128Z[indexWord( 4, 2 )] = sigZ;

+            if ( sigZ & UINT64_C( 0x8000000000000000 ) ) {

+                signZ = ! signZ;

+                softfloat_negX128M( sig128Z );

+            }

+        } else {

+            softfloat_sub128M( sig128Z, sig128C, sig128Z );

+            if ( 1 < expDiff ) {

+                sigZ =

+                    (uint64_t) sig128Z[indexWord( 4, 3 )]<<32

+                        | sig128Z[indexWord( 4, 2 )];

+                if ( ! (sigZ & UINT64_C( 0x4000000000000000 )) ) {

+                    --expZ;

+                    sigZ <<= 1;

+                }

+                goto sigZ;

+            }

+        }

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        shiftDist = 0;

+        sigZ =

+            (uint64_t) sig128Z[indexWord( 4, 3 )]<<32

+                | sig128Z[indexWord( 4, 2 )];

+        if ( ! sigZ ) {

+            shiftDist = 64;

+            sigZ =

+                (uint64_t) sig128Z[indexWord( 4, 1 )]<<32

+                    | sig128Z[indexWord( 4, 0 )];

+        }

+        shiftDist += softfloat_countLeadingZeros64( sigZ ) - 1;

+        if ( shiftDist ) {

+            expZ -= shiftDist;

+            softfloat_shiftLeft128M( sig128Z, shiftDist, sig128Z );

+            sigZ =

+                (uint64_t) sig128Z[indexWord( 4, 3 )]<<32

+                    | sig128Z[indexWord( 4, 2 )];

+        }

+    }

+ sigZ:

+    if ( sig128Z[indexWord( 4, 1 )] || sig128Z[indexWord( 4, 0 )] ) sigZ |= 1;

+ roundPack:

+    return softfloat_roundPackToF64( signZ, expZ - 1, sigZ );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN_ABC:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+    goto propagateNaN_ZC;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ infProdArg:

+    if ( magBits ) {

+        uiZ = packToF64UI( signZ, 0x7FF, 0 );

+        if ( expC != 0x7FF ) goto uiZ;

+        if ( sigC ) goto propagateNaN_ZC;

+        if ( signZ == signC ) goto uiZ;

+    }

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    uiZ = defaultNaNF64UI;

+ propagateNaN_ZC:

+    uiZ = softfloat_propagateNaNF64UI( uiZ, uiC );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ zeroProd:

+    uiZ = uiC;

+    if ( ! (expC | sigC) && (signZ != signC) ) {

+ completeCancellation:

+        uiZ =

+            packToF64UI(

+                (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+    }

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_negXM.c b/c_emulator/SoftFloat-3e/source/s_negXM.c
new file mode 100644
index 0000000..ec8c928
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_negXM.c
@@ -0,0 +1,63 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_negXM

+

+void softfloat_negXM( uint_fast8_t size_words, uint32_t *zPtr )

+{

+    unsigned int index, lastIndex;

+    uint_fast8_t carry;

+    uint32_t word;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    carry = 1;

+    for (;;) {

+        word = ~zPtr[index] + carry;

+        zPtr[index] = word;

+        if ( index == lastIndex ) break;

+        index += wordIncr;

+        if ( word ) carry = 0;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normExtF80SigM.c b/c_emulator/SoftFloat-3e/source/s_normExtF80SigM.c
new file mode 100644
index 0000000..acc54dc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normExtF80SigM.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+int softfloat_normExtF80SigM( uint64_t *sigPtr )

+{

+    uint64_t sig;

+    int_fast8_t shiftDist;

+

+    sig = *sigPtr;

+    shiftDist = softfloat_countLeadingZeros64( sig );

+    *sigPtr = sig<<shiftDist;

+    return -shiftDist;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackMToExtF80M.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackMToExtF80M.c
new file mode 100644
index 0000000..88b69cd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackMToExtF80M.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+void

+ softfloat_normRoundPackMToExtF80M(

+     bool sign,

+     int32_t exp,

+     uint32_t *extSigPtr,

+     uint_fast8_t roundingPrecision,

+     struct extFloat80M *zSPtr

+ )

+{

+    int_fast16_t shiftDist;

+    uint32_t wordSig;

+

+    shiftDist = 0;

+    wordSig = extSigPtr[indexWord( 3, 2 )];

+    if ( ! wordSig ) {

+        shiftDist = 32;

+        wordSig = extSigPtr[indexWord( 3, 1 )];

+        if ( ! wordSig ) {

+            shiftDist = 64;

+            wordSig = extSigPtr[indexWord( 3, 0 )];

+            if ( ! wordSig ) {

+                zSPtr->signExp = packToExtF80UI64( sign, 0 );

+                zSPtr->signif = 0;

+                return;

+            }

+        }

+    }

+    shiftDist += softfloat_countLeadingZeros32( wordSig );

+    if ( shiftDist ) {

+        exp -= shiftDist;

+        softfloat_shiftLeft96M( extSigPtr, shiftDist, extSigPtr );

+    }

+    softfloat_roundPackMToExtF80M(

+        sign, exp, extSigPtr, roundingPrecision, zSPtr );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackMToF128M.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackMToF128M.c
new file mode 100644
index 0000000..3094559
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackMToF128M.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+void

+ softfloat_normRoundPackMToF128M(

+     bool sign, int32_t exp, uint32_t *extSigPtr, uint32_t *zWPtr )

+{

+    const uint32_t *ptr;

+    int_fast16_t shiftDist;

+    uint32_t wordSig;

+

+    ptr = extSigPtr + indexWordHi( 5 );

+    shiftDist = 0;

+    for (;;) {

+        wordSig = *ptr;

+        if ( wordSig ) break;

+        shiftDist += 32;

+        if ( 160 <= shiftDist ) {

+            zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, 0, 0 );

+            zWPtr[indexWord( 4, 2 )] = 0;

+            zWPtr[indexWord( 4, 1 )] = 0;

+            zWPtr[indexWord( 4, 0 )] = 0;

+            return;

+        }

+        ptr -= wordIncr;

+    }

+    shiftDist += softfloat_countLeadingZeros32( wordSig ) - 15;

+    if ( shiftDist ) {

+        exp -= shiftDist;

+        softfloat_shiftLeft160M( extSigPtr, shiftDist, extSigPtr );

+    }

+    softfloat_roundPackMToF128M( sign, exp, extSigPtr, zWPtr );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackToExtF80.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackToExtF80.c
new file mode 100644
index 0000000..76e791d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackToExtF80.c
@@ -0,0 +1,71 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+extFloat80_t

+ softfloat_normRoundPackToExtF80(

+     bool sign,

+     int_fast32_t exp,

+     uint_fast64_t sig,

+     uint_fast64_t sigExtra,

+     uint_fast8_t roundingPrecision

+ )

+{

+    int_fast8_t shiftDist;

+    struct uint128 sig128;

+

+    if ( ! sig ) {

+        exp -= 64;

+        sig = sigExtra;

+        sigExtra = 0;

+    }

+    shiftDist = softfloat_countLeadingZeros64( sig );

+    exp -= shiftDist;

+    if ( shiftDist ) {

+        sig128 = softfloat_shortShiftLeft128( sig, sigExtra, shiftDist );

+        sig = sig128.v64;

+        sigExtra = sig128.v0;

+    }

+    return

+        softfloat_roundPackToExtF80(

+            sign, exp, sig, sigExtra, roundingPrecision );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackToF128.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF128.c
new file mode 100644
index 0000000..67f5b43
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF128.c
@@ -0,0 +1,81 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+float128_t

+ softfloat_normRoundPackToF128(

+     bool sign, int_fast32_t exp, uint_fast64_t sig64, uint_fast64_t sig0 )

+{

+    int_fast8_t shiftDist;

+    struct uint128 sig128;

+    union ui128_f128 uZ;

+    uint_fast64_t sigExtra;

+    struct uint128_extra sig128Extra;

+

+    if ( ! sig64 ) {

+        exp -= 64;

+        sig64 = sig0;

+        sig0 = 0;

+    }

+    shiftDist = softfloat_countLeadingZeros64( sig64 ) - 15;

+    exp -= shiftDist;

+    if ( 0 <= shiftDist ) {

+        if ( shiftDist ) {

+            sig128 = softfloat_shortShiftLeft128( sig64, sig0, shiftDist );

+            sig64 = sig128.v64;

+            sig0  = sig128.v0;

+        }

+        if ( (uint32_t) exp < 0x7FFD ) {

+            uZ.ui.v64 = packToF128UI64( sign, sig64 | sig0 ? exp : 0, sig64 );

+            uZ.ui.v0  = sig0;

+            return uZ.f;

+        }

+        sigExtra = 0;

+    } else {

+        sig128Extra =

+            softfloat_shortShiftRightJam128Extra( sig64, sig0, 0, -shiftDist );

+        sig64 = sig128Extra.v.v64;

+        sig0  = sig128Extra.v.v0;

+        sigExtra = sig128Extra.extra;

+    }

+    return softfloat_roundPackToF128( sign, exp, sig64, sig0, sigExtra );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackToF16.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF16.c
new file mode 100644
index 0000000..1d184d5
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF16.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+float16_t

+ softfloat_normRoundPackToF16( bool sign, int_fast16_t exp, uint_fast16_t sig )

+{

+    int_fast8_t shiftDist;

+    union ui16_f16 uZ;

+

+    shiftDist = softfloat_countLeadingZeros16( sig ) - 1;

+    exp -= shiftDist;

+    if ( (4 <= shiftDist) && ((unsigned int) exp < 0x1D) ) {

+        uZ.ui = packToF16UI( sign, sig ? exp : 0, sig<<(shiftDist - 4) );

+        return uZ.f;

+    } else {

+        return softfloat_roundPackToF16( sign, exp, sig<<shiftDist );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackToF32.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF32.c
new file mode 100644
index 0000000..9fae916
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF32.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+float32_t

+ softfloat_normRoundPackToF32( bool sign, int_fast16_t exp, uint_fast32_t sig )

+{

+    int_fast8_t shiftDist;

+    union ui32_f32 uZ;

+

+    shiftDist = softfloat_countLeadingZeros32( sig ) - 1;

+    exp -= shiftDist;

+    if ( (7 <= shiftDist) && ((unsigned int) exp < 0xFD) ) {

+        uZ.ui = packToF32UI( sign, sig ? exp : 0, sig<<(shiftDist - 7) );

+        return uZ.f;

+    } else {

+        return softfloat_roundPackToF32( sign, exp, sig<<shiftDist );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normRoundPackToF64.c b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF64.c
new file mode 100644
index 0000000..109141f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normRoundPackToF64.c
@@ -0,0 +1,58 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+float64_t

+ softfloat_normRoundPackToF64( bool sign, int_fast16_t exp, uint_fast64_t sig )

+{

+    int_fast8_t shiftDist;

+    union ui64_f64 uZ;

+

+    shiftDist = softfloat_countLeadingZeros64( sig ) - 1;

+    exp -= shiftDist;

+    if ( (10 <= shiftDist) && ((unsigned int) exp < 0x7FD) ) {

+        uZ.ui = packToF64UI( sign, sig ? exp : 0, sig<<(shiftDist - 10) );

+        return uZ.f;

+    } else {

+        return softfloat_roundPackToF64( sign, exp, sig<<shiftDist );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalExtF80Sig.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalExtF80Sig.c
new file mode 100644
index 0000000..c1d7788
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalExtF80Sig.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t sig )

+{

+    int_fast8_t shiftDist;

+    struct exp32_sig64 z;

+

+    shiftDist = softfloat_countLeadingZeros64( sig );

+    z.exp = -shiftDist;

+    z.sig = sig<<shiftDist;

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalF128Sig.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalF128Sig.c
new file mode 100644
index 0000000..597d558
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalF128Sig.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+struct exp32_sig128

+ softfloat_normSubnormalF128Sig( uint_fast64_t sig64, uint_fast64_t sig0 )

+{

+    int_fast8_t shiftDist;

+    struct exp32_sig128 z;

+

+    if ( ! sig64 ) {

+        shiftDist = softfloat_countLeadingZeros64( sig0 ) - 15;

+        z.exp = -63 - shiftDist;

+        if ( shiftDist < 0 ) {

+            z.sig.v64 = sig0>>-shiftDist;

+            z.sig.v0  = sig0<<(shiftDist & 63);

+        } else {

+            z.sig.v64 = sig0<<shiftDist;

+            z.sig.v0  = 0;

+        }

+    } else {

+        shiftDist = softfloat_countLeadingZeros64( sig64 ) - 15;

+        z.exp = 1 - shiftDist;

+        z.sig = softfloat_shortShiftLeft128( sig64, sig0, shiftDist );

+    }

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalF128SigM.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalF128SigM.c
new file mode 100644
index 0000000..7b8ced1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalF128SigM.c
@@ -0,0 +1,61 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+int softfloat_normSubnormalF128SigM( uint32_t *sigPtr )

+{

+    const uint32_t *ptr;

+    int_fast16_t shiftDist;

+    uint32_t wordSig;

+

+    ptr = sigPtr + indexWordHi( 4 );

+    shiftDist = 0;

+    for (;;) {

+        wordSig = *ptr;

+        if ( wordSig ) break;

+        shiftDist += 32;

+        if ( 128 <= shiftDist ) return 1;

+        ptr -= wordIncr;

+    }

+    shiftDist += softfloat_countLeadingZeros32( wordSig ) - 15;

+    if ( shiftDist ) softfloat_shiftLeft128M( sigPtr, shiftDist, sigPtr );

+    return 1 - shiftDist;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalF16Sig.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalF16Sig.c
new file mode 100644
index 0000000..bb92adf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalF16Sig.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t sig )

+{

+    int_fast8_t shiftDist;

+    struct exp8_sig16 z;

+

+    shiftDist = softfloat_countLeadingZeros16( sig ) - 5;

+    z.exp = 1 - shiftDist;

+    z.sig = sig<<shiftDist;

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalF32Sig.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalF32Sig.c
new file mode 100644
index 0000000..d4bff9b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalF32Sig.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t sig )

+{

+    int_fast8_t shiftDist;

+    struct exp16_sig32 z;

+

+    shiftDist = softfloat_countLeadingZeros32( sig ) - 8;

+    z.exp = 1 - shiftDist;

+    z.sig = sig<<shiftDist;

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_normSubnormalF64Sig.c b/c_emulator/SoftFloat-3e/source/s_normSubnormalF64Sig.c
new file mode 100644
index 0000000..0c63b97
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_normSubnormalF64Sig.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t sig )

+{

+    int_fast8_t shiftDist;

+    struct exp16_sig64 z;

+

+    shiftDist = softfloat_countLeadingZeros64( sig ) - 11;

+    z.exp = 1 - shiftDist;

+    z.sig = sig<<shiftDist;

+    return z;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_remStepMBy32.c b/c_emulator/SoftFloat-3e/source/s_remStepMBy32.c
new file mode 100644
index 0000000..dd7d78d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_remStepMBy32.c
@@ -0,0 +1,86 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_remStepMBy32

+

+void

+ softfloat_remStepMBy32(

+     uint_fast8_t size_words,

+     const uint32_t *remPtr,

+     uint_fast8_t dist,

+     const uint32_t *bPtr,

+     uint32_t q,

+     uint32_t *zPtr

+ )

+{

+    unsigned int index, lastIndex;

+    uint64_t dwordProd;

+    uint32_t wordRem, wordShiftedRem, wordProd;

+    uint_fast8_t uNegDist, borrow;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    dwordProd = (uint64_t) bPtr[index] * q;

+    wordRem = remPtr[index];

+    wordShiftedRem = wordRem<<dist;

+    wordProd = dwordProd;

+    zPtr[index] = wordShiftedRem - wordProd;

+    if ( index != lastIndex ) {

+        uNegDist = -dist;

+        borrow = (wordShiftedRem < wordProd);

+        for (;;) {

+            wordShiftedRem = wordRem>>(uNegDist & 31);

+            index += wordIncr;

+            dwordProd = (uint64_t) bPtr[index] * q + (dwordProd>>32);

+            wordRem = remPtr[index];

+            wordShiftedRem |= wordRem<<dist;

+            wordProd = dwordProd;

+            zPtr[index] = wordShiftedRem - wordProd - borrow;

+            if ( index == lastIndex ) break;

+            borrow =

+                borrow ? (wordShiftedRem <= wordProd)

+                    : (wordShiftedRem < wordProd);

+        }

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundMToI64.c b/c_emulator/SoftFloat-3e/source/s_roundMToI64.c
new file mode 100644
index 0000000..66f43b2
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundMToI64.c
@@ -0,0 +1,102 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t

+ softfloat_roundMToI64(

+     bool sign, uint32_t *extSigPtr, uint_fast8_t roundingMode, bool exact )

+{

+    uint64_t sig;

+    uint32_t sigExtra;

+    union { uint64_t ui; int64_t i; } uZ;

+    int64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig =

+        (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32

+            | extSigPtr[indexWord( 3, 1 )];

+    sigExtra = extSigPtr[indexWordLo( 3 )];

+    if (

+        (roundingMode == softfloat_round_near_maxMag)

+            || (roundingMode == softfloat_round_near_even)

+    ) {

+        if ( 0x80000000 <= sigExtra ) goto increment;

+    } else {

+        if (

+            sigExtra

+                && (sign

+                        ? (roundingMode == softfloat_round_min)

+#ifdef SOFTFLOAT_ROUND_ODD

+                              || (roundingMode == softfloat_round_odd)

+#endif

+                        : (roundingMode == softfloat_round_max))

+        ) {

+ increment:

+            ++sig;

+            if ( !sig ) goto invalid;

+            if (

+                (sigExtra == 0x80000000)

+                    && (roundingMode == softfloat_round_near_even)

+            ) {

+                sig &= ~(uint_fast64_t) 1;

+            }

+        }

+    }

+    uZ.ui = sign ? -sig : sig;

+    z = uZ.i;

+    if ( z && ((z < 0) ^ sign) ) goto invalid;

+    if ( sigExtra ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) z |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundMToUI64.c b/c_emulator/SoftFloat-3e/source/s_roundMToUI64.c
new file mode 100644
index 0000000..196f537
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundMToUI64.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t

+ softfloat_roundMToUI64(

+     bool sign, uint32_t *extSigPtr, uint_fast8_t roundingMode, bool exact )

+{

+    uint64_t sig;

+    uint32_t sigExtra;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig =

+        (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32

+            | extSigPtr[indexWord( 3, 1 )];

+    sigExtra = extSigPtr[indexWordLo( 3 )];

+    if (

+        (roundingMode == softfloat_round_near_maxMag)

+            || (roundingMode == softfloat_round_near_even)

+    ) {

+        if ( 0x80000000 <= sigExtra ) goto increment;

+    } else {

+        if ( sign ) {

+            if ( !(sig | sigExtra) ) return 0;

+            if ( roundingMode == softfloat_round_min ) goto invalid;

+#ifdef SOFTFLOAT_ROUND_ODD

+            if ( roundingMode == softfloat_round_odd ) goto invalid;

+#endif

+        } else {

+            if ( (roundingMode == softfloat_round_max) && sigExtra ) {

+ increment:

+                ++sig;

+                if ( !sig ) goto invalid;

+                if (

+                    (sigExtra == 0x80000000)

+                        && (roundingMode == softfloat_round_near_even)

+                ) {

+                    sig &= ~(uint_fast64_t) 1;

+                }

+            }

+        }

+    }

+    if ( sign && sig ) goto invalid;

+    if ( sigExtra ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) sig |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sig;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackMToExtF80M.c b/c_emulator/SoftFloat-3e/source/s_roundPackMToExtF80M.c
new file mode 100644
index 0000000..0862015
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackMToExtF80M.c
@@ -0,0 +1,256 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+void

+ softfloat_roundPackMToExtF80M(

+     bool sign,

+     int32_t exp,

+     uint32_t *extSigPtr,

+     uint_fast8_t roundingPrecision,

+     struct extFloat80M *zSPtr

+ )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint64_t sig, roundIncrement, roundMask, roundBits;

+    bool isTiny;

+    uint32_t sigExtra;

+    bool doIncrement;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    sig =

+        (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32

+            | extSigPtr[indexWord( 3, 1 )];

+    if ( roundingPrecision == 80 ) goto precision80;

+    if ( roundingPrecision == 64 ) {

+        roundIncrement = UINT64_C( 0x0000000000000400 );

+        roundMask = UINT64_C( 0x00000000000007FF );

+    } else if ( roundingPrecision == 32 ) {

+        roundIncrement = UINT64_C( 0x0000008000000000 );

+        roundMask = UINT64_C( 0x000000FFFFFFFFFF );

+    } else {

+        goto precision80;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( extSigPtr[indexWordLo( 3 )] ) sig |= 1;

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        roundIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                ? roundMask

+                : 0;

+    }

+    roundBits = sig & roundMask;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) (exp - 1) ) {

+        if ( exp <= 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < 0)

+                || (sig <= (uint64_t) (sig + roundIncrement));

+            sig = softfloat_shiftRightJam64( sig, 1 - exp );

+            roundBits = sig & roundMask;

+            if ( roundBits ) {

+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+                if ( roundingMode == softfloat_round_odd ) {

+                    sig |= roundMask + 1;

+                }

+#endif

+            }

+            sig += roundIncrement;

+            exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0);

+            roundIncrement = roundMask + 1;

+            if ( roundNearEven && (roundBits<<1 == roundIncrement) ) {

+                roundMask |= roundIncrement;

+            }

+            sig &= ~roundMask;

+            goto packReturn;

+        }

+        if (

+               (0x7FFE < exp)

+            || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig))

+        ) {

+            goto overflow;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( roundBits ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig = (sig & ~roundMask) | (roundMask + 1);

+            goto packReturn;

+        }

+#endif

+    }

+    sig += roundIncrement;

+    if ( sig < roundIncrement ) {

+        ++exp;

+        sig = UINT64_C( 0x8000000000000000 );

+    }

+    roundIncrement = roundMask + 1;

+    if ( roundNearEven && (roundBits<<1 == roundIncrement) ) {

+        roundMask |= roundIncrement;

+    }

+    sig &= ~roundMask;

+    goto packReturn;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ precision80:

+    sigExtra = extSigPtr[indexWordLo( 3 )];

+    doIncrement = (0x80000000 <= sigExtra);

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        doIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                && sigExtra;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) (exp - 1) ) {

+        if ( exp <= 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < 0)

+                || ! doIncrement

+                || (sig < UINT64_C( 0xFFFFFFFFFFFFFFFF ));

+            softfloat_shiftRightJam96M( extSigPtr, 1 - exp, extSigPtr );

+            exp = 0;

+            sig =

+                (uint64_t) extSigPtr[indexWord( 3, 2 )]<<32

+                    | extSigPtr[indexWord( 3, 1 )];

+            sigExtra = extSigPtr[indexWordLo( 3 )];

+            if ( sigExtra ) {

+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+                if ( roundingMode == softfloat_round_odd ) {

+                    sig |= 1;

+                    goto packReturn;

+                }

+#endif

+            }

+            doIncrement = (0x80000000 <= sigExtra);

+            if (

+                ! roundNearEven

+                    && (roundingMode != softfloat_round_near_maxMag)

+            ) {

+                doIncrement =

+                    (roundingMode

+                         == (sign ? softfloat_round_min : softfloat_round_max))

+                        && sigExtra;

+            }

+            if ( doIncrement ) {

+                ++sig;

+                sig &= ~(uint64_t) (! (sigExtra & 0x7FFFFFFF) & roundNearEven);

+                exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0);

+            }

+            goto packReturn;

+        }

+        if (

+               (0x7FFE < exp)

+            || ((exp == 0x7FFE) && (sig == UINT64_C( 0xFFFFFFFFFFFFFFFF ))

+                    && doIncrement)

+        ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            roundMask = 0;

+ overflow:

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            if (

+                   roundNearEven

+                || (roundingMode == softfloat_round_near_maxMag)

+                || (roundingMode

+                        == (sign ? softfloat_round_min : softfloat_round_max))

+            ) {

+                exp = 0x7FFF;

+                sig = UINT64_C( 0x8000000000000000 );

+            } else {

+                exp = 0x7FFE;

+                sig = ~roundMask;

+            }

+            goto packReturn;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( sigExtra ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    if ( doIncrement ) {

+        ++sig;

+        if ( ! sig ) {

+            ++exp;

+            sig = UINT64_C( 0x8000000000000000 );

+        } else {

+            sig &= ~(uint64_t) (! (sigExtra & 0x7FFFFFFF) & roundNearEven);

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    zSPtr->signExp = packToExtF80UI64( sign, exp );

+    zSPtr->signif = sig;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackMToF128M.c b/c_emulator/SoftFloat-3e/source/s_roundPackMToF128M.c
new file mode 100644
index 0000000..22591b8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackMToF128M.c
@@ -0,0 +1,178 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+void

+ softfloat_roundPackMToF128M(

+     bool sign, int32_t exp, uint32_t *extSigPtr, uint32_t *zWPtr )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint32_t sigExtra;

+    bool doIncrement, isTiny;

+    static const uint32_t maxSig[4] =

+        INIT_UINTM4( 0x0001FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF );

+    uint32_t ui, uj;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    sigExtra = extSigPtr[indexWordLo( 5 )];

+    doIncrement = (0x80000000 <= sigExtra);

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        doIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                && sigExtra;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) exp ) {

+        if ( exp < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < -1)

+                || ! doIncrement

+                || (softfloat_compare128M(

+                        extSigPtr + indexMultiwordHi( 5, 4 ), maxSig )

+                        < 0);

+            softfloat_shiftRightJam160M( extSigPtr, -exp, extSigPtr );

+            exp = 0;

+            sigExtra = extSigPtr[indexWordLo( 5 )];

+            if ( isTiny && sigExtra ) {

+                softfloat_raiseFlags( softfloat_flag_underflow );

+            }

+            doIncrement = (0x80000000 <= sigExtra);

+            if (

+                   ! roundNearEven

+                && (roundingMode != softfloat_round_near_maxMag)

+            ) {

+                doIncrement =

+                    (roundingMode

+                         == (sign ? softfloat_round_min : softfloat_round_max))

+                        && sigExtra;

+            }

+        } else if (

+               (0x7FFD < exp)

+            || ((exp == 0x7FFD) && doIncrement

+                    && (softfloat_compare128M(

+                            extSigPtr + indexMultiwordHi( 5, 4 ), maxSig )

+                            == 0))

+        ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            if (

+                   roundNearEven

+                || (roundingMode == softfloat_round_near_maxMag)

+                || (roundingMode

+                        == (sign ? softfloat_round_min : softfloat_round_max))

+            ) {

+                ui = packToF128UI96( sign, 0x7FFF, 0 );

+                uj = 0;

+            } else {

+                ui = packToF128UI96( sign, 0x7FFE, 0x0000FFFF );

+                uj = 0xFFFFFFFF;

+            }

+            zWPtr[indexWordHi( 4 )] = ui;

+            zWPtr[indexWord( 4, 2 )] = uj;

+            zWPtr[indexWord( 4, 1 )] = uj;

+            zWPtr[indexWord( 4, 0 )] = uj;

+            return;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    uj = extSigPtr[indexWord( 5, 1 )];

+    if ( sigExtra ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            uj |= 1;

+            goto noIncrementPackReturn;

+        }

+#endif

+    }

+    if ( doIncrement ) {

+        ++uj;

+        if ( uj ) {

+            if ( ! (sigExtra & 0x7FFFFFFF) && roundNearEven ) uj &= ~1;

+            zWPtr[indexWord( 4, 2 )] = extSigPtr[indexWord( 5, 3 )];

+            zWPtr[indexWord( 4, 1 )] = extSigPtr[indexWord( 5, 2 )];

+            zWPtr[indexWord( 4, 0 )] = uj;

+            ui = extSigPtr[indexWordHi( 5 )];

+        } else {

+            zWPtr[indexWord( 4, 0 )] = uj;

+            ui = extSigPtr[indexWord( 5, 2 )] + 1;

+            zWPtr[indexWord( 4, 1 )] = ui;

+            uj = extSigPtr[indexWord( 5, 3 )];

+            if ( ui ) {

+                zWPtr[indexWord( 4, 2 )] = uj;

+                ui = extSigPtr[indexWordHi( 5 )];

+            } else {

+                ++uj;

+                zWPtr[indexWord( 4, 2 )] = uj;

+                ui = extSigPtr[indexWordHi( 5 )];

+                if ( ! uj ) ++ui;

+            }

+        }

+    } else {

+ noIncrementPackReturn:

+        zWPtr[indexWord( 4, 0 )] = uj;

+        ui = extSigPtr[indexWord( 5, 2 )];

+        zWPtr[indexWord( 4, 1 )] = ui;

+        uj |= ui;

+        ui = extSigPtr[indexWord( 5, 3 )];

+        zWPtr[indexWord( 4, 2 )] = ui;

+        uj |= ui;

+        ui = extSigPtr[indexWordHi( 5 )];

+        uj |= ui;

+        if ( ! uj ) exp = 0;

+    }

+    zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp, ui );

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackToExtF80.c b/c_emulator/SoftFloat-3e/source/s_roundPackToExtF80.c
new file mode 100644
index 0000000..0cc7af9
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackToExtF80.c
@@ -0,0 +1,256 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t

+ softfloat_roundPackToExtF80(

+     bool sign,

+     int_fast32_t exp,

+     uint_fast64_t sig,

+     uint_fast64_t sigExtra,

+     uint_fast8_t roundingPrecision

+ )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint_fast64_t roundIncrement, roundMask, roundBits;

+    bool isTiny, doIncrement;

+    struct uint64_extra sig64Extra;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    if ( roundingPrecision == 80 ) goto precision80;

+    if ( roundingPrecision == 64 ) {

+        roundIncrement = UINT64_C( 0x0000000000000400 );

+        roundMask = UINT64_C( 0x00000000000007FF );

+    } else if ( roundingPrecision == 32 ) {

+        roundIncrement = UINT64_C( 0x0000008000000000 );

+        roundMask = UINT64_C( 0x000000FFFFFFFFFF );

+    } else {

+        goto precision80;

+    }

+    sig |= (sigExtra != 0);

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        roundIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                ? roundMask

+                : 0;

+    }

+    roundBits = sig & roundMask;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) (exp - 1) ) {

+        if ( exp <= 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < 0)

+                || (sig <= (uint64_t) (sig + roundIncrement));

+            sig = softfloat_shiftRightJam64( sig, 1 - exp );

+            roundBits = sig & roundMask;

+            if ( roundBits ) {

+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+                if ( roundingMode == softfloat_round_odd ) {

+                    sig |= roundMask + 1;

+                }

+#endif

+            }

+            sig += roundIncrement;

+            exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0);

+            roundIncrement = roundMask + 1;

+            if ( roundNearEven && (roundBits<<1 == roundIncrement) ) {

+                roundMask |= roundIncrement;

+            }

+            sig &= ~roundMask;

+            goto packReturn;

+        }

+        if (

+               (0x7FFE < exp)

+            || ((exp == 0x7FFE) && ((uint64_t) (sig + roundIncrement) < sig))

+        ) {

+            goto overflow;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( roundBits ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig = (sig & ~roundMask) | (roundMask + 1);

+            goto packReturn;

+        }

+#endif

+    }

+    sig = (uint64_t) (sig + roundIncrement);

+    if ( sig < roundIncrement ) {

+        ++exp;

+        sig = UINT64_C( 0x8000000000000000 );

+    }

+    roundIncrement = roundMask + 1;

+    if ( roundNearEven && (roundBits<<1 == roundIncrement) ) {

+        roundMask |= roundIncrement;

+    }

+    sig &= ~roundMask;

+    goto packReturn;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ precision80:

+    doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        doIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                && sigExtra;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) (exp - 1) ) {

+        if ( exp <= 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < 0)

+                || ! doIncrement

+                || (sig < UINT64_C( 0xFFFFFFFFFFFFFFFF ));

+            sig64Extra =

+                softfloat_shiftRightJam64Extra( sig, sigExtra, 1 - exp );

+            exp = 0;

+            sig = sig64Extra.v;

+            sigExtra = sig64Extra.extra;

+            if ( sigExtra ) {

+                if ( isTiny ) softfloat_raiseFlags( softfloat_flag_underflow );

+                softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+                if ( roundingMode == softfloat_round_odd ) {

+                    sig |= 1;

+                    goto packReturn;

+                }

+#endif

+            }

+            doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);

+            if (

+                ! roundNearEven

+                    && (roundingMode != softfloat_round_near_maxMag)

+            ) {

+                doIncrement =

+                    (roundingMode

+                         == (sign ? softfloat_round_min : softfloat_round_max))

+                        && sigExtra;

+            }

+            if ( doIncrement ) {

+                ++sig;

+                sig &=

+                    ~(uint_fast64_t)

+                         (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                              & roundNearEven);

+                exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0);

+            }

+            goto packReturn;

+        }

+        if (

+               (0x7FFE < exp)

+            || ((exp == 0x7FFE) && (sig == UINT64_C( 0xFFFFFFFFFFFFFFFF ))

+                    && doIncrement)

+        ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            roundMask = 0;

+ overflow:

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            if (

+                   roundNearEven

+                || (roundingMode == softfloat_round_near_maxMag)

+                || (roundingMode

+                        == (sign ? softfloat_round_min : softfloat_round_max))

+            ) {

+                exp = 0x7FFF;

+                sig = UINT64_C( 0x8000000000000000 );

+            } else {

+                exp = 0x7FFE;

+                sig = ~roundMask;

+            }

+            goto packReturn;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( sigExtra ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    if ( doIncrement ) {

+        ++sig;

+        if ( ! sig ) {

+            ++exp;

+            sig = UINT64_C( 0x8000000000000000 );

+        } else {

+            sig &=

+                ~(uint_fast64_t)

+                     (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                          & roundNearEven);

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    uZ.s.signExp = packToExtF80UI64( sign, exp );

+    uZ.s.signif = sig;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackToF128.c b/c_emulator/SoftFloat-3e/source/s_roundPackToF128.c
new file mode 100644
index 0000000..4158431
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackToF128.c
@@ -0,0 +1,171 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t

+ softfloat_roundPackToF128(

+     bool sign,

+     int_fast32_t exp,

+     uint_fast64_t sig64,

+     uint_fast64_t sig0,

+     uint_fast64_t sigExtra

+ )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven, doIncrement, isTiny;

+    struct uint128_extra sig128Extra;

+    uint_fast64_t uiZ64, uiZ0;

+    struct uint128 sig128;

+    union ui128_f128 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        doIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                && sigExtra;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FFD <= (uint32_t) exp ) {

+        if ( exp < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                   (softfloat_detectTininess

+                        == softfloat_tininess_beforeRounding)

+                || (exp < -1)

+                || ! doIncrement

+                || softfloat_lt128(

+                       sig64,

+                       sig0,

+                       UINT64_C( 0x0001FFFFFFFFFFFF ),

+                       UINT64_C( 0xFFFFFFFFFFFFFFFF )

+                   );

+            sig128Extra =

+                softfloat_shiftRightJam128Extra( sig64, sig0, sigExtra, -exp );

+            sig64 = sig128Extra.v.v64;

+            sig0  = sig128Extra.v.v0;

+            sigExtra = sig128Extra.extra;

+            exp = 0;

+            if ( isTiny && sigExtra ) {

+                softfloat_raiseFlags( softfloat_flag_underflow );

+            }

+            doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);

+            if (

+                   ! roundNearEven

+                && (roundingMode != softfloat_round_near_maxMag)

+            ) {

+                doIncrement =

+                    (roundingMode

+                         == (sign ? softfloat_round_min : softfloat_round_max))

+                        && sigExtra;

+            }

+        } else if (

+               (0x7FFD < exp)

+            || ((exp == 0x7FFD)

+                    && softfloat_eq128( 

+                           sig64,

+                           sig0,

+                           UINT64_C( 0x0001FFFFFFFFFFFF ),

+                           UINT64_C( 0xFFFFFFFFFFFFFFFF )

+                       )

+                    && doIncrement)

+        ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            if (

+                   roundNearEven

+                || (roundingMode == softfloat_round_near_maxMag)

+                || (roundingMode

+                        == (sign ? softfloat_round_min : softfloat_round_max))

+            ) {

+                uiZ64 = packToF128UI64( sign, 0x7FFF, 0 );

+                uiZ0  = 0;

+            } else {

+                uiZ64 =

+                    packToF128UI64(

+                        sign, 0x7FFE, UINT64_C( 0x0000FFFFFFFFFFFF ) );

+                uiZ0 = UINT64_C( 0xFFFFFFFFFFFFFFFF );

+            }

+            goto uiZ;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( sigExtra ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig0 |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    if ( doIncrement ) {

+        sig128 = softfloat_add128( sig64, sig0, 0, 1 );

+        sig64 = sig128.v64;

+        sig0 =

+            sig128.v0

+                & ~(uint64_t)

+                       (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF ))

+                            & roundNearEven);

+    } else {

+        if ( ! (sig64 | sig0) ) exp = 0;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    uiZ64 = packToF128UI64( sign, exp, sig64 );

+    uiZ0  = sig0;

+ uiZ:

+    uZ.ui.v64 = uiZ64;

+    uZ.ui.v0  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackToF16.c b/c_emulator/SoftFloat-3e/source/s_roundPackToF16.c
new file mode 100644
index 0000000..2dde55b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackToF16.c
@@ -0,0 +1,113 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t

+ softfloat_roundPackToF16( bool sign, int_fast16_t exp, uint_fast16_t sig )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint_fast8_t roundIncrement, roundBits;

+    bool isTiny;

+    uint_fast16_t uiZ;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    roundIncrement = 0x8;

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        roundIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                ? 0xF

+                : 0;

+    }

+    roundBits = sig & 0xF;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x1D <= (unsigned int) exp ) {

+        if ( exp < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                (softfloat_detectTininess == softfloat_tininess_beforeRounding)

+                    || (exp < -1) || (sig + roundIncrement < 0x8000);

+            sig = softfloat_shiftRightJam32( sig, -exp );

+            exp = 0;

+            roundBits = sig & 0xF;

+            if ( isTiny && roundBits ) {

+                softfloat_raiseFlags( softfloat_flag_underflow );

+            }

+        } else if ( (0x1D < exp) || (0x8000 <= sig + roundIncrement) ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            uiZ = packToF16UI( sign, 0x1F, 0 ) - ! roundIncrement;

+            goto uiZ;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = (sig + roundIncrement)>>4;

+    if ( roundBits ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    sig &= ~(uint_fast16_t) (! (roundBits ^ 8) & roundNearEven);

+    if ( ! sig ) exp = 0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    uiZ = packToF16UI( sign, exp, sig );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackToF32.c b/c_emulator/SoftFloat-3e/source/s_roundPackToF32.c
new file mode 100644
index 0000000..a69b8d4
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackToF32.c
@@ -0,0 +1,113 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t

+ softfloat_roundPackToF32( bool sign, int_fast16_t exp, uint_fast32_t sig )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint_fast8_t roundIncrement, roundBits;

+    bool isTiny;

+    uint_fast32_t uiZ;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    roundIncrement = 0x40;

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        roundIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                ? 0x7F

+                : 0;

+    }

+    roundBits = sig & 0x7F;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0xFD <= (unsigned int) exp ) {

+        if ( exp < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                (softfloat_detectTininess == softfloat_tininess_beforeRounding)

+                    || (exp < -1) || (sig + roundIncrement < 0x80000000);

+            sig = softfloat_shiftRightJam32( sig, -exp );

+            exp = 0;

+            roundBits = sig & 0x7F;

+            if ( isTiny && roundBits ) {

+                softfloat_raiseFlags( softfloat_flag_underflow );

+            }

+        } else if ( (0xFD < exp) || (0x80000000 <= sig + roundIncrement) ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            uiZ = packToF32UI( sign, 0xFF, 0 ) - ! roundIncrement;

+            goto uiZ;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = (sig + roundIncrement)>>7;

+    if ( roundBits ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    sig &= ~(uint_fast32_t) (! (roundBits ^ 0x40) & roundNearEven);

+    if ( ! sig ) exp = 0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    uiZ = packToF32UI( sign, exp, sig );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundPackToF64.c b/c_emulator/SoftFloat-3e/source/s_roundPackToF64.c
new file mode 100644
index 0000000..f7f3abf
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundPackToF64.c
@@ -0,0 +1,117 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t

+ softfloat_roundPackToF64( bool sign, int_fast16_t exp, uint_fast64_t sig )

+{

+    uint_fast8_t roundingMode;

+    bool roundNearEven;

+    uint_fast16_t roundIncrement, roundBits;

+    bool isTiny;

+    uint_fast64_t uiZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundingMode = softfloat_roundingMode;

+    roundNearEven = (roundingMode == softfloat_round_near_even);

+    roundIncrement = 0x200;

+    if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {

+        roundIncrement =

+            (roundingMode

+                 == (sign ? softfloat_round_min : softfloat_round_max))

+                ? 0x3FF

+                : 0;

+    }

+    roundBits = sig & 0x3FF;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if ( 0x7FD <= (uint16_t) exp ) {

+        if ( exp < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            isTiny =

+                (softfloat_detectTininess == softfloat_tininess_beforeRounding)

+                    || (exp < -1)

+                    || (sig + roundIncrement < UINT64_C( 0x8000000000000000 ));

+            sig = softfloat_shiftRightJam64( sig, -exp );

+            exp = 0;

+            roundBits = sig & 0x3FF;

+            if ( isTiny && roundBits ) {

+                softfloat_raiseFlags( softfloat_flag_underflow );

+            }

+        } else if (

+            (0x7FD < exp)

+                || (UINT64_C( 0x8000000000000000 ) <= sig + roundIncrement)

+        ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            softfloat_raiseFlags(

+                softfloat_flag_overflow | softfloat_flag_inexact );

+            uiZ = packToF64UI( sign, 0x7FF, 0 ) - ! roundIncrement;

+            goto uiZ;

+        }

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    sig = (sig + roundIncrement)>>10;

+    if ( roundBits ) {

+        softfloat_exceptionFlags |= softfloat_flag_inexact;

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) {

+            sig |= 1;

+            goto packReturn;

+        }

+#endif

+    }

+    sig &= ~(uint_fast64_t) (! (roundBits ^ 0x200) & roundNearEven);

+    if ( ! sig ) exp = 0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ packReturn:

+    uiZ = packToF64UI( sign, exp, sig );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundToI32.c b/c_emulator/SoftFloat-3e/source/s_roundToI32.c
new file mode 100644
index 0000000..a3e727d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundToI32.c
@@ -0,0 +1,98 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast32_t

+ softfloat_roundToI32(

+     bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact )

+{

+    uint_fast16_t roundIncrement, roundBits;

+    uint_fast32_t sig32;

+    union { uint32_t ui; int32_t i; } uZ;

+    int_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundIncrement = 0x800;

+    if (

+        (roundingMode != softfloat_round_near_maxMag)

+            && (roundingMode != softfloat_round_near_even)

+    ) {

+        roundIncrement = 0;

+        if ( 

+            sign

+                ? (roundingMode == softfloat_round_min)

+#ifdef SOFTFLOAT_ROUND_ODD

+                      || (roundingMode == softfloat_round_odd)

+#endif

+                : (roundingMode == softfloat_round_max)

+        ) {

+            roundIncrement = 0xFFF;

+        }

+    }

+    roundBits = sig & 0xFFF;

+    sig += roundIncrement;

+    if ( sig & UINT64_C( 0xFFFFF00000000000 ) ) goto invalid;

+    sig32 = sig>>12;

+    if (

+        (roundBits == 0x800) && (roundingMode == softfloat_round_near_even)

+    ) {

+        sig32 &= ~(uint_fast32_t) 1;

+    }

+    uZ.ui = sign ? -sig32 : sig32;

+    z = uZ.i;

+    if ( z && ((z < 0) ^ sign) ) goto invalid;

+    if ( roundBits ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) z |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? i32_fromNegOverflow : i32_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundToI64.c b/c_emulator/SoftFloat-3e/source/s_roundToI64.c
new file mode 100644
index 0000000..773c82c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundToI64.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+int_fast64_t

+ softfloat_roundToI64(

+     bool sign,

+     uint_fast64_t sig,

+     uint_fast64_t sigExtra,

+     uint_fast8_t roundingMode,

+     bool exact

+ )

+{

+    union { uint64_t ui; int64_t i; } uZ;

+    int_fast64_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if (

+        (roundingMode == softfloat_round_near_maxMag)

+            || (roundingMode == softfloat_round_near_even)

+    ) {

+        if ( UINT64_C( 0x8000000000000000 ) <= sigExtra ) goto increment;

+    } else {

+        if (

+            sigExtra

+                && (sign

+                        ? (roundingMode == softfloat_round_min)

+#ifdef SOFTFLOAT_ROUND_ODD

+                              || (roundingMode == softfloat_round_odd)

+#endif

+                        : (roundingMode == softfloat_round_max))

+        ) {

+ increment:

+            ++sig;

+            if ( !sig ) goto invalid;

+            if (

+                (sigExtra == UINT64_C( 0x8000000000000000 ))

+                    && (roundingMode == softfloat_round_near_even)

+            ) {

+                sig &= ~(uint_fast64_t) 1;

+            }

+        }

+    }

+    uZ.ui = sign ? -sig : sig;

+    z = uZ.i;

+    if ( z && ((z < 0) ^ sign) ) goto invalid;

+    if ( sigExtra ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) z |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? i64_fromNegOverflow : i64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundToUI32.c b/c_emulator/SoftFloat-3e/source/s_roundToUI32.c
new file mode 100644
index 0000000..059e231
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundToUI32.c
@@ -0,0 +1,93 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast32_t

+ softfloat_roundToUI32(

+     bool sign, uint_fast64_t sig, uint_fast8_t roundingMode, bool exact )

+{

+    uint_fast16_t roundIncrement, roundBits;

+    uint_fast32_t z;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    roundIncrement = 0x800;

+    if ( 

+        (roundingMode != softfloat_round_near_maxMag) 

+            && (roundingMode != softfloat_round_near_even)

+    ) {

+        roundIncrement = 0;

+        if ( sign ) {

+            if ( !sig ) return 0;

+            if ( roundingMode == softfloat_round_min ) goto invalid;

+#ifdef SOFTFLOAT_ROUND_ODD

+            if ( roundingMode == softfloat_round_odd ) goto invalid;

+#endif

+        } else {

+            if ( roundingMode == softfloat_round_max ) roundIncrement = 0xFFF;

+        }

+    }

+    roundBits = sig & 0xFFF;

+    sig += roundIncrement;

+    if ( sig & UINT64_C( 0xFFFFF00000000000 ) ) goto invalid;

+    z = sig>>12;

+    if ( 

+        (roundBits == 0x800) && (roundingMode == softfloat_round_near_even)

+    ) {

+        z &= ~(uint_fast32_t) 1;

+    }

+    if ( sign && z ) goto invalid;

+    if ( roundBits ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) z |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return z;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? ui32_fromNegOverflow : ui32_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_roundToUI64.c b/c_emulator/SoftFloat-3e/source/s_roundToUI64.c
new file mode 100644
index 0000000..856ad97
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_roundToUI64.c
@@ -0,0 +1,97 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+uint_fast64_t

+ softfloat_roundToUI64(

+     bool sign,

+     uint_fast64_t sig,

+     uint_fast64_t sigExtra,

+     uint_fast8_t roundingMode,

+     bool exact

+ )

+{

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    if (

+        (roundingMode == softfloat_round_near_maxMag)

+            || (roundingMode == softfloat_round_near_even)

+    ) {

+        if ( UINT64_C( 0x8000000000000000 ) <= sigExtra ) goto increment;

+    } else {

+        if ( sign ) {

+            if ( !(sig | sigExtra) ) return 0;

+            if ( roundingMode == softfloat_round_min ) goto invalid;

+#ifdef SOFTFLOAT_ROUND_ODD

+            if ( roundingMode == softfloat_round_odd ) goto invalid;

+#endif

+        } else {

+            if ( (roundingMode == softfloat_round_max) && sigExtra ) {

+ increment:

+                ++sig;

+                if ( !sig ) goto invalid;

+                if ( 

+                    (sigExtra == UINT64_C( 0x8000000000000000 ))

+                        && (roundingMode == softfloat_round_near_even)

+                ) {

+                    sig &= ~(uint_fast64_t) 1;

+                }

+            }

+        }

+    }

+    if ( sign && sig ) goto invalid;

+    if ( sigExtra ) {

+#ifdef SOFTFLOAT_ROUND_ODD

+        if ( roundingMode == softfloat_round_odd ) sig |= 1;

+#endif

+        if ( exact ) softfloat_exceptionFlags |= softfloat_flag_inexact;

+    }

+    return sig;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ invalid:

+    softfloat_raiseFlags( softfloat_flag_invalid );

+    return sign ? ui64_fromNegOverflow : ui64_fromPosOverflow;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftLeftM.c b/c_emulator/SoftFloat-3e/source/s_shiftLeftM.c
new file mode 100644
index 0000000..71a3099
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftLeftM.c
@@ -0,0 +1,91 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shiftLeftM

+

+#define softfloat_shiftLeftM softfloat_shiftLeftM

+#include "primitives.h"

+

+void

+ softfloat_shiftLeftM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint32_t wordDist;

+    uint_fast8_t innerDist;

+    uint32_t *destPtr;

+    uint_fast8_t i;

+

+    wordDist = dist>>5;

+    if ( wordDist < size_words ) {

+        aPtr += indexMultiwordLoBut( size_words, wordDist );

+        innerDist = dist & 31;

+        if ( innerDist ) {

+            softfloat_shortShiftLeftM(

+                size_words - wordDist,

+                aPtr,

+                innerDist,

+                zPtr + indexMultiwordHiBut( size_words, wordDist )

+            );

+            if ( ! wordDist ) return;

+        } else {

+            aPtr += indexWordHi( size_words - wordDist );

+            destPtr = zPtr + indexWordHi( size_words );

+            for ( i = size_words - wordDist; i; --i ) {

+                *destPtr = *aPtr;

+                aPtr -= wordIncr;

+                destPtr -= wordIncr;

+            }

+        }

+        zPtr += indexMultiwordLo( size_words, wordDist );

+    } else {

+        wordDist = size_words;

+    }

+    do {

+        *zPtr++ = 0;

+        --wordDist;

+    } while ( wordDist );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftNormSigF128M.c b/c_emulator/SoftFloat-3e/source/s_shiftNormSigF128M.c
new file mode 100644
index 0000000..fa4976c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftNormSigF128M.c
@@ -0,0 +1,78 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+

+int

+ softfloat_shiftNormSigF128M(

+     const uint32_t *wPtr, uint_fast8_t shiftDist, uint32_t *sigPtr )

+{

+    uint32_t wordSig;

+    int32_t exp;

+    uint32_t leadingBit;

+

+    wordSig = wPtr[indexWordHi( 4 )];

+    exp = expF128UI96( wordSig );

+    if ( exp ) {

+        softfloat_shortShiftLeft128M( wPtr, shiftDist, sigPtr );

+        leadingBit = 0x00010000<<shiftDist;

+        sigPtr[indexWordHi( 4 )] =

+            (sigPtr[indexWordHi( 4 )] & (leadingBit - 1)) | leadingBit;

+    } else {

+        exp = 16;

+        wordSig &= 0x7FFFFFFF;

+        if ( ! wordSig ) {

+            exp = -16;

+            wordSig = wPtr[indexWord( 4, 2 )];

+            if ( ! wordSig ) {

+                exp = -48;

+                wordSig = wPtr[indexWord( 4, 1 )];

+                if ( ! wordSig ) {

+                    wordSig = wPtr[indexWord( 4, 0 )];

+                    if ( ! wordSig ) return -128;

+                    exp = -80;

+                }

+            }

+        }

+        exp -= softfloat_countLeadingZeros32( wordSig );

+        softfloat_shiftLeft128M( wPtr, 1 - exp + shiftDist, sigPtr );

+    }

+    return exp;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam128.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam128.c
new file mode 100644
index 0000000..aac5f6d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam128.c
@@ -0,0 +1,69 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shiftRightJam128

+

+struct uint128

+ softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist )

+{

+    uint_fast8_t u8NegDist;

+    struct uint128 z;

+

+    if ( dist < 64 ) {

+        u8NegDist = -dist;

+        z.v64 = a64>>dist;

+        z.v0 =

+            a64<<(u8NegDist & 63) | a0>>dist

+                | ((uint64_t) (a0<<(u8NegDist & 63)) != 0);

+    } else {

+        z.v64 = 0;

+        z.v0 =

+            (dist < 127)

+                ? a64>>(dist & 63)

+                      | (((a64 & (((uint_fast64_t) 1<<(dist & 63)) - 1)) | a0)

+                             != 0)

+                : ((a64 | a0) != 0);

+    }

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam128Extra.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam128Extra.c
new file mode 100644
index 0000000..7572288
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam128Extra.c
@@ -0,0 +1,77 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shiftRightJam128Extra

+

+struct uint128_extra

+ softfloat_shiftRightJam128Extra(

+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist )

+{

+    uint_fast8_t u8NegDist;

+    struct uint128_extra z;

+

+    u8NegDist = -dist;

+    if ( dist < 64 ) {

+        z.v.v64 = a64>>dist;

+        z.v.v0 = a64<<(u8NegDist & 63) | a0>>dist;

+        z.extra = a0<<(u8NegDist & 63);

+    } else {

+        z.v.v64 = 0;

+        if ( dist == 64 ) {

+            z.v.v0 = a64;

+            z.extra = a0;

+        } else {

+            extra |= a0;

+            if ( dist < 128 ) {

+                z.v.v0 = a64>>(dist & 63);

+                z.extra = a64<<(u8NegDist & 63);

+            } else {

+                z.v.v0 = 0;

+                z.extra = (dist == 128) ? a64 : (a64 != 0);

+            }

+        }

+    }

+    z.extra |= (extra != 0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam256M.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam256M.c
new file mode 100644
index 0000000..433870a
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam256M.c
@@ -0,0 +1,126 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shiftRightJam256M

+

+static

+ void

+  softfloat_shortShiftRightJamM(

+      uint_fast8_t size_words,

+      const uint64_t *aPtr,

+      uint_fast8_t dist,

+      uint64_t *zPtr

+  )

+{

+    uint_fast8_t uNegDist;

+    unsigned int index, lastIndex;

+    uint64_t partWordZ, wordA;

+

+    uNegDist = -dist;

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    wordA = aPtr[index];

+    partWordZ = wordA>>dist;

+    if ( partWordZ<<dist != wordA ) partWordZ |= 1;

+    while ( index != lastIndex ) {

+        wordA = aPtr[index + wordIncr];

+        zPtr[index] = wordA<<(uNegDist & 63) | partWordZ;

+        index += wordIncr;

+        partWordZ = wordA>>dist;

+    }

+    zPtr[index] = partWordZ;

+

+}

+

+void

+ softfloat_shiftRightJam256M(

+     const uint64_t *aPtr, uint_fast32_t dist, uint64_t *zPtr )

+{

+    uint64_t wordJam;

+    uint_fast32_t wordDist;

+    uint64_t *ptr;

+    uint_fast8_t i, innerDist;

+

+    wordJam = 0;

+    wordDist = dist>>6;

+    if ( wordDist ) {

+        if ( 4 < wordDist ) wordDist = 4;

+        ptr = (uint64_t *) (aPtr + indexMultiwordLo( 4, wordDist ));

+        i = wordDist;

+        do {

+            wordJam = *ptr++;

+            if ( wordJam ) break;

+            --i;

+        } while ( i );

+        ptr = zPtr;

+    }

+    if ( wordDist < 4 ) {

+        aPtr += indexMultiwordHiBut( 4, wordDist );

+        innerDist = dist & 63;

+        if ( innerDist ) {

+            softfloat_shortShiftRightJamM(

+                4 - wordDist,

+                aPtr,

+                innerDist,

+                zPtr + indexMultiwordLoBut( 4, wordDist )

+            );

+            if ( ! wordDist ) goto wordJam;

+        } else {

+            aPtr += indexWordLo( 4 - wordDist );

+            ptr = zPtr + indexWordLo( 4 );

+            for ( i = 4 - wordDist; i; --i ) {

+                *ptr = *aPtr;

+                aPtr += wordIncr;

+                ptr += wordIncr;

+            }

+        }

+        ptr = zPtr + indexMultiwordHi( 4, wordDist );

+    }

+    do {

+        *ptr++ = 0;

+        --wordDist;

+    } while ( wordDist );

+ wordJam:

+    if ( wordJam ) zPtr[indexWordLo( 4 )] |= 1;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam32.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam32.c
new file mode 100644
index 0000000..2533fcd
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam32.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shiftRightJam32

+

+uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist )

+{

+

+    return

+        (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam64.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam64.c
new file mode 100644
index 0000000..4b40e3d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam64.c
@@ -0,0 +1,51 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shiftRightJam64

+

+uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist )

+{

+

+    return

+        (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJam64Extra.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJam64Extra.c
new file mode 100644
index 0000000..b93fad3
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJam64Extra.c
@@ -0,0 +1,62 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shiftRightJam64Extra

+

+struct uint64_extra

+ softfloat_shiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast32_t dist )

+{

+    struct uint64_extra z;

+

+    if ( dist < 64 ) {

+        z.v = a>>dist;

+        z.extra = a<<(-dist & 63);

+    } else {

+        z.v = 0;

+        z.extra = (dist == 64) ? a : (a != 0);

+    }

+    z.extra |= (extra != 0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightJamM.c b/c_emulator/SoftFloat-3e/source/s_shiftRightJamM.c
new file mode 100644
index 0000000..edf5f95
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightJamM.c
@@ -0,0 +1,101 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shiftRightJamM

+

+#define softfloat_shiftRightJamM softfloat_shiftRightJamM

+#include "primitives.h"

+

+void

+ softfloat_shiftRightJamM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint32_t wordJam, wordDist, *ptr;

+    uint_fast8_t i, innerDist;

+

+    wordJam = 0;

+    wordDist = dist>>5;

+    if ( wordDist ) {

+        if ( size_words < wordDist ) wordDist = size_words;

+        ptr = (uint32_t *) (aPtr + indexMultiwordLo( size_words, wordDist ));

+        i = wordDist;

+        do {

+            wordJam = *ptr++;

+            if ( wordJam ) break;

+            --i;

+        } while ( i );

+        ptr = zPtr;

+    }

+    if ( wordDist < size_words ) {

+        aPtr += indexMultiwordHiBut( size_words, wordDist );

+        innerDist = dist & 31;

+        if ( innerDist ) {

+            softfloat_shortShiftRightJamM(

+                size_words - wordDist,

+                aPtr,

+                innerDist,

+                zPtr + indexMultiwordLoBut( size_words, wordDist )

+            );

+            if ( ! wordDist ) goto wordJam;

+        } else {

+            aPtr += indexWordLo( size_words - wordDist );

+            ptr = zPtr + indexWordLo( size_words );

+            for ( i = size_words - wordDist; i; --i ) {

+                *ptr = *aPtr;

+                aPtr += wordIncr;

+                ptr += wordIncr;

+            }

+        }

+        ptr = zPtr + indexMultiwordHi( size_words, wordDist );

+    }

+    do {

+        *ptr++ = 0;

+        --wordDist;

+    } while ( wordDist );

+ wordJam:

+    if ( wordJam ) zPtr[indexWordLo( size_words )] |= 1;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shiftRightM.c b/c_emulator/SoftFloat-3e/source/s_shiftRightM.c
new file mode 100644
index 0000000..00265ea
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shiftRightM.c
@@ -0,0 +1,91 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shiftRightM

+

+#define softfloat_shiftRightM softfloat_shiftRightM

+#include "primitives.h"

+

+void

+ softfloat_shiftRightM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint32_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint32_t wordDist;

+    uint_fast8_t innerDist;

+    uint32_t *destPtr;

+    uint_fast8_t i;

+

+    wordDist = dist>>5;

+    if ( wordDist < size_words ) {

+        aPtr += indexMultiwordHiBut( size_words, wordDist );

+        innerDist = dist & 31;

+        if ( innerDist ) {

+            softfloat_shortShiftRightM(

+                size_words - wordDist,

+                aPtr,

+                innerDist,

+                zPtr + indexMultiwordLoBut( size_words, wordDist )

+            );

+            if ( ! wordDist ) return;

+        } else {

+            aPtr += indexWordLo( size_words - wordDist );

+            destPtr = zPtr + indexWordLo( size_words );

+            for ( i = size_words - wordDist; i; --i ) {

+                *destPtr = *aPtr;

+                aPtr += wordIncr;

+                destPtr += wordIncr;

+            }

+        }

+        zPtr += indexMultiwordHi( size_words, wordDist );

+    } else {

+        wordDist = size_words;

+    }

+    do {

+        *zPtr++ = 0;

+        --wordDist;

+    } while ( wordDist );

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftLeft128.c b/c_emulator/SoftFloat-3e/source/s_shortShiftLeft128.c
new file mode 100644
index 0000000..7513bc6
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftLeft128.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftLeft128

+

+struct uint128

+ softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    struct uint128 z;

+

+    z.v64 = a64<<dist | a0>>(-dist & 63);

+    z.v0 = a0<<dist;

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftLeft64To96M.c b/c_emulator/SoftFloat-3e/source/s_shortShiftLeft64To96M.c
new file mode 100644
index 0000000..ce1f09b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftLeft64To96M.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftLeft64To96M

+

+void

+ softfloat_shortShiftLeft64To96M(

+     uint64_t a, uint_fast8_t dist, uint32_t *zPtr )

+{

+

+    zPtr[indexWord( 3, 0 )] = (uint32_t) a<<dist;

+    a >>= 32 - dist;

+    zPtr[indexWord( 3, 2 )] = a>>32;

+    zPtr[indexWord( 3, 1 )] = a;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftLeftM.c b/c_emulator/SoftFloat-3e/source/s_shortShiftLeftM.c
new file mode 100644
index 0000000..48e6e03
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftLeftM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftLeftM

+

+void

+ softfloat_shortShiftLeftM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint_fast8_t uNegDist;

+    unsigned int index, lastIndex;

+    uint32_t partWordZ, wordA;

+

+    uNegDist = -dist;

+    index = indexWordHi( size_words );

+    lastIndex = indexWordLo( size_words );

+    partWordZ = aPtr[index]<<dist;

+    while ( index != lastIndex ) {

+        wordA = aPtr[index - wordIncr];

+        zPtr[index] = partWordZ | wordA>>(uNegDist & 31);

+        index -= wordIncr;

+        partWordZ = wordA<<dist;

+    }

+    zPtr[index] = partWordZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRight128.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRight128.c
new file mode 100644
index 0000000..8f5c650
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRight128.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRight128

+

+struct uint128

+ softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    struct uint128 z;

+

+    z.v64 = a64>>dist;

+    z.v0 = a64<<(-dist & 63) | a0>>dist;

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightExtendM.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightExtendM.c
new file mode 100644
index 0000000..bc441c7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightExtendM.c
@@ -0,0 +1,73 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightExtendM

+

+void

+ softfloat_shortShiftRightExtendM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint_fast8_t uNegDist;

+    unsigned int indexA, lastIndexA;

+    uint32_t partWordZ, wordA;

+

+    uNegDist = -dist;

+    indexA = indexWordLo( size_words );

+    lastIndexA = indexWordHi( size_words );

+    zPtr += indexWordLo( size_words + 1 );

+    partWordZ = 0;

+    for (;;) {

+        wordA = aPtr[indexA];

+        *zPtr = wordA<<(uNegDist & 31) | partWordZ;

+        zPtr += wordIncr;

+        partWordZ = wordA>>dist;

+        if ( indexA == lastIndexA ) break;

+        indexA += wordIncr;

+    }

+    *zPtr = partWordZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128.c
new file mode 100644
index 0000000..7600872
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightJam128

+

+struct uint128

+ softfloat_shortShiftRightJam128(

+     uint64_t a64, uint64_t a0, uint_fast8_t dist )

+{

+    uint_fast8_t uNegDist;

+    struct uint128 z;

+

+    uNegDist = -dist;

+    z.v64 = a64>>dist;

+    z.v0 =

+        a64<<(uNegDist & 63) | a0>>dist

+            | ((uint64_t) (a0<<(uNegDist & 63)) != 0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128Extra.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128Extra.c
new file mode 100644
index 0000000..b077440
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam128Extra.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightJam128Extra

+

+struct uint128_extra

+ softfloat_shortShiftRightJam128Extra(

+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist )

+{

+    uint_fast8_t uNegDist;

+    struct uint128_extra z;

+

+    uNegDist = -dist;

+    z.v.v64 = a64>>dist;

+    z.v.v0 = a64<<(uNegDist & 63) | a0>>dist;

+    z.extra = a0<<(uNegDist & 63) | (extra != 0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64.c
new file mode 100644
index 0000000..d3044c8
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64.c
@@ -0,0 +1,50 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+

+#ifndef softfloat_shortShiftRightJam64

+

+uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist )

+{

+

+    return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0);

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64Extra.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64Extra.c
new file mode 100644
index 0000000..f2af92b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJam64Extra.c
@@ -0,0 +1,56 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightJam64Extra

+

+struct uint64_extra

+ softfloat_shortShiftRightJam64Extra(

+     uint64_t a, uint64_t extra, uint_fast8_t dist )

+{

+    struct uint64_extra z;

+

+    z.v = a>>dist;

+    z.extra = a<<(-dist & 63) | (extra != 0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightJamM.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJamM.c
new file mode 100644
index 0000000..b567e48
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightJamM.c
@@ -0,0 +1,72 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightJamM

+

+void

+ softfloat_shortShiftRightJamM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint_fast8_t uNegDist;

+    unsigned int index, lastIndex;

+    uint32_t partWordZ, wordA;

+

+    uNegDist = -dist;

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    wordA = aPtr[index];

+    partWordZ = wordA>>dist;

+    if ( partWordZ<<dist != wordA ) partWordZ |= 1;

+    while ( index != lastIndex ) {

+        wordA = aPtr[index + wordIncr];

+        zPtr[index] = wordA<<(uNegDist & 31) | partWordZ;

+        index += wordIncr;

+        partWordZ = wordA>>dist;

+    }

+    zPtr[index] = partWordZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_shortShiftRightM.c b/c_emulator/SoftFloat-3e/source/s_shortShiftRightM.c
new file mode 100644
index 0000000..54e0071
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_shortShiftRightM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_shortShiftRightM

+

+void

+ softfloat_shortShiftRightM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     uint_fast8_t dist,

+     uint32_t *zPtr

+ )

+{

+    uint_fast8_t uNegDist;

+    unsigned int index, lastIndex;

+    uint32_t partWordZ, wordA;

+

+    uNegDist = -dist;

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    partWordZ = aPtr[index]>>dist;

+    while ( index != lastIndex ) {

+        wordA = aPtr[index + wordIncr];

+        zPtr[index] = wordA<<(uNegDist & 31) | partWordZ;

+        index += wordIncr;

+        partWordZ = wordA>>dist;

+    }

+    zPtr[index] = partWordZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_sub128.c b/c_emulator/SoftFloat-3e/source/s_sub128.c
new file mode 100644
index 0000000..9bf3463
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_sub128.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_sub128

+

+struct uint128

+ softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )

+{

+    struct uint128 z;

+

+    z.v0 = a0 - b0;

+    z.v64 = a64 - b64 - (a0 < b0);

+    return z;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_sub1XM.c b/c_emulator/SoftFloat-3e/source/s_sub1XM.c
new file mode 100644
index 0000000..30c5d36
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_sub1XM.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_sub1XM

+

+void softfloat_sub1XM( uint_fast8_t size_words, uint32_t *zPtr )

+{

+    unsigned int index, lastIndex;

+    uint32_t wordA;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    for (;;) {

+        wordA = zPtr[index];

+        zPtr[index] = wordA - 1;

+        if ( wordA || (index == lastIndex) ) break;

+        index += wordIncr;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_sub256M.c b/c_emulator/SoftFloat-3e/source/s_sub256M.c
new file mode 100644
index 0000000..a4af5a1
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_sub256M.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_sub256M

+

+void

+ softfloat_sub256M(

+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr )

+{

+    unsigned int index;

+    uint_fast8_t borrow;

+    uint64_t wordA, wordB;

+

+    index = indexWordLo( 4 );

+    borrow = 0;

+    for (;;) {

+        wordA = aPtr[index];

+        wordB = bPtr[index];

+        zPtr[index] = wordA - wordB - borrow;

+        if ( index == indexWordHi( 4 ) ) break;

+        borrow = borrow ? (wordA <= wordB) : (wordA < wordB);

+        index += wordIncr;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subM.c b/c_emulator/SoftFloat-3e/source/s_subM.c
new file mode 100644
index 0000000..fcccc74
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subM.c
@@ -0,0 +1,70 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "primitiveTypes.h"

+

+#ifndef softfloat_subM

+

+void

+ softfloat_subM(

+     uint_fast8_t size_words,

+     const uint32_t *aPtr,

+     const uint32_t *bPtr,

+     uint32_t *zPtr

+ )

+{

+    unsigned int index, lastIndex;

+    uint_fast8_t borrow;

+    uint32_t wordA, wordB;

+

+    index = indexWordLo( size_words );

+    lastIndex = indexWordHi( size_words );

+    borrow = 0;

+    for (;;) {

+        wordA = aPtr[index];

+        wordB = bPtr[index];

+        zPtr[index] = wordA - wordB - borrow;

+        if ( index == lastIndex ) break;

+        borrow = borrow ? (wordA <= wordB) : (wordA < wordB);

+        index += wordIncr;

+    }

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subMagsExtF80.c b/c_emulator/SoftFloat-3e/source/s_subMagsExtF80.c
new file mode 100644
index 0000000..0c46c61
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subMagsExtF80.c
@@ -0,0 +1,158 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+extFloat80_t

+ softfloat_subMagsExtF80(

+     uint_fast16_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast16_t uiB64,

+     uint_fast64_t uiB0,

+     bool signZ

+ )

+{

+    int_fast32_t expA;

+    uint_fast64_t sigA;

+    int_fast32_t expB;

+    uint_fast64_t sigB;

+    int_fast32_t expDiff;

+    uint_fast16_t uiZ64;

+    uint_fast64_t uiZ0;

+    int_fast32_t expZ;

+    uint_fast64_t sigExtra;

+    struct uint128 sig128, uiZ;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expExtF80UI64( uiA64 );

+    sigA = uiA0;

+    expB = expExtF80UI64( uiB64 );

+    sigB = uiB0;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( 0 < expDiff ) goto expABigger;

+    if ( expDiff < 0 ) goto expBBigger;

+    if ( expA == 0x7FFF ) {

+        if ( (sigA | sigB) & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) {

+            goto propagateNaN;

+        }

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ64 = defaultNaNExtF80UI64;

+        uiZ0  = defaultNaNExtF80UI0;

+        goto uiZ;

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expZ = expA;

+    if ( ! expZ ) expZ = 1;

+    sigExtra = 0;

+    if ( sigB < sigA ) goto aBigger;

+    if ( sigA < sigB ) goto bBigger;

+    uiZ64 =

+        packToExtF80UI64( (softfloat_roundingMode == softfloat_round_min), 0 );

+    uiZ0 = 0;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ expBBigger:

+    if ( expB == 0x7FFF ) {

+        if ( sigB & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        uiZ64 = packToExtF80UI64( signZ ^ 1, 0x7FFF );

+        uiZ0  = UINT64_C( 0x8000000000000000 );

+        goto uiZ;

+    }

+    if ( ! expA ) {

+        ++expDiff;

+        sigExtra = 0;

+        if ( ! expDiff ) goto newlyAlignedBBigger;

+    }

+    sig128 = softfloat_shiftRightJam128( sigA, 0, -expDiff );

+    sigA = sig128.v64;

+    sigExtra = sig128.v0;

+ newlyAlignedBBigger:

+    expZ = expB;

+ bBigger:

+    signZ = ! signZ;

+    sig128 = softfloat_sub128( sigB, 0, sigA, sigExtra );

+    goto normRoundPack;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ expABigger:

+    if ( expA == 0x7FFF ) {

+        if ( sigA & UINT64_C( 0x7FFFFFFFFFFFFFFF ) ) goto propagateNaN;

+        uiZ64 = uiA64;

+        uiZ0  = uiA0;

+        goto uiZ;

+    }

+    if ( ! expB ) {

+        --expDiff;

+        sigExtra = 0;

+        if ( ! expDiff ) goto newlyAlignedABigger;

+    }

+    sig128 = softfloat_shiftRightJam128( sigB, 0, expDiff );

+    sigB = sig128.v64;

+    sigExtra = sig128.v0;

+ newlyAlignedABigger:

+    expZ = expA;

+ aBigger:

+    sig128 = softfloat_sub128( sigA, 0, sigB, sigExtra );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ normRoundPack:

+    return

+        softfloat_normRoundPackToExtF80(

+            signZ, expZ, sig128.v64, sig128.v0, extF80_roundingPrecision );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNExtF80UI( uiA64, uiA0, uiB64, uiB0 );

+    uiZ64 = uiZ.v64;

+    uiZ0  = uiZ.v0;

+ uiZ:

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subMagsF128.c b/c_emulator/SoftFloat-3e/source/s_subMagsF128.c
new file mode 100644
index 0000000..e93543f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subMagsF128.c
@@ -0,0 +1,139 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float128_t

+ softfloat_subMagsF128(

+     uint_fast64_t uiA64,

+     uint_fast64_t uiA0,

+     uint_fast64_t uiB64,

+     uint_fast64_t uiB0,

+     bool signZ

+ )

+{

+    int_fast32_t expA;

+    struct uint128 sigA;

+    int_fast32_t expB;

+    struct uint128 sigB, sigZ;

+    int_fast32_t expDiff, expZ;

+    struct uint128 uiZ;

+    union ui128_f128 uZ;

+

+    expA = expF128UI64( uiA64 );

+    sigA.v64 = fracF128UI64( uiA64 );

+    sigA.v0  = uiA0;

+    expB = expF128UI64( uiB64 );

+    sigB.v64 = fracF128UI64( uiB64 );

+    sigB.v0  = uiB0;

+    sigA = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 4 );

+    sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 4 );

+    expDiff = expA - expB;

+    if ( 0 < expDiff ) goto expABigger;

+    if ( expDiff < 0 ) goto expBBigger;

+    if ( expA == 0x7FFF ) {

+        if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN;

+        softfloat_raiseFlags( softfloat_flag_invalid );

+        uiZ.v64 = defaultNaNF128UI64;

+        uiZ.v0  = defaultNaNF128UI0;

+        goto uiZ;

+    }

+    expZ = expA;

+    if ( ! expZ ) expZ = 1;

+    if ( sigB.v64 < sigA.v64 ) goto aBigger;

+    if ( sigA.v64 < sigB.v64 ) goto bBigger;

+    if ( sigB.v0 < sigA.v0 ) goto aBigger;

+    if ( sigA.v0 < sigB.v0 ) goto bBigger;

+    uiZ.v64 =

+        packToF128UI64(

+            (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+    uiZ.v0 = 0;

+    goto uiZ;

+ expBBigger:

+    if ( expB == 0x7FFF ) {

+        if ( sigB.v64 | sigB.v0 ) goto propagateNaN;

+        uiZ.v64 = packToF128UI64( signZ ^ 1, 0x7FFF, 0 );

+        uiZ.v0  = 0;

+        goto uiZ;

+    }

+    if ( expA ) {

+        sigA.v64 |= UINT64_C( 0x0010000000000000 );

+    } else {

+        ++expDiff;

+        if ( ! expDiff ) goto newlyAlignedBBigger;

+    }

+    sigA = softfloat_shiftRightJam128( sigA.v64, sigA.v0, -expDiff );

+ newlyAlignedBBigger:

+    expZ = expB;

+    sigB.v64 |= UINT64_C( 0x0010000000000000 );

+ bBigger:

+    signZ = ! signZ;

+    sigZ = softfloat_sub128( sigB.v64, sigB.v0, sigA.v64, sigA.v0 );

+    goto normRoundPack;

+ expABigger:

+    if ( expA == 0x7FFF ) {

+        if ( sigA.v64 | sigA.v0 ) goto propagateNaN;

+        uiZ.v64 = uiA64;

+        uiZ.v0  = uiA0;

+        goto uiZ;

+    }

+    if ( expB ) {

+        sigB.v64 |= UINT64_C( 0x0010000000000000 );

+    } else {

+        --expDiff;

+        if ( ! expDiff ) goto newlyAlignedABigger;

+    }

+    sigB = softfloat_shiftRightJam128( sigB.v64, sigB.v0, expDiff );

+ newlyAlignedABigger:

+    expZ = expA;

+    sigA.v64 |= UINT64_C( 0x0010000000000000 );

+ aBigger:

+    sigZ = softfloat_sub128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 );

+ normRoundPack:

+    return softfloat_normRoundPackToF128( signZ, expZ - 5, sigZ.v64, sigZ.v0 );

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subMagsF16.c b/c_emulator/SoftFloat-3e/source/s_subMagsF16.c
new file mode 100644
index 0000000..ae1417e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subMagsF16.c
@@ -0,0 +1,187 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the

+University of California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float16_t softfloat_subMagsF16( uint_fast16_t uiA, uint_fast16_t uiB )

+{

+    int_fast8_t expA;

+    uint_fast16_t sigA;

+    int_fast8_t expB;

+    uint_fast16_t sigB;

+    int_fast8_t expDiff;

+    uint_fast16_t uiZ;

+    int_fast16_t sigDiff;

+    bool signZ;

+    int_fast8_t shiftDist, expZ;

+    uint_fast16_t sigZ, sigX, sigY;

+    uint_fast32_t sig32Z;

+    int_fast8_t roundingMode;

+    union ui16_f16 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF16UI( uiA );

+    sigA = fracF16UI( uiA );

+    expB = expF16UI( uiB );

+    sigB = fracF16UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expA == 0x1F ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            uiZ = defaultNaNF16UI;

+            goto uiZ;

+        }

+        sigDiff = sigA - sigB;

+        if ( ! sigDiff ) {

+            uiZ =

+                packToF16UI(

+                    (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+            goto uiZ;

+        }

+        if ( expA ) --expA;

+        signZ = signF16UI( uiA );

+        if ( sigDiff < 0 ) {

+            signZ = ! signZ;

+            sigDiff = -sigDiff;

+        }

+        shiftDist = softfloat_countLeadingZeros16( sigDiff ) - 5;

+        expZ = expA - shiftDist;

+        if ( expZ < 0 ) {

+            shiftDist = expA;

+            expZ = 0;

+        }

+        sigZ = sigDiff<<shiftDist;

+        goto pack;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signF16UI( uiA );

+        if ( expDiff < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            signZ = ! signZ;

+            if ( expB == 0x1F ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF16UI( signZ, 0x1F, 0 );

+                goto uiZ;

+            }

+            if ( expDiff <= -13 ) {

+                uiZ = packToF16UI( signZ, expB, sigB );

+                if ( expA | sigA ) goto subEpsilon;

+                goto uiZ;

+            }

+            expZ = expA + 19;

+            sigX = sigB | 0x0400;

+            sigY = sigA + (expA ? 0x0400 : sigA);

+            expDiff = -expDiff;

+        } else {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            uiZ = uiA;

+            if ( expA == 0x1F ) {

+                if ( sigA ) goto propagateNaN;

+                goto uiZ;

+            }

+            if ( 13 <= expDiff ) {

+                if ( expB | sigB ) goto subEpsilon;

+                goto uiZ;

+            }

+            expZ = expB + 19;

+            sigX = sigA | 0x0400;

+            sigY = sigB + (expB ? 0x0400 : sigB);

+        }

+        sig32Z = ((uint_fast32_t) sigX<<expDiff) - sigY;

+        shiftDist = softfloat_countLeadingZeros32( sig32Z ) - 1;

+        sig32Z <<= shiftDist;

+        expZ -= shiftDist;

+        sigZ = sig32Z>>16;

+        if ( sig32Z & 0xFFFF ) {

+            sigZ |= 1;

+        } else {

+            if ( ! (sigZ & 0xF) && ((unsigned int) expZ < 0x1E) ) {

+                sigZ >>= 4;

+                goto pack;

+            }

+        }

+        return softfloat_roundPackToF16( signZ, expZ, sigZ );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF16UI( uiA, uiB );

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ subEpsilon:

+    roundingMode = softfloat_roundingMode;

+    if ( roundingMode != softfloat_round_near_even ) {

+        if (

+            (roundingMode == softfloat_round_minMag)

+                || (roundingMode

+                        == (signF16UI( uiZ ) ? softfloat_round_max

+                                : softfloat_round_min))

+        ) {

+            --uiZ;

+        }

+#ifdef SOFTFLOAT_ROUND_ODD

+        else if ( roundingMode == softfloat_round_odd ) {

+            uiZ = (uiZ - 1) | 1;

+        }

+#endif

+    }

+    softfloat_exceptionFlags |= softfloat_flag_inexact;

+    goto uiZ;

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ pack:

+    uiZ = packToF16UI( signZ, expZ, sigZ );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subMagsF32.c b/c_emulator/SoftFloat-3e/source/s_subMagsF32.c
new file mode 100644
index 0000000..0c1f32e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subMagsF32.c
@@ -0,0 +1,143 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float32_t softfloat_subMagsF32( uint_fast32_t uiA, uint_fast32_t uiB )

+{

+    int_fast16_t expA;

+    uint_fast32_t sigA;

+    int_fast16_t expB;

+    uint_fast32_t sigB;

+    int_fast16_t expDiff;

+    uint_fast32_t uiZ;

+    int_fast32_t sigDiff;

+    bool signZ;

+    int_fast8_t shiftDist;

+    int_fast16_t expZ;

+    uint_fast32_t sigX, sigY;

+    union ui32_f32 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF32UI( uiA );

+    sigA = fracF32UI( uiA );

+    expB = expF32UI( uiB );

+    sigB = fracF32UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expA == 0xFF ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            uiZ = defaultNaNF32UI;

+            goto uiZ;

+        }

+        sigDiff = sigA - sigB;

+        if ( ! sigDiff ) {

+            uiZ =

+                packToF32UI(

+                    (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+            goto uiZ;

+        }

+        if ( expA ) --expA;

+        signZ = signF32UI( uiA );

+        if ( sigDiff < 0 ) {

+            signZ = ! signZ;

+            sigDiff = -sigDiff;

+        }

+        shiftDist = softfloat_countLeadingZeros32( sigDiff ) - 8;

+        expZ = expA - shiftDist;

+        if ( expZ < 0 ) {

+            shiftDist = expA;

+            expZ = 0;

+        }

+        uiZ = packToF32UI( signZ, expZ, sigDiff<<shiftDist );

+        goto uiZ;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        signZ = signF32UI( uiA );

+        sigA <<= 7;

+        sigB <<= 7;

+        if ( expDiff < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            signZ = ! signZ;

+            if ( expB == 0xFF ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF32UI( signZ, 0xFF, 0 );

+                goto uiZ;

+            }

+            expZ = expB - 1;

+            sigX = sigB | 0x40000000;

+            sigY = sigA + (expA ? 0x40000000 : sigA);

+            expDiff = -expDiff;

+        } else {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            if ( expA == 0xFF ) {

+                if ( sigA ) goto propagateNaN;

+                uiZ = uiA;

+                goto uiZ;

+            }

+            expZ = expA - 1;

+            sigX = sigA | 0x40000000;

+            sigY = sigB + (expB ? 0x40000000 : sigB);

+        }

+        return

+            softfloat_normRoundPackToF32(

+                signZ, expZ, sigX - softfloat_shiftRightJam32( sigY, expDiff )

+            );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_subMagsF64.c b/c_emulator/SoftFloat-3e/source/s_subMagsF64.c
new file mode 100644
index 0000000..a4a0ebc
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_subMagsF64.c
@@ -0,0 +1,141 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+float64_t

+ softfloat_subMagsF64( uint_fast64_t uiA, uint_fast64_t uiB, bool signZ )

+{

+    int_fast16_t expA;

+    uint_fast64_t sigA;

+    int_fast16_t expB;

+    uint_fast64_t sigB;

+    int_fast16_t expDiff;

+    uint_fast64_t uiZ;

+    int_fast64_t sigDiff;

+    int_fast8_t shiftDist;

+    int_fast16_t expZ;

+    uint_fast64_t sigZ;

+    union ui64_f64 uZ;

+

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expA = expF64UI( uiA );

+    sigA = fracF64UI( uiA );

+    expB = expF64UI( uiB );

+    sigB = fracF64UI( uiB );

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+    expDiff = expA - expB;

+    if ( ! expDiff ) {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        if ( expA == 0x7FF ) {

+            if ( sigA | sigB ) goto propagateNaN;

+            softfloat_raiseFlags( softfloat_flag_invalid );

+            uiZ = defaultNaNF64UI;

+            goto uiZ;

+        }

+        sigDiff = sigA - sigB;

+        if ( ! sigDiff ) {

+            uiZ =

+                packToF64UI(

+                    (softfloat_roundingMode == softfloat_round_min), 0, 0 );

+            goto uiZ;

+        }

+        if ( expA ) --expA;

+        if ( sigDiff < 0 ) {

+            signZ = ! signZ;

+            sigDiff = -sigDiff;

+        }

+        shiftDist = softfloat_countLeadingZeros64( sigDiff ) - 11;

+        expZ = expA - shiftDist;

+        if ( expZ < 0 ) {

+            shiftDist = expA;

+            expZ = 0;

+        }

+        uiZ = packToF64UI( signZ, expZ, sigDiff<<shiftDist );

+        goto uiZ;

+    } else {

+        /*--------------------------------------------------------------------

+        *--------------------------------------------------------------------*/

+        sigA <<= 10;

+        sigB <<= 10;

+        if ( expDiff < 0 ) {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            signZ = ! signZ;

+            if ( expB == 0x7FF ) {

+                if ( sigB ) goto propagateNaN;

+                uiZ = packToF64UI( signZ, 0x7FF, 0 );

+                goto uiZ;

+            }

+            sigA += expA ? UINT64_C( 0x4000000000000000 ) : sigA;

+            sigA = softfloat_shiftRightJam64( sigA, -expDiff );

+            sigB |= UINT64_C( 0x4000000000000000 );

+            expZ = expB;

+            sigZ = sigB - sigA;

+        } else {

+            /*----------------------------------------------------------------

+            *----------------------------------------------------------------*/

+            if ( expA == 0x7FF ) {

+                if ( sigA ) goto propagateNaN;

+                uiZ = uiA;

+                goto uiZ;

+            }

+            sigB += expB ? UINT64_C( 0x4000000000000000 ) : sigB;

+            sigB = softfloat_shiftRightJam64( sigB, expDiff );

+            sigA |= UINT64_C( 0x4000000000000000 );

+            expZ = expA;

+            sigZ = sigA - sigB;

+        }

+        return softfloat_normRoundPackToF64( signZ, expZ - 1, sigZ );

+    }

+    /*------------------------------------------------------------------------

+    *------------------------------------------------------------------------*/

+ propagateNaN:

+    uiZ = softfloat_propagateNaNF64UI( uiA, uiB );

+ uiZ:

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNExtF80M.c b/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNExtF80M.c
new file mode 100644
index 0000000..70092fe
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNExtF80M.c
@@ -0,0 +1,64 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+bool

+ softfloat_tryPropagateNaNExtF80M(

+     const struct extFloat80M *aSPtr,

+     const struct extFloat80M *bSPtr,

+     struct extFloat80M *zSPtr

+ )

+{

+    uint_fast16_t ui64;

+    uint64_t ui0;

+

+    ui64 = aSPtr->signExp;

+    ui0  = aSPtr->signif;

+    if ( isNaNExtF80UI( ui64, ui0 ) ) goto propagateNaN;

+    ui64 = bSPtr->signExp;

+    ui0  = bSPtr->signif;

+    if ( isNaNExtF80UI( ui64, ui0 ) ) goto propagateNaN;

+    return false;

+ propagateNaN:

+    softfloat_propagateNaNExtF80M( aSPtr, bSPtr, zSPtr );

+    return true;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNF128M.c b/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNF128M.c
new file mode 100644
index 0000000..bab04a7
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/s_tryPropagateNaNF128M.c
@@ -0,0 +1,55 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All rights reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdbool.h>

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+

+bool

+ softfloat_tryPropagateNaNF128M(

+     const uint32_t *aWPtr, const uint32_t *bWPtr, uint32_t *zWPtr )

+{

+

+    if ( softfloat_isNaNF128M( aWPtr ) || softfloat_isNaNF128M( bWPtr ) ) {

+        softfloat_propagateNaNF128M( aWPtr, bWPtr, zWPtr );

+        return true;

+    }

+    return false;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/softfloat_state.c b/c_emulator/SoftFloat-3e/source/softfloat_state.c
new file mode 100644
index 0000000..0f29665
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/softfloat_state.c
@@ -0,0 +1,52 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "specialize.h"

+#include "softfloat.h"

+

+#ifndef THREAD_LOCAL

+#define THREAD_LOCAL

+#endif

+

+THREAD_LOCAL uint_fast8_t softfloat_roundingMode = softfloat_round_near_even;

+THREAD_LOCAL uint_fast8_t softfloat_detectTininess = init_detectTininess;

+THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags = 0;

+

+THREAD_LOCAL uint_fast8_t extF80_roundingPrecision = 80;

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_extF80.c b/c_emulator/SoftFloat-3e/source/ui32_to_extF80.c
new file mode 100644
index 0000000..34f7936
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_extF80.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t ui32_to_extF80( uint32_t a )

+{

+    uint_fast16_t uiZ64;

+    int_fast8_t shiftDist;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    uiZ64 = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros32( a );

+        uiZ64 = 0x401E - shiftDist;

+        a <<= shiftDist;

+    }

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif = (uint_fast64_t) a<<32;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_extF80M.c b/c_emulator/SoftFloat-3e/source/ui32_to_extF80M.c
new file mode 100644
index 0000000..0a0c098
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_extF80M.c
@@ -0,0 +1,74 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void ui32_to_extF80M( uint32_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = ui32_to_extF80( a );

+

+}

+

+#else

+

+void ui32_to_extF80M( uint32_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiZ64;

+    uint64_t sigZ;

+    int_fast8_t shiftDist;

+

+    zSPtr = (struct extFloat80M *) zPtr;

+    uiZ64 = 0;

+    sigZ = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros32( a );

+        uiZ64 = packToExtF80UI64( 0, 0x401E - shiftDist );

+        sigZ = (uint64_t) (a<<shiftDist)<<32;

+    }

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = sigZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_f128.c b/c_emulator/SoftFloat-3e/source/ui32_to_f128.c
new file mode 100644
index 0000000..c3ab53d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_f128.c
@@ -0,0 +1,60 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t ui32_to_f128( uint32_t a )

+{

+    uint_fast64_t uiZ64;

+    int_fast8_t shiftDist;

+    union ui128_f128 uZ;

+

+    uiZ64 = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros32( a ) + 17;

+        uiZ64 =

+            packToF128UI64(

+                0, 0x402E - shiftDist, (uint_fast64_t) a<<shiftDist );

+    }

+    uZ.ui.v64 = uiZ64;

+    uZ.ui.v0  = 0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_f128M.c b/c_emulator/SoftFloat-3e/source/ui32_to_f128M.c
new file mode 100644
index 0000000..02b0434
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_f128M.c
@@ -0,0 +1,76 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void ui32_to_f128M( uint32_t a, float128_t *zPtr )

+{

+

+    *zPtr = ui32_to_f128( a );

+

+}

+

+#else

+

+void ui32_to_f128M( uint32_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr, uiZ96, uiZ64;

+    int_fast8_t shiftDist;

+    uint64_t normA;

+

+    zWPtr = (uint32_t *) zPtr;

+    uiZ96 = 0;

+    uiZ64 = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros32( a ) + 17;

+        normA = (uint64_t) a<<shiftDist;

+        uiZ96 = packToF128UI96( 0, 0x402E - shiftDist, normA>>32 );

+        uiZ64 = normA;

+    }

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = uiZ64;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_f16.c b/c_emulator/SoftFloat-3e/source/ui32_to_f16.c
new file mode 100644
index 0000000..6fc377b
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_f16.c
@@ -0,0 +1,65 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t ui32_to_f16( uint32_t a )

+{

+    int_fast8_t shiftDist;

+    union ui16_f16 u;

+    uint_fast16_t sig;

+

+    shiftDist = softfloat_countLeadingZeros32( a ) - 21;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF16UI(

+                    0, 0x18 - shiftDist, (uint_fast16_t) a<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 4;

+        sig =

+            (shiftDist < 0)

+                ? a>>(-shiftDist) | ((uint32_t) (a<<(shiftDist & 31)) != 0)

+                : (uint_fast16_t) a<<shiftDist;

+        return softfloat_roundPackToF16( 0, 0x1C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_f32.c b/c_emulator/SoftFloat-3e/source/ui32_to_f32.c
new file mode 100644
index 0000000..d75911f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_f32.c
@@ -0,0 +1,57 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t ui32_to_f32( uint32_t a )

+{

+    union ui32_f32 uZ;

+

+    if ( ! a ) {

+        uZ.ui = 0;

+        return uZ.f;

+    }

+    if ( a & 0x80000000 ) {

+        return softfloat_roundPackToF32( 0, 0x9D, a>>1 | (a & 1) );

+    } else {

+        return softfloat_normRoundPackToF32( 0, 0x9C, a );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui32_to_f64.c b/c_emulator/SoftFloat-3e/source/ui32_to_f64.c
new file mode 100644
index 0000000..504f96e
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui32_to_f64.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t ui32_to_f64( uint32_t a )

+{

+    uint_fast64_t uiZ;

+    int_fast8_t shiftDist;

+    union ui64_f64 uZ;

+

+    if ( ! a ) {

+        uiZ = 0;

+    } else {

+        shiftDist = softfloat_countLeadingZeros32( a ) + 21;

+        uiZ =

+            packToF64UI( 0, 0x432 - shiftDist, (uint_fast64_t) a<<shiftDist );

+    }

+    uZ.ui = uiZ;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_extF80.c b/c_emulator/SoftFloat-3e/source/ui64_to_extF80.c
new file mode 100644
index 0000000..b0e932f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_extF80.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+extFloat80_t ui64_to_extF80( uint64_t a )

+{

+    uint_fast16_t uiZ64;

+    int_fast8_t shiftDist;

+    union { struct extFloat80M s; extFloat80_t f; } uZ;

+

+    uiZ64 = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros64( a );

+        uiZ64 = 0x403E - shiftDist;

+        a <<= shiftDist;

+    }

+    uZ.s.signExp = uiZ64;

+    uZ.s.signif  = a;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_extF80M.c b/c_emulator/SoftFloat-3e/source/ui64_to_extF80M.c
new file mode 100644
index 0000000..e676d90
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_extF80M.c
@@ -0,0 +1,74 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void ui64_to_extF80M( uint64_t a, extFloat80_t *zPtr )

+{

+

+    *zPtr = ui64_to_extF80( a );

+

+}

+

+#else

+

+void ui64_to_extF80M( uint64_t a, extFloat80_t *zPtr )

+{

+    struct extFloat80M *zSPtr;

+    uint_fast16_t uiZ64;

+    uint64_t sigZ;

+    int_fast8_t shiftDist;

+

+    zSPtr = (struct extFloat80M *) zPtr;

+    uiZ64 = 0;

+    sigZ = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros64( a );

+        uiZ64 = packToExtF80UI64( 0, 0x403E - shiftDist );

+        sigZ = a<<shiftDist;

+    }

+    zSPtr->signExp = uiZ64;

+    zSPtr->signif = sigZ;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_f128.c b/c_emulator/SoftFloat-3e/source/ui64_to_f128.c
new file mode 100644
index 0000000..6ff6a6f
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_f128.c
@@ -0,0 +1,68 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float128_t ui64_to_f128( uint64_t a )

+{

+    uint_fast64_t uiZ64, uiZ0;

+    int_fast8_t shiftDist;

+    struct uint128 zSig;

+    union ui128_f128 uZ;

+

+    if ( ! a ) {

+        uiZ64 = 0;

+        uiZ0  = 0;

+    } else {

+        shiftDist = softfloat_countLeadingZeros64( a ) + 49;

+        if ( 64 <= shiftDist ) {

+            zSig.v64 = a<<(shiftDist - 64);

+            zSig.v0  = 0;

+        } else {

+            zSig = softfloat_shortShiftLeft128( 0, a, shiftDist );

+        }

+        uiZ64 = packToF128UI64( 0, 0x406E - shiftDist, zSig.v64 );

+        uiZ0  = zSig.v0;

+    }

+    uZ.ui.v64 = uiZ64;

+    uZ.ui.v0  = uiZ0;

+    return uZ.f;

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_f128M.c b/c_emulator/SoftFloat-3e/source/ui64_to_f128M.c
new file mode 100644
index 0000000..043406c
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_f128M.c
@@ -0,0 +1,86 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+#ifdef SOFTFLOAT_FAST_INT64

+

+void ui64_to_f128M( uint64_t a, float128_t *zPtr )

+{

+

+    *zPtr = ui64_to_f128( a );

+

+}

+

+#else

+

+void ui64_to_f128M( uint64_t a, float128_t *zPtr )

+{

+    uint32_t *zWPtr, uiZ96, uiZ64;

+    uint_fast8_t shiftDist;

+    uint32_t *ptr;

+

+    zWPtr = (uint32_t *) zPtr;

+    uiZ96 = 0;

+    uiZ64 = 0;

+    zWPtr[indexWord( 4, 1 )] = 0;

+    zWPtr[indexWord( 4, 0 )] = 0;

+    if ( a ) {

+        shiftDist = softfloat_countLeadingZeros64( a ) + 17;

+        if ( shiftDist < 32 ) {

+            ptr = zWPtr + indexMultiwordHi( 4, 3 );

+            ptr[indexWord( 3, 2 )] = 0;

+            ptr[indexWord( 3, 1 )] = a>>32;

+            ptr[indexWord( 3, 0 )] = a;

+            softfloat_shortShiftLeft96M( ptr, shiftDist, ptr );

+            ptr[indexWordHi( 3 )] =

+                packToF128UI96( 0, 0x404E - shiftDist, ptr[indexWordHi( 3 )] );

+            return;

+        }

+        a <<= shiftDist - 32;

+        uiZ96 = packToF128UI96( 0, 0x404E - shiftDist, a>>32 );

+        uiZ64 = a;

+    }

+    zWPtr[indexWord( 4, 3 )] = uiZ96;

+    zWPtr[indexWord( 4, 2 )] = uiZ64;

+

+}

+

+#endif

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_f16.c b/c_emulator/SoftFloat-3e/source/ui64_to_f16.c
new file mode 100644
index 0000000..3d58e85
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_f16.c
@@ -0,0 +1,64 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float16_t ui64_to_f16( uint64_t a )

+{

+    int_fast8_t shiftDist;

+    union ui16_f16 u;

+    uint_fast16_t sig;

+

+    shiftDist = softfloat_countLeadingZeros64( a ) - 53;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF16UI(

+                    0, 0x18 - shiftDist, (uint_fast16_t) a<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 4;

+        sig =

+            (shiftDist < 0) ? softfloat_shortShiftRightJam64( a, -shiftDist )

+                : (uint_fast16_t) a<<shiftDist;

+        return softfloat_roundPackToF16( 0, 0x1C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_f32.c b/c_emulator/SoftFloat-3e/source/ui64_to_f32.c
new file mode 100644
index 0000000..cbe3a9d
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_f32.c
@@ -0,0 +1,64 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014, 2015, 2016 The Regents of the University of

+California.  All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float32_t ui64_to_f32( uint64_t a )

+{

+    int_fast8_t shiftDist;

+    union ui32_f32 u;

+    uint_fast32_t sig;

+

+    shiftDist = softfloat_countLeadingZeros64( a ) - 40;

+    if ( 0 <= shiftDist ) {

+        u.ui =

+            a ? packToF32UI(

+                    0, 0x95 - shiftDist, (uint_fast32_t) a<<shiftDist )

+                : 0;

+        return u.f;

+    } else {

+        shiftDist += 7;

+        sig =

+            (shiftDist < 0) ? softfloat_shortShiftRightJam64( a, -shiftDist )

+                : (uint_fast32_t) a<<shiftDist;

+        return softfloat_roundPackToF32( 0, 0x9C - shiftDist, sig );

+    }

+

+}

+

diff --git a/c_emulator/SoftFloat-3e/source/ui64_to_f64.c b/c_emulator/SoftFloat-3e/source/ui64_to_f64.c
new file mode 100644
index 0000000..0328943
--- /dev/null
+++ b/c_emulator/SoftFloat-3e/source/ui64_to_f64.c
@@ -0,0 +1,59 @@
+

+/*============================================================================

+

+This C source file is part of the SoftFloat IEEE Floating-Point Arithmetic

+Package, Release 3e, by John R. Hauser.

+

+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.

+All Rights Reserved.

+

+Redistribution and use in source and binary forms, with or without

+modification, are permitted provided that the following conditions are met:

+

+ 1. Redistributions of source code must retain the above copyright notice,

+    this list of conditions, and the following disclaimer.

+

+ 2. Redistributions in binary form must reproduce the above copyright notice,

+    this list of conditions, and the following disclaimer in the documentation

+    and/or other materials provided with the distribution.

+

+ 3. Neither the name of the University nor the names of its contributors may

+    be used to endorse or promote products derived from this software without

+    specific prior written permission.

+

+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY

+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE

+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY

+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+

+=============================================================================*/

+

+#include <stdint.h>

+#include "platform.h"

+#include "internals.h"

+#include "softfloat.h"

+

+float64_t ui64_to_f64( uint64_t a )

+{

+    union ui64_f64 uZ;

+

+    if ( ! a ) {

+        uZ.ui = 0;

+        return uZ.f;

+    }

+    if ( a & UINT64_C( 0x8000000000000000 ) ) {

+        return

+            softfloat_roundPackToF64(

+                0, 0x43D, softfloat_shortShiftRightJam64( a, 1 ) );

+    } else {

+        return softfloat_normRoundPackToF64( 0, 0x43C, a );

+    }

+

+}

+

diff --git a/c_emulator/riscv_platform.c b/c_emulator/riscv_platform.c
index c88f688..d2bb6f7 100644
--- a/c_emulator/riscv_platform.c
+++ b/c_emulator/riscv_platform.c
@@ -11,6 +11,10 @@ static bool reservation_valid = false;
 
 bool sys_enable_rvc(unit u)
 { return rv_enable_rvc; }
+
+bool sys_enable_fdext(unit u)
+{ return rv_enable_fdext; }
+
 bool sys_enable_writable_misa(unit u)
 { return rv_enable_writable_misa; }
 
diff --git a/c_emulator/riscv_platform.h b/c_emulator/riscv_platform.h
index 85cf3fd..8cdfdb1 100644
--- a/c_emulator/riscv_platform.h
+++ b/c_emulator/riscv_platform.h
@@ -2,6 +2,7 @@
 #include "sail.h"
 
 bool sys_enable_rvc(unit);
+bool sys_enable_fdext(unit);
 bool sys_enable_writable_misa(unit);
 
 bool plat_enable_dirty_update(unit);
diff --git a/c_emulator/riscv_platform_impl.c b/c_emulator/riscv_platform_impl.c
index 695384c..9788649 100644
--- a/c_emulator/riscv_platform_impl.c
+++ b/c_emulator/riscv_platform_impl.c
@@ -6,6 +6,7 @@
 bool rv_enable_pmp                  = false;
 bool rv_enable_rvc                  = true;
 bool rv_enable_writable_misa        = true;
+bool rv_enable_fdext                = true;
 
 bool rv_enable_dirty_update         = false;
 bool rv_enable_misaligned           = false;
diff --git a/c_emulator/riscv_platform_impl.h b/c_emulator/riscv_platform_impl.h
index 60b9181..1a65035 100644
--- a/c_emulator/riscv_platform_impl.h
+++ b/c_emulator/riscv_platform_impl.h
@@ -9,6 +9,7 @@
 
 extern bool rv_enable_pmp;
 extern bool rv_enable_rvc;
+extern bool rv_enable_fdext;
 extern bool rv_enable_writable_misa;
 extern bool rv_enable_dirty_update;
 extern bool rv_enable_misaligned;
diff --git a/c_emulator/riscv_prelude.h b/c_emulator/riscv_prelude.h
index da292fe..9ac33aa 100644
--- a/c_emulator/riscv_prelude.h
+++ b/c_emulator/riscv_prelude.h
@@ -1,6 +1,7 @@
 #pragma once
 #include "sail.h"
 #include "rts.h"
+#include "riscv_softfloat.h"
 
 unit print_string(sail_string prefix, sail_string msg);
 
diff --git a/c_emulator/riscv_sail.h b/c_emulator/riscv_sail.h
index f177c57..e24dbf9 100644
--- a/c_emulator/riscv_sail.h
+++ b/c_emulator/riscv_sail.h
@@ -16,7 +16,10 @@ unit zinit_model(unit);
 bool zstep(sail_int);
 unit ztick_clock(unit);
 unit ztick_platform(unit);
+
 unit z_set_Misa_C(struct zMisa*, mach_bits);
+unit z_set_Misa_D(struct zMisa*, mach_bits);
+unit z_set_Misa_F(struct zMisa*, mach_bits);
 
 #ifdef RVFI_DII
 unit zext_rvfi_init(unit);
@@ -49,6 +52,8 @@ extern mach_bits zmstatus;
 extern mach_bits zmepc, zmtval;
 extern mach_bits zsepc, zstval;
 
+extern mach_bits zfloat_result, zfloat_fflags;
+
 struct zMcause {mach_bits zMcause_chunk_0;};
 struct zMcause zmcause, zscause;
 
diff --git a/c_emulator/riscv_sim.c b/c_emulator/riscv_sim.c
index b4f7dd3..74bda19 100644
--- a/c_emulator/riscv_sim.c
+++ b/c_emulator/riscv_sim.c
@@ -105,6 +105,7 @@ static struct option options[] = {
   {"ram-base",                    required_argument, 0, 'B'},
   {"disable-compressed",          no_argument,       0, 'C'},
   {"disable-writable-misa",       no_argument,       0, 'I'},
+  {"disable-fdext",               no_argument,       0, 'F'},
   {"mtval-has-illegal-inst-bits", no_argument,       0, 'i'},
   {"device-tree-blob",            required_argument, 0, 'b'},
   {"terminal-log",                required_argument, 0, 't'},
@@ -222,6 +223,7 @@ char *process_args(int argc, char **argv)
                     "v::"
                     "l:"
                     "g:"
+                    "F:"
                          , options, &idx);
     if (c == -1) break;
     switch (c) {
@@ -248,6 +250,10 @@ char *process_args(int argc, char **argv)
       fprintf(stderr, "disabling writable misa CSR.\n");
       rv_enable_writable_misa = false;
       break;
+    case 'F':
+      fprintf(stderr, "disabling floating point (F and D extensions).\n");
+      rv_enable_fdext = false;
+      break;
     case 'i':
       fprintf(stderr, "enabling storing illegal instruction bits in mtval.\n");
       rv_mtval_has_illegal_inst_bits = true;
@@ -321,7 +327,7 @@ char *process_args(int argc, char **argv)
   }
   if (do_dump_dts) dump_dts();
 #ifdef RVFI_DII
-  if (idx > argc || (idx == argc && !rvfi_dii)) print_usage(argv[0], 0);
+  if (optind > argc || (optind == argc && !rvfi_dii)) print_usage(argv[0], 0);
 #else
   if (optind >= argc) {
     fprintf(stderr, "No elf file provided.\n");
@@ -707,39 +713,37 @@ void run_sail(void)
     fprintf(stderr, "Cannot gettimeofday: %s\n", strerror(errno));
     exit(1);
   }
-  
+
   while (!zhtif_done && (insn_limit == 0 || total_insns < insn_limit)) {
 #ifdef RVFI_DII
     if (rvfi_dii) {
-      if (need_instr) {
-        mach_bits instr_bits;
-        int res = read(rvfi_dii_sock, &instr_bits, sizeof(instr_bits));
-        if (res == 0) {
-          rvfi_dii = false;
-          return;
-        }
-        if (res < sizeof(instr_bits)) {
-          fprintf(stderr, "Reading RVFI DII command failed: insufficient input");
-          exit(1);
-        }
-        if (res == -1) {
-          fprintf(stderr, "Reading RVFI DII command failed: %s", strerror(errno));
-          exit(1);
-        }
-        zrvfi_set_instr_packet(instr_bits);
-        zrvfi_zzero_exec_packet(UNIT);
-        mach_bits cmd = zrvfi_get_cmd(UNIT);
-        switch (cmd) {
-        case 0: /* EndOfTrace */
-          zrvfi_halt_exec_packet(UNIT);
-          rvfi_send_trace();
-          return;
-        case 1: /* Instruction */
-          break;
-        default:
-          fprintf(stderr, "Unknown RVFI-DII command: %d\n", (int)cmd);
-          exit(1);
-        }
+      mach_bits instr_bits;
+      int res = read(rvfi_dii_sock, &instr_bits, sizeof(instr_bits));
+      if (res == 0) {
+        rvfi_dii = false;
+        return;
+      }
+      if (res < sizeof(instr_bits)) {
+        fprintf(stderr, "Reading RVFI DII command failed: insufficient input");
+        exit(1);
+      }
+      if (res == -1) {
+        fprintf(stderr, "Reading RVFI DII command failed: %s", strerror(errno));
+        exit(1);
+      }
+      zrvfi_set_instr_packet(instr_bits);
+      zrvfi_zzero_exec_packet(UNIT);
+      mach_bits cmd = zrvfi_get_cmd(UNIT);
+      switch (cmd) {
+      case 0: /* EndOfTrace */
+        zrvfi_halt_exec_packet(UNIT);
+        rvfi_send_trace();
+        return;
+      case 1: /* Instruction */
+        break;
+      default:
+        fprintf(stderr, "Unknown RVFI-DII command: %d\n", (int)cmd);
+        exit(1);
       }
       sail_int sail_step;
       CREATE(sail_int)(&sail_step);
@@ -748,12 +752,9 @@ void run_sail(void)
       KILL(sail_int)(&sail_step);
       if (have_exception) goto step_exception;
       flush_logs();
-      if (stepped) {
-        need_instr = true;
-        rvfi_send_trace();
-      } else
-        need_instr = false;
-    } else
+      KILL(sail_int)(&sail_step);
+      rvfi_send_trace();
+    } else /* if (!rvfi_dii) */
 #endif
     { /* run a Sail step */
       sail_int sail_step;
diff --git a/c_emulator/riscv_softfloat.c b/c_emulator/riscv_softfloat.c
new file mode 100644
index 0000000..fde7e1f
--- /dev/null
+++ b/c_emulator/riscv_softfloat.c
@@ -0,0 +1,399 @@
+#include "sail.h"
+#include "rts.h"
+#include "riscv_sail.h"
+#include "riscv_softfloat.h"
+#include "softfloat.h"
+
+static uint_fast8_t uint8_of_rm(mach_bits rm) {
+  // TODO.
+  return (uint_fast8_t)rm;
+}
+
+#define SOFTFLOAT_PRELUDE(rm)                           \
+  softfloat_exceptionFlags = 0;                         \
+  softfloat_roundingMode = (uint_fast8_t) rm
+
+#define SOFTFLOAT_POSTLUDE(res)                         \
+  zfloat_result = res.v;                                \
+  zfloat_fflags = (mach_bits) softfloat_exceptionFlags
+
+unit softfloat_f32add(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f32_add(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32sub(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f32_sub(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32mul(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f32_mul(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32div(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f32_div(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64add(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f64_add(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64sub(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f64_sub(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64mul(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f64_mul(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64div(mach_bits rm, mach_bits v1, mach_bits v2) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, b, res;
+  a.v = v1;
+  b.v = v2;
+  res = f64_div(a, b);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, b, c, res;
+  a.v = v1;
+  b.v = v2;
+  c.v = v3;
+  res = f32_mulAdd(a, b, c);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, b, c, res;
+  a.v = v1;
+  b.v = v2;
+  c.v = v3;
+  res = f64_mulAdd(a, b, c);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32sqrt(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, res;
+  a.v = v;
+  res = f32_sqrt(a);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64sqrt(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, res;
+  a.v = v;
+  res = f64_sqrt(a);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+// The boolean 'true' argument in the conversion calls below selects
+// 'exact' conversion, which sets the Inexact exception flag if
+// needed.
+unit softfloat_f32toi32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f32_to_i32(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32toui32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a, res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f32_to_ui32(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32toi64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a;
+  float64_t res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f32_to_i64(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32toui64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a;
+  float64_t res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f32_to_ui64(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64toi32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a;
+  float32_t res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f64_to_i32(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64toui32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a;
+  float32_t res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f64_to_ui32(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64toi64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f64_to_i64(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64toui64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a, res;
+  uint_fast8_t rm8 = uint8_of_rm(rm);
+  a.v = v;
+  res.v = f64_to_ui64(a, rm8, true);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_i32tof32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t res;
+  res = i32_to_f32((int32_t)v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_ui32tof32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t res;
+  res = ui32_to_f32((uint32_t)v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_i64tof32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t res;
+  res = i64_to_f32(v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_ui64tof32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t res;
+  res = ui64_to_f32(v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_i32tof64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t res;
+  res = i32_to_f64((int32_t)v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_ui32tof64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t res;
+  res = ui32_to_f64((uint32_t)v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_i64tof64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t res;
+  res = i64_to_f64(v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_ui64tof64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t res;
+  res = ui64_to_f64(v);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f32tof64(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float32_t a;
+  float64_t res;
+  a.v = v;
+  res = f32_to_f64(a);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
+
+unit softfloat_f64tof32(mach_bits rm, mach_bits v) {
+  SOFTFLOAT_PRELUDE(rm);
+
+  float64_t a;
+  float32_t res;
+  a.v = v;
+  res = f64_to_f32(a);
+
+  SOFTFLOAT_POSTLUDE(res);
+
+  return UNIT;
+}
diff --git a/c_emulator/riscv_softfloat.h b/c_emulator/riscv_softfloat.h
new file mode 100644
index 0000000..bd7edf0
--- /dev/null
+++ b/c_emulator/riscv_softfloat.h
@@ -0,0 +1,40 @@
+#pragma once
+
+unit softfloat_f32add(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f32sub(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f32mul(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f32div(mach_bits rm, mach_bits v1, mach_bits v2);
+
+unit softfloat_f64add(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f64sub(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f64mul(mach_bits rm, mach_bits v1, mach_bits v2);
+unit softfloat_f64div(mach_bits rm, mach_bits v1, mach_bits v2);
+
+unit softfloat_f32muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3);
+unit softfloat_f64muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3);
+
+unit softfloat_f32sqrt(mach_bits rm, mach_bits v);
+unit softfloat_f64sqrt(mach_bits rm, mach_bits v);
+
+unit softfloat_f32toi32(mach_bits rm, mach_bits v);
+unit softfloat_f32toui32(mach_bits rm, mach_bits v);
+unit softfloat_f32toi64(mach_bits rm, mach_bits v);
+unit softfloat_f32toui64(mach_bits rm, mach_bits v);
+
+unit softfloat_f64toi32(mach_bits rm, mach_bits v);
+unit softfloat_f64toui32(mach_bits rm, mach_bits v);
+unit softfloat_f64toi64(mach_bits rm, mach_bits v);
+unit softfloat_f64toui64(mach_bits rm, mach_bits v);
+
+unit softfloat_i32tof32(mach_bits rm, mach_bits v);
+unit softfloat_ui32tof32(mach_bits rm, mach_bits v);
+unit softfloat_i64tof32(mach_bits rm, mach_bits v);
+unit softfloat_ui64tof32(mach_bits rm, mach_bits v);
+
+unit softfloat_i32tof64(mach_bits rm, mach_bits v);
+unit softfloat_ui32tof64(mach_bits rm, mach_bits v);
+unit softfloat_i64tof64(mach_bits rm, mach_bits v);
+unit softfloat_ui64tof64(mach_bits rm, mach_bits v);
+
+unit softfloat_f32tof64(mach_bits rm, mach_bits v);
+unit softfloat_f64tof32(mach_bits rm, mach_bits v);
diff --git a/doc/notes_FD_extensions.md b/doc/notes_FD_extensions.md
new file mode 100644
index 0000000..72740cc
--- /dev/null
+++ b/doc/notes_FD_extensions.md
@@ -0,0 +1,60 @@
+Notes on F and D extensions (floating point) in the SAIL RISC-V Model
+=====================================================================
+
+Questions? Rishiyur Nikhil (github id: `rsnikhil`), Bluespec, Inc.
+
+The main original SAIL RISC-V repo is [here](https://github.com/rems-project/sail-riscv)
+
+[Current working directory](https://github.com/rsnikhil/sail-riscv.git).
+This is a fork of the main original repo, on which we have added the SAIL code for F and D extensions.
+This will be merged back into the main original repo after testing.
+
+---
+
+Status (2019-10-24)
+-------------------
+
+1. Complete (almost): SAIL coding [Rishiyur Nikhil, Bluespec, Inc.]  
+   Remaining: tweaks to handle illegal rounding modes.
+2. In progress: Incorporate Berkeley SoftFloat calls [U.Cambridge]
+3. To do: Testing on all ISA tests
+
+Should not take more than a few days to complete the remaining work.
+
+---
+
+Files (all are in "model/" directory)
+-------------------------------------
+
+Changed file:
+Added two one-line predicates `haveFExt()` and `haveDExt()` that test whether MISA.F and MISA.D are set:
+
+        riscv_sys_regs.sail
+
+New files:
+Definition for FLEN and bit-vectors holding floating point values.
+The former should be used if only F is supported,
+the latter if F and D are supported:
+
+        riscv_flen_F.sail
+        riscv_flen_D.sail
+
+New file: A few more definitions for floating point registers.
+
+        riscv_freg_type.sail
+
+New file: The floating point register file and floating point CSRs:
+
+        riscv_fdext_regs.sail
+
+New files: The main files for F and D, respectively, containing AST
+definitions, binary encode/decode mappings, assembly code generation,
+and execution semantics:
+
+        riscv_insts_fext.sail
+        riscv_insts_dext.sail
+
+Functions that call out to Berkeley SoftFloat (implemented in C) to
+perform the core floating point computations:
+
+        riscv_softfloat_interface.sail
diff --git a/generated_definitions/ast/riscv-ast-raw.txt b/generated_definitions/ast/riscv-ast-raw.txt
new file mode 100644
index 0000000..2b5b8bf
--- /dev/null
+++ b/generated_definitions/ast/riscv-ast-raw.txt
@@ -0,0 +1 @@
+Defs([(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("internal_pick"),Unknown),[_: "internal_pick"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,:1),Kid_aux(Var("'a"),:1)),:1)),:1))]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1)),:1))]),:1))],Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_bool"),Unknown),[_: "undefined_bool"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("bool"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_bit"),Unknown),[_: "undefined_bit"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("bit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_int"),Unknown),[_: "undefined_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("int"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_nat"),Unknown),[_: "undefined_nat"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("nat"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_real"),Unknown),[_: "undefined_real"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("real"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_string"),Unknown),[_: "undefined_string"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("string"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_list"),Unknown),[_: "undefined_list"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,:1),Kid_aux(Var("'a"),:1)),:1)),:1))]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1)),:1))]),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_range"),Unknown),[_: "undefined_range"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,:1),Kid_aux(Var("'n"),:1)),:1)),:1));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,:1),Kid_aux(Var("'m"),:1)),:1)),:1))]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("atom"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),:1)),:1)),:1))]),:1))],Typ_aux(Typ_app(Id_aux(Id("range"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),:1)),:1)),:1))]),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_vector"),Unknown),[_: "undefined_vector"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,:1),Kid_aux(Var("'n"),:1)),:1)),:1));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,:1),Kid_aux(Var("'a"),:1)),:1)),:1));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_order,:1),Kid_aux(Var("'ord"),:1)),:1)),:1))]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("vector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1));(A_aux(A_order(Ord_aux(Ord_var(Kid_aux(Var("'ord"),:1)),:1)),:1));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),:1)),:1)),:1))]),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_bitvector"),Unknown),[_: "undefined_bitvector"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,:1),Kid_aux(Var("'n"),:1)),:1)),:1))]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1))]),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),:1)),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_unit"),Unknown),[_: "undefined_unit"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_default(DT_aux(DT_order(Ord_aux(Ord_dec,model/prelude.sail:1)),model/prelude.sail:1)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ediv_int"),../sail/lib/smt.sail:7),[ocaml: "quotient",interpreter: "quotient",lem: "integerDiv",c: "ediv_int",coq: "ediv_with_eq"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/smt.sail:13),Kid_aux(Var("'n"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/smt.sail:13),Kid_aux(Var("'m"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))]),../sail/lib/smt.sail:13),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:13),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))]),../sail/lib/smt.sail:13));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:13),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))]),../sail/lib/smt.sail:13))],Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:13),[(A_aux(A_nexp(Nexp_aux(Nexp_app(Id_aux(Id("div"),../sail/lib/smt.sail:13),[(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13));(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))]),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))]),../sail/lib/smt.sail:13),Effect_aux(Effect_set([]),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13)),../sail/lib/smt.sail:13))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("emod_int"),../sail/lib/smt.sail:15),[ocaml: "modulus",interpreter: "modulus",lem: "integerMod",c: "emod_int",coq: "emod_with_eq"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/smt.sail:21),Kid_aux(Var("'n"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/smt.sail:21),Kid_aux(Var("'m"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))]),../sail/lib/smt.sail:21),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:21),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))]),../sail/lib/smt.sail:21));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:21),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))]),../sail/lib/smt.sail:21))],Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:21),[(A_aux(A_nexp(Nexp_aux(Nexp_app(Id_aux(Id("mod"),../sail/lib/smt.sail:21),[(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21));(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))]),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))]),../sail/lib/smt.sail:21),Effect_aux(Effect_set([]),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21)),../sail/lib/smt.sail:21))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("abs_int_atom"),../sail/lib/smt.sail:23),[ocaml: "abs_int",interpreter: "abs_int",lem: "abs_int",c: "abs_int",coq: "abs_with_eq"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/smt.sail:29),Kid_aux(Var("'n"),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29))]),../sail/lib/smt.sail:29),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:29),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29))]),../sail/lib/smt.sail:29))],Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/smt.sail:29),[(A_aux(A_nexp(Nexp_aux(Nexp_app(Id_aux(Id("abs"),../sail/lib/smt.sail:29),[(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29))]),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29))]),../sail/lib/smt.sail:29),Effect_aux(Effect_set([]),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29)),../sail/lib/smt.sail:29))));(DEF_overload(Id_aux(Id("abs_int"),../sail/lib/smt.sail:31),[(Id_aux(Id("abs_int_atom"),../sail/lib/smt.sail:31))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_option"),../sail/lib/option.sail:9),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,../sail/lib/option.sail:9),Kid_aux(Var("'a"),../sail/lib/option.sail:9)),../sail/lib/option.sail:9)),../sail/lib/option.sail:9))]),../sail/lib/option.sail:9),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_option"),../sail/lib/option.sail:9),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("typ_a"),../sail/lib/option.sail:9)),Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/option.sail:11)),../sail/lib/option.sail:11),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/option.sail:11)),../sail/lib/option.sail:11))),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/option.sail:11)),../sail/lib/option.sail:11)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/option.sail:11)),../sail/lib/option.sail:11))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:10)),../sail/lib/option.sail:10),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:10)),../sail/lib/option.sail:10))),Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:10)),../sail/lib/option.sail:10)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:10)),../sail/lib/option.sail:10))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Some"),../sail/lib/option.sail:10),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:10)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("None"),../sail/lib/option.sail:11),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/option.sail:11)),../sail/lib/option.sail:11)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/option.sail:9)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("is_none"),.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"not"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_bool,../sail/lib/flow.sail:18),Kid_aux(Var("'p"),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'p"),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18))],Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'p"),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18),Effect_aux(Effect_set([]),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("and_bool"),../sail/lib/flow.sail:22),[coq: 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"negate",lem: "integerNegate",c: "neg_int",coq: "Z.opp"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:34)),../sail/lib/arith.sail:34))],Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:34)),../sail/lib/arith.sail:34),Effect_aux(Effect_set([]),../sail/lib/arith.sail:34)),../sail/lib/arith.sail:34)),../sail/lib/arith.sail:34))));(DEF_overload(Id_aux(Id("negate"),../sail/lib/arith.sail:36),[(Id_aux(Id("negate_atom"),../sail/lib/arith.sail:36));(Id_aux(Id("negate_int"),../sail/lib/arith.sail:36))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("mult_atom"),../sail/lib/arith.sail:40),[ocaml: "mult",interpreter: "mult",lem: "integerMult",c: "mult_int",coq: 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"Z.rem"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:97)),../sail/lib/arith.sail:97));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:97)),../sail/lib/arith.sail:97))],Typ_aux(Typ_id(Id_aux(Id("nat"),../sail/lib/arith.sail:97)),../sail/lib/arith.sail:97),Effect_aux(Effect_set([]),../sail/lib/arith.sail:97)),../sail/lib/arith.sail:97)),../sail/lib/arith.sail:97))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("abs_int_plain"),../sail/lib/arith.sail:99),[smt: "abs",ocaml: "abs_int",interpreter: "abs_int",lem: "integerAbs",c: "abs_int",coq: "Z.abs"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:106)),../sail/lib/arith.sail:106))],Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/arith.sail:106)),../sail/lib/arith.sail:106),Effect_aux(Effect_set([]),../sail/lib/arith.sail:106)),../sail/lib/arith.sail:106)),../sail/lib/arith.sail:106))));(DEF_overload(Id_aux(Id("abs_int"),../sail/lib/arith.sail:108),[(Id_aux(Id("abs_int_plain"),../sail/lib/arith.sail:108))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("eq_string"),../sail/lib/string.sail:6),[lem: "eq",coq: "generic_eq",_: "eq_string"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:6)),../sail/lib/string.sail:6));(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:6)),../sail/lib/string.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/string.sail:6)),../sail/lib/string.sail:6),Effect_aux(Effect_set([]),../sail/lib/string.sail:6)),../sail/lib/string.sail:6)),../sail/lib/string.sail:6))));(DEF_overload(Id_aux(Operator("=="),../sail/lib/string.sail:8),[(Id_aux(Id("eq_string"),../sail/lib/string.sail:8))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("concat_str"),../sail/lib/string.sail:10),[coq: "String.append",lem: "stringAppend",_: "concat_str"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10));(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10),Effect_aux(Effect_set([]),../sail/lib/string.sail:10)),../sail/lib/string.sail:10)),../sail/lib/string.sail:10))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("dec_str"),../sail/lib/string.sail:12),[_: "dec_str"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/string.sail:12)),../sail/lib/string.sail:12))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:12)),../sail/lib/string.sail:12),Effect_aux(Effect_set([]),../sail/lib/string.sail:12)),../sail/lib/string.sail:12)),../sail/lib/string.sail:12))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_str"),../sail/lib/string.sail:14),[_: "hex_str"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/string.sail:14)),../sail/lib/string.sail:14))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:14)),../sail/lib/string.sail:14),Effect_aux(Effect_set([]),../sail/lib/string.sail:14)),../sail/lib/string.sail:14)),../sail/lib/string.sail:14))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bits_str"),../sail/lib/string.sail:16),[_: "string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/string.sail:16),Kid_aux(Var("'n"),../sail/lib/string.sail:16)),../sail/lib/string.sail:16)),../sail/lib/string.sail:16))]),../sail/lib/string.sail:16),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:16),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:16)),../sail/lib/string.sail:16)),../sail/lib/string.sail:16));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:16)),../sail/lib/string.sail:16))]),../sail/lib/string.sail:16))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:16)),../sail/lib/string.sail:16),Effect_aux(Effect_set([]),../sail/lib/string.sail:16)),../sail/lib/string.sail:16)),../sail/lib/string.sail:16))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("concat_str_bits"),../sail/lib/string.sail:18),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/string.sail:18),Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18),Effect_aux(Effect_set([]),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("concat_str_bits"),../sail/lib/string.sail:20),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("str"),../sail/lib/string.sail:20)),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)));(P_aux(P_id(Id_aux(Id("x"),../sail/lib/string.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18))]),../sail/lib/string.sail:20)),E_aux(E_app(Id_aux(Id("concat_str"),../sail/lib/string.sail:20),[(E_aux(E_id(Id_aux(Id("str"),../sail/lib/string.sail:20)),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)));(E_aux(E_app(Id_aux(Id("bits_str"),../sail/lib/string.sail:20),[(E_aux(E_id(Id_aux(Id("x"),../sail/lib/string.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:16)),../sail/lib/string.sail:16)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/string.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)),../sail/lib/string.sail:18));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/string.sail:18)),../sail/lib/string.sail:18))]),../sail/lib/string.sail:18))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:18)),../sail/lib/string.sail:18),Effect_aux(Effect_set([]),../sail/lib/string.sail:18)),../sail/lib/string.sail:18)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("concat_str_dec"),../sail/lib/string.sail:22),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22),Effect_aux(Effect_set([]),../sail/lib/string.sail:22)),../sail/lib/string.sail:22)),../sail/lib/string.sail:22))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("concat_str_dec"),../sail/lib/string.sail:24),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("str"),../sail/lib/string.sail:24)),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22)));(P_aux(P_id(Id_aux(Id("x"),../sail/lib/string.sail:24)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex33#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex33#"),Unknown)),Unknown)),Unknown))]),Unknown))]),../sail/lib/string.sail:24)),E_aux(E_app(Id_aux(Id("concat_str"),../sail/lib/string.sail:24),[(E_aux(E_id(Id_aux(Id("str"),../sail/lib/string.sail:24)),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22)));(E_aux(E_app(Id_aux(Id("dec_str"),../sail/lib/string.sail:24),[(E_aux(E_id(Id_aux(Id("x"),../sail/lib/string.sail:24)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex33#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:12)),../sail/lib/string.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex33#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:22)),../sail/lib/string.sail:22),Effect_aux(Effect_set([]),../sail/lib/string.sail:22)),../sail/lib/string.sail:22)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_endline"),../sail/lib/string.sail:26),[_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:26)),../sail/lib/string.sail:26))],Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/string.sail:26)),../sail/lib/string.sail:26),Effect_aux(Effect_set([]),../sail/lib/string.sail:26)),../sail/lib/string.sail:26)),../sail/lib/string.sail:26))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("prerr_endline"),../sail/lib/string.sail:28),[_: "prerr_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:28)),../sail/lib/string.sail:28))],Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/string.sail:28)),../sail/lib/string.sail:28),Effect_aux(Effect_set([]),../sail/lib/string.sail:28)),../sail/lib/string.sail:28)),../sail/lib/string.sail:28))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:8),[ocaml: "eq_list",interpreter: "eq_list",lem: "eq_vec",c: "eq_bits",coq: "eq_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:14),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))]),../sail/lib/vector_dec.sail:14),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))));(DEF_overload(Id_aux(Operator("=="),../sail/lib/vector_dec.sail:16),[(Id_aux(Id("eq_bit"),../sail/lib/vector_dec.sail:16));(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("neq_bits"),../sail/lib/vector_dec.sail:18),[lem: "neq_vec",c: "neq_bits",coq: "neq_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:22),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22))]),../sail/lib/vector_dec.sail:22),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("neq_bits"),../sail/lib/vector_dec.sail:24),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("x"),../sail/lib/vector_dec.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("y"),../sail/lib/vector_dec.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:24)),E_aux(E_app(Id_aux(Id("not_bool"),../sail/lib/vector_dec.sail:24),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:24),[(E_aux(E_id(Id_aux(Id("x"),../sail/lib/vector_dec.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("y"),../sail/lib/vector_dec.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex42#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex42#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_a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"length_mword",_: "length"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:28),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28))]),../sail/lib/vector_dec.sail:28),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:28),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28))]),../sail/lib/vector_dec.sail:28),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28)),../sail/lib/vector_dec.sail:28))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("vector_length"),../sail/lib/vector_dec.sail:30),[ocaml: "length",interpreter: "length",lem: "length_list",c: "length",coq: "vec_length"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:36),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,../sail/lib/vector_dec.sail:36),Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36))]),../sail/lib/vector_dec.sail:36),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("vector"),../sail/lib/vector_dec.sail:36),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36))]),../sail/lib/vector_dec.sail:36))],Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:36),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36))]),../sail/lib/vector_dec.sail:36),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36)),../sail/lib/vector_dec.sail:36))));(DEF_overload(Id_aux(Id("length"),../sail/lib/vector_dec.sail:38),[(Id_aux(Id("bitvector_length"),../sail/lib/vector_dec.sail:38));(Id_aux(Id("vector_length"),../sail/lib/vector_dec.sail:38))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("count_leading_zeros"),../sail/lib/vector_dec.sail:40),[_: "count_leading_zeros"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:40),Kid_aux(Var("'N"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'N"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40))]),../sail/lib/vector_dec.sail:40),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'N"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:40),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:40),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40),Nexp_aux(Nexp_var(Kid_aux(Var("'N"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40),Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:40),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40))]),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40)),../sail/lib/vector_dec.sail:40))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_bits"),../sail/lib/vector_dec.sail:49),[_: "print_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:49),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49))]),../sail/lib/vector_dec.sail:49),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49)),../sail/lib/vector_dec.sail:49))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("prerr_bits"),../sail/lib/vector_dec.sail:51),[_: "prerr_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:51),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51))]),../sail/lib/vector_dec.sail:51),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51)),../sail/lib/vector_dec.sail:51))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_sign_extend"),../sail/lib/vector_dec.sail:53),[_: "sign_extend"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:53),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:53),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53))]),../sail/lib/vector_dec.sail:53),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:53),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53))]),../sail/lib/vector_dec.sail:53))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53)),../sail/lib/vector_dec.sail:53))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_zero_extend"),../sail/lib/vector_dec.sail:55),[_: "zero_extend"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:55),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:55),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55))]),../sail/lib/vector_dec.sail:55),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:55),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55))]),../sail/lib/vector_dec.sail:55))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55)),../sail/lib/vector_dec.sail:55))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("truncate"),../sail/lib/vector_dec.sail:60),[ocaml: "vector_truncate",interpreter: "vector_truncate",lem: "vector_truncate",coq: "vector_truncate",c: "sail_truncate"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:66),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:66),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66))]),../sail/lib/vector_dec.sail:66),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:66),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66))]),../sail/lib/vector_dec.sail:66))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66)),../sail/lib/vector_dec.sail:66))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("truncateLSB"),../sail/lib/vector_dec.sail:71),[ocaml: "vector_truncateLSB",interpreter: "vector_truncateLSB",lem: "vector_truncateLSB",coq: "vector_truncateLSB",c: "sail_truncateLSB"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:77),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:77),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77))]),../sail/lib/vector_dec.sail:77),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:77),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77))]),../sail/lib/vector_dec.sail:77))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77)),../sail/lib/vector_dec.sail:77))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_mask"),../sail/lib/vector_dec.sail:79),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:79),Kid_aux(Var("'len"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:79),Kid_aux(Var("'v"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'len"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79),NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'v"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79))]),../sail/lib/vector_dec.sail:79),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:79),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'len"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79))]),../sail/lib/vector_dec.sail:79));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'v"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'len"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("sail_mask"),../sail/lib/vector_dec.sail:81),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("len"),../sail/lib/vector_dec.sail:81)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'len"),../sail/lib/vector_dec.sail:79)),../sail/lib/vector_dec.sail:79)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("v"),../sail/lib/vector_dec.sail:81)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var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"access",interpreter: "access",lem: "access_vec_dec",coq: "access_vec_dec",c: "vector_access"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:99),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:99),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:99),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99))]),../sail/lib/vector_dec.sail:99),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:99),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99))]),../sail/lib/vector_dec.sail:99))],Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plain_vector_access"),../sail/lib/vector_dec.sail:101),[ocaml: "access",interpreter: "access",lem: "access_list_dec",coq: "vec_access_dec",c: "vector_access"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:107),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:107),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,../sail/lib/vector_dec.sail:107),Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:107),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107))]),../sail/lib/vector_dec.sail:107),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("vector"),../sail/lib/vector_dec.sail:107),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107))]),../sail/lib/vector_dec.sail:107));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:107),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107))]),../sail/lib/vector_dec.sail:107))],Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107)),../sail/lib/vector_dec.sail:107))));(DEF_overload(Id_aux(Id("vector_access"),../sail/lib/vector_dec.sail:109),[(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109));(Id_aux(Id("plain_vector_access"),../sail/lib/vector_dec.sail:109))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bitvector_update"),../sail/lib/vector_dec.sail:111),[ocaml: "update",interpreter: "update",lem: "update_vec_dec",coq: "update_vec_dec",c: "vector_update"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:117),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:117),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:117),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117))]),../sail/lib/vector_dec.sail:117),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:117),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117))]),../sail/lib/vector_dec.sail:117));(Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117)),../sail/lib/vector_dec.sail:117))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plain_vector_update"),../sail/lib/vector_dec.sail:119),[ocaml: "update",interpreter: "update",lem: "update_list_dec",coq: "vec_update_dec",c: "vector_update"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:125),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:125),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,../sail/lib/vector_dec.sail:125),Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:125),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))]),../sail/lib/vector_dec.sail:125),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("vector"),../sail/lib/vector_dec.sail:125),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))]),../sail/lib/vector_dec.sail:125));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:125),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))]),../sail/lib/vector_dec.sail:125));(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))],Typ_aux(Typ_app(Id_aux(Id("vector"),../sail/lib/vector_dec.sail:125),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))]),../sail/lib/vector_dec.sail:125),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125)),../sail/lib/vector_dec.sail:125))));(DEF_overload(Id_aux(Id("vector_update"),../sail/lib/vector_dec.sail:127),[(Id_aux(Id("bitvector_update"),../sail/lib/vector_dec.sail:127));(Id_aux(Id("plain_vector_update"),../sail/lib/vector_dec.sail:127))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("add_bits"),../sail/lib/vector_dec.sail:129),[ocaml: "add_vec",interpreter: "add_vec",lem: "add_vec",c: "add_bits",coq: "add_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:135),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135))]),../sail/lib/vector_dec.sail:135),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135)),../sail/lib/vector_dec.sail:135))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("add_bits_int"),../sail/lib/vector_dec.sail:137),[ocaml: "add_vec_int",interpreter: "add_vec_int",lem: "add_vec_int",c: "add_bits_int",coq: "add_vec_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:143),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143))]),../sail/lib/vector_dec.sail:143),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143)),../sail/lib/vector_dec.sail:143))));(DEF_overload(Id_aux(Operator("+"),../sail/lib/vector_dec.sail:145),[(Id_aux(Id("add_bits"),../sail/lib/vector_dec.sail:145));(Id_aux(Id("add_bits_int"),../sail/lib/vector_dec.sail:145))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sub_bits"),../sail/lib/vector_dec.sail:147),[ocaml: "sub_vec",lem: "sub_vec",c: "sub_bits",coq: "sub_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:152),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152))]),../sail/lib/vector_dec.sail:152),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152)),../sail/lib/vector_dec.sail:152))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("not_vec"),../sail/lib/vector_dec.sail:154),[c: "not_bits",_: "not_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:154),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154))]),../sail/lib/vector_dec.sail:154),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154)),../sail/lib/vector_dec.sail:154))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:156),[lem: "and_vec",c: "and_bits",coq: "and_vec",ocaml: "and_vec",interpreter: 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"or_vec",c: "or_bits",coq: "or_vec",ocaml: "or_vec",interpreter: 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"subrange",interpreter: "subrange",lem: "subrange_vec_dec",c: "vector_subrange",coq: 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"shiftr"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:196),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:196)),../sail/lib/vector_dec.sail:196)),../sail/lib/vector_dec.sail:196));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_order,../sail/lib/vector_dec.sail:196),Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:196)),../sail/lib/vector_dec.sail:196)),../sail/lib/vector_dec.sail:196))]),../sail/lib/vector_dec.sail:196),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:197),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197));(A_aux(A_order(Ord_aux(Ord_var(Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197))]),../sail/lib/vector_dec.sail:197));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:197),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197));(A_aux(A_order(Ord_aux(Ord_var(Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:197))]),../sail/lib/vector_dec.sail:197),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:197)),../sail/lib/vector_dec.sail:196-197)),../sail/lib/vector_dec.sail:196-197))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_arith_shiftright"),../sail/lib/vector_dec.sail:199),[_: "arith_shiftr"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:199),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:199)),../sail/lib/vector_dec.sail:199)),../sail/lib/vector_dec.sail:199));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_order,../sail/lib/vector_dec.sail:199),Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:199)),../sail/lib/vector_dec.sail:199)),../sail/lib/vector_dec.sail:199))]),../sail/lib/vector_dec.sail:199),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:200),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200));(A_aux(A_order(Ord_aux(Ord_var(Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200))]),../sail/lib/vector_dec.sail:200));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:200),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200));(A_aux(A_order(Ord_aux(Ord_var(Kid_aux(Var("'ord"),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:200))]),../sail/lib/vector_dec.sail:200),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:200)),../sail/lib/vector_dec.sail:199-200)),../sail/lib/vector_dec.sail:199-200))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_zeros"),../sail/lib/vector_dec.sail:202),[_: "zeros"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:202),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202))]),../sail/lib/vector_dec.sail:202),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:202),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202))]),../sail/lib/vector_dec.sail:202))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202)),../sail/lib/vector_dec.sail:202))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sail_ones"),../sail/lib/vector_dec.sail:204),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:204),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204))]),../sail/lib/vector_dec.sail:204),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:204),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204))]),../sail/lib/vector_dec.sail:204))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("sail_ones"),../sail/lib/vector_dec.sail:206),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("n"),../sail/lib/vector_dec.sail:206)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("not_vec"),../sail/lib/vector_dec.sail:206),[(E_aux(E_app(Id_aux(Id("sail_zeros"),../sail/lib/vector_dec.sail:206),[(E_aux(E_id(Id_aux(Id("n"),../sail/lib/vector_dec.sail:206)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:204)),../sail/lib/vector_dec.sail:204)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("slice"),../sail/lib/vector_dec.sail:210),[_: "slice"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:210),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:210),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:210),Kid_aux(Var("'o"),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:210),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210),NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:210),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210)),../sail/lib/vector_dec.sail:210))]),../sail/lib/vector_dec.sail:210),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:211),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'o"),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211))]),../sail/lib/vector_dec.sail:211));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:211),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211))]),../sail/lib/vector_dec.sail:211))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:211)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:210-211)),../sail/lib/vector_dec.sail:210-211)),../sail/lib/vector_dec.sail:210-211))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("replicate_bits"),../sail/lib/vector_dec.sail:213),[_: "replicate_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:213),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:213),Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213))]),../sail/lib/vector_dec.sail:213),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:213),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213))]),../sail/lib/vector_dec.sail:213))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213)),../sail/lib/vector_dec.sail:213))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("slice_mask"),../sail/lib/vector_dec.sail:215),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:215),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215),Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215))]),../sail/lib/vector_dec.sail:215),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),../sail/lib/vector_dec.sail:215),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215))]),../sail/lib/vector_dec.sail:215));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("slice_mask"),../sail/lib/vector_dec.sail:216),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("n"),../sail/lib/vector_dec.sail:216)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("i"),../sail/lib/vector_dec.sail:216)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex152#"),Unknown)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("l"),../sail/lib/vector_dec.sail:216)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex153#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215)),../sail/lib/vector_dec.sail:215))]),../sail/lib/vector_dec.sail:215));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex152#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex153#"),Unknown)),Unknown)),Unknown))]),Unknown))]),../sail/lib/vector_dec.sail:216-222)),E_aux(E_if(E_aux(E_app(Id_aux(Id("gteq_int"),../sail/lib/flow.sail:50),[(E_aux(E_id(Id_aux(Id("l"),../sail/lib/vector_dec.sail:217)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unk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"get_slice_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:224),Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224))]),../sail/lib/vector_dec.sail:224),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:224),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224))]),../sail/lib/vector_dec.sail:224));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224)),../sail/lib/vector_dec.sail:224))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_slice_int"),../sail/lib/vector_dec.sail:226),[_: "set_slice_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:226),Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226))]),../sail/lib/vector_dec.sail:226),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/vector_dec.sail:226),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226))]),../sail/lib/vector_dec.sail:226));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226));(Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'w"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("int"),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226)),../sail/lib/vector_dec.sail:226))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_slice_bits"),../sail/lib/vector_dec.sail:228),[_: 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"uint",lem: "uint",interpreter: "uint",c: "sail_unsigned",coq: "uint"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,../sail/lib/vector_dec.sail:240),Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))]),../sail/lib/vector_dec.sail:240),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("range"),../sail/lib/vector_dec.sail:240),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240));(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))]),../sail/lib/vector_dec.sail:240),Effect_aux(Effect_set([]),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("signed"),../sail/lib/vector_dec.sail:246),[c: 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Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),../sail/lib/regfp.sail:30)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("DIAFP_none"),../sail/lib/regfp.sail:29),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/regfp.sail:29)),../sail/lib/regfp.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28),[]),Unknown)));(E_aux(E_app(Id_aux(Id("DIAFP_concrete"),../sail/lib/regfp.sail:30),[(E_aux(E_id(Id_aux(Id("u_2"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),../sail/lib/regfp.sail:30)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28),[]),Unknown)));(E_aux(E_app(Id_aux(Id("DIAFP_reg"),../sail/lib/regfp.sail:31),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("regfp"),../sail/lib/regfp.sail:31)),../sail/lib/regfp.sail:31)))]),Typ_aux(Typ_app(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),:1))),Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("diafp"),../sail/lib/regfp.sail:28)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("read_kind_of_num"),../sail/lib/regfp.sail:34),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(11),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("read_kind"),../sail/lib/regfp.sail:34)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("read_kind_of_num"),../sail/lib/regfp.sail:34),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Read_plain"),../sail/lib/regfp.sail:35)),Typ_aux(Typ_id(Id_aux(Id("read_kind"),../sail/lib/regfp.sail:34)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Read_reserve"),../sail/lib/regfp.sail:36)),Typ_aux(Typ_id(Id_aux(Id("read_kind"),../sail/lib/regfp.sail:34)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Read_acquire"),../sail/lib/regfp.sail:37)),Typ_aux(Typ_id(Id_aux(Id("read_kind"),../sail/lib/regfp.sail:34)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Read_exclusive"),../sail/lib/regfp.sail:38)),Typ_aux(Typ_id(Id_aux(Id("read_kind"),../sail/lib/regfp.sail:34)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Read_exclusive_acquire"),..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"vector_update"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:24),Kid_aux(Var("'n"),model/prelude.sail:24)),model/prelude.sail:24)),model/prelude.sail:24));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/prelude.sail:24),Kid_aux(Var("'a"),model/prelude.sail:24)),model/prelude.sail:24)),model/prelude.sail:24))]),model/prelude.sail:24),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("vector"),model/prelude.sail:25),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:25)),model/prelude.sail:25)),model/prelude.sail:25));(A_aux(A_order(Ord_aux(Ord_dec,model/prelude.sail:25)),model/prelude.sail:25));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:25)),model/prelude.sail:25)),model/prelude.sail:25))]),model/prelude.sail:25));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:25)),model/prelude.sail:25));(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:25)),model/prelude.sail:25))],Typ_aux(Typ_app(Id_aux(Id("vector"),model/prelude.sail:25),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:25)),model/prelude.sail:25)),model/prelude.sail:25));(A_aux(A_order(Ord_aux(Ord_dec,model/prelude.sail:25)),model/prelude.sail:25));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:25)),model/prelude.sail:25)),model/prelude.sail:25))]),model/prelude.sail:25),Effect_aux(Effect_set([]),model/prelude.sail:24-25)),model/prelude.sail:24-25)),model/prelude.sail:24-25))));(DEF_overload(Id_aux(Id("vector_update"),model/prelude.sail:27),[(Id_aux(Id("any_vector_update"),model/prelude.sail:27))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("update_subrange"),model/prelude.sail:29),[ocaml: "update_subrange",interpreter: "update_subrange",lem: "update_subrange_vec_dec",coq: "update_subrange_vec_dec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:29),Kid_aux(Var("'n"),model/prelude.sail:29)),model/prelude.sail:29)),model/prelude.sail:29));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:29),Kid_aux(Var("'m"),model/prelude.sail:29)),model/prelude.sail:29)),model/prelude.sail:29));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:29),Kid_aux(Var("'o"),model/prelude.sail:29)),model/prelude.sail:29)),model/prelude.sail:29))]),model/prelude.sail:29),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:30)),model/prelude.sail:30)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:30),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:30)),model/prelude.sail:30)),model/prelude.sail:30))]),model/prelude.sail:30));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:30),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'o"),model/prelude.sail:30)),model/prelude.sail:30)),model/prelude.sail:30))]),model/prelude.sail:30));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:30)),model/prelude.sail:30),Nexp_aux(Nexp_minus(Nexp_aux(Nexp_var(Kid_aux(Var("'o"),model/prelude.sail:30)),model/prelude.sail:30),Nexp_aux(Nexp_constant(1),model/prelude.sail:30)),model/prelude.sail:30)),model/prelude.sail:30)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:30)),model/prelude.sail:30)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:29-30)),model/prelude.sail:29-30)),model/prelude.sail:29-30))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("vector_concat"),model/prelude.sail:32),[ocaml: "append",lem: "append_list",coq: "vec_concat"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:32),Kid_aux(Var("'n"),model/prelude.sail:32)),model/prelude.sail:32)),model/prelude.sail:32));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:32),Kid_aux(Var("'m"),model/prelude.sail:32)),model/prelude.sail:32)),model/prelude.sail:32));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/prelude.sail:32),Kid_aux(Var("'a"),model/prelude.sail:32)),model/prelude.sail:32)),model/prelude.sail:32))]),model/prelude.sail:32),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("vector"),model/prelude.sail:33),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_order(Ord_aux(Ord_dec,model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33))]),model/prelude.sail:33));(Typ_aux(Typ_app(Id_aux(Id("vector"),model/prelude.sail:33),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_order(Ord_aux(Ord_dec,model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33))]),model/prelude.sail:33))],Typ_aux(Typ_app(Id_aux(Id("vector"),model/prelude.sail:33),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:33)),model/prelude.sail:33),Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_order(Ord_aux(Ord_dec,model/prelude.sail:33)),model/prelude.sail:33));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:33)),model/prelude.sail:33)),model/prelude.sail:33))]),model/prelude.sail:33),Effect_aux(Effect_set([]),model/prelude.sail:32-33)),model/prelude.sail:32-33)),model/prelude.sail:32-33))));(DEF_overload(Id_aux(Id("append"),model/prelude.sail:35),[(Id_aux(Id("vector_concat"),model/prelude.sail:35))]));(DEF_overload(Id_aux(Id("~"),model/prelude.sail:37),[(Id_aux(Id("not_bool"),model/prelude.sail:37));(Id_aux(Id("not_vec"),model/prelude.sail:37))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("neq_vec"),model/prelude.sail:39),[lem: "neq"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:39),Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),model/prelude.sail:39))]),model/prelude.sail:39),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:39)),model/prelude.sail:39),Effect_aux(Effect_set([]),model/prelude.sail:39)),model/prelude.sail:39)),model/prelude.sail:39))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("neq_vec"),model/prelude.sail:41),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("x"),model/prelude.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("y"),model/prelude.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/prelude.sail:41)),E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:41),[(E_aux(E_app(Id_aux(Id("eq_bits"),model/prelude.sail:41),[(E_aux(E_id(Id_aux(Id("x"),model/prelude.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("y"),model/prelude.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex287#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex287#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:39)),model/prelude.sail:39)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:39)),model/prelude.sail:39),Effect_aux(Effect_set([]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"neq",coq: "generic_neq"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/prelude.sail:43),Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43)),model/prelude.sail:43))]),model/prelude.sail:43),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43));(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:43)),model/prelude.sail:43),Effect_aux(Effect_set([]),model/prelude.sail:43)),model/prelude.sail:43)),model/prelude.sail:43))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("neq_anything"),model/prelude.sail:45),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("x"),model/prelude.sail:45)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43)));(P_aux(P_id(Id_aux(Id("y"),model/prelude.sail:45)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43));(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43))]),model/prelude.sail:45)),E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:45),[(E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("x"),model/prelude.sail:45)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43)));(E_aux(E_id(Id_aux(Id("y"),model/prelude.sail:45)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex291#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex291#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43));(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/prelude.sail:43)),model/prelude.sail:43))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:43)),model/prelude.sail:43),Effect_aux(Effect_set([]),model/prelude.sail:43)),model/prelude.sail:43)))]),None)));(DEF_overload(Id_aux(Operator("!="),model/prelude.sail:47),[(Id_aux(Id("neq_vec"),model/prelude.sail:47));(Id_aux(Id("neq_anything"),model/prelude.sail:47))]));(DEF_overload(Id_aux(Operator("&"),model/prelude.sail:49),[(Id_aux(Id("and_vec"),model/prelude.sail:49))]));(DEF_overload(Id_aux(Operator("|"),model/prelude.sail:51),[(Id_aux(Id("or_vec"),model/prelude.sail:51))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("string_of_int"),model/prelude.sail:53),[c: "string_of_int",ocaml: "string_of_int",interpreter: "string_of_int",lem: "stringFromInteger",coq: "string_of_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:53)),model/prelude.sail:53))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:53)),model/prelude.sail:53),Effect_aux(Effect_set([]),model/prelude.sail:53)),model/prelude.sail:53)),model/prelude.sail:53))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("string_of_bits"),model/prelude.sail:55),[_: "string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:55),Kid_aux(Var("'n"),model/prelude.sail:55)),model/prelude.sail:55)),model/prelude.sail:55))]),model/prelude.sail:55),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:55)),model/prelude.sail:55)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:55)),model/prelude.sail:55),Effect_aux(Effect_set([]),model/prelude.sail:55)),model/prelude.sail:55)),model/prelude.sail:55))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("string_of_bit"),model/prelude.sail:57),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:57)),model/prelude.sail:57),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:57)),model/prelude.sail:57)),model/prelude.sail:57),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("string_of_bit"),model/prelude.sail:57),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57),P_aux(P_id(Id_aux(Id("b"),model/prelude.sail:57)),Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57))),Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57)),E_aux(E_case(E_aux(E_id(Id_aux(Id("b"),model/prelude.sail:58)),Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_zero,model/prelude.sail:59)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_string("0b0"),model/prelude.sail:59)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_one,model/prelude.sail:60)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_string("0b1"),model/prelude.sail:60)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:57)),model/prelude.sail:57))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:57)),model/prelude.sail:57))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:57)),model/prelude.sail:57),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_overload(Id_aux(Id("BitStr"),model/prelude.sail:63),[(Id_aux(Id("string_of_bits"),model/prelude.sail:63));(Id_aux(Id("string_of_bit"),model/prelude.sail:63))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("xor_vec"),model/prelude.sail:65),[c: "xor_bits",_: "xor_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:65),Kid_aux(Var("'n"),model/prelude.sail:65)),model/prelude.sail:65)),model/prelude.sail:65))]),model/prelude.sail:65),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:65)),model/prelude.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:65)),model/prelude.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:65)),model/prelude.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:65)),model/prelude.sail:65)),model/prelude.sail:65))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("int_power"),model/prelude.sail:67),[ocaml: "int_power",interpreter: "int_power",lem: "pow",coq: "pow",c: "pow_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:67)),model/prelude.sail:67));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:67)),model/prelude.sail:67))],Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:67)),model/prelude.sail:67),Effect_aux(Effect_set([]),model/prelude.sail:67)),model/prelude.sail:67)),model/prelude.sail:67))));(DEF_overload(Id_aux(Operator("^"),model/prelude.sail:69),[(Id_aux(Id("xor_vec"),model/prelude.sail:69));(Id_aux(Id("int_power"),model/prelude.sail:69));(Id_aux(Id("concat_str"),model/prelude.sail:69))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sub_vec"),model/prelude.sail:71),[c: "sub_bits",_: "sub_vec"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:71),Kid_aux(Var("'n"),model/prelude.sail:71)),model/prelude.sail:71)),model/prelude.sail:71))]),model/prelude.sail:71),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:71)),model/prelude.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:71)),model/prelude.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:71)),model/prelude.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:71)),model/prelude.sail:71)),model/prelude.sail:71))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sub_vec_int"),model/prelude.sail:73),[c: "sub_bits_int",_: "sub_vec_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:73),Kid_aux(Var("'n"),model/prelude.sail:73)),model/prelude.sail:73)),model/prelude.sail:73))]),model/prelude.sail:73),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:73)),model/prelude.sail:73)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:73)),model/prelude.sail:73))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:73)),model/prelude.sail:73)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:73)),model/prelude.sail:73)),model/prelude.sail:73))));(DEF_overload(Id_aux(Operator("-"),model/prelude.sail:75),[(Id_aux(Id("sub_vec"),model/prelude.sail:75));(Id_aux(Id("sub_vec_int"),model/prelude.sail:75))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("quot_round_zero"),model/prelude.sail:77),[ocaml: "quot_round_zero",interpreter: "quot_round_zero",lem: "hardware_quot",c: "tdiv_int",coq: "Z.quot"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:77)),model/prelude.sail:77));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:77)),model/prelude.sail:77))],Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:77)),model/prelude.sail:77),Effect_aux(Effect_set([]),model/prelude.sail:77)),model/prelude.sail:77)),model/prelude.sail:77))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rem_round_zero"),model/prelude.sail:78),[ocaml: "rem_round_zero",interpreter: "rem_round_zero",lem: "hardware_mod",c: "tmod_int",coq: "Z.rem"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:78)),model/prelude.sail:78));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:78)),model/prelude.sail:78))],Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:78)),model/prelude.sail:78),Effect_aux(Effect_set([]),model/prelude.sail:78)),model/prelude.sail:78)),model/prelude.sail:78))));(DEF_overload(Id_aux(Operator("%"),model/prelude.sail:81),[(Id_aux(Id("emod_int"),model/prelude.sail:81));(Id_aux(Id("mod"),model/prelude.sail:81))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("min_nat"),model/prelude.sail:83),[ocaml: "min_int",interpreter: "min_int",lem: "min",coq: "min_nat",c: "min_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:83)),model/prelude.sail:83));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:83)),model/prelude.sail:83))],Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:83)),model/prelude.sail:83),Effect_aux(Effect_set([]),model/prelude.sail:83)),model/prelude.sail:83)),model/prelude.sail:83))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("min_int"),model/prelude.sail:85),[ocaml: "min_int",interpreter: "min_int",lem: "min",coq: "Z.min",c: "min_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:85)),model/prelude.sail:85));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:85)),model/prelude.sail:85))],Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:85)),model/prelude.sail:85),Effect_aux(Effect_set([]),model/prelude.sail:85)),model/prelude.sail:85)),model/prelude.sail:85))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("max_nat"),model/prelude.sail:87),[ocaml: "max_int",interpreter: "max_int",lem: "max",coq: "max_nat",c: "max_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:87)),model/prelude.sail:87));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:87)),model/prelude.sail:87))],Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:87)),model/prelude.sail:87),Effect_aux(Effect_set([]),model/prelude.sail:87)),model/prelude.sail:87)),model/prelude.sail:87))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("max_int"),model/prelude.sail:89),[ocaml: "max_int",interpreter: "max_int",lem: "max",coq: "Z.max",c: "max_int"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:89)),model/prelude.sail:89));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:89)),model/prelude.sail:89))],Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:89)),model/prelude.sail:89),Effect_aux(Effect_set([]),model/prelude.sail:89)),model/prelude.sail:89)),model/prelude.sail:89))));(DEF_overload(Id_aux(Id("min"),model/prelude.sail:91),[(Id_aux(Id("min_nat"),model/prelude.sail:91));(Id_aux(Id("min_int"),model/prelude.sail:91))]));(DEF_overload(Id_aux(Id("max"),model/prelude.sail:93),[(Id_aux(Id("max_nat"),model/prelude.sail:93));(Id_aux(Id("max_int"),model/prelude.sail:93))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pow2"),model/prelude.sail:95),[_: "pow2"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:95),Kid_aux(Var("'n"),model/prelude.sail:95)),model/prelude.sail:95)),model/prelude.sail:95))]),model/prelude.sail:95),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:95),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:95)),model/prelude.sail:95)),model/prelude.sail:95))]),model/prelude.sail:95))],Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:95),[(A_aux(A_nexp(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:95)),model/prelude.sail:95)),model/prelude.sail:95)),model/prelude.sail:95))]),model/prelude.sail:95),Effect_aux(Effect_set([]),model/prelude.sail:95)),model/prelude.sail:95)),model/prelude.sail:95))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print"),model/prelude.sail:97),[_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:97)),model/prelude.sail:97))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:97)),model/prelude.sail:97),Effect_aux(Effect_set([]),model/prelude.sail:97)),model/prelude.sail:97)),model/prelude.sail:97))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_string"),model/prelude.sail:98),[_: "print_string"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:98)),model/prelude.sail:98));(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:98)),model/prelude.sail:98))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:98)),model/prelude.sail:98),Effect_aux(Effect_set([]),model/prelude.sail:98)),model/prelude.sail:98)),model/prelude.sail:98))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_instr"),model/prelude.sail:100),[ocaml: "Platform.print_instr",interpreter: "print_endline",c: "print_instr",lem: "print_dbg",_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:100)),model/prelude.sail:100))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:100)),model/prelude.sail:100),Effect_aux(Effect_set([]),model/prelude.sail:100)),model/prelude.sail:100)),model/prelude.sail:100))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_reg"),model/prelude.sail:101),[ocaml: "Platform.print_reg",interpreter: "print_endline",c: "print_reg",lem: "print_dbg",_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:101)),model/prelude.sail:101))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:101)),model/prelude.sail:101),Effect_aux(Effect_set([]),model/prelude.sail:101)),model/prelude.sail:101)),model/prelude.sail:101))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_mem"),model/prelude.sail:102),[ocaml: "Platform.print_mem_access",interpreter: "print_endline",c: "print_mem_access",lem: "print_dbg",_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:102)),model/prelude.sail:102))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:102)),model/prelude.sail:102),Effect_aux(Effect_set([]),model/prelude.sail:102)),model/prelude.sail:102)),model/prelude.sail:102))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_platform"),model/prelude.sail:103),[ocaml: "Platform.print_platform",interpreter: "print_endline",c: "print_platform",lem: "print_dbg",_: "print_endline"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:103)),model/prelude.sail:103))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:103)),model/prelude.sail:103),Effect_aux(Effect_set([]),model/prelude.sail:103)),model/prelude.sail:103)),model/prelude.sail:103))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_config_print_instr"),model/prelude.sail:105),[ocaml: "Platform.get_config_print_instr",c: "get_config_print_instr"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:105)),model/prelude.sail:105))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:105)),model/prelude.sail:105),Effect_aux(Effect_set([]),model/prelude.sail:105)),model/prelude.sail:105)),model/prelude.sail:105))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_config_print_reg"),model/prelude.sail:106),[ocaml: "Platform.get_config_print_reg",c: "get_config_print_reg"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:106)),model/prelude.sail:106))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:106)),model/prelude.sail:106),Effect_aux(Effect_set([]),model/prelude.sail:106)),model/prelude.sail:106)),model/prelude.sail:106))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_config_print_mem"),model/prelude.sail:107),[ocaml: "Platform.get_config_print_mem",c: "get_config_print_mem"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:107)),model/prelude.sail:107))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:107)),model/prelude.sail:107),Effect_aux(Effect_set([]),model/prelude.sail:107)),model/prelude.sail:107)),model/prelude.sail:107))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_config_print_platform"),model/prelude.sail:109),[ocaml: "Platform.get_config_print_platform",c: "get_config_print_platform"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:109)),model/prelude.sail:109))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:109)),model/prelude.sail:109),Effect_aux(Effect_set([]),model/prelude.sail:109)),model/prelude.sail:109)),model/prelude.sail:109))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_config_print_instr"),model/prelude.sail:111),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/prelude.sail:111)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude.sail:111)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:105)),model/prelude.sail:105))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:105)),model/prelude.sail:105),Effect_aux(Effect_set([]),model/prelude.sail:105)),model/prelude.sail:105)))]),None)));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_config_print_reg"),model/prelude.sail:112),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/prelude.sail:112)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude.sail:112)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:106)),model/prelude.sail:106))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:106)),model/prelude.sail:106),Effect_aux(Effect_set([]),model/prelude.sail:106)),model/prelude.sail:106)))]),None)));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_config_print_mem"),model/prelude.sail:113),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/prelude.sail:113)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude.sail:113)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:107)),model/prelude.sail:107))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:107)),model/prelude.sail:107),Effect_aux(Effect_set([]),model/prelude.sail:107)),model/prelude.sail:107)))]),None)));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_config_print_platform"),model/prelude.sail:114),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/prelude.sail:114)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude.sail:114)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:109)),model/prelude.sail:109))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:109)),model/prelude.sail:109),Effect_aux(Effect_set([]),model/prelude.sail:109)),model/prelude.sail:109)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("EXTS"),model/prelude.sail:116),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:116),Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:116),Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116))]),model/prelude.sail:116),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:116),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116))]),model/prelude.sail:116));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("EXTZ"),model/prelude.sail:117),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:117),Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:117),Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117))]),model/prelude.sail:117),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:117),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117))]),model/prelude.sail:117));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("EXTS"),model/prelude.sail:119),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("m"),model/prelude.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("v"),model/prelude.sail:119)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116))]),model/prelude.sail:116));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/prelude.sail:119)),E_aux(E_app(Id_aux(Id("sail_sign_extend"),model/prelude.sail:119),[(E_aux(E_id(Id_aux(Id("v"),model/prelude.sail:119)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("m"),model/prelude.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:116),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),model/prelude.sail:116))]),model/prelude.sail:116));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:116)),model/prelude.sail:116)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:116)),model/prelude.sail:116)))]),None)));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("EXTZ"),model/prelude.sail:120),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("m"),model/prelude.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("v"),model/prelude.sail:120)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117))]),model/prelude.sail:117));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/prelude.sail:120)),E_aux(E_app(Id_aux(Id("sail_zero_extend"),model/prelude.sail:120),[(E_aux(E_id(Id_aux(Id("v"),model/prelude.sail:120)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("m"),model/prelude.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:117),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),model/prelude.sail:117))]),model/prelude.sail:117));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:117)),model/prelude.sail:117)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:117)),model/prelude.sail:117)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("zeros_implicit"),model/prelude.sail:122),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:122),Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),model/prelude.sail:122));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122),Nexp_aux(Nexp_constant(0),model/prelude.sail:122)),model/prelude.sail:122)),model/prelude.sail:122))]),model/prelude.sail:122),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:122),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),model/prelude.sail:122))]),model/prelude.sail:122))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:122)),model/prelude.sail:122)),model/prelude.sail:122))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("zeros_implicit"),model/prelude.sail:123),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("n"),model/prelude.sail:123)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("sail_zeros"),model/prelude.sail:123),[(E_aux(E_id(Id_aux(Id("n"),model/prelude.sail:123)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:122),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),model/prelude.sail:122))]),model/prelude.sail:122))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:122)),model/prelude.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:122)),model/prelude.sail:122)))]),None)));(DEF_overload(Id_aux(Id("zeros"),model/prelude.sail:124),[(Id_aux(Id("zeros_implicit"),model/prelude.sail:124))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ones"),model/prelude.sail:126),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:126),Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),model/prelude.sail:126));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126),Nexp_aux(Nexp_constant(0),model/prelude.sail:126)),model/prelude.sail:126)),model/prelude.sail:126))]),model/prelude.sail:126),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:126),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),model/prelude.sail:126))]),model/prelude.sail:126))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:126)),model/prelude.sail:126)),model/prelude.sail:126))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ones"),model/prelude.sail:127),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("n"),model/prelude.sail:127)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("sail_ones"),model/prelude.sail:127),[(E_aux(E_id(Id_aux(Id("n"),model/prelude.sail:127)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("implicit"),model/prelude.sail:126),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),model/prelude.sail:126))]),model/prelude.sail:126))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:126)),model/prelude.sail:126)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:126)),model/prelude.sail:126)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bool_to_bits"),model/prelude.sail:129),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:129)),model/prelude.sail:129))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:129)),model/prelude.sail:129)),model/prelude.sail:129))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("bool_to_bits"),model/prelude.sail:130),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("x"),model/prelude.sail:130)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex343#"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_id(Id_aux(Id("x"),model/prelude.sail:130)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex343#"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_bin("1"),model/prelude.sail:130)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_bin("0"),model/prelude.sail:130)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex343#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:129)),model/prelude.sail:129)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bit_to_bool"),model/prelude.sail:132),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:132)),model/prelude.sail:132))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:132)),model/prelude.sail:132),Effect_aux(Effect_set([]),model/prelude.sail:132)),model/prelude.sail:132)),model/prelude.sail:132))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("bit_to_bool"),model/prelude.sail:133),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("b"),model/prelude.sail:133)),Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:132)),model/prelude.sail:132)),E_aux(E_case(E_aux(E_id(Id_aux(Id("b"),model/prelude.sail:133)),Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:132)),model/prelude.sail:132)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_one,model/prelude.sail:134)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude.sail:134)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_zero,model/prelude.sail:135)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude.sail:135)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:132)),model/prelude.sail:132))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bit"),model/prelude.sail:132)),model/prelude.sail:132))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:132)),model/prelude.sail:132),Effect_aux(Effect_set([]),model/prelude.sail:132)),model/prelude.sail:132)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("to_bits"),model/prelude.sail:138),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:138),Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),model/prelude.sail:138));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138),Nexp_aux(Nexp_constant(0),model/prelude.sail:138)),model/prelude.sail:138)),model/prelude.sail:138))]),model/prelude.sail:138),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:138),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),model/prelude.sail:138))]),model/prelude.sail:138));(Typ_aux(Typ_id(Id_aux(Id("int"),model/prelude.sail:138)),model/prelude.sail:138))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:138)),model/prelude.sail:138)),model/prelude.sail:138))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("to_bits"),model/prelude.sail:139),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("l"),model/prelude.sail:139)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("n"),model/prelude.sail:139)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex346#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex346#"),Unknown)),Unknown)),Unknown))]),Unknown))]),model/prelude.sail:139)),E_aux(E_app(Id_aux(Id("get_slice_int"),model/prelude.sail:139),[(E_aux(E_id(Id_aux(Id("l"),model/prelude.sail:139)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("n"),model/prelude.sail:139)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex346#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/prelude.sail:139)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex346#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'l"),model/prelude.sail:138)),model/prelude.sail:138)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:138)),model/prelude.sail:138)))]),None)));(DEF_fixity(Infix,4,Id_aux(Id("<_s"),model/prelude.sail:141)));(DEF_fixity(Infix,4,Id_aux(Id(">=_s"),model/prelude.sail:142)));(DEF_fixity(Infix,4,Id_aux(Id("<_u"),model/prelude.sail:143)));(DEF_fixity(Infix,4,Id_aux(Id(">=_u"),model/prelude.sail:144)));(DEF_fixity(Infix,4,Id_aux(Id("<=_u"),model/prelude.sail:145)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Operator("<_s"),model/prelude.sail:147),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:147),Kid_aux(Var("'n"),model/prelude.sail:147)),model/prelude.sail:147)),model/prelude.sail:147));(QI_aux(QI_constraint(NC_aux(NC_bounded_gt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:147)),model/prelude.sail:147),Nexp_aux(Nexp_constant(0),model/prelude.sail:147)),model/prelude.sail:147)),model/prelude.sail:147))]),model/prelude.sail:147),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:147)),model/prelude.sail:147)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:147)),model/prelude.sail:147)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:147)),model/prelude.sail:147),Effect_aux(Effect_set([]),model/prelude.sail:147)),model/prelude.sail:147)),model/prelude.sail:147))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Operator(">=_s"),model/prelude.sail:148),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:148),Kid_aux(Var("'n"),model/prelude.sail:148)),model/prelude.sail:148)),model/prelude.sail:148));(QI_aux(QI_constraint(NC_aux(NC_bounded_gt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:148)),model/prelude.sail:148),Nexp_aux(Nexp_constant(0),model/prelude.sail:148)),model/prelude.sail:148)),model/prelude.sail:148))]),model/prelude.sail:148),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:148)),model/prelude.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:148)),model/prelude.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:148)),model/prelude.sail:148),Effect_aux(Effect_set([]),model/prelude.sail:148)),model/prelude.sail:148)),model/prelude.sail:148))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Operator("<_u"),model/prelude.sail:149),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:149),Kid_aux(Var("'n"),model/prelude.sail:149)),model/prelude.sail:149)),model/prelude.sail:149))]),model/prelude.sail:149),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:149)),model/prelude.sail:149)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:149)),model/prelude.sail:149)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:149)),model/prelude.sail:149),Effect_aux(Effect_set([]),model/prelude.sail:149)),model/prelude.sail:149)),model/prelude.sail:149))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Operator(">=_u"),model/prelude.sail:150),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:150),Kid_aux(Var("'n"),model/prelude.sail:150)),model/prelude.sail:150)),model/prelude.sail:150))]),model/prelude.sail:150),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:150)),model/prelude.sail:150)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:150)),model/prelude.sail:150)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:150)),model/prelude.sail:150),Effect_aux(Effect_set([]),model/prelude.sail:150)),model/prelude.sail:150)),model/prelude.sail:150))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Operator("<=_u"),model/prelude.sail:151),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:151),Kid_aux(Var("'n"),model/prelude.sail:151)),model/prelude.sail:151)),model/prelude.sail:151))]),model/prelude.sail:151),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:151)),model/prelude.sail:151)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:151)),model/prelude.sail:151)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:151)),model/prelude.sail:151),Effect_aux(Effect_set([]),model/prelude.sail:151)),model/prelude.sail:151)),model/prelude.sail:151))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_o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"shift_bits_right"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:162),Kid_aux(Var("'n"),model/prelude.sail:162)),model/prelude.sail:162)),model/prelude.sail:162));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:162),Kid_aux(Var("'m"),model/prelude.sail:162)),model/prelude.sail:162)),model/prelude.sail:162))]),model/prelude.sail:162),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:162)),model/prelude.sail:162)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:162)),model/prelude.sail:162)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:162)),model/prelude.sail:162)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:162)),model/prelude.sail:162)),model/prelude.sail:162))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shift_bits_left"),model/prelude.sail:163),[_: "shift_bits_left"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:163),Kid_aux(Var("'n"),model/prelude.sail:163)),model/prelude.sail:163)),model/prelude.sail:163));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:163),Kid_aux(Var("'m"),model/prelude.sail:163)),model/prelude.sail:163)),model/prelude.sail:163))]),model/prelude.sail:163),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:163)),model/prelude.sail:163)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:163)),model/prelude.sail:163)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:163)),model/prelude.sail:163)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:163)),model/prelude.sail:163)),model/prelude.sail:163))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shiftl"),model/prelude.sail:165),[_: "shiftl"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:165),Kid_aux(Var("'m"),model/prelude.sail:165)),model/prelude.sail:165)),model/prelude.sail:165));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:165),Kid_aux(Var("'n"),model/prelude.sail:165)),model/prelude.sail:165)),model/prelude.sail:165));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:165)),model/prelude.sail:165),Nexp_aux(Nexp_constant(0),model/prelude.sail:165)),model/prelude.sail:165)),model/prelude.sail:165))]),model/prelude.sail:165),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:165)),model/prelude.sail:165)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:165),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:165)),model/prelude.sail:165)),model/prelude.sail:165))]),model/prelude.sail:165))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:165)),model/prelude.sail:165)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:165)),model/prelude.sail:165)),model/prelude.sail:165))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shiftr"),model/prelude.sail:166),[_: "shiftr"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:166),Kid_aux(Var("'m"),model/prelude.sail:166)),model/prelude.sail:166)),model/prelude.sail:166));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude.sail:166),Kid_aux(Var("'n"),model/prelude.sail:166)),model/prelude.sail:166)),model/prelude.sail:166));(QI_aux(QI_constraint(NC_aux(NC_bounded_ge(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:166)),model/prelude.sail:166),Nexp_aux(Nexp_constant(0),model/prelude.sail:166)),model/prelude.sail:166)),model/prelude.sail:166))]),model/prelude.sail:166),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:166)),model/prelude.sail:166)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:166),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude.sail:166)),model/prelude.sail:166)),model/prelude.sail:166))]),model/prelude.sail:166))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'m"),model/prelude.sail:166)),model/prelude.sail:166)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude.sail:166)),model/prelude.sail:166)),model/prelude.sail:166))));(DEF_overload(Id_aux(Operator(">>"),model/prelude.sail:168),[(Id_aux(Id("shift_bits_right"),model/prelude.sail:168));(Id_aux(Id("shiftr"),model/prelude.sail:168))]));(DEF_overload(Id_aux(Operator("<<"),model/prelude.sail:169),[(Id_aux(Id("shift_bits_left"),model/prelude.sail:169));(Id_aux(Id("shiftl"),model/prelude.sail:169))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shift_right_arith64"),model/prelude.sail:173),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173))],Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173)),model/prelude.sail:173),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("shift_right_arith64"),model/prelude.sail:173),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173),P_aux(P_id(Id_aux(Id("v"),model/prelude.sail:173)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:173),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude.sail:173)),model/prelude.sail:173))]),model/prelude.sail:173),P_aux(P_id(Id_aux(Id("shift"),model/prelude.sail:173)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude.sail:173)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude.sail:173)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),mod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;(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:173)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shift_right_arith32"),model/prelude.sail:177),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177))],Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177)),model/prelude.sail:177),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("shift_right_arith32"),model/prelude.sail:177),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177),P_aux(P_id(Id_aux(Id("v"),model/prelude.sail:177)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:177),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude.sail:177)),model/prelude.sail:177))]),model/prelude.sail:177),P_aux(P_id(Id_aux(Id("shift"),model/prelude.sail:177)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude.sail:177)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/prelude.sail:177-179)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/prelude.sail:178),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:178)),model/prelude.sail:178))]),model/prelude.sail:178),P_aux(P_id(Id_aux(Id("v64"),model/prelude.sail:178)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:178)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude.sail:178)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTS"),model/prelude.sail:178),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Ty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"),model/prelude.sail:222)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:185)),model/prelude.sail:185))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("def_spc_backwards"),model/prelude.sail:223),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:223)),model/prelude.sail:223))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:223)),model/prelude.sail:223),Effect_aux(Effect_set([]),model/prelude.sail:223)),model/prelude.sail:223)),model/prelude.sail:223))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("def_spc_backwards"),model/prelude.sail:224),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude.sail:224)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185)),E_aux(E_lit(L_aux(L_unit,model/prelude.sail:224)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:185)),model/prelude.sail:185),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("def_spc_matches_prefix"),model/prelude.sail:225),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:225)),model/prelude.sail:225))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude.sail:225),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:225)),model/prelude.sail:225));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:225)),model/prelude.sail:225))]),model/prelude.sail:225)),model/prelude.sail:225))]),model/prelude.sail:225),Effect_aux(Effect_set([]),model/prelude.sail:225)),model/prelude.sail:225)),model/prelude.sail:225))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("def_spc_matches_prefix"),model/prelude.sail:226),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude.sail:226)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185)),E_aux(E_app(Id_aux(Id("opt_spc_matches_prefix"),model/prelude.sail:226),[(E_aux(E_id(Id_aux(Id("s"),model/prelude.sail:226)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:184)),model/prelude.sail:184));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:185)),model/prelude.sail:185))],Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:185)),model/prelude.sail:185));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_1"),model/prelude_mapping.sail:34),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_1_forwards"),model/prelude_mapping.sail:35),[_: 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"hex_bits_1_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:38)),model/prelude_mapping.sail:38))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:38),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:38)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:38)),model/prelude_mapping.sail:38))]),model/prelude_mapping.sail:38)),model/prelude_mapping.sail:38))]),model/prelude_mapping.sail:38),Effect_aux(Effect_set([]),model/prelude_mapping.sail:38)),model/prelude_mapping.sail:38)),model/prelude_mapping.sail:38))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_1_backwards_matches"),model/prelude_mapping.sail:39),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:39)),model/prelude_mapping.sail:39))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:39)),model/prelude_mapping.sail:39),Effect_aux(Effect_set([]),model/prelude_mapping.sail:39)),model/prelude_mapping.sail:39)),model/prelude_mapping.sail:39))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_1_backwards_matches"),model/prelude_mapping.sail:40),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:40)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:40)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:41)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_1_matches_prefix"),model/prelude_mapping.sail:41),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:41)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:42),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:42)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:42)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:42),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:42)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex528#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex528#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex528#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:42)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:43)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:44)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:45)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_1_backwards"),model/prelude_mapping.sail:47),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:47)),model/prelude_mapping.sail:47))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:47)),model/prelude_mapping.sail:47)),model/prelude_mapping.sail:47))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_1_backwards"),model/prelude_mapping.sail:48),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:48)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_1_matches_prefix"),model/prelude_mapping.sail:49),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:49)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:50),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:50)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:50)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:50)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:50),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:50)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex534#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex534#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex534#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:50)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:34)),model/prelude_mapping.sail:34))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude_mapping.sail:34)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2"),model/prelude_mapping.sail:53),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2_forwards"),model/prelude_mapping.sail:54),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:54)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:54)),model/prelude_mapping.sail:54),Effect_aux(Effect_set([]),model/prelude_mapping.sail:54)),model/prelude_mapping.sail:54)),model/prelude_mapping.sail:54))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2_forwards_matches"),model/prelude_mapping.sail:55),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:55)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:55)),model/prelude_mapping.sail:55),Effect_aux(Effect_set([]),model/prelude_mapping.sail:55)),model/prelude_mapping.sail:55)),model/prelude_mapping.sail:55))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_2_forwards_matches"),model/prelude_mapping.sail:56),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:56)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:56)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2_matches_prefix"),model/prelude_mapping.sail:57),[_: "hex_bits_2_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:57)),model/prelude_mapping.sail:57))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:57),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:57)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:57)),model/prelude_mapping.sail:57))]),model/prelude_mapping.sail:57)),model/prelude_mapping.sail:57))]),model/prelude_mapping.sail:57),Effect_aux(Effect_set([]),model/prelude_mapping.sail:57)),model/prelude_mapping.sail:57)),model/prelude_mapping.sail:57))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2_backwards_matches"),model/prelude_mapping.sail:58),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:58)),model/prelude_mapping.sail:58))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:58)),model/prelude_mapping.sail:58),Effect_aux(Effect_set([]),model/prelude_mapping.sail:58)),model/prelude_mapping.sail:58)),model/prelude_mapping.sail:58))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_2_backwards_matches"),model/prelude_mapping.sail:59),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:59)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:59)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:60)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_2_matches_prefix"),model/prelude_mapping.sail:60),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:60)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:61),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:61)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:61)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:61),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:61)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex546#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex546#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex546#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:61)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:62)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:63)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:64)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_2_backwards"),model/prelude_mapping.sail:66),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:66)),model/prelude_mapping.sail:66))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:66)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:66)),model/prelude_mapping.sail:66)),model/prelude_mapping.sail:66))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_2_backwards"),model/prelude_mapping.sail:67),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:67)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_2_matches_prefix"),model/prelude_mapping.sail:68),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:68)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:69),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:69)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:69)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:69),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:69)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex552#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex552#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex552#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:53)),model/prelude_mapping.sail:53))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/prelude_mapping.sail:53)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3"),model/prelude_mapping.sail:72),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3_forwards"),model/prelude_mapping.sail:73),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:73)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:73)),model/prelude_mapping.sail:73),Effect_aux(Effect_set([]),model/prelude_mapping.sail:73)),model/prelude_mapping.sail:73)),model/prelude_mapping.sail:73))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3_forwards_matches"),model/prelude_mapping.sail:74),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:74)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:74)),model/prelude_mapping.sail:74),Effect_aux(Effect_set([]),model/prelude_mapping.sail:74)),model/prelude_mapping.sail:74)),model/prelude_mapping.sail:74))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_3_forwards_matches"),model/prelude_mapping.sail:75),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:75)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3_matches_prefix"),model/prelude_mapping.sail:76),[_: "hex_bits_3_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:76)),model/prelude_mapping.sail:76))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:76),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:76)),model/prelude_mapping.sail:76))]),model/prelude_mapping.sail:76)),model/prelude_mapping.sail:76))]),model/prelude_mapping.sail:76),Effect_aux(Effect_set([]),model/prelude_mapping.sail:76)),model/prelude_mapping.sail:76)),model/prelude_mapping.sail:76))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3_backwards_matches"),model/prelude_mapping.sail:77),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:77)),model/prelude_mapping.sail:77))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:77)),model/prelude_mapping.sail:77),Effect_aux(Effect_set([]),model/prelude_mapping.sail:77)),model/prelude_mapping.sail:77)),model/prelude_mapping.sail:77))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_3_backwards_matches"),model/prelude_mapping.sail:78),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:78)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:78)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:79)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_3_matches_prefix"),model/prelude_mapping.sail:79),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:79)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:80),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:80)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:80)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:80),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:80)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex564#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex564#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex564#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:80)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:81)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:82)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:83)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_3_backwards"),model/prelude_mapping.sail:85),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:85)),model/prelude_mapping.sail:85))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:85)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:85)),model/prelude_mapping.sail:85)),model/prelude_mapping.sail:85))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_3_backwards"),model/prelude_mapping.sail:86),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:86)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_3_matches_prefix"),model/prelude_mapping.sail:87),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:87)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:88),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:88)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:88)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:88)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:88),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:88)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex570#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex570#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex570#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:88)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:72)),model/prelude_mapping.sail:72))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/prelude_mapping.sail:72)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4"),model/prelude_mapping.sail:91),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4_forwards"),model/prelude_mapping.sail:92),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:92)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:92)),model/prelude_mapping.sail:92),Effect_aux(Effect_set([]),model/prelude_mapping.sail:92)),model/prelude_mapping.sail:92)),model/prelude_mapping.sail:92))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4_forwards_matches"),model/prelude_mapping.sail:93),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:93)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:93)),model/prelude_mapping.sail:93),Effect_aux(Effect_set([]),model/prelude_mapping.sail:93)),model/prelude_mapping.sail:93)),model/prelude_mapping.sail:93))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_4_forwards_matches"),model/prelude_mapping.sail:94),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4_matches_prefix"),model/prelude_mapping.sail:95),[_: "hex_bits_4_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:95)),model/prelude_mapping.sail:95))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:95),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:95)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:95)),model/prelude_mapping.sail:95))]),model/prelude_mapping.sail:95)),model/prelude_mapping.sail:95))]),model/prelude_mapping.sail:95),Effect_aux(Effect_set([]),model/prelude_mapping.sail:95)),model/prelude_mapping.sail:95)),model/prelude_mapping.sail:95))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4_backwards_matches"),model/prelude_mapping.sail:96),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:96)),model/prelude_mapping.sail:96))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:96)),model/prelude_mapping.sail:96),Effect_aux(Effect_set([]),model/prelude_mapping.sail:96)),model/prelude_mapping.sail:96)),model/prelude_mapping.sail:96))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_4_backwards_matches"),model/prelude_mapping.sail:97),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:97)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:97)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:98)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_4_matches_prefix"),model/prelude_mapping.sail:98),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:98)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:99),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:99)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:99)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:99),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:99)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex582#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex582#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex582#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:99)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:100)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:101)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:102)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_4_backwards"),model/prelude_mapping.sail:104),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:104)),model/prelude_mapping.sail:104))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:104)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:104)),model/prelude_mapping.sail:104)),model/prelude_mapping.sail:104))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_4_backwards"),model/prelude_mapping.sail:105),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:105)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_4_matches_prefix"),model/prelude_mapping.sail:106),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:106)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:107),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:107)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:107)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:107)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:107),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:107)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex588#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex588#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex588#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:107)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:91)),model/prelude_mapping.sail:91))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/prelude_mapping.sail:91)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_5"),model/prelude_mapping.sail:110),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_5_forwards"),model/prelude_mapping.sail:111),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:111)),model/prelude_mapping.sail:111),Effect_aux(Effect_set([]),model/prelude_mapping.sail:111)),model/prelude_mapping.sail:111)),model/prelude_mapping.sail:111))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_5_forwards_matches"),model/prelude_mapping.sail:112),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:112)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:112)),model/prelude_mapping.sail:112),Effect_aux(Effect_set([]),model/prelude_mapping.sail:112)),model/prelude_mapping.sail:112)),model/prelude_mapping.sail:112))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_5_forwards_matches"),model/prelude_mapping.sail:113),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:113)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:113)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_5_matches_prefix"),model/prelude_mapping.sail:114),[_: "hex_bits_5_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:114)),model/prelude_mapping.sail:114))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:114),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:114)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:114)),model/prelude_mapping.sail:114))]),model/prelude_mapping.sail:114)),model/prelude_mapping.sail:114))]),model/prelude_mapping.sail:114),Effect_aux(Effect_set([]),model/prelude_mapping.sail:114)),model/prelude_mapping.sail:114)),model/prelude_mapping.sail:114))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_5_backwards_matches"),model/prelude_mapping.sail:115),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:115)),model/prelude_mapping.sail:115))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:115)),model/prelude_mapping.sail:115),Effect_aux(Effect_set([]),model/prelude_mapping.sail:115)),model/prelude_mapping.sail:115)),model/prelude_mapping.sail:115))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_5_backwards_matches"),model/prelude_mapping.sail:116),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:116)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:116)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:117)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_5_matches_prefix"),model/prelude_mapping.sail:117),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:117)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:118),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:118)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:118)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:118),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:118)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelu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or_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:126)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:126),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:126)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex606#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex606#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex606#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:126)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:110)),model/prelude_mapping.sail:110))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/prelude_mapping.sail:110)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_6"),model/prelude_mapping.sail:129),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_6_forwards"),model/prelude_mapping.sail:130),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:130)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:130)),model/prelude_mapping.sail:130),Effect_aux(Effect_set([]),model/prelude_mapping.sail:130)),model/prelude_mapping.sail:130)),model/prelude_mapping.sail:130))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_6_forwards_matches"),model/prelude_mapping.sail:131),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:131)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:131)),model/prelude_mapping.sail:131),Effect_aux(Effect_set([]),model/prelude_mapping.sail:131)),model/prelude_mapping.sail:131)),model/prelude_mapping.sail:131))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_6_forwards_matches"),model/prelude_mapping.sail:132),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:132)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:132)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_6_matches_prefix"),model/prelude_mapping.sail:133),[_: "hex_bits_6_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:133)),model/prelude_mapping.sail:133))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:133),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:133)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:133)),model/prelude_mapping.sail:133))]),model/prelude_mapping.sail:133)),model/prelude_mapping.sail:133))]),model/prelude_mapping.sail:133),Effect_aux(Effect_set([]),model/prelude_mapping.sail:133)),model/prelude_mapping.sail:133)),model/prelude_mapping.sail:133))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_6_backwards_matches"),model/prelude_mapping.sail:134),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:134)),model/prelude_mapping.sail:134))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:134)),model/prelude_mapping.sail:134),Effect_aux(Effect_set([]),model/prelude_mapping.sail:134)),model/prelude_mapping.sail:134)),model/prelude_mapping.sail:134))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_6_backwards_matches"),model/prelude_mapping.sail:135),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:135)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:135)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:136)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_6_matches_prefix"),model/prelude_mapping.sail:136),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:136)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:137),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:137)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:137)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:137),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:137)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelu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or_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:145)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:145),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:145)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex624#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex624#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex624#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:145)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:129)),model/prelude_mapping.sail:129))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/prelude_mapping.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_7"),model/prelude_mapping.sail:148),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_7_forwards"),model/prelude_mapping.sail:149),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:149)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:149)),model/prelude_mapping.sail:149),Effect_aux(Effect_set([]),model/prelude_mapping.sail:149)),model/prelude_mapping.sail:149)),model/prelude_mapping.sail:149))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_7_forwards_matches"),model/prelude_mapping.sail:150),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:150)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:150)),model/prelude_mapping.sail:150),Effect_aux(Effect_set([]),model/prelude_mapping.sail:150)),model/prelude_mapping.sail:150)),model/prelude_mapping.sail:150))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_7_forwards_matches"),model/prelude_mapping.sail:151),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:151)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:151)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_7_matches_prefix"),model/prelude_mapping.sail:152),[_: "hex_bits_7_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:152)),model/prelude_mapping.sail:152))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:152),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:152)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:152)),model/prelude_mapping.sail:152))]),model/prelude_mapping.sail:152)),model/prelude_mapping.sail:152))]),model/prelude_mapping.sail:152),Effect_aux(Effect_set([]),model/prelude_mapping.sail:152)),model/prelude_mapping.sail:152)),model/prelude_mapping.sail:152))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_7_backwards_matches"),model/prelude_mapping.sail:153),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:153)),model/prelude_mapping.sail:153))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:153)),model/prelude_mapping.sail:153),Effect_aux(Effect_set([]),model/prelude_mapping.sail:153)),model/prelude_mapping.sail:153)),model/prelude_mapping.sail:153))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_7_backwards_matches"),model/prelude_mapping.sail:154),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:154)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:154)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:155)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_7_matches_prefix"),model/prelude_mapping.sail:155),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:155)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:156),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:156)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:156)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:156),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:156)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelu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or_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:164)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:164),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:164)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex642#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex642#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex642#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:164)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:148)),model/prelude_mapping.sail:148))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/prelude_mapping.sail:148)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_8"),model/prelude_mapping.sail:167),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_8_forwards"),model/prelude_mapping.sail:168),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:168)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:168)),model/prelude_mapping.sail:168),Effect_aux(Effect_set([]),model/prelude_mapping.sail:168)),model/prelude_mapping.sail:168)),model/prelude_mapping.sail:168))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_8_forwards_matches"),model/prelude_mapping.sail:169),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:169)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:169)),model/prelude_mapping.sail:169),Effect_aux(Effect_set([]),model/prelude_mapping.sail:169)),model/prelude_mapping.sail:169)),model/prelude_mapping.sail:169))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_8_forwards_matches"),model/prelude_mapping.sail:170),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:170)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:170)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_8_matches_prefix"),model/prelude_mapping.sail:171),[_: "hex_bits_8_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:171)),model/prelude_mapping.sail:171))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:171),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:171)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:171)),model/prelude_mapping.sail:171))]),model/prelude_mapping.sail:171)),model/prelude_mapping.sail:171))]),model/prelude_mapping.sail:171),Effect_aux(Effect_set([]),model/prelude_mapping.sail:171)),model/prelude_mapping.sail:171)),model/prelude_mapping.sail:171))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_8_backwards_matches"),model/prelude_mapping.sail:172),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:172)),model/prelude_mapping.sail:172))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:172)),model/prelude_mapping.sail:172),Effect_aux(Effect_set([]),model/prelude_mapping.sail:172)),model/prelude_mapping.sail:172)),model/prelude_mapping.sail:172))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_8_backwards_matches"),model/prelude_mapping.sail:173),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:173)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:173)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:174)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_8_matches_prefix"),model/prelude_mapping.sail:174),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:174)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:175),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:175)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:175)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:175),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:175)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelu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or_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:183)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:183),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:183)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex660#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex660#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex660#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:183)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:167)),model/prelude_mapping.sail:167))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/prelude_mapping.sail:167)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_9"),model/prelude_mapping.sail:186),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_9_forwards"),model/prelude_mapping.sail:187),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:187)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:187)),model/prelude_mapping.sail:187),Effect_aux(Effect_set([]),model/prelude_mapping.sail:187)),model/prelude_mapping.sail:187)),model/prelude_mapping.sail:187))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_9_forwards_matches"),model/prelude_mapping.sail:188),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:188)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:188)),model/prelude_mapping.sail:188),Effect_aux(Effect_set([]),model/prelude_mapping.sail:188)),model/prelude_mapping.sail:188)),model/prelude_mapping.sail:188))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_9_forwards_matches"),model/prelude_mapping.sail:189),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:189)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:189)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_9_matches_prefix"),model/prelude_mapping.sail:190),[_: "hex_bits_9_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:190)),model/prelude_mapping.sail:190))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:190),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:190)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:190)),model/prelude_mapping.sail:190))]),model/prelude_mapping.sail:190)),model/prelude_mapping.sail:190))]),model/prelude_mapping.sail:190),Effect_aux(Effect_set([]),model/prelude_mapping.sail:190)),model/prelude_mapping.sail:190)),model/prelude_mapping.sail:190))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_9_backwards_matches"),model/prelude_mapping.sail:191),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:191)),model/prelude_mapping.sail:191))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:191)),model/prelude_mapping.sail:191),Effect_aux(Effect_set([]),model/prelude_mapping.sail:191)),model/prelude_mapping.sail:191)),model/prelude_mapping.sail:191))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_9_backwards_matches"),model/prelude_mapping.sail:192),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:192)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:192)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:193)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_9_matches_prefix"),model/prelude_mapping.sail:193),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:193)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:194),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:194)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:194)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:194),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:194)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelu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or_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:202)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:202),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:202)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex678#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex678#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex678#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:202)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:186)),model/prelude_mapping.sail:186))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/prelude_mapping.sail:186)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10"),model/prelude_mapping.sail:205),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10_forwards"),model/prelude_mapping.sail:206),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:206)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:206)),model/prelude_mapping.sail:206),Effect_aux(Effect_set([]),model/prelude_mapping.sail:206)),model/prelude_mapping.sail:206)),model/prelude_mapping.sail:206))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10_forwards_matches"),model/prelude_mapping.sail:207),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:207)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:207)),model/prelude_mapping.sail:207),Effect_aux(Effect_set([]),model/prelude_mapping.sail:207)),model/prelude_mapping.sail:207)),model/prelude_mapping.sail:207))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_10_forwards_matches"),model/prelude_mapping.sail:208),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:208)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10_matches_prefix"),model/prelude_mapping.sail:209),[_: "hex_bits_10_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:209)),model/prelude_mapping.sail:209))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:209),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:209)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:209)),model/prelude_mapping.sail:209))]),model/prelude_mapping.sail:209)),model/prelude_mapping.sail:209))]),model/prelude_mapping.sail:209),Effect_aux(Effect_set([]),model/prelude_mapping.sail:209)),model/prelude_mapping.sail:209)),model/prelude_mapping.sail:209))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10_backwards_matches"),model/prelude_mapping.sail:210),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:210)),model/prelude_mapping.sail:210))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:210)),model/prelude_mapping.sail:210),Effect_aux(Effect_set([]),model/prelude_mapping.sail:210)),model/prelude_mapping.sail:210)),model/prelude_mapping.sail:210))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_10_backwards_matches"),model/prelude_mapping.sail:211),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:211)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:211)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:212)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_10_matches_prefix"),model/prelude_mapping.sail:212),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:212)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:213),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:213)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:213)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:213),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:213)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex690#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex690#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex690#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:213)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:214)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:215)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:216)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_10_backwards"),model/prelude_mapping.sail:218),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:218)),model/prelude_mapping.sail:218))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:218)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:218)),model/prelude_mapping.sail:218)),model/prelude_mapping.sail:218))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_10_backwards"),model/prelude_mapping.sail:219),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:219)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_10_matches_prefix"),model/prelude_mapping.sail:220),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:220)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:221),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:221)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:221)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:221)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:221),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:221)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex696#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex696#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex696#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:221)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:205)),model/prelude_mapping.sail:205))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/prelude_mapping.sail:205)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11"),model/prelude_mapping.sail:224),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11_forwards"),model/prelude_mapping.sail:225),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:225)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:225)),model/prelude_mapping.sail:225),Effect_aux(Effect_set([]),model/prelude_mapping.sail:225)),model/prelude_mapping.sail:225)),model/prelude_mapping.sail:225))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11_forwards_matches"),model/prelude_mapping.sail:226),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:226)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:226)),model/prelude_mapping.sail:226),Effect_aux(Effect_set([]),model/prelude_mapping.sail:226)),model/prelude_mapping.sail:226)),model/prelude_mapping.sail:226))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_11_forwards_matches"),model/prelude_mapping.sail:227),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:227)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:227)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11_matches_prefix"),model/prelude_mapping.sail:228),[_: "hex_bits_11_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:228)),model/prelude_mapping.sail:228))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:228),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:228)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:228)),model/prelude_mapping.sail:228))]),model/prelude_mapping.sail:228)),model/prelude_mapping.sail:228))]),model/prelude_mapping.sail:228),Effect_aux(Effect_set([]),model/prelude_mapping.sail:228)),model/prelude_mapping.sail:228)),model/prelude_mapping.sail:228))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11_backwards_matches"),model/prelude_mapping.sail:229),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:229)),model/prelude_mapping.sail:229))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:229)),model/prelude_mapping.sail:229),Effect_aux(Effect_set([]),model/prelude_mapping.sail:229)),model/prelude_mapping.sail:229)),model/prelude_mapping.sail:229))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_11_backwards_matches"),model/prelude_mapping.sail:230),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:230)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:230)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:231)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_11_matches_prefix"),model/prelude_mapping.sail:231),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:231)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:232),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:232)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:232)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:232),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:232)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex708#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex708#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex708#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:232)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:233)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:234)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:235)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_11_backwards"),model/prelude_mapping.sail:237),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:237)),model/prelude_mapping.sail:237))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:237)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:237)),model/prelude_mapping.sail:237)),model/prelude_mapping.sail:237))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_11_backwards"),model/prelude_mapping.sail:238),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:238)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_11_matches_prefix"),model/prelude_mapping.sail:239),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:239)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:240),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:240)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:240)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:240)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:240),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:240)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex714#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex714#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex714#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:240)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:224)),model/prelude_mapping.sail:224))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),model/prelude_mapping.sail:224)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12"),model/prelude_mapping.sail:243),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12_forwards"),model/prelude_mapping.sail:244),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:244)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:244)),model/prelude_mapping.sail:244),Effect_aux(Effect_set([]),model/prelude_mapping.sail:244)),model/prelude_mapping.sail:244)),model/prelude_mapping.sail:244))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12_forwards_matches"),model/prelude_mapping.sail:245),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:245)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:245)),model/prelude_mapping.sail:245),Effect_aux(Effect_set([]),model/prelude_mapping.sail:245)),model/prelude_mapping.sail:245)),model/prelude_mapping.sail:245))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_12_forwards_matches"),model/prelude_mapping.sail:246),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:246)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:246)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12_matches_prefix"),model/prelude_mapping.sail:247),[_: "hex_bits_12_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:247)),model/prelude_mapping.sail:247))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:247),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:247)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:247)),model/prelude_mapping.sail:247))]),model/prelude_mapping.sail:247)),model/prelude_mapping.sail:247))]),model/prelude_mapping.sail:247),Effect_aux(Effect_set([]),model/prelude_mapping.sail:247)),model/prelude_mapping.sail:247)),model/prelude_mapping.sail:247))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12_backwards_matches"),model/prelude_mapping.sail:248),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:248)),model/prelude_mapping.sail:248))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:248)),model/prelude_mapping.sail:248),Effect_aux(Effect_set([]),model/prelude_mapping.sail:248)),model/prelude_mapping.sail:248)),model/prelude_mapping.sail:248))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_12_backwards_matches"),model/prelude_mapping.sail:249),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:249)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:249)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:250)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_12_matches_prefix"),model/prelude_mapping.sail:250),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:250)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:251),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:251)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:251)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:251),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:251)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex726#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex726#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex726#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:251)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:252)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:253)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:254)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_12_backwards"),model/prelude_mapping.sail:256),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:256)),model/prelude_mapping.sail:256))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:256)),model/prelude_mapping.sail:256)),model/prelude_mapping.sail:256))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_12_backwards"),model/prelude_mapping.sail:257),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:257)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_12_matches_prefix"),model/prelude_mapping.sail:258),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:258)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:259),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:259)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:259)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:259)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:259),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:259)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex732#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex732#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex732#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:259)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:243)),model/prelude_mapping.sail:243))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13"),model/prelude_mapping.sail:262),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13_forwards"),model/prelude_mapping.sail:263),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:263)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:263)),model/prelude_mapping.sail:263),Effect_aux(Effect_set([]),model/prelude_mapping.sail:263)),model/prelude_mapping.sail:263)),model/prelude_mapping.sail:263))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13_forwards_matches"),model/prelude_mapping.sail:264),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:264)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:264)),model/prelude_mapping.sail:264),Effect_aux(Effect_set([]),model/prelude_mapping.sail:264)),model/prelude_mapping.sail:264)),model/prelude_mapping.sail:264))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_13_forwards_matches"),model/prelude_mapping.sail:265),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:265)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:265)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13_matches_prefix"),model/prelude_mapping.sail:266),[_: "hex_bits_13_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:266)),model/prelude_mapping.sail:266))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:266),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:266)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:266)),model/prelude_mapping.sail:266))]),model/prelude_mapping.sail:266)),model/prelude_mapping.sail:266))]),model/prelude_mapping.sail:266),Effect_aux(Effect_set([]),model/prelude_mapping.sail:266)),model/prelude_mapping.sail:266)),model/prelude_mapping.sail:266))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13_backwards_matches"),model/prelude_mapping.sail:267),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:267)),model/prelude_mapping.sail:267))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:267)),model/prelude_mapping.sail:267),Effect_aux(Effect_set([]),model/prelude_mapping.sail:267)),model/prelude_mapping.sail:267)),model/prelude_mapping.sail:267))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_13_backwards_matches"),model/prelude_mapping.sail:268),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:268)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:268)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:269)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_13_matches_prefix"),model/prelude_mapping.sail:269),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:269)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:270),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:270)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:270)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:270),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:270)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex744#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex744#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex744#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:270)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:271)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:272)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:273)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_13_backwards"),model/prelude_mapping.sail:275),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:275)),model/prelude_mapping.sail:275))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:275)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:275)),model/prelude_mapping.sail:275)),model/prelude_mapping.sail:275))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_13_backwards"),model/prelude_mapping.sail:276),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:276)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_13_matches_prefix"),model/prelude_mapping.sail:277),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:277)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:278),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:278)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:278)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:278)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:278),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:278)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex750#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex750#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex750#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:278)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:262)),model/prelude_mapping.sail:262))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14"),model/prelude_mapping.sail:281),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14_forwards"),model/prelude_mapping.sail:282),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:282)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:282)),model/prelude_mapping.sail:282),Effect_aux(Effect_set([]),model/prelude_mapping.sail:282)),model/prelude_mapping.sail:282)),model/prelude_mapping.sail:282))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14_forwards_matches"),model/prelude_mapping.sail:283),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:283)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:283)),model/prelude_mapping.sail:283),Effect_aux(Effect_set([]),model/prelude_mapping.sail:283)),model/prelude_mapping.sail:283)),model/prelude_mapping.sail:283))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_14_forwards_matches"),model/prelude_mapping.sail:284),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:284)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:284)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14_matches_prefix"),model/prelude_mapping.sail:285),[_: "hex_bits_14_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:285)),model/prelude_mapping.sail:285))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:285),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:285)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:285)),model/prelude_mapping.sail:285))]),model/prelude_mapping.sail:285)),model/prelude_mapping.sail:285))]),model/prelude_mapping.sail:285),Effect_aux(Effect_set([]),model/prelude_mapping.sail:285)),model/prelude_mapping.sail:285)),model/prelude_mapping.sail:285))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14_backwards_matches"),model/prelude_mapping.sail:286),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:286)),model/prelude_mapping.sail:286))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:286)),model/prelude_mapping.sail:286),Effect_aux(Effect_set([]),model/prelude_mapping.sail:286)),model/prelude_mapping.sail:286)),model/prelude_mapping.sail:286))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_14_backwards_matches"),model/prelude_mapping.sail:287),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:287)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:287)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:288)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_14_matches_prefix"),model/prelude_mapping.sail:288),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:288)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:289),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:289)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:289)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:289),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:289)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex762#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex762#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex762#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:289)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:290)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:291)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:292)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_14_backwards"),model/prelude_mapping.sail:294),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:294)),model/prelude_mapping.sail:294))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:294)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:294)),model/prelude_mapping.sail:294)),model/prelude_mapping.sail:294))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_14_backwards"),model/prelude_mapping.sail:295),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:295)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_14_matches_prefix"),model/prelude_mapping.sail:296),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:296)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:297),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:297)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:297)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:297)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:297),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:297)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex768#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex768#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex768#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:297)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:281)),model/prelude_mapping.sail:281))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),model/prelude_mapping.sail:281)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15"),model/prelude_mapping.sail:300),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15_forwards"),model/prelude_mapping.sail:301),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:301)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:301)),model/prelude_mapping.sail:301),Effect_aux(Effect_set([]),model/prelude_mapping.sail:301)),model/prelude_mapping.sail:301)),model/prelude_mapping.sail:301))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15_forwards_matches"),model/prelude_mapping.sail:302),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:302)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:302)),model/prelude_mapping.sail:302),Effect_aux(Effect_set([]),model/prelude_mapping.sail:302)),model/prelude_mapping.sail:302)),model/prelude_mapping.sail:302))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_15_forwards_matches"),model/prelude_mapping.sail:303),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:303)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:303)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15_matches_prefix"),model/prelude_mapping.sail:304),[_: "hex_bits_15_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:304)),model/prelude_mapping.sail:304))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:304),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:304)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:304)),model/prelude_mapping.sail:304))]),model/prelude_mapping.sail:304)),model/prelude_mapping.sail:304))]),model/prelude_mapping.sail:304),Effect_aux(Effect_set([]),model/prelude_mapping.sail:304)),model/prelude_mapping.sail:304)),model/prelude_mapping.sail:304))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15_backwards_matches"),model/prelude_mapping.sail:305),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:305)),model/prelude_mapping.sail:305))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:305)),model/prelude_mapping.sail:305),Effect_aux(Effect_set([]),model/prelude_mapping.sail:305)),model/prelude_mapping.sail:305)),model/prelude_mapping.sail:305))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_15_backwards_matches"),model/prelude_mapping.sail:306),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:306)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:306)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:307)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_15_matches_prefix"),model/prelude_mapping.sail:307),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:307)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:308),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:308)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:308)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:308),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:308)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex780#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex780#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex780#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:308)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:309)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:310)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:311)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_15_backwards"),model/prelude_mapping.sail:313),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:313)),model/prelude_mapping.sail:313))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:313)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:313)),model/prelude_mapping.sail:313)),model/prelude_mapping.sail:313))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_15_backwards"),model/prelude_mapping.sail:314),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:314)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_15_matches_prefix"),model/prelude_mapping.sail:315),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:315)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:316),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:316)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:316)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:316)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:316),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:316)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex786#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex786#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex786#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:316)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:300)),model/prelude_mapping.sail:300))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),model/prelude_mapping.sail:300)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16"),model/prelude_mapping.sail:319),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16_forwards"),model/prelude_mapping.sail:320),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:320)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:320)),model/prelude_mapping.sail:320),Effect_aux(Effect_set([]),model/prelude_mapping.sail:320)),model/prelude_mapping.sail:320)),model/prelude_mapping.sail:320))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16_forwards_matches"),model/prelude_mapping.sail:321),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:321)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:321)),model/prelude_mapping.sail:321),Effect_aux(Effect_set([]),model/prelude_mapping.sail:321)),model/prelude_mapping.sail:321)),model/prelude_mapping.sail:321))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_16_forwards_matches"),model/prelude_mapping.sail:322),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:322)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:322)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16_matches_prefix"),model/prelude_mapping.sail:323),[_: "hex_bits_16_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:323)),model/prelude_mapping.sail:323))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:323),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:323)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:323)),model/prelude_mapping.sail:323))]),model/prelude_mapping.sail:323)),model/prelude_mapping.sail:323))]),model/prelude_mapping.sail:323),Effect_aux(Effect_set([]),model/prelude_mapping.sail:323)),model/prelude_mapping.sail:323)),model/prelude_mapping.sail:323))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16_backwards_matches"),model/prelude_mapping.sail:324),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:324)),model/prelude_mapping.sail:324))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:324)),model/prelude_mapping.sail:324),Effect_aux(Effect_set([]),model/prelude_mapping.sail:324)),model/prelude_mapping.sail:324)),model/prelude_mapping.sail:324))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_16_backwards_matches"),model/prelude_mapping.sail:325),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:325)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:325)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:326)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_16_matches_prefix"),model/prelude_mapping.sail:326),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:326)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:327),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:327)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:327)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:327),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:327)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex798#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex798#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex798#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:327)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:328)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:329)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:330)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_16_backwards"),model/prelude_mapping.sail:332),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:332)),model/prelude_mapping.sail:332))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:332)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:332)),model/prelude_mapping.sail:332)),model/prelude_mapping.sail:332))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_16_backwards"),model/prelude_mapping.sail:333),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:333)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_16_matches_prefix"),model/prelude_mapping.sail:334),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:334)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:335),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:335)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:335)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:335)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:335),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:335)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex804#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex804#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex804#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:335)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:319)),model/prelude_mapping.sail:319))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17"),model/prelude_mapping.sail:338),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17_forwards"),model/prelude_mapping.sail:339),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:339)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:339)),model/prelude_mapping.sail:339),Effect_aux(Effect_set([]),model/prelude_mapping.sail:339)),model/prelude_mapping.sail:339)),model/prelude_mapping.sail:339))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17_forwards_matches"),model/prelude_mapping.sail:340),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:340)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:340)),model/prelude_mapping.sail:340),Effect_aux(Effect_set([]),model/prelude_mapping.sail:340)),model/prelude_mapping.sail:340)),model/prelude_mapping.sail:340))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_17_forwards_matches"),model/prelude_mapping.sail:341),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:341)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:341)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17_matches_prefix"),model/prelude_mapping.sail:342),[_: "hex_bits_17_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:342)),model/prelude_mapping.sail:342))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:342),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:342)),model/prelude_mapping.sail:342))]),model/prelude_mapping.sail:342)),model/prelude_mapping.sail:342))]),model/prelude_mapping.sail:342),Effect_aux(Effect_set([]),model/prelude_mapping.sail:342)),model/prelude_mapping.sail:342)),model/prelude_mapping.sail:342))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17_backwards_matches"),model/prelude_mapping.sail:343),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:343)),model/prelude_mapping.sail:343))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:343)),model/prelude_mapping.sail:343),Effect_aux(Effect_set([]),model/prelude_mapping.sail:343)),model/prelude_mapping.sail:343)),model/prelude_mapping.sail:343))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_17_backwards_matches"),model/prelude_mapping.sail:344),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:344)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:344)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:345)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_17_matches_prefix"),model/prelude_mapping.sail:345),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:345)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:346),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:346)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:346)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:346),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:346)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex816#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex816#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex816#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:346)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:347)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:348)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:349)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_17_backwards"),model/prelude_mapping.sail:351),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:351)),model/prelude_mapping.sail:351))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:351)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:351)),model/prelude_mapping.sail:351)),model/prelude_mapping.sail:351))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_17_backwards"),model/prelude_mapping.sail:352),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:352)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_17_matches_prefix"),model/prelude_mapping.sail:353),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:353)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:354),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:354)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:354)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:354)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:354),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:354)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex822#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex822#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex822#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:354)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:338)),model/prelude_mapping.sail:338))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),model/prelude_mapping.sail:338)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18"),model/prelude_mapping.sail:357),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18_forwards"),model/prelude_mapping.sail:358),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:358)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:358)),model/prelude_mapping.sail:358),Effect_aux(Effect_set([]),model/prelude_mapping.sail:358)),model/prelude_mapping.sail:358)),model/prelude_mapping.sail:358))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18_forwards_matches"),model/prelude_mapping.sail:359),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:359)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:359)),model/prelude_mapping.sail:359),Effect_aux(Effect_set([]),model/prelude_mapping.sail:359)),model/prelude_mapping.sail:359)),model/prelude_mapping.sail:359))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_18_forwards_matches"),model/prelude_mapping.sail:360),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:360)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:360)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18_matches_prefix"),model/prelude_mapping.sail:361),[_: "hex_bits_18_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:361)),model/prelude_mapping.sail:361))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:361),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:361)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:361)),model/prelude_mapping.sail:361))]),model/prelude_mapping.sail:361)),model/prelude_mapping.sail:361))]),model/prelude_mapping.sail:361),Effect_aux(Effect_set([]),model/prelude_mapping.sail:361)),model/prelude_mapping.sail:361)),model/prelude_mapping.sail:361))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18_backwards_matches"),model/prelude_mapping.sail:362),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:362)),model/prelude_mapping.sail:362))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:362)),model/prelude_mapping.sail:362),Effect_aux(Effect_set([]),model/prelude_mapping.sail:362)),model/prelude_mapping.sail:362)),model/prelude_mapping.sail:362))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_18_backwards_matches"),model/prelude_mapping.sail:363),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:363)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:363)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:364)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_18_matches_prefix"),model/prelude_mapping.sail:364),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:364)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:365),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:365)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:365)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:365),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:365)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex834#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex834#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex834#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:365)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:366)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:367)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:368)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_18_backwards"),model/prelude_mapping.sail:370),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:370)),model/prelude_mapping.sail:370))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:370)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:370)),model/prelude_mapping.sail:370)),model/prelude_mapping.sail:370))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_18_backwards"),model/prelude_mapping.sail:371),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:371)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_18_matches_prefix"),model/prelude_mapping.sail:372),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:372)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:373),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:373)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:373)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:373)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:373),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:373)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex840#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex840#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex840#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:373)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:357)),model/prelude_mapping.sail:357))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),model/prelude_mapping.sail:357)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19"),model/prelude_mapping.sail:376),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19_forwards"),model/prelude_mapping.sail:377),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:377)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:377)),model/prelude_mapping.sail:377),Effect_aux(Effect_set([]),model/prelude_mapping.sail:377)),model/prelude_mapping.sail:377)),model/prelude_mapping.sail:377))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19_forwards_matches"),model/prelude_mapping.sail:378),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:378)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:378)),model/prelude_mapping.sail:378),Effect_aux(Effect_set([]),model/prelude_mapping.sail:378)),model/prelude_mapping.sail:378)),model/prelude_mapping.sail:378))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_19_forwards_matches"),model/prelude_mapping.sail:379),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:379)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:379)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19_matches_prefix"),model/prelude_mapping.sail:380),[_: "hex_bits_19_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:380)),model/prelude_mapping.sail:380))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:380),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:380)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:380)),model/prelude_mapping.sail:380))]),model/prelude_mapping.sail:380)),model/prelude_mapping.sail:380))]),model/prelude_mapping.sail:380),Effect_aux(Effect_set([]),model/prelude_mapping.sail:380)),model/prelude_mapping.sail:380)),model/prelude_mapping.sail:380))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19_backwards_matches"),model/prelude_mapping.sail:381),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:381)),model/prelude_mapping.sail:381))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:381)),model/prelude_mapping.sail:381),Effect_aux(Effect_set([]),model/prelude_mapping.sail:381)),model/prelude_mapping.sail:381)),model/prelude_mapping.sail:381))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_19_backwards_matches"),model/prelude_mapping.sail:382),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:382)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:382)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:383)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_19_matches_prefix"),model/prelude_mapping.sail:383),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:383)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:384),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:384)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:384)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:384),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:384)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex852#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex852#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex852#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:384)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:385)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:386)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:387)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_19_backwards"),model/prelude_mapping.sail:389),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:389)),model/prelude_mapping.sail:389))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:389)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:389)),model/prelude_mapping.sail:389)),model/prelude_mapping.sail:389))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_19_backwards"),model/prelude_mapping.sail:390),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:390)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_19_matches_prefix"),model/prelude_mapping.sail:391),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:391)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:392),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:392)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:392)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:392)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:392),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:392)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex858#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex858#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex858#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:392)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:376)),model/prelude_mapping.sail:376))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),model/prelude_mapping.sail:376)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20"),model/prelude_mapping.sail:395),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20_forwards"),model/prelude_mapping.sail:396),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:396)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:396)),model/prelude_mapping.sail:396),Effect_aux(Effect_set([]),model/prelude_mapping.sail:396)),model/prelude_mapping.sail:396)),model/prelude_mapping.sail:396))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20_forwards_matches"),model/prelude_mapping.sail:397),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:397)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:397)),model/prelude_mapping.sail:397),Effect_aux(Effect_set([]),model/prelude_mapping.sail:397)),model/prelude_mapping.sail:397)),model/prelude_mapping.sail:397))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_20_forwards_matches"),model/prelude_mapping.sail:398),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:398)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:398)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20_matches_prefix"),model/prelude_mapping.sail:399),[_: "hex_bits_20_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:399)),model/prelude_mapping.sail:399))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:399),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:399)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:399)),model/prelude_mapping.sail:399))]),model/prelude_mapping.sail:399)),model/prelude_mapping.sail:399))]),model/prelude_mapping.sail:399),Effect_aux(Effect_set([]),model/prelude_mapping.sail:399)),model/prelude_mapping.sail:399)),model/prelude_mapping.sail:399))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20_backwards_matches"),model/prelude_mapping.sail:400),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:400)),model/prelude_mapping.sail:400))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:400)),model/prelude_mapping.sail:400),Effect_aux(Effect_set([]),model/prelude_mapping.sail:400)),model/prelude_mapping.sail:400)),model/prelude_mapping.sail:400))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_20_backwards_matches"),model/prelude_mapping.sail:401),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:401)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:401)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:402)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_20_matches_prefix"),model/prelude_mapping.sail:402),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:402)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:403),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:403)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:403)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:403),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:403)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex870#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex870#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex870#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:403)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:404)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:405)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:406)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_20_backwards"),model/prelude_mapping.sail:408),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:408)),model/prelude_mapping.sail:408))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:408)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:408)),model/prelude_mapping.sail:408)),model/prelude_mapping.sail:408))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_20_backwards"),model/prelude_mapping.sail:409),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:409)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_20_matches_prefix"),model/prelude_mapping.sail:410),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:410)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:411),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:411)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:411)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:411)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:411),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:411)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex876#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex876#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex876#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:411)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:395)),model/prelude_mapping.sail:395))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/prelude_mapping.sail:395)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21"),model/prelude_mapping.sail:414),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21_forwards"),model/prelude_mapping.sail:415),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:415)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:415)),model/prelude_mapping.sail:415),Effect_aux(Effect_set([]),model/prelude_mapping.sail:415)),model/prelude_mapping.sail:415)),model/prelude_mapping.sail:415))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21_forwards_matches"),model/prelude_mapping.sail:416),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:416)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:416)),model/prelude_mapping.sail:416),Effect_aux(Effect_set([]),model/prelude_mapping.sail:416)),model/prelude_mapping.sail:416)),model/prelude_mapping.sail:416))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_21_forwards_matches"),model/prelude_mapping.sail:417),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:417)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:417)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21_matches_prefix"),model/prelude_mapping.sail:418),[_: "hex_bits_21_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:418)),model/prelude_mapping.sail:418))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:418),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:418)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:418)),model/prelude_mapping.sail:418))]),model/prelude_mapping.sail:418)),model/prelude_mapping.sail:418))]),model/prelude_mapping.sail:418),Effect_aux(Effect_set([]),model/prelude_mapping.sail:418)),model/prelude_mapping.sail:418)),model/prelude_mapping.sail:418))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21_backwards_matches"),model/prelude_mapping.sail:419),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:419)),model/prelude_mapping.sail:419))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:419)),model/prelude_mapping.sail:419),Effect_aux(Effect_set([]),model/prelude_mapping.sail:419)),model/prelude_mapping.sail:419)),model/prelude_mapping.sail:419))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_21_backwards_matches"),model/prelude_mapping.sail:420),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:420)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:420)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:421)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_21_matches_prefix"),model/prelude_mapping.sail:421),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:421)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:422),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:422)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:422)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:422),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:422)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex888#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex888#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex888#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:422)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:423)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:424)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:425)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_21_backwards"),model/prelude_mapping.sail:427),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:427)),model/prelude_mapping.sail:427))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:427)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:427)),model/prelude_mapping.sail:427)),model/prelude_mapping.sail:427))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_21_backwards"),model/prelude_mapping.sail:428),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:428)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_21_matches_prefix"),model/prelude_mapping.sail:429),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:429)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:430),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:430)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:430)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:430)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:430),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:430)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex894#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex894#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex894#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:430)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:414)),model/prelude_mapping.sail:414))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),model/prelude_mapping.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22"),model/prelude_mapping.sail:433),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22_forwards"),model/prelude_mapping.sail:434),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:434)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:434)),model/prelude_mapping.sail:434),Effect_aux(Effect_set([]),model/prelude_mapping.sail:434)),model/prelude_mapping.sail:434)),model/prelude_mapping.sail:434))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22_forwards_matches"),model/prelude_mapping.sail:435),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:435)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:435)),model/prelude_mapping.sail:435),Effect_aux(Effect_set([]),model/prelude_mapping.sail:435)),model/prelude_mapping.sail:435)),model/prelude_mapping.sail:435))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_22_forwards_matches"),model/prelude_mapping.sail:436),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:436)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:436)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22_matches_prefix"),model/prelude_mapping.sail:437),[_: "hex_bits_22_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:437)),model/prelude_mapping.sail:437))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:437),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:437)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:437)),model/prelude_mapping.sail:437))]),model/prelude_mapping.sail:437)),model/prelude_mapping.sail:437))]),model/prelude_mapping.sail:437),Effect_aux(Effect_set([]),model/prelude_mapping.sail:437)),model/prelude_mapping.sail:437)),model/prelude_mapping.sail:437))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22_backwards_matches"),model/prelude_mapping.sail:438),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:438)),model/prelude_mapping.sail:438))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:438)),model/prelude_mapping.sail:438),Effect_aux(Effect_set([]),model/prelude_mapping.sail:438)),model/prelude_mapping.sail:438)),model/prelude_mapping.sail:438))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_22_backwards_matches"),model/prelude_mapping.sail:439),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:439)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:439)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:440)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_22_matches_prefix"),model/prelude_mapping.sail:440),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:440)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:441),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:441)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:441)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:441),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:441)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex906#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex906#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex906#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:441)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:442)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:443)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:444)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_22_backwards"),model/prelude_mapping.sail:446),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:446)),model/prelude_mapping.sail:446))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:446)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:446)),model/prelude_mapping.sail:446)),model/prelude_mapping.sail:446))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_22_backwards"),model/prelude_mapping.sail:447),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:447)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_22_matches_prefix"),model/prelude_mapping.sail:448),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:448)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:449),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:449)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:449)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:449)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:449),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:449)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex912#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex912#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex912#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:449)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:433)),model/prelude_mapping.sail:433))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),model/prelude_mapping.sail:433)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23"),model/prelude_mapping.sail:452),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23_forwards"),model/prelude_mapping.sail:453),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:453)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:453)),model/prelude_mapping.sail:453),Effect_aux(Effect_set([]),model/prelude_mapping.sail:453)),model/prelude_mapping.sail:453)),model/prelude_mapping.sail:453))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23_forwards_matches"),model/prelude_mapping.sail:454),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:454)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:454)),model/prelude_mapping.sail:454),Effect_aux(Effect_set([]),model/prelude_mapping.sail:454)),model/prelude_mapping.sail:454)),model/prelude_mapping.sail:454))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_23_forwards_matches"),model/prelude_mapping.sail:455),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:455)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:455)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23_matches_prefix"),model/prelude_mapping.sail:456),[_: "hex_bits_23_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:456)),model/prelude_mapping.sail:456))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:456),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:456)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:456)),model/prelude_mapping.sail:456))]),model/prelude_mapping.sail:456)),model/prelude_mapping.sail:456))]),model/prelude_mapping.sail:456),Effect_aux(Effect_set([]),model/prelude_mapping.sail:456)),model/prelude_mapping.sail:456)),model/prelude_mapping.sail:456))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23_backwards_matches"),model/prelude_mapping.sail:457),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:457)),model/prelude_mapping.sail:457))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:457)),model/prelude_mapping.sail:457),Effect_aux(Effect_set([]),model/prelude_mapping.sail:457)),model/prelude_mapping.sail:457)),model/prelude_mapping.sail:457))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_23_backwards_matches"),model/prelude_mapping.sail:458),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:458)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:458)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:459)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_23_matches_prefix"),model/prelude_mapping.sail:459),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:459)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:460),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:460)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:460)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:460),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:460)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex924#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex924#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex924#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:460)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:461)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:462)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:463)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_23_backwards"),model/prelude_mapping.sail:465),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:465)),model/prelude_mapping.sail:465))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:465)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:465)),model/prelude_mapping.sail:465)),model/prelude_mapping.sail:465))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_23_backwards"),model/prelude_mapping.sail:466),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:466)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_23_matches_prefix"),model/prelude_mapping.sail:467),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:467)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:468),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:468)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:468)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:468)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:468),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:468)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex930#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex930#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex930#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:468)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:452)),model/prelude_mapping.sail:452))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),model/prelude_mapping.sail:452)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24"),model/prelude_mapping.sail:471),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24_forwards"),model/prelude_mapping.sail:472),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:472)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:472)),model/prelude_mapping.sail:472),Effect_aux(Effect_set([]),model/prelude_mapping.sail:472)),model/prelude_mapping.sail:472)),model/prelude_mapping.sail:472))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24_forwards_matches"),model/prelude_mapping.sail:473),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:473)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:473)),model/prelude_mapping.sail:473),Effect_aux(Effect_set([]),model/prelude_mapping.sail:473)),model/prelude_mapping.sail:473)),model/prelude_mapping.sail:473))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_24_forwards_matches"),model/prelude_mapping.sail:474),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:474)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:474)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24_matches_prefix"),model/prelude_mapping.sail:475),[_: "hex_bits_24_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:475)),model/prelude_mapping.sail:475))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:475),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:475)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:475)),model/prelude_mapping.sail:475))]),model/prelude_mapping.sail:475)),model/prelude_mapping.sail:475))]),model/prelude_mapping.sail:475),Effect_aux(Effect_set([]),model/prelude_mapping.sail:475)),model/prelude_mapping.sail:475)),model/prelude_mapping.sail:475))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24_backwards_matches"),model/prelude_mapping.sail:476),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:476)),model/prelude_mapping.sail:476))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:476)),model/prelude_mapping.sail:476),Effect_aux(Effect_set([]),model/prelude_mapping.sail:476)),model/prelude_mapping.sail:476)),model/prelude_mapping.sail:476))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_24_backwards_matches"),model/prelude_mapping.sail:477),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:477)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:477)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:478)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_24_matches_prefix"),model/prelude_mapping.sail:478),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:478)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:479),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:479)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:479)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:479),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:479)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex942#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex942#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex942#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:479)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:480)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:481)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:482)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_24_backwards"),model/prelude_mapping.sail:484),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:484)),model/prelude_mapping.sail:484))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:484)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:484)),model/prelude_mapping.sail:484)),model/prelude_mapping.sail:484))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_24_backwards"),model/prelude_mapping.sail:485),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:485)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_24_matches_prefix"),model/prelude_mapping.sail:486),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:486)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:487),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:487)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:487)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:487)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:487),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:487)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex948#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex948#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex948#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:487)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:471)),model/prelude_mapping.sail:471))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),model/prelude_mapping.sail:471)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25"),model/prelude_mapping.sail:490),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25_forwards"),model/prelude_mapping.sail:491),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:491)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:491)),model/prelude_mapping.sail:491),Effect_aux(Effect_set([]),model/prelude_mapping.sail:491)),model/prelude_mapping.sail:491)),model/prelude_mapping.sail:491))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25_forwards_matches"),model/prelude_mapping.sail:492),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:492)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:492)),model/prelude_mapping.sail:492),Effect_aux(Effect_set([]),model/prelude_mapping.sail:492)),model/prelude_mapping.sail:492)),model/prelude_mapping.sail:492))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_25_forwards_matches"),model/prelude_mapping.sail:493),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:493)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:493)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25_matches_prefix"),model/prelude_mapping.sail:494),[_: "hex_bits_25_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:494)),model/prelude_mapping.sail:494))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:494),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:494)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:494)),model/prelude_mapping.sail:494))]),model/prelude_mapping.sail:494)),model/prelude_mapping.sail:494))]),model/prelude_mapping.sail:494),Effect_aux(Effect_set([]),model/prelude_mapping.sail:494)),model/prelude_mapping.sail:494)),model/prelude_mapping.sail:494))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25_backwards_matches"),model/prelude_mapping.sail:495),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:495)),model/prelude_mapping.sail:495))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:495)),model/prelude_mapping.sail:495),Effect_aux(Effect_set([]),model/prelude_mapping.sail:495)),model/prelude_mapping.sail:495)),model/prelude_mapping.sail:495))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_25_backwards_matches"),model/prelude_mapping.sail:496),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:496)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:496)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:497)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_25_matches_prefix"),model/prelude_mapping.sail:497),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:497)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:498),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:498)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:498)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:498),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:498)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex960#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex960#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex960#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:498)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:499)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:500)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:501)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_25_backwards"),model/prelude_mapping.sail:503),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:503)),model/prelude_mapping.sail:503))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:503)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:503)),model/prelude_mapping.sail:503)),model/prelude_mapping.sail:503))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_25_backwards"),model/prelude_mapping.sail:504),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:504)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_25_matches_prefix"),model/prelude_mapping.sail:505),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:505)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:506),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:506)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:506)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:506)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:506),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:506)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex966#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex966#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex966#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:506)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:490)),model/prelude_mapping.sail:490))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),model/prelude_mapping.sail:490)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26"),model/prelude_mapping.sail:509),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26_forwards"),model/prelude_mapping.sail:510),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:510)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:510)),model/prelude_mapping.sail:510),Effect_aux(Effect_set([]),model/prelude_mapping.sail:510)),model/prelude_mapping.sail:510)),model/prelude_mapping.sail:510))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26_forwards_matches"),model/prelude_mapping.sail:511),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:511)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:511)),model/prelude_mapping.sail:511),Effect_aux(Effect_set([]),model/prelude_mapping.sail:511)),model/prelude_mapping.sail:511)),model/prelude_mapping.sail:511))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_26_forwards_matches"),model/prelude_mapping.sail:512),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:512)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:512)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26_matches_prefix"),model/prelude_mapping.sail:513),[_: "hex_bits_26_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:513)),model/prelude_mapping.sail:513))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:513),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:513)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:513)),model/prelude_mapping.sail:513))]),model/prelude_mapping.sail:513)),model/prelude_mapping.sail:513))]),model/prelude_mapping.sail:513),Effect_aux(Effect_set([]),model/prelude_mapping.sail:513)),model/prelude_mapping.sail:513)),model/prelude_mapping.sail:513))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26_backwards_matches"),model/prelude_mapping.sail:514),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:514)),model/prelude_mapping.sail:514))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:514)),model/prelude_mapping.sail:514),Effect_aux(Effect_set([]),model/prelude_mapping.sail:514)),model/prelude_mapping.sail:514)),model/prelude_mapping.sail:514))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_26_backwards_matches"),model/prelude_mapping.sail:515),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:515)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:515)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:516)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_26_matches_prefix"),model/prelude_mapping.sail:516),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:516)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:517),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:517)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:517)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:517),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:517)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex978#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex978#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex978#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:517)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:518)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:519)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:520)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_26_backwards"),model/prelude_mapping.sail:522),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:522)),model/prelude_mapping.sail:522))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:522)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:522)),model/prelude_mapping.sail:522)),model/prelude_mapping.sail:522))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_26_backwards"),model/prelude_mapping.sail:523),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:523)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_26_matches_prefix"),model/prelude_mapping.sail:524),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:524)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:525),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:525)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:525)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:525)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:525),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:525)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex984#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex984#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex984#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:525)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:509)),model/prelude_mapping.sail:509))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),model/prelude_mapping.sail:509)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27"),model/prelude_mapping.sail:528),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27_forwards"),model/prelude_mapping.sail:529),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:529)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:529)),model/prelude_mapping.sail:529),Effect_aux(Effect_set([]),model/prelude_mapping.sail:529)),model/prelude_mapping.sail:529)),model/prelude_mapping.sail:529))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27_forwards_matches"),model/prelude_mapping.sail:530),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:530)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:530)),model/prelude_mapping.sail:530),Effect_aux(Effect_set([]),model/prelude_mapping.sail:530)),model/prelude_mapping.sail:530)),model/prelude_mapping.sail:530))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_27_forwards_matches"),model/prelude_mapping.sail:531),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:531)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:531)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27_matches_prefix"),model/prelude_mapping.sail:532),[_: "hex_bits_27_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:532)),model/prelude_mapping.sail:532))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:532),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:532)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:532)),model/prelude_mapping.sail:532))]),model/prelude_mapping.sail:532)),model/prelude_mapping.sail:532))]),model/prelude_mapping.sail:532),Effect_aux(Effect_set([]),model/prelude_mapping.sail:532)),model/prelude_mapping.sail:532)),model/prelude_mapping.sail:532))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27_backwards_matches"),model/prelude_mapping.sail:533),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:533)),model/prelude_mapping.sail:533))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:533)),model/prelude_mapping.sail:533),Effect_aux(Effect_set([]),model/prelude_mapping.sail:533)),model/prelude_mapping.sail:533)),model/prelude_mapping.sail:533))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_27_backwards_matches"),model/prelude_mapping.sail:534),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:534)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:534)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:535)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_27_matches_prefix"),model/prelude_mapping.sail:535),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:535)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:536),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:536)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:536)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:536),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:536)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex996#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex996#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex996#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:536)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:537)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:538)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:539)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_27_backwards"),model/prelude_mapping.sail:541),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:541)),model/prelude_mapping.sail:541))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:541)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:541)),model/prelude_mapping.sail:541)),model/prelude_mapping.sail:541))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_27_backwards"),model/prelude_mapping.sail:542),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:542)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_27_matches_prefix"),model/prelude_mapping.sail:543),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:543)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:544),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:544)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:544)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:544)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:544),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:544)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1002#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1002#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1002#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:544)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:528)),model/prelude_mapping.sail:528))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),model/prelude_mapping.sail:528)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28"),model/prelude_mapping.sail:547),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28_forwards"),model/prelude_mapping.sail:548),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:548)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:548)),model/prelude_mapping.sail:548),Effect_aux(Effect_set([]),model/prelude_mapping.sail:548)),model/prelude_mapping.sail:548)),model/prelude_mapping.sail:548))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28_forwards_matches"),model/prelude_mapping.sail:549),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:549)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:549)),model/prelude_mapping.sail:549),Effect_aux(Effect_set([]),model/prelude_mapping.sail:549)),model/prelude_mapping.sail:549)),model/prelude_mapping.sail:549))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_28_forwards_matches"),model/prelude_mapping.sail:550),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:550)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:550)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28_matches_prefix"),model/prelude_mapping.sail:551),[_: "hex_bits_28_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:551)),model/prelude_mapping.sail:551))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:551),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:551)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:551)),model/prelude_mapping.sail:551))]),model/prelude_mapping.sail:551)),model/prelude_mapping.sail:551))]),model/prelude_mapping.sail:551),Effect_aux(Effect_set([]),model/prelude_mapping.sail:551)),model/prelude_mapping.sail:551)),model/prelude_mapping.sail:551))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28_backwards_matches"),model/prelude_mapping.sail:552),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:552)),model/prelude_mapping.sail:552))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:552)),model/prelude_mapping.sail:552),Effect_aux(Effect_set([]),model/prelude_mapping.sail:552)),model/prelude_mapping.sail:552)),model/prelude_mapping.sail:552))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_28_backwards_matches"),model/prelude_mapping.sail:553),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:553)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:553)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:554)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_28_matches_prefix"),model/prelude_mapping.sail:554),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:554)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:555),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:555)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:555)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:555),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:555)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1014#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1014#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1014#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:555)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:556)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:557)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:558)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_28_backwards"),model/prelude_mapping.sail:560),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:560)),model/prelude_mapping.sail:560))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:560)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:560)),model/prelude_mapping.sail:560)),model/prelude_mapping.sail:560))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_28_backwards"),model/prelude_mapping.sail:561),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:561)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_28_matches_prefix"),model/prelude_mapping.sail:562),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:562)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:563),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:563)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:563)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:563)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:563),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:563)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1020#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1020#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1020#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:563)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:547)),model/prelude_mapping.sail:547))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),model/prelude_mapping.sail:547)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29"),model/prelude_mapping.sail:566),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29_forwards"),model/prelude_mapping.sail:567),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:567)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:567)),model/prelude_mapping.sail:567),Effect_aux(Effect_set([]),model/prelude_mapping.sail:567)),model/prelude_mapping.sail:567)),model/prelude_mapping.sail:567))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29_forwards_matches"),model/prelude_mapping.sail:568),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:568)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:568)),model/prelude_mapping.sail:568),Effect_aux(Effect_set([]),model/prelude_mapping.sail:568)),model/prelude_mapping.sail:568)),model/prelude_mapping.sail:568))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_29_forwards_matches"),model/prelude_mapping.sail:569),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:569)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:569)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29_matches_prefix"),model/prelude_mapping.sail:570),[_: "hex_bits_29_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:570)),model/prelude_mapping.sail:570))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:570),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:570)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:570)),model/prelude_mapping.sail:570))]),model/prelude_mapping.sail:570)),model/prelude_mapping.sail:570))]),model/prelude_mapping.sail:570),Effect_aux(Effect_set([]),model/prelude_mapping.sail:570)),model/prelude_mapping.sail:570)),model/prelude_mapping.sail:570))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29_backwards_matches"),model/prelude_mapping.sail:571),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:571)),model/prelude_mapping.sail:571))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:571)),model/prelude_mapping.sail:571),Effect_aux(Effect_set([]),model/prelude_mapping.sail:571)),model/prelude_mapping.sail:571)),model/prelude_mapping.sail:571))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_29_backwards_matches"),model/prelude_mapping.sail:572),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:572)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:572)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:573)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_29_matches_prefix"),model/prelude_mapping.sail:573),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:573)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:574),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:574)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:574)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:574),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:574)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1032#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1032#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1032#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:574)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:575)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:576)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:577)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_29_backwards"),model/prelude_mapping.sail:579),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:579)),model/prelude_mapping.sail:579))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:579)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:579)),model/prelude_mapping.sail:579)),model/prelude_mapping.sail:579))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_29_backwards"),model/prelude_mapping.sail:580),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:580)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_29_matches_prefix"),model/prelude_mapping.sail:581),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:581)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:582),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:582)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:582)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:582)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:582),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:582)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1038#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1038#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1038#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:582)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:566)),model/prelude_mapping.sail:566))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),model/prelude_mapping.sail:566)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30"),model/prelude_mapping.sail:585),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30_forwards"),model/prelude_mapping.sail:586),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:586)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:586)),model/prelude_mapping.sail:586),Effect_aux(Effect_set([]),model/prelude_mapping.sail:586)),model/prelude_mapping.sail:586)),model/prelude_mapping.sail:586))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30_forwards_matches"),model/prelude_mapping.sail:587),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:587)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:587)),model/prelude_mapping.sail:587),Effect_aux(Effect_set([]),model/prelude_mapping.sail:587)),model/prelude_mapping.sail:587)),model/prelude_mapping.sail:587))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_30_forwards_matches"),model/prelude_mapping.sail:588),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:588)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:588)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30_matches_prefix"),model/prelude_mapping.sail:589),[_: "hex_bits_30_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:589)),model/prelude_mapping.sail:589))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:589),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:589)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:589)),model/prelude_mapping.sail:589))]),model/prelude_mapping.sail:589)),model/prelude_mapping.sail:589))]),model/prelude_mapping.sail:589),Effect_aux(Effect_set([]),model/prelude_mapping.sail:589)),model/prelude_mapping.sail:589)),model/prelude_mapping.sail:589))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30_backwards_matches"),model/prelude_mapping.sail:590),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:590)),model/prelude_mapping.sail:590))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:590)),model/prelude_mapping.sail:590),Effect_aux(Effect_set([]),model/prelude_mapping.sail:590)),model/prelude_mapping.sail:590)),model/prelude_mapping.sail:590))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_30_backwards_matches"),model/prelude_mapping.sail:591),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:591)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:591)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:592)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_30_matches_prefix"),model/prelude_mapping.sail:592),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:592)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:593),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:593)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:593)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:593),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:593)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1050#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1050#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1050#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:593)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:594)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:595)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:596)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_30_backwards"),model/prelude_mapping.sail:598),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:598)),model/prelude_mapping.sail:598))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:598)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:598)),model/prelude_mapping.sail:598)),model/prelude_mapping.sail:598))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_30_backwards"),model/prelude_mapping.sail:599),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:599)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_30_matches_prefix"),model/prelude_mapping.sail:600),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:600)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:601),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:601)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:601)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:601)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:601),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:601)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1056#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1056#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1056#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:601)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:585)),model/prelude_mapping.sail:585))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),model/prelude_mapping.sail:585)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31"),model/prelude_mapping.sail:604),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31_forwards"),model/prelude_mapping.sail:605),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:605)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:605)),model/prelude_mapping.sail:605),Effect_aux(Effect_set([]),model/prelude_mapping.sail:605)),model/prelude_mapping.sail:605)),model/prelude_mapping.sail:605))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31_forwards_matches"),model/prelude_mapping.sail:606),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:606)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:606)),model/prelude_mapping.sail:606),Effect_aux(Effect_set([]),model/prelude_mapping.sail:606)),model/prelude_mapping.sail:606)),model/prelude_mapping.sail:606))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_31_forwards_matches"),model/prelude_mapping.sail:607),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:607)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:607)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31_matches_prefix"),model/prelude_mapping.sail:608),[_: "hex_bits_31_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:608)),model/prelude_mapping.sail:608))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:608),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:608)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:608)),model/prelude_mapping.sail:608))]),model/prelude_mapping.sail:608)),model/prelude_mapping.sail:608))]),model/prelude_mapping.sail:608),Effect_aux(Effect_set([]),model/prelude_mapping.sail:608)),model/prelude_mapping.sail:608)),model/prelude_mapping.sail:608))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31_backwards_matches"),model/prelude_mapping.sail:609),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:609)),model/prelude_mapping.sail:609))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:609)),model/prelude_mapping.sail:609),Effect_aux(Effect_set([]),model/prelude_mapping.sail:609)),model/prelude_mapping.sail:609)),model/prelude_mapping.sail:609))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_31_backwards_matches"),model/prelude_mapping.sail:610),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:610)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:610)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:611)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_31_matches_prefix"),model/prelude_mapping.sail:611),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:611)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:612),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:612)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:612)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:612),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:612)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1068#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1068#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1068#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:612)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:613)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:614)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:615)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_31_backwards"),model/prelude_mapping.sail:617),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:617)),model/prelude_mapping.sail:617))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:617)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:617)),model/prelude_mapping.sail:617)),model/prelude_mapping.sail:617))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_31_backwards"),model/prelude_mapping.sail:618),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:618)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_31_matches_prefix"),model/prelude_mapping.sail:619),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:619)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:620),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:620)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:620)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:620)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:620),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:620)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1074#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1074#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1074#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:620)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:604)),model/prelude_mapping.sail:604))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),model/prelude_mapping.sail:604)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32"),model/prelude_mapping.sail:623),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32_forwards"),model/prelude_mapping.sail:624),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:624)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:624)),model/prelude_mapping.sail:624),Effect_aux(Effect_set([]),model/prelude_mapping.sail:624)),model/prelude_mapping.sail:624)),model/prelude_mapping.sail:624))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32_forwards_matches"),model/prelude_mapping.sail:625),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:625)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:625)),model/prelude_mapping.sail:625),Effect_aux(Effect_set([]),model/prelude_mapping.sail:625)),model/prelude_mapping.sail:625)),model/prelude_mapping.sail:625))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_32_forwards_matches"),model/prelude_mapping.sail:626),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:626)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:626)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32_matches_prefix"),model/prelude_mapping.sail:627),[_: "hex_bits_32_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:627)),model/prelude_mapping.sail:627))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:627),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:627)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:627)),model/prelude_mapping.sail:627))]),model/prelude_mapping.sail:627)),model/prelude_mapping.sail:627))]),model/prelude_mapping.sail:627),Effect_aux(Effect_set([]),model/prelude_mapping.sail:627)),model/prelude_mapping.sail:627)),model/prelude_mapping.sail:627))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32_backwards_matches"),model/prelude_mapping.sail:628),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:628)),model/prelude_mapping.sail:628))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:628)),model/prelude_mapping.sail:628),Effect_aux(Effect_set([]),model/prelude_mapping.sail:628)),model/prelude_mapping.sail:628)),model/prelude_mapping.sail:628))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_32_backwards_matches"),model/prelude_mapping.sail:629),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:629)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:629)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:630)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_32_matches_prefix"),model/prelude_mapping.sail:630),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:630)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:631),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:631)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:631)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:631),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:631)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1086#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1086#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1086#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:631)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:632)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:633)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:634)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_32_backwards"),model/prelude_mapping.sail:636),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:636)),model/prelude_mapping.sail:636))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:636)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:636)),model/prelude_mapping.sail:636)),model/prelude_mapping.sail:636))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_32_backwards"),model/prelude_mapping.sail:637),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:637)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_32_matches_prefix"),model/prelude_mapping.sail:638),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:638)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:639),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:639)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:639)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:639)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:639),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:639)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1092#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1092#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1092#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:639)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:623)),model/prelude_mapping.sail:623))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33"),model/prelude_mapping.sail:642),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33_forwards"),model/prelude_mapping.sail:643),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:643)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:643)),model/prelude_mapping.sail:643),Effect_aux(Effect_set([]),model/prelude_mapping.sail:643)),model/prelude_mapping.sail:643)),model/prelude_mapping.sail:643))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33_forwards_matches"),model/prelude_mapping.sail:644),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:644)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:644)),model/prelude_mapping.sail:644),Effect_aux(Effect_set([]),model/prelude_mapping.sail:644)),model/prelude_mapping.sail:644)),model/prelude_mapping.sail:644))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_33_forwards_matches"),model/prelude_mapping.sail:645),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:645)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:645)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33_matches_prefix"),model/prelude_mapping.sail:646),[_: "hex_bits_33_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:646)),model/prelude_mapping.sail:646))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:646),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:646)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:646)),model/prelude_mapping.sail:646))]),model/prelude_mapping.sail:646)),model/prelude_mapping.sail:646))]),model/prelude_mapping.sail:646),Effect_aux(Effect_set([]),model/prelude_mapping.sail:646)),model/prelude_mapping.sail:646)),model/prelude_mapping.sail:646))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33_backwards_matches"),model/prelude_mapping.sail:647),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:647)),model/prelude_mapping.sail:647))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:647)),model/prelude_mapping.sail:647),Effect_aux(Effect_set([]),model/prelude_mapping.sail:647)),model/prelude_mapping.sail:647)),model/prelude_mapping.sail:647))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_33_backwards_matches"),model/prelude_mapping.sail:648),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:648)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:648)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:649)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_33_matches_prefix"),model/prelude_mapping.sail:649),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:649)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:650),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:650)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:650)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:650),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:650)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1104#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1104#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1104#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:650)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:651)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:652)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:653)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_33_backwards"),model/prelude_mapping.sail:655),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:655)),model/prelude_mapping.sail:655))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:655)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:655)),model/prelude_mapping.sail:655)),model/prelude_mapping.sail:655))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_33_backwards"),model/prelude_mapping.sail:656),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:656)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_33_matches_prefix"),model/prelude_mapping.sail:657),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:657)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:658),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:658)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:658)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:658)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:658),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:658)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1110#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1110#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1110#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:658)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:642)),model/prelude_mapping.sail:642))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),model/prelude_mapping.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48"),model/prelude_mapping.sail:661),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48_forwards"),model/prelude_mapping.sail:662),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:662)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:662)),model/prelude_mapping.sail:662),Effect_aux(Effect_set([]),model/prelude_mapping.sail:662)),model/prelude_mapping.sail:662)),model/prelude_mapping.sail:662))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48_forwards_matches"),model/prelude_mapping.sail:663),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:663)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:663)),model/prelude_mapping.sail:663),Effect_aux(Effect_set([]),model/prelude_mapping.sail:663)),model/prelude_mapping.sail:663)),model/prelude_mapping.sail:663))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_48_forwards_matches"),model/prelude_mapping.sail:664),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:664)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:664)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48_matches_prefix"),model/prelude_mapping.sail:665),[_: "hex_bits_48_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:665)),model/prelude_mapping.sail:665))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:665),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:665)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:665)),model/prelude_mapping.sail:665))]),model/prelude_mapping.sail:665)),model/prelude_mapping.sail:665))]),model/prelude_mapping.sail:665),Effect_aux(Effect_set([]),model/prelude_mapping.sail:665)),model/prelude_mapping.sail:665)),model/prelude_mapping.sail:665))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48_backwards_matches"),model/prelude_mapping.sail:666),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:666)),model/prelude_mapping.sail:666))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:666)),model/prelude_mapping.sail:666),Effect_aux(Effect_set([]),model/prelude_mapping.sail:666)),model/prelude_mapping.sail:666)),model/prelude_mapping.sail:666))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_48_backwards_matches"),model/prelude_mapping.sail:667),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:667)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:667)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:668)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_48_matches_prefix"),model/prelude_mapping.sail:668),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:668)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:669),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:669)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:669)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:669),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:669)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1122#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1122#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1122#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:669)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:670)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:671)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:672)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_48_backwards"),model/prelude_mapping.sail:674),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:674)),model/prelude_mapping.sail:674))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:674)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:674)),model/prelude_mapping.sail:674)),model/prelude_mapping.sail:674))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_48_backwards"),model/prelude_mapping.sail:675),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:675)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_48_matches_prefix"),model/prelude_mapping.sail:676),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:676)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:677),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:677)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:677)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:677)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:677),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:677)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1128#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1128#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1128#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("bv"),model/prelude_mapping.sail:677)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:661)),model/prelude_mapping.sail:661))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/prelude_mapping.sail:661)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64"),model/prelude_mapping.sail:680),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64_forwards"),model/prelude_mapping.sail:681),[_: "decimal_string_of_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:681)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:681)),model/prelude_mapping.sail:681),Effect_aux(Effect_set([]),model/prelude_mapping.sail:681)),model/prelude_mapping.sail:681)),model/prelude_mapping.sail:681))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64_forwards_matches"),model/prelude_mapping.sail:682),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:682)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:682)),model/prelude_mapping.sail:682),Effect_aux(Effect_set([]),model/prelude_mapping.sail:682)),model/prelude_mapping.sail:682)),model/prelude_mapping.sail:682))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_64_forwards_matches"),model/prelude_mapping.sail:683),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:683)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:683)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64_matches_prefix"),model/prelude_mapping.sail:684),[_: "hex_bits_64_matches_prefix"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:684)),model/prelude_mapping.sail:684))],Typ_aux(Typ_app(Id_aux(Id("option"),model/prelude_mapping.sail:684),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:684)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude_mapping.sail:684)),model/prelude_mapping.sail:684))]),model/prelude_mapping.sail:684)),model/prelude_mapping.sail:684))]),model/prelude_mapping.sail:684),Effect_aux(Effect_set([]),model/prelude_mapping.sail:684)),model/prelude_mapping.sail:684)),model/prelude_mapping.sail:684))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64_backwards_matches"),model/prelude_mapping.sail:685),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:685)),model/prelude_mapping.sail:685))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mapping.sail:685)),model/prelude_mapping.sail:685),Effect_aux(Effect_set([]),model/prelude_mapping.sail:685)),model/prelude_mapping.sail:685)),model/prelude_mapping.sail:685))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_64_backwards_matches"),model/prelude_mapping.sail:686),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:686)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),E_aux(E_case(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:686)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),[(Pat_aux(Pat_when(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:687)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_64_matches_prefix"),model/prelude_mapping.sail:687),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:687)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:688),[(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:688)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("n"),model/prelude_mapping.sail:688)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("string_length"),model/prelude_mapping.sail:688),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:688)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)))]),Typ_aux(Typ_id(Id_aux(Id("nat"),model/prelude.sail:13)),model/prelude.sail:13)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'ex1140#"),Unknown)),Unknown))],NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1140#"),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'ex1140#"),Unknown)),Unknown)),../sail/lib/flow.sail:28)),Unknown))]),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:688)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:689)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_true,model/prelude_mapping.sail:690)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),E_aux(E_lit(L_aux(L_false,model/prelude_mapping.sail:691)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680))],Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("hex_bits_64_backwards"),model/prelude_mapping.sail:693),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:693)),model/prelude_mapping.sail:693))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:693)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/prelude_mapping.sail:693)),model/prelude_mapping.sail:693)),model/prelude_mapping.sail:693))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("hex_bits_64_backwards"),model/prelude_mapping.sail:694),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("s"),model/prelude_mapping.sail:694)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)),E_aux(E_case(E_aux(E_app(Id_aux(Id("hex_bits_64_matches_prefix"),model/prelude_mapping.sail:695),[(E_aux(E_id(Id_aux(Id("s"),model/prelude_mapping.sail:695)),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude_mapping.sail:680)),model/prelude_mapping.sail:680)))]),Typ_aux(Typ_app(Id_aux(Id("option"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),Unknown)),Unknown))]),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_when(P_aux(P_app(Id_aux(Id("Some"),model/prelude_mapping.sail:696),[(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("bv"),model/prelude_mapping.sail:696)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("n"),model/prelude_mapping.sail:696)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_n"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/prelude_mapping.sail:680)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6)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),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem_metadata.sail:12)),model/prelude_mem_metadata.sail:12)),Unknown))]),Unknown))]),model/prelude_mem_metadata.sail:13)),E_aux(E_lit(L_aux(L_unit,model/prelude_mem_metadata.sail:13)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem_metadata.sail:12)),model/prelude_mem_metadata.sail:12)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5),Effect_aux(Effect_set([(BE_aux(BE_rmem,model/prelude_mem_metadata.sail:12))]),model/prelude_mem_metadata.sail:12)),model/prelude_mem_metadata.sail:12)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("write_ram"),model/prelude_mem.sail:22),[lem: "write_ram",coq: "write_ram"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude_mem.sail:22),Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_lt(Nexp_aux(Nexp_constant(0),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22),Nexp_aux(Nexp_id(Id_aux(Id("max_mem_access"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22))]),model/prelude_mem.sail:22),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude_mem.sail:22),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22))]),model/prelude_mem.sail:22));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22),Effect_aux(Effect_set([(BE_aux(BE_wmv,model/prelude_mem.sail:22));(BE_aux(BE_wmvt,model/prelude_mem.sail:22))]),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("write_ram"),model/prelude_mem.sail:23),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("wk"),model/prelude_mem.sail:23)),Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)));(P_aux(P_id(Id_aux(Id("addr"),model/prelude_mem.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("width"),model/prelude_mem.sail:23)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("data"),model/prelude_mem.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("meta"),model/prelude_mem.sail:23)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/prelude_mem.sail:23-34)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:31)),model/prelude_mem.sail:31),P_aux(P_id(Id_aux(Id("ret"),model/prelude_mem.sail:31)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex1160#"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:31)),model/prelude_mem.sail:31)),E_aux(E_app(Id_aux(Id("__write_mem"),model/prelude_mem.sail:31),[(E_aux(E_id(Id_aux(Id("wk"),model/prelude_mem.sail:31)),Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)));(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("addr"),model/prelude_mem.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("width"),model/prelude_mem.sail:31)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("data"),model/prelude_mem.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/regfp.sail:137)),../sail/lib/regfp.sail:137))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_id(Id_aux(Id("ret"),model/prelude_mem.sail:32)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex1160#"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("__WriteRAM_Meta"),model/prelude_mem.sail:32),[(E_aux(E_id(Id_aux(Id("addr"),model/prelude_mem.sail:32)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("width"),model/prelude_mem.sail:32)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("meta"),model/prelude_mem.sail:32)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:9)),model/prelude_mem_metadata.sail:9)),E_aux(E_lit(L_aux(L_unit,model/prelude_mem.sail:32)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("ret"),model/prelude_mem.sail:33)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex1160#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/prelude_mem.sail:22),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude_mem.sail:22)),model/prelude_mem.sail:22),Effect_aux(Effect_set([(BE_aux(BE_wmv,model/prelude_mem.sail:22));(BE_aux(BE_wmvt,model/prelude_mem.sail:22))]),model/prelude_mem.sail:22)),model/prelude_mem.sail:22)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("write_ram_ea"),model/prelude_mem.sail:36),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/prelude_mem.sail:36),Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_lt(Nexp_aux(Nexp_constant(0),model/prelude_mem.sail:36),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36),Nexp_aux(Nexp_id(Id_aux(Id("max_mem_access"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36))]),model/prelude_mem.sail:36),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude_mem.sail:36),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36))]),model/prelude_mem.sail:36))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36),Effect_aux(Effect_set([(BE_aux(BE_eamem,model/prelude_mem.sail:36))]),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),model/prelude_mem.sail:36))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("write_ram_ea"),model/prelude_mem.sail:37),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("wk"),model/prelude_mem.sail:37)),Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)));(P_aux(P_id(Id_aux(Id("addr"),model/prelude_mem.sail:37)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("width"),model/prelude_mem.sail:37)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),Unknown))]),Unknown))]),model/prelude_mem.sail:37-38)),E_aux(E_app(Id_aux(Id("__write_mem_ea"),model/prelude_mem.sail:38),[(E_aux(E_id(Id_aux(Id("wk"),model/prelude_mem.sail:38)),Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)));(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("addr"),model/prelude_mem.sail:38)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("width"),model/prelude_mem.sail:38)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),../sail/lib/regfp.sail:133)),../sail/lib/regfp.sail:133))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("write_kind"),model/prelude_mem.sail:36)),model/prelude_mem.sail:36));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_orde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"read_ram",coq: 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A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_types.sail:10)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/arith.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/arith.sail:18)),../sail/lib/arith.sail:18))]),../sail/lib/arith.sail:18)))]),Typ_aux(Typ_app(Id_aux(Id("atom"),model/prelude.sail:95),[(A_aux(A_nexp(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_constant(63),../sail/lib/arith.sail:18)),model/prelude.sail:95)),model/prelude.sail:95))]),model/prelude.sail:95)))]),Typ_aux(Typ_app(Id_aux(Id("atom"),../sail/lib/arith.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_exp(Nexp_aux(Nexp_constant(63),../sail/lib/arith.sail:18)),model/prelude.sail:95)),../sail/lib/arith.sail:18)),../sail/lib/arith.sail:18))]),../sail/lib/arith.sail:18))),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("regidx_to_regno"),model/riscv_types.sail:25),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:25)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:25),Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:25),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25),Nexp_aux(Nexp_constant(32),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:23))]),model/riscv_types.sail:23)),model/riscv_types.sail:25),Effect_aux(Effect_set([]),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("regidx_to_regno"),model/riscv_types.sail:26),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("b"),model/riscv_types.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:25)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_let(LB_aux(LB_val(P_aux(P_var(P_aux(P_id(Id_aux(Id("r"),model/riscv_types.sail:26)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_r"),Unknown)),Unknown)),Unknown))]),Unknown)),TP_aux(TP_var(Kid_aux(Var("'r"),model/riscv_types.sail:26)),model/riscv_types.sail:26)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_r"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("unsigned"),model/riscv_types.sail:26),[(E_aux(E_id(Id_aux(Id("b"),model/riscv_types.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:25)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("range"),../sail/lib/vector_dec.sail:240),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240));(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:25)),../sail/lib/vector_dec.sail:240),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))]),../sail/lib/vector_dec.sail:240))),None),E_aux(E_id(Id_aux(Id("r"),model/riscv_types.sail:26)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_r"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:25),Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:25),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25),Nexp_aux(Nexp_constant(32),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:23))]),model/riscv_types.sail:23)),model/riscv_types.sail:25))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:25)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:25),Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:25),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25),Nexp_aux(Nexp_constant(32),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:25),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:25)),model/riscv_types.sail:25)),model/riscv_types.sail:23))]),model/riscv_types.sail:23)),model/riscv_types.sail:25),Effect_aux(Effect_set([]),model/riscv_types.sail:25)),model/riscv_types.sail:25)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("creg2reg_idx"),model/riscv_types.sail:29),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:29)),model/riscv_types.sail:29)),model/riscv_types.sail:29))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("creg2reg_idx"),model/riscv_types.sail:30),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("creg"),model/riscv_types.sail:30)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_lit(L_aux(L_bin("01"),model/riscv_types.sail:30)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("creg"),model/riscv_types.sail:30)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set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known))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RV64"),model/riscv_types.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RV128"),model/riscv_types.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_Architecture"),model/riscv_types.sail:46),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_Architecture"),model/riscv_types.sail:46),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RV32"),model/riscv_types.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RV64"),model/riscv_types.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RV128"),model/riscv_types.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Architecture"),model/riscv_types.sail:46),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("Architecture"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Architecture"),model/riscv_types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_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Privilege"),model/riscv_types.sail:66),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Privilege"),model/riscv_types.sail:66),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("User"),model/riscv_types.sail:66)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)));(E_aux(E_id(Id_aux(Id("Supervisor"),model/riscv_types.sail:66)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_types.sail:66)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Privilege"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("privLevel_to_bits"),model/riscv_types.sail:68),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:68)),model/riscv_types.sail:68)),model/riscv_types.sail:68))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("privLevel_to_bits"),model/riscv_types.sail:69),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("p"),model/riscv_types.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68)),E_aux(E_case(E_aux(E_id(Id_aux(Id("p"),model/riscv_types.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_types.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68)),E_aux(E_lit(L_aux(L_bin("00"),model/riscv_types.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_types.sail:72)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68)),E_aux(E_lit(L_aux(L_bin("01"),model/riscv_types.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_types.sail:73)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68)),E_aux(E_lit(L_aux(L_bin("11"),model/riscv_types.sail:73)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:68)),model/riscv_types.sail:68))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:68)),model/riscv_types.sail:68)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("privLevel_of_bits"),model/riscv_types.sail:76),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:76)),model/riscv_types.sail:76),Effect_aux(Effect_set([]),model/riscv_types.sail:76)),model/riscv_types.sail:76)),model/riscv_types.sail:76))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("privLevel_of_bits"),model/riscv_types.sail:77),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("p"),model/riscv_types.sail:77)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("p"),model/riscv_types.sail:78)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00"),model/riscv_types.sail:79)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("User"),model/riscv_types.sail:79)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01"),model/riscv_types.sail:80)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Supervisor"),model/riscv_types.sail:80)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11"),model/riscv_types.sail:81)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Machine"),model/riscv_types.sail:81)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:76)),model/riscv_types.sail:76))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:76)),model/riscv_types.sail:76),Effect_aux(Effect_set([]),model/riscv_types.sail:76)),model/riscv_types.sail:76)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("privLevel_to_str"),model/riscv_types.sail:84),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:84)),model/riscv_types.sail:84))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:84)),model/riscv_types.sail:84),Effect_aux(Effect_set([]),model/riscv_types.sail:84)),model/riscv_types.sail:84)),model/riscv_types.sail:84))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("privLevel_to_str"),model/riscv_types.sail:85),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("p"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,[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("I_M_Timer"),model/riscv_types.sail:119)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(6),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("I_U_External"),model/riscv_types.sail:120)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(7),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("I_S_External"),model/riscv_types.sail:121)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("I_M_External"),model/riscv_types.sail:122)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_InterruptType"),model/riscv_types.sail:113),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_InterruptType"),model/riscv_types.sail:113),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_Software"),model/riscv_types.sail:114)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_Software"),model/riscv_types.sail:115)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_Software"),model/riscv_types.sail:116)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_Timer"),model/riscv_types.sail:117)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_Timer"),model/riscv_types.sail:118)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_Timer"),model/riscv_types.sail:119)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(5),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_External"),model/riscv_types.sail:120)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(6),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_External"),model/riscv_types.sail:121)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(7),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_External"),model/riscv_types.sail:122)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)),E_aux(E_lit(L_aux(L_num(8),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_InterruptType"),model/riscv_types.sail:113),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("InterruptType"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_InterruptType"),model/riscv_types.sail:113),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("I_U_Software"),model/riscv_types.sail:114)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_S_Software"),model/riscv_types.sail:115)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_M_Software"),model/riscv_types.sail:116)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_U_Timer"),model/riscv_types.sail:117)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_S_Timer"),model/riscv_types.sail:118)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_M_Timer"),model/riscv_types.sail:119)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_U_External"),model/riscv_types.sail:120)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_S_External"),model/riscv_types.sail:121)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)));(E_aux(E_id(Id_aux(Id("I_M_External"),model/riscv_types.sail:122)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("InterruptType"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("interruptType_to_bits"),model/riscv_types.sail:125),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:125)),model/riscv_types.sail:125)),model/riscv_types.sail:125))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("interruptType_to_bits"),model/riscv_types.sail:126),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("i"),model/riscv_types.sail:126)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_case(E_aux(E_id(Id_aux(Id("i"),model/riscv_types.sail:127)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_Software"),model/riscv_types.sail:128)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("00"),model/riscv_types.sail:128)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_Software"),model/riscv_types.sail:129)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("01"),model/riscv_types.sail:129)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_Software"),model/riscv_types.sail:130)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("03"),model/riscv_types.sail:130)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_Timer"),model/riscv_types.sail:131)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("04"),model/riscv_types.sail:131)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_Timer"),model/riscv_types.sail:132)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("05"),model/riscv_types.sail:132)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_Timer"),model/riscv_types.sail:133)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("07"),model/riscv_types.sail:133)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_U_External"),model/riscv_types.sail:134)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("08"),model/riscv_types.sail:134)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_S_External"),model/riscv_types.sail:135)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("09"),model/riscv_types.sail:135)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("I_M_External"),model/riscv_types.sail:136)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125)),E_aux(E_lit(L_aux(L_hex("0b"),model/riscv_types.sail:136)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:125)),model/riscv_types.sail:125))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:125)),model/riscv_types.sail:125)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_ExceptionType"),model/riscv_types.sail:141),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),model/riscv_types.sail:141),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_ExceptionType"),model/riscv_types.sail:141),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_exc_type"),model/riscv_types.sail:160)),model/riscv_types.sail:160),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("E_Fetch_Addr_Align"),model/riscv_types.sail:142),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Fetch_Access_Fault"),model/riscv_types.sail:143),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Illegal_Instr"),model/riscv_types.sail:144),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Breakpoint"),model/riscv_types.sail:145),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Load_Addr_Align"),model/riscv_types.sail:146),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Load_Access_Fault"),model/riscv_types.sail:147),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_SAMO_Addr_Align"),model/riscv_types.sail:148),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_SAMO_Access_Fault"),model/riscv_types.sail:149),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_U_EnvCall"),model/riscv_types.sail:150),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_S_EnvCall"),model/riscv_types.sail:151),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Reserved_10"),model/riscv_types.sail:152),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_M_EnvCall"),model/riscv_types.sail:153),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Fetch_Page_Fault"),model/riscv_types.sail:154),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Load_Page_Fault"),model/riscv_types.sail:155),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Reserved_14"),model/riscv_types.sail:156),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_SAMO_Page_Fault"),model/riscv_types.sail:157),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:142)),model/riscv_types.sail:142)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)));(E_aux(E_app(Id_aux(Id("E_Extension"),model/riscv_types.sail:160),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),:1))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("exceptionType_to_bits"),model/riscv_types.sail:163),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:163)),model/riscv_types.sail:163)),model/riscv_types.sail:163))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("exceptionType_to_bits"),model/riscv_types.sail:164),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:164)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_case(E_aux(E_id(Id_aux(Id("e"),model/riscv_types.sail:165)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Addr_Align"),model/riscv_types.sail:166),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:166)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("00"),model/riscv_types.sail:166)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Access_Fault"),model/riscv_types.sail:167),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:167)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("01"),model/riscv_types.sail:167)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Illegal_Instr"),model/riscv_types.sail:168),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:168)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("02"),model/riscv_types.sail:168)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Breakpoint"),model/riscv_types.sail:169),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:169)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("03"),model/riscv_types.sail:169)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Addr_Align"),model/riscv_types.sail:170),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:170)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("04"),model/riscv_types.sail:170)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Access_Fault"),model/riscv_types.sail:171),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:171)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("05"),model/riscv_types.sail:171)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Addr_Align"),model/riscv_types.sail:172),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:172)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("06"),model/riscv_types.sail:172)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Access_Fault"),model/riscv_types.sail:173),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:173)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("07"),model/riscv_types.sail:173)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_U_EnvCall"),model/riscv_types.sail:174),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:174)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("08"),model/riscv_types.sail:174)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_S_EnvCall"),model/riscv_types.sail:175),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:175)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("09"),model/riscv_types.sail:175)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_10"),model/riscv_types.sail:176),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:176)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0a"),model/riscv_types.sail:176)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_M_EnvCall"),model/riscv_types.sail:177),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:177)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0b"),model/riscv_types.sail:177)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Page_Fault"),model/riscv_types.sail:178),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:178)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0c"),model/riscv_types.sail:178)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Page_Fault"),model/riscv_types.sail:179),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:179)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0d"),model/riscv_types.sail:179)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_14"),model/riscv_types.sail:180),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:180)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0e"),model/riscv_types.sail:180)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Page_Fault"),model/riscv_types.sail:181),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:181)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("0f"),model/riscv_types.sail:181)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Extension"),model/riscv_types.sail:184),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:184)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163)),E_aux(E_lit(L_aux(L_hex("18"),model/riscv_types.sail:184)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:163)),model/riscv_types.sail:163))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:163)),model/riscv_types.sail:163)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_ExceptionType"),model/riscv_types.sail:187),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:187),Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:187),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187),Nexp_aux(Nexp_id(Id_aux(Id("xlen"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:187),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/ris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ux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_S_EnvCall"),model/riscv_types.sail:199),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:199)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(9),model/riscv_types.sail:199)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_10"),model/riscv_types.sail:200),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:200)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(10),model/riscv_types.sail:200)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_M_EnvCall"),model/riscv_types.sail:201),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:201)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(11),model/riscv_types.sail:201)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Page_Fault"),model/riscv_types.sail:202),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:202)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(12),model/riscv_types.sail:202)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Page_Fault"),model/riscv_types.sail:203),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:203)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(13),model/riscv_types.sail:203)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_14"),model/riscv_types.sail:204),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:204)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(14),model/riscv_types.sail:204)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Page_Fault"),model/riscv_types.sail:205),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:205)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(15),model/riscv_types.sail:205)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Extension"),model/riscv_types.sail:208),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:208)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),E_aux(E_lit(L_aux(L_num(24),model/riscv_types.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:187),Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:187),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187),Nexp_aux(Nexp_id(Id_aux(Id("xlen"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:187),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187))]),model/riscv_types.sail:187)),model/riscv_types.sail:187))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:187),Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:187),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187),Nexp_aux(Nexp_id(Id_aux(Id("xlen"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:187),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187))]),model/riscv_types.sail:187)),model/riscv_types.sail:187),Effect_aux(Effect_set([]),model/riscv_types.sail:187)),model/riscv_types.sail:187)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("exceptionType_to_str"),model/riscv_types.sail:212),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:212)),model/riscv_types.sail:212),Effect_aux(Effect_set([]),model/riscv_types.sail:212)),model/riscv_types.sail:212)),model/riscv_types.sail:212))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("exceptionType_to_str"),model/riscv_types.sail:213),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:213)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_case(E_aux(E_id(Id_aux(Id("e"),model/riscv_types.sail:214)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Addr_Align"),model/riscv_types.sail:215),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:215)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("misaligned-fetch"),model/riscv_types.sail:215)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Access_Fault"),model/riscv_types.sail:216),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:216)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("fetch-access-fault"),model/riscv_types.sail:216)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Illegal_Instr"),model/riscv_types.sail:217),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:217)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("illegal-instruction"),model/riscv_types.sail:217)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Breakpoint"),model/riscv_types.sail:218),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:218)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("breakpoint"),model/riscv_types.sail:218)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Addr_Align"),model/riscv_types.sail:219),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:219)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("misaligned-load"),model/riscv_types.sail:219)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Access_Fault"),model/riscv_types.sail:220),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:220)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("load-access-fault"),model/riscv_types.sail:220)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Addr_Align"),model/riscv_types.sail:221),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:221)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("misaliged-store/amo"),model/riscv_types.sail:221)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Access_Fault"),model/riscv_types.sail:222),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:222)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("store/amo-access-fault"),model/riscv_types.sail:222)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_U_EnvCall"),model/riscv_types.sail:223),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:223)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("u-call"),model/riscv_types.sail:223)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_S_EnvCall"),model/riscv_types.sail:224),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:224)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("s-call"),model/riscv_types.sail:224)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_10"),model/riscv_types.sail:225),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:225)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("reserved-0"),model/riscv_types.sail:225)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_M_EnvCall"),model/riscv_types.sail:226),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:226)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("m-call"),model/riscv_types.sail:226)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Fetch_Page_Fault"),model/riscv_types.sail:227),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:227)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("fetch-page-fault"),model/riscv_types.sail:227)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Load_Page_Fault"),model/riscv_types.sail:228),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:228)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("load-page-fault"),model/riscv_types.sail:228)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Reserved_14"),model/riscv_types.sail:229),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:229)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("reserved-1"),model/riscv_types.sail:229)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_SAMO_Page_Fault"),model/riscv_types.sail:230),[(P_aux(P_lit(L_aux(L_unit,model/riscv_types.sail:230)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("store/amo-page-fault"),model/riscv_types.sail:230)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("E_Extension"),model/riscv_types.sail:233),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:233)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:18)),model/riscv_types_ext.sail:18)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212)),E_aux(E_lit(L_aux(L_string("extension-exception"),model/riscv_types.sail:233)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:212)),model/riscv_types.sail:212))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_types.sail:212)),model/riscv_types.sail:212))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:212)),model/riscv_types.sail:212),Effect_aux(Effect_set([]),model/riscv_types.sail:212)),model/riscv_types.sail:212)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_types.sail:236),[(Id_aux(Id("exceptionType_to_str"),model/riscv_types.sail:236))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_exception"),model/riscv_types.sail:240),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),model/riscv_types.sail:240),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_exception"),model/riscv_types.sail:240),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:241)),model/riscv_types.sail:241),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:241)),model/riscv_types.sail:241))),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:241)),model/riscv_types.sail:241)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:241)),model/riscv_types.sail:241))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:242)),model/riscv_types.sail:242),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:242)),model/riscv_types.sail:242))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:242)),model/riscv_types.sail:242)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:242)),model/riscv_types.sail:242))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Error_not_implemented"),model/riscv_types.sail:241),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:241)),model/riscv_types.sail:241)))]),Typ_aux(Typ_app(Id_aux(Id("exception"),model/riscv_types.sail:240),[]),Unknown)));(E_aux(E_app(Id_aux(Id("Error_internal_error"),model/riscv_types.sail:242),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:242)),model/riscv_types.sail:242)))]),Typ_aux(Typ_app(Id_aux(Id("exception"),model/riscv_types.sail:240),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),:1))),Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("exception"),model/riscv_types.sail:240)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("not_implemented"),model/riscv_types.sail:245),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_types.sail:245),Kid_aux(Var("'a"),model/riscv_types.sail:245)),model/riscv_types.sail:245)),model/riscv_types.sail:245))]),model/riscv_types.sail:245),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:245)),model/riscv_types.sail:245))],Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_types.sail:245)),model/riscv_types.sail:245),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:245))]),model/riscv_types.sail:245)),model/riscv_types.sail:245)),model/riscv_types.sail:245))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("not_implemented"),model/riscv_types.sail:246),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("message"),model/riscv_types.sail:246)),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:245)),model/riscv_types.sail:245)),E_aux(E_throw(E_aux(E_app(Id_aux(Id("Error_not_implemented"),model/riscv_types.sail:246),[(E_aux(E_id(Id_aux(Id("message"),model/riscv_types.sail:246)),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:245)),model/riscv_types.sail:245)))]),Typ_aux(Typ_app(Id_aux(Id("exception"),model/riscv_types.sail:240),[]),Unknown))),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_types.sail:245)),model/riscv_types.sail:245))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:245)),model/riscv_types.sail:245))],Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_types.sail:245)),model/riscv_types.sail:245),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:245))]),model/riscv_types.sail:245)),model/riscv_types.sail:245)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("internal_error"),model/riscv_types.sail:248),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_typ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_spec(cast_false,Id_aux(Id("num_of_TrapVectorMode"),model/riscv_types.sail:257),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_TrapVectorMode"),model/riscv_types.sail:257),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Direct"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Vector"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Reserved"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_TrapVectorMode"),model/riscv_types.sail:257),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_TrapVectorMode"),model/riscv_types.sail:257),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("TV_Direct"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)));(E_aux(E_id(Id_aux(Id("TV_Vector"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)));(E_aux(E_id(Id_aux(Id("TV_Reserved"),model/riscv_types.sail:257)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("trapVectorMode_of_bits"),model/riscv_types.sail:259),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259),Effect_aux(Effect_set([]),model/riscv_types.sail:259)),model/riscv_types.sail:259)),model/riscv_types.sail:259))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("trapVectorMode_of_bits"),model/riscv_types.sail:260),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("m"),model/riscv_types.sail:260)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("m"),model/riscv_types.sail:261)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00"),model/riscv_types.sail:262)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("TV_Direct"),model/riscv_types.sail:262)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01"),model/riscv_types.sail:263)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("TV_Vector"),model/riscv_types.sail:263)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("TV_Reserved"),model/riscv_types.sail:264)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:257)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259),Effect_aux(Effect_set([]),model/riscv_types.sail:259)),model/riscv_types.sail:259)))]),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ExtStatus_of_num"),model/riscv_types.sail:270),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ExtStatus_of_num"),model/riscv_types.sail:270),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Off"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Initial"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Clean"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Dirty"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_ExtStatus"),model/riscv_types.sail:270),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_ExtStatus"),model/riscv_types.sail:270),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Off"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Initial"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Clean"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Dirty"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_ExtStatus"),model/riscv_types.sail:270),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_ExtStatus"),model/riscv_types.sail:270),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("Off"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)));(E_aux(E_id(Id_aux(Id("Initial"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)));(E_aux(E_id(Id_aux(Id("Clean"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)));(E_aux(E_id(Id_aux(Id("Dirty"),model/riscv_types.sail:270)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("extStatus_to_bits"),model/riscv_types.sail:272),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:272)),model/riscv_types.sail:272)),model/riscv_types.sail:272))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("extStatus_to_bits"),model/riscv_types.sail:273),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:273)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),E_aux(E_case(E_aux(E_id(Id_aux(Id("e"),model/riscv_types.sail:274)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Off"),model/riscv_types.sail:275)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),E_aux(E_lit(L_aux(L_bin("00"),model/riscv_types.sail:275)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Initial"),model/riscv_types.sail:276)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),E_aux(E_lit(L_aux(L_bin("01"),model/riscv_types.sail:276)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Clean"),model/riscv_types.sail:277)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),E_aux(E_lit(L_aux(L_bin("10"),model/riscv_types.sail:277)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Dirty"),model/riscv_types.sail:278)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272)),E_aux(E_lit(L_aux(L_bin("11"),model/riscv_types.sail:278)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:272)),model/riscv_types.sail:272))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_types.sail:272)),model/riscv_types.sail:272)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("extStatus_of_bits"),model/riscv_types.sail:281),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:281)),model/riscv_types.sail:281),Effect_aux(Effect_set([]),model/riscv_types.sail:281)),model/riscv_types.sail:281)),model/riscv_types.sail:281))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("extStatus_of_bits"),model/riscv_types.sail:282),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("e"),model/riscv_types.sail:282)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("e"),model/riscv_types.sail:283)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00"),model/riscv_types.sail:284)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Off"),model/riscv_types.sail:284)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01"),model/riscv_types.sail:285)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Initial"),model/riscv_types.sail:285)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10"),model/riscv_types.sail:286)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Clean"),model/riscv_types.sail:286)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11"),model/riscv_types.sail:287)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("Dirty"),model/riscv_types.sail:287)),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:270)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:281)),model/riscv_types.sail:281))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ExtStatus"),model/riscv_types.sail:281)),model/riscv_types.sail:281),Effect_aux(Effect_set([]),model/riscv_types.sail:281)),model/riscv_types.sail:281)))]),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("SATPMode_of_num"),model/riscv_types.sail:293),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown))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xp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_bop"),model/riscv_types.sail:310),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BEQ"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BNE"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BLT"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BGE"),model/riscv_types.sail:311)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BLTU"),model/riscv_types.sail:311)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_BGEU"),model/riscv_types.sail:311)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)),E_aux(E_lit(L_aux(L_num(5),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_bop"),model/riscv_types.sail:310),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("bop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_bop"),model/riscv_types.sail:310),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("RISCV_BEQ"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_BNE"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_BLT"),model/riscv_types.sail:310)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_BGE"),model/riscv_types.sail:311)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_types.sail:310)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_BLTU"),model/riscv_types.sail:311)),Typ_aux(Typ_id(Id_aux(Id("bop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FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_iop"),model/riscv_types.sail:312),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_ADDI"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SLTI"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SLTIU"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_XORI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_ORI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_ANDI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)),E_aux(E_lit(L_aux(L_num(5),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_iop"),model/riscv_types.sail:312),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("iop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_iop"),model/riscv_types.sail:312),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("RISCV_ADDI"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SLTI"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SLTIU"),model/riscv_types.sail:312)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_XORI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_ORI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_types.sail:312)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_ANDI"),model/riscv_types.sail:313)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/r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aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SRAI"),model/riscv_types.sail:314)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_types.sail:314)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_types.sail:314)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_sop"),model/riscv_types.sail:314),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("sop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_sop"),model/riscv_types.sail:314),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("RISCV_SLLI"),model/riscv_types.sail:314)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_types.sail:314)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SRLI"),model/riscv_types.sail:314)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_types.sail:314)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SRAI"),model/riscv_types.sail:314)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_types.sail:314)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("sop"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("sop"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("sop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rop_of_num"),model/riscv_types.sail:315),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("rop_of_num"),model/riscv_types.sail:315),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_ADD"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SUB"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SLL"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SLT"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SLTU"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(5),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_XOR"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(6),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SRL"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(7),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SRA"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(8),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_OR"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_AND"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_rop"),model/riscv_types.sail:315),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_rop"),model/riscv_types.sail:315),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_ADD"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SUB"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SLL"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SLT"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SLTU"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(4),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_XOR"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(5),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SRL"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(6),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_SRA"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(7),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_OR"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(8),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_AND"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)),E_aux(E_lit(L_aux(L_num(9),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_rop"),model/riscv_types.sail:315),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("rop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_rop"),model/riscv_types.sail:315),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("RISCV_ADD"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SUB"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SLL"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SLT"),model/riscv_types.sail:315)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SLTU"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_XOR"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SRL"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_SRA"),model/riscv_types.sail:316)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_OR"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)));(E_aux(E_id(Id_aux(Id("RISCV_AND"),model/riscv_types.sail:317)),Typ_aux(Typ_id(Id_aux(Id("rop"),model/riscv_types.sail:315)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("rop"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("rop"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("rop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ropw_of_num"),model/riscv_types.sail:319),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ropw_of_num"),model/riscv_types.sail:319),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_ADDW"),model/riscv_types.sail:319)),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SUBW"),model/riscv_types.sail:319)),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SLLW"),model/riscv_types.sail:319)),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SRLW"),model/riscv_types.sail:320)),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("RISCV_SRAW"),model/riscv_types.sail:320)),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_ropw"),model/riscv_types.sail:319),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ropw"),model/riscv_types.sail:319)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD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Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("csrop_of_num"),model/riscv_types.sail:325),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("CSRRW"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("CSRRS"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("CSRRC"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_csrop"),model/riscv_types.sail:325),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_csrop"),model/riscv_types.sail:325),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("CSRRW"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("CSRRS"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("CSRRC"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_csrop"),model/riscv_types.sail:325),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("csrop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_csrop"),model/riscv_types.sail:325),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("CSRRW"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)));(E_aux(E_id(Id_aux(Id("CSRRS"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)));(E_aux(E_id(Id_aux(Id("CSRRC"),model/riscv_types.sail:325)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_types.sail:325)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("csrop"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("csrop"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("csrop"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sep"),model/riscv_types.sail:327),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:327)),model/riscv_types.sail:327),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:327)),model/riscv_types.sail:327)),model/riscv_types.sail:327)),model/riscv_types.sail:327))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("sep"),model/riscv_types.sail:328),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:328)),model/riscv_types.sail:328),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:328)),model/riscv_types.sail:328)),model/riscv_types.sail:328)),model/riscv_types.sail:328),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_unit,model/riscv_types.sail:329)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_app(Id_aux(Id("opt_spc"),model/riscv_types.sail:329),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_types.sail:329)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:327)),model/riscv_types.sail:327)));(MP_aux(MP_lit(L_aux(L_string(","),model/riscv_types.sail:329)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("def_spc"),model/riscv_types.sail:329),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_types.sail:329)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:327)),model/riscv_types.sail:327)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:327)),model/riscv_types.sail:327))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types.sail:327)),model/riscv_types.sail:327),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:327)),model/riscv_types.sail:327)),model/riscv_types.sail:327)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bool_bits"),model/riscv_types.sail:332),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:332)),model/riscv_types.sail:332),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:332)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:332)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bool_bits"),model/riscv_types.sail:332),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:332)),model/riscv_types.sail:332),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_types.sail:332),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:332)),model/riscv_types.sail:332))]),model/riscv_types.sail:332)),model/riscv_types.sail:332)),model/riscv_types.sail:332),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_types.sail:333)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_types.sail:333)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:332)),model/riscv_types.sail:332),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:332)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:332)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_types.sail:334)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_types.sail:334)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:332)),model/riscv_types.sail:332),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:332)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:332)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bool_not_bits"),model/riscv_types.sail:337),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:337)),model/riscv_types.sail:337),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:337)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:337)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bool_not_bits"),model/riscv_types.sail:337),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:337)),model/riscv_types.sail:337),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_types.sail:337),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:337)),model/riscv_types.sail:337))]),model/riscv_types.sail:337)),model/riscv_types.sail:337)),model/riscv_types.sail:337),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_types.sail:338)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_types.sail:338)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:337)),model/riscv_types.sail:337),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:337)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:337)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_types.sail:339)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_types.sail:339)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_types.sail:337)),model/riscv_types.sail:337),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:337)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:337)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("size_bits"),model/riscv_types.sail:342),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:342)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("size_bits"),model/riscv_types.sail:342),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_types.sail:342),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),model/riscv_types.sail:342))]),model/riscv_types.sail:342)),model/riscv_types.sail:342)),model/riscv_types.sail:342),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("BYTE"),model/riscv_types.sail:343)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("00"),model/riscv_types.sail:343)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:342)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("HALF"),model/riscv_types.sail:344)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("01"),model/riscv_types.sail:344)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:342)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("WORD"),model/riscv_types.sail:345)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("10"),model/riscv_types.sail:345)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:342)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("DOUBLE"),model/riscv_types.sail:346)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("11"),model/riscv_types.sail:346)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:342)),model/riscv_types.sail:342),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:342)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_types.sail:342)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("size_mnemonic"),model/riscv_types.sail:349),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("size_mnemonic"),model/riscv_types.sail:349),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("BYTE"),model/riscv_types.sail:350)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("b"),model/riscv_types.sail:350)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("HALF"),model/riscv_types.sail:351)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("h"),model/riscv_types.sail:351)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("WORD"),model/riscv_types.sail:352)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("w"),model/riscv_types.sail:352)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("DOUBLE"),model/riscv_types.sail:353)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("d"),model/riscv_types.sail:353)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_types.sail:349)),model/riscv_types.sail:349)),model/riscv_types.sail:349)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("word_width_bytes"),model/riscv_types.sail:356),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:356),Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356))],NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(1),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(2),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(4),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(8),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:356),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356))]),model/riscv_types.sail:356)),model/riscv_types.sail:356),Effect_aux(Effect_set([]),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("word_width_bytes"),model/riscv_types.sail:357),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("width"),model/riscv_types.sail:357)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),E_aux(E_case(E_aux(E_id(Id_aux(Id("width"),model/riscv_types.sail:357)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("BYTE"),model/riscv_types.sail:358)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),E_aux(E_lit(L_aux(L_num(1),model/riscv_types.sail:358)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("HALF"),model/riscv_types.sail:359)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),E_aux(E_lit(L_aux(L_num(2),model/riscv_types.sail:359)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("WORD"),model/riscv_types.sail:360)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),E_aux(E_lit(L_aux(L_num(4),model/riscv_types.sail:360)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("DOUBLE"),model/riscv_types.sail:361)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),E_aux(E_lit(L_aux(L_num(8),model/riscv_types.sail:361)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:356),Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356))],NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(1),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(2),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(4),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(8),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:356),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356))]),model/riscv_types.sail:356)),model/riscv_types.sail:356))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:356)),model/riscv_types.sail:356))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:356),Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356))],NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(1),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(2),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_or(NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(4),model/riscv_types.sail:356)),model/riscv_types.sail:356),NC_aux(NC_equal(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356),Nexp_aux(Nexp_constant(8),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:356),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'s"),model/riscv_types.sail:356)),model/riscv_types.sail:356)),model/riscv_types.sail:356))]),model/riscv_types.sail:356)),model/riscv_types.sail:356),Effect_aux(Effect_set([]),model/riscv_types.sail:356)),model/riscv_types.sail:356)))]),None)));(DEF_type(..type_def));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_vmem_types.sail:5)),model/riscv_vmem_types.sail:5),P_aux(P_id(Id_aux(Id("Data"),model/riscv_vmem_types.sail:5)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),E_aux(E_lit(L_aux(L_unit,model/riscv_vmem_types.sail:5)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_vmem_types.sail:7)),model/riscv_vmem_types.sail:7),P_aux(P_id(Id_aux(Id("default_write_acc"),model/riscv_vmem_types.sail:7)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),E_aux(E_id(Id_aux(Id("Data"),model/riscv_vmem_types.sail:7)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("accessType_to_str"),model/riscv_vmem_types.sail:9),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9),Effect_aux(Effect_set([]),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("accessType_to_str"),model/riscv_vmem_types.sail:10),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("a"),model/riscv_vmem_types.sail:10)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),E_aux(E_case(E_aux(E_id(Id_aux(Id("a"),model/riscv_vmem_types.sail:11)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Read"),model/riscv_vmem_types.sail:12),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_vmem_types.sail:12)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:101)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),E_aux(E_lit(L_aux(L_string("R"),model/riscv_vmem_types.sail:12)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Write"),model/riscv_vmem_types.sail:13),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_vmem_types.sail:13)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:102)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),E_aux(E_lit(L_aux(L_string("W"),model/riscv_vmem_types.sail:13)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("ReadWrite"),model/riscv_vmem_types.sail:14),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_vmem_types.sail:14)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:103)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),E_aux(E_lit(L_aux(L_string("RW"),model/riscv_vmem_types.sail:14)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Execute"),model/riscv_vmem_types.sail:15),[(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_types.sail:15)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9)),E_aux(E_lit(L_aux(L_string("X"),model/riscv_vmem_types.sail:15)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_types.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:9))]),model/riscv_vmem_types.sail:9))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9),Effect_aux(Effect_set([]),model/riscv_vmem_types.sail:9)),model/riscv_vmem_types.sail:9)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_vmem_types.sail:18),[(Id_aux(Id("accessType_to_str"),model/riscv_vmem_types.sail:18))]));(DEF_type(..type_def));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_reg_type.sail:5)),model/riscv_reg_type.sail:5),P_aux(P_id(Id_aux(Id("zero_reg"),model/riscv_reg_type.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_reg_type.sail:5),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_hex("0"),model/riscv_reg_type.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("RegStr"),model/riscv_reg_type.sail:8),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("RegStr"),model/riscv_reg_type.sail:9),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("r"),model/riscv_reg_type.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("string_of_bits"),model/prelude.sail:63),[(E_aux(E_id(Id_aux(Id("r"),model/riscv_reg_type.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:55)),model/prelude.sail:55))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("regval_from_reg"),model/riscv_reg_type.sail:13),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:13)),model/riscv_reg_type.sail:13)),model/riscv_reg_type.sail:13))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("regval_from_reg"),model/riscv_reg_type.sail:14),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("r"),model/riscv_reg_type.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("r"),model/riscv_reg_type.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:13)),model/riscv_reg_type.sail:13)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("regval_into_reg"),model/riscv_reg_type.sail:16),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:16)),model/riscv_reg_type.sail:16)),model/riscv_reg_type.sail:16))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("regval_into_reg"),model/riscv_reg_type.sail:17),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),model/riscv_reg_type.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("v"),model/riscv_reg_type.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_reg_type.sail:16)),model/riscv_reg_type.sail:16)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:3))]),model/riscv_regs.sail:3),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:3))]),model/riscv_regs.sail:3),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:3)),model/riscv_regs.sail:3),Id_aux(Id("PC"),model/riscv_regs.sail:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:4))]),model/riscv_regs.sail:4),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:4))]),model/riscv_regs.sail:4),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:4)),model/riscv_regs.sail:4),Id_aux(Id("nextPC"),model/riscv_regs.sail:4)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:7))]),model/riscv_regs.sail:7),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:7))]),model/riscv_regs.sail:7),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:7)),model/riscv_regs.sail:7),Id_aux(Id("instbits"),model/riscv_regs.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:11))]),model/riscv_regs.sail:11),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:11))]),model/riscv_regs.sail:11),Typ_aux(Typ_app(Id_aux(Id("vector"),model/riscv_regs.sail:11),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_regs.sail:11)),model/riscv_regs.sail:11));(A_aux(A_order(Ord_aux(Ord_dec,model/riscv_regs.sail:11)),model/riscv_regs.sail:11));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:11)),model/riscv_regs.sail:11)),model/riscv_regs.sail:11))]),model/riscv_regs.sail:11),Id_aux(Id("Xs"),model/riscv_regs.sail:11)),Typ_aux(Typ_app(Id_aux(Id("vector"),model/riscv_regs.sail:11),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_regs.sail:11)),model/riscv_regs.sail:11));(A_aux(A_order(Ord_aux(Ord_dec,model/riscv_regs.sail:11)),model/riscv_regs.sail:11));(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_regs.sail:11))]),model/riscv_regs.sail:11))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:13))]),model/riscv_regs.sail:13),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:13))]),model/riscv_regs.sail:13),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:13)),model/riscv_regs.sail:13),Id_aux(Id("x1"),model/riscv_regs.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:14))]),model/riscv_regs.sail:14),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:14))]),model/riscv_regs.sail:14),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:14)),model/riscv_regs.sail:14),Id_aux(Id("x2"),model/riscv_regs.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:15))]),model/riscv_regs.sail:15),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:15))]),model/riscv_regs.sail:15),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:15)),model/riscv_regs.sail:15),Id_aux(Id("x3"),model/riscv_regs.sail:15)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:16))]),model/riscv_regs.sail:16),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:16))]),model/riscv_regs.sail:16),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:16)),model/riscv_regs.sail:16),Id_aux(Id("x4"),model/riscv_regs.sail:16)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:17))]),model/riscv_regs.sail:17),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:17))]),model/riscv_regs.sail:17),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:17)),model/riscv_regs.sail:17),Id_aux(Id("x5"),model/riscv_regs.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:18))]),model/riscv_regs.sail:18),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:18))]),model/riscv_regs.sail:18),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:18)),model/riscv_regs.sail:18),Id_aux(Id("x6"),model/riscv_regs.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:19))]),model/riscv_regs.sail:19),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:19))]),model/riscv_regs.sail:19),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:19)),model/riscv_regs.sail:19),Id_aux(Id("x7"),model/riscv_regs.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:20))]),model/riscv_regs.sail:20),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:20))]),model/riscv_regs.sail:20),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:20)),model/riscv_regs.sail:20),Id_aux(Id("x8"),model/riscv_regs.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:21))]),model/riscv_regs.sail:21),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:21))]),model/riscv_regs.sail:21),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:21)),model/riscv_regs.sail:21),Id_aux(Id("x9"),model/riscv_regs.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:22))]),model/riscv_regs.sail:22),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:22))]),model/riscv_regs.sail:22),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:22)),model/riscv_regs.sail:22),Id_aux(Id("x10"),model/riscv_regs.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:23))]),model/riscv_regs.sail:23),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:23))]),model/riscv_regs.sail:23),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:23)),model/riscv_regs.sail:23),Id_aux(Id("x11"),model/riscv_regs.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:24))]),model/riscv_regs.sail:24),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:24))]),model/riscv_regs.sail:24),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:24)),model/riscv_regs.sail:24),Id_aux(Id("x12"),model/riscv_regs.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:25))]),model/riscv_regs.sail:25),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:25))]),model/riscv_regs.sail:25),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:25)),model/riscv_regs.sail:25),Id_aux(Id("x13"),model/riscv_regs.sail:25)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:26))]),model/riscv_regs.sail:26),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:26))]),model/riscv_regs.sail:26),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:26)),model/riscv_regs.sail:26),Id_aux(Id("x14"),model/riscv_regs.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:27))]),model/riscv_regs.sail:27),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:27))]),model/riscv_regs.sail:27),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:27)),model/riscv_regs.sail:27),Id_aux(Id("x15"),model/riscv_regs.sail:27)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:28))]),model/riscv_regs.sail:28),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:28))]),model/riscv_regs.sail:28),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:28)),model/riscv_regs.sail:28),Id_aux(Id("x16"),model/riscv_regs.sail:28)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:29))]),model/riscv_regs.sail:29),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:29))]),model/riscv_regs.sail:29),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:29)),model/riscv_regs.sail:29),Id_aux(Id("x17"),model/riscv_regs.sail:29)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:30))]),model/riscv_regs.sail:30),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:30))]),model/riscv_regs.sail:30),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:30)),model/riscv_regs.sail:30),Id_aux(Id("x18"),model/riscv_regs.sail:30)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:31))]),model/riscv_regs.sail:31),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:31))]),model/riscv_regs.sail:31),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:31)),model/riscv_regs.sail:31),Id_aux(Id("x19"),model/riscv_regs.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:32))]),model/riscv_regs.sail:32),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:32))]),model/riscv_regs.sail:32),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:32)),model/riscv_regs.sail:32),Id_aux(Id("x20"),model/riscv_regs.sail:32)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:33))]),model/riscv_regs.sail:33),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:33))]),model/riscv_regs.sail:33),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:33)),model/riscv_regs.sail:33),Id_aux(Id("x21"),model/riscv_regs.sail:33)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:34))]),model/riscv_regs.sail:34),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:34))]),model/riscv_regs.sail:34),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:34)),model/riscv_regs.sail:34),Id_aux(Id("x22"),model/riscv_regs.sail:34)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:35))]),model/riscv_regs.sail:35),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:35))]),model/riscv_regs.sail:35),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:35)),model/riscv_regs.sail:35),Id_aux(Id("x23"),model/riscv_regs.sail:35)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:36))]),model/riscv_regs.sail:36),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:36))]),model/riscv_regs.sail:36),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:36)),model/riscv_regs.sail:36),Id_aux(Id("x24"),model/riscv_regs.sail:36)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:37))]),model/riscv_regs.sail:37),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:37))]),model/riscv_regs.sail:37),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:37)),model/riscv_regs.sail:37),Id_aux(Id("x25"),model/riscv_regs.sail:37)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:38))]),model/riscv_regs.sail:38),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:38))]),model/riscv_regs.sail:38),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:38)),model/riscv_regs.sail:38),Id_aux(Id("x26"),model/riscv_regs.sail:38)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:39))]),model/riscv_regs.sail:39),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:39))]),model/riscv_regs.sail:39),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:39)),model/riscv_regs.sail:39),Id_aux(Id("x27"),model/riscv_regs.sail:39)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:40))]),model/riscv_regs.sail:40),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:40))]),model/riscv_regs.sail:40),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:40)),model/riscv_regs.sail:40),Id_aux(Id("x28"),model/riscv_regs.sail:40)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:41))]),model/riscv_regs.sail:41),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:41))]),model/riscv_regs.sail:41),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:41)),model/riscv_regs.sail:41),Id_aux(Id("x29"),model/riscv_regs.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:42))]),model/riscv_regs.sail:42),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:42))]),model/riscv_regs.sail:42),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:42)),model/riscv_regs.sail:42),Id_aux(Id("x30"),model/riscv_regs.sail:42)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:43))]),model/riscv_regs.sail:43),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:43))]),model/riscv_regs.sail:43),Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:43)),model/riscv_regs.sail:43),Id_aux(Id("x31"),model/riscv_regs.sail:43)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rX"),model/riscv_regs.sail:45),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_regs.sail:45),Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_regs.sail:45));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_regs.sail:45),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_regs.sail:45),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45),Nexp_aux(Nexp_constant(32),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_regs.sail:45))]),model/riscv_regs.sail:45),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_types.sail:23))]),model/riscv_types.sail:23))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:45));(BE_aux(BE_escape,model/riscv_regs.sail:45))]),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),model/riscv_regs.sail:45))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("rX"),model/riscv_regs.sail:46),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("r"),model/riscv_regs.sail:46)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("regtype"),model/riscv_regs.sail:47)),model/riscv_regs.sail:47),P_aux(P_id(Id_aux(Id("v"),model/riscv_regs.sail:47)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("r"),model/riscv_regs.sail:48)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),model/riscv_regs.sail:49)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("zero_reg"),model/riscv_regs.sail:49)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),model/riscv_regs.sail:50)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x1"),model/riscv_regs.sail:50)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),model/riscv_regs.sail:51)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x2"),model/riscv_regs.sail:51)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(3),model/riscv_regs.sail:52)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x3"),model/riscv_regs.sail:52)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(4),model/riscv_regs.sail:53)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x4"),model/riscv_regs.sail:53)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(5),model/riscv_regs.sail:54)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x5"),model/riscv_regs.sail:54)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(6),model/riscv_regs.sail:55)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x6"),model/riscv_regs.sail:55)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(7),model/riscv_regs.sail:56)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x7"),model/riscv_regs.sail:56)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(8),model/riscv_regs.sail:57)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x8"),model/riscv_regs.sail:57)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(9),model/riscv_regs.sail:58)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x9"),model/riscv_regs.sail:58)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(10),model/riscv_regs.sail:59)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x10"),model/riscv_regs.sail:59)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(11),model/riscv_regs.sail:60)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x11"),model/riscv_regs.sail:60)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(12),model/riscv_regs.sail:61)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x12"),model/riscv_regs.sail:61)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(13),model/riscv_regs.sail:62)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x13"),model/riscv_regs.sail:62)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(14),model/riscv_regs.sail:63)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x14"),model/riscv_regs.sail:63)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(15),model/riscv_regs.sail:64)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x15"),model/riscv_regs.sail:64)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(16),model/riscv_regs.sail:65)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x16"),model/riscv_regs.sail:65)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(17),model/riscv_regs.sail:66)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x17"),model/riscv_regs.sail:66)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(18),model/riscv_regs.sail:67)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x18"),model/riscv_regs.sail:67)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(19),model/riscv_regs.sail:68)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x19"),model/riscv_regs.sail:68)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(20),model/riscv_regs.sail:69)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x20"),model/riscv_regs.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(21),model/riscv_regs.sail:70)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x21"),model/riscv_regs.sail:70)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(22),model/riscv_regs.sail:71)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x22"),model/riscv_regs.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(23),model/riscv_regs.sail:72)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x23"),model/riscv_regs.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(24),model/riscv_regs.sail:73)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x24"),model/riscv_regs.sail:73)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(25),model/riscv_regs.sail:74)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x25"),model/riscv_regs.sail:74)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(26),model/riscv_regs.sail:75)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x26"),model/riscv_regs.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(27),model/riscv_regs.sail:76)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x27"),model/riscv_regs.sail:76)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(28),model/riscv_regs.sail:77)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x28"),model/riscv_regs.sail:77)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(29),model/riscv_regs.sail:78)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x29"),model/riscv_regs.sail:78)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(30),model/riscv_regs.sail:79)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x30"),model/riscv_regs.sail:79)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(31),model/riscv_regs.sail:80)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("x31"),model/riscv_regs.sail:80)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_assert(E_aux(E_lit(L_aux(L_false,model/riscv_regs.sail:81)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("invalid register number"),model/riscv_regs.sail:81)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("zero_reg"),model/riscv_regs.sail:81)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("regval_from_reg"),model/riscv_regs.sail:83),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_regs.sail:83)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:45));(BE_aux(BE_escape,model/riscv_regs.sail:45))]),model/riscv_regs.sail:45)),model/riscv_regs.sail:45)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rvfi_wX"),model/riscv_regs.sail:93),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_regs.sail:93),Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_regs.sail:93));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_regs.sail:93),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_regs.sail:93),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93),Nexp_aux(Nexp_constant(32),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_regs.sail:93))]),model/riscv_regs.sail:93),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_types.sail:23))]),model/riscv_types.sail:23));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93),Effect_aux(Effect_set([]),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),model/riscv_regs.sail:93))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("rvfi_wX"),model/riscv_regs.sail:94),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r"),model/riscv_regs.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("v"),model/riscv_regs.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_regs.sail:94)),E_aux(E_lit(L_aux(L_unit,model/riscv_regs.sail:94)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:93)),model/riscv_regs.sail:93),Effect_aux(Effect_set([]),model/riscv_regs.sail:93)),model/riscv_regs.sail:93)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("wX"),model/riscv_regs.sail:97),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_regs.sail:97),Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_regs.sail:97));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_regs.sail:97),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_regs.sail:97),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97),Nexp_aux(Nexp_constant(32),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_regs.sail:97))]),model/riscv_regs.sail:97),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:23),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_types.sail:23))]),model/riscv_types.sail:23));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:97));(BE_aux(BE_escape,model/riscv_regs.sail:97))]),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),model/riscv_regs.sail:97))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("wX"),model/riscv_regs.sail:98),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r"),model/riscv_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("in_v"),model/riscv_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_regs.sail:98-140)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),model/riscv_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("regval_into_reg"),model/riscv_regs.sail:99),[(E_aux(E_id(Id_aux(Id("in_v"),model/riscv_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("r"),model/riscv_regs.sail:100)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),model/riscv_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_unit,model/riscv_regs.sail:101)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),model/riscv_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x1"),model/riscv_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("v"),model/riscv_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),model/riscv_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x2"),model/riscv_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("v"),model/riscv_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(3),model/riscv_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x3"),model/riscv_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("v"),model/riscv_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(4),model/riscv_regs.sail:105)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x4"),model/riscv_regs.sail:105)),Typ_aux(Typ_app(Id_aux(Id("bitve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"),model/riscv_regs.sail:138)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("RegStr"),model/riscv_regs.sail:138),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_regs.sail:138)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_reg_type.sail:8)),model/riscv_reg_type.sail:8)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("string"),../sail/lib/string.sail:10)),../sail/lib/string.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:101)),model/prelude.sail:101)),E_aux(E_lit(L_aux(L_unit,model/riscv_regs.sail:138)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),E_aux(E_lit(L_aux(L_unit,model/riscv_regs.sail:139)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:97));(BE_aux(BE_escape,model/riscv_regs.sail:97))]),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rX_bits"),model/riscv_regs.sail:142),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_regs.sail:142),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),model/riscv_regs.sail:142))]),model/riscv_regs.sail:142))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:142)),model/riscv_regs.sail:142),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_regs.sail:45));(BE_aux(BE_rreg,model/riscv_regs.sail:45))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:142)),model/riscv_regs.sail:142)),model/riscv_regs.sail:142),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("rX_bits"),model/riscv_regs.sail:142),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_regs.sail:142),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),model/riscv_regs.sail:142))]),model/riscv_regs.sail:142),P_aux(P_id(Id_aux(Id("i"),model/riscv_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("rX"),model/riscv_regs.sail:142),[(E_aux(E_app(Id_aux(Id("unsigned"),model/riscv_regs.sail:142),[(E_aux(E_id(Id_aux(Id("i"),model/riscv_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("range"),../sail/lib/vector_dec.sail:240),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240));(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),../sail/lib/vector_dec.sail:240),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))]),../sail/lib/vector_dec.sail:240)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:142)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("wX_bits"),model/riscv_regs.sail:144),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_regs.sail:144),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),model/riscv_regs.sail:144))]),model/riscv_regs.sail:144));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_regs.sail:97));(BE_aux(BE_wreg,model/riscv_regs.sail:97))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144)),model/riscv_regs.sail:144),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("wX_bits"),model/riscv_regs.sail:144),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_regs.sail:144),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),model/riscv_regs.sail:144))]),model/riscv_regs.sail:144),P_aux(P_id(Id_aux(Id("i"),model/riscv_regs.sail:144)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144),P_aux(P_id(Id_aux(Id("data"),model/riscv_regs.sail:144)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_regs.sail:144-146)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("wX"),model/riscv_regs.sail:145),[(E_aux(E_app(Id_aux(Id("unsigned"),model/riscv_regs.sail:145),[(E_aux(E_id(Id_aux(Id("i"),model/riscv_regs.sail:145)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("range"),../sail/lib/vector_dec.sail:240),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240));(A_aux(A_nexp(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_exp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:240),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240)),../sail/lib/vector_dec.sail:240))]),../sail/lib/vector_dec.sail:240)));(E_aux(E_id(Id_aux(Id("data"),model/riscv_regs.sail:145)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:97)),model/riscv_regs.sail:97)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:144)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_overload(Id_aux(Id("X"),model/riscv_regs.sail:148),[(Id_aux(Id("rX_bits"),model/riscv_regs.sail:148));(Id_aux(Id("wX_bits"),model/riscv_regs.sail:148));(Id_aux(Id("rX"),model/riscv_regs.sail:148));(Id_aux(Id("wX"),model/riscv_regs.sail:148))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("reg_name_abi"),model/riscv_regs.sail:152),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:152)),model/riscv_regs.sail:152),Effect_aux(Effect_set([]),model/riscv_regs.sail:152)),model/riscv_regs.sail:152)),model/riscv_regs.sail:152))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("reg_name_abi"),model/riscv_regs.sail:154),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("r"),model/riscv_regs.sail:154)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("r"),model/riscv_regs.sail:155)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00000"),model/riscv_regs.sail:156)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("zero"),model/riscv_regs.sail:156)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00001"),model/riscv_regs.sail:157)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("ra"),model/riscv_regs.sail:157)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00010"),model/riscv_regs.sail:158)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("sp"),model/riscv_regs.sail:158)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00011"),model/riscv_regs.sail:159)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("gp"),model/riscv_regs.sail:159)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00100"),model/riscv_regs.sail:160)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("tp"),model/riscv_regs.sail:160)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00101"),model/riscv_regs.sail:161)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t0"),model/riscv_regs.sail:161)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00110"),model/riscv_regs.sail:162)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t1"),model/riscv_regs.sail:162)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00111"),model/riscv_regs.sail:163)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t2"),model/riscv_regs.sail:163)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01000"),model/riscv_regs.sail:164)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("fp"),model/riscv_regs.sail:164)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01001"),model/riscv_regs.sail:165)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s1"),model/riscv_regs.sail:165)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01010"),model/riscv_regs.sail:166)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a0"),model/riscv_regs.sail:166)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01011"),model/riscv_regs.sail:167)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a1"),model/riscv_regs.sail:167)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01100"),model/riscv_regs.sail:168)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a2"),model/riscv_regs.sail:168)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01101"),model/riscv_regs.sail:169)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a3"),model/riscv_regs.sail:169)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01110"),model/riscv_regs.sail:170)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a4"),model/riscv_regs.sail:170)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01111"),model/riscv_regs.sail:171)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a5"),model/riscv_regs.sail:171)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10000"),model/riscv_regs.sail:172)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a6"),model/riscv_regs.sail:172)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10001"),model/riscv_regs.sail:173)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("a7"),model/riscv_regs.sail:173)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10010"),model/riscv_regs.sail:174)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s2"),model/riscv_regs.sail:174)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10011"),model/riscv_regs.sail:175)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s3"),model/riscv_regs.sail:175)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10100"),model/riscv_regs.sail:176)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s4"),model/riscv_regs.sail:176)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10101"),model/riscv_regs.sail:177)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s5"),model/riscv_regs.sail:177)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10110"),model/riscv_regs.sail:178)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s6"),model/riscv_regs.sail:178)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10111"),model/riscv_regs.sail:179)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s7"),model/riscv_regs.sail:179)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11000"),model/riscv_regs.sail:180)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s8"),model/riscv_regs.sail:180)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11001"),model/riscv_regs.sail:181)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s9"),model/riscv_regs.sail:181)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11010"),model/riscv_regs.sail:182)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s10"),model/riscv_regs.sail:182)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11011"),model/riscv_regs.sail:183)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("s11"),model/riscv_regs.sail:183)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11100"),model/riscv_regs.sail:184)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t3"),model/riscv_regs.sail:184)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11101"),model/riscv_regs.sail:185)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t4"),model/riscv_regs.sail:185)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11110"),model/riscv_regs.sail:186)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t5"),model/riscv_regs.sail:186)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11111"),model/riscv_regs.sail:187)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_string("t6"),model/riscv_regs.sail:187)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:152)),model/riscv_regs.sail:152)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:152)),model/riscv_regs.sail:152))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:152)),model/riscv_regs.sail:152),Effect_aux(Effect_set([]),model/riscv_regs.sail:152)),model/riscv_regs.sail:152)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_regs.sail:191),[(Id_aux(Id("reg_name_abi"),model/riscv_regs.sail:191))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("reg_name"),model/riscv_regs.sail:195),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)),model/riscv_regs.sail:195))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("reg_name"),model/riscv_regs.sail:196),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_regs.sail:197)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("zero"),model/riscv_regs.sail:197)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("00001"),model/riscv_regs.sail:198)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ra"),model/riscv_regs.sail:198)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("00010"),model/riscv_regs.sail:199)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sp"),model/riscv_regs.sail:199)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)),model/riscv_regs.sail:195)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("00011"),model/riscv_regs.sail:200)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A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/sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("101"),model/riscv_regs.sail:237)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("a3"),model/riscv_regs.sail:237)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_regs.sail:231)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("110"),model/riscv_regs.sail:238)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("a4"),model/riscv_regs.sail:238)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_regs.sail:231)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("111"),model/riscv_regs.sail:239)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("a5"),model/riscv_regs.sail:239)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_regs.sail:231)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)),model/riscv_regs.sail:231)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_base_regs"),model/riscv_regs.sail:242),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:242)),model/riscv_regs.sail:242))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:242)),model/riscv_regs.sail:242),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_regs.sail:242))]),model/riscv_regs.sail:242)),model/riscv_regs.sail:242)),model/riscv_regs.sail:242))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_base_regs"),model/riscv_regs.sail:243),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_regs.sail:243)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x1"),model/riscv_regs.sail:244)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("zero_reg"),model/riscv_regs.sail:244)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("x2"),model/riscv_regs.sail:245)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("zero_reg"),model/riscv_regs.sail:245)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sa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ib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:9)),model/riscv_pc_access.sail:9))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pc_access.sail:9))]),model/riscv_pc_access.sail:9)),model/riscv_pc_access.sail:9)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_next_pc"),model/riscv_pc_access.sail:12),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:12)),model/riscv_pc_access.sail:12))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pc_access.sail:12))]),model/riscv_pc_access.sail:12)),model/riscv_pc_access.sail:12)),model/riscv_pc_access.sail:12))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_next_pc"),model/riscv_pc_access.sail:13),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_pc_access.sail:13)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("nextPC"),model/riscv_pc_access.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:12)),model/riscv_pc_access.sail:12))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pc_access.sail:12))]),model/riscv_pc_access.sail:12)),model/riscv_pc_access.sail:12)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_next_pc"),model/riscv_pc_access.sail:15),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pc_access.sail:15))]),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_next_pc"),model/riscv_pc_access.sail:16),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("pc"),model/riscv_pc_access.sail:16)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("nextPC"),model/riscv_pc_access.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("pc"),model/riscv_pc_access.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pc_access.sail:15))]),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("tick_pc"),model/riscv_pc_access.sail:20),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pc_access.sail:20));(BE_aux(BE_wreg,model/riscv_pc_access.sail:20))]),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("tick_pc"),model/riscv_pc_access.sail:21),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_pc_access.sail:21)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("PC"),model/riscv_pc_access.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("nextPC"),model/riscv_pc_access.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pc_access.sail:20));(BE_aux(BE_wreg,model/riscv_pc_access.sail:20))]),model/riscv_pc_access.sail:20)),model/riscv_pc_access.sail:20)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:5))]),model/riscv_sys_regs.sail:5),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:5))]),model/riscv_sys_regs.sail:5),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5),Id_aux(Id("cur_privilege"),model/riscv_sys_regs.sail:5)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:9))]),model/riscv_sys_regs.sail:9),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:9))]),model/riscv_sys_regs.sail:9),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:9)),model/riscv_sys_regs.sail:9),Id_aux(Id("cur_inst"),model/riscv_sys_regs.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Misa"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Misa"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Misa"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Misa"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Misa_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Misa_bits"),:1));(Id_aux(Id("_set_Misa_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_MXL"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_MXL"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(62),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(62),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_MXL"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_MXL"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(62),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_MXL"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_MXL"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(62),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MXL"),:1),[(Id_aux(Id("_update_Misa_MXL"),:1))]));(DEF_overload(Id_aux(Id("_mod_MXL"),:1),[(Id_aux(Id("_get_Misa_MXL"),:1));(Id_aux(Id("_set_Misa_MXL"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_Z"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_Z"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(25),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(25),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(25),Unknown),Nexp_aux(Nexp_constant(25),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_Z"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_Z"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(25),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(25),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_Z"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_Z"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(25),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(25),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(25),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Z"),:1),[(Id_aux(Id("_update_Misa_Z"),:1))]));(DEF_overload(Id_aux(Id("_mod_Z"),:1),[(Id_aux(Id("_get_Misa_Z"),:1));(Id_aux(Id("_set_Misa_Z"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_Y"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_Y"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(24),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(24),Unknown),Nexp_aux(Nexp_constant(24),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_Y"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_Y"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(24),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_Y"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_Y"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(24),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Y"),:1),[(Id_aux(Id("_update_Misa_Y"),:1))]));(DEF_overload(Id_aux(Id("_mod_Y"),:1),[(Id_aux(Id("_get_Misa_Y"),:1));(Id_aux(Id("_set_Misa_Y"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_X"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(23),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(23),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(23),Unknown),Nexp_aux(Nexp_constant(23),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(23),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(23),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(23),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(23),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_X"),:1),[(Id_aux(Id("_update_Misa_X"),:1))]));(DEF_overload(Id_aux(Id("_mod_X"),:1),[(Id_aux(Id("_get_Misa_X"),:1));(Id_aux(Id("_set_Misa_X"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_W"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(22),Unknown),Nexp_aux(Nexp_constant(22),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_W"),:1),[(Id_aux(Id("_update_Misa_W"),:1))]));(DEF_overload(Id_aux(Id("_mod_W"),:1),[(Id_aux(Id("_get_Misa_W"),:1));(Id_aux(Id("_set_Misa_W"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_V"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(21),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_V"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_V"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_V"),:1),[(Id_aux(Id("_update_Misa_V"),:1))]));(DEF_overload(Id_aux(Id("_mod_V"),:1),[(Id_aux(Id("_get_Misa_V"),:1));(Id_aux(Id("_set_Misa_V"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_U"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(20),Unknown),Nexp_aux(Nexp_constant(20),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_U"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_U"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_U"),:1),[(Id_aux(Id("_update_Misa_U"),:1))]));(DEF_overload(Id_aux(Id("_mod_U"),:1),[(Id_aux(Id("_get_Misa_U"),:1));(Id_aux(Id("_set_Misa_U"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_T"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_T"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(19),Unknown),Nexp_aux(Nexp_constant(19),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_T"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_T"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_T"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_T"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_T"),:1),[(Id_aux(Id("_update_Misa_T"),:1))]));(DEF_overload(Id_aux(Id("_mod_T"),:1),[(Id_aux(Id("_get_Misa_T"),:1));(Id_aux(Id("_set_Misa_T"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_S"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_S"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(18),Unknown),Nexp_aux(Nexp_constant(18),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_S"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_S"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_S"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_S"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_S"),:1),[(Id_aux(Id("_update_Misa_S"),:1))]));(DEF_overload(Id_aux(Id("_mod_S"),:1),[(Id_aux(Id("_get_Misa_S"),:1));(Id_aux(Id("_set_Misa_S"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_R"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(17),Unknown),Nexp_aux(Nexp_constant(17),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_R"),:1),[(Id_aux(Id("_update_Misa_R"),:1))]));(DEF_overload(Id_aux(Id("_mod_R"),:1),[(Id_aux(Id("_get_Misa_R"),:1));(Id_aux(Id("_set_Misa_R"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_Q"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_Q"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(16),Unknown),Nexp_aux(Nexp_constant(16),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_Q"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_Q"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_Q"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_Q"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Q"),:1),[(Id_aux(Id("_update_Misa_Q"),:1))]));(DEF_overload(Id_aux(Id("_mod_Q"),:1),[(Id_aux(Id("_get_Misa_Q"),:1));(Id_aux(Id("_set_Misa_Q"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_P"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_P"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(15),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_P"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_P"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_P"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_P"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_P"),:1),[(Id_aux(Id("_update_Misa_P"),:1))]));(DEF_overload(Id_aux(Id("_mod_P"),:1),[(Id_aux(Id("_get_Misa_P"),:1));(Id_aux(Id("_set_Misa_P"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_O"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_O"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(14),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(14),Unknown),Nexp_aux(Nexp_constant(14),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_O"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_O"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(14),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_O"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_O"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(14),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_O"),:1),[(Id_aux(Id("_update_Misa_O"),:1))]));(DEF_overload(Id_aux(Id("_mod_O"),:1),[(Id_aux(Id("_get_Misa_O"),:1));(Id_aux(Id("_set_Misa_O"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_N"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_N"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(13),Unknown),Nexp_aux(Nexp_constant(13),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_N"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_N"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_N"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_N"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_N"),:1),[(Id_aux(Id("_update_Misa_N"),:1))]));(DEF_overload(Id_aux(Id("_mod_N"),:1),[(Id_aux(Id("_get_Misa_N"),:1));(Id_aux(Id("_set_Misa_N"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_M"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_M"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(12),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_M"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_M"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_M"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_M"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_M"),:1),[(Id_aux(Id("_update_Misa_M"),:1))]));(DEF_overload(Id_aux(Id("_mod_M"),:1),[(Id_aux(Id("_get_Misa_M"),:1));(Id_aux(Id("_set_Misa_M"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_L"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(11),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_L"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_L"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_L"),:1),[(Id_aux(Id("_update_Misa_L"),:1))]));(DEF_overload(Id_aux(Id("_mod_L"),:1),[(Id_aux(Id("_get_Misa_L"),:1));(Id_aux(Id("_set_Misa_L"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_K"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_K"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(10),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_K"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_K"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_K"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_K"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_K"),:1),[(Id_aux(Id("_update_Misa_K"),:1))]));(DEF_overload(Id_aux(Id("_mod_K"),:1),[(Id_aux(Id("_get_Misa_K"),:1));(Id_aux(Id("_set_Misa_K"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_J"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_J"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_J"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_J"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_J"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_J"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_J"),:1),[(Id_aux(Id("_update_Misa_J"),:1))]));(DEF_overload(Id_aux(Id("_mod_J"),:1),[(Id_aux(Id("_get_Misa_J"),:1));(Id_aux(Id("_set_Misa_J"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_I"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_I"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_I"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_I"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_I"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_I"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_I"),:1),[(Id_aux(Id("_update_Misa_I"),:1))]));(DEF_overload(Id_aux(Id("_mod_I"),:1),[(Id_aux(Id("_get_Misa_I"),:1));(Id_aux(Id("_set_Misa_I"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_H"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_H"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_H"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_H"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_H"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_H"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_H"),:1),[(Id_aux(Id("_update_Misa_H"),:1))]));(DEF_overload(Id_aux(Id("_mod_H"),:1),[(Id_aux(Id("_get_Misa_H"),:1));(Id_aux(Id("_set_Misa_H"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_G"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(6),Unknown),Nexp_aux(Nexp_constant(6),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_G"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_G"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_G"),:1),[(Id_aux(Id("_update_Misa_G"),:1))]));(DEF_overload(Id_aux(Id("_mod_G"),:1),[(Id_aux(Id("_get_Misa_G"),:1));(Id_aux(Id("_set_Misa_G"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_F"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_F"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_F"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_F"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_F"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_F"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_F"),:1),[(Id_aux(Id("_update_Misa_F"),:1))]));(DEF_overload(Id_aux(Id("_mod_F"),:1),[(Id_aux(Id("_get_Misa_F"),:1));(Id_aux(Id("_set_Misa_F"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_E"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_E"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_E"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_E"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_E"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_E"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_E"),:1),[(Id_aux(Id("_update_Misa_E"),:1))]));(DEF_overload(Id_aux(Id("_mod_E"),:1),[(Id_aux(Id("_get_Misa_E"),:1));(Id_aux(Id("_set_Misa_E"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_D"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_D"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_D"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_D"),:1),[(Id_aux(Id("_update_Misa_D"),:1))]));(DEF_overload(Id_aux(Id("_mod_D"),:1),[(Id_aux(Id("_get_Misa_D"),:1));(Id_aux(Id("_set_Misa_D"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_C"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_C"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_C"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_C"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_C"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_C"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_C"),:1),[(Id_aux(Id("_update_Misa_C"),:1))]));(DEF_overload(Id_aux(Id("_mod_C"),:1),[(Id_aux(Id("_get_Misa_C"),:1));(Id_aux(Id("_set_Misa_C"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_B"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_B"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_B"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_B"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_B"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_B"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_B"),:1),[(Id_aux(Id("_update_Misa_B"),:1))]));(DEF_overload(Id_aux(Id("_mod_B"),:1),[(Id_aux(Id("_get_Misa_B"),:1));(Id_aux(Id("_set_Misa_B"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Misa_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Misa_A"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Misa_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Misa_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Misa_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Misa_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Misa_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Misa_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),Id_aux(Id("Misa_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_A"),:1),[(Id_aux(Id("_update_Misa_A"),:1))]));(DEF_overload(Id_aux(Id("_mod_A"),:1),[(Id_aux(Id("_get_Misa_A"),:1));(Id_aux(Id("_set_Misa_A"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),model/riscv_sys_regs.sail:71),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:71))]),model/riscv_sys_regs.sail:71),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71),Id_aux(Id("misa"),model/riscv_sys_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sys_enable_writable_misa"),model/riscv_sys_regs.sail:74),[c: "sys_enable_writable_misa",ocaml: "Platform.enable_writable_misa",_: "sys_enable_writable_misa"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74),Effect_aux(Effect_set([]),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("sys_enable_rvc"),model/riscv_sys_regs.sail:76),[c: "sys_enable_rvc",ocaml: "Platform.enable_rvc",_: "sys_enable_rvc"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76),Effect_aux(Effect_set([]),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_veto_disable_C"),model/riscv_sys_regs.sail:81),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:81))]),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_misa"),model/riscv_sys_regs.sail:84),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84))],Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_regs.sail:4))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_misa"),model/riscv_sys_regs.sail:84),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:84)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84))),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:84)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:84-94)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("sys_enable_writable_misa"),model/riscv_sys_regs.sail:85),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:85)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:87)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Misa"),model/riscv_sys_regs.sail:87),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:87)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("or_bool"),../sail/lib/flow.sail:45),[(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:89)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:89)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)));(E_aux(E_app(Id_aux(Id("or_bool"),../sail/lib/flow.sail:45),[(E_aux(E_app(Id_aux(Id("eq_bit"),../sail/lib/flow.sail:43),[(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("nextPC"),model/riscv_sys_regs.sail:89)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_sys_regs.sail:89)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)));(E_aux(E_lit(L_aux(L_one,model/riscv_sys_regs.sail:89)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/flow.sail:14)),../sail/lib/flow.sail:14)));(E_aux(E_app(Id_aux(Id("ext_veto_disable_C"),model/riscv_sys_regs.sail:89),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:89)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1906#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1907#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_or(NC_aux(NC_var(Kid_aux(Var("'ex1906#"),Unknown)),../sail/lib/flow.sail:26),NC_aux(NC_var(Kid_aux(Var("'ex1907#"),Unknown)),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:26)),Unknown))]),Unknown)),Unknown)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1912#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1910#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1911#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_and(NC_aux(NC_var(Kid_aux(Var("'ex1912#"),Unknown)),Unknown),NC_aux(NC_or(NC_aux(NC_var(Kid_aux(Var("'ex1910#"),Unknown)),../sail/lib/flow.sail:26),NC_aux(NC_var(Kid_aux(Var("'ex1911#"),Unknown)),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:22)),Unknown)),Unknown))]),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("sys_enable_rvc"),model/riscv_sys_regs.sail:89),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:89)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1919#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex1919#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1916#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1917#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1918#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex1921#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_or(NC_aux(NC_and(NC_aux(NC_var(Kid_aux(Var("'ex1916#"),Unknown)),Unknown),NC_aux(NC_or(NC_aux(NC_var(Kid_aux(Var("'ex1917#"),Unknown)),../sail/lib/flow.sail:26),NC_aux(NC_var(Kid_aux(Var("'ex1918#"),Unknown)),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:22)),../sail/lib/flow.sail:26),NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex1921#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:26)),Unknown))]),Unknown)),Unknown)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:90)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)),E_aux(E_app(Id_aux(Id("_update_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:91)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)));(E_aux(E_app(Id_aux(Id("_get_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:91)),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84))),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:93)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84))),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84)))]),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:84)),model/riscv_sys_regs.sail:84),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveAtomics"),model/riscv_sys_regs.sail:98),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:98)),model/riscv_sys_regs.sail:98),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:98)),model/riscv_sys_regs.sail:98)),model/riscv_sys_regs.sail:98),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveAtomics"),model/riscv_sys_regs.sail:98),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:98)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_A"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:98)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:98)),model/riscv_sys_regs.sail:98),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveRVC"),model/riscv_sys_regs.sail:99),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:99)),model/riscv_sys_regs.sail:99),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:99)),model/riscv_sys_regs.sail:99)),model/riscv_sys_regs.sail:99),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveRVC"),model/riscv_sys_regs.sail:99),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:99)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:99)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:99)),model/riscv_sys_regs.sail:99),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveMulDiv"),model/riscv_sys_regs.sail:100),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:100)),model/riscv_sys_regs.sail:100),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:100)),model/riscv_sys_regs.sail:100)),model/riscv_sys_regs.sail:100),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveMulDiv"),model/riscv_sys_regs.sail:100),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:100)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_M"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:100)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:100)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:100)),model/riscv_sys_regs.sail:100),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveSupMode"),model/riscv_sys_regs.sail:101),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveSupMode"),model/riscv_sys_regs.sail:101),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:101)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_S"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:101)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveUsrMode"),model/riscv_sys_regs.sail:102),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveUsrMode"),model/riscv_sys_regs.sail:102),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:102)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_U"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:102)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("haveNExt"),model/riscv_sys_regs.sail:103),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:103)),model/riscv_sys_regs.sail:103),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:103)),model/riscv_sys_regs.sail:103)),model/riscv_sys_regs.sail:103),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("haveNExt"),model/riscv_sys_regs.sail:103),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:103)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_N"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:103)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:103)),model/riscv_sys_regs.sail:103),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Mstatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Mstatus"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Mstatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Mstatus"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Mstatus_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Mstatus_bits"),:1));(Id_aux(Id("_set_Mstatus_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(63),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SD"),:1),[(Id_aux(Id("_update_Mstatus_SD"),:1))]));(DEF_overload(Id_aux(Id("_mod_SD"),:1),[(Id_aux(Id("_get_Mstatus_SD"),:1));(Id_aux(Id("_set_Mstatus_SD"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_TSR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_TSR"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(22),Unknown),Nexp_aux(Nexp_constant(22),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_TSR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_TSR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_TSR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_TSR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(22),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_TSR"),:1),[(Id_aux(Id("_update_Mstatus_TSR"),:1))]));(DEF_overload(Id_aux(Id("_mod_TSR"),:1),[(Id_aux(Id("_get_Mstatus_TSR"),:1));(Id_aux(Id("_set_Mstatus_TSR"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_TW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_TW"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(21),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_TW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_TW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_TW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_TW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_TW"),:1),[(Id_aux(Id("_update_Mstatus_TW"),:1))]));(DEF_overload(Id_aux(Id("_mod_TW"),:1),[(Id_aux(Id("_get_Mstatus_TW"),:1));(Id_aux(Id("_set_Mstatus_TW"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_TVM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_TVM"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(20),Unknown),Nexp_aux(Nexp_constant(20),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_TVM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_TVM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_TVM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_TVM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(20),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(20),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_TVM"),:1),[(Id_aux(Id("_update_Mstatus_TVM"),:1))]));(DEF_overload(Id_aux(Id("_mod_TVM"),:1),[(Id_aux(Id("_get_Mstatus_TVM"),:1));(Id_aux(Id("_set_Mstatus_TVM"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(19),Unknown),Nexp_aux(Nexp_constant(19),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MXR"),:1),[(Id_aux(Id("_update_Mstatus_MXR"),:1))]));(DEF_overload(Id_aux(Id("_mod_MXR"),:1),[(Id_aux(Id("_get_Mstatus_MXR"),:1));(Id_aux(Id("_set_Mstatus_MXR"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(18),Unknown),Nexp_aux(Nexp_constant(18),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SUM"),:1),[(Id_aux(Id("_update_Mstatus_SUM"),:1))]));(DEF_overload(Id_aux(Id("_mod_SUM"),:1),[(Id_aux(Id("_get_Mstatus_SUM"),:1));(Id_aux(Id("_set_Mstatus_SUM"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_MPRV"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_MPRV"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(17),Unknown),Nexp_aux(Nexp_constant(17),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_MPRV"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_MPRV"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_MPRV"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_MPRV"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(17),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(17),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(17),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MPRV"),:1),[(Id_aux(Id("_update_Mstatus_MPRV"),:1))]));(DEF_overload(Id_aux(Id("_mod_MPRV"),:1),[(Id_aux(Id("_get_Mstatus_MPRV"),:1));(Id_aux(Id("_set_Mstatus_MPRV"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(16),Unknown),Nexp_aux(Nexp_constant(15),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_XS"),:1),[(Id_aux(Id("_update_Mstatus_XS"),:1))]));(DEF_overload(Id_aux(Id("_mod_XS"),:1),[(Id_aux(Id("_get_Mstatus_XS"),:1));(Id_aux(Id("_set_Mstatus_XS"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(14),Unknown),Nexp_aux(Nexp_constant(13),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_FS"),:1),[(Id_aux(Id("_update_Mstatus_FS"),:1))]));(DEF_overload(Id_aux(Id("_mod_FS"),:1),[(Id_aux(Id("_get_Mstatus_FS"),:1));(Id_aux(Id("_set_Mstatus_FS"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_MPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_MPP"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(12),Unknown),Nexp_aux(Nexp_constant(11),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_MPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_MPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_MPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_MPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MPP"),:1),[(Id_aux(Id("_update_Mstatus_MPP"),:1))]));(DEF_overload(Id_aux(Id("_mod_MPP"),:1),[(Id_aux(Id("_get_Mstatus_MPP"),:1));(Id_aux(Id("_set_Mstatus_MPP"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SPP"),:1),[(Id_aux(Id("_update_Mstatus_SPP"),:1))]));(DEF_overload(Id_aux(Id("_mod_SPP"),:1),[(Id_aux(Id("_get_Mstatus_SPP"),:1));(Id_aux(Id("_set_Mstatus_SPP"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_MPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_MPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_MPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_MPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_MPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_MPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MPIE"),:1),[(Id_aux(Id("_update_Mstatus_MPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_MPIE"),:1),[(Id_aux(Id("_get_Mstatus_MPIE"),:1));(Id_aux(Id("_set_Mstatus_MPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SPIE"),:1),[(Id_aux(Id("_update_Mstatus_SPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_SPIE"),:1),[(Id_aux(Id("_get_Mstatus_SPIE"),:1));(Id_aux(Id("_set_Mstatus_SPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UPIE"),:1),[(Id_aux(Id("_update_Mstatus_UPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UPIE"),:1),[(Id_aux(Id("_get_Mstatus_UPIE"),:1));(Id_aux(Id("_set_Mstatus_UPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_MIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_MIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_MIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_MIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_MIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_MIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MIE"),:1),[(Id_aux(Id("_update_Mstatus_MIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_MIE"),:1),[(Id_aux(Id("_get_Mstatus_MIE"),:1));(Id_aux(Id("_set_Mstatus_MIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SIE"),:1),[(Id_aux(Id("_update_Mstatus_SIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_SIE"),:1),[(Id_aux(Id("_get_Mstatus_SIE"),:1));(Id_aux(Id("_set_Mstatus_SIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),Id_aux(Id("Mstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UIE"),:1),[(Id_aux(Id("_update_Mstatus_UIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UIE"),:1),[(Id_aux(Id("_get_Mstatus_UIE"),:1));(Id_aux(Id("_set_Mstatus_UIE"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134))]),model/riscv_sys_regs.sail:134),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:134))]),model/riscv_sys_regs.sail:134),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134),Id_aux(Id("mstatus"),model/riscv_sys_regs.sail:134)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("effectivePrivilege"),model/riscv_sys_regs.sail:136),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("effectivePrivilege"),model/riscv_sys_regs.sail:136),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:136)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136),P_aux(P_id(Id_aux(Id("priv"),model/riscv_sys_regs.sail:136)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))]),model/riscv_sys_regs.sail:136-139)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_MPRV"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:137)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:137)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("privLevel_of_bits"),model/riscv_sys_regs.sail:138),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_MPP"),:1),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_sys_regs.sail:138)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:76)),model/riscv_types.sail:76)),E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_sys_regs.sail:139)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:136)),model/riscv_sys_regs.sail:136),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_mstatus_SXL"),model/riscv_sys_regs.sail:141),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141))],Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_mstatus_SXL"),model/riscv_sys_regs.sail:141),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:141)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_app(Id_aux(Id("arch_to_bits"),model/riscv_sys_regs.sail:143),[(E_aux(E_id(Id_aux(Id("RV32"),model/riscv_sys_regs.sail:143)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:144)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(35),model/riscv_sys_regs.sail:144)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(35),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(34),model/riscv_sys_regs.sail:144)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(35),Unknown),Nexp_aux(Nexp_constant(34),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:141)),model/riscv_sys_regs.sail:141))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_mstatus_SXL"),model/riscv_sys_regs.sail:147),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147));(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_mstatus_SXL"),model/riscv_sys_regs.sail:147),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:147)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:147-154)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:148)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:149)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:151)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),model/riscv_sys_regs.sail:151),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:151)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(35),model/riscv_sys_regs.sail:151)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(35),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(34),model/riscv_sys_regs.sail:151)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:151)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("Mk_Mstatus"),model/riscv_sys_regs.sail:152),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:152)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:147)),model/riscv_sys_regs.sail:147),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_mstatus_UXL"),model/riscv_sys_regs.sail:156),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156))],Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_mstatus_UXL"),model/riscv_sys_regs.sail:156),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:156)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:157)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_app(Id_aux(Id("arch_to_bits"),model/riscv_sys_regs.sail:158),[(E_aux(E_id(Id_aux(Id("RV32"),model/riscv_sys_regs.sail:158)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:159)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(33),model/riscv_sys_regs.sail:159)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:159)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:156)),model/riscv_sys_regs.sail:156))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_mstatus_UXL"),model/riscv_sys_regs.sail:162),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162));(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_mstatus_UXL"),model/riscv_sys_regs.sail:162),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:162)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:162)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:162-169)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:163)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:164)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:166)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),model/riscv_sys_regs.sail:166),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:166)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(33),model/riscv_sys_regs.sail:166)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_regs.sail:166)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:166)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("Mk_Mstatus"),model/riscv_sys_regs.sail:167),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:167)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_mstatus"),model/riscv_sys_regs.sail:171),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_mstatus"),model/riscv_sys_regs.sail:171),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:171)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:171)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:171-195)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:172)),model/riscv_sys_regs.sail:172),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:172)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:172)),model/riscv_sys_regs.sail:172))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:172)),model/riscv_sys_regs.sail:172)),E_aux(E_app(Id_aux(Id("Mk_Mstatus"),model/riscv_sys_regs.sail:172),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:172)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:175)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Mstatus_XS"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:175)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:172)),mode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d_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:171)),model/riscv_sys_regs.sail:171),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("cur_Architecture"),model/riscv_sys_regs.sail:199),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:5))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("cur_Architecture"),model/riscv_sys_regs.sail:199),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:199)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:200)),model/riscv_sys_regs.sail:200),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:200)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_sys_regs.sail:201)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_sys_regs.sail:202)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("_get_Misa_MXL"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:202)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_sys_regs.sail:203)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("get_mstatus_SXL"),model/riscv_sys_regs.sail:203),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_sys_regs.sail:203)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_sys_regs.sail:204)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("get_mstatus_UXL"),model/riscv_sys_regs.sail:204),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_sys_regs.sail:204)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("architecture"),model/riscv_sys_regs.sail:206),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:206)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_sys_regs.sail:207),[(P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:207)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:207)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),../sail/lib/option.sail:10))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_sys_regs.sail:208),[(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:208)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),E_aux(E_app(Id_aux(Id("internal_error"),model/riscv_sys_regs.sail:208),[(E_aux(E_lit(L_aux(L_string("Invalid current architecture"),model/riscv_sys_regs.sail:208)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_types.sail:248))),None))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199)))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199))),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199)))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("in32BitMode"),model/riscv_sys_regs.sail:212),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:212)),model/riscv_sys_regs.sail:212),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:5))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:212)),model/riscv_sys_regs.sail:212)),model/riscv_sys_regs.sail:212),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("in32BitMode"),model/riscv_sys_regs.sail:212),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:212)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_app(Id_aux(Id("cur_Architecture"),model/riscv_sys_regs.sail:213),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:213)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:199)),model/riscv_sys_regs.sail:199)));(E_aux(E_id(Id_aux(Id("RV32"),model/riscv_sys_regs.sail:213)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:212)),model/riscv_sys_regs.sail:212))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:212)),model/riscv_sys_regs.sail:212),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Minterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Minterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Minterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Minterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Minterrupts_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Minterrupts_bits"),:1));(Id_aux(Id("_set_Minterrupts_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_MEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_MEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(11),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_MEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_MEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_MEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_MEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MEI"),:1),[(Id_aux(Id("_update_Minterrupts_MEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_MEI"),:1),[(Id_aux(Id("_get_Minterrupts_MEI"),:1));(Id_aux(Id("_set_Minterrupts_MEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SEI"),:1),[(Id_aux(Id("_update_Minterrupts_SEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_SEI"),:1),[(Id_aux(Id("_get_Minterrupts_SEI"),:1));(Id_aux(Id("_set_Minterrupts_SEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UEI"),:1),[(Id_aux(Id("_update_Minterrupts_UEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UEI"),:1),[(Id_aux(Id("_get_Minterrupts_UEI"),:1));(Id_aux(Id("_set_Minterrupts_UEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_MTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_MTI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_MTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_MTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_MTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_MTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MTI"),:1),[(Id_aux(Id("_update_Minterrupts_MTI"),:1))]));(DEF_overload(Id_aux(Id("_mod_MTI"),:1),[(Id_aux(Id("_get_Minterrupts_MTI"),:1));(Id_aux(Id("_set_Minterrupts_MTI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_STI"),:1),[(Id_aux(Id("_update_Minterrupts_STI"),:1))]));(DEF_overload(Id_aux(Id("_mod_STI"),:1),[(Id_aux(Id("_get_Minterrupts_STI"),:1));(Id_aux(Id("_set_Minterrupts_STI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UTI"),:1),[(Id_aux(Id("_update_Minterrupts_UTI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UTI"),:1),[(Id_aux(Id("_get_Minterrupts_UTI"),:1));(Id_aux(Id("_set_Minterrupts_UTI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_MSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_MSI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_MSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_MSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_MSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_MSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MSI"),:1),[(Id_aux(Id("_update_Minterrupts_MSI"),:1))]));(DEF_overload(Id_aux(Id("_mod_MSI"),:1),[(Id_aux(Id("_get_Minterrupts_MSI"),:1));(Id_aux(Id("_set_Minterrupts_MSI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SSI"),:1),[(Id_aux(Id("_update_Minterrupts_SSI"),:1))]));(DEF_overload(Id_aux(Id("_mod_SSI"),:1),[(Id_aux(Id("_get_Minterrupts_SSI"),:1));(Id_aux(Id("_set_Minterrupts_SSI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Minterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Minterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Minterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Minterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Minterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Minterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Minterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Minterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),Id_aux(Id("Minterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_USI"),:1),[(Id_aux(Id("_update_Minterrupts_USI"),:1))]));(DEF_overload(Id_aux(Id("_mod_USI"),:1),[(Id_aux(Id("_get_Minterrupts_USI"),:1));(Id_aux(Id("_set_Minterrupts_USI"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:231))]),model/riscv_sys_regs.sail:231),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:231))]),model/riscv_sys_regs.sail:231),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:231)),model/riscv_sys_regs.sail:231),Id_aux(Id("mip"),model/riscv_sys_regs.sail:231)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:231)),model/riscv_sys_regs.sail:231))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:232))]),model/riscv_sys_regs.sail:232),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:232))]),model/riscv_sys_regs.sail:232),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:232)),model/riscv_sys_regs.sail:232),Id_aux(Id("mie"),model/riscv_sys_regs.sail:232)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:232)),model/riscv_sys_regs.sail:232))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:233))]),model/riscv_sys_regs.sail:233),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:233))]),model/riscv_sys_regs.sail:233),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:233)),model/riscv_sys_regs.sail:233),Id_aux(Id("mideleg"),model/riscv_sys_regs.sail:233)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:233)),model/riscv_sys_regs.sail:233))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_mip"),model/riscv_sys_regs.sail:235),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_mip"),model/riscv_sys_regs.sail:235),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:235)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:235)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:235-248)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:238)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Minterrupts"),model/riscv_sys_regs.sail:238),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:238)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:239)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:239)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:239)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:240)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:240)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:240)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:241)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:241)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:241)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_sys_regs.sail:242),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:242)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:243)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:243)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:243)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:244)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:244)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:244)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:245)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:245)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:245)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:246)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:247)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:235)),model/riscv_sys_regs.sail:235),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_mie"),model/riscv_sys_regs.sail:250),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_mie"),model/riscv_sys_regs.sail:250),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:250)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:250)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:250-265)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:251)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Minterrupts"),model/riscv_sys_regs.sail:251),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:251)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:252)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MEI"),:1),[(E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:252)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MEI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:252)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:253)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:253)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MTI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:253)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:254)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:254)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MSI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:254)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:255)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:255)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:255)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:256)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:256)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:256)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:257)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:257)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:257)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_sys_regs.sail:259),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:259)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:260)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:260)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:260)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:261)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:261)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:261)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:262)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:262)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:262)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:263)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:264)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:250)),model/riscv_sys_regs.sail:250),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_mideleg"),model/riscv_sys_regs.sail:267),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_mideleg"),model/riscv_sys_regs.sail:267),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:267)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:267)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:267-275)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:270)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Minterrupts"),model/riscv_sys_regs.sail:270),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:270)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:271)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:271)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:271)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:272)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:272)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:272)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:273)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_MSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:273)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:273)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:274)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:267)),model/riscv_sys_regs.sail:267),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Medeleg"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Medeleg"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Medeleg"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Medeleg"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Medeleg_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Medeleg_bits"),:1));(Id_aux(Id("_set_Medeleg_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_SAMO_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_SAMO_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(15),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_SAMO_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_SAMO_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_SAMO_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_SAMO_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SAMO_Page_Fault"),:1),[(Id_aux(Id("_update_Medeleg_SAMO_Page_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_SAMO_Page_Fault"),:1),[(Id_aux(Id("_get_Medeleg_SAMO_Page_Fault"),:1));(Id_aux(Id("_set_Medeleg_SAMO_Page_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Load_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Load_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(13),Unknown),Nexp_aux(Nexp_constant(13),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Load_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Load_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Load_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Load_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Load_Page_Fault"),:1),[(Id_aux(Id("_update_Medeleg_Load_Page_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Load_Page_Fault"),:1),[(Id_aux(Id("_get_Medeleg_Load_Page_Fault"),:1));(Id_aux(Id("_set_Medeleg_Load_Page_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Fetch_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Fetch_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(12),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Fetch_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Fetch_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Fetch_Page_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Fetch_Page_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Fetch_Page_Fault"),:1),[(Id_aux(Id("_update_Medeleg_Fetch_Page_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Fetch_Page_Fault"),:1),[(Id_aux(Id("_get_Medeleg_Fetch_Page_Fault"),:1));(Id_aux(Id("_set_Medeleg_Fetch_Page_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_MEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_MEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(10),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_MEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_MEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_MEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_MEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MEnvCall"),:1),[(Id_aux(Id("_update_Medeleg_MEnvCall"),:1))]));(DEF_overload(Id_aux(Id("_mod_MEnvCall"),:1),[(Id_aux(Id("_get_Medeleg_MEnvCall"),:1));(Id_aux(Id("_set_Medeleg_MEnvCall"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_SEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_SEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_SEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_SEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_SEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_SEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SEnvCall"),:1),[(Id_aux(Id("_update_Medeleg_SEnvCall"),:1))]));(DEF_overload(Id_aux(Id("_mod_SEnvCall"),:1),[(Id_aux(Id("_get_Medeleg_SEnvCall"),:1));(Id_aux(Id("_set_Medeleg_SEnvCall"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UEnvCall"),:1),[(Id_aux(Id("_update_Medeleg_UEnvCall"),:1))]));(DEF_overload(Id_aux(Id("_mod_UEnvCall"),:1),[(Id_aux(Id("_get_Medeleg_UEnvCall"),:1));(Id_aux(Id("_set_Medeleg_UEnvCall"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SAMO_Access_Fault"),:1),[(Id_aux(Id("_update_Medeleg_SAMO_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_SAMO_Access_Fault"),:1),[(Id_aux(Id("_get_Medeleg_SAMO_Access_Fault"),:1));(Id_aux(Id("_set_Medeleg_SAMO_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(6),Unknown),Nexp_aux(Nexp_constant(6),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SAMO_Addr_Align"),:1),[(Id_aux(Id("_update_Medeleg_SAMO_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_SAMO_Addr_Align"),:1),[(Id_aux(Id("_get_Medeleg_SAMO_Addr_Align"),:1));(Id_aux(Id("_set_Medeleg_SAMO_Addr_Align"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Load_Access_Fault"),:1),[(Id_aux(Id("_update_Medeleg_Load_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Load_Access_Fault"),:1),[(Id_aux(Id("_get_Medeleg_Load_Access_Fault"),:1));(Id_aux(Id("_set_Medeleg_Load_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Load_Addr_Align"),:1),[(Id_aux(Id("_update_Medeleg_Load_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_Load_Addr_Align"),:1),[(Id_aux(Id("_get_Medeleg_Load_Addr_Align"),:1));(Id_aux(Id("_set_Medeleg_Load_Addr_Align"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Breakpoint"),:1),[(Id_aux(Id("_update_Medeleg_Breakpoint"),:1))]));(DEF_overload(Id_aux(Id("_mod_Breakpoint"),:1),[(Id_aux(Id("_get_Medeleg_Breakpoint"),:1));(Id_aux(Id("_set_Medeleg_Breakpoint"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Illegal_Instr"),:1),[(Id_aux(Id("_update_Medeleg_Illegal_Instr"),:1))]));(DEF_overload(Id_aux(Id("_mod_Illegal_Instr"),:1),[(Id_aux(Id("_get_Medeleg_Illegal_Instr"),:1));(Id_aux(Id("_set_Medeleg_Illegal_Instr"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Fetch_Access_Fault"),:1),[(Id_aux(Id("_update_Medeleg_Fetch_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Fetch_Access_Fault"),:1),[(Id_aux(Id("_get_Medeleg_Fetch_Access_Fault"),:1));(Id_aux(Id("_set_Medeleg_Fetch_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Medeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Medeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Medeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Medeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Medeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Medeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Medeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Medeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),Id_aux(Id("Medeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Fetch_Addr_Align"),:1),[(Id_aux(Id("_update_Medeleg_Fetch_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_Fetch_Addr_Align"),:1),[(Id_aux(Id("_get_Medeleg_Fetch_Addr_Align"),:1));(Id_aux(Id("_set_Medeleg_Fetch_Addr_Align"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:295))]),model/riscv_sys_regs.sail:295),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:295))]),model/riscv_sys_regs.sail:295),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:295)),model/riscv_sys_regs.sail:295),Id_aux(Id("medeleg"),model/riscv_sys_regs.sail:295)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:295)),model/riscv_sys_regs.sail:295))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_medeleg"),model/riscv_sys_regs.sail:297),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_medeleg"),model/riscv_sys_regs.sail:297),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:297)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:297)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:297-302)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:298)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Medeleg"),model/riscv_sys_regs.sail:298),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:298)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:300)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Medeleg_MEnvCall"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:300)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:300)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:301)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297))),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297)))]),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:297)),model/riscv_sys_regs.sail:297),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Mtvec"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Mtvec"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mtvec_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Mtvec"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Mtvec"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mtvec_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mtvec_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mtvec_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mtvec_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mtvec_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mtvec_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mtvec_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mtvec_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Mtvec_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Mtvec_bits"),:1));(Id_aux(Id("_set_Mtvec_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mtvec_Base"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mtvec_Base"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mtvec_Base"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mtvec_Base"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(61),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(61),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(61),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mtvec_Base"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mtvec_Base"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mtvec_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(61),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(61),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(61),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Base"),:1),[(Id_aux(Id("_update_Mtvec_Base"),:1))]));(DEF_overload(Id_aux(Id("_mod_Base"),:1),[(Id_aux(Id("_get_Mtvec_Base"),:1));(Id_aux(Id("_set_Mtvec_Base"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mtvec_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mtvec_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mtvec_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mtvec_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mtvec_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mtvec_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mtvec_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mtvec_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),Id_aux(Id("Mtvec_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Mode"),:1),[(Id_aux(Id("_update_Mtvec_Mode"),:1))]));(DEF_overload(Id_aux(Id("_mod_Mode"),:1),[(Id_aux(Id("_get_Mtvec_Mode"),:1));(Id_aux(Id("_set_Mtvec_Mode"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:310))]),model/riscv_sys_regs.sail:310),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:310))]),model/riscv_sys_regs.sail:310),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310),Id_aux(Id("mtvec"),model/riscv_sys_regs.sail:310)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_tvec"),model/riscv_sys_regs.sail:312),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_tvec"),model/riscv_sys_regs.sail:312),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:312)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:312)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:312-319)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:313)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Mtvec"),model/riscv_sys_regs.sail:313),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:313)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("trapVectorMode_of_bits"),model/riscv_sys_regs.sail:314),[(E_aux(E_app(Id_aux(Id("_get_Mtvec_Mode"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:314)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Direct"),model/riscv_sys_regs.sail:315)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:315)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Vector"),model/riscv_sys_regs.sail:316)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:316)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),E_aux(E_app(Id_aux(Id("_update_Mtvec_Mode"),:1),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:317)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Mtvec_Mode"),:1),[(E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:317)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),:1)),:1))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Mcause"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Mcause"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mcause_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Mcause"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Mcause"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Mcause_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mcause_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mcause_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mcause_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mcause_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mcause_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mcause_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mcause_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Mcause_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Mcause_bits"),:1));(Id_aux(Id("_set_Mcause_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mcause_IsInterrupt"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mcause_IsInterrupt"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(63),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mcause_IsInterrupt"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mcause_IsInterrupt"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mcause_IsInterrupt"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mcause_IsInterrupt"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mcause_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_IsInterrupt"),:1),[(Id_aux(Id("_update_Mcause_IsInterrupt"),:1))]));(DEF_overload(Id_aux(Id("_mod_IsInterrupt"),:1),[(Id_aux(Id("_get_Mcause_IsInterrupt"),:1));(Id_aux(Id("_set_Mcause_IsInterrupt"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Mcause_Cause"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Mcause_Cause"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(62),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(62),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Mcause_Cause"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Mcause_Cause"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Mcause_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(62),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(62),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(62),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Mcause_Cause"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Mcause_Cause"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Mcause_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1)),Id_aux(Id("Mcause_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(62),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(62),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(62),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Mcause"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Cause"),:1),[(Id_aux(Id("_update_Mcause_Cause"),:1))]));(DEF_overload(Id_aux(Id("_mod_Cause"),:1),[(Id_aux(Id("_get_Mcause_Cause"),:1));(Id_aux(Id("_set_Mcause_Cause"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:325))]),model/riscv_sys_regs.sail:325),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:325))]),model/riscv_sys_regs.sail:325),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:325)),model/riscv_sys_regs.sail:325),Id_aux(Id("mcause"),model/riscv_sys_regs.sail:325)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:325)),model/riscv_sys_regs.sail:325))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("tvec_addr"),model/riscv_sys_regs.sail:328),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328));(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("tvec_addr"),model/riscv_sys_regs.sail:328),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:328)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328),P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:328)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328));(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328-337)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:329)),model/riscv_sys_regs.sail:329),P_aux(P_id(Id_aux(Id("base"),model/riscv_sys_regs.sail:329)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Mtvec_Base"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:329)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(62),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("00"),model/riscv_sys_regs.sail:329)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(62),:1),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("trapVectorMode_of_bits"),model/riscv_sys_regs.sail:330),[(E_aux(E_app(Id_aux(Id("_get_Mtvec_Mode"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:330)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Direct"),model/riscv_sys_regs.sail:331)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_regs.sail:331),[(E_aux(E_id(Id_aux(Id("base"),model/riscv_sys_regs.sail:331)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TV_Vector"),model/riscv_sys_regs.sail:332)),Typ_aux(Typ_id(Id_aux(Id("TrapVectorMode"),model/riscv_types.sail:259)),model/riscv_types.sail:259)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Mcause_IsInterrupt"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:332)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:332)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_regs.sail:333),[(E_aux(E_app(Id_aux(Id("add_bits"),../sail/lib/vector_dec.sail:145),[(E_aux(E_id(Id_aux(Id("base"),model/riscv_sys_regs.sail:333))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vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328));(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:328)),model/riscv_sys_regs.sail:328))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:341))]),model/riscv_sys_regs.sail:341),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:341))]),model/riscv_sys_regs.sail:341),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:341)),model/riscv_sys_regs.sail:341),Id_aux(Id("mepc"),model/riscv_sys_regs.sail:341)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_xepc"),model/riscv_sys_regs.sail:346),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:346)),model/riscv_sys_regs.sail:346))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:346)),model/riscv_sys_regs.sail:346),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:346)),model/riscv_sys_regs.sail:346)),model/riscv_sys_regs.sail:346),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_xepc"),model/riscv_sys_regs.sail:346),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:346)),model/riscv_sys_regs.sail:346),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:346)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_if(E_aux(E_app(Id_aux(Id("or_bool"),../sail/lib/flow.sail:45),[(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("sys_enable_writable_misa"),model/riscv_sys_regs.sail:349),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:349)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:74)),model/riscv_sys_regs.sail:74)));(E_aux(E_app(Id_aux(Id("sys_enable_rvc"),model/riscv_sys_regs.sail:349),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:349)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:349)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:349)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex2136#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex2137#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_or(NC_aux(NC_var(Kid_aux(Var("'ex2136#"),Unknown)),../sail/lib/flow.sail:26),NC_aux(NC_var(Kid_aux(Var("'ex2137#"),Unknown)),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:26)),Unknown))]),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("bitvector_update"),../sail/lib/vector_dec.sail:127),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:350)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_sys_regs.sail:350)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_zero,model/riscv_sys_regs.sail:350)),Typ_aux(Typ_id(Id_aux(Id("bit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:351)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("EXTS"),model/riscv_sys_regs.sail:351),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("100"),model/riscv_sys_regs.sail:351)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pc_alignment_mask"),model/riscv_sys_regs.sail:354),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:354)),model/riscv_sys_regs.sail:354),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:354)),model/riscv_sys_regs.sail:354)),model/riscv_sys_regs.sail:354),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pc_alignment_mask"),model/riscv_sys_regs.sail:354),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:354)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("not_vec"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_regs.sail:355),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Misa_C"),:1),[(E_aux(E_id(Id_aux(Id("misa"),model/riscv_sys_regs.sail:355)),Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:355)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_lit(L_aux(L_bin("00"),model/riscv_sys_regs.sail:355)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_bin("10"),model/riscv_sys_regs.sail:355)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:359))]),model/riscv_sys_regs.sail:359),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:359))]),model/riscv_sys_regs.sail:359),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:359)),model/riscv_sys_regs.sail:359),Id_aux(Id("mtval"),model/riscv_sys_regs.sail:359)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:360))]),model/riscv_sys_regs.sail:360),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:360))]),model/riscv_sys_regs.sail:360),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:360)),model/riscv_sys_regs.sail:360),Id_aux(Id("mscratch"),model/riscv_sys_regs.sail:360)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Counteren"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Counteren"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Counteren"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Counteren"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Counteren_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Counteren_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Counteren_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Counteren_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Counteren_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Counteren_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Counteren_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Counteren_bits"),:1));(Id_aux(Id("_set_Counteren_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Counteren_HPM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Counteren_HPM"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Counteren_HPM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Counteren_HPM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(28),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(28),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Counteren_HPM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Counteren_HPM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(28),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(28),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(28),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(29),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_HPM"),:1),[(Id_aux(Id("_update_Counteren_HPM"),:1))]));(DEF_overload(Id_aux(Id("_mod_HPM"),:1),[(Id_aux(Id("_get_Counteren_HPM"),:1));(Id_aux(Id("_set_Counteren_HPM"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Counteren_IR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Counteren_IR"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Counteren_IR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Counteren_IR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Counteren_IR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Counteren_IR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_IR"),:1),[(Id_aux(Id("_update_Counteren_IR"),:1))]));(DEF_overload(Id_aux(Id("_mod_IR"),:1),[(Id_aux(Id("_get_Counteren_IR"),:1));(Id_aux(Id("_set_Counteren_IR"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Counteren_TM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Counteren_TM"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Counteren_TM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Counteren_TM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Counteren_TM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Counteren_TM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_TM"),:1),[(Id_aux(Id("_update_Counteren_TM"),:1))]));(DEF_overload(Id_aux(Id("_mod_TM"),:1),[(Id_aux(Id("_get_Counteren_TM"),:1));(Id_aux(Id("_set_Counteren_TM"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Counteren_CY"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Counteren_CY"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Counteren_CY"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Counteren_CY"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Counteren_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Counteren_CY"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Counteren_CY"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Counteren_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),Id_aux(Id("Counteren_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_CY"),:1),[(Id_aux(Id("_update_Counteren_CY"),:1))]));(DEF_overload(Id_aux(Id("_mod_CY"),:1),[(Id_aux(Id("_get_Counteren_CY"),:1));(Id_aux(Id("_set_Counteren_CY"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:371))]),model/riscv_sys_regs.sail:371),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:371))]),model/riscv_sys_regs.sail:371),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:371)),model/riscv_sys_regs.sail:371),Id_aux(Id("mcounteren"),model/riscv_sys_regs.sail:371)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:371)),model/riscv_sys_regs.sail:371))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:372))]),model/riscv_sys_regs.sail:372),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:372))]),model/riscv_sys_regs.sail:372),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:372)),model/riscv_sys_regs.sail:372),Id_aux(Id("scounteren"),model/riscv_sys_regs.sail:372)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:372)),model/riscv_sys_regs.sail:372))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_mcounteren"),model/riscv_sys_regs.sail:374),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_mcounteren"),model/riscv_sys_regs.sail:374),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374),P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:374)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:374)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:374-380)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:376)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Counteren_IR"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:376)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:374)),model/riscv_sys_regs.sail:374)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:376)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(2),model/riscv_sys_regs.sail:376)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:377)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Counteren_TM"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:377)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:377)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_sys_regs.sail:377)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:378)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Counteren_CY"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:378)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_reg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(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:384)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:384)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(2),model/riscv_sys_regs.sail:384)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:385)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Counteren_TM"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:385)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:385)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_sys_regs.sail:385)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:386)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Counteren_CY"),:1),[(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:386)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)));(E_aux(E_vector([(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:386)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_sys_regs.sail:386)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../sail/lib/vector_dec.sail:99)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("c"),model/riscv_sys_regs.sail:387)),Typ_aux(Typ_id(Id_aux(Id("Counteren"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382))),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382)))]),Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Counteren"),model/riscv_sys_regs.sail:382)),model/riscv_sys_regs.sail:382),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:390))]),model/riscv_sys_regs.sail:390),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:390))]),model/riscv_sys_regs.sail:390),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:390),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:390)),model/riscv_sys_regs.sail:390))]),model/riscv_sys_regs.sail:390),Id_aux(Id("mcycle"),model/riscv_sys_regs.sail:390)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:390)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:391))]),model/riscv_sys_regs.sail:391),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:391))]),model/riscv_sys_regs.sail:391),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:391),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),model/riscv_sys_regs.sail:391))]),model/riscv_sys_regs.sail:391),Id_aux(Id("mtime"),model/riscv_sys_regs.sail:391)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:404))]),model/riscv_sys_regs.sail:404),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:404))]),model/riscv_sys_regs.sail:404),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:404),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:404)),model/riscv_sys_regs.sail:404))]),model/riscv_sys_regs.sail:404),Id_aux(Id("minstret"),model/riscv_sys_regs.sail:404)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:404)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:405))]),model/riscv_sys_regs.sail:405),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:405))]),model/riscv_sys_regs.sail:405),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:405)),model/riscv_sys_regs.sail:405),Id_aux(Id("minstret_written"),model/riscv_sys_regs.sail:405)),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:405)),model/riscv_sys_regs.sail:405))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("retire_instruction"),model/riscv_sys_regs.sail:407),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:405));(BE_aux(BE_wreg,model/riscv_sys_regs.sail:405))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("retire_instruction"),model/riscv_sys_regs.sail:407),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:407)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bool"),../sail/lib/flow.sail:43),[(E_aux(E_id(Id_aux(Id("minstret_written"),model/riscv_sys_regs.sail:408)),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:405)),model/riscv_sys_regs.sail:405)));(E_aux(E_lit(L_aux(L_true,model/riscv_sys_regs.sail:408)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/flow.sail:30)),../sail/lib/flow.sail:30)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("minstret_written"),model/riscv_sys_regs.sail:409)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/riscv_sys_regs.sail:409)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("minstret"),model/riscv_sys_regs.sail:410)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:404)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("add_bits_int"),../sail/lib/vector_dec.sail:145),[(E_aux(E_id(Id_aux(Id("minstret"),model/riscv_sys_regs.sail:410)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:404)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_sys_regs.sail:410)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:404)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:407)),model/riscv_sys_regs.sail:407),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:414))]),model/riscv_sys_regs.sail:414),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:414))]),model/riscv_sys_regs.sail:414),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:414),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:414)),model/riscv_sys_regs.sail:414))]),model/riscv_sys_regs.sail:414),Id_aux(Id("mvendorid"),model/riscv_sys_regs.sail:414)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:414)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:415))]),model/riscv_sys_regs.sail:415),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:415))]),model/riscv_sys_regs.sail:415),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:415)),model/riscv_sys_regs.sail:415),Id_aux(Id("mimpid"),model/riscv_sys_regs.sail:415)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:416))]),model/riscv_sys_regs.sail:416),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:416))]),model/riscv_sys_regs.sail:416),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:416)),model/riscv_sys_regs.sail:416),Id_aux(Id("marchid"),model/riscv_sys_regs.sail:416)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:418))]),model/riscv_sys_regs.sail:418),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:418))]),model/riscv_sys_regs.sail:418),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:418)),model/riscv_sys_regs.sail:418),Id_aux(Id("mhartid"),model/riscv_sys_regs.sail:418)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Sstatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Sstatus"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Sstatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Sstatus"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Sstatus_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Sstatus_bits"),:1));(Id_aux(Id("_set_Sstatus_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(63),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_SD"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_SD"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SD"),:1),[(Id_aux(Id("_update_Sstatus_SD"),:1))]));(DEF_overload(Id_aux(Id("_mod_SD"),:1),[(Id_aux(Id("_get_Sstatus_SD"),:1));(Id_aux(Id("_set_Sstatus_SD"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(19),Unknown),Nexp_aux(Nexp_constant(19),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_MXR"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_MXR"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_MXR"),:1),[(Id_aux(Id("_update_Sstatus_MXR"),:1))]));(DEF_overload(Id_aux(Id("_mod_MXR"),:1),[(Id_aux(Id("_get_Sstatus_MXR"),:1));(Id_aux(Id("_set_Sstatus_MXR"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(18),Unknown),Nexp_aux(Nexp_constant(18),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_SUM"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_SUM"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(18),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(18),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SUM"),:1),[(Id_aux(Id("_update_Sstatus_SUM"),:1))]));(DEF_overload(Id_aux(Id("_mod_SUM"),:1),[(Id_aux(Id("_get_Sstatus_SUM"),:1));(Id_aux(Id("_set_Sstatus_SUM"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(16),Unknown),Nexp_aux(Nexp_constant(15),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_XS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_XS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(16),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_XS"),:1),[(Id_aux(Id("_update_Sstatus_XS"),:1))]));(DEF_overload(Id_aux(Id("_mod_XS"),:1),[(Id_aux(Id("_get_Sstatus_XS"),:1));(Id_aux(Id("_set_Sstatus_XS"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(14),Unknown),Nexp_aux(Nexp_constant(13),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_FS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_FS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(14),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(14),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(13),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_FS"),:1),[(Id_aux(Id("_update_Sstatus_FS"),:1))]));(DEF_overload(Id_aux(Id("_mod_FS"),:1),[(Id_aux(Id("_get_Sstatus_FS"),:1));(Id_aux(Id("_set_Sstatus_FS"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_SPP"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_SPP"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SPP"),:1),[(Id_aux(Id("_update_Sstatus_SPP"),:1))]));(DEF_overload(Id_aux(Id("_mod_SPP"),:1),[(Id_aux(Id("_get_Sstatus_SPP"),:1));(Id_aux(Id("_set_Sstatus_SPP"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_SPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_SPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SPIE"),:1),[(Id_aux(Id("_update_Sstatus_SPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_SPIE"),:1),[(Id_aux(Id("_get_Sstatus_SPIE"),:1));(Id_aux(Id("_set_Sstatus_SPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UPIE"),:1),[(Id_aux(Id("_update_Sstatus_UPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UPIE"),:1),[(Id_aux(Id("_get_Sstatus_UPIE"),:1));(Id_aux(Id("_set_Sstatus_UPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_SIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_SIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SIE"),:1),[(Id_aux(Id("_update_Sstatus_SIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_SIE"),:1),[(Id_aux(Id("_get_Sstatus_SIE"),:1));(Id_aux(Id("_set_Sstatus_SIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sstatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sstatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sstatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sstatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),Id_aux(Id("Sstatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UIE"),:1),[(Id_aux(Id("_update_Sstatus_UIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UIE"),:1),[(Id_aux(Id("_get_Sstatus_UIE"),:1));(Id_aux(Id("_set_Sstatus_UIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_sstatus_UXL"),model/riscv_sys_regs.sail:440),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440))],Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_sstatus_UXL"),model/riscv_sys_regs.sail:440),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:440)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:441)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Mstatus"),model/riscv_sys_regs.sail:441),[(E_aux(E_app(Id_aux(Id("_get_Sstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:441)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("get_mstatus_UXL"),model/riscv_sys_regs.sail:442),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:442)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:440)),model/riscv_sys_regs.sail:440))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_sstatus_UXL"),model/riscv_sys_regs.sail:445),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445));(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_sstatus_UXL"),model/riscv_sys_regs.sail:445),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:445)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("arch_xlen"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:445)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:445-449)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:446)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Mstatus"),model/riscv_sys_regs.sail:446),[(E_aux(E_app(Id_aux(Id("_get_Sstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:446)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:447)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)),E_aux(E_app(Id_aux(Id("set_mstatus_UXL"),model/riscv_sys_regs.sail:447),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:447)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),:1)),:1)));(E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:447)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("Mk_Sstatus"),model/riscv_sys_regs.sail:448),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_bits"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:448)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:162)),model/riscv_sys_regs.sail:162)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:445)),model/riscv_sys_regs.sail:445),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_mstatus"),model/riscv_sys_regs.sail:451),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_mstatus"),model/riscv_sys_regs.sail:451),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:451)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:452)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Sstatus"),model/riscv_sys_regs.sail:452),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_regs.sail:452),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:452)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sa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/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467));(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_sstatus"),model/riscv_sys_regs.sail:485),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_sstatus"),model/riscv_sys_regs.sail:485),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:485)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485))),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:485)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:485-487)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("lift_sstatus"),model/riscv_sys_regs.sail:486),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:486)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485)));(E_aux(E_app(Id_aux(Id("Mk_Sstatus"),model/riscv_sys_regs.sail:486),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:486)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:467)),model/riscv_sys_regs.sail:467)))]),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:485)),model/riscv_sys_regs.sail:485),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Sedeleg"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Sedeleg"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Sedeleg"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Sedeleg"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Sedeleg_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Sedeleg_bits"),:1));(Id_aux(Id("_set_Sedeleg_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_UEnvCall"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_UEnvCall"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UEnvCall"),:1),[(Id_aux(Id("_update_Sedeleg_UEnvCall"),:1))]));(DEF_overload(Id_aux(Id("_mod_UEnvCall"),:1),[(Id_aux(Id("_get_Sedeleg_UEnvCall"),:1));(Id_aux(Id("_set_Sedeleg_UEnvCall"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_SAMO_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_SAMO_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SAMO_Access_Fault"),:1),[(Id_aux(Id("_update_Sedeleg_SAMO_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_SAMO_Access_Fault"),:1),[(Id_aux(Id("_get_Sedeleg_SAMO_Access_Fault"),:1));(Id_aux(Id("_set_Sedeleg_SAMO_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(6),Unknown),Nexp_aux(Nexp_constant(6),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_SAMO_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_SAMO_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SAMO_Addr_Align"),:1),[(Id_aux(Id("_update_Sedeleg_SAMO_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_SAMO_Addr_Align"),:1),[(Id_aux(Id("_get_Sedeleg_SAMO_Addr_Align"),:1));(Id_aux(Id("_set_Sedeleg_SAMO_Addr_Align"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Load_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Load_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Load_Access_Fault"),:1),[(Id_aux(Id("_update_Sedeleg_Load_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Load_Access_Fault"),:1),[(Id_aux(Id("_get_Sedeleg_Load_Access_Fault"),:1));(Id_aux(Id("_set_Sedeleg_Load_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Load_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Load_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Load_Addr_Align"),:1),[(Id_aux(Id("_update_Sedeleg_Load_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_Load_Addr_Align"),:1),[(Id_aux(Id("_get_Sedeleg_Load_Addr_Align"),:1));(Id_aux(Id("_set_Sedeleg_Load_Addr_Align"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Breakpoint"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Breakpoint"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Breakpoint"),:1),[(Id_aux(Id("_update_Sedeleg_Breakpoint"),:1))]));(DEF_overload(Id_aux(Id("_mod_Breakpoint"),:1),[(Id_aux(Id("_get_Sedeleg_Breakpoint"),:1));(Id_aux(Id("_set_Sedeleg_Breakpoint"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Illegal_Instr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Illegal_Instr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Illegal_Instr"),:1),[(Id_aux(Id("_update_Sedeleg_Illegal_Instr"),:1))]));(DEF_overload(Id_aux(Id("_mod_Illegal_Instr"),:1),[(Id_aux(Id("_get_Sedeleg_Illegal_Instr"),:1));(Id_aux(Id("_set_Sedeleg_Illegal_Instr"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Fetch_Access_Fault"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Fetch_Access_Fault"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Fetch_Access_Fault"),:1),[(Id_aux(Id("_update_Sedeleg_Fetch_Access_Fault"),:1))]));(DEF_overload(Id_aux(Id("_mod_Fetch_Access_Fault"),:1),[(Id_aux(Id("_get_Sedeleg_Fetch_Access_Fault"),:1));(Id_aux(Id("_set_Sedeleg_Fetch_Access_Fault"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sedeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sedeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sedeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sedeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sedeleg_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sedeleg_Fetch_Addr_Align"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sedeleg_Fetch_Addr_Align"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sedeleg_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)),Id_aux(Id("Sedeleg_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Fetch_Addr_Align"),:1),[(Id_aux(Id("_update_Sedeleg_Fetch_Addr_Align"),:1))]));(DEF_overload(Id_aux(Id("_mod_Fetch_Addr_Align"),:1),[(Id_aux(Id("_get_Sedeleg_Fetch_Addr_Align"),:1));(Id_aux(Id("_set_Sedeleg_Fetch_Addr_Align"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:500))]),model/riscv_sys_regs.sail:500),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:500))]),model/riscv_sys_regs.sail:500),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:500)),model/riscv_sys_regs.sail:500),Id_aux(Id("sedeleg"),model/riscv_sys_regs.sail:500)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:500)),model/riscv_sys_regs.sail:500))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_sedeleg"),model/riscv_sys_regs.sail:502),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_sedeleg"),model/riscv_sys_regs.sail:502),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:502)),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502))),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:502)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:502-504)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("Mk_Sedeleg"),model/riscv_sys_regs.sail:503),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_regs.sail:503),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:503)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_sys_regs.sail:503)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_sys_regs.sail:503)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Sedeleg"),model/riscv_sys_regs.sail:502)),model/riscv_sys_regs.sail:502),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Sinterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Sinterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Sinterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Sinterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Sinterrupts_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Sinterrupts_bits"),:1));(Id_aux(Id("_set_Sinterrupts_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(9),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_SEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_SEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SEI"),:1),[(Id_aux(Id("_update_Sinterrupts_SEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_SEI"),:1),[(Id_aux(Id("_get_Sinterrupts_SEI"),:1));(Id_aux(Id("_set_Sinterrupts_SEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UEI"),:1),[(Id_aux(Id("_update_Sinterrupts_UEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UEI"),:1),[(Id_aux(Id("_get_Sinterrupts_UEI"),:1));(Id_aux(Id("_set_Sinterrupts_UEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_STI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_STI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_STI"),:1),[(Id_aux(Id("_update_Sinterrupts_STI"),:1))]));(DEF_overload(Id_aux(Id("_mod_STI"),:1),[(Id_aux(Id("_get_Sinterrupts_STI"),:1));(Id_aux(Id("_set_Sinterrupts_STI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UTI"),:1),[(Id_aux(Id("_update_Sinterrupts_UTI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UTI"),:1),[(Id_aux(Id("_get_Sinterrupts_UTI"),:1));(Id_aux(Id("_set_Sinterrupts_UTI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_SSI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_SSI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_SSI"),:1),[(Id_aux(Id("_update_Sinterrupts_SSI"),:1))]));(DEF_overload(Id_aux(Id("_mod_SSI"),:1),[(Id_aux(Id("_get_Sinterrupts_SSI"),:1));(Id_aux(Id("_set_Sinterrupts_SSI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Sinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Sinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Sinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Sinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Sinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Sinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Sinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Sinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),Id_aux(Id("Sinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_USI"),:1),[(Id_aux(Id("_update_Sinterrupts_USI"),:1))]));(DEF_overload(Id_aux(Id("_mod_USI"),:1),[(Id_aux(Id("_get_Sinterrupts_USI"),:1));(Id_aux(Id("_set_Sinterrupts_USI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_mip"),model/riscv_sys_regs.sail:518),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_mip"),model/riscv_sys_regs.sail:518),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:518)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:518)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))]),model/riscv_sys_regs.sail:518-528)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:519)),model/riscv_sys_regs.sail:519),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:519)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:519)),model/riscv_sys_regs.sail:519))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:519)),model/riscv_sys_regs.sail:519)),E_aux(E_app(Id_aux(Id("Mk_Sinterrupts"),model/riscv_sys_regs.sail:519),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_regs.sail:519),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:519)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:520)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:520)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:519)),model/riscv_sys_regs.sail:519)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:520)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:520)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:521)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:521)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:521)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:521)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:522)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:522)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:522)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:522)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:524)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:524)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:524)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:524)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:525)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:525)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:525)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:525)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:526)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:526)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:526)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:526)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:527)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:518)),model/riscv_sys_regs.sail:518),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_mie"),model/riscv_sys_regs.sail:531),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_mie"),model/riscv_sys_regs.sail:531),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:531)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:531)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))]),model/riscv_sys_regs.sail:531-540)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:532)),model/riscv_sys_regs.sail:532),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:532)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:532)),model/riscv_sys_regs.sail:532))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:532)),model/riscv_sys_regs.sail:532)),E_aux(E_app(Id_aux(Id("Mk_Sinterrupts"),model/riscv_sys_regs.sail:532),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_regs.sail:532),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_regs.sail:532)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:533)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:533)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:532)),model/riscv_sys_regs.sail:532)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:533)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:533)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:534)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:534)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:534)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:534)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:535)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:535)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:535)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:535)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:536)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:536)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:536)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:536)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:537)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:537)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:537)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:537)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:538)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:538)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:538)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:538)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:539)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lift_sip"),model/riscv_sys_regs.sail:543),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lift_sip"),model/riscv_sys_regs.sail:543),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:543)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:543)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:543)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))]),model/riscv_sys_regs.sail:543-551)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:544)),model/riscv_sys_regs.sail:544),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:544)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:544)),model/riscv_sys_regs.sail:544))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:544)),model/riscv_sys_regs.sail:544)),E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:544)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:545)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:545)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:544)),model/riscv_sys_regs.sail:544)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:545)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:545)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("haveNExt"),model/riscv_sys_regs.sail:546),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_regs.sail:546)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:103)),model/riscv_sys_regs.sail:103)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:547)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:548)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:549)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:550)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_sip"),model/riscv_sys_regs.sail:553),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_sip"),model/riscv_sys_regs.sail:553),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:553)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:553)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:553)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:553-555)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("lift_sip"),model/riscv_sys_regs.sail:554),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:554)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553)));(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:554)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553)));(E_aux(E_app(Id_aux(Id("Mk_Sinterrupts"),model/riscv_sys_regs.sail:554),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:554)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:543)),model/riscv_sys_regs.sail:543)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:553)),model/riscv_sys_regs.sail:553),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lift_sie"),model/riscv_sys_regs.sail:558),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lift_sie"),model/riscv_sys_regs.sail:558),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:558)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:558)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:558)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))]),model/riscv_sys_regs.sail:558-569)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:559)),model/riscv_sys_regs.sail:559),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:559)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:559)),model/riscv_sys_regs.sail:559))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:559)),model/riscv_sys_regs.sail:559)),E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:559)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:559)),model/riscv_sys_regs.sail:559)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:560)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:559)),model/riscv_sys_regs.sail:559))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:561)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:561)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_a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its"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:565)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:565)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:565)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:565)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:565)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:566)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:567)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)),E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:568)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_sie"),model/riscv_sys_regs.sail:571),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_sie"),model/riscv_sys_regs.sail:571),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:571)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),P_aux(P_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:571)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:571)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:571-573)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("lift_sie"),model/riscv_sys_regs.sail:572),[(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_regs.sail:572)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571)));(E_aux(E_id(Id_aux(Id("d"),model/riscv_sys_regs.sail:572)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571)));(E_aux(E_app(Id_aux(Id("Mk_Sinterrupts"),model/riscv_sys_regs.sail:572),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:572)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:558)),model/riscv_sys_regs.sail:558)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:571)),model/riscv_sys_regs.sail:571),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:575))]),model/riscv_sys_regs.sail:575),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:575))]),model/riscv_sys_regs.sail:575),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:575)),model/riscv_sys_regs.sail:575),Id_aux(Id("sideleg"),model/riscv_sys_regs.sail:575)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:575)),model/riscv_sys_regs.sail:575))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:578))]),model/riscv_sys_regs.sail:578),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:578))]),model/riscv_sys_regs.sail:578),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578),Id_aux(Id("stvec"),model/riscv_sys_regs.sail:578)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:579))]),model/riscv_sys_regs.sail:579),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:579))]),model/riscv_sys_regs.sail:579),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:579)),model/riscv_sys_regs.sail:579),Id_aux(Id("sscratch"),model/riscv_sys_regs.sail:579)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:580))]),model/riscv_sys_regs.sail:580),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:580))]),model/riscv_sys_regs.sail:580),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:580)),model/riscv_sys_regs.sail:580),Id_aux(Id("sepc"),model/riscv_sys_regs.sail:580)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:581))]),model/riscv_sys_regs.sail:581),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:581))]),model/riscv_sys_regs.sail:581),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:581)),model/riscv_sys_regs.sail:581),Id_aux(Id("scause"),model/riscv_sys_regs.sail:581)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_regs.sail:581)),model/riscv_sys_regs.sail:581))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:582))]),model/riscv_sys_regs.sail:582),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:582))]),model/riscv_sys_regs.sail:582),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:582)),model/riscv_sys_regs.sail:582),Id_aux(Id("stval"),model/riscv_sys_regs.sail:582)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Satp64"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Satp64"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Satp64"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Satp64"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp64_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp64_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp64_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp64_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp64_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp64_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Satp64_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Satp64_bits"),:1));(Id_aux(Id("_set_Satp64_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp64_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp64_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(60),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(60),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(60),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp64_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp64_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(60),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(60),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp64_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp64_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(60),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(60),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Mode"),:1),[(Id_aux(Id("_update_Satp64_Mode"),:1))]));(DEF_overload(Id_aux(Id("_mod_Mode"),:1),[(Id_aux(Id("_get_Satp64_Mode"),:1));(Id_aux(Id("_set_Satp64_Mode"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp64_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp64_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(59),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(59),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(44),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(59),Unknown),Nexp_aux(Nexp_constant(44),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp64_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp64_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(59),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(59),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(44),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(15),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp64_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp64_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(59),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(59),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(44),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(15),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Asid"),:1),[(Id_aux(Id("_update_Satp64_Asid"),:1))]));(DEF_overload(Id_aux(Id("_mod_Asid"),:1),[(Id_aux(Id("_get_Satp64_Asid"),:1));(Id_aux(Id("_set_Satp64_Asid"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp64_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp64_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(43),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp64_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp64_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp64_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp64_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp64_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp64_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),Id_aux(Id("Satp64_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPN"),:1),[(Id_aux(Id("_update_Satp64_PPN"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPN"),:1),[(Id_aux(Id("_get_Satp64_PPN"),:1));(Id_aux(Id("_set_Satp64_PPN"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_satp64"),model/riscv_sys_regs.sail:595),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595))],Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_satp64"),model/riscv_sys_regs.sail:595),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:595)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:595)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:595),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595))]),model/riscv_sys_regs.sail:595),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:595)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:595-602)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:596)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Satp64"),model/riscv_sys_regs.sail:596),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:596)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("satp64Mode_of_bits"),model/riscv_sys_regs.sail:597),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:597)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595)));(E_aux(E_app(Id_aux(Id("_get_Satp64_Mode"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:597)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_sys_regs.sail:598),[(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_regs.sail:598)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:598)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_sys_regs.sail:599),[(P_aux(P_id(Id_aux(Id("Sv32"),model/riscv_sys_regs.sail:599)),Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),E_aux(E_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:599)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_sys_regs.sail:600),[(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),E_aux(E_app(Id_aux(Id("_get_Satp64_bits"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_sys_regs.sail:600)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:595)),model/riscv_sys_regs.sail:595));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Satp32"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Satp32"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Satp32"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Satp32"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp32_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp32_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp32_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp32_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp32_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp32_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Satp32_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Satp32_bits"),:1));(Id_aux(Id("_set_Satp32_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp32_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp32_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(31),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp32_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp32_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp32_Mode"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp32_Mode"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Mode"),:1),[(Id_aux(Id("_update_Satp32_Mode"),:1))]));(DEF_overload(Id_aux(Id("_mod_Mode"),:1),[(Id_aux(Id("_get_Satp32_Mode"),:1));(Id_aux(Id("_set_Satp32_Mode"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp32_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp32_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(30),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(30),Unknown),Nexp_aux(Nexp_constant(22),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp32_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp32_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(30),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp32_Asid"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp32_Asid"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(30),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(30),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(22),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Asid"),:1),[(Id_aux(Id("_update_Satp32_Asid"),:1))]));(DEF_overload(Id_aux(Id("_mod_Asid"),:1),[(Id_aux(Id("_get_Satp32_Asid"),:1));(Id_aux(Id("_set_Satp32_Asid"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Satp32_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Satp32_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Satp32_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Satp32_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Satp32_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Satp32_PPN"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Satp32_PPN"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Satp32_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),Id_aux(Id("Satp32_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPN"),:1),[(Id_aux(Id("_update_Satp32_PPN"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPN"),:1),[(Id_aux(Id("_get_Satp32_PPN"),:1));(Id_aux(Id("_set_Satp32_PPN"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_satp32"),model/riscv_sys_regs.sail:610),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610))],Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_satp32"),model/riscv_sys_regs.sail:610),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610),P_aux(P_id(Id_aux(Id("a"),model/riscv_sys_regs.sail:610)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610),P_aux(P_id(Id_aux(Id("o"),model/riscv_sys_regs.sail:610)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_sys_regs.sail:610),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610))]),model/riscv_sys_regs.sail:610),P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:610)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_regs.sail:610-613)),E_aux(E_block([(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_regs.sail:612)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_sys_regs.sail:610)),model/riscv_sys_regs.sail:610));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_sys_regs.sail:610)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:616))]),model/riscv_sys_regs.sail:616),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_sys_regs.sail:616))]),model/riscv_sys_regs.sail:616),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_regs.sail:616)),model/riscv_sys_regs.sail:616),Id_aux(Id("tselect"),model/riscv_sys_regs.sail:616)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("PmpAddrMatchType_of_num"),model/riscv_pmp_regs.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("PmpAddrMatchType_of_num"),model/riscv_pmp_regs.sail:3),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("TOR"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("NA4"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("NAPOT"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("num_of_PmpAddrMatchType"),model/riscv_pmp_regs.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("num_of_PmpAddrMatchType"),model/riscv_pmp_regs.sail:3),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("OFF"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),E_aux(E_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TOR"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),E_aux(E_lit(L_aux(L_num(1),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("NA4"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),E_aux(E_lit(L_aux(L_num(2),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("NAPOT"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)),E_aux(E_lit(L_aux(L_num(3),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))],Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),Unknown)),Unknown),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_PmpAddrMatchType"),model/riscv_pmp_regs.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_PmpAddrMatchType"),model/riscv_pmp_regs.sail:3),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)));(E_aux(E_id(Id_aux(Id("TOR"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)));(E_aux(E_id(Id_aux(Id("NA4"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)));(E_aux(E_id(Id_aux(Id("NAPOT"),model/riscv_pmp_regs.sail:3)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpAddrMatchType_of_bits"),model/riscv_pmp_regs.sail:5),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5),Effect_aux(Effect_set([]),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpAddrMatchType_of_bits"),model/riscv_pmp_regs.sail:6),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bs"),model/riscv_pmp_regs.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("bs"),model/riscv_pmp_regs.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("00"),model/riscv_pmp_regs.sail:8)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_regs.sail:8)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("01"),model/riscv_pmp_regs.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("TOR"),model/riscv_pmp_regs.sail:9)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("10"),model/riscv_pmp_regs.sail:10)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("NA4"),model/riscv_pmp_regs.sail:10)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_bin("11"),model/riscv_pmp_regs.sail:11)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("NAPOT"),model/riscv_pmp_regs.sail:11)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5)))]),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5),Effect_aux(Effect_set([]),model/riscv_pmp_regs.sail:5)),model/riscv_pmp_regs.sail:5)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_regs.sail:15),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_regs.sail:16),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bs"),model/riscv_pmp_regs.sail:16)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("bs"),model/riscv_pmp_regs.sail:17)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("OFF"),model/riscv_pmp_regs.sail:18)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),E_aux(E_lit(L_aux(L_bin("00"),model/riscv_pmp_regs.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("TOR"),model/riscv_pmp_regs.sail:19)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),E_aux(E_lit(L_aux(L_bin("01"),model/riscv_pmp_regs.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("NA4"),model/riscv_pmp_regs.sail:20)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),E_aux(E_lit(L_aux(L_bin("10"),model/riscv_pmp_regs.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("NAPOT"),model/riscv_pmp_regs.sail:21)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)),E_aux(E_lit(L_aux(L_bin("11"),model/riscv_pmp_regs.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_pmp_regs.sail:15)),model/riscv_pmp_regs.sail:15)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Pmpcfg_ent"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Pmpcfg_ent"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Pmpcfg_ent"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Pmpcfg_ent"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1));(Id_aux(Id("_set_Pmpcfg_ent_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_L"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_L"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_L"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_L"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_L"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_L"),:1))]));(DEF_overload(Id_aux(Id("_mod_L"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_L"),:1));(Id_aux(Id("_set_Pmpcfg_ent_L"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_A"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_A"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_A"),:1))]));(DEF_overload(Id_aux(Id("_mod_A"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_A"),:1));(Id_aux(Id("_set_Pmpcfg_ent_A"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_X"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_X"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_X"),:1))]));(DEF_overload(Id_aux(Id("_mod_X"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_X"),:1));(Id_aux(Id("_set_Pmpcfg_ent_X"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_W"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_W"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_W"),:1))]));(DEF_overload(Id_aux(Id("_mod_W"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_W"),:1));(Id_aux(Id("_set_Pmpcfg_ent_W"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Pmpcfg_ent_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Pmpcfg_ent_R"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Pmpcfg_ent_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Pmpcfg_ent_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Pmpcfg_ent_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Pmpcfg_ent_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Pmpcfg_ent_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),Id_aux(Id("Pmpcfg_ent_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_R"),:1),[(Id_aux(Id("_update_Pmpcfg_ent_R"),:1))]));(DEF_overload(Id_aux(Id("_mod_R"),:1),[(Id_aux(Id("_get_Pmpcfg_ent_R"),:1));(Id_aux(Id("_set_Pmpcfg_ent_R"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:35))]),model/riscv_pmp_regs.sail:35),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:35))]),model/riscv_pmp_regs.sail:35),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35),Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:35)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:36))]),model/riscv_pmp_regs.sail:36),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:36))]),model/riscv_pmp_regs.sail:36),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36),Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:36)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:37))]),model/riscv_pmp_regs.sail:37),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:37))]),model/riscv_pmp_regs.sail:37),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37),Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:37)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:38))]),model/riscv_pmp_regs.sail:38),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:38))]),model/riscv_pmp_regs.sail:38),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:38)),model/riscv_pmp_regs.sail:38),Id_aux(Id("pmp3cfg"),model/riscv_pmp_regs.sail:38)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:38)),model/riscv_pmp_regs.sail:38))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:39))]),model/riscv_pmp_regs.sail:39),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:39))]),model/riscv_pmp_regs.sail:39),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:39)),model/riscv_pmp_regs.sail:39),Id_aux(Id("pmp4cfg"),model/riscv_pmp_regs.sail:39)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:39)),model/riscv_pmp_regs.sail:39))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:40))]),model/riscv_pmp_regs.sail:40),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:40))]),model/riscv_pmp_regs.sail:40),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:40)),model/riscv_pmp_regs.sail:40),Id_aux(Id("pmp5cfg"),model/riscv_pmp_regs.sail:40)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:40)),model/riscv_pmp_regs.sail:40))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:41))]),model/riscv_pmp_regs.sail:41),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:41))]),model/riscv_pmp_regs.sail:41),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:41)),model/riscv_pmp_regs.sail:41),Id_aux(Id("pmp6cfg"),model/riscv_pmp_regs.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:41)),model/riscv_pmp_regs.sail:41))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:42))]),model/riscv_pmp_regs.sail:42),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:42))]),model/riscv_pmp_regs.sail:42),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:42)),model/riscv_pmp_regs.sail:42),Id_aux(Id("pmp7cfg"),model/riscv_pmp_regs.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:42)),model/riscv_pmp_regs.sail:42))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:43))]),model/riscv_pmp_regs.sail:43),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:43))]),model/riscv_pmp_regs.sail:43),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:43)),model/riscv_pmp_regs.sail:43),Id_aux(Id("pmp8cfg"),model/riscv_pmp_regs.sail:43)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:43)),model/riscv_pmp_regs.sail:43))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:44))]),model/riscv_pmp_regs.sail:44),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:44))]),model/riscv_pmp_regs.sail:44),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:44)),model/riscv_pmp_regs.sail:44),Id_aux(Id("pmp9cfg"),model/riscv_pmp_regs.sail:44)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:44)),model/riscv_pmp_regs.sail:44))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:45))]),model/riscv_pmp_regs.sail:45),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:45))]),model/riscv_pmp_regs.sail:45),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:45)),model/riscv_pmp_regs.sail:45),Id_aux(Id("pmp10cfg"),model/riscv_pmp_regs.sail:45)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:45)),model/riscv_pmp_regs.sail:45))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:46))]),model/riscv_pmp_regs.sail:46),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:46))]),model/riscv_pmp_regs.sail:46),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:46)),model/riscv_pmp_regs.sail:46),Id_aux(Id("pmp11cfg"),model/riscv_pmp_regs.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:46)),model/riscv_pmp_regs.sail:46))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:47))]),model/riscv_pmp_regs.sail:47),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:47))]),model/riscv_pmp_regs.sail:47),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:47)),model/riscv_pmp_regs.sail:47),Id_aux(Id("pmp12cfg"),model/riscv_pmp_regs.sail:47)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:47)),model/riscv_pmp_regs.sail:47))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:48))]),model/riscv_pmp_regs.sail:48),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:48))]),model/riscv_pmp_regs.sail:48),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:48)),model/riscv_pmp_regs.sail:48),Id_aux(Id("pmp13cfg"),model/riscv_pmp_regs.sail:48)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:48)),model/riscv_pmp_regs.sail:48))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:49))]),model/riscv_pmp_regs.sail:49),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:49))]),model/riscv_pmp_regs.sail:49),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:49)),model/riscv_pmp_regs.sail:49),Id_aux(Id("pmp14cfg"),model/riscv_pmp_regs.sail:49)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:49)),model/riscv_pmp_regs.sail:49))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:50))]),model/riscv_pmp_regs.sail:50),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:50))]),model/riscv_pmp_regs.sail:50),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:50)),model/riscv_pmp_regs.sail:50),Id_aux(Id("pmp15cfg"),model/riscv_pmp_regs.sail:50)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:50)),model/riscv_pmp_regs.sail:50))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:54))]),model/riscv_pmp_regs.sail:54),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:54))]),model/riscv_pmp_regs.sail:54),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:54)),model/riscv_pmp_regs.sail:54),Id_aux(Id("pmpaddr0"),model/riscv_pmp_regs.sail:54)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:55))]),model/riscv_pmp_regs.sail:55),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:55))]),model/riscv_pmp_regs.sail:55),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:55)),model/riscv_pmp_regs.sail:55),Id_aux(Id("pmpaddr1"),model/riscv_pmp_regs.sail:55)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:56))]),model/riscv_pmp_regs.sail:56),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:56))]),model/riscv_pmp_regs.sail:56),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:56)),model/riscv_pmp_regs.sail:56),Id_aux(Id("pmpaddr2"),model/riscv_pmp_regs.sail:56)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:57))]),model/riscv_pmp_regs.sail:57),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:57))]),model/riscv_pmp_regs.sail:57),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:57)),model/riscv_pmp_regs.sail:57),Id_aux(Id("pmpaddr3"),model/riscv_pmp_regs.sail:57)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:58))]),model/riscv_pmp_regs.sail:58),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:58))]),model/riscv_pmp_regs.sail:58),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:58)),model/riscv_pmp_regs.sail:58),Id_aux(Id("pmpaddr4"),model/riscv_pmp_regs.sail:58)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:59))]),model/riscv_pmp_regs.sail:59),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:59))]),model/riscv_pmp_regs.sail:59),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:59)),model/riscv_pmp_regs.sail:59),Id_aux(Id("pmpaddr5"),model/riscv_pmp_regs.sail:59)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:60))]),model/riscv_pmp_regs.sail:60),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:60))]),model/riscv_pmp_regs.sail:60),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:60)),model/riscv_pmp_regs.sail:60),Id_aux(Id("pmpaddr6"),model/riscv_pmp_regs.sail:60)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:61))]),model/riscv_pmp_regs.sail:61),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:61))]),model/riscv_pmp_regs.sail:61),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:61)),model/riscv_pmp_regs.sail:61),Id_aux(Id("pmpaddr7"),model/riscv_pmp_regs.sail:61)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:62))]),model/riscv_pmp_regs.sail:62),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:62))]),model/riscv_pmp_regs.sail:62),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:62)),model/riscv_pmp_regs.sail:62),Id_aux(Id("pmpaddr8"),model/riscv_pmp_regs.sail:62)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:63))]),model/riscv_pmp_regs.sail:63),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:63))]),model/riscv_pmp_regs.sail:63),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:63)),model/riscv_pmp_regs.sail:63),Id_aux(Id("pmpaddr9"),model/riscv_pmp_regs.sail:63)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:64))]),model/riscv_pmp_regs.sail:64),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:64))]),model/riscv_pmp_regs.sail:64),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:64)),model/riscv_pmp_regs.sail:64),Id_aux(Id("pmpaddr10"),model/riscv_pmp_regs.sail:64)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:65))]),model/riscv_pmp_regs.sail:65),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:65))]),model/riscv_pmp_regs.sail:65),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:65)),model/riscv_pmp_regs.sail:65),Id_aux(Id("pmpaddr11"),model/riscv_pmp_regs.sail:65)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:66))]),model/riscv_pmp_regs.sail:66),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:66))]),model/riscv_pmp_regs.sail:66),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:66)),model/riscv_pmp_regs.sail:66),Id_aux(Id("pmpaddr12"),model/riscv_pmp_regs.sail:66)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:67))]),model/riscv_pmp_regs.sail:67),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:67))]),model/riscv_pmp_regs.sail:67),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:67)),model/riscv_pmp_regs.sail:67),Id_aux(Id("pmpaddr13"),model/riscv_pmp_regs.sail:67)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:68))]),model/riscv_pmp_regs.sail:68),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:68))]),model/riscv_pmp_regs.sail:68),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:68)),model/riscv_pmp_regs.sail:68),Id_aux(Id("pmpaddr14"),model/riscv_pmp_regs.sail:68)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:69))]),model/riscv_pmp_regs.sail:69),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:69))]),model/riscv_pmp_regs.sail:69),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:69)),model/riscv_pmp_regs.sail:69),Id_aux(Id("pmpaddr15"),model/riscv_pmp_regs.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpReadCfgReg"),model/riscv_pmp_regs.sail:73),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_pmp_regs.sail:73),Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_pmp_regs.sail:73),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73),Nexp_aux(Nexp_constant(4),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73))]),model/riscv_pmp_regs.sail:73),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_pmp_regs.sail:73),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73))]),model/riscv_pmp_regs.sail:73))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:73))]),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpReadCfgReg"),model/riscv_pmp_regs.sail:74),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("n"),model/riscv_pmp_regs.sail:74)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_pmp_regs.sail:75)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_case(E_aux(E_id(Id_aux(Id("n"),model/riscv_pmp_regs.sail:76)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:73)),model/riscv_pmp_regs.sail:73)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:77)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp3cfg"),model/riscv_pmp_regs.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:38)),model/riscv_pmp_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_constant(8),:1)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_constant(8),:1)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_constant(8),:1)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),model/riscv_pmp_regs.sail:78)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp7cfg"),model/riscv_pmp_regs.sail:78)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:42)),model/riscv_pmp_regs.sail:42)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp6cfg"),model/riscv_pmp_regs.sail:78)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:41)),model/riscv_pmp_regs.sail:41)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("bitvector_concat"),../sail/lib/vector_dec.sail:88),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp5cfg"),model/riscv_pmp_regs.sail:78)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:40)),model/riscv_pmp_regs.sail:40)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_bits"),:1),[(E_aux(E_id(Id_aux(Id("pmp4cfg"),model/riscv_pmp_regs.sail:78)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:39)),model/riscv_pmp_regs.sail:39)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_constant(8),:1)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(8),:1),Nexp_aux(Nexp_constant(8),:1)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_d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mpWriteCfg"),model/riscv_pmp_regs.sail:89),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_pmp_regs.sail:89),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))]),model/riscv_pmp_regs.sail:89))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:89),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89),P_aux(P_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:89)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_pmp_regs.sail:89),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))]),model/riscv_pmp_regs.sail:89),P_aux(P_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:89)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_regs.sail:89-90)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_L"),:1),[(E_aux(E_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:90)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_regs.sail:90)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:90)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("Mk_Pmpcfg_ent"),model/riscv_pmp_regs.sail:90),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:90)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pmp_regs.sail:89)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpWriteCfgReg"),model/riscv_pmp_regs.sail:92),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_pmp_regs.sail:92),Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_pmp_regs.sail:92),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92),Nexp_aux(Nexp_constant(4),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))]),model/riscv_pmp_regs.sail:92),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_pmp_regs.sail:92),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))]),model/riscv_pmp_regs.sail:92));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:92));(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:92))]),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpWriteCfgReg"),model/riscv_pmp_regs.sail:93),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("n"),model/riscv_pmp_regs.sail:93)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:93)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_regs.sail:93-138)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_pmp_regs.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_case(E_aux(E_id(Id_aux(Id("n"),model/riscv_pmp_regs.sail:95)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:96),[(E_aux(E_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(7),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:96)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:97)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:97),[(E_aux(E_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:97)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:97)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(15),model/riscv_pmp_regs.sail:97)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_pmp_regs.sail:97)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:98)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:98),[(E_aux(E_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:98)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(23),model/riscv_pmp_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),model/riscv_pmp_regs.sail:98)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(23),Unknown),Nexp_aux(Nexp_constant(16),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp3cfg"),model/riscv_pmp_regs.sail:99)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:99),[(E_aux(E_id(Id_aux(Id("pmp3cfg"),model/riscv_pmp_regs.sail:99)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:38)),model/riscv_pmp_regs.sail:38)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(31),model/riscv_pmp_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),model/riscv_pmp_regs.sail:99)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(24),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(1),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp4cfg"),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:101),[(E_aux(E_id(Id_aux(Id("pmp4cfg"),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:39)),model/riscv_pmp_regs.sail:39)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(7),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:101)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp5cfg"),model/riscv_pmp_regs.sail:102)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:102),[(E_aux(E_id(Id_aux(Id("pmp5cfg"),model/riscv_pmp_regs.sail:102)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:40)),model/riscv_pmp_regs.sail:40)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(15),model/riscv_pmp_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_pmp_regs.sail:102)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp6cfg"),model/riscv_pmp_regs.sail:103)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:103),[(E_aux(E_id(Id_aux(Id("pmp6cfg"),model/riscv_pmp_regs.sail:103)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:41)),model/riscv_pmp_regs.sail:41)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(23),model/riscv_pmp_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),model/riscv_pmp_regs.sail:103)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(23),Unknown),Nexp_aux(Nexp_constant(16),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp7cfg"),model/riscv_pmp_regs.sail:104)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:104),[(E_aux(E_id(Id_aux(Id("pmp7cfg"),model/riscv_pmp_regs.sail:104)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:42)),model/riscv_pmp_regs.sail:42)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(31),model/riscv_pmp_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),model/riscv_pmp_regs.sail:104)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(24),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(2),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp8cfg8"),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:106),[(E_aux(E_id(Id_aux(Id("pmp8cfg"),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:43)),model/riscv_pmp_regs.sail:43)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(7),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:106)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp9cfg9"),model/riscv_pmp_regs.sail:107)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:107),[(E_aux(E_id(Id_aux(Id("pmp9cfg"),model/riscv_pmp_regs.sail:107)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:44)),model/riscv_pmp_regs.sail:44)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:107)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(15),model/riscv_pmp_regs.sail:107)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_pmp_regs.sail:107)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp10cfg"),model/riscv_pmp_regs.sail:108)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:108),[(E_aux(E_id(Id_aux(Id("pmp10cfg"),model/riscv_pmp_regs.sail:108)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:45)),model/riscv_pmp_regs.sail:45)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:108)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(23),model/riscv_pmp_regs.sail:108)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),model/riscv_pmp_regs.sail:108)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(23),Unknown),Nexp_aux(Nexp_constant(16),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp11cfg"),model/riscv_pmp_regs.sail:109)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.s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m_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(64),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_case(E_aux(E_id(Id_aux(Id("n"),model/riscv_pmp_regs.sail:118)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:119),[(E_aux(E_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(7),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_pmp_regs.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:120)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:120),[(E_aux(E_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_regs.sail:120)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:120)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(15),model/riscv_pmp_regs.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(15),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_pmp_regs.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(15),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:121)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:121),[(E_aux(E_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_regs.sail:121)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:121)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/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constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(23),model/riscv_pmp_regs.sail:130)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(23),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(16),model/riscv_pmp_regs.sail:130)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(23),Unknown),Nexp_aux(Nexp_constant(16),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp11cfg"),model/riscv_pmp_regs.sail:131)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:131),[(E_aux(E_id(Id_aux(Id("pmp11cfg"),model/riscv_pmp_regs.sail:131)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:46)),model/riscv_pmp_regs.sail:46)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:131)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(31),model/riscv_pmp_regs.sail:131)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(24),model/riscv_pmp_regs.sail:131)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(24),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(24),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp12cfg"),model/riscv_pmp_regs.sail:132)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:132),[(E_aux(E_id(Id_aux(Id("pmp12cfg"),model/riscv_pmp_regs.sail:132)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:47)),model/riscv_pmp_regs.sail:47)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:132)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(39),model/riscv_pmp_regs.sail:132)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_pmp_regs.sail:132)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(39),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp13cfg"),model/riscv_pmp_regs.sail:133)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:133),[(E_aux(E_id(Id_aux(Id("pmp13cfg"),model/riscv_pmp_regs.sail:133)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:48)),model/riscv_pmp_regs.sail:48)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:133)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(47),model/riscv_pmp_regs.sail:133)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(40),model/riscv_pmp_regs.sail:133)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(40),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(40),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp14cfg"),model/riscv_pmp_regs.sail:134)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:134),[(E_aux(E_id(Id_aux(Id("pmp14cfg"),model/riscv_pmp_regs.sail:134)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:49)),model/riscv_pmp_regs.sail:49)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:134)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(55),model/riscv_pmp_regs.sail:134)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(48),model/riscv_pmp_regs.sail:134)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(48),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp15cfg"),model/riscv_pmp_regs.sail:135)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89)),E_aux(E_app(Id_aux(Id("pmpWriteCfg"),model/riscv_pmp_regs.sail:135),[(E_aux(E_id(Id_aux(Id("pmp15cfg"),model/riscv_pmp_regs.sail:135)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:50)),model/riscv_pmp_regs.sail:50)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:135)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(63),model/riscv_pmp_regs.sail:135)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(56),model/riscv_pmp_regs.sail:135)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(56),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:89)),model/riscv_pmp_regs.sail:89))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))),None))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),E_aux(E_lit(L_aux(L_unit,model/riscv_pmp_regs.sail:137)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:92));(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:92))]),model/riscv_pmp_regs.sail:92)),model/riscv_pmp_regs.sail:92)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpWriteAddr"),model/riscv_pmp_regs.sail:140),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpWriteAddr"),model/riscv_pmp_regs.sail:140),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140),P_aux(P_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:140)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140),P_aux(P_id(Id_aux(Id("reg"),model/riscv_pmp_regs.sail:140)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140),P_aux(P_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:140)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_regs.sail:140-143)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_pmp_regs.sail:141)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_L"),:1),[(E_aux(E_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:142)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_id(Id_aux(Id("reg"),model/riscv_pmp_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:142)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_L"),:1),[(E_aux(E_id(Id_aux(Id("cfg"),model/riscv_pmp_regs.sail:143)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:140)),model/riscv_pmp_regs.sail:140)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_regs.sail:143)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_id(Id_aux(Id("reg"),model/riscv_pmp_regs.sail:143)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_pmp_regs.sail:143),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_pmp_regs.sail:143)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,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x(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_control.sail:7)),model/riscv_pmp_control.sail:7))]),model/riscv_pmp_control.sail:7)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:7),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_control.sail:7)),model/riscv_pmp_control.sail:7))]),model/riscv_pmp_control.sail:7))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:9)),model/riscv_pmp_control.sail:9));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:7),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_control.sail:7)),model/riscv_pmp_control.sail:7))]),model/riscv_pmp_control.sail:7),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpCheckRWX"),model/riscv_pmp_control.sail:29),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29),Effect_aux(Effect_set([]),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpCheckRWX"),model/riscv_pmp_control.sail:30),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:30)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)));(P_aux(P_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:30)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:30-37)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:31)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Read"),model/riscv_pmp_control.sail:32),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_pmp_control.sail:32)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:101)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_R"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:32)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:32)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Write"),model/riscv_pmp_control.sail:33),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_pmp_control.sail:33)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:102)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_W"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:33)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:33)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("ReadWrite"),model/riscv_pmp_control.sail:34),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_pmp_control.sail:34)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:103)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)),E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_R"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:34)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:34)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)));(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_W"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:34)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:34)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Execute"),model/riscv_pmp_control.sail:35),[(P_aux(P_lit(L_aux(L_unit,model/riscv_pmp_control.sail:35)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29)),E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_X"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:35)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:35)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:29),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:29))]),model/riscv_pmp_control.sail:29))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29),Effect_aux(Effect_set([]),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpCheckPerms"),model/riscv_pmp_control.sail:40),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40),Effect_aux(Effect_set([]),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpCheckPerms"),model/riscv_pmp_control.sail:41),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)));(P_aux(P_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:41)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40)));(P_aux(P_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:41-48)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_pmp_control.sail:43)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Pmpcfg_ent_L"),:1),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:43)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_pmp_control.sail:43)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("pmpCheckRWX"),model/riscv_pmp_control.sail:44),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:44)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)));(E_aux(E_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:44)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29)),E_aux(E_lit(L_aux(L_true,model/riscv_pmp_control.sail:45)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)),E_aux(E_app(Id_aux(Id("pmpCheckRWX"),model/riscv_pmp_control.sail:46),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)));(E_aux(E_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:46)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:29)),model/riscv_pmp_control.sail:29))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:40),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:40))]),model/riscv_pmp_control.sail:40));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40),Effect_aux(Effect_set([]),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("pmpAddrMatch_of_num"),model/riscv_pmp_control.sail:52),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,Unknown),Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown));(QI_aux(QI_constraint(NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown),NC_aux(NC_bounded_le(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),Unknown)),Unknown)),Unknown))]),Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("pmpAddrMatch"),model/riscv_pmp_control.sail:52)),Unknown),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpAddrMatch_of_num"),model/riscv_pmp_control.sail:52),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_case(E_aux(E_id(Id_aux(Id("arg#"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'e"),Unknown)),Unknown)),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_num(0),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)),E_aux(E_id(Id_aux(Id("PMP_NoMatch"),model/riscv_pmp_control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_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:71-72),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("pmpMatchEntry"),model/riscv_pmp_control.sail:71),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71),P_aux(P_id(Id_aux(Id("addr"),model/riscv_pmp_control.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71),P_aux(P_id(Id_aux(Id("width"),model/riscv_pmp_control.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:71),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71))]),model/riscv_pmp_control.sail:71),P_aux(P_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:71)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:71),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:71))]),model/riscv_pmp_control.sail:71))),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:71),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:71))]),model/riscv_pmp_control.sail:71)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71),P_aux(P_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72),P_aux(P_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:72)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72))),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72),P_aux(P_id(Id_aux(Id("pmpaddr"),model/riscv_pmp_control.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72),P_aux(P_id(Id_aux(Id("prev_pmpaddr"),model/riscv_pmp_control.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/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ector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("width"),model/riscv_pmp_control.sail:74)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("rng"),model/riscv_pmp_control.sail:74)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:7),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pmp_control.sail:7)),model/riscv_pmp_control.sail:7))]),model/riscv_pmp_control.sail:7)))]),Typ_aux(Typ_id(Id_aux(Id("pmpAddrMatch"),model/riscv_pmp_control.sail:54)),model/riscv_pmp_control.sail:54)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_NoMatch"),model/riscv_pmp_control.sail:75)),Typ_aux(Typ_id(Id_aux(Id("pmpAddrMatch"),model/riscv_pmp_control.sail:54)),model/riscv_pmp_control.sail:54)),E_aux(E_id(Id_aux(Id("PMP_Continue"),model/riscv_pmp_control.sail:75)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:69)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_PartialMatch"),model/riscv_pmp_control.sail:76)),Typ_aux(Typ_id(Id_aux(Id("pmpAddrMatch"),model/riscv_pmp_control.sail:54)),model/riscv_pmp_control.sail:54)),E_aux(E_id(Id_aux(Id("PMP_Fail"),model/riscv_pmp_control.sail:76)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:69)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_Match"),model/riscv_pmp_control.sail:77)),Typ_aux(Typ_id(Id_aux(Id("pmpAddrMatch"),model/riscv_pmp_control.sail:54)),model/riscv_pmp_control.sail:54)),E_aux(E_if(E_aux(E_app(Id_aux(Id("pmpCheckPerms"),model/riscv_pmp_control.sail:77),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_pmp_control.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)));(E_aux(E_id(Id_aux(Id("acc"),model/riscv_pmp_control.sail:77)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:71),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:71))]),model/riscv_pmp_control.sail:71)));(E_aux(E_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:71)),model/riscv_pmp_control.sail:71)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:40)),model/riscv_pmp_control.sail:40)),E_aux(E_id(Id_aux(Id("PMP_Success"),model/riscv_pmp_control.sail:78)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:69)),Unknown)),E_aux(E_id(Id_aux(Id("PMP_Fail"),model/riscv_pmp_control.sail:79)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:69)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72))),None))]),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)))]),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72))),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)))]),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:71),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),mod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mp_control.sail:85))]),model/riscv_pmp_control.sail:85)));(E_aux(E_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:149)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85)));(E_aux(E_id(Id_aux(Id("pmp15cfg"),model/riscv_pmp_control.sail:149)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:50)),model/riscv_pmp_regs.sail:50)));(E_aux(E_id(Id_aux(Id("pmpaddr15"),model/riscv_pmp_control.sail:149)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("pmpaddr14"),model/riscv_pmp_control.sail:149)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_Success"),model/riscv_pmp_control.sail:150)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)),E_aux(E_lit(L_aux(L_true,model/riscv_pmp_control.sail:150)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_Fail"),model/riscv_pmp_control.sail:151)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)),E_aux(E_lit(L_aux(L_false,model/riscv_pmp_control.sail:151)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("PMP_Continue"),model/riscv_pmp_control.sail:152)),Typ_aux(Typ_id(Id_aux(Id("pmpMatch"),model/riscv_pmp_control.sail:72)),model/riscv_pmp_control.sail:72)),E_aux(E_case(E_aux(E_id(Id_aux(Id("priv"),model/riscv_pmp_control.sail:152)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_pmp_control.sail:153)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85)),E_aux(E_lit(L_aux(L_true,model/riscv_pmp_control.sail:153)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85)),E_aux(E_lit(L_aux(L_false,model/riscv_pmp_control.sail:154)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pmp_control.sail:88)),model/riscv_pmp_control.sail:88))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_id(Id_aux(Id("check"),m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,None))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_pmp_control.sail:85),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85))]),model/riscv_pmp_control.sail:85));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_pmp_control.sail:85),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_pmp_control.sail:85))]),model/riscv_pmp_control.sail:85));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_pmp_control.sail:85)),model/riscv_pmp_control.sail:85))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_pmp_control.sail:86),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86)),model/riscv_pmp_control.sail:86))]),model/riscv_pmp_control.sail:86),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_pmp"),model/riscv_pmp_control.sail:168),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_control.sail:168)),model/riscv_pmp_control.sail:168),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_pmp_regs.sail:35));(BE_aux(BE_wreg,model/riscv_pmp_regs.sail:35))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_control.sail:168)),model/riscv_pmp_control.sail:168)),model/riscv_pmp_control.sail:168),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_pmp"),model/riscv_pmp_control.sail:168),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_pmp_control.sail:168)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_control.sail:169)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp0cfg"),model/riscv_pmp_control.sail:169)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:35)),model/riscv_pmp_regs.sail:35)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:169),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:169)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_control.sail:170)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp1cfg"),model/riscv_pmp_control.sail:170)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:36)),model/riscv_pmp_regs.sail:36)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:170),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:170)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_control.sail:171)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp2cfg"),model/riscv_pmp_control.sail:171)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:37)),model/riscv_pmp_regs.sail:37)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:171),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:171)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp3cfg"),model/riscv_pmp_control.sail:172)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp3cfg"),model/riscv_pmp_control.sail:172)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:38)),model/riscv_pmp_regs.sail:38)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:172),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:172)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp4cfg"),model/riscv_pmp_control.sail:173)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp4cfg"),model/riscv_pmp_control.sail:173)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:39)),model/riscv_pmp_regs.sail:39)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:173),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:173)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp5cfg"),model/riscv_pmp_control.sail:174)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp5cfg"),model/riscv_pmp_control.sail:174)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:40)),model/riscv_pmp_regs.sail:40)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:174),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:174)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp6cfg"),model/riscv_pmp_control.sail:175)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp6cfg"),model/riscv_pmp_control.sail:175)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:41)),model/riscv_pmp_regs.sail:41)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:175),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:175)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp7cfg"),model/riscv_pmp_control.sail:176)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp7cfg"),model/riscv_pmp_control.sail:176)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:42)),model/riscv_pmp_regs.sail:42)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:176),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:176)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp8cfg"),model/riscv_pmp_control.sail:177)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp8cfg"),model/riscv_pmp_control.sail:177)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:43)),model/riscv_pmp_regs.sail:43)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:177),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:177)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp9cfg"),model/riscv_pmp_control.sail:178)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp9cfg"),model/riscv_pmp_control.sail:178)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:44)),model/riscv_pmp_regs.sail:44)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:178),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:178)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp10cfg"),model/riscv_pmp_control.sail:179)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp10cfg"),model/riscv_pmp_control.sail:179)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:45)),model/riscv_pmp_regs.sail:45)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:179),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:179)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp11cfg"),model/riscv_pmp_control.sail:180)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp11cfg"),model/riscv_pmp_control.sail:180)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:46)),model/riscv_pmp_regs.sail:46)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:180),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:180)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp12cfg"),model/riscv_pmp_control.sail:181)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp12cfg"),model/riscv_pmp_control.sail:181)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:47)),model/riscv_pmp_regs.sail:47)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:181),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:181)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp13cfg"),model/riscv_pmp_control.sail:182)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp13cfg"),model/riscv_pmp_control.sail:182)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:48)),model/riscv_pmp_regs.sail:48)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:182),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:182)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp14cfg"),model/riscv_pmp_control.sail:183)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp14cfg"),model/riscv_pmp_control.sail:183)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:49)),model/riscv_pmp_regs.sail:49)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:183),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:183)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("pmp15cfg"),model/riscv_pmp_control.sail:184)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Pmpcfg_ent_A"),:1),[(E_aux(E_id(Id_aux(Id("pmp15cfg"),model/riscv_pmp_control.sail:184)),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),model/riscv_pmp_regs.sail:50)),model/riscv_pmp_regs.sail:50)));(E_aux(E_app(Id_aux(Id("pmpAddrMatchType_to_bits"),model/riscv_pmp_control.sail:184),[(E_aux(E_id(Id_aux(Id("OFF"),model/riscv_pmp_control.sail:184)),Typ_aux(Typ_id(Id_aux(Id("PmpAddrMatchType"),model/riscv_pmp_regs.sail:3)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_pmp_regs.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Pmpcfg_ent"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_control.sail:168)),model/riscv_pmp_control.sail:168))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pmp_control.sail:168)),model/riscv_pmp_control.sail:168),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_init_regs"),model/riscv_ext_regs.sail:5),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_ext_regs.sail:5))]),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_init_regs"),model/riscv_ext_regs.sail:6),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_ext_regs.sail:6)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_unit,model/riscv_ext_regs.sail:6)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_ext_regs.sail:5))]),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_rvfi_init"),model/riscv_ext_regs.sail:13),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_ext_regs.sail:13))]),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_rvfi_init"),model/riscv_ext_regs.sail:14),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_ext_regs.sail:14)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_unit,model/riscv_ext_regs.sail:14)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_ext_regs.sail:13))]),model/riscv_ext_regs.sail:13)),model/riscv_ext_regs.sail:13)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_check_CSR"),model/riscv_ext_regs.sail:21),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_ext_regs.sail:21)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21),Effect_aux(Effect_set([]),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_check_CSR"),model/riscv_ext_regs.sail:22),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("csrno"),model/riscv_ext_regs.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_ext_regs.sail:21)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("p"),model/riscv_ext_regs.sail:22)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21)));(P_aux(P_id(Id_aux(Id("isWrite"),model/riscv_ext_regs.sail:22)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex2831#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_ext_regs.sail:21)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex2831#"),Unknown)),Unknown)),Unknown))]),Unknown))]),model/riscv_ext_regs.sail:22)),E_aux(E_lit(L_aux(L_true,model/riscv_ext_regs.sail:22)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_ext_regs.sail:21)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex2831#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21),Effect_aux(Effect_set([]),model/riscv_ext_regs.sail:21)),model/riscv_ext_regs.sail:21)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_check_CSR_fail"),model/riscv_ext_regs.sail:28),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28),Effect_aux(Effect_set([]),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_check_CSR_fail"),model/riscv_ext_regs.sail:29),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_ext_regs.sail:29)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_unit,model/riscv_ext_regs.sail:29)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28),Effect_aux(Effect_set([]),model/riscv_ext_regs.sail:28)),model/riscv_ext_regs.sail:28)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_addr_checks_common.sail:9),Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),model/riscv_addr_checks_common.sail:9)),model/riscv_addr_checks_common.sail:9))]),model/riscv_addr_checks_common.sail:9),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("typ_a"),model/riscv_addr_checks_common.sail:9)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks_common.sail:10)),model/riscv_addr_checks_common.sail:10),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:11)),model/riscv_addr_checks_common.sail:11),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:11)),model/riscv_addr_checks_common.sail:11))),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:11)),model/riscv_addr_checks_common.sail:11)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:11)),model/riscv_addr_checks_common.sail:11))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Ext_FetchAddr_OK"),model/riscv_addr_checks_common.sail:10),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("Ext_FetchAddr_Error"),model/riscv_addr_checks_common.sail:11),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:11)),model/riscv_addr_checks_common.sail:11)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:9)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_addr_checks_common.sail:14),Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),model/riscv_addr_checks_common.sail:14)),model/riscv_addr_checks_common.sail:14))]),model/riscv_addr_checks_common.sail:14),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("typ_a"),model/riscv_addr_checks_common.sail:14)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks_common.sail:15)),model/riscv_addr_checks_common.sail:15),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:16)),model/riscv_addr_checks_common.sail:16),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:16)),model/riscv_addr_checks_common.sail:16))),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:16)),model/riscv_addr_checks_common.sail:16)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:16)),model/riscv_addr_checks_common.sail:16))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Ext_ControlAddr_OK"),model/riscv_addr_checks_common.sail:15),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("Ext_ControlAddr_Error"),model/riscv_addr_checks_common.sail:16),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:16)),model/riscv_addr_checks_common.sail:16)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:14)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_addr_checks_common.sail:19),Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),model/riscv_addr_checks_common.sail:19)),model/riscv_addr_checks_common.sail:19))]),model/riscv_addr_checks_common.sail:19),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("typ_a"),model/riscv_addr_checks_common.sail:19)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks_common.sail:20)),model/riscv_addr_checks_common.sail:20),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:21)),model/riscv_addr_checks_common.sail:21),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:21)),model/riscv_addr_checks_common.sail:21))),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:21)),model/riscv_addr_checks_common.sail:21)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:21)),model/riscv_addr_checks_common.sail:21))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Ext_DataAddr_OK"),model/riscv_addr_checks_common.sail:20),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("Ext_DataAddr_Error"),model/riscv_addr_checks_common.sail:21),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:21)),model/riscv_addr_checks_common.sail:21)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_addr_checks_common.sail:19)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_fetch_check_pc"),model/riscv_addr_checks.sail:12),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12))],Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks.sail:12),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_fetch_addr_error"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12))]),model/riscv_addr_checks.sail:12),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks.sail:12),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_fetch_addr_error"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12))]),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_fetch_check_pc"),model/riscv_addr_checks.sail:12),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12),P_aux(P_id(Id_aux(Id("start_pc"),model/riscv_addr_checks.sail:12)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:12)),model/riscv_addr_checks.sail:12),P_aux(P_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:12)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_addr_checks.sail:12-13)),E_aux(E_app(Id_aux(Id("Ext_FetchAddr_OK"),model/riscv_addr_checks.sail:13),[(E_aux(E_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks_common.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("Ext_FetchAddr_Check"),model/riscv_addr_checks.sail:12),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:12))]),model/riscv_addr_checks.sail:12),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_handle_fetch_check_error"),model/riscv_addr_checks.sail:15),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ext_fetch_addr_error"),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_handle_fetch_check_error"),model/riscv_addr_checks.sail:15),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_fetch_addr_error"),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15),P_aux(P_id(Id_aux(Id("err"),model/riscv_addr_checks.sail:15)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3)),E_aux(E_lit(L_aux(L_unit,model/riscv_addr_checks.sail:16)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:15)),model/riscv_addr_checks.sail:15),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_control_check_addr"),model/riscv_addr_checks.sail:32),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:32),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32))]),model/riscv_addr_checks.sail:32),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:32),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32))]),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_control_check_addr"),model/riscv_addr_checks.sail:32),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:32)),model/riscv_addr_checks.sail:32),P_aux(P_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:32)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("Ext_ControlAddr_OK"),model/riscv_addr_checks.sail:33),[(E_aux(E_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:33)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:32),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:32))]),model/riscv_addr_checks.sail:32),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_control_check_pc"),model/riscv_addr_checks.sail:36),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:36),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36))]),model/riscv_addr_checks.sail:36),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:36),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36))]),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_control_check_pc"),model/riscv_addr_checks.sail:36),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:36)),model/riscv_addr_checks.sail:36),P_aux(P_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:36)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("Ext_ControlAddr_OK"),model/riscv_addr_checks.sail:37),[(E_aux(E_id(Id_aux(Id("pc"),model/riscv_addr_checks.sail:37)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks_common.sail:14),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("Ext_ControlAddr_Check"),model/riscv_addr_checks.sail:36),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:36))]),model/riscv_addr_checks.sail:36),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_handle_control_check_error"),model/riscv_addr_checks.sail:39),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_handle_control_check_error"),model/riscv_addr_checks.sail:39),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_control_addr_error"),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39),P_aux(P_id(Id_aux(Id("err"),model/riscv_addr_checks.sail:39)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:20))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:20)),E_aux(E_lit(L_aux(L_unit,model/riscv_addr_checks.sail:40)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:20)),model/riscv_addr_checks.sail:20))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:39)),model/riscv_addr_checks.sail:39),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_data_get_addr"),model/riscv_addr_checks.sail:49),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49));(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))],Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks.sail:50),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_data_addr_error"),model/riscv_addr_checks.sail:50)),model/riscv_addr_checks.sail:50)),model/riscv_addr_checks.sail:50))]),model/riscv_addr_checks.sail:50),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_regs.sail:45));(BE_aux(BE_rreg,model/riscv_regs.sail:45))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks.sail:50),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_data_addr_error"),model/riscv_addr_checks.sail:50)),model/riscv_addr_checks.sail:50)),model/riscv_addr_checks.sail:50))]),model/riscv_addr_checks.sail:50)),model/riscv_addr_checks.sail:49-50),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_data_get_addr"),model/riscv_addr_checks.sail:49),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49),P_aux(P_id(Id_aux(Id("base"),model/riscv_addr_checks.sail:49)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49),P_aux(P_id(Id_aux(Id("offset"),model/riscv_addr_checks.sail:49)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49),P_aux(P_id(Id_aux(Id("acc"),model/riscv_addr_checks.sail:49)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49))),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49),P_aux(P_id(Id_aux(Id("width"),model/riscv_addr_checks.sail:49)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49));(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49-52)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("addr"),model/riscv_addr_checks.sail:51)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("add_bits"),../sail/lib/vector_dec.sail:145),[(E_aux(E_app(Id_aux(Id("rX_bits"),model/riscv_regs.sail:148),[(E_aux(E_id(Id_aux(Id("base"),model/riscv_addr_checks.sail:51)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("offset"),model/riscv_addr_checks.sail:51)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_app(Id_aux(Id("Ext_DataAddr_OK"),model/riscv_addr_checks.sail:52),[(E_aux(E_id(Id_aux(Id("addr"),model/riscv_addr_checks.sail:52)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks_common.sail:19),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks.sail:50),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:50))]),model/riscv_addr_checks.sail:50))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_addr_checks.sail:49),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_addr_checks.sail:49))]),model/riscv_addr_checks.sail:49));(Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_addr_checks.sail:49)),model/riscv_addr_checks.sail:49))],Typ_aux(Typ_app(Id_aux(Id("Ext_DataAddr_Check"),model/riscv_addr_checks.sail:50),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:50))]),model/riscv_addr_checks.sail:50),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_handle_data_check_error"),model/riscv_addr_checks.sail:54),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ext_data_addr_error"),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_handle_data_check_error"),model/riscv_addr_checks.sail:54),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_data_addr_error"),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54),P_aux(P_id(Id_aux(Id("err"),model/riscv_addr_checks.sail:54)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:45))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:45)),E_aux(E_lit(L_aux(L_unit,model/riscv_addr_checks.sail:55)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:45)),model/riscv_addr_checks.sail:45))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:54)),model/riscv_addr_checks.sail:54),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_veto_disable_C"),model/riscv_misa_ext.sail:1),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_misa_ext.sail:1)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_false,model/riscv_misa_ext.sail:1)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:81))]),model/riscv_sys_regs.sail:81)),model/riscv_sys_regs.sail:81)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:7),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("000"),model/riscv_csr_map.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ustatus"),model/riscv_csr_map.sail:7)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:8),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("004"),model/riscv_csr_map.sail:8)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("uie"),model/riscv_csr_map.sail:8)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:9),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("005"),model/riscv_csr_map.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("utvec"),model/riscv_csr_map.sail:9)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:11),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("040"),model/riscv_csr_map.sail:11)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("uscratch"),model/riscv_csr_map.sail:11)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:12),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("041"),model/riscv_csr_map.sail:12)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("uepc"),model/riscv_csr_map.sail:12)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:13),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("042"),model/riscv_csr_map.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ucause"),model/riscv_csr_map.sail:13)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:14),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("043"),model/riscv_csr_map.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("utval"),model/riscv_csr_map.sail:14)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:15),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("044"),model/riscv_csr_map.sail:15)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("uip"),model/riscv_csr_map.sail:15)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:17),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("001"),model/riscv_csr_map.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("fflags"),model/riscv_csr_map.sail:17)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:18),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("002"),model/riscv_csr_map.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("frm"),model/riscv_csr_map.sail:18)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:19),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("003"),model/riscv_csr_map.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("fcsr"),model/riscv_csr_map.sail:19)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:21),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C00"),model/riscv_csr_map.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("cycle"),model/riscv_csr_map.sail:21)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:22),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C01"),model/riscv_csr_map.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("time"),model/riscv_csr_map.sail:22)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:23),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C02"),model/riscv_csr_map.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("instret"),model/riscv_csr_map.sail:23)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:24),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C80"),model/riscv_csr_map.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("cycleh"),model/riscv_csr_map.sail:24)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:25),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C81"),model/riscv_csr_map.sail:25)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("timeh"),model/riscv_csr_map.sail:25)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:26),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("C82"),model/riscv_csr_map.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("instreth"),model/riscv_csr_map.sail:26)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:29),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("100"),model/riscv_csr_map.sail:29)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sstatus"),model/riscv_csr_map.sail:29)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:30),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("102"),model/riscv_csr_map.sail:30)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sedeleg"),model/riscv_csr_map.sail:30)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:31),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("103"),model/riscv_csr_map.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sideleg"),model/riscv_csr_map.sail:31)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:32),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("104"),model/riscv_csr_map.sail:32)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sie"),model/riscv_csr_map.sail:32)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:33),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("105"),model/riscv_csr_map.sail:33)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("stvec"),model/riscv_csr_map.sail:33)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:34),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("106"),model/riscv_csr_map.sail:34)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("scounteren"),model/riscv_csr_map.sail:34)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:36),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("140"),model/riscv_csr_map.sail:36)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sscratch"),model/riscv_csr_map.sail:36)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:37),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("141"),model/riscv_csr_map.sail:37)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sepc"),model/riscv_csr_map.sail:37)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:38),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("142"),model/riscv_csr_map.sail:38)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("scause"),model/riscv_csr_map.sail:38)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:39),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("143"),model/riscv_csr_map.sail:39)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("stval"),model/riscv_csr_map.sail:39)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:40),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("144"),model/riscv_csr_map.sail:40)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sip"),model/riscv_csr_map.sail:40)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:42),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("180"),model/riscv_csr_map.sail:42)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("satp"),model/riscv_csr_map.sail:42)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:44),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("F11"),model/riscv_csr_map.sail:44)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mvendorid"),model/riscv_csr_map.sail:44)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:45),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("F12"),model/riscv_csr_map.sail:45)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("marchid"),model/riscv_csr_map.sail:45)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:46),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("F13"),model/riscv_csr_map.sail:46)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mimpid"),model/riscv_csr_map.sail:46)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:47),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("F14"),model/riscv_csr_map.sail:47)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mhartid"),model/riscv_csr_map.sail:47)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:49),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("300"),model/riscv_csr_map.sail:49)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mstatus"),model/riscv_csr_map.sail:49)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:50),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("301"),model/riscv_csr_map.sail:50)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("misa"),model/riscv_csr_map.sail:50)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:51),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("302"),model/riscv_csr_map.sail:51)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("medeleg"),model/riscv_csr_map.sail:51)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:52),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("303"),model/riscv_csr_map.sail:52)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mideleg"),model/riscv_csr_map.sail:52)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:53),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("304"),model/riscv_csr_map.sail:53)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mie"),model/riscv_csr_map.sail:53)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:54),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("305"),model/riscv_csr_map.sail:54)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mtvec"),model/riscv_csr_map.sail:54)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:55),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3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nknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mip"),model/riscv_csr_map.sail:61)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:63),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3A0"),model/riscv_csr_map.sail:63)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpcfg0"),model/riscv_csr_map.sail:63)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:64),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3A1"),model/riscv_csr_map.sail:64)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpcfg1"),model/riscv_csr_map.sail:64)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:65),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3A2"),model/riscv_csr_map.sail:65)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpcfg2"),model/riscv_csr_map.sail:65)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:66),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3A3"),model/riscv_csr_map.sail:66)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpcfg3"),model/riscv_csr_map.sail:66)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:67),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B0"),model/riscv_csr_map.sail:67)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr0"),model/riscv_csr_map.sail:67)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:68),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B1"),model/riscv_csr_map.sail:68)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr1"),model/riscv_csr_map.sail:68)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:69),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B2"),model/riscv_csr_map.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr2"),model/riscv_csr_map.sail:69)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:70),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B3"),model/riscv_csr_map.sail:70)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr3"),model/riscv_csr_map.sail:70)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:71),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B4"),model/riscv_csr_map.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr4"),model/riscv_csr_map.sail:71)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:72),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B5"),model/riscv_csr_map.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr5"),model/riscv_csr_map.sail:72)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:73),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B6"),model/riscv_csr_map.sail:73)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr6"),model/riscv_csr_map.sail:73)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:74),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B7"),model/riscv_csr_map.sail:74)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr7"),model/riscv_csr_map.sail:74)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:75),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B8"),model/riscv_csr_map.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr8"),model/riscv_csr_map.sail:75)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:76),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3B9"),model/riscv_csr_map.sail:76)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr9"),model/riscv_csr_map.sail:76)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:77),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BA"),model/riscv_csr_map.sail:77)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr10"),model/riscv_csr_map.sail:77)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:78),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BB"),model/riscv_csr_map.sail:78)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr11"),model/riscv_csr_map.sail:78)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:79),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BC"),model/riscv_csr_map.sail:79)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr12"),model/riscv_csr_map.sail:79)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:80),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BD"),model/riscv_csr_map.sail:80)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr13"),model/riscv_csr_map.sail:80)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:81),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BE"),model/riscv_csr_map.sail:81)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr14"),model/riscv_csr_map.sail:81)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:82),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("3BF"),model/riscv_csr_map.sail:82)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("pmpaddr15"),model/riscv_csr_map.sail:82)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:84),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("B00"),model/riscv_csr_map.sail:84)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mcycle"),model/riscv_csr_map.sail:84)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:85),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("B02"),model/riscv_csr_map.sail:85)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("minstret"),model/riscv_csr_map.sail:85)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:86),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("B80"),model/riscv_csr_map.sail:86)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mcycleh"),model/riscv_csr_map.sail:86)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:87),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("B82"),model/riscv_csr_map.sail:87)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("minstreth"),model/riscv_csr_map.sail:87)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:90),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("7a0"),model/riscv_csr_map.sail:90)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("tselect"),model/riscv_csr_map.sail:90)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:91),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("7a1"),model/riscv_csr_map.sail:91)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("tdata1"),model/riscv_csr_map.sail:91)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:92),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("7a2"),model/riscv_csr_map.sail:92)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("tdata2"),model/riscv_csr_map.sail:92)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("csr_name_map"),model/riscv_csr_map.sail:93),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_hex("7a3"),model/riscv_csr_map.sail:93)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("tdata3"),model/riscv_csr_map.sail:93)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("csr_name"),model/riscv_csr_map.sail:95),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:95)),model/riscv_csr_map.sail:95),Effect_aux(Effect_set([]),model/riscv_csr_map.sail:95)),model/riscv_csr_map.sail:95)),model/riscv_csr_map.sail:95))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("csr_name"),model/riscv_csr_map.sail:96),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("csr"),model/riscv_csr_map.sail:96)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("csr_name_map_forwards"),Unknown),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_csr_map.sail:96)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:3)),model/riscv_csr_map.sail:3))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_csr_map.sail:95)),model/riscv_csr_map.sail:95),Effect_aux(Effect_set([]),model/riscv_csr_map.sail:95)),model/riscv_csr_map.sail:95)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_csr_map.sail:97),[(Id_aux(Id("csr_name"),model/riscv_csr_map.sail:97))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_is_CSR_defined"),model/riscv_csr_map.sail:110),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_read_CSR"),model/riscv_csr_map.sail:114),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_write_CSR"),model/riscv_csr_map.sail:118),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:118),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:118))]),model/riscv_csr_map.sail:118),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:118));(BE_aux(BE_wreg,model/riscv_csr_map.sail:118))]),model/riscv_csr_map.sail:118)),model/riscv_csr_map.sail:118)),model/riscv_csr_map.sail:118))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Ustatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Ustatus"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Ustatus_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Ustatus"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Ustatus"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Ustatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Ustatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Ustatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Ustatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Ustatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Ustatus_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Ustatus_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Ustatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Ustatus_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Ustatus_bits"),:1));(Id_aux(Id("_set_Ustatus_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Ustatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Ustatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Ustatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Ustatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Ustatus_UPIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Ustatus_UPIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Ustatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UPIE"),:1),[(Id_aux(Id("_update_Ustatus_UPIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UPIE"),:1),[(Id_aux(Id("_get_Ustatus_UPIE"),:1));(Id_aux(Id("_set_Ustatus_UPIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Ustatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Ustatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Ustatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Ustatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Ustatus_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Ustatus_UIE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Ustatus_UIE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Ustatus_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),Id_aux(Id("Ustatus_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UIE"),:1),[(Id_aux(Id("_update_Ustatus_UIE"),:1))]));(DEF_overload(Id_aux(Id("_mod_UIE"),:1),[(Id_aux(Id("_get_Ustatus_UIE"),:1));(Id_aux(Id("_set_Ustatus_UIE"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_sstatus"),model/riscv_next_regs.sail:10),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_sstatus"),model/riscv_next_regs.sail:10),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:10)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:11)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Ustatus"),model/riscv_next_regs.sail:11),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_next_regs.sail:11),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_next_regs.sail:11)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Ustatus_UPIE"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sstatus_UPIE"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Ustatus_UIE"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Sstatus_UIE"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10))],Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lift_ustatus"),model/riscv_next_regs.sail:17),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17));(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lift_ustatus"),model/riscv_next_regs.sail:17),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:17)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17),P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:17)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17));(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))]),model/riscv_next_regs.sail:17-21)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:18)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sstatus_UPIE"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:18)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)));(E_aux(E_app(Id_aux(Id("_get_Ustatus_UPIE"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:18)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Sstatus_UIE"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Ustatus_UIE"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:20)),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17));(Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17))],Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_next_regs.sail:17)),model/riscv_next_regs.sail:17),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_ustatus"),model/riscv_next_regs.sail:23),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_ustatus"),model/riscv_next_regs.sail:23),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23),P_aux(P_id(Id_aux(Id("m"),model/riscv_next_regs.sail:23)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_r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_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_next_regs.sail:23)),model/riscv_next_regs.sail:23),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_Uinterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_Uinterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_Uinterrupts"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_Uinterrupts"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Uinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Uinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Uinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Uinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Uinterrupts_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Uinterrupts_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_Uinterrupts_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_Uinterrupts_bits"),:1));(Id_aux(Id("_set_Uinterrupts_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Uinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Uinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(8),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Uinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Uinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Uinterrupts_UEI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Uinterrupts_UEI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UEI"),:1),[(Id_aux(Id("_update_Uinterrupts_UEI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UEI"),:1),[(Id_aux(Id("_get_Uinterrupts_UEI"),:1));(Id_aux(Id("_set_Uinterrupts_UEI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Uinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Uinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Uinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Uinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Uinterrupts_UTI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Uinterrupts_UTI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_UTI"),:1),[(Id_aux(Id("_update_Uinterrupts_UTI"),:1))]));(DEF_overload(Id_aux(Id("_mod_UTI"),:1),[(Id_aux(Id("_get_Uinterrupts_UTI"),:1));(Id_aux(Id("_set_Uinterrupts_UTI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_Uinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_Uinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_Uinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_Uinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("Uinterrupts_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_Uinterrupts_USI"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_Uinterrupts_USI"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("Uinterrupts_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),Id_aux(Id("Uinterrupts_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_USI"),:1),[(Id_aux(Id("_update_Uinterrupts_USI"),:1))]));(DEF_overload(Id_aux(Id("_mod_USI"),:1),[(Id_aux(Id("_get_Uinterrupts_USI"),:1));(Id_aux(Id("_set_Uinterrupts_USI"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_sip"),model/riscv_next_regs.sail:38),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_sip"),model/riscv_next_regs.sail:38),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:38)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:38)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))]),model/riscv_next_regs.sail:38-44)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:39)),model/riscv_next_regs.sail:39),P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:39)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:39)),model/riscv_next_regs.sail:39))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:39)),model/riscv_next_regs.sail:39)),E_aux(E_app(Id_aux(Id("Mk_Uinterrupts"),model/riscv_next_regs.sail:39),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_next_regs.sail:39),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_next_regs.sail:39)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:40)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:40)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:39)),model/riscv_next_regs.sail:39)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:40)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:40)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:42)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:43)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:38)),model/riscv_next_regs.sail:38),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lower_sie"),model/riscv_next_regs.sail:47),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lower_sie"),model/riscv_next_regs.sail:47),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:47)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:47)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))]),model/riscv_next_regs.sail:47-53)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:48)),model/riscv_next_regs.sail:48),P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:48)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:48)),model/riscv_next_regs.sail:48))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:48)),model/riscv_next_regs.sail:48)),E_aux(E_app(Id_aux(Id("Mk_Uinterrupts"),model/riscv_next_regs.sail:48),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_next_regs.sail:48),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_next_regs.sail:48)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:49)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:49)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:48)),model/riscv_next_regs.sail:48)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:49)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:49)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:50)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:50)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:50)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:50)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:51)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("_update_Uinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:51)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:51)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:51)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:52)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47))],Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lift_uip"),model/riscv_next_regs.sail:56),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lift_uip"),model/riscv_next_regs.sail:56),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),P_aux(P_id(Id_aux(Id("o"),model/riscv_next_regs.sail:56)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:56)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:56)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))]),model/riscv_next_regs.sail:56-60)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:57)),model/riscv_next_regs.sail:57),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:57)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:57)),model/riscv_next_regs.sail:57))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:57)),model/riscv_next_regs.sail:57)),E_aux(E_id(Id_aux(Id("o"),model/riscv_next_regs.sail:57)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:57)),model/riscv_next_regs.sail:57)));(E_aux(E_app(Id_aux(Id("_get_Uinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:57)),model/riscv_next_regs.sail:57))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:59)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_uip"),model/riscv_next_regs.sail:62),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_uip"),model/riscv_next_regs.sail:62),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:62)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:62)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),P_aux(P_id(Id_aux(Id("v"),model/riscv_next_regs.sail:62)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_next_regs.sail:62-64)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("lift_uip"),model/riscv_next_regs.sail:63),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:63)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62)));(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:63)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62)));(E_aux(E_app(Id_aux(Id("Mk_Uinterrupts"),model/riscv_next_regs.sail:63),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_next_regs.sail:63)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:56)),model/riscv_next_regs.sail:56)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:62)),model/riscv_next_regs.sail:62),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lift_uie"),model/riscv_next_regs.sail:67),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lift_uie"),model/riscv_next_regs.sail:67),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),P_aux(P_id(Id_aux(Id("o"),model/riscv_next_regs.sail:67)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:67)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),P_aux(P_id(Id_aux(Id("u"),model/riscv_next_regs.sail:67)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))]),model/riscv_next_regs.sail:67-73)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:68)),model/riscv_next_regs.sail:68),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:68)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:68)),model/riscv_next_regs.sail:68))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:68)),model/riscv_next_regs.sail:68)),E_aux(E_id(Id_aux(Id("o"),model/riscv_next_regs.sail:68)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:68)),model/riscv_next_regs.sail:68)));(E_aux(E_app(Id_aux(Id("_get_Uinterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:69)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:68)),model/riscv_next_regs.sail:68))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Uinterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:70)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("_update_Sinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_get_Uinterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("u"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)),E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:71)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:72)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67));(Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_uie"),model/riscv_next_regs.sail:75),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_uie"),model/riscv_next_regs.sail:75),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),P_aux(P_id(Id_aux(Id("s"),model/riscv_next_regs.sail:75)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),P_aux(P_id(Id_aux(Id("d"),model/riscv_next_regs.sail:75)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75))),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),P_aux(P_id(Id_aux(Id("v"),model/riscv_next_regs.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_next_regs.sail:75-77)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("lift_uie"),model/riscv_next_regs.sail:76),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_next_regs.sail:76)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75)));(E_aux(E_id(Id_aux(Id("d"),model/riscv_next_regs.sail:76)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75)));(E_aux(E_app(Id_aux(Id("Mk_Uinterrupts"),model/riscv_next_regs.sail:76),[(E_aux(E_id(Id_aux(Id("v"),model/riscv_next_regs.sail:76)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),:1)),:1)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:67)),model/riscv_next_regs.sail:67)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_next_regs.sail:75)),model/riscv_next_regs.sail:75),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:79))]),model/riscv_next_regs.sail:79),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_next_regs.sail:79))]),model/riscv_next_regs.sail:79),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79),Id_aux(Id("utvec"),model/riscv_next_regs.sail:79)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:80))]),model/riscv_next_regs.sail:80),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_next_regs.sail:80))]),model/riscv_next_regs.sail:80),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:80)),model/riscv_next_regs.sail:80),Id_aux(Id("uscratch"),model/riscv_next_regs.sail:80)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:81))]),model/riscv_next_regs.sail:81),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_next_regs.sail:81))]),model/riscv_next_regs.sail:81),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:81)),model/riscv_next_regs.sail:81),Id_aux(Id("uepc"),model/riscv_next_regs.sail:81)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:82))]),model/riscv_next_regs.sail:82),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_next_regs.sail:82))]),model/riscv_next_regs.sail:82),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_next_regs.sail:82)),model/riscv_next_regs.sail:82),Id_aux(Id("ucause"),model/riscv_next_regs.sail:82)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_next_regs.sail:82)),model/riscv_next_regs.sail:82))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:83))]),model/riscv_next_regs.sail:83),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_next_regs.sail:83))]),model/riscv_next_regs.sail:83),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_next_regs.sail:83)),model/riscv_next_regs.sail:83),Id_aux(Id("utval"),model/riscv_next_regs.sail:83)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_check_xret_priv"),model/riscv_sys_exceptions.sail:6),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_check_xret_priv"),model/riscv_sys_exceptions.sail:6),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6),P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:6)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6)),E_aux(E_lit(L_aux(L_true,model/riscv_sys_exceptions.sail:6)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ext_fail_xret_priv"),model/riscv_sys_exceptions.sail:8),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_fail_xret_priv"),model/riscv_sys_exceptions.sail:8),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8),P_aux(P_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:8)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8)),E_aux(E_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:8)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("handle_trap_extension"),model/riscv_sys_exceptions.sail:10),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("handle_trap_extension"),model/riscv_sys_exceptions.sail:10),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:10)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10),P_aux(P_id(Id_aux(Id("pc"),model/riscv_sys_exceptions.sail:10)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10),P_aux(P_id(Id_aux(Id("u"),model/riscv_sys_exceptions.sail:10)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10)),E_aux(E_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:10)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_exceptions.sail:10),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10))]),model/riscv_sys_exceptions.sail:10))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:10)),model/riscv_sys_exceptions.sail:10),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("prepare_trap_vector"),model/riscv_sys_exceptions.sail:13),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13));(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:310))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("prepare_trap_vector"),model/riscv_sys_exceptions.sail:13),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13),P_aux(P_id(Id_aux(Id("cause"),model/riscv_sys_exceptions.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13))),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13));(Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13))]),model/riscv_sys_exceptions.sail:13-23)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_exceptions.sail:14)),model/riscv_sys_exceptions.sail:14),P_aux(P_id(Id_aux(Id("tvec"),model/riscv_sys_exceptions.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_exceptions.sail:14)),model/riscv_sys_exceptions.sail:14))),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_exceptions.sail:14)),model/riscv_sys_exceptions.sail:14)),E_aux(E_case(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_sys_exceptions.sail:15)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)),E_aux(E_id(Id_aux(Id("mtvec"),model/riscv_sys_exceptions.sail:15)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_sys_exceptions.sail:16)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)),E_aux(E_id(Id_aux(Id("stvec"),model/riscv_sys_exceptions.sail:16)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_sys_exceptions.sail:17)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)),E_aux(E_id(Id_aux(Id("utvec"),model/riscv_sys_exceptions.sail:17)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79))),None))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_exceptions.sail:14)),model/riscv_sys_exceptions.sail:14))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("tvec_addr"),model/riscv_sys_exceptions.sail:19),[(E_aux(E_id(Id_aux(Id("tvec"),model/riscv_sys_exceptions.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_exceptions.sail:14)),model/riscv_sys_exceptions.sail:14)));(E_aux(E_id(Id_aux(Id("cause"),model/riscv_sys_exceptions.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_sys_exceptions.sail:13)),model/riscv_sys_exceptions.sail:13)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_sys_exceptions.sail:20),[(P_aux(P_id(Id_aux(Id("epc"),model/riscv_sys_exceptions.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328)),E_aux(E_id(Id_aux(Id("epc"),model/riscv_sys_exceptions.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/option.sail:10))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_sys_exceptions.sail:21),[(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:21)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_regs.sail:328),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_regs.sail:328))]),model/riscv_sys_regs.sail:328)),E_aux(E_app(Id_aux(Id("internal_error"),model/riscv_sys_exceptions.sail:21),[(E_aux(E_lit(L_aux(L_string("Invalid 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ys_exceptions.sail:37)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:32)),model/riscv_sys_exceptions.sail:32))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_exceptions.sail:32))]),model/riscv_sys_exceptions.sail:32)),model/riscv_sys_exceptions.sail:32)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_xret_target"),model/riscv_sys_exceptions.sail:40),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_exceptions.sail:40));(BE_aux(BE_wreg,model/riscv_sys_exceptions.sail:40))]),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_xret_target"),model/riscv_sys_exceptions.sail:41),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:41)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)));(P_aux(P_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_sys_exceptions.sail:41-49)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("target"),model/riscv_sys_exceptions.sail:42)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("legalize_xepc"),model/riscv_sys_exceptions.sail:42),[(E_aux(E_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:42)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:43)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_sys_exceptions.sail:44)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mepc"),model/riscv_sys_exceptions.sail:44)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("target"),model/riscv_sys_exceptions.sail:44)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_sys_exceptions.sail:45)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("sepc"),model/riscv_sys_exceptions.sail:45)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("target"),model/riscv_sys_exceptions.sail:45)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_sys_exceptions.sail:46)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("uepc"),model/riscv_sys_exceptions.sail:46)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("target"),model/riscv_sys_exceptions.sail:46)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("target"),model/riscv_sys_exceptions.sail:48)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_exceptions.sail:40));(BE_aux(BE_wreg,model/riscv_sys_exceptions.sail:40))]),model/riscv_sys_exceptions.sail:40)),model/riscv_sys_exceptions.sail:40)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("prepare_xret_target"),model/riscv_sys_exceptions.sail:51),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_exceptions.sail:51));(BE_aux(BE_wreg,model/riscv_sys_exceptions.sail:51))]),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("prepare_xret_target"),model/riscv_sys_exceptions.sail:52),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:52)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51)),E_aux(E_app(Id_aux(Id("get_xret_target"),model/riscv_sys_exceptions.sail:53),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_exceptions.sail:53)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_exceptions.sail:51));(BE_aux(BE_wreg,model/riscv_sys_exceptions.sail:51))]),model/riscv_sys_exceptions.sail:51)),model/riscv_sys_exceptions.sail:51)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_mtvec"),model/riscv_sys_exceptions.sail:57),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:57)),model/riscv_sys_exceptions.sail:57),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:310))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:57)),model/riscv_sys_exceptions.sail:57)),model/riscv_sys_exceptions.sail:57),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_mtvec"),model/riscv_sys_exceptions.sail:57),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:57)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("mtvec"),model/riscv_sys_exceptions.sail:58)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_stvec"),model/riscv_sys_exceptions.sail:60),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:60)),model/riscv_sys_exceptions.sail:60),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:578))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:60)),model/riscv_sys_exceptions.sail:60)),model/riscv_sys_exceptions.sail:60),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_stvec"),model/riscv_sys_exceptions.sail:60),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:60)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("stvec"),model/riscv_sys_exceptions.sail:61)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("get_utvec"),model/riscv_sys_exceptions.sail:63),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:63)),model/riscv_sys_exceptions.sail:63),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:79))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:63)),model/riscv_sys_exceptions.sail:63)),model/riscv_sys_exceptions.sail:63),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("get_utvec"),model/riscv_sys_exceptions.sail:63),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_exceptions.sail:63)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("utvec"),model/riscv_sys_exceptions.sail:64)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_mtvec"),model/riscv_sys_exceptions.sail:66),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:66)),model/riscv_sys_exceptions.sail:66))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:66)),model/riscv_sys_exceptions.sail:66),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:310));(BE_aux(BE_wreg,model/riscv_sys_regs.sail:310))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:66)),model/riscv_sys_exceptions.sail:66)),model/riscv_sys_exceptions.sail:66),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_mtvec"),model/riscv_sys_exceptions.sail:66),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:66)),model/riscv_sys_exceptions.sail:66),P_aux(P_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:66)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mtvec"),model/riscv_sys_exceptions.sail:67)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)),E_aux(E_app(Id_aux(Id("legalize_tvec"),model/riscv_sys_exceptions.sail:67),[(E_aux(E_id(Id_aux(Id("mtvec"),model/riscv_sys_exceptions.sail:67)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310)));(E_aux(E_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:67)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("mtvec"),model/riscv_sys_exceptions.sail:68)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:310)),model/riscv_sys_regs.sail:310)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_stvec"),model/riscv_sys_exceptions.sail:71),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:71)),model/riscv_sys_exceptions.sail:71))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:71)),model/riscv_sys_exceptions.sail:71),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:578));(BE_aux(BE_wreg,model/riscv_sys_regs.sail:578))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:71)),model/riscv_sys_exceptions.sail:71)),model/riscv_sys_exceptions.sail:71),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_stvec"),model/riscv_sys_exceptions.sail:71),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:71)),model/riscv_sys_exceptions.sail:71),P_aux(P_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:71)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("stvec"),model/riscv_sys_exceptions.sail:72)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)),E_aux(E_app(Id_aux(Id("legalize_tvec"),model/riscv_sys_exceptions.sail:72),[(E_aux(E_id(Id_aux(Id("stvec"),model/riscv_sys_exceptions.sail:72)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578)));(E_aux(E_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:72)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("stvec"),model/riscv_sys_exceptions.sail:73)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:578)),model/riscv_sys_regs.sail:578)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("set_utvec"),model/riscv_sys_exceptions.sail:76),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:76)),model/riscv_sys_exceptions.sail:76))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:76)),model/riscv_sys_exceptions.sail:76),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_next_regs.sail:79));(BE_aux(BE_wreg,model/riscv_next_regs.sail:79))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:76)),model/riscv_sys_exceptions.sail:76)),model/riscv_sys_exceptions.sail:76),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("set_utvec"),model/riscv_sys_exceptions.sail:76),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_exceptions.sail:76)),model/riscv_sys_exceptions.sail:76),P_aux(P_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:76)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("utvec"),model/riscv_sys_exceptions.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312)),E_aux(E_app(Id_aux(Id("legalize_tvec"),model/riscv_sys_exceptions.sail:77),[(E_aux(E_id(Id_aux(Id("utvec"),model/riscv_sys_exceptions.sail:77)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79)));(E_aux(E_id(Id_aux(Id("value"),model/riscv_sys_exceptions.sail:77)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_sys_regs.sail:312)),model/riscv_sys_regs.sail:312))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("_get_Mtvec_bits"),:1),[(E_aux(E_id(Id_aux(Id("utvec"),model/riscv_sys_exceptions.sail:78)),Typ_aux(Typ_id(Id_aux(Id("Mtvec"),model/riscv_next_regs.sail:79)),model/riscv_next_regs.sail:79)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_sync_exception"),model/riscv_sync_exception.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),model/riscv_sync_exception.sail:3),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sync_exception.sail:3)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_sync_exception"),model/riscv_sync_exception.sail:3),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("trap"),model/riscv_sync_exception.sail:4),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sync_exception.sail:4)),model/riscv_sync_exception.sail:4))),None));(FE_aux(FE_Fexp(Id_aux(Id("excinfo"),model/riscv_sync_exception.sail:5),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sync_exception.sail:5),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sync_exception.sail:5))]),model/riscv_sync_exception.sail:5))),None));(FE_aux(FE_Fexp(Id_aux(Id("ext"),model/riscv_sync_exception.sail:6),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sync_exception.sail:6),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_exceptions.sail:3)),model/riscv_sync_exception.sail:6))]),model/riscv_sync_exception.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sync_exception.sail:3)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sync_exception.sail:3)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:3),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("000"),model/riscv_next_control.sail:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:3)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:3),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:3)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:4),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("004"),model/riscv_next_control.sail:4)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:4)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:4),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:4)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:5),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("005"),model/riscv_next_control.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:5)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:5),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:5)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:6),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("040"),model/riscv_next_control.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:6)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:6),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:6)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:7),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("041"),model/riscv_next_control.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:7)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:7),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:7)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:8),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("042"),model/riscv_next_control.sail:8)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:8)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:8),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:8)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:9),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("043"),model/riscv_next_control.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:9)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:9),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:9)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_is_CSR_defined"),model/riscv_next_control.sail:10),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("044"),model/riscv_next_control.sail:10)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_next_control.sail:10)),E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_next_control.sail:10),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:10)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:12),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("000"),model/riscv_next_control.sail:12)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:12),[(E_aux(E_app(Id_aux(Id("_get_Ustatus_bits"),:1),[(E_aux(E_app(Id_aux(Id("lower_sstatus"),model/riscv_next_control.sail:12),[(E_aux(E_app(Id_aux(Id("lower_mstatus"),model/riscv_next_control.sail:12),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_next_control.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_id(Id_aux(Id("Sstatus"),model/riscv_sys_regs.sail:451)),model/riscv_sys_regs.sail:451)))]),Typ_aux(Typ_id(Id_aux(Id("Ustatus"),model/riscv_next_regs.sail:10)),model/riscv_next_regs.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:13),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("004"),model/riscv_next_control.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:13),[(E_aux(E_app(Id_aux(Id("_get_Uinterrupts_bits"),:1),[(E_aux(E_app(Id_aux(Id("lower_sie"),model/riscv_next_control.sail:13),[(E_aux(E_app(Id_aux(Id("lower_mie"),model/riscv_next_control.sail:13),[(E_aux(E_id(Id_aux(Id("mie"),model/riscv_next_control.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:232)),model/riscv_sys_regs.sail:232)));(E_aux(E_id(Id_aux(Id("mideleg"),model/riscv_next_control.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_regs.sail:233)),model/riscv_sys_regs.sail:233)))]),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:531)),model/riscv_sys_regs.sail:531)));(E_aux(E_id(Id_aux(Id("sideleg"),model/riscv_next_control.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Sinterrupts"),model/riscv_sys_regs.sail:575)),model/riscv_sys_regs.sail:575)))]),Typ_aux(Typ_id(Id_aux(Id("Uinterrupts"),model/riscv_next_regs.sail:47)),model/riscv_next_regs.sail:47)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:14),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("005"),model/riscv_next_control.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:14),[(E_aux(E_app(Id_aux(Id("get_utvec"),model/riscv_next_control.sail:14),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:14)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:15),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("040"),model/riscv_next_control.sail:15)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:15),[(E_aux(E_id(Id_aux(Id("uscratch"),model/riscv_next_control.sail:15)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:16),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("041"),model/riscv_next_control.sail:16)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:16),[(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("get_xret_target"),model/riscv_next_control.sail:16),[(E_aux(E_id(Id_aux(Id("User"),model/riscv_next_control.sail:16)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("pc_alignment_mask"),model/riscv_next_control.sail:16),[(E_aux(E_lit(L_aux(L_unit,model/riscv_next_control.sail:16)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:17),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("042"),model/riscv_next_control.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:17),[(E_aux(E_app(Id_aux(Id("_get_Mcause_bits"),:1),[(E_aux(E_id(Id_aux(Id("ucause"),model/riscv_next_control.sail:17)),Typ_aux(Typ_id(Id_aux(Id("Mcause"),model/riscv_next_regs.sail:82)),model/riscv_next_regs.sail:82)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:18),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("043"),model/riscv_next_control.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_next_control.sail:18),[(E_aux(E_id(Id_aux(Id("utval"),model/riscv_next_control.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_next_control.sail:19),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("044"),model/riscv_next_control.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A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vector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))]),model/riscv_csr_ext.sail:6)),E_aux(E_lit(L_aux(L_false,model/riscv_csr_ext.sail:6)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:110))]),model/riscv_csr_map.sail:110)),model/riscv_csr_map.sail:110))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_read_CSR"),model/riscv_csr_ext.sail:9),Pat_aux(Pat_exp(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("None"),model/riscv_csr_ext.sail:9),[(E_aux(E_lit(L_aux(L_unit,model/riscv_csr_ext.sail:9)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:114),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:114))]),model/riscv_csr_map.sail:114)),model/riscv_csr_map.sail:114))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("ext_write_CSR"),model/riscv_csr_ext.sail:12),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_csr_ext.sail:12)),E_aux(E_app(Id_aux(Id("None"),model/riscv_csr_ext.sail:12),[(E_aux(E_lit(L_aux(L_unit,model/riscv_csr_ext.sail:12)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_csr_map.sail:118),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_csr_map.sail:118))]),model/riscv_csr_map.sail:118),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_csr_map.sail:118));(BE_aux(BE_wreg,model/riscv_csr_map.sail:118))]),model/riscv_csr_map.sail:118)),model/riscv_csr_map.sail:118))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("csrAccess"),model/riscv_sys_control.sail:6),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:6)),model/riscv_sys_control.sail:6))],Typ_aux(Typ_id(Id_aux(Id("csrRW"),model/riscv_sys_control.sail:6)),model/riscv_sys_control.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("csrRW"),model/riscv_sys_control.sail:6)),model/riscv_sys_control.sail:6)),model/riscv_sys_control.sail:6),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("csrAccess"),model/riscv_sys_control.sail:6),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:6)),model/riscv_sys_control.sail:6),P_aux(P_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(11),model/riscv_sys_control.sail:6)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),model/riscv_sys_control.sail:6)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:306)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("csrPriv"),model/riscv_sys_control.sail:7),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:7)),model/riscv_sys_control.sail:7))],Typ_aux(Typ_id(Id_aux(Id("priv_level"),model/riscv_sys_control.sail:7)),model/riscv_sys_control.sail:7),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("priv_level"),model/riscv_sys_control.sail:7)),model/riscv_sys_control.sail:7)),model/riscv_sys_control.sail:7),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("csrPriv"),model/riscv_sys_control.sail:7),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:7)),model/riscv_sys_control.sail:7),P_aux(P_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(9),model/riscv_sys_control.sail:7)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_sys_control.sail:7)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("is_CSR_defined"),model/riscv_sys_control.sail:9),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("is_CSR_defined"),model/riscv_sys_control.sail:9),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9),P_aux(P_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_control.sail:9)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9))]),model/riscv_sys_control.sail:9-92)),E_aux(E_case(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:10)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("f11"),model/riscv_sys_control.sail:12)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_sys_control.sail:12)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("f12"),model/riscv_sys_control.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_sys_control.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("f13"),model/riscv_sys_control.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_sys_control.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("f14"),model/riscv_sys_control.sail:15)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:15)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:9)),model/riscv_sys_control.sail:9)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_sys_control.sail:15)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16))),None));(Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_hex("300"),model/riscv_sys_control.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id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t_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex3554#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_and(NC_aux(NC_var(Kid_aux(Var("'ex3556#"),Unknown)),Unknown),NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3554#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:22)),Unknown)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:306)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:65)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:94)),model/riscv_sys_control.sail:94));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3547#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:94)),model/riscv_sys_control.sail:94),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:94)),model/riscv_sys_control.sail:94)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("check_TVM_SATP"),model/riscv_sys_control.sail:99),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("check_TVM_SATP"),model/riscv_sys_control.sail:99),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99),P_aux(P_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:99)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_control.sail:99)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99))]),model/riscv_sys_control.sail:99-100)),E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_hex("180"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)));(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99)));(E_aux(E_id(Id_aux(Id("Supervisor"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16)));(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_TVM"),:1),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:100)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex3586#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3586#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("check_Counteren"),model/riscv_sys_control.sail:102),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:371))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("check_Counteren"),model/riscv_sys_control.sail:102),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102),P_aux(P_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:102)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_control.sail:102)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_de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.sail:120)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118)));(E_aux(E_id(Id_aux(Id("isWrite"),model/riscv_sys_control.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3701#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:94)),model/riscv_sys_control.sail:94)));(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("check_TVM_SATP"),model/riscv_sys_control.sail:121),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:121)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:121)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:99)),model/riscv_sys_control.sail:99)));(E_aux(E_app(Id_aux(Id("check_Counteren"),model/riscv_sys_control.sail:122),[(E_aux(E_id(Id_aux(Id("csr"),model/riscv_sys_control.sail:122)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("p"),model/riscv_sys_control.sail:122)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:102)),model/riscv_sys_control.sail:102)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:118)),model/riscv_sys_control.sail:118),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("speculate_conditional"),model/riscv_sys_control.sail:136),[ocaml: "Platform.speculate_conditional",interpreter: "excl_res",c: "speculate_conditional",lem: "speculate_conditional_success"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:136)),model/riscv_sys_control.sail:136))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:136)),model/riscv_sys_control.sail:136),Effect_aux(Effect_set([(BE_aux(BE_exmem,model/riscv_sys_control.sail:136))]),model/riscv_sys_control.sail:136)),model/riscv_sys_control.sail:136)),model/riscv_sys_control.sail:136))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("load_reservation"),model/riscv_sys_control.sail:138),[ocaml: "Platform.load_reservation",interpreter: "Platform.load_reservation",c: "load_reservation",lem: "load_reservation"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:138)),model/riscv_sys_control.sail:138),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:138)),model/riscv_sys_control.sail:138)),model/riscv_sys_control.sail:138))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("match_reservation"),model/riscv_sys_control.sail:139),[ocaml: "Platform.match_reservation",interpreter: "Platform.match_reservation",lem: "match_reservation",c: "match_reservation"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:139)),model/riscv_sys_control.sail:139),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:139)),model/riscv_sys_control.sail:139)),model/riscv_sys_control.sail:139))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("cancel_reservation"),model/riscv_sys_control.sail:140),[ocaml: "Platform.cancel_reservation",interpreter: "Platform.cancel_reservation",c: "cancel_reservation",lem: "cancel_reservation"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:140)),model/riscv_sys_control.sail:140))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:140)),model/riscv_sys_control.sail:140),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:140)),model/riscv_sys_control.sail:140)),model/riscv_sys_control.sail:140))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("exception_delegatee"),model/riscv_sys_control.sail:145),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145))],Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("exception_delegatee"),model/riscv_sys_control.sail:145),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145),P_aux(P_id(Id_aux(Id("e"),model/riscv_sys_control.sail:145)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145),P_aux(P_id(Id_aux(Id("p"),model/riscv_sys_control.sail:145)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145))]),model/riscv_sys_control.sail:145-158)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("idx"),model/riscv_sys_control.sail:146)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_idx"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("num_of_ExceptionType"),model/riscv_sys_control.sail:146),[(E_aux(E_id(Id_aux(Id("e"),model/riscv_sys_control.sail:146)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:145)),model/riscv_sys_control.sail:145)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_types.sail:187),Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187))],NC_aux(NC_and(NC_aux(NC_bounded_le(Nexp_aux(Nexp_constant(0),model/riscv_types.sail:187),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),NC_aux(NC_bounded_lt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187),Nexp_aux(Nexp_id(Id_aux(Id("xlen"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187),Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_types.sail:187),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_types.sail:187)),model/riscv_types.sail:187)),model/riscv_types.sail:187))]),model/riscv_types.sail:187)),model/riscv_types.sail:187))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("super"),model/riscv_sys_control.sail:147)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3749#"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("bit_to_bool"),model/riscv_sys_control.sail:147),[(E_aux(E_app(Id_aux(Id("bitvector_access"),../sail/lib/vector_dec.sail:109),[(E_aux(E_app(Id_aux(Id("_get_Medeleg_bits"),:1),[(E_aux(E_id(Id_aux(Id("medeleg"),model/riscv_sys_control.sail:147)),Typ_aux(Typ_id(Id_aux(Id("Medeleg"),model/riscv_sys_regs.sail:295)),model/riscv_sys_regs.sail:295)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_id(Id_aux(Id("idx"),model/riscv_sys_control.sail:147)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_idx"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bit"),../sail/lib/vector_dec.sail:99)),../s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_val_spec(cast_false,Id_aux(Id("findPendingInterrupt"),model/riscv_sys_control.sail:163),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("findPendingInterrupt"),model/riscv_sys_control.sail:163),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163),P_aux(P_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:163)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:164)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Minterrupts"),model/riscv_sys_control.sail:164),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:164)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MEI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:165)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:165)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:165),[(E_aux(E_id(Id_aux(Id("I_M_External"),model/riscv_sys_control.sail:165)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MSI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:166)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:166)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:166),[(E_aux(E_id(Id_aux(Id("I_M_Software"),model/riscv_sys_control.sail:166)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_MTI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:167)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:167)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:167),[(E_aux(E_id(Id_aux(Id("I_M_Timer"),model/riscv_sys_control.sail:167)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SEI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:168)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:168)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:168),[(E_aux(E_id(Id_aux(Id("I_S_External"),model/riscv_sys_control.sail:168)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_SSI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:169)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:169)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:169),[(E_aux(E_id(Id_aux(Id("I_S_Software"),model/riscv_sys_control.sail:169)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_STI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:170)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:170)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:170),[(E_aux(E_id(Id_aux(Id("I_S_Timer"),model/riscv_sys_control.sail:170)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UEI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:171)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:171)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:171),[(E_aux(E_id(Id_aux(Id("I_U_External"),model/riscv_sys_control.sail:171)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_USI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:172)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:172)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:172),[(E_aux(E_id(Id_aux(Id("I_U_Software"),model/riscv_sys_control.sail:172)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_UTI"),:1),[(E_aux(E_id(Id_aux(Id("ip"),model/riscv_sys_control.sail:173)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:173)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:173),[(E_aux(E_id(Id_aux(Id("I_U_Timer"),model/riscv_sys_control.sail:173)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_types.sail:113)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("None"),model/riscv_sys_control.sail:174),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:174)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:163),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163)),model/riscv_sys_control.sail:163))]),model/riscv_sys_control.sail:163),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_interrupt_set"),model/riscv_sys_control.sail:182),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),model/riscv_sys_control.sail:182),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_interrupt_set"),model/riscv_sys_control.sail:182),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:185)),model/riscv_sys_control.sail:185),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:185)),model/riscv_sys_control.sail:185))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:185)),model/riscv_sys_control.sail:185)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:185)),model/riscv_sys_control.sail:185))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:183)),model/riscv_sys_control.sail:183),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("Ints_Pending"),model/riscv_sys_control.sail:183),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182),[]),Unknown)));(E_aux(E_app(Id_aux(Id("Ints_Delegated"),model/riscv_sys_control.sail:184),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182),[]),Unknown)));(E_aux(E_app(Id_aux(Id("Ints_Empty"),model/riscv_sys_control.sail:185),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:185)),model/riscv_sys_control.sail:185)))]),Typ_aux(Typ_app(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),:1))),Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:182)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("processPending"),model/riscv_sys_control.sail:187),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188))],Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:187-188),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("processPending"),model/riscv_sys_control.sail:187),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187),P_aux(P_id(Id_aux(Id("xip"),model/riscv_sys_control.sail:187)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187),P_aux(P_id(Id_aux(Id("xie"),model/riscv_sys_control.sail:187)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187))),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187),P_aux(P_id(Id_aux(Id("xideleg"),model/riscv_sys_control.sail:187)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188),P_aux(P_id(Id_aux(Id("priv_enabled"),model/riscv_sys_control.sail:188)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3820#"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188))]),model/riscv_sys_control.sail:187-199)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("effective_pend"),model/riscv_sys_control.sail:190)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_bits"),:1),[(E_aux(E_id(Id_aux(Id("xip"),model/riscv_sys_control.sail:190)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_bits"),:1),[(E_aux(E_id(Id_aux(Id("xie"),model/riscv_sys_control.sail:190)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_app(Id_aux(Id("not_vec"),model/prelude.sail:37),[(E_aux(E_id(Id_aux(Id("xideleg"),model/riscv_sys_control.sail:190)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("effective_delg"),model/riscv_sys_control.sail:192)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("and_vec"),../sail/lib/vector_dec.sail:164),[(E_aux(E_app(Id_aux(Id("_get_Minterrupts_bits"),:1),[(E_aux(E_id(Id_aux(Id("xip"),model/riscv_sys_control.sail:192)),Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_id(Id_aux(Id("xideleg"),model/riscv_sys_control.sail:192)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_id(Id_aux(Id("priv_enabled"),model/riscv_sys_control.sail:194)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex3820#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("neq_bits"),../sail/lib/vector_dec.sail:26),[(E_aux(E_id(Id_aux(Id("effective_pend"),model/riscv_sys_control.sail:194)),Typ_aux(Typ_a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s_control.sail:187));(Typ_aux(Typ_id(Id_aux(Id("Minterrupts"),model/riscv_sys_control.sail:187)),model/riscv_sys_control.sail:187));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188))],Typ_aux(Typ_id(Id_aux(Id("interrupt_set"),model/riscv_sys_control.sail:188)),model/riscv_sys_control.sail:188),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("getPendingSet"),model/riscv_sys_control.sail:208),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:208),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))]),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))]),model/riscv_sys_control.sail:208),Effect_aux(Effect_set([(BE_aux(BE_escape,Unknown));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:71))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:208),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))]),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))]),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("getPendingSet"),model/riscv_sys_control.sail:208),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208),P_aux(P_id(Id_aux(Id("priv"),model/riscv_sys_control.sail:208)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:208)),model/riscv_sys_control.sail:208)),E_aux(E_block([(E_aux(E_assert(E_aux(E_app(Id_aux(Id("haveUsrMode"),model/riscv_sys_control.sail:209),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:209)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:102)),model/riscv_sys_regs.sail:102)),E_aux(E_lit(L_aux(L_string("no user mode: M/U or M/S/U system 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exception"),model/riscv_sys_control.sail:269)),model/riscv_sys_control.sail:269))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("CTL_TRAP"),model/riscv_sys_control.sail:269),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:269)),model/riscv_sys_control.sail:269)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_app(Id_aux(Id("CTL_SRET"),model/riscv_sys_control.sail:270),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_app(Id_aux(Id("CTL_MRET"),model/riscv_sys_control.sail:271),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_app(Id_aux(Id("CTL_URET"),model/riscv_sys_control.sail:272),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:270)),model/riscv_sys_control.sail:270)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268)),:1))),Typ_aux(Typ_id(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("tval"),model/riscv_sys_control.sail:277),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("tval"),model/riscv_sys_control.sail:277),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277),P_aux(P_id(Id_aux(Id("excinfo"),model/riscv_sys_control.sail:277)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277)),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("excinfo"),model/riscv_sys_control.sail:278)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:279),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_sys_control.sail:279)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277)),E_aux(E_id(Id_aux(Id("e"),model/riscv_sys_control.sail:279)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/option.sail:10))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_sys_control.sail:280),[(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_control.sail:280)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_control.sail:280),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_control.sail:280)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:277))]),model/riscv_sys_control.sail:277))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("rvfi_trap"),model/riscv_sys_control.sail:289),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("rvfi_trap"),model/riscv_sys_control.sail:290),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_control.sail:290)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:290)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("trap_handler"),model/riscv_sys_control.sail:295),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_id(Id_aux(Id("exc_code"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_exception"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:296)),model/riscv_sys_control.sail:296),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134));(BE_aux(BE_wreg,:1))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:296)),model/riscv_sys_control.sail:296)),model/riscv_sys_control.sail:295-296),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("trap_handler"),model/riscv_sys_control.sail:295),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("del_priv"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("intr"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex4017#"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("exc_code"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("c"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("pc"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("info"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295)));(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_exception"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295),P_aux(P_id(Id_aux(Id("ext"),model/riscv_sys_control.sail:295)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_control.sail:295)),model/riscv_sys_control.sail:295));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_sys_control.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_exceptions.sail:3)),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295))]),model/riscv_sys_control.sail:295-371)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("rvfi_trap"),model/riscv_sys_control.sail:297),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:297)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:289)),model/riscv_sys_control.sail:289)));(E_aux(E_if(E_aux(E_app(Id_aux(Id("get_config_print_platform"),model/riscv_sys_control.sail:298),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:298)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:109)),model/prelude.sail:109)),E_aux(E_app(Id_aux(Id("print_platform"),model/riscv_sys_control.sail:299),[(E_aux(E_app(Id_aux(Id("concat_str"),model/prelude.sail:69),[(E_aux(E_lit(L_aux(L_string("handling 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ail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("handle_mem_exception"),model/riscv_sys_control.sail:432),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432));(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:5));(BE_aux(BE_wreg,:1))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("handle_mem_exception"),model/riscv_sys_control.sail:432),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432),P_aux(P_id(Id_aux(Id("addr"),model/riscv_sys_control.sail:432)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432),P_aux(P_id(Id_aux(Id("e"),model/riscv_sys_control.sail:432)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))]),model/riscv_sys_control.sail:432-437)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:433)),model/riscv_sys_control.sail:433),P_aux(P_id(Id_aux(Id("t"),model/riscv_sys_control.sail:433)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:433)),model/riscv_sys_control.sail:433))),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:433)),model/riscv_sys_control.sail:433)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("trap"),model/riscv_sys_control.sail:433),E_aux(E_id(Id_aux(Id("e"),model/riscv_sys_control.sail:433)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))),None));(FE_aux(FE_Fexp(Id_aux(Id("excinfo"),model/riscv_sys_control.sail:434),E_aux(E_app(Id_aux(Id("Some"),model/riscv_sys_control.sail:434),[(E_aux(E_id(Id_aux(Id("addr"),model/riscv_sys_control.sail:434)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None));(FE_aux(FE_Fexp(Id_aux(Id("ext"),model/riscv_sys_control.sail:435),E_aux(E_app(Id_aux(Id("None"),model/riscv_sys_control.sail:435),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:435)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:433)),model/riscv_sys_control.sail:433))),None),E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_sys_control.sail:436),[(E_aux(E_app(Id_aux(Id("exception_handler"),model/riscv_sys_control.sail:436),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_sys_control.sail:436)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_app(Id_aux(Id("CTL_TRAP"),model/riscv_sys_control.sail:436),[(E_aux(E_id(Id_aux(Id("t"),model/riscv_sys_control.sail:436)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_sys_control.sail:433)),model/riscv_sys_control.sail:433)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_sys_control.sail:436)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("handle_interrupt"),model/riscv_sys_control.sail:439),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_regs.sail:3));(BE_aux(BE_wreg,:1))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("handle_interrupt"),model/riscv_sys_control.sail:439),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439),P_aux(P_id(Id_aux(Id("i"),model/riscv_sys_control.sail:439)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439))),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439),P_aux(P_id(Id_aux(Id("del_priv"),model/riscv_sys_control.sail:439)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439))),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439))]),model/riscv_sys_control.sail:439-440)),E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_sys_control.sail:440),[(E_aux(E_app(Id_aux(Id("trap_handler"),model/riscv_sys_control.sail:440),[(E_aux(E_id(Id_aux(Id("del_priv"),model/riscv_sys_control.sail:440)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439)));(E_aux(E_lit(L_aux(L_true,model/riscv_sys_control.sail:440)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("interruptType_to_bits"),model/riscv_sys_control.sail:440),[(E_aux(E_id(Id_aux(Id("i"),model/riscv_sys_control.sail:440)),Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_types.sail:111)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_sys_control.sail:440)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("None"),model/riscv_sys_control.sail:440),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:440)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("None"),model/riscv_sys_control.sail:440),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:440)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("InterruptType"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:439)),model/riscv_sys_control.sail:439),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_sys"),model/riscv_sys_control.sail:444),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:444)),model/riscv_sys_control.sail:444),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134));(BE_aux(BE_wreg,model/riscv_sys_regs.sail:5))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:444)),model/riscv_sys_control.sail:444)),model/riscv_sys_control.sail:444),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_sys"),model/riscv_sys_control.sail:444),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_sys_control.sail:444)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("cur_privilege"),model/riscv_sys_control.sail:445)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)),E_aux(E_id(Id_aux(Id("Machine"),model/riscv_sys_control.sail:445)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mhartid"),model/riscv_sys_control.sail:447)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_sys_control.sail:447),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_sys_control.sail:447)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("_set_Misa_MXL"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:449)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("arch_to_bits"),model/riscv_sys_control.sail:449),[(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(32),model/riscv_sys_control.sail:449)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(32),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28)),E_aux(E_id(Id_aux(Id("RV32"),model/riscv_sys_control.sail:449)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)),E_aux(E_id(Id_aux(Id("RV64"),model/riscv_sys_control.sail:449)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:56)),model/riscv_types.sail:56)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_set_Misa_A"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:450)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:450)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_set_Misa_C"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:451)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("bool_to_bits"),model/riscv_sys_control.sail:451),[(E_aux(E_app(Id_aux(Id("sys_enable_rvc"),model/riscv_sys_control.sail:451),[(E_aux(E_lit(L_aux(L_unit,model/riscv_sys_control.sail:451)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:76)),model/riscv_sys_regs.sail:76)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/prelude.sail:129)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_set_Misa_I"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:452)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:452)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_set_Misa_M"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:453)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.sail:453)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1)));(E_aux(E_app(Id_aux(Id("_set_Misa_U"),:1),[(E_aux(E_ref(Id_aux(Id("misa"),model/riscv_sys_control.sail:454)),Typ_aux(Typ_app(Id_aux(Id("register"),Unknown),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Misa"),model/riscv_sys_regs.sail:71)),model/riscv_sys_regs.sail:71)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_sys_control.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E_app(Id_aux(Id("MemValue"),model/riscv_sys_control.sail:489),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:489)),model/riscv_sys_control.sail:489)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("MemException"),model/riscv_sys_control.sail:490),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:490)),model/riscv_sys_control.sail:490)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'a"),model/riscv_sys_control.sail:488)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("MemoryOpResult_add_meta"),model/riscv_sys_control.sail:493),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_sys_control.sail:493),Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("MemoryOpResult_add_meta"),model/riscv_sys_control.sail:494),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r"),model/riscv_sys_control.sail:494)),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493)));(P_aux(P_id(Id_aux(Id("m"),model/riscv_sys_control.sail:494)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:494-497)),E_aux(E_case(E_aux(E_id(Id_aux(Id("r"),model/riscv_sys_control.sail:494)),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("MemValue"),model/riscv_sys_control.sail:495),[(P_aux(P_id(Id_aux(Id("v"),model/riscv_sys_control.sail:495)),Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:489)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493)),E_aux(E_app(Id_aux(Id("MemValue"),model/riscv_sys_control.sail:495),[(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("v"),model/riscv_sys_control.sail:495)),Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:489)));(E_aux(E_id(Id_aux(Id("m"),model/riscv_sys_control.sail:495)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:489)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("MemException"),model/riscv_sys_control.sail:496),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_sys_control.sail:496)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:490)),model/riscv_sys_control.sail:490)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493)),E_aux(E_app(Id_aux(Id("MemException"),model/riscv_sys_control.sail:496),[(E_aux(E_id(Id_aux(Id("e"),model/riscv_sys_control.sail:496)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sys_control.sail:490)),model/riscv_sys_control.sail:490)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:493),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493))]),model/riscv_sys_control.sail:493),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:493)),model/riscv_sys_control.sail:493)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("MemoryOpResult_drop_meta"),model/riscv_sys_control.sail:499),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_sys_control.sail:499),Kid_aux(Var("'t"),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499))]),model/riscv_sys_control.sail:499),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:499),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5))]),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499))]),model/riscv_sys_control.sail:499))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:499),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:49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ol.sail:499),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'t"),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499))]),model/riscv_sys_control.sail:499),Effect_aux(Effect_set([]),model/riscv_sys_control.sail:499)),model/riscv_sys_control.sail:499)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("elf_tohost"),model/riscv_platform.sail:9),[ocaml: "Elf_loader.elf_tohost",interpreter: "Elf_loader.elf_tohost",c: "elf_tohost"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:13)),model/riscv_platform.sail:13))],Typ_aux(Typ_id(Id_aux(Id("int"),model/riscv_platform.sail:13)),model/riscv_platform.sail:13),Effect_aux(Effect_set([]),model/riscv_platform.sail:13)),model/riscv_platform.sail:13)),model/riscv_platform.sail:13))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("elf_entry"),model/riscv_platform.sail:15),[ocaml: "Elf_loader.elf_entry",interpreter: "Elf_loader.elf_entry",c: "elf_entry"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:19)),model/riscv_platform.sail:19))],Typ_aux(Typ_id(Id_aux(Id("int"),model/riscv_platform.sail:19)),model/riscv_platform.sail:19),Effect_aux(Effect_set([]),model/riscv_platform.sail:19)),model/riscv_platform.sail:19)),model/riscv_platform.sail:19))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_ram_base"),model/riscv_platform.sail:22),[c: "plat_ram_base",ocaml: "Platform.dram_base",interpreter: "Platform.dram_base",lem: "plat_ram_base"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:22)),model/riscv_platform.sail:22))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:22)),model/riscv_platform.sail:22)),model/riscv_platform.sail:22))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_ram_size"),model/riscv_platform.sail:23),[c: "plat_ram_size",ocaml: "Platform.dram_size",interpreter: "Platform.dram_size",lem: "plat_ram_size"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:23)),model/riscv_platform.sail:23))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:23)),model/riscv_platform.sail:23)),model/riscv_platform.sail:23))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_enable_pmp"),model/riscv_platform.sail:26),[ocaml: "Platform.enable_pmp",interpreter: "Platform.enable_pmp",c: "plat_enable_pmp",lem: "plat_enable_pmp"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:29)),model/riscv_platform.sail:29))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:29)),model/riscv_platform.sail:29),Effect_aux(Effect_set([]),model/riscv_platform.sail:29)),model/riscv_platform.sail:29)),model/riscv_platform.sail:29))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_enable_dirty_update"),model/riscv_platform.sail:32),[ocaml: "Platform.enable_dirty_update",interpreter: "Platform.enable_dirty_update",c: "plat_enable_dirty_update",lem: "plat_enable_dirty_update"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:35)),model/riscv_platform.sail:35))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:35)),model/riscv_platform.sail:35),Effect_aux(Effect_set([]),model/riscv_platform.sail:35)),model/riscv_platform.sail:35)),model/riscv_platform.sail:35))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_enable_misaligned_access"),model/riscv_platform.sail:40),[ocaml: "Platform.enable_misaligned_access",interpreter: "Platform.enable_misaligned_access",c: "plat_enable_misaligned_access",lem: "plat_enable_misaligned_access"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:43)),model/riscv_platform.sail:43))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:43)),model/riscv_platform.sail:43),Effect_aux(Effect_set([]),model/riscv_platform.sail:43)),model/riscv_platform.sail:43)),model/riscv_platform.sail:43))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_mtval_has_illegal_inst_bits"),model/riscv_platform.sail:46),[ocaml: "Platform.mtval_has_illegal_inst_bits",interpreter: "Platform.mtval_has_illegal_inst_bits",c: "plat_mtval_has_illegal_inst_bits",lem: "plat_mtval_has_illegal_inst_bits"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:49)),model/riscv_platform.sail:49))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:49)),model/riscv_platform.sail:49),Effect_aux(Effect_set([]),model/riscv_platform.sail:49)),model/riscv_platform.sail:49)),model/riscv_platform.sail:49))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_rom_base"),model/riscv_platform.sail:52),[ocaml: "Platform.rom_base",interpreter: "Platform.rom_base",c: "plat_rom_base",lem: "plat_rom_base"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:52)),model/riscv_platform.sail:52))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:52)),model/riscv_platform.sail:52)),model/riscv_platform.sail:52))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_rom_size"),model/riscv_platform.sail:53),[ocaml: "Platform.rom_size",interpreter: "Platform.rom_size",c: "plat_rom_size",lem: "plat_rom_size"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:53)),model/riscv_platform.sail:53))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:53)),model/riscv_platform.sail:53)),model/riscv_platform.sail:53))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_clint_base"),model/riscv_platform.sail:56),[ocaml: "Platform.clint_base",interpreter: "Platform.clint_base",c: "plat_clint_base",lem: "plat_clint_base"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:56)),model/riscv_platform.sail:56))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:56)),model/riscv_platform.sail:56)),model/riscv_platform.sail:56))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_clint_size"),model/riscv_platform.sail:57),[ocaml: "Platform.clint_size",interpreter: "Platform.clint_size",c: "plat_clint_size",lem: "plat_clint_size"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:57)),model/riscv_platform.sail:57))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:57)),model/riscv_platform.sail:57)),model/riscv_platform.sail:57))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_htif_tohost"),model/riscv_platform.sail:60),[ocaml: "Platform.htif_tohost",c: "plat_htif_tohost",lem: "plat_htif_tohost"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:60)),model/riscv_platform.sail:60))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:60)),model/riscv_platform.sail:60)),model/riscv_platform.sail:60))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("plat_htif_tohost"),model/riscv_platform.sail:61),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:61)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("to_bits"),model/riscv_platform.sail:61),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("elf_tohost"),model/riscv_platform.sail:61),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:61)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("int"),model/riscv_platform.sail:13)),model/riscv_platform.sail:13)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:60)),model/riscv_platform.sail:60))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:60)),model/riscv_platform.sail:60)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("phys_mem_segments"),model/riscv_platform.sail:64),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))],Typ_aux(Typ_app(Id_aux(Id("list"),model/riscv_platform.sail:64),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))]),model/riscv_platform.sail:64),Effect_aux(Effect_set([]),model/riscv_platform.sail:64)),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("phys_mem_segments"),model/riscv_platform.sail:65),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:65)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_cons(E_aux(E_tuple([(E_aux(E_app(Id_aux(Id("plat_rom_base"),model/riscv_platform.sail:66),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:66)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("plat_rom_size"),model/riscv_platform.sail:66),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:66)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),E_aux(E_cons(E_aux(E_tuple([(E_aux(E_app(Id_aux(Id("plat_ram_base"),model/riscv_platform.sail:67),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:67)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("plat_ram_size"),model/riscv_platform.sail:67),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:67)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),E_aux(E_list([]),Typ_aux(Typ_app(Id_aux(Id("list"),model/riscv_platform.sail:64),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))]),model/riscv_platform.sail:64))),Typ_aux(Typ_app(Id_aux(Id("list"),model/riscv_platform.sail:64),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))]),model/riscv_platform.sail:64))),Typ_aux(Typ_app(Id_aux(Id("list"),model/riscv_platform.sail:64),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))]),model/riscv_platform.sail:64))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:64)),model/riscv_platform.sail:64))],Typ_aux(Typ_app(Id_aux(Id("list"),model/riscv_platform.sail:64),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vect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"Platform.insns_per_tick",interpreter: "Platform.insns_per_tick",c: "plat_insns_per_tick",lem: "plat_insns_per_tick"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:120)),model/riscv_platform.sail:120))],Typ_aux(Typ_id(Id_aux(Id("int"),model/riscv_platform.sail:120)),model/riscv_platform.sail:120),Effect_aux(Effect_set([]),model/riscv_platform.sail:120)),model/riscv_platform.sail:120)),model/riscv_platform.sail:120))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:123))]),model/riscv_platform.sail:123),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_platform.sail:123))]),model/riscv_platform.sail:123),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_platform.sail:123),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),model/riscv_platform.sail:123))]),model/riscv_platform.sail:123),Id_aux(Id("mtimecmp"),model/riscv_platform.sail:123)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_platform.sail:139)),model/riscv_platform.sail:139),P_aux(P_id(Id_aux(Id("MSIP_BASE"),model/riscv_platform.sail:139)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_platform.sail:139),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_hex("00000"),model/riscv_platform.sail:139)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_platform.sail:140)),model/riscv_platform.sail:140),P_aux(P_id(Id_aux(Id("MTIMECMP_BASE"),model/riscv_platform.sail:140)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_platform.sail:140),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_hex("04000"),model/riscv_platform.sail:140)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_platform.sail:141)),model/riscv_platform.sail:141),P_aux(P_id(Id_aux(Id("MTIMECMP_BASE_HI"),model/riscv_platform.sail:141)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/ris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sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_platform.sail:145),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),model/riscv_platform.sail:145))]),model/riscv_platform.sail:145))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_platform.sail:145),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_platform.sail:145),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_platform.sail:145))]),model/riscv_platform.sail:145),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:145))]),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),model/riscv_platform.sail:145))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("clint_load"),model/riscv_platform.sail:146),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("addr"),model/riscv_platform.sail:146)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("width"),model/riscv_platform.sail:146)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:145)),model/riscv_platform.sail:145)),Unknown))]),Unknown))]),model/riscv_platform.sail:146-199)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("addr"),model/riscv_platform.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("sub_vec"),model/prelude.sail:75),[(E_aux(E_id(Id_aux(Id("addr"),model/riscv_platform.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("plat_clint_base"),model/riscv_platform.sail:147),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:147)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_id(Id_aux(Id("addr"),model/riscv_platform.sail:149)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("MSIP_BASE"),model/riscv_platform.sail:149)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id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x(Id("unit"),model/riscv_platform.sail:247)),model/riscv_platform.sail:247),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:247));(BE_aux(BE_wreg,model/riscv_platform.sail:247))]),model/riscv_platform.sail:247)),model/riscv_platform.sail:247)),model/riscv_platform.sail:247))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("tick_clock"),model/riscv_platform.sail:248),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:248)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mcycle"),model/riscv_platform.sail:249)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:390)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("add_bits_int"),../sail/lib/vector_dec.sail:145),[(E_aux(E_id(Id_aux(Id("mcycle"),model/riscv_platform.sail:249)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:390)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_platform.sail:249)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:390)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mtime"),model/riscv_platform.sail:250)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("add_bits_int"),../sail/lib/vector_dec.sail:145),[(E_aux(E_id(Id_aux(Id("mtime"),model/riscv_platform.sail:250)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_platform.sail:250)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("clint_dispatch"),model/riscv_platform.sail:251),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:251)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:201)),model/riscv_platform.sail:201)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:247)),model/riscv_platform.sail:247))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:247)),model/riscv_platform.sail:247))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:247)),model/riscv_platform.sail:247),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:247));(BE_aux(BE_wreg,model/riscv_platform.sail:247))]),model/riscv_platform.sail:247)),model/riscv_platform.sail:247)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_term_write"),model/riscv_platform.sail:256),[ocaml: "Platform.term_write",c: "plat_term_write",lem: "plat_term_write"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_platform.sail:256)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:256)),model/riscv_platform.sail:256),Effect_aux(Effect_set([]),model/riscv_platform.sail:256)),model/riscv_platform.sail:256)),model/riscv_platform.sail:256))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("plat_term_read"),model/riscv_platform.sail:257),[ocaml: "Platform.term_read",c: "plat_term_read",lem: "plat_term_read"],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:257)),model/riscv_platform.sail:257))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_platform.sail:257)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),model/riscv_platform.sail:257)),model/riscv_platform.sail:257)),model/riscv_platform.sail:257))));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_htif_cmd"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_htif_cmd"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_htif_cmd"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_htif_cmd"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_htif_cmd_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_htif_cmd_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_htif_cmd_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_htif_cmd_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_htif_cmd_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_htif_cmd_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_htif_cmd_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_htif_cmd_bits"),:1));(Id_aux(Id("_set_htif_cmd_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_htif_cmd_device"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_htif_cmd_device"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(56),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(56),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_htif_cmd_device"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_htif_cmd_device"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(56),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_htif_cmd_device"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_htif_cmd_device"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(56),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_device"),:1),[(Id_aux(Id("_update_htif_cmd_device"),:1))]));(DEF_overload(Id_aux(Id("_mod_device"),:1),[(Id_aux(Id("_get_htif_cmd_device"),:1));(Id_aux(Id("_set_htif_cmd_device"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_htif_cmd_cmd"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_htif_cmd_cmd"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(48),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(48),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_htif_cmd_cmd"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_htif_cmd_cmd"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(48),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_htif_cmd_cmd"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_htif_cmd_cmd"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(48),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_cmd"),:1),[(Id_aux(Id("_update_htif_cmd_cmd"),:1))]));(DEF_overload(Id_aux(Id("_mod_cmd"),:1),[(Id_aux(Id("_get_htif_cmd_cmd"),:1));(Id_aux(Id("_set_htif_cmd_cmd"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_htif_cmd_payload"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_htif_cmd_payload"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_htif_cmd_payload"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_htif_cmd_payload"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("htif_cmd_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(47),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_htif_cmd_payload"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_htif_cmd_payload"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("htif_cmd_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1)),Id_aux(Id("htif_cmd_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(47),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("htif_cmd"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_payload"),:1),[(Id_aux(Id("_update_htif_cmd_payload"),:1))]));(DEF_overload(Id_aux(Id("_mod_payload"),:1),[(Id_aux(Id("_get_htif_cmd_payload"),:1));(Id_aux(Id("_set_htif_cmd_payload"),:1))]));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:267))]),model/riscv_platform.sail:267),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_platform.sail:267))]),model/riscv_platform.sail:267),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_platform.sail:267),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:267)),model/riscv_platform.sail:267))]),model/riscv_platform.sail:267),Id_aux(Id("htif_tohost"),model/riscv_platform.sail:267)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:267)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:268))]),model/riscv_platform.sail:268),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_platform.sail:268))]),model/riscv_platform.sail:268),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:268)),model/riscv_platform.sail:268),Id_aux(Id("htif_done"),model/riscv_platform.sail:268)),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:268)),model/riscv_platform.sail:268))));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:269))]),model/riscv_platform.sail:269),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_platform.sail:269))]),model/riscv_platform.sail:269),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_platform.sail:269),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:269)),model/riscv_platform.sail:269))]),model/riscv_platform.sail:269),Id_aux(Id("htif_exit_code"),model/riscv_platform.sail:269)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("htif_load"),model/riscv_platform.sail:277),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_platform.sail:277),Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),model/riscv_platform.sail:277));(QI_aux(QI_constraint(NC_aux(NC_bounded_gt(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277),Nexp_aux(Nexp_constant(0),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),model/riscv_platform.sail:277))]),model/riscv_platform.sail:277),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_platform.sail:277),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),model/riscv_platform.sail:277))]),model/riscv_platform.sail:277))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_platform.sail:277),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_platform.sail:277),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_platform.sail:277))]),model/riscv_platform.sail:277),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:277))]),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),model/riscv_platform.sail:277))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("htif_load"),model/riscv_platform.sail:278),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("paddr"),model/riscv_platform.sail:278)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("width"),model/riscv_platform.sail:278)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:277)),model/riscv_platform.sail:277)),Unknown))]),Unknown))]),model/riscv_platform.sail:278-289)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("get_config_print_platform"),model/riscv_platform.sail:279),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:279)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:109)),model/prelude.sail:109)),E_aux(E_app(Id_aux(Id("print_platform"),model/riscv_platform.sail:280),[(E_aux(E_app(Id_aux(Id("concat_str"),model/prelude.sail:69),[(E_aux(E_lit(L_aux(L_string("htif["),model/riscv_platform.sail:280)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("concat_str"),model/prelude.sail:69),[(E_aux(E_app(Id_aux(Id("string_of_bits"),model/prelude.sail:63),[(E_aux(E_id(Id_aux(Id("paddr"),model/riscv_platform.sail:280)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/prelude.sail:55)),model/prelude.sail:55)));(E_aux(E_app(Id_aux(Id("concat_str"),model/prelude.sail:69),[(E_aux(E_lit(L_aux(L_string("] -> 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tick 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_aux(Id("E_SAMO_Access_Fault"),model/riscv_platform.sail:366),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:366)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_sys_control.sail:488),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:361)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_platform.sail:361),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),model/riscv_platform.sail:361))]),model/riscv_platform.sail:361))),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_platform.sail:361),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),model/riscv_platform.sail:361))]),model/riscv_platform.sail:361))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),model/riscv_platform.sail:361),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),model/riscv_platform.sail:361))]),model/riscv_platform.sail:361));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_platform.sail:361),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_platform.sail:361),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:361)),model/riscv_platform.sail:361)),model/riscv_platform.sail:361))]),model/riscv_platform.sail:361),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_platform"),model/riscv_platform.sail:370),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:370)),model/riscv_platform.sail:370),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_platform.sail:267))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:370)),model/riscv_platform.sail:370)),model/riscv_platform.sail:370),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_platform"),model/riscv_platform.sail:370),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:370)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("htif_tohost"),model/riscv_platform.sail:371)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:267)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_platform.sail:371),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_platform.sail:371)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:267)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("htif_done"),model/riscv_platform.sail:372)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_false,model/riscv_platform.sail:372)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("htif_exit_code"),model/riscv_platform.sail:373)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_platform.sail:373),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_platform.sail:373)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:269)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:370)),model/riscv_platform.sail:370))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:370)),model/riscv_platform.sail:370),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("tick_platform"),model/riscv_platform.sail:376),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:376)),model/riscv_platform.sail:376),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_platform.sail:332));(BE_aux(BE_wreg,model/riscv_platform.sail:332))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:376)),model/riscv_platform.sail:376)),model/riscv_platform.sail:376),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("tick_platform"),model/riscv_platform.sail:376),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:376)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("htif_tick"),model/riscv_platform.sail:377),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:377)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:332)),model/riscv_platform.sail:332)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:376)),model/riscv_platform.sail:376))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:376)),model/riscv_platform.sail:376),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("handle_illegal"),model/riscv_platform.sail:382),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_types.sail:248));(BE_aux(BE_rreg,model/riscv_sys_regs.sail:5));(BE_aux(BE_wreg,:1))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)),model/riscv_platform.sail:382),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("handle_illegal"),model/riscv_platform.sail:382),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:382)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("info"),model/riscv_platform.sail:383)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown)),E_aux(E_if(E_aux(E_app(Id_aux(Id("plat_mtval_has_illegal_inst_bits"),model/riscv_platform.sail:383),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:383)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_platform.sail:49)),model/riscv_platform.sail:49)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_platform.sail:384),[(E_aux(E_id(Id_aux(Id("instbits"),model/riscv_platform.sail:384)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("None"),model/riscv_platform.sail:385),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:385)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_platform.sail:386)),model/riscv_platform.sail:386),P_aux(P_id(Id_aux(Id("t"),model/riscv_platform.sail:386)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_platform.sail:386)),model/riscv_platform.sail:386))),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_platform.sail:386)),model/riscv_platform.sail:386)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("trap"),model/riscv_platform.sail:386),E_aux(E_app(Id_aux(Id("E_Illegal_Instr"),model/riscv_platform.sail:386),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:386)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(FE_aux(FE_Fexp(Id_aux(Id("excinfo"),model/riscv_platform.sail:387),E_aux(E_id(Id_aux(Id("info"),model/riscv_platform.sail:387)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),None));(FE_aux(FE_Fexp(Id_aux(Id("ext"),model/riscv_platform.sail:388),E_aux(E_app(Id_aux(Id("None"),model/riscv_platform.sail:388),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:388)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_platform.sail:386)),model/riscv_platform.sail:386))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_platform.sail:389),[(E_aux(E_app(Id_aux(Id("exception_handler"),model/riscv_platform.sail:389),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_platform.sail:389)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_app(Id_aux(Id("CTL_TRAP"),model/riscv_platform.sail:389),[(E_aux(E_id(Id_aux(Id("t"),model/riscv_platform.sail:389)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_platform.sail:386)),model/riscv_platform.sail:386)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_platform.sail:389)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("platform_wfi"),model/riscv_platform.sail:394),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:391));(BE_aux(BE_wreg,model/riscv_sys_regs.sail:391))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394)),model/riscv_platform.sail:394),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("platform_wfi"),model/riscv_platform.sail:394),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_platform.sail:394)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("cancel_reservation"),model/riscv_platform.sail:395),[(E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:395)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:140)),model/riscv_sys_control.sail:140)));(E_aux(E_if(E_aux(E_app(Id_aux(Operator("<_u"),model/riscv_platform.sail:399),[(E_aux(E_id(Id_aux(Id("mtime"),model/riscv_platform.sail:399)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:391)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("mtimecmp"),model/riscv_platform.sail:399)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:149)),model/prelude.sail:149)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mtime"),model/riscv_platform.sail:400)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("mtimecmp"),model/riscv_platform.sail:400)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("mcycle"),model/riscv_platform.sail:401)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_id(Id_aux(Id("mtimecmp"),model/riscv_platform.sail:401)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_platform.sail:123)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394)),E_aux(E_lit(L_aux(L_unit,model/riscv_platform.sail:402)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:394)),model/riscv_platform.sail:394),Effect_aux(Effect_set([]),Unknown)),Unknown)))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il:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("width"),model/riscv_mem.sail:207)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("value"),model/riscv_mem.sail:207)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_mem.sail:206),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("aq"),model/riscv_mem.sail:207)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5122#"),Unknown)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("rl"),model/riscv_mem.sail:207)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5123#"),Unknown)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("con"),model/riscv_mem.sail:207)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5124#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_mem.sail:206),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5122#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5123#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5124#"),Unknown)),Unknown)),Unknown))]),Unknown))]),model/riscv_mem.sail:207-208)),E_aux(E_app(Id_aux(Id("mem_write_value_meta"),model/riscv_mem.sail:208),[(E_aux(E_id(Id_aux(Id("paddr"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("width"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("value"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_mem.sail:206),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("default_write_acc"),model/riscv_mem.sail:208)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)));(E_aux(E_id(Id_aux(Id("default_meta"),model/riscv_mem.sail:208)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude_mem_metadata.sail:5)),model/prelude_mem_metadata.sail:5)));(E_aux(E_id(Id_aux(Id("aq"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5122#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("rl"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5123#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("con"),model/riscv_mem.sail:208)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5124#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_mem.sail:187),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_mem.sail:187)),model/riscv_mem.sail:187)),model/riscv_mem.sail:187))]),model/riscv_mem.sail:187))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_mem.sail:206),Nexp_aux(Nexp_var(Kid_aux(Var("'n"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5122#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5123#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5124#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_mem.sail:206),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)),model/riscv_mem.sail:206))]),model/riscv_mem.sail:206),Effect_aux(Effect_set([(BE_aux(BE_wmv,model/riscv_mem.sail:206));(BE_aux(BE_wmvt,model/riscv_mem.sail:206));(BE_aux(BE_rreg,model/riscv_mem.sail:206));(BE_aux(BE_wreg,model/riscv_mem.sail:206));(BE_aux(BE_escape,model/riscv_mem.sail:206))]),model/riscv_mem.sail:206)),model/riscv_mem.sail:206)))]),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_PTE_Bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_PTE_Bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_PTE_Bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_PTE_Bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_PTE_Bits_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_PTE_Bits_bits"),:1));(Id_aux(Id("_set_PTE_Bits_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_D"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(7),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_D"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_D"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_D"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_D"),:1),[(Id_aux(Id("_update_PTE_Bits_D"),:1))]));(DEF_overload(Id_aux(Id("_mod_D"),:1),[(Id_aux(Id("_get_PTE_Bits_D"),:1));(Id_aux(Id("_set_PTE_Bits_D"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_A"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(6),Unknown),Nexp_aux(Nexp_constant(6),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_A"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_A"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(6),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_A"),:1),[(Id_aux(Id("_update_PTE_Bits_A"),:1))]));(DEF_overload(Id_aux(Id("_mod_A"),:1),[(Id_aux(Id("_get_PTE_Bits_A"),:1));(Id_aux(Id("_set_PTE_Bits_A"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_G"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(5),Unknown),Nexp_aux(Nexp_constant(5),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_G"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_G"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_G"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(5),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_G"),:1),[(Id_aux(Id("_update_PTE_Bits_G"),:1))]));(DEF_overload(Id_aux(Id("_mod_G"),:1),[(Id_aux(Id("_get_PTE_Bits_G"),:1));(Id_aux(Id("_set_PTE_Bits_G"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_U"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(4),Unknown),Nexp_aux(Nexp_constant(4),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_U"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_U"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_U"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(4),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_U"),:1),[(Id_aux(Id("_update_PTE_Bits_U"),:1))]));(DEF_overload(Id_aux(Id("_mod_U"),:1),[(Id_aux(Id("_get_PTE_Bits_U"),:1));(Id_aux(Id("_set_PTE_Bits_U"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_X"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(3),Unknown),Nexp_aux(Nexp_constant(3),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_X"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_X"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(3),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_X"),:1),[(Id_aux(Id("_update_PTE_Bits_X"),:1))]));(DEF_overload(Id_aux(Id("_mod_X"),:1),[(Id_aux(Id("_get_PTE_Bits_X"),:1));(Id_aux(Id("_set_PTE_Bits_X"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_W"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(2),Unknown),Nexp_aux(Nexp_constant(2),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_W"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_W"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(2),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_W"),:1),[(Id_aux(Id("_update_PTE_Bits_W"),:1))]));(DEF_overload(Id_aux(Id("_mod_W"),:1),[(Id_aux(Id("_get_PTE_Bits_W"),:1));(Id_aux(Id("_set_PTE_Bits_W"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_R"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(1),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_R"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_R"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_R"),:1),[(Id_aux(Id("_update_PTE_Bits_R"),:1))]));(DEF_overload(Id_aux(Id("_mod_R"),:1),[(Id_aux(Id("_get_PTE_Bits_R"),:1));(Id_aux(Id("_set_PTE_Bits_R"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_PTE_Bits_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_PTE_Bits_V"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_PTE_Bits_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_PTE_Bits_V"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("PTE_Bits_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_PTE_Bits_V"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_PTE_Bits_V"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("PTE_Bits_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),Id_aux(Id("PTE_Bits_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(0),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_V"),:1),[(Id_aux(Id("_update_PTE_Bits_V"),:1))]));(DEF_overload(Id_aux(Id("_mod_V"),:1),[(Id_aux(Id("_get_PTE_Bits_V"),:1));(Id_aux(Id("_set_PTE_Bits_V"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("isPTEPtr"),model/riscv_pte.sail:21),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("pteAttribs"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21));(Typ_aux(Typ_id(Id_aux(Id("extPte"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21)),model/riscv_pte.sail:21),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("isPTEPtr"),model/riscv_pte.sail:21),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("pteAttribs"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21),P_aux(P_id(Id_aux(Id("p"),model/riscv_pte.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("extPte"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21),P_aux(P_id(Id_aux(Id("ext"),model/riscv_pte.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pte.sail:21-24)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("a"),model/riscv_pte.sail:22)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_PTE_Bits"),model/riscv_pte.sail:22),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_pte.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_PTE_Bits_R"),:1),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_pte.sail:23)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_pte.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)));(E_aux(E_app(Id_aux(Id("and_bool"),../sail/lib/flow.sail:46),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_PTE_Bits_W"),:1),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_pte.sail:23)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_pte.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)));(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_PTE_Bits_X"),:1),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_pte.sail:23)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("0"),model/riscv_pte.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:21)),model/riscv_pte.sail:21),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("isInvalidPTE"),model/riscv_pte.sail:26),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("pteAttribs"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26));(Typ_aux(Typ_id(Id_aux(Id("extPte"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26)),model/riscv_pte.sail:26),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("isInvalidPTE"),model/riscv_pte.sail:26),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("pteAttribs"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26),P_aux(P_id(Id_aux(Id("p"),model/riscv_pte.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("extPte"),model/riscv_pte.sail:26)),model/riscv_pte.sail:26),P_aux(P_id(Id_aux(Id("ext"),model/riscv_pte.sail:26)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),model/riscv_pte.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_pte.sail:26-29)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("a"),model/riscv_pte.sail:27)),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_PTE_Bits"),model/riscv_pte.sail:27),[(E_aux(E_id(Id_aux(Id("p"),model/riscv_pte.sail:27)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_pte.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("PTE_Bits"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(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,model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("PTW_Access"),model/riscv_ptw.sail:4),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)));(E_aux(E_app(Id_aux(Id("PTW_Invalid_PTE"),model/riscv_ptw.sail:5),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)));(E_aux(E_app(Id_aux(Id("PTW_No_Permission"),model/riscv_ptw.sail:6),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)));(E_aux(E_app(Id_aux(Id("PTW_Misaligned"),model/riscv_ptw.sail:7),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)));(E_aux(E_app(Id_aux(Id("PTW_PTE_Update"),model/riscv_ptw.sail:8),[(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ptw.sail:4)),model/riscv_ptw.sail:4)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)));(E_aux(E_app(Id_aux(Id("PTW_Ext_Error"),model/riscv_ptw.sail:9),[(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:15)),model/riscv_types_ext.sail:15)))]),Typ_aux(Typ_app(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3),[]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3)),:1))),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:3)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("ptw_error_to_str"),model/riscv_ptw.sail:12),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12),Effect_aux(Effect_set([]),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ptw_error_to_str"),model/riscv_ptw.sail:13),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("e"),model/riscv_ptw.sail:13)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_case(E_aux(E_id(Id_aux(Id("e"),model/riscv_ptw.sail:14)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_Access"),model/riscv_ptw.sail:15),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:15)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("mem-access-error"),model/riscv_ptw.sail:15)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_Invalid_PTE"),model/riscv_ptw.sail:16),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:16)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("invalid-pte"),model/riscv_ptw.sail:16)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_No_Permission"),model/riscv_ptw.sail:17),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:17)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("no-permission"),model/riscv_ptw.sail:17)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_Misaligned"),model/riscv_ptw.sail:18),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:18)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("misaligned-superpage"),model/riscv_ptw.sail:18)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_PTE_Update"),model/riscv_ptw.sail:19),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:19)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("pte-update-needed"),model/riscv_ptw.sail:19)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("PTW_Ext_Error"),model/riscv_ptw.sail:20),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_ptw.sail:20)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:15)),model/riscv_types_ext.sail:15)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)),E_aux(E_lit(L_aux(L_string("extension-error"),model/riscv_ptw.sail:20)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12),Effect_aux(Effect_set([]),model/riscv_ptw.sail:12)),model/riscv_ptw.sail:12)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_ptw.sail:23),[(Id_aux(Id("ptw_error_to_str"),model/riscv_ptw.sail:23))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("translationException"),model/riscv_ptw.sail:26),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))],Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("translationException"),model/riscv_ptw.sail:26),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("ext_access_type"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26),P_aux(P_id(Id_aux(Id("a"),model/riscv_ptw.sail:26)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26))),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26),P_aux(P_id(Id_aux(Id("f"),model/riscv_ptw.sail:26)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26-42)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:27)),model/riscv_ptw.sail:27),P_aux(P_id(Id_aux(Id("e"),model/riscv_ptw.sail:27)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:27)),model/riscv_ptw.sail:27))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:27)),model/riscv_ptw.sail:27)),E_aux(E_case(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("a"),model/riscv_ptw.sail:28)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(E_aux(E_id(Id_aux(Id("f"),model/riscv_ptw.sail:28)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vme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_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_Load_Access_Fault"),model/riscv_ptw.sail:32),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:32)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_app(Id_aux(Id("Read"),model/riscv_ptw.sail:33),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_ptw.sail:33)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:101)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_Load_Page_Fault"),model/riscv_ptw.sail:33),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:33)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_app(Id_aux(Id("Write"),model/riscv_ptw.sail:34),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_ptw.sail:34)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:102)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_app(Id_aux(Id("PTW_Access"),model/riscv_ptw.sail:34),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:34)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_SAMO_Access_Fault"),model/riscv_ptw.sail:34),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:34)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_app(Id_aux(Id("Write"),model/riscv_ptw.sail:35),[(P_aux(P_id(Id_aux(Id("Data"),model/riscv_ptw.sail:35)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_types.sail:102)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_SAMO_Page_Fault"),model/riscv_ptw.sail:35),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:35)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_app(Id_aux(Id("Execute"),model/riscv_ptw.sail:36),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:36)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_app(Id_aux(Id("PTW_Access"),model/riscv_ptw.sail:36),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:36)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_Fetch_Access_Fault"),model/riscv_ptw.sail:36),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:36)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_app(Id_aux(Id("Execute"),model/riscv_ptw.sail:37),[(P_aux(P_lit(L_aux(L_unit,model/riscv_ptw.sail:37)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26)));(P_aux(P_wild,Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))]),Unknown)),E_aux(E_app(Id_aux(Id("E_Fetch_Page_Fault"),model/riscv_ptw.sail:37),[(E_aux(E_lit(L_aux(L_unit,model/riscv_ptw.sail:37)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:27)),model/riscv_ptw.sail:27))),None),E_aux(E_block([(E_aux(E_id(Id_aux(Id("e"),model/riscv_ptw.sail:40)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:27)),model/riscv_ptw.sail:27)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26)))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_ptw.sail:26),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_ptw.sail:26))]),model/riscv_ptw.sail:26));(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26))],Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_ptw.sail:26)),model/riscv_ptw.sail:26),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PAGESIZE_BITS"),model/riscv_vmem_common.sail:9)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(12),model/riscv_vmem_common.sail:9)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown))),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("curAsid32"),model/riscv_vmem_common.sail:22),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:22),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),model/riscv_vmem_common.sail:22))]),model/riscv_vmem_common.sail:22))],Typ_aux(Typ_id(Id_aux(Id("asid32"),model/riscv_vmem_common.sail:22)),model/riscv_vmem_common.sail:22),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("asid32"),model/riscv_vmem_common.sail:22)),model/riscv_vmem_common.sail:22)),model/riscv_vmem_common.sail:22),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("curAsid32"),model/riscv_vmem_common.sail:22),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:22),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),model/riscv_vmem_common.sail:22))]),model/riscv_vmem_common.sail:22),P_aux(P_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:23)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Satp32"),model/riscv_vmem_common.sail:23),[(E_aux(E_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("_get_Satp32_Asid"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:24)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/riscv_vmem_common.sail:20)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/riscv_vmem_common.sail:20)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/riscv_vmem_common.sail:20)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:22)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),model/riscv_vmem_common.sail:20)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("curPTB32"),model/riscv_vmem_common.sail:28),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:28),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),model/riscv_vmem_common.sail:28))]),model/riscv_vmem_common.sail:28))],Typ_aux(Typ_id(Id_aux(Id("paddr32"),model/riscv_vmem_common.sail:28)),model/riscv_vmem_common.sail:28),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("paddr32"),model/riscv_vmem_common.sail:28)),model/riscv_vmem_common.sail:28)),model/riscv_vmem_common.sail:28),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("curPTB32"),model/riscv_vmem_common.sail:28),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:28),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),model/riscv_vmem_common.sail:28))]),model/riscv_vmem_common.sail:28),P_aux(P_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:28)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Satp32"),model/riscv_vmem_common.sail:29)),model/riscv_vmem_common.sail:29),P_aux(P_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:29)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),model/riscv_vmem_common.sail:29)),model/riscv_vmem_common.sail:29))),Typ_aux(Typ_id(Id_aux(Id("Satp32"),model/riscv_vmem_common.sail:29)),model/riscv_vmem_common.sail:29)),E_aux(E_app(Id_aux(Id("Mk_Satp32"),model/riscv_vmem_common.sail:29),[(E_aux(E_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:29)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp32"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("shiftl"),model/riscv_vmem_common.sail:30),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_vmem_common.sail:30),[(E_aux(E_lit(L_aux(L_num(34),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("_get_Satp32_PPN"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:30)),Typ_aux(Typ_id(Id_aux(Id("Satp32"),model/riscv_vmem_common.sail:29)),model/riscv_vmem_common.sail:29)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("PAGESIZE_BITS"),model/riscv_vmem_common.sail:30)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_vmem_common.sail:28)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),model/riscv_vmem_common.sail:16)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV32_LEVEL_BITS"),model/riscv_vmem_common.sail:35)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(10),model/riscv_vmem_common.sail:35)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV32_LEVELS"),model/riscv_vmem_common.sail:36)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(2),model/riscv_vmem_common.sail:36)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE32_LOG_SIZE"),model/riscv_vmem_common.sail:37)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(2),model/riscv_vmem_common.sail:37)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE32_SIZE"),model/riscv_vmem_common.sail:38)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(4),model/riscv_vmem_common.sail:38)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV32_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV32_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_Vaddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV32_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV32_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV32_Vaddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV32_Vaddr_bits"),:1));(Id_aux(Id("_set_SV32_Vaddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(19),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(19),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(19),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(19),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(19),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_VPNi"),:1),[(Id_aux(Id("_update_SV32_Vaddr_VPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_VPNi"),:1),[(Id_aux(Id("_get_SV32_Vaddr_VPNi"),:1));(Id_aux(Id("_set_SV32_Vaddr_VPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1)),Id_aux(Id("SV32_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV32_Vaddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV32_Vaddr_PgOfs"),:1));(Id_aux(Id("_set_SV32_Vaddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV32_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV32_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_Paddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV32_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV32_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(33),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(33),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(33),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV32_Paddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV32_Paddr_bits"),:1));(Id_aux(Id("_set_SV32_Paddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(33),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(33),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(33),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV32_Paddr_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV32_Paddr_PPNi"),:1));(Id_aux(Id("_set_SV32_Paddr_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1)),Id_aux(Id("SV32_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(34),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV32_Paddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV32_Paddr_PgOfs"),:1));(Id_aux(Id("_set_SV32_Paddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV32_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV32_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV32_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV32_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV32_PTE_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV32_PTE_bits"),:1));(Id_aux(Id("_set_SV32_PTE_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(31),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(31),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(31),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(21),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(21),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(21),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(22),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV32_PTE_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV32_PTE_PPNi"),:1));(Id_aux(Id("_set_SV32_PTE_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_RSW"),:1),[(Id_aux(Id("_update_SV32_PTE_RSW"),:1))]));(DEF_overload(Id_aux(Id("_mod_RSW"),:1),[(Id_aux(Id("_get_SV32_PTE_RSW"),:1));(Id_aux(Id("_set_SV32_PTE_RSW"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV32_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV32_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV32_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV32_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV32_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV32_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV32_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV32_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1)),Id_aux(Id("SV32_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV32_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_BITS"),:1),[(Id_aux(Id("_update_SV32_PTE_BITS"),:1))]));(DEF_overload(Id_aux(Id("_mod_BITS"),:1),[(Id_aux(Id("_get_SV32_PTE_BITS"),:1));(Id_aux(Id("_set_SV32_PTE_BITS"),:1))]));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("curAsid64"),model/riscv_vmem_common.sail:78),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:78),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),model/riscv_vmem_common.sail:78))]),model/riscv_vmem_common.sail:78))],Typ_aux(Typ_id(Id_aux(Id("asid64"),model/riscv_vmem_common.sail:78)),model/riscv_vmem_common.sail:78),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("asid64"),model/riscv_vmem_common.sail:78)),model/riscv_vmem_common.sail:78)),model/riscv_vmem_common.sail:78),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("curAsid64"),model/riscv_vmem_common.sail:78),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:78),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),model/riscv_vmem_common.sail:78))]),model/riscv_vmem_common.sail:78),P_aux(P_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:78)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:79)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Satp64"),model/riscv_vmem_common.sail:79),[(E_aux(E_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:79)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("_get_Satp64_Asid"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:80)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:78)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("curPTB64"),model/riscv_vmem_common.sail:84),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:84),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),model/riscv_vmem_common.sail:84))]),model/riscv_vmem_common.sail:84))],Typ_aux(Typ_id(Id_aux(Id("paddr64"),model/riscv_vmem_common.sail:84)),model/riscv_vmem_common.sail:84),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("paddr64"),model/riscv_vmem_common.sail:84)),model/riscv_vmem_common.sail:84)),model/riscv_vmem_common.sail:84),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("curPTB64"),model/riscv_vmem_common.sail:84),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_vmem_common.sail:84),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),model/riscv_vmem_common.sail:84))]),model/riscv_vmem_common.sail:84),P_aux(P_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:84)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:85)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)),E_aux(E_app(Id_aux(Id("Mk_Satp64"),model/riscv_vmem_common.sail:85),[(E_aux(E_id(Id_aux(Id("satp"),model/riscv_vmem_common.sail:85)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("shiftl"),model/riscv_vmem_common.sail:86),[(E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_vmem_common.sail:86),[(E_aux(E_lit(L_aux(L_num(56),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("_get_Satp64_PPN"),:1),[(E_aux(E_id(Id_aux(Id("s"),model/riscv_vmem_common.sail:86)),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("PAGESIZE_BITS"),model/riscv_vmem_common.sail:86)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_common.sail:84)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV39_LEVEL_BITS"),model/riscv_vmem_common.sail:91)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(9),model/riscv_vmem_common.sail:91)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV39_LEVELS"),model/riscv_vmem_common.sail:92)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(3),model/riscv_vmem_common.sail:92)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE39_LOG_SIZE"),model/riscv_vmem_common.sail:93)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(3),model/riscv_vmem_common.sail:93)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE39_SIZE"),model/riscv_vmem_common.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(8),model/riscv_vmem_common.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV39_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV39_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_Vaddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV39_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV39_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(38),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(38),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(38),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV39_Vaddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV39_Vaddr_bits"),:1));(Id_aux(Id("_set_SV39_Vaddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(26),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(26),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(26),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(26),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_VPNi"),:1),[(Id_aux(Id("_update_SV39_Vaddr_VPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_VPNi"),:1),[(Id_aux(Id("_get_SV39_Vaddr_VPNi"),:1));(Id_aux(Id("_set_SV39_Vaddr_VPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1)),Id_aux(Id("SV39_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV39_Vaddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV39_Vaddr_PgOfs"),:1));(Id_aux(Id("_set_SV39_Vaddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV39_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV39_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_Paddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV39_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV39_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV39_Paddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV39_Paddr_bits"),:1));(Id_aux(Id("_set_SV39_Paddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV39_Paddr_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV39_Paddr_PPNi"),:1));(Id_aux(Id("_set_SV39_Paddr_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1)),Id_aux(Id("SV39_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV39_Paddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV39_Paddr_PgOfs"),:1));(Id_aux(Id("_set_SV39_Paddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV39_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV39_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV39_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV39_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV39_PTE_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV39_PTE_bits"),:1));(Id_aux(Id("_set_SV39_PTE_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(54),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Ext"),:1),[(Id_aux(Id("_update_SV39_PTE_Ext"),:1))]));(DEF_overload(Id_aux(Id("_mod_Ext"),:1),[(Id_aux(Id("_get_SV39_PTE_Ext"),:1));(Id_aux(Id("_set_SV39_PTE_Ext"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(53),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV39_PTE_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV39_PTE_PPNi"),:1));(Id_aux(Id("_set_SV39_PTE_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_RSW"),:1),[(Id_aux(Id("_update_SV39_PTE_RSW"),:1))]));(DEF_overload(Id_aux(Id("_mod_RSW"),:1),[(Id_aux(Id("_get_SV39_PTE_RSW"),:1));(Id_aux(Id("_set_SV39_PTE_RSW"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV39_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV39_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV39_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV39_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV39_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV39_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV39_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV39_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1)),Id_aux(Id("SV39_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_BITS"),:1),[(Id_aux(Id("_update_SV39_PTE_BITS"),:1))]));(DEF_overload(Id_aux(Id("_mod_BITS"),:1),[(Id_aux(Id("_get_SV39_PTE_BITS"),:1));(Id_aux(Id("_set_SV39_PTE_BITS"),:1))]));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV48_LEVEL_BITS"),model/riscv_vmem_common.sail:117)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(9),model/riscv_vmem_common.sail:117)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("SV48_LEVELS"),model/riscv_vmem_common.sail:118)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(4),model/riscv_vmem_common.sail:118)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE48_LOG_SIZE"),model/riscv_vmem_common.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(3),model/riscv_vmem_common.sail:119)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown))]),Unknown))),None)));(DEF_val(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("PTE48_SIZE"),model/riscv_vmem_common.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)),E_aux(E_lit(L_aux(L_num(8),model/riscv_vmem_common.sail:120)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown))),None)));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV48_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV48_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_Vaddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV48_Vaddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV48_Vaddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(47),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(47),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Vaddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Vaddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(47),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(47),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(47),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(47),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV48_Vaddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV48_Vaddr_bits"),:1));(Id_aux(Id("_set_SV48_Vaddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(38),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(26),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(26),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Vaddr_VPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Vaddr_VPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(38),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(38),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(26),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(26),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(26),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(27),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_VPNi"),:1),[(Id_aux(Id("_update_SV48_Vaddr_VPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_VPNi"),:1),[(Id_aux(Id("_get_SV48_Vaddr_VPNi"),:1));(Id_aux(Id("_set_SV48_Vaddr_VPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Vaddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Vaddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Vaddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Vaddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1)),Id_aux(Id("SV48_Vaddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Vaddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV48_Vaddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV48_Vaddr_PgOfs"),:1));(Id_aux(Id("_set_SV48_Vaddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV48_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV48_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_Paddr_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV48_Paddr"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV48_Paddr"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Paddr_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Paddr_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV48_Paddr_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV48_Paddr_bits"),:1));(Id_aux(Id("_set_SV48_Paddr_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(55),Unknown),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Paddr_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Paddr_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(55),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(55),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(12),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV48_Paddr_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV48_Paddr_PPNi"),:1));(Id_aux(Id("_set_SV48_Paddr_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_Paddr_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_Paddr_PgOfs"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_Paddr_PgOfs"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_Paddr_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1)),Id_aux(Id("SV48_Paddr_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(11),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(11),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(11),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_Paddr"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PgOfs"),:1),[(Id_aux(Id("_update_SV48_Paddr_PgOfs"),:1))]));(DEF_overload(Id_aux(Id("_mod_PgOfs"),:1),[(Id_aux(Id("_get_SV48_Paddr_PgOfs"),:1));(Id_aux(Id("_set_SV48_Paddr_PgOfs"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_SV48_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),:1),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_SV48_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("Mk_SV48_PTE"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("Mk_SV48_PTE"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_PTE_bits"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_PTE_bits"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_bits"),:1),[(Id_aux(Id("_update_SV48_PTE_bits"),:1))]));(DEF_overload(Id_aux(Id("_mod_bits"),:1),[(Id_aux(Id("_get_SV48_PTE_bits"),:1));(Id_aux(Id("_set_SV48_PTE_bits"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(63),Unknown),Nexp_aux(Nexp_constant(54),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_PTE_Ext"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_PTE_Ext"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(63),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(63),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(54),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(54),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_Ext"),:1),[(Id_aux(Id("_update_SV48_PTE_Ext"),:1))]));(DEF_overload(Id_aux(Id("_mod_Ext"),:1),[(Id_aux(Id("_get_SV48_PTE_Ext"),:1));(Id_aux(Id("_set_SV48_PTE_Ext"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(53),Unknown),Nexp_aux(Nexp_constant(10),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_PTE_PPNi"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_PTE_PPNi"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(53),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(53),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(10),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(10),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(43),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(43),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(43),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(44),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_PPNi"),:1),[(Id_aux(Id("_update_SV48_PTE_PPNi"),:1))]));(DEF_overload(Id_aux(Id("_mod_PPNi"),:1),[(Id_aux(Id("_get_SV48_PTE_PPNi"),:1));(Id_aux(Id("_set_SV48_PTE_PPNi"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(9),Unknown),Nexp_aux(Nexp_constant(8),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_PTE_RSW"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_PTE_RSW"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(9),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(8),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(1),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_RSW"),:1),[(Id_aux(Id("_update_SV48_PTE_RSW"),:1))]));(DEF_overload(Id_aux(Id("_mod_RSW"),:1),[(Id_aux(Id("_get_SV48_PTE_RSW"),:1));(Id_aux(Id("_set_SV48_PTE_RSW"),:1))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_get_SV48_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_get_SV48_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:1)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_set_SV48_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_set_SV48_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("r_ref"),:1)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)));(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-5)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("r"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),E_aux(E_app(Id_aux(Id("__bitfield_deref"),:2),[(E_aux(E_id(Id_aux(Id("r_ref"),:2)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1)))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_field(LEXP_aux(LEXP_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("r"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67)),Id_aux(Id("SV48_PTE_chunk_0"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_deref(E_aux(E_id(Id_aux(Id("r_ref"),:4)),Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_id(Id_aux(Id("r"),:4)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),../sail/lib/flow.sail:67))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("register"),:1),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),:1))]),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("_update_SV48_PTE_BITS"),:1),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)),:1))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("_update_SV48_PTE_BITS"),:1),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("v"),:1)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)));(P_aux(P_id(Id_aux(Id("x"),:1)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))]),:1-3)),E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),E_aux(E_record_update(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),[(FE_aux(FE_Fexp(Id_aux(Id("SV48_PTE_chunk_0"),:2),E_aux(E_app(Id_aux(Id("vector_update_subrange"),Unknown),[(E_aux(E_field(E_aux(E_id(Id_aux(Id("v"),:2)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1)),Id_aux(Id("SV48_PTE_chunk_0"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:2),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),:2));(A_aux(A_order(Ord_aux(Ord_dec,:2)),:2))]),:2)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("x"),:2)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_num(7),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),:2)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(7),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:2)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None),E_aux(E_id(Id_aux(Id("v"),:3)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))],Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),:1)),:1),Effect_aux(Effect_set([]),:1)),:1)))]),None)));(DEF_overload(Id_aux(Id("update_BITS"),:1),[(Id_aux(Id("_update_SV48_PTE_BITS"),:1))]));(DEF_overload(Id_aux(Id("_mod_BITS"),:1),[(Id_aux(Id("_get_SV48_PTE_BITS"),:1));(Id_aux(Id("_set_SV48_PTE_BITS"),:1))]));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_PTW_Result"),model/riscv_vmem_common.sail:149),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_vmem_common.sail:149),Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),model/riscv_vmem_common.sail:149)),model/riscv_vmem_common.sail:149));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_vmem_common.sail:149),Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),model/riscv_vmem_common.sail:149)),model/riscv_vmem_common.sail:149))]),model/riscv_vmem_common.sail:149),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),Unknown));(Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("PTW_Result"),model/riscv_vmem_common.sail:149),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_PTW_Result"),model/riscv_vmem_common.sail:149),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("typ_paddr"),model/riscv_vmem_common.sail:149)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),Unknown)));(P_aux(P_id(Id_aux(Id("typ_pte"),model/riscv_vmem_common.sail:149)),Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),Unknown));(Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),Unknown))]),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_common.sail:151)),model/riscv_vmem_common.sail:151),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_common.sail:151)),model/riscv_vmem_common.sail:151))),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_common.sail:151)),model/riscv_vmem_common.sail:151)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_common.sail:151)),model/riscv_vmem_common.sail:151))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5619#"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_ptw"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_2"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_3"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_u_3"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_5"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_4"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150),P_aux(P_id(Id_aux(Id("u_6"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("PTW_Success"),model/riscv_vmem_common.sail:150),[(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("u_5"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)));(E_aux(E_id(Id_aux(Id("u_6"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)));(E_aux(E_id(Id_aux(Id("u_4"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:150)),model/riscv_vmem_common.sail:150)));(E_aux(E_id(Id_aux(Id("u_3"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_u_3"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5619#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux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ult"),model/riscv_vmem_common.sail:149),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:149)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'pte"),model/riscv_vmem_common.sail:149)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_TR_Result"),model/riscv_vmem_common.sail:156),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_vmem_common.sail:156),Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:156));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_type,model/riscv_vmem_common.sail:156),Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:156))]),model/riscv_vmem_common.sail:156),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown));(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_TR_Result"),model/riscv_vmem_common.sail:156),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("typ_paddr"),model/riscv_vmem_common.sail:156)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)));(P_aux(P_id(Id_aux(Id("typ_failure"),model/riscv_vmem_common.sail:156)),Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown));(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown))]),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_ptw"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:158)),model/riscv_vmem_common.sail:158),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:158)),model/riscv_vmem_common.sail:158))),Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:158)),model/riscv_vmem_common.sail:158)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:158)),model/riscv_vmem_common.sail:158))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157),P_aux(P_id(Id_aux(Id("u_2"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157))),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157))),None),E_aux(E_app(Id_aux(Id("internal_pick"),Unknown),[(E_aux(E_list([(E_aux(E_app(Id_aux(Id("TR_Address"),model/riscv_vmem_common.sail:157),[(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("u_2"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:157)),model/riscv_vmem_common.sail:157)));(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:157));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))]),model/riscv_vmem_common.sail:157)))]),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown)));(E_aux(E_app(Id_aux(Id("TR_Failure"),model/riscv_vmem_common.sail:158),[(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:158)),model/riscv_vmem_common.sail:158)));(E_aux(E_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),model/riscv_vmem_common.sail:158));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))]),model/riscv_vmem_common.sail:158)))]),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("list"),:1),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),:1)),:1))]),:1)))]),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),:1))),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown));(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown))],Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_common.sail:156),[(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'paddr"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown));(A_aux(A_typ(Typ_aux(Typ_var(Kid_aux(Var("'failure"),model/riscv_vmem_common.sail:156)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_TLB_Entry"),model/riscv_vmem_tlb.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:3),Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:3),Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:3),Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:3),Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3)),model/riscv_vmem_tlb.sail:3))]),model/riscv_vmem_tlb.sail:3),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:3),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_TLB_Entry"),model/riscv_vmem_tlb.sail:3),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("atom_asidlen"),model/riscv_vmem_tlb.sail:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("atom_valen"),model/riscv_vmem_tlb.sail:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("atom_palen"),model/riscv_vmem_tlb.sail:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown)));(P_aux(P_id(Id_aux(Id("atom_ptelen"),model/riscv_vmem_tlb.sail:3)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown))]),Unknown)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("asid"),model/riscv_vmem_tlb.sail:4),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("global"),model/riscv_vmem_tlb.sail:5),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_tlb.sail:5)),model/riscv_vmem_tlb.sail:5))),None));(FE_aux(FE_Fexp(Id_aux(Id("vAddr"),model/riscv_vmem_tlb.sail:6),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("pAddr"),model/riscv_vmem_tlb.sail:7),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("vMatchMask"),model/riscv_vmem_tlb.sail:8),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("vAddrMask"),model/riscv_vmem_tlb.sail:9),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("pte"),model/riscv_vmem_tlb.sail:10),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("pteAddr"),model/riscv_vmem_tlb.sail:11),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(FE_aux(FE_Fexp(Id_aux(Id("age"),model/riscv_vmem_tlb.sail:12),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_tlb.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:3),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:3),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:3)),Unknown)),Unknown))]),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("make_TLB_Entry"),model/riscv_vmem_tlb.sail:16),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:16),Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:16),Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:16),Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:16),Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16));(QI_aux(QI_constraint(NC_aux(NC_bounded_gt(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16),Nexp_aux(Nexp_constant(0),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16)),model/riscv_vmem_tlb.sail:16))]),model/riscv_vmem_tlb.sail:16),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:17)),model/riscv_vmem_tlb.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_tlb.sail:17)),model/riscv_vmem_tlb.sail:17));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:17)),model/riscv_vmem_tlb.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:17)),model/riscv_vmem_tlb.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:17)),model/risc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l/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:18))]),model/riscv_vmem_tlb.sail:18),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_tlb.sail:18))]),model/riscv_vmem_tlb.sail:18)),model/riscv_vmem_tlb.sail:16-18)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("match_TLB_Entry"),model/riscv_vmem_tlb.sail:37),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:37),Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:37),Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:37),Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37));(QI_aux(QI_id(KOpt_aux(KOpt_kind(K_aux(K_int,model/riscv_vmem_tlb.sail:37),Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37)),model/riscv_vmem_tlb.sail:37))]),model/riscv_vmem_tlb.sail:37),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:38),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38))]),model/riscv_vmem_tlb.sail:38));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_tlb.sail:39)),model/riscv_vmem_tlb.sail:39),Effect_aux(Effect_set([]),model/riscv_vmem_tlb.sail:37-39)),model/riscv_vmem_tlb.sail:37-39)),model/riscv_vmem_tlb.sail:37-39))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("match_TLB_Entry"),model/riscv_vmem_tlb.sail:40),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("ent"),model/riscv_vmem_tlb.sail:40)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:38),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'palen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38));(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ptelen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38))]),model/riscv_vmem_tlb.sail:38)));(P_aux(P_id(Id_aux(Id("asid"),model/riscv_vmem_tlb.sail:40)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'asidlen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("vaddr"),model/riscv_vmem_tlb.sail:40)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'valen"),model/riscv_vmem_tlb.sail:38)),model/riscv_vmem_tlb.sail:38)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_d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xp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:83))]),model/riscv_vmem_sv39.sail:83))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("lookup_TLB39"),model/riscv_vmem_sv39.sail:85),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:85),[(A_aux(A_typ(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:85)),model/riscv_vmem_sv39.sail:85));(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:85)),model/riscv_vmem_sv39.sail:85))]),model/riscv_vmem_sv39.sail:85),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_sv39.sail:85))]),model/riscv_vmem_sv39.sail:85)),model/riscv_vmem_sv39.sail:85)),model/riscv_vmem_sv39.sail:85))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("lookup_TLB39"),model/riscv_vmem_sv39.sail:86),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("asid"),model/riscv_vmem_sv39.sail:86)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("vaddr"),model/riscv_vmem_sv39.sail:86)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_vmem_sv39.sail:86-90)),E_aux(E_case(E_aux(E_id(Id_aux(Id("tlb39"),model/riscv_vmem_sv39.sail:87)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:83))]),model/riscv_vmem_sv39.sail:83)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_vmem_sv39.sail:88),[(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_sv39.sail:88)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model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E_aux(E_id(Id_aux(Id("pteAddr"),model/riscv_vmem_sv39.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("SV39_LEVEL_BITS"),model/riscv_vmem_sv39.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(9),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_tlb.sail:18),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_tlb.sail:18));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_tlb.sail:18))]),model/riscv_vmem_tlb.sail:18))),None),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("tlb39"),model/riscv_vmem_sv39.sail:95)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_vmem_sv39.sail:95),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_vmem_sv39.sail:95)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("SV39_PTE"),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex5889#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5890#"),Unknown)),Unknown)),Unknown))]),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_sv39.sail:92));(BE_aux(BE_rreg,model/riscv_vmem_sv39.sail:92))]),model/riscv_vmem_sv39.sail:92)),model/riscv_vmem_sv39.sail:92)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("write_TLB39"),model/riscv_vmem_sv39.sail:98),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98));(Typ_aux(Typ_id(Id_aux(Id("TLB39_Entry"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_sv39.sail:83))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("write_TLB39"),model/riscv_vmem_sv39.sail:98),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98),P_aux(P_id(Id_aux(Id("idx"),model/riscv_vmem_sv39.sail:98)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_idx"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("TLB39_Entry"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98),P_aux(P_id(Id_aux(Id("ent"),model/riscv_vmem_sv39.sail:98)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82))),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98));(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:98-99)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("tlb39"),model/riscv_vmem_sv39.sail:99)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_vmem_sv39.sail:99),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_vmem_sv39.sail:99)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98));(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:98)),model/riscv_vmem_sv39.sail:98),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("flush_TLB39"),model/riscv_vmem_sv39.sail:101),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:101)),model/riscv_vmem_sv39.sail:101),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_sv39.sail:101));(BE_aux(BE_wreg,model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101)),model/riscv_vmem_sv39.sail:101)),model/riscv_vmem_sv39.sail:101))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("flush_TLB39"),model/riscv_vmem_sv39.sail:102),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("asid"),model/riscv_vmem_sv39.sail:102)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101)));(P_aux(P_id(Id_aux(Id("addr"),model/riscv_vmem_sv39.sail:102)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:102-108)),E_aux(E_case(E_aux(E_id(Id_aux(Id("tlb39"),model/riscv_vmem_sv39.sail:103)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:83))]),model/riscv_vmem_sv39.sail:83)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_vmem_sv39.sail:104),[(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_sv39.sail:104)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:83))]),model/riscv_vmem_sv39.sail:83)),E_aux(E_lit(L_aux(L_unit,model/riscv_vmem_sv39.sail:104)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_vmem_sv39.sail:105),[(P_aux(P_id(Id_aux(Id("e"),model/riscv_vmem_sv39.sail:105)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:83))]),model/riscv_vmem_sv39.sail:83)),E_aux(E_if(E_aux(E_app(Id_aux(Id("flush_TLB_Entry"),model/riscv_vmem_sv39.sail:105),[(E_aux(E_id(Id_aux(Id("e"),model/riscv_vmem_sv39.sail:105)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),../sail/lib/option.sail:10)));(E_aux(E_id(Id_aux(Id("asid"),model/riscv_vmem_sv39.sail:105)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101)));(E_aux(E_id(Id_aux(Id("addr"),model/riscv_vmem_sv39.sail:105)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv39.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:101))]),model/riscv_vmem_sv39.sail:101)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_tlb.sail:45)),model/riscv_vmem_tlb.sail:45)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id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iscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:112));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112))]),model/riscv_vmem_sv39.sail:112)))]),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_sv39.sail:112),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:112));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112))]),model/riscv_vmem_sv39.sail:112))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_common.sail:96)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_sv39.sail:112),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_sv39.sail:112))]),model/riscv_vmem_sv39.sail:112));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5906#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex5907#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex5908#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))],Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_sv39.sail:112),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv39.sail:112));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112))]),model/riscv_vmem_sv39.sail:112),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_wreg,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_wmv,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_wmvt,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_escape,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_rmem,model/riscv_vmem_sv39.sail:112));(BE_aux(BE_rmemt,model/riscv_vmem_sv39.sail:112))]),model/riscv_vmem_sv39.sail:112)),model/riscv_vmem_sv39.sail:112)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_vmem_sv39"),model/riscv_vmem_sv39.sail:184),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:184)),model/riscv_vmem_sv39.sail:184),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_sv39.sail:83))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:184)),model/riscv_vmem_sv39.sail:184)),model/riscv_vmem_sv39.sail:184),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_vmem_sv39"),model/riscv_vmem_sv39.sail:184),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_sv39.sail:184)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("tlb39"),model/riscv_vmem_sv39.sail:185)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("None"),model/riscv_vmem_sv39.sail:185),[(E_aux(E_lit(L_aux(L_unit,model/riscv_vmem_sv39.sail:185)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv39.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(39),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv39.sail:82)),model/riscv_vmem_sv39.sail:82))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:184)),model/riscv_vmem_sv39.sail:184))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv39.sail:184)),model/riscv_vmem_sv39.sail:184),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("walk48"),model/riscv_vmem_sv48.sail:3),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_sv48.sail:3),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_sv48.sail:3))]),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))],Typ_aux(Typ_app(Id_aux(Id("PTW_Result"),model/riscv_vmem_sv48.sail:3),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:3));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3))]),model/riscv_vmem_sv48.sail:3),Effect_aux(Effect_set([(BE_aux(BE_rmem,model/riscv_vmem_sv48.sail:3));(BE_aux(BE_rmemt,model/riscv_vmem_sv48.sail:3));(BE_aux(BE_rreg,model/riscv_vmem_sv48.sail:3));(BE_aux(BE_escape,model/riscv_vmem_sv48.sail:3))]),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3)),model/riscv_vmem_sv48.sail:3))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("walk48"),model/riscv_vmem_sv48.sail:4),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("vaddr"),model/riscv_vmem_sv48.sail:4)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_id(Id_aux(Id("ac"),model/riscv_vmem_sv48.sail:4)),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_sv48.sail:3),[(A_aux(A_typ(Typ_aux(Typ_id(Id_a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A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),model/riscv_vmem_sv48.sail:92)),model/riscv_vmem_sv48.sail:92));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex6023#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6024#"),Unknown)),Unknown)),Unknown))]),Unknown))]),model/riscv_vmem_sv48.sail:93-96)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("TLB48_Entry"),model/riscv_vmem_sv48.sail:94)),model/riscv_vmem_sv48.sail:94),P_aux(P_id(Id_aux(Id("ent"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82))),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82)),E_aux(E_app(Id_aux(Id("make_TLB_Entry"),model/riscv_vmem_sv48.sail:94),[(E_aux(E_id(Id_aux(Id("asid"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("global"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6024#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("vAddr"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("pAddr"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("_get_SV48_PTE_bits"),:1),[(E_aux(E_id(Id_aux(Id("pte"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_id(Id_aux(Id("SV48_PTE"),model/riscv_vmem_sv48.sail:92)),model/riscv_vmem_sv48.sail:92)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_id(Id_aux(Id("level"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex6023#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("pteAddr"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("SV48_LEVEL_BITS"),model/riscv_vmem_sv48.sail:94)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nex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yp_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98));(Typ_aux(Typ_id(Id_aux(Id("TLB48_Entry"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_sv48.sail:83))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("write_TLB48"),model/riscv_vmem_sv48.sail:98),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98),P_aux(P_id(Id_aux(Id("idx"),model/riscv_vmem_sv48.sail:98)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'_idx"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("TLB48_Entry"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98),P_aux(P_id(Id_aux(Id("ent"),model/riscv_vmem_sv48.sail:98)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82))),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98));(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:98-99)),E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("tlb48"),model/riscv_vmem_sv48.sail:99)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("Some"),model/riscv_vmem_sv48.sail:99),[(E_aux(E_id(Id_aux(Id("ent"),model/riscv_vmem_sv48.sail:99)),Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("nat"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98));(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:98)),model/riscv_vmem_sv48.sail:98),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("flush_TLB48"),model/riscv_vmem_sv48.sail:101),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:101)),model/riscv_vmem_sv48.sail:101),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_sv48.sail:101));(BE_aux(BE_wreg,model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101)),model/riscv_vmem_sv48.sail:101)),model/riscv_vmem_sv48.sail:101))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("flush_TLB48"),model/riscv_vmem_sv48.sail:102),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_id(Id_aux(Id("asid"),model/riscv_vmem_sv48.sail:102)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101)));(P_aux(P_id(Id_aux(Id("addr"),model/riscv_vmem_sv48.sail:102)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101));(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:101),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:101))]),model/riscv_vmem_sv48.sail:102-108)),E_aux(E_case(E_aux(E_id(Id_aux(Id("tlb48"),model/riscv_vmem_sv48.sail:103)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv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48.sail:112)),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112))]),model/riscv_vmem_sv48.sail:112)))]),Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_sv48.sail:112),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:112));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112))]),model/riscv_vmem_sv48.sail:112))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_common.sail:76)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_common.sail:122)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_vmem_sv48.sail:112),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)),model/riscv_vmem_sv48.sail:112))]),model/riscv_vmem_sv48.sail:112));(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6040#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6041#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_var(Kid_aux(Var("'ex6042#"),Unknown)),Unknown)),Unknown))]),Unknown));(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_types_ext.sail:7)),model/riscv_types_ext.sail:7))],Typ_aux(Typ_app(Id_aux(Id("TR_Result"),model/riscv_vmem_sv48.sail:112),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_common.sail:71)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_vmem_sv48.sail:112));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("PTW_Error"),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112))]),model/riscv_vmem_sv48.sail:112),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_wreg,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_wmv,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_wmvt,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_escape,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_rmem,model/riscv_vmem_sv48.sail:112));(BE_aux(BE_rmemt,model/riscv_vmem_sv48.sail:112))]),model/riscv_vmem_sv48.sail:112)),model/riscv_vmem_sv48.sail:112)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("init_vmem_sv48"),model/riscv_vmem_sv48.sail:146),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:146)),model/riscv_vmem_sv48.sail:146),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_sv48.sail:83))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:146)),model/riscv_vmem_sv48.sail:146)),model/riscv_vmem_sv48.sail:146),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_vmem_sv48"),model/riscv_vmem_sv48.sail:146),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_sv48.sail:146)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_assign(LEXP_aux(LEXP_id(Id_aux(Id("tlb48"),model/riscv_vmem_sv48.sail:147)),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("None"),model/riscv_vmem_sv48.sail:147),[(E_aux(E_lit(L_aux(L_unit,model/riscv_vmem_sv48.sail:147)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:146)),model/riscv_vmem_sv48.sail:146))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_sv48.sail:146)),model/riscv_vmem_sv48.sail:146),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_reg_dec(DEC_aux(DEC_reg(Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_rv64.sail:5))]),model/riscv_vmem_rv64.sail:5),Effect_aux(Effect_set([(BE_aux(BE_wreg,model/riscv_vmem_rv64.sail:5))]),model/riscv_vmem_rv64.sail:5),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:5)),model/riscv_vmem_rv64.sail:5),Id_aux(Id("satp"),model/riscv_vmem_rv64.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("legalize_satp"),model/riscv_vmem_rv64.sail:7),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7));(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("legalize_satp"),model/riscv_vmem_rv64.sail:7),Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7),P_aux(P_id(Id_aux(Id("a"),model/riscv_vmem_rv64.sail:7)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7))),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7),P_aux(P_id(Id_aux(Id("o"),model/riscv_vmem_rv64.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7),P_aux(P_id(Id_aux(Id("v"),model/riscv_vmem_rv64.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))]),model/riscv_vmem_rv64.sail:7-8)),E_aux(E_app(Id_aux(Id("legalize_satp64"),model/riscv_vmem_rv64.sail:8),[(E_aux(E_id(Id_aux(Id("a"),model/riscv_vmem_rv64.sail:8)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7)));(E_aux(E_id(Id_aux(Id("o"),model/riscv_vmem_rv64.sail:8)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("v"),model/riscv_vmem_rv64.sail:8)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_sys_regs.sail:595)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_vmem_rv64.sail:7)),model/riscv_vmem_rv64.sail:7));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("translationMode"),model/riscv_vmem_rv64.sail:12),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12))],Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_vmem_rv64.sail:12));(BE_aux(BE_escape,model/riscv_vmem_rv64.sail:12))]),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("translationMode"),model/riscv_vmem_rv64.sail:13),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("priv"),model/riscv_vmem_rv64.sail:13)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("eq_anything"),model/prelude.sail:18),[(E_aux(E_id(Id_aux(Id("priv"),model/riscv_vmem_rv64.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_vmem_rv64.sail:12)),model/riscv_vmem_rv64.sail:12)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_vmem_rv64.sail:14)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:16)),model/prelude.sail:16)),E_aux(E_id(Id_aux(Id("Sbare"),model/riscv_vmem_rv64.sail:14)),Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:293)),Unknown)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_id(Id_aux(Id("arch"),model/riscv_vmem_rv64.sail:16)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),E_aux(E_app(Id_aux(Id("architecture"),model/riscv_vmem_rv64.sail:16),[(E_aux(E_app(Id_aux(Id("get_mstatus_SXL"),model/riscv_vmem_rv64.sail:16),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_vmem_rv64.sail:16)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_types.sail:47)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_id(Id_aux(Id("arch"),model/riscv_vmem_rv64.sail:17)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_vmem_rv64.sail:18),[(P_aux(P_id(Id_aux(Id("RV64"),model/riscv_vmem_rv64.sail:18)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:48),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:48)),model/riscv_types.sail:48)),model/riscv_types.sail:48))]),model/riscv_types.sail:48)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("satp_mode"),model/riscv_vmem_rv64.sail:19)),model/riscv_vmem_rv64.sail:19),P_aux(P_id(Id_aux(Id("mbits"),model/riscv_vmem_rv64.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_types.sail:292)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_types.sail:292)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("_get_Satp64_Mode"),:1),[(E_aux(E_app(Id_aux(Id("Mk_Satp64"),model/riscv_vmem_rv64.sail:19),[(E_aux(E_id(Id_aux(Id("satp"),model/riscv_vmem_rv64.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("Satp64"),:1)),:1)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1))),None),E_aux(E_block([(E_aux(E_case(E_aux(E_app(Id_aux(Id("satp64Mode_of_bits"),model/riscv_vmem_rv64.sail:20),[(E_aux(E_id(Id_aux(Id("RV64"),model/riscv_vmem_rv64.sail:20)),Typ_aux(Typ_id(Id_aux(Id("Architecture"),model/riscv_types.sail:46)),Unknown)));(E_aux(E_id(Id_aux(Id("mbits"),model/riscv_vmem_rv64.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_types.sail:292)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),[(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("Some"),model/riscv_vmem_rv64.sail:21),[(P_aux(P_id(Id_aux(Id("m"),model/riscv_vmem_rv64.sail:21)),Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),../sail/lib/option.sail:10)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),E_aux(E_id(Id_aux(Id("m"),model/riscv_vmem_rv64.sail:21)),Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),../sail/lib/option.sail:10))),None));(Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("None"),model/riscv_vmem_rv64.sail:22),[(P_aux(P_lit(L_aux(L_unit,model/riscv_vmem_rv64.sail:22)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_types.sail:295),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("SATPMode"),model/riscv_types.sail:295)),model/riscv_types.sail:295)),model/riscv_types.sail:295))]),model/riscv_types.sail:295)),E_aux(E_app(Id_aux(Id("internal_error"),model/riscv_vmem_rv64.sail:22),[(E_aux(E_lit(L_aux(L_string("invalid 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sts_base.sail:8)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("encdec_uop"),model/riscv_insts_base.sail:8),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:8),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8))]),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_LUI"),model/riscv_insts_base.sail:9)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0110111"),model/riscv_insts_base.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/riscv_insts_base.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:8)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_AUIPC"),model/riscv_insts_base.sail:10)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0010111"),model/riscv_insts_base.sail:10)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:8)),model/riscv_insts_base.sail:8),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),model/riscv_insts_base.sail:8)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:8)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:13),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("UTYPE"),model/riscv_insts_base.sail:13),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:13)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:6)),model/riscv_insts_base.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),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dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_hex("000"),model/riscv_insts_base.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6),Nexp_aux(Nexp_constant(12),Unknown)),../sail/lib/vector_dec.sail:86)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_insts_base.sail:18)),model/riscv_insts_base.sail:18),P_aux(P_id(Id_aux(Id("ret"),model/riscv_insts_base.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_id(Id_aux(Id("op"),model/riscv_insts_base.sail:18)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:6)),model/riscv_insts_base.sail:6)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_LUI"),model/riscv_insts_base.sail:19)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:6)),model/riscv_insts_base.sail:6)),E_aux(E_id(Id_aux(Id("off"),model/riscv_insts_base.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("RISCV_AUIPC"),model/riscv_insts_base.sail:20)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:6)),model/riscv_insts_base.sail:6)),E_aux(E_app(Id_aux(Id("add_bits"),../sail/lib/vector_dec.sail:145),[(E_aux(E_app(Id_aux(Id("get_arch_pc"),model/riscv_insts_base.sail:20),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:20)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("off"),model/riscv_insts_base.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("wX_bits"),model/riscv_regs.sail:148),[(E_aux(E_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("ret"),model/riscv_insts_base.sail:22)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144)));(E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_insts_base.sail:23)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("utype_mnemonic"),model/riscv_insts_base.sail:26),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("utype_mnemonic"),model/riscv_insts_base.sail:26),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_LUI"),model/riscv_insts_base.sail:27)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("lui"),model/riscv_insts_base.sail:27)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_AUIPC"),model/riscv_insts_base.sail:28)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("auipc"),model/riscv_insts_base.sail:28)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("uop"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)),model/riscv_insts_base.sail:26)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:31),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("UTYPE"),model/riscv_insts_base.sail:31),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(20),model/riscv_insts_base.sail:6)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:31)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:31)),Typ_aux(Typ_id(Id_aux(Id("uop"),model/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Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("btype_mnemonic"),model/riscv_insts_base.sail:138),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("btype_mnemonic"),model/riscv_insts_base.sail:138),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BEQ"),model/riscv_insts_base.sail:139)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("beq"),model/riscv_insts_base.sail:139)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BNE"),model/riscv_insts_base.sail:140)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("bne"),model/riscv_insts_base.sail:140)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BLT"),model/riscv_insts_base.sail:141)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("blt"),model/riscv_insts_base.sail:141)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BGE"),model/riscv_insts_base.sail:142)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("bge"),model/riscv_insts_base.sail:142)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BLTU"),model/riscv_insts_base.sail:143)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("bltu"),model/riscv_insts_base.sail:143)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_BGEU"),model/riscv_insts_base.sail:144)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("bgeu"),model/riscv_insts_base.sail:144)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:147),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("BTYPE"),model/riscv_insts_base.sail:147),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/riscv_insts_base.sail:92)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs2"),model/riscv_insts_base.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:147)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:147)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:92)),model/riscv_insts_base.sail:92)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_app(Id_aux(Id("btype_mnemonic"),model/riscv_insts_base.sail:148),[(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:148)),Typ_aux(Typ_id(Id_aux(Id("bop"),model/riscv_insts_base.sail:138)),model/riscv_insts_base.sail:138)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_base.sail:148),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:148)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_base.sail:148),[(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:148)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("sep"),model/riscv_insts_base.sail:148),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:148)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_base.sail:148),[(MP_aux(MP_id(Id_aux(Id("rs2"),model/riscv_insts_base.sail:148)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("sep"),model/riscv_insts_base.sail:148),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:148)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("hex_bits_13"),model/riscv_insts_base.sail:148),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:148)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(13),model/prelude_mapping.sail:262)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:151),Tu_aux(Tu_ty_id(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:151),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151))]),model/riscv_insts_base.sail:151));(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151));(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151));(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151))]),model/riscv_insts_base.sail:151),Id_aux(Id("ITYPE"),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151)),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("encdec_iop"),model/riscv_insts_base.sail:153),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:153)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:153)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("encdec_iop"),model/riscv_insts_base.sail:153),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:153),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153))]),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_ADDI"),model/riscv_insts_base.sail:154)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:154)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:153)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:153)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SLTI"),model/riscv_insts_base.sail:155)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("010"),model/riscv_insts_base.sail:155)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:153)),model/riscv_insts_base.sail:153),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:153)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:153)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SL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s_base.sail:180))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("slti"),model/riscv_insts_base.sail:182)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SLTIU"),model/riscv_insts_base.sail:183)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sltiu"),model/riscv_insts_base.sail:183)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_XORI"),model/riscv_insts_base.sail:184)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("xori"),model/riscv_insts_base.sail:184)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_ORI"),model/riscv_insts_base.sail:185)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ori"),model/riscv_insts_base.sail:185)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_ANDI"),model/riscv_insts_base.sail:186)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("andi"),model/riscv_insts_base.sail:186)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:189),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("ITYPE"),model/riscv_insts_base.sail:189),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:189)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_base.sail:151)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:189)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:189)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:189)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:151)),model/riscv_insts_base.sail:151)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_app(Id_aux(Id("itype_mnemonic"),model/riscv_insts_base.sail:190),[(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:190)),Typ_aux(Typ_id(Id_aux(Id("iop"),model/riscv_insts_base.sail:180)),model/riscv_insts_base.sail:180)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_base.sail:190),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:190)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_base.sail:190),[(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:190)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("sep"),model/riscv_insts_base.sail:190),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:190)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_base.sail:190),[(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:190)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("sep"),model/riscv_insts_base.sail:190),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:190)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("hex_bits_12"),model/riscv_insts_base.sail:190),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:190)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/prelude_mapping.sail:243)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:193),Tu_aux(Tu_ty_id(Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:193),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(6),model/riscv_insts_base.sail:193)),model/riscv_insts_base.sail:193))]),model/riscv_insts_base.sail:193));(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_insts_base.sail:193)),model/riscv_insts_base.sail:193));(Typ_aux(Typ_id(Id_aux(Id("regidx"),model/riscv_insts_base.sail:193)),model/riscv_insts_base.sail:193));(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:193)),model/riscv_insts_base.sail:193))]),model/riscv_insts_base.sail:193),Id_aux(Id("SHIFTIOP"),model/riscv_insts_base.sail:193)),model/riscv_insts_base.sail:193)),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("encdec_sop"),model/riscv_insts_base.sail:195),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:195)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("encdec_sop"),model/riscv_insts_base.sail:195),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195),Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:195),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195))]),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SLLI"),model/riscv_insts_base.sail:196)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:195)),model/riscv_insts_base.sail:195))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("001"),model/riscv_insts_base.sai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"atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("process_load"),model/riscv_insts_base.sail:337),[(E_aux(E_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("vaddr"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("mem_read"),model/riscv_insts_base.sail:337),[(E_aux(E_app(Id_aux(Id("Read"),model/riscv_insts_base.sail:337),[(E_aux(E_id(Id_aux(Id("Data"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),model/riscv_vmem_types.sail:3)))]),Typ_aux(Typ_app(Id_aux(Id("AccessType"),model/riscv_types.sail:100),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_types.sail:3)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("addr"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),model/riscv_vmem_common.sail:157)));(E_aux(E_lit(L_aux(L_num(8),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("aq"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6948#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("rl"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6949#"),Unknown)),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_false,model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("MemoryOpResult"),model/riscv_mem.sail:93),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_times(Nexp_aux(Nexp_constant(8),model/riscv_mem.sail:93),Nexp_aux(Nexp_constant(8),Unknown)),model/riscv_mem.sail:93)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_mem.sail:93))]),model/riscv_mem.sail:93)));(E_aux(E_id(Id_aux(Id("is_unsigned"),model/riscv_insts_base.sail:337)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6947#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_base.sail:301)),model/riscv_insts_base.sail:301))),None))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("maybe_aq"),model/riscv_insts_base.sail:343),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("maybe_aq"),model/riscv_insts_base.sail:344),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_insts_base.sail:345)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(".aq"),model/riscv_insts_base.sail:345)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_insts_base.sail:346)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:346)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)),model/riscv_insts_base.sail:343)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("maybe_rl"),model/riscv_insts_base.sail:349),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("maybe_rl"),model/riscv_insts_base.sail:350),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_insts_base.sail:351)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(".rl"),model/riscv_insts_base.sail:351)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_insts_base.sail:352)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:352)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)),model/riscv_insts_base.sail:349)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("maybe_u"),model/riscv_insts_base.sail:355),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("maybe_u"),model/riscv_insts_base.sail:356),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_insts_base.sail:357)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("u"),model/riscv_insts_base.sail:357)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_insts_base.sail:358)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:358)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)),model/riscv_insts_base.sail:355)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:361),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("LOAD"),model/riscv_insts_base.sail:361),[(MP_aux(MP_id(Id_aux(Id("imm"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_base.sail:288)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("is_unsigned"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6988#"),Unknown)),Unknown)),Unknown))]),Unknown)));(MP_aux(MP_id(Id_aux(Id("size"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_insts_base.sail:288)),model/riscv_insts_base.sail:288)));(MP_aux(MP_id(Id_aux(Id("aq"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6989#"),Unknown)),Unknown)),Unknown))]),Unknown)));(MP_aux(MP_id(Id_aux(Id("rl"),model/riscv_insts_base.sail:361)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6990#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_lit(L_aux(L_string("l"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("size_mnemonic"),model/riscv_insts_base.sail:362),[(MP_aux(MP_id(Id_aux(Id("size"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_id(Id_aux(Id("word_width"),model/riscv_types.sail:349)),model/riscv_types.sail:349)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("maybe_u"),model/riscv_insts_base.sail:362),[(MP_aux(MP_id(Id_aux(Id("is_unsigned"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6991#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("maybe_aq"),model/riscv_insts_base.sail:362),[(MP_aux(MP_id(Id_aux(Id("aq"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6992#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("maybe_rl"),model/riscv_insts_base.sail:362),[(MP_aux(MP_id(Id_aux(Id("rl"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex6993#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_base.sail:362),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:362)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_base.sail:362),[(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:362)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vect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("string"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("shiftw_mnemonic"),model/riscv_insts_base.sail:461),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SLLI"),model/riscv_insts_base.sail:462)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("slli"),model/riscv_insts_base.sail:462)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SRLI"),model/riscv_insts_base.sail:463)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("srli"),model/riscv_insts_base.sail:463)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SRAI"),model/riscv_insts_base.sail:464)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("srai"),model/riscv_insts_base.sail:464)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:467),MCL_aux(MCL_bidir(MPat_aux(MPat_when(MP_aux(MP_app(Id_aux(Id("SHIFTW"),model/riscv_insts_base.sail:467),[(MP_aux(MP_id(Id_aux(Id("shamt"),model/riscv_insts_base.sail:467)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_insts_base.sail:435)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:467)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:467)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:467)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:435)),model/riscv_insts_base.sail:435)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),E_aux(E_app(Id_aux(Id("eq_int"),../sail/lib/flow.sail:43),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(64),model/riscv_insts_base.sail:468)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),../sail/lib/flow.sail:28),[(A_aux(A_bool(NC_aux(NC_equal(Nexp_aux(Nexp_constant(64),Unknown),Nexp_aux(Nexp_constant(64),Unknown)),../sail/lib/flow.sail:28)),../sail/lib/flow.sail:28))]),../sail/lib/flow.sail:28))),None),MPat_aux(MPat_when(MP_aux(MP_string_append([(MP_aux(MP_app(Id_aux(Id("shiftw_mnemonic"),model/riscv_insts_base.sail:469),[(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:469)),Typ_aux(Typ_id(Id_aux(Id("sop"),model/riscv_insts_base.sail:461)),model/riscv_insts_base.sail:461)))]),Typ_aux(Typ_id(Id_aux(Id("string"),mode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el/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("shiftiwop_mnemonic"),model/riscv_insts_base.sail:550),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("shiftiwop_mnemonic"),model/riscv_insts_base.sail:550),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SLLIW"),model/riscv_insts_base.sail:551)),Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("slliw"),model/riscv_insts_base.sail:551)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SRLIW"),model/riscv_insts_base.sail:552)),Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("srliw"),model/riscv_insts_base.sail:552)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("RISCV_SRAIW"),model/riscv_insts_base.sail:553)),Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sraiw"),model/riscv_insts_base.sail:553)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)),model/riscv_insts_base.sail:550)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:556),MCL_aux(MCL_bidir(MPat_aux(MPat_when(MP_aux(MP_app(Id_aux(Id("SHIFTIWOP"),model/riscv_insts_base.sail:556),[(MP_aux(MP_id(Id_aux(Id("shamt"),model/riscv_insts_base.sail:556)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_insts_base.sail:524)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_base.sail:556)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_base.sail:556)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_base.sail:556)),Typ_aux(Typ_id(Id_aux(Id("sopw"),model/riscv_insts_base.sail:524)),model/riscv_insts_base.sail:524)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail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fence"),model/riscv_insts_base.sail:584)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:97)),model/prelude.sail:97)));(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:585)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_insts_base.sail:587)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bit_maybe_r"),model/riscv_insts_base.sail:614),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:614)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bit_maybe_r"),model/riscv_insts_base.sail:614),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:614),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614))]),model/riscv_insts_base.sail:614),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_insts_base.sail:615)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("r"),model/riscv_insts_base.sail:615)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:614)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_insts_base.sail:616)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:616)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:614)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)),model/riscv_insts_base.sail:614)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bit_maybe_w"),model/riscv_insts_base.sail:619),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:619)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bit_maybe_w"),model/riscv_insts_base.sail:619),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:619),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619))]),model/riscv_insts_base.sail:619),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_insts_base.sail:620)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("w"),model/riscv_insts_base.sail:620)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:619)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_insts_base.sail:621)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:621)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:619)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)),model/riscv_insts_base.sail:619)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bit_maybe_i"),model/riscv_insts_base.sail:624),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:624)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bit_maybe_i"),model/riscv_insts_base.sail:624),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:624),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624))]),model/riscv_insts_base.sail:624),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_insts_base.sail:625)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("i"),model/riscv_insts_base.sail:625)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:624)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_insts_base.sail:626)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:626)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:624)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)),model/riscv_insts_base.sail:624)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("bit_maybe_o"),model/riscv_insts_base.sail:629),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:629)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("bit_maybe_o"),model/riscv_insts_base.sail:629),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:629),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629))]),model/riscv_insts_base.sail:629),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_insts_base.sail:630)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("o"),model/riscv_insts_base.sail:630)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:629)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_bin("0"),model/riscv_insts_base.sail:631)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_base.sail:631)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:629)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)),model/riscv_insts_base.sail:629)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("fence_bits"),model/riscv_insts_base.sail:634),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:634)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("fence_bits"),model/riscv_insts_base.sail:634),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_base.sail:634),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634))]),model/riscv_insts_base.sail:634),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634)),model/riscv_insts_base.sail:634),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("i"),model/riscv_insts_base.sail:635)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_insts_base.sail:635)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec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fence"),model/riscv_insts_base.sail:654)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/prelude.sail:97)),model/prelude.sail:97)));(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:655)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_insts_base.sail:657)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:675),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("FENCE_TSO"),model/riscv_insts_base.sail:675),[(MP_aux(MP_id(Id_aux(Id("pred"),model/riscv_insts_base.sail:675)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("succ"),model/riscv_insts_base.sail:675)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:642)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_lit(L_aux(L_string("fence.tso"),model/riscv_insts_base.sail:676)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_base.sail:676),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:676)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("fence_bits"),model/riscv_insts_base.sail:676),[(MP_aux(MP_id(Id_aux(Id("pred"),model/riscv_insts_base.sail:676)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:634)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("sep"),model/riscv_insts_base.sail:676),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:676)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("fence_bits"),model/riscv_insts_base.sail:676),[(MP_aux(MP_id(Id_aux(Id("succ"),model/riscv_insts_base.sail:676)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_base.sail:634)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:679),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:679)),model/riscv_insts_base.sail:679),Id_aux(Id("FENCEI"),model/riscv_insts_base.sail:679)),model/riscv_insts_base.sail:679)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:681),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("FENCEI"),model/riscv_insts_base.sail:681),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:681)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("000000000000"),model/riscv_insts_base.sail:682)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:682)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("001"),model/riscv_insts_base.sail:682)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:682)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("0001111"),model/riscv_insts_base.sail:682)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_base.sail:685),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("FENCEI"),model/riscv_insts_base.sail:685),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_base.sail:685)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_insts_base.sail:685)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:687),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("FENCEI"),model/riscv_insts_base.sail:687),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:687)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("fence.i"),model/riscv_insts_base.sail:687)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:690),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:690)),model/riscv_insts_base.sail:690),Id_aux(Id("ECALL"),model/riscv_insts_base.sail:690)),model/riscv_insts_base.sail:690)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:692),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("ECALL"),model/riscv_insts_base.sail:692),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:692)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("000000000000"),model/riscv_insts_base.sail:693)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:693)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:693)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:693)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_base.sail:693)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_base.sail:695),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("ECALL"),model/riscv_insts_base.sail:695),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_base.sail:695)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_insts_base.sail:696)),model/riscv_insts_base.sail:696),P_aux(P_id(Id_aux(Id("t"),model/riscv_insts_base.sail:696)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_insts_base.sail:696)),model/riscv_insts_base.sail:696))),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_insts_base.sail:696)),model/riscv_insts_base.sail:696)),E_aux(E_record([(FE_aux(FE_Fexp(Id_aux(Id("trap"),model/riscv_insts_base.sail:697),E_aux(E_case(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:697)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_insts_base.sail:698)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("E_U_EnvCall"),model/riscv_insts_base.sail:698),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:698)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_insts_base.sail:699)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("E_S_EnvCall"),model/riscv_insts_base.sail:699),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:699)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_insts_base.sail:700)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("E_M_EnvCall"),model/riscv_insts_base.sail:700),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:700)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_sync_exception.sail:4)),model/riscv_sync_exception.sail:4))),None));(FE_aux(FE_Fexp(Id_aux(Id("excinfo"),model/riscv_insts_base.sail:702),E_aux(E_cast(Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_insts_base.sail:702),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_insts_base.sail:702)),model/riscv_insts_base.sail:702)),model/riscv_insts_base.sail:702))]),model/riscv_insts_base.sail:702),E_aux(E_app(Id_aux(Id("None"),model/riscv_insts_base.sail:702),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:702)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_insts_base.sail:702),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_base.sail:702))]),model/riscv_insts_base.sail:702))),None));(FE_aux(FE_Fexp(Id_aux(Id("ext"),model/riscv_insts_base.sail:703),E_aux(E_app(Id_aux(Id("None"),model/riscv_insts_base.sail:703),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:703)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("option"),../sail/lib/option.sail:9),[(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:3)),Unknown)),Unknown))]),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_insts_base.sail:696)),model/riscv_insts_base.sail:696))),None),E_aux(E_block([(E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_insts_base.sail:704),[(E_aux(E_app(Id_aux(Id("exception_handler"),model/riscv_insts_base.sail:704),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:704)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_app(Id_aux(Id("CTL_TRAP"),model/riscv_insts_base.sail:704),[(E_aux(E_id(Id_aux(Id("t"),model/riscv_insts_base.sail:704)),Typ_aux(Typ_id(Id_aux(Id("sync_exception"),model/riscv_insts_base.sail:696)),model/riscv_insts_base.sail:696)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_insts_base.sail:704)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_base.sail:705)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:708),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("ECALL"),model/riscv_insts_base.sail:708),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:708)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ecall"),model/riscv_insts_base.sail:708)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:711),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:711)),model/riscv_insts_base.sail:711),Id_aux(Id("MRET"),model/riscv_insts_base.sail:711)),model/riscv_insts_base.sail:711)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:713),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("MRET"),model/riscv_insts_base.sail:713),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:713)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("0011000"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00010"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_base.sail:714)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_base.sail:716),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("MRET"),model/riscv_insts_base.sail:716),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_base.sail:716)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_if(E_aux(E_app(Id_aux(Id("neq_anything"),model/prelude.sail:47),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:717)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_insts_base.sail:717)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/prelude.sail:43)),model/prelude.sail:43)),E_aux(E_app(Id_aux(Id("handle_illegal"),model/riscv_insts_base.sail:718),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:718)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)),E_aux(E_if(E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("ext_check_xret_priv"),model/riscv_insts_base.sail:719),[(E_aux(E_id(Id_aux(Id("Machine"),model/riscv_insts_base.sail:719)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7457#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7457#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("ext_fail_xret_priv"),model/riscv_insts_base.sail:720),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:720)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8)),E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_insts_base.sail:721),[(E_aux(E_app(Id_aux(Id("exception_handler"),model/riscv_insts_base.sail:721),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:721)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_app(Id_aux(Id("CTL_MRET"),model/riscv_insts_base.sail:721),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:721)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_insts_base.sail:721)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_base.sail:722)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:725),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("MRET"),model/riscv_insts_base.sail:725),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:725)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("mret"),model/riscv_insts_base.sail:725)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:728),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:728)),model/riscv_insts_base.sail:728),Id_aux(Id("SRET"),model/riscv_insts_base.sail:728)),model/riscv_insts_base.sail:728)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:730),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("SRET"),model/riscv_insts_base.sail:730),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:730)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("0001000"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00010"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_base.sail:731)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_base.sail:733),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("SRET"),model/riscv_insts_base.sail:733),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_base.sail:733)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:734)),model/riscv_insts_base.sail:734),P_aux(P_id(Id_aux(Id("sret_illegal"),model/riscv_insts_base.sail:734)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7476#"),Unknown)),Unknown)),Unknown))]),Unknown))),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:734)),model/riscv_insts_base.sail:734)),E_aux(E_case(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:734)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),[(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("User"),model/riscv_insts_base.sail:735)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_lit(L_aux(L_true,model/riscv_insts_base.sail:735)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Supervisor"),model/riscv_insts_base.sail:736)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("or_bool"),../sail/lib/flow.sail:45),[(E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("haveSupMode"),model/riscv_insts_base.sail:736),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:736)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7462#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7462#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown)));(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("_get_Mstatus_TSR"),:1),[(E_aux(E_id(Id_aux(Id("mstatus"),model/riscv_insts_base.sail:736)),Typ_aux(Typ_id(Id_aux(Id("Mstatus"),model/riscv_sys_regs.sail:134)),model/riscv_sys_regs.sail:134)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),:1),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),:1)),:1));(A_aux(A_order(Ord_aux(Ord_dec,:1)),:1))]),:1)));(E_aux(E_lit(L_aux(L_bin("1"),model/riscv_insts_base.sail:736)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7464#"),Unknown)),Unknown));(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7465#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_or(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7464#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:26),NC_aux(NC_var(Kid_aux(Var("'ex7465#"),Unknown)),../sail/lib/flow.sail:26)),../sail/lib/flow.sail:26)),Unknown))]),Unknown)),Unknown))),None));(Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("Machine"),model/riscv_insts_base.sail:737)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)),E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("haveSupMode"),model/riscv_insts_base.sail:737),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:737)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_regs.sail:101)),model/riscv_sys_regs.sail:101)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7471#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7471#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_base.sail:734)),model/riscv_insts_base.sail:734))),None),E_aux(E_block([(E_aux(E_if(E_aux(E_id(Id_aux(Id("sret_illegal"),model/riscv_insts_base.sail:739)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7476#"),Unknown)),Unknown)),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("handle_illegal"),model/riscv_insts_base.sail:740),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:740)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)),E_aux(E_if(E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("ext_check_xret_priv"),model/riscv_insts_base.sail:741),[(E_aux(E_id(Id_aux(Id("Supervisor"),model/riscv_insts_base.sail:741)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_types.sail:66)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_sys_exceptions.sail:6)),model/riscv_sys_exceptions.sail:6)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex7477#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex7477#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown)),E_aux(E_app(Id_aux(Id("ext_fail_xret_priv"),model/riscv_insts_base.sail:742),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:742)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_exceptions.sail:8)),model/riscv_sys_exceptions.sail:8)),E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_insts_base.sail:743),[(E_aux(E_app(Id_aux(Id("exception_handler"),model/riscv_insts_base.sail:743),[(E_aux(E_id(Id_aux(Id("cur_privilege"),model/riscv_insts_base.sail:743)),Typ_aux(Typ_id(Id_aux(Id("Privilege"),model/riscv_sys_regs.sail:5)),model/riscv_sys_regs.sail:5)));(E_aux(E_app(Id_aux(Id("CTL_SRET"),model/riscv_insts_base.sail:743),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:743)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ctl_result"),model/riscv_sys_control.sail:268),[]),Unknown)));(E_aux(E_id(Id_aux(Id("PC"),model/riscv_insts_base.sail:743)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_base.sail:744)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:747),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("SRET"),model/riscv_insts_base.sail:747),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:747)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("sret"),model/riscv_insts_base.sail:747)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:750),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:750)),model/riscv_insts_base.sail:750),Id_aux(Id("EBREAK"),model/riscv_insts_base.sail:750)),model/riscv_insts_base.sail:750)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:752),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("EBREAK"),model/riscv_insts_base.sail:752),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:752)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("000000000001"),model/riscv_insts_base.sail:753)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:753)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:753)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:753)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_base.sail:753)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_base.sail:755),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("EBREAK"),model/riscv_insts_base.sail:755),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_base.sail:755)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("handle_mem_exception"),model/riscv_insts_base.sail:756),[(E_aux(E_id(Id_aux(Id("PC"),model/riscv_insts_base.sail:756)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_app(Id_aux(Id("E_Breakpoint"),model/riscv_insts_base.sail:756),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_base.sail:756)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("ExceptionType"),model/riscv_types.sail:141),[]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:432)),model/riscv_sys_control.sail:432)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_base.sail:757)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_base.sail:760),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("EBREAK"),model/riscv_insts_base.sail:760),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:760)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("ebreak"),model/riscv_insts_base.sail:760)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_base.sail:763),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_base.sail:763)),model/riscv_insts_base.sail:763),Id_aux(Id("WFI"),model/riscv_insts_base.sail:763)),model/riscv_insts_base.sail:763)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_base.sail:765),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("WFI"),model/riscv_insts_base.sail:765),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_base.sail:765)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("000100000101"),model/riscv_insts_base.sail:766)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:766)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("000"),model/riscv_insts_base.sail:766)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_base.sail:766)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_base.sail:766)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitv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order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_cext.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("01"),model/riscv_insts_cext.sail:13)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_begin.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:18))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_cext.sail:15),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("C_NOP"),model/riscv_insts_cext.sail:15),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_cext.sail:15)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_insts_cext.sail:15)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_cext.sail:17),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("C_NOP"),model/riscv_insts_cext.sail:17),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_cext.sail:17)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("c.nop"),model/riscv_insts_cext.sail:17)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_cext.sail:21),Tu_aux(Tu_ty_id(Typ_aux(Typ_tup([(Typ_aux(Typ_id(Id_aux(Id("cregidx"),model/riscv_insts_cext.sail:21)),model/riscv_insts_cext.sail:21));(Typ_aux(Typ_app(Id_aux(Id("bits"),model/riscv_insts_cext.sail:21),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(8),model/riscv_insts_cext.sail:21)),model/riscv_insts_cext.sail:21))]),model/riscv_insts_cext.sail:21))]),model/riscv_insts_cext.sail:21),Id_aux(Id("C_ADDI4SPN"),model/riscv_insts_cext.sail:21)),model/riscv_insts_cext.sail:21)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec_compressed"),model/riscv_insts_cext.sail:23),MCL_aux(MCL_bidir(MPat_aux(MPat_when(MP_aux(MP_app(Id_aux(Id("C_ADDI4SPN"),model/riscv_insts_cext.sail:23),[(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_cext.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),model/riscv_types.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_vector_concat([(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("nz96"),model/riscv_insts_cext.sail:23)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(4),model/riscv_insts_cext.sail:25)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bits"),model/ris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exp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("zreg"),model/riscv_insts_cext.sail:529)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)));(E_aux(E_app(Id_aux(Id("neq_bits"),../sail/lib/vector_dec.sail:26),[(E_aux(E_id(Id_aux(Id("rs2"),model/riscv_insts_cext.sail:529)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_id(Id_aux(Id("zreg"),model/riscv_insts_cext.sail:529)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:22)),../sail/lib/vector_dec.sail:22)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_cext.sail:532),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_insts_cext.sail:532)),model/riscv_insts_cext.sail:532),Id_aux(Id("C_EBREAK"),model/riscv_insts_cext.sail:532)),model/riscv_insts_cext.sail:532)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec_compressed"),model/riscv_insts_cext.sail:534),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("C_EBREAK"),model/riscv_insts_cext.sail:534),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_cext.sail:534)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_lit(L_aux(L_bin("100"),model/riscv_insts_cext.sail:535)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(3),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("1"),model/riscv_insts_cext.sail:535)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_cext.sail:535)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("00000"),model/riscv_insts_cext.sail:535)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_lit(L_aux(L_bin("10"),model/riscv_insts_cext.sail:535)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_begin.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:18))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_cext.sail:537),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("C_EBREAK"),model/riscv_insts_cext.sail:537),[(P_aux(P_lit(L_aux(L_unit,model/riscv_insts_cext.sail:537)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_app(Id_aux(Id("execute"),model/riscv_insts_cext.sail:538),[(E_aux(E_app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val_spec(cast_false,Id_aux(Id("maybe_not_u"),model/riscv_insts_mext.sail:70),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("maybe_not_u"),model/riscv_insts_mext.sail:70),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_false,model/riscv_insts_mext.sail:71)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_false,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("u"),model/riscv_insts_mext.sail:71)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_true,model/riscv_insts_mext.sail:72)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string(""),model/riscv_insts_mext.sail:72)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)),model/riscv_insts_mext.sail:70)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_mext.sail:75),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("DIV"),model/riscv_insts_mext.sail:75),[(MP_aux(MP_id(Id_aux(Id("rs2"),model/riscv_insts_mext.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_mext.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_mext.sail:75)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_mext.sail:75)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex10697#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_lit(L_aux(L_string("div"),model/riscv_insts_mext.sail:76)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("maybe_not_u"),model/riscv_insts_mext.sail:76),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_mext.sail:76)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex10698#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_mext.sail:76),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_mext.sail:76)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("reg_name"),model/riscv_insts_mext.sail:76),[(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_mext.sail:76)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_regs.sail:195)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_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var(Kid_aux(Var("'ex10889#"),Unknown)),Unknown)),Unknown))]),Unknown)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_zicsr.sail:13)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:5)),model/riscv_insts_zicsr.sail:5)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_vector_concat([(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("csr"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_zicsr.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_zicsr.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_zicsr.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_app(Id_aux(Id("bool_bits"),model/riscv_insts_zicsr.sail:14),[(MP_aux(MP_id(Id_aux(Id("is_imm"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex10892#"),Unknown)),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),model/riscv_types.sail:332)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_app(Id_aux(Id("encdec_csrop"),model/riscv_insts_zicsr.sail:14),[(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:7)),model/riscv_insts_zicsr.sail:7)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),model/riscv_insts_zicsr.sail:7)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_typ(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_lit(L_aux(L_bin("1110011"),model/riscv_insts_zicsr.sail:14)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(7),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("readCSR"),model/riscv_insts_zicsr.sail:16),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_insts_zicsr.sail:16)),model/riscv_insts_zicsr.sail:16))],Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_insts_zicsr.sail:16)),model/riscv_insts_zicsr.sail:16),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:414))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_insts_zicsr.sail:16)),model/riscv_insts_zicsr.sail:16)),model/riscv_insts_zicsr.sail:16),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("readCSR"),model/riscv_insts_zicsr.sail:16),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("csreg"),model/riscv_insts_zicsr.sail:16)),model/riscv_insts_zicsr.sail:16),P_aux(P_id(Id_aux(Id("csr"),model/riscv_insts_zicsr.sail:16)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_block([(E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_insts_zicsr.sail:17)),model/riscv_insts_zicsr.sail:17),P_aux(P_id(Id_aux(Id("res"),model/riscv_insts_zicsr.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_case(E_aux(E_tuple([(E_aux(E_id(Id_aux(Id("csr"),model/riscv_insts_zicsr.sail:18)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown))]),Unknown)),[(Pat_aux(Pat_exp(P_aux(P_tup([(P_aux(P_lit(L_aux(L_hex("F11"),model/riscv_insts_zicsr.sail:20)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)));(P_aux(P_wild,Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_tup([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_types.sail:19)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6));(Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown))]),Unknown)),E_aux(E_app(Id_aux(Id("EXTZ"),model/riscv_insts_zicsr.sail:20),[(E_aux(E_lit(L_aux(L_num(64),Unknown)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),Unknown)),Unknown))]),Unknown)));(E_aux(E_id(Id_aux(Id("mvendorid"),model/riscv_insts_zicsr.sail:20)),Typ_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p_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),Unknown))));(DEF_mapdef(MD_aux(MD_mapping(Id_aux(Id("csr_mnemonic"),model/riscv_insts_zicsr.sail:204),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),[(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("CSRRW"),model/riscv_insts_zicsr.sail:205)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("csrrw"),model/riscv_insts_zicsr.sail:205)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("CSRRS"),model/riscv_insts_zicsr.sail:206)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("csrrs"),model/riscv_insts_zicsr.sail:206)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)));(MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("CSRRC"),model/riscv_insts_zicsr.sail:207)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204))),None),MPat_aux(MPat_pat(MP_aux(MP_lit(L_aux(L_string("csrrc"),model/riscv_insts_zicsr.sail:207)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)))]),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_zicsr.sail:210),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("CSR"),model/riscv_insts_zicsr.sail:210),[(MP_aux(MP_id(Id_aux(Id("csr"),model/riscv_insts_zicsr.sail:210)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(12),model/riscv_insts_zicsr.sail:5)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rs1"),model/riscv_insts_zicsr.sail:210)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_id(Id_aux(Id("rd"),model/riscv_insts_zicsr.sail:210)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(5),model/riscv_types.sail:17)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(MP_aux(MP_lit(L_aux(L_true,model/riscv_insts_zicsr.sail:210)),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_true,Unknown)),Unknown))]),Unknown)));(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_zicsr.sail:210)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:5)),model/riscv_insts_zicsr.sail:5)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_app(Id_aux(Id("csr_mnemonic"),model/riscv_insts_zicsr.sail:211),[(MP_aux(MP_id(Id_aux(Id("op"),model/riscv_insts_zicsr.sail:211)),Typ_aux(Typ_id(Id_aux(Id("csrop"),model/riscv_insts_zicsr.sail:204)),model/riscv_insts_zicsr.sail:204)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_lit(L_aux(L_string("i"),model/riscv_insts_zicsr.sail:211)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_zicsr.sail:211),[(MP_aux(MP_lit(L_aux(L_unit,model/risc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xp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_regs.sail:144)),model/riscv_regs.sail:144)));(E_aux(E_app(Id_aux(Id("set_next_pc"),model/riscv_jalr_seq.sail:24),[(E_aux(E_id(Id_aux(Id("target"),model/riscv_jalr_seq.sail:24)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_pc_access.sail:15)),model/riscv_pc_access.sail:15)));(E_aux(E_id(Id_aux(Id("RETIRE_SUCCESS"),model/riscv_jalr_seq.sail:25)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_end.sail:5),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("word"),model/riscv_insts_end.sail:5)),model/riscv_insts_end.sail:5),Id_aux(Id("ILLEGAL"),model/riscv_insts_end.sail:5)),model/riscv_insts_end.sail:5)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec"),model/riscv_insts_end.sail:7),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("ILLEGAL"),model/riscv_insts_end.sail:7),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None),MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:7)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_begin.sail:15)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:15))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_end.sail:9),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("ILLEGAL"),model/riscv_insts_end.sail:9),[(P_aux(P_id(Id_aux(Id("s"),model/riscv_insts_end.sail:9)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("handle_illegal"),model/riscv_insts_end.sail:9),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_end.sail:9)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_end.sail:9)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_end.sail:11),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("ILLEGAL"),model/riscv_insts_end.sail:11),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:11)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_lit(L_aux(L_string("illegal"),model/riscv_insts_end.sail:11)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_end.sail:11),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_end.sail:11)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("hex_bits_32"),model/riscv_insts_end.sail:11),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:11)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/prelude_mapping.sail:623)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_scattered(SD_aux(SD_unioncl(Id_aux(Id("ast"),model/riscv_insts_end.sail:15),Tu_aux(Tu_ty_id(Typ_aux(Typ_id(Id_aux(Id("half"),model/riscv_insts_end.sail:15)),model/riscv_insts_end.sail:15),Id_aux(Id("C_ILLEGAL"),model/riscv_insts_end.sail:15)),model/riscv_insts_end.sail:15)),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("encdec_compressed"),model/riscv_insts_end.sail:17),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("C_ILLEGAL"),model/riscv_insts_end.sail:17),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18))),None),MPat_aux(MPat_pat(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:17)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_begin.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_begin.sail:18)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),model/riscv_insts_begin.sail:18))),None)));(DEF_scattered(SD_aux(SD_funcl(FCL_aux(FCL_Funcl(Id_aux(Id("execute"),model/riscv_insts_end.sail:19),Pat_aux(Pat_exp(P_aux(P_app(Id_aux(Id("C_ILLEGAL"),model/riscv_insts_end.sail:19),[(P_aux(P_id(Id_aux(Id("s"),model/riscv_insts_end.sail:19)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("handle_illegal"),model/riscv_insts_end.sail:19),[(E_aux(E_lit(L_aux(L_unit,model/riscv_insts_end.sail:19)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:382)),model/riscv_platform.sail:382)));(E_aux(E_id(Id_aux(Id("RETIRE_FAIL"),model/riscv_insts_end.sail:19)),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_types.sail:96)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))],Typ_aux(Typ_id(Id_aux(Id("Retired"),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9),Effect_aux(Effect_set([(BE_aux(BE_escape,model/riscv_insts_begin.sail:9));(BE_aux(BE_wreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_rreg,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmv,model/riscv_insts_begin.sail:9));(BE_aux(BE_wmvt,model/riscv_insts_begin.sail:9));(BE_aux(BE_eamem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_rmemt,model/riscv_insts_begin.sail:9));(BE_aux(BE_barr,model/riscv_insts_begin.sail:9));(BE_aux(BE_exmem,model/riscv_insts_begin.sail:9));(BE_aux(BE_undef,model/riscv_insts_begin.sail:9))]),model/riscv_insts_begin.sail:9)),model/riscv_insts_begin.sail:9))),None)));(DEF_scattered(SD_aux(SD_mapcl(Id_aux(Id("assembly"),model/riscv_insts_end.sail:21),MCL_aux(MCL_bidir(MPat_aux(MPat_pat(MP_aux(MP_app(Id_aux(Id("C_ILLEGAL"),model/riscv_insts_end.sail:21),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None),MPat_aux(MPat_pat(MP_aux(MP_string_append([(MP_aux(MP_lit(L_aux(L_string("c.illegal"),model/riscv_insts_end.sail:21)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(MP_aux(MP_app(Id_aux(Id("spc"),model/riscv_insts_end.sail:21),[(MP_aux(MP_lit(L_aux(L_unit,model/riscv_insts_end.sail:21)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)));(MP_aux(MP_app(Id_aux(Id("hex_bits_16"),model/riscv_insts_end.sail:21),[(MP_aux(MP_id(Id_aux(Id("s"),model/riscv_insts_end.sail:21)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/prelude_mapping.sail:319)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_bidir(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("print_insn"),model/riscv_insts_end.sail:32),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("print_insn"),model/riscv_insts_end.sail:33),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("insn"),model/riscv_insts_end.sail:33)),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32)),E_aux(E_app(Id_aux(Id("assembly_forwards"),Unknown),[(E_aux(E_id(Id_aux(Id("insn"),model/riscv_insts_end.sail:33)),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32)))]),Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_begin.sail:12)),model/riscv_insts_begin.sail:12))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32))],Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:32)),model/riscv_insts_end.sail:32)))]),None)));(DEF_overload(Id_aux(Id("to_str"),model/riscv_insts_end.sail:35),[(Id_aux(Id("print_insn"),model/riscv_insts_end.sail:35))]));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("decode"),model/riscv_insts_end.sail:37),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_end.sail:37)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:37)),model/riscv_insts_end.sail:37),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:37)),model/riscv_insts_end.sail:37)),model/riscv_insts_end.sail:37))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("decode"),model/riscv_insts_end.sail:38),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/riscv_insts_end.sail:38)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_end.sail:37)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("encdec_backwards"),Unknown),[(E_aux(E_id(Id_aux(Id("bv"),model/riscv_insts_end.sail:38)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_end.sail:37)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:15)),model/riscv_insts_begin.sail:15))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_insts_end.sail:37)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:37)),model/riscv_insts_end.sail:37),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:37)),model/riscv_insts_end.sail:37)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("decodeCompressed"),model/riscv_insts_end.sail:40),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_end.sail:40)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:40)),model/riscv_insts_end.sail:40),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:40)),model/riscv_insts_end.sail:40)),model/riscv_insts_end.sail:40))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("decodeCompressed"),model/riscv_insts_end.sail:41),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("bv"),model/riscv_insts_end.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_end.sail:40)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("encdec_compressed_backwards"),Unknown),[(E_aux(E_id(Id_aux(Id("bv"),model/riscv_insts_end.sail:41)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_end.sail:40)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)))]),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_begin.sail:18)),model/riscv_insts_begin.sail:18))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_insts_end.sail:40)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_insts_end.sail:40)),model/riscv_insts_end.sail:40),Effect_aux(Effect_set([]),model/riscv_insts_end.sail:40)),model/riscv_insts_end.sail:40)))]),None)));(DEF_type(..type_def));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("undefined_FetchResult"),model/riscv_step_common.sail:5),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_tq([]),model/riscv_step_common.sail:5),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("FetchResult"),model/riscv_step_common.sail:5)),Unknown),Effect_aux(Effect_set([(BE_aux(BE_undef,Unknown))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("undefined_FetchResult"),model/riscv_step_common.sail:5),Pat_aux(Pat_exp(P_aux(P_tup([]),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_step_common.sail:9)),model/riscv_step_common.sail:9),P_aux(P_id(Id_aux(Id("u_0"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_step_common.sail:9)),model/riscv_step_common.sail:9))),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_step_common.sail:9)),model/riscv_step_common.sail:9)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("ExceptionType"),model/riscv_step_common.sail:9)),model/riscv_step_common.sail:9))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("ext_fetch_addr_error"),model/riscv_step_common.sail:6)),model/riscv_step_common.sail:6),P_aux(P_id(Id_aux(Id("u_1"),Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3))),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_addr_checks.sail:3)),model/riscv_addr_checks.sail:3))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("half"),model/riscv_step_common.sail:8)),model/riscv_step_common.sail:8),P_aux(P_id(Id_aux(Id("u_2"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),None),E_aux(E_let(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("word"),model/riscv_step_common.sail:7)),model/riscv_step_common.sail:7),P_aux(P_id(Id_aux(Id("u_3"),Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_types.sail:13)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),N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Typ_id(Id_aux(Id("ast"),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_decode_ext.sail:6))]),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_none,Unknown),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("ext_post_decode_hook"),model/riscv_decode_ext.sail:7),Pat_aux(Pat_exp(P_aux(P_id(Id_aux(Id("x"),model/riscv_decode_ext.sail:7)),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6)),E_aux(E_id(Id_aux(Id("x"),model/riscv_decode_ext.sail:7)),Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6))],Typ_aux(Typ_id(Id_aux(Id("ast"),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_decode_ext.sail:6))]),model/riscv_decode_ext.sail:6)),model/riscv_decode_ext.sail:6)))]),None)));(DEF_spec(VS_val_spec(cast_false,Id_aux(Id("isRVC"),model/riscv_fetch.sail:5),[],TypSchm_aux(TypSchm_ts(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("half"),model/riscv_fetch.sail:5)),model/riscv_fetch.sail:5))],Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_fetch.sail:5)),model/riscv_fetch.sail:5),Effect_aux(Effect_set([]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("bool"),model/riscv_fetch.sail:5)),model/riscv_fetch.sail:5)),model/riscv_fetch.sail:5),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("isRVC"),model/riscv_fetch.sail:5),Pat_aux(Pat_exp(P_aux(P_typ(Typ_aux(Typ_id(Id_aux(Id("half"),model/riscv_fetch.sail:5)),model/riscv_fetch.sail:5),P_aux(P_id(Id_aux(Id("h"),model/riscv_fetch.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_app(Id_aux(Id("not_bool"),model/prelude.sail:37),[(E_aux(E_app(Id_aux(Id("eq_bits"),../sail/lib/vector_dec.sail:16),[(E_aux(E_app(Id_aux(Id("vector_subrange"),Unknown),[(E_aux(E_id(Id_aux(Id("h"),model/riscv_fetch.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_num(1),model/riscv_fetch.sail:5)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(1),Unknown)),Unknown))]),Unknown)));(E_aux(E_lit(L_aux(L_num(0),model/riscv_fetch.sail:5)),Typ_aux(Typ_app(Id_aux(Id("atom"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(0),Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_sum(Nexp_aux(Nexp_minus(Nexp_aux(Nexp_constant(1),Unknown),Nexp_aux(Nexp_constant(0),Unknown)),../sail/lib/vector_dec.sail:183),Nexp_aux(Nexp_constant(1),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:183)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)));(E_aux(E_lit(L_aux(L_bin("11"),model/riscv_fetch.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),Unknown),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(2),Unknown)),Unknown));(A_aux(A_order(Ord_aux(Ord_dec,Unknown)),Unknown))]),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("bool"),../sail/lib/vector_dec.sail:14)),../sail/lib/vector_dec.sail:14)))]),Typ_aux(Typ_exist([(KOpt_aux(KOpt_kind(K_aux(K_bool,Unknown),Kid_aux(Var("'ex11847#"),Unknown)),Unknown))],NC_aux(NC_true,Unknown),Typ_aux(Typ_app(Id_aux(Id("atom_bool"),Unknown),[(A_aux(A_bool(NC_aux(NC_app(Id_aux(Id("not"),../sail/lib/flow.sail:18),[(A_aux(A_bool(NC_aux(NC_var(Kid_aux(Var("'ex11847#"),Unknown)),../sail/lib/flow.sail:18)),../sail/lib/flow.sail:18))]),../sail/lib/flow.sail:18)),Unknown))]),Unknown)),Unknown))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_types.sail:12)),../sail/lib/vector_dec.sail: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_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_step.sail:101)),model/riscv_step.sail:101),Effect_aux(Effect_set([(BE_aux(BE_rreg,model/riscv_sys_regs.sail:134));(BE_aux(BE_wreg,model/riscv_platform.sail:267))]),Unknown)),Unknown)),Unknown))));(DEF_fundef(FD_aux(FD_function(Rec_aux(Rec_nonrec,Unknown),Typ_annot_opt_aux(Typ_annot_opt_some(TypQ_aux(TypQ_no_forall,Unknown),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_step.sail:101)),model/riscv_step.sail:101)),model/riscv_step.sail:101),Effect_opt_aux(Effect_opt_none,Unknown),[(FCL_aux(FCL_Funcl(Id_aux(Id("init_model"),model/riscv_step.sail:101),Pat_aux(Pat_exp(P_aux(P_lit(L_aux(L_unit,model/riscv_step.sail:101)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)),E_aux(E_block([(E_aux(E_app(Id_aux(Id("init_platform"),model/riscv_step.sail:102),[(E_aux(E_lit(L_aux(L_unit,model/riscv_step.sail:102)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_platform.sail:370)),model/riscv_platform.sail:370)));(E_aux(E_app(Id_aux(Id("init_sys"),model/riscv_step.sail:103),[(E_aux(E_lit(L_aux(L_unit,model/riscv_step.sail:103)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_sys_control.sail:444)),model/riscv_sys_control.sail:444)));(E_aux(E_app(Id_aux(Id("init_vmem"),model/riscv_step.sail:104),[(E_aux(E_lit(L_aux(L_unit,model/riscv_step.sail:104)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_vmem_rv64.sail:83)),model/riscv_vmem_rv64.sail:83)));(E_aux(E_app(Id_aux(Id("ext_init"),model/riscv_step.sail:107),[(E_aux(E_lit(L_aux(L_unit,model/riscv_step.sail:107)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_step_ext.sail:3)),model/riscv_step_ext.sail:3)));(E_aux(E_app(Id_aux(Id("ext_init_regs"),model/riscv_step.sail:108),[(E_aux(E_lit(L_aux(L_unit,model/riscv_step.sail:108)),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_ext_regs.sail:5)),model/riscv_ext_regs.sail:5)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_step.sail:101)),model/riscv_step.sail:101))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown))],Typ_aux(Typ_id(Id_aux(Id("unit"),model/riscv_step.sail:101)),model/riscv_step.sail:101),Effect_aux(Effect_set([]),Unknown)),Unknown)))]),None)));(DEF_val(LB_aux(LB_val(P_aux(P_typ(Typ_aux(Typ_app(Id_aux(Id("vector"),model/riscv_analysis.sail:4),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_order(Ord_aux(Ord_dec,model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4))]),model/riscv_analysis.sail:4),P_aux(P_id(Id_aux(Id("GPRstrs"),model/riscv_analysis.sail:4)),Typ_aux(Typ_app(Id_aux(Id("vector"),model/riscv_analysis.sail:4),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_order(Ord_aux(Ord_dec,model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4))]),model/riscv_analysis.sail:4))),Typ_aux(Typ_app(Id_aux(Id("vector"),model/riscv_analysis.sail:4),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(32),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_order(Ord_aux(Ord_dec,model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4));(A_aux(A_typ(Typ_aux(Typ_id(Id_aux(Id("string"),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4)),model/riscv_analysis.sail:4))]),model/riscv_analysis.sail:4)),E_aux(E_vector([(E_aux(E_lit(L_aux(L_string("x31"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x30"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x29"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x28"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x27"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x26"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x25"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x24"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x23"),model/riscv_analysis.sail:4)),Typ_aux(Typ_id(Id_aux(Id("string"),Unknown)),Unknown)));(E_aux(E_lit(L_aux(L_string("x22"),model/riscv_analysis.sa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riscv_vmem_sv48.sail:83))]),model/riscv_vmem_sv48.sail:83),Id_aux(Id("tlb48"),model/riscv_vmem_sv48.sail:83)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:83))]),model/riscv_vmem_sv48.sail:83)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("option"),model/riscv_vmem_sv48.sail:83),[(A_aux(A_typ(Typ_aux(Typ_app(Id_aux(Id("TLB_Entry"),model/riscv_vmem_sv48.sail:82),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(16),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(48),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(56),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82));(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:82))]),model/riscv_vmem_sv48.sail:82)),model/riscv_vmem_sv48.sail:83))]),model/riscv_vmem_sv48.sail:83))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)));(E_aux(E_assign(LEXP_aux(LEXP_cast(Typ_aux(Typ_id(Id_aux(Id("xlenbits"),model/riscv_vmem_rv64.sail:5)),model/riscv_vmem_rv64.sail:5),Id_aux(Id("satp"),model/riscv_vmem_rv64.sail:5)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6)),E_aux(E_lit(L_aux(L_undef,Unknown)),Typ_aux(Typ_app(Id_aux(Id("bitvector"),../sail/lib/vector_dec.sail:6),[(A_aux(A_nexp(Nexp_aux(Nexp_constant(64),model/riscv_xlen64.sail:3)),../sail/lib/vector_dec.sail:6));(A_aux(A_order(Ord_aux(Ord_dec,../sail/lib/vector_dec.sail:6)),../sail/lib/vector_dec.sail:6))]),../sail/lib/vector_dec.sail:6))),Typ_aux(Typ_id(Id_aux(Id("unit"),Unknown)),Unknown)))]),Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))),None)),Typ_aux(Typ_fn([(Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1))],Typ_aux(Typ_id(Id_aux(Id("unit"),:1)),:1),Effect_aux(Effect_set([(BE_aux(BE_undef,:1));(BE_aux(BE_wreg,:1))]),:1)),:1)))]),None)))])
\ No newline at end of file
diff --git a/handwritten_support/0.11/mem_metadata.lem b/handwritten_support/0.11/mem_metadata.lem
new file mode 100644
index 0000000..8a8c070
--- /dev/null
+++ b/handwritten_support/0.11/mem_metadata.lem
@@ -0,0 +1,16 @@
+open import Pervasives
+open import Pervasives_extra
+open import Sail2_instr_kinds
+open import Sail2_values
+open import Sail2_operators_mwords
+open import Sail2_prompt_monad
+open import Sail2_prompt
+
+val write_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => write_kind -> mword 'a -> integer -> mword 'n -> unit -> monad 'rv bool 'e
+let write_ram wk addr width data meta =
+  write_mem wk () addr width data
+
+val read_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => read_kind -> mword 'a -> integer -> bool -> monad 'rv (mword 'n * unit) 'e
+let read_ram rk addr width read_tag =
+  read_mem rk () addr width >>= (fun (data : mword 'n) ->
+  return (data, ()))
diff --git a/handwritten_support/0.11/riscv_extras.lem b/handwritten_support/0.11/riscv_extras.lem
index f4ade26..cc48761 100644
--- a/handwritten_support/0.11/riscv_extras.lem
+++ b/handwritten_support/0.11/riscv_extras.lem
@@ -79,6 +79,10 @@ val sys_enable_rvc : unit -> bool
 let sys_enable_rvc () = true
 declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc`
 
+val sys_enable_fdext : unit -> bool
+let sys_enable_fdext () = true
+declare ocaml target_rep function sys_enable_fdext = `Platform.enable_fdext`
+
 val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a
 let plat_ram_base () = wordFromInteger 0
 declare ocaml target_rep function plat_ram_base = `Platform.dram_base`
diff --git a/handwritten_support/0.11/riscv_extras_fdext.lem b/handwritten_support/0.11/riscv_extras_fdext.lem
new file mode 100644
index 0000000..3c79089
--- /dev/null
+++ b/handwritten_support/0.11/riscv_extras_fdext.lem
@@ -0,0 +1,109 @@
+open import Pervasives
+open import Pervasives_extra
+open import Sail2_instr_kinds
+open import Sail2_values
+open import Sail2_operators_mwords
+open import Sail2_prompt_monad
+open import Sail2_prompt
+
+type bitvector 'a = mword 'a
+
+(* stub functions emulating the C softfloat interface *)
+
+val softfloat_f32_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_add _ _ _ = ()
+
+val softfloat_f32_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_sub _ _ _ = ()
+
+val softfloat_f32_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_mul _ _ _ = ()
+
+val softfloat_f32_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_div _ _ _ = ()
+
+val softfloat_f64_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_add _ _ _ = ()
+
+val softfloat_f64_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_sub _ _ _ = ()
+
+val softfloat_f64_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_mul _ _ _ = ()
+
+val softfloat_f64_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_div _ _ _ = ()
+
+
+val softfloat_f32_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_muladd _ _ _ _ = ()
+
+val softfloat_f64_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_muladd _ _ _ _ = ()
+
+
+val softfloat_f32_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_sqrt _ _ = ()
+
+val softfloat_f64_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_sqrt _ _ = ()
+
+
+val softfloat_f32_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_i32 _ _ = ()
+
+val softfloat_f32_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_ui32 _ _ = ()
+
+val softfloat_i32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i32_to_f32 _ _ = ()
+
+val softfloat_ui32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui32_to_f32 _ _ = ()
+
+val softfloat_f32_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_i64 _ _ = ()
+
+val softfloat_f32_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_ui64 _ _ = ()
+
+val softfloat_i64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i64_to_f32 _ _ = ()
+
+val softfloat_ui64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui64_to_f32 _ _ = ()
+
+
+val softfloat_f64_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_i32 _ _ = ()
+
+val softfloat_f64_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_ui32 _ _ = ()
+
+val softfloat_i32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i32_to_f64 _ _ = ()
+
+val softfloat_ui32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui32_to_f64 _ _ = ()
+
+val softfloat_f64_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_i64 _ _ = ()
+
+val softfloat_f64_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_ui64 _ _ = ()
+
+val softfloat_i64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i64_to_f64 _ _ = ()
+
+val softfloat_ui64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui64_to_f64 _ _ = ()
+
+
+val softfloat_f32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_f64 _ _ = ()
+
+val softfloat_f64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_f32 _ _ = ()
+
+
+
diff --git a/handwritten_support/mem_metadata.lem b/handwritten_support/mem_metadata.lem
new file mode 100644
index 0000000..8a8c070
--- /dev/null
+++ b/handwritten_support/mem_metadata.lem
@@ -0,0 +1,16 @@
+open import Pervasives
+open import Pervasives_extra
+open import Sail2_instr_kinds
+open import Sail2_values
+open import Sail2_operators_mwords
+open import Sail2_prompt_monad
+open import Sail2_prompt
+
+val write_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => write_kind -> mword 'a -> integer -> mword 'n -> unit -> monad 'rv bool 'e
+let write_ram wk addr width data meta =
+  write_mem wk () addr width data
+
+val read_ram : forall 'rv 'e 'a 'n. Size 'a, Size 'n => read_kind -> mword 'a -> integer -> bool -> monad 'rv (mword 'n * unit) 'e
+let read_ram rk addr width read_tag =
+  read_mem rk () addr width >>= (fun (data : mword 'n) ->
+  return (data, ()))
diff --git a/handwritten_support/mem_metadata.v b/handwritten_support/mem_metadata.v
new file mode 100644
index 0000000..e70d395
--- /dev/null
+++ b/handwritten_support/mem_metadata.v
@@ -0,0 +1,11 @@
+Require Import Sail2_instr_kinds.
+Require Import Sail2_values.
+Require Import Sail2_operators_mwords.
+Require Import Sail2_prompt_monad.
+Require Import Sail2_prompt.
+
+Definition write_ram {rv e a} wk (addr : mword a) size (v : mword (8 * size)) (meta : unit) : monad rv bool e := write_mem wk a addr size v.
+
+Definition read_ram {rv e a} rk (addr : mword a) size (read_tag : bool) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size) * unit) e :=
+  read_mem rk a addr size >>= fun data =>
+  returnm (data, tt).
diff --git a/handwritten_support/riscv_extras.lem b/handwritten_support/riscv_extras.lem
index da6106d..d8dec88 100644
--- a/handwritten_support/riscv_extras.lem
+++ b/handwritten_support/riscv_extras.lem
@@ -79,6 +79,10 @@ val sys_enable_rvc : unit -> bool
 let sys_enable_rvc () = true
 declare ocaml target_rep function sys_enable_rvc = `Platform.enable_rvc`
 
+val sys_enable_fdext : unit -> bool
+let sys_enable_fdext () = true
+declare ocaml target_rep function sys_enable_fdext = `Platform.enable_fdext`
+
 val plat_ram_base : forall 'a. Size 'a => unit -> bitvector 'a
 let plat_ram_base () = wordFromInteger 0
 declare ocaml target_rep function plat_ram_base = `Platform.dram_base`
diff --git a/handwritten_support/riscv_extras.v b/handwritten_support/riscv_extras.v
index 84f6761..8d7cefc 100644
--- a/handwritten_support/riscv_extras.v
+++ b/handwritten_support/riscv_extras.v
@@ -45,12 +45,12 @@ val MEMr_reserved_acquire        : forall 'rv 'a 'b 'e. Size 'a, Size 'b => inte
 val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e
 *)
 
-Definition MEMr {rv e} addrsize size (hexRAM addr : mword addrsize)                         `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_plain addrsize addr size.
-Definition MEMr_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)                 `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_acquire addrsize addr size.
-Definition MEMr_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)          `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_strong_acquire addrsize addr size.
-Definition MEMr_reserved {rv e} addrsize size (hexRAM addr : mword addrsize)                `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved addrsize addr size.
-Definition MEMr_reserved_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)        `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_acquire addrsize addr size.
-Definition MEMr_reserved_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >= 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_strong_acquire addrsize addr size.
+Definition MEMr {rv e} addrsize size (hexRAM addr : mword addrsize)                         `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_plain addrsize addr size.
+Definition MEMr_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)                 `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_acquire addrsize addr size.
+Definition MEMr_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)          `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_strong_acquire addrsize addr size.
+Definition MEMr_reserved {rv e} addrsize size (hexRAM addr : mword addrsize)                `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved addrsize addr size.
+Definition MEMr_reserved_acquire {rv e} addrsize size (hexRAM addr : mword addrsize)        `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_acquire addrsize addr size.
+Definition MEMr_reserved_strong_acquire {rv e} addrsize size (hexRAM addr : mword addrsize) `{ArithFact (size >=? 0)} : monad rv (mword (8 * size)) e := read_mem Read_RISCV_reserved_strong_acquire addrsize addr size.
 
 (*
 val MEMw                            : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv bool 'e
@@ -87,14 +87,14 @@ Definition undefined_string {rv e} (_:unit) : monad rv string e := returnm ""%st
 Definition undefined_unit {rv e} (_:unit) : monad rv unit e := returnm tt.
 Definition undefined_int {rv e} (_:unit) : monad rv Z e := returnm (0:ii).
 (*val undefined_vector : forall 'rv 'a 'e. integer -> 'a -> monad 'rv (list 'a) 'e*)
-Definition undefined_vector {rv a e} len (u : a) `{ArithFact (len >= 0)} : monad rv (vec a len) e := returnm (vec_init u len).
+Definition undefined_vector {rv a e} len (u : a) `{ArithFact (len >=? 0)} : monad rv (vec a len) e := returnm (vec_init u len).
 (*val undefined_bitvector : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*)
-Definition undefined_bitvector {rv e} len `{ArithFact (len >= 0)} : monad rv (mword len) e := returnm (mword_of_int 0).
+Definition undefined_bitvector {rv e} len `{ArithFact (len >=? 0)} : monad rv (mword len) e := returnm (mword_of_int 0).
 (*val undefined_bits : forall 'rv 'a 'e. Bitvector 'a => integer -> monad 'rv 'a 'e*)
 Definition undefined_bits {rv e} := @undefined_bitvector rv e.
 Definition undefined_bit {rv e} (_:unit) : monad rv bitU e := returnm BU.
 (*Definition undefined_real {rv e} (_:unit) : monad rv real e := returnm (realFromFrac 0 1).*)
-Definition undefined_range {rv e} i j `{ArithFact (i <= j)} : monad rv {z : Z & ArithFact (i <= z /\ z <= j)} e := returnm (build_ex i).
+Definition undefined_range {rv e} i j `{ArithFact (i <=? j)} : monad rv {z : Z & ArithFact (i <=? z <=? j)} e := returnm (build_ex i).
 Definition undefined_atom {rv e} i : monad rv Z e := returnm i.
 Definition undefined_nat {rv e} (_:unit) : monad rv Z e := returnm (0:ii).
 
@@ -119,10 +119,12 @@ Definition eq_bit (x : bitU) (y : bitU) : bool :=
   end.
 
 Require Import Zeuclid.
-Definition euclid_modulo (m n : Z) `{ArithFact (n > 0)} : {z : Z & ArithFact (0 <= z <= n-1)}.
+Definition euclid_modulo (m n : Z) `{ArithFact (n >? 0)} : {z : Z & ArithFact (0 <=? z <=? n-1)}.
 apply existT with (x := ZEuclid.modulo m n).
 constructor.
 destruct H.
+unbool_comparisons.
+unbool_comparisons_goal.
 assert (Z.abs n = n). { rewrite Z.abs_eq; auto with zarith. }
 rewrite <- H at 3.
 lapply (ZEuclid.mod_always_pos m n); omega.
@@ -143,6 +145,7 @@ Definition string_of_int z := DecimalString.NilZero.string_of_int (Z.to_int z).
 
 Axiom sys_enable_writable_misa : unit -> bool.
 Axiom sys_enable_rvc : unit -> bool.
+Axiom sys_enable_fdext : unit -> bool.
 
 (* The constraint solver can do this itself, but a Coq bug puts
    anonymous_subproof into the term instead of an actual subproof. *)
diff --git a/handwritten_support/riscv_extras_fdext.lem b/handwritten_support/riscv_extras_fdext.lem
new file mode 100644
index 0000000..3c79089
--- /dev/null
+++ b/handwritten_support/riscv_extras_fdext.lem
@@ -0,0 +1,109 @@
+open import Pervasives
+open import Pervasives_extra
+open import Sail2_instr_kinds
+open import Sail2_values
+open import Sail2_operators_mwords
+open import Sail2_prompt_monad
+open import Sail2_prompt
+
+type bitvector 'a = mword 'a
+
+(* stub functions emulating the C softfloat interface *)
+
+val softfloat_f32_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_add _ _ _ = ()
+
+val softfloat_f32_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_sub _ _ _ = ()
+
+val softfloat_f32_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_mul _ _ _ = ()
+
+val softfloat_f32_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_div _ _ _ = ()
+
+val softfloat_f64_add : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_add _ _ _ = ()
+
+val softfloat_f64_sub : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_sub _ _ _ = ()
+
+val softfloat_f64_mul : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_mul _ _ _ = ()
+
+val softfloat_f64_div : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_div _ _ _ = ()
+
+
+val softfloat_f32_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit
+let softfloat_f32_muladd _ _ _ _ = ()
+
+val softfloat_f64_muladd : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> bitvector 's -> bitvector 's -> unit
+let softfloat_f64_muladd _ _ _ _ = ()
+
+
+val softfloat_f32_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_sqrt _ _ = ()
+
+val softfloat_f64_sqrt : forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_sqrt _ _ = ()
+
+
+val softfloat_f32_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_i32 _ _ = ()
+
+val softfloat_f32_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_ui32 _ _ = ()
+
+val softfloat_i32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i32_to_f32 _ _ = ()
+
+val softfloat_ui32_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui32_to_f32 _ _ = ()
+
+val softfloat_f32_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_i64 _ _ = ()
+
+val softfloat_f32_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_ui64 _ _ = ()
+
+val softfloat_i64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i64_to_f32 _ _ = ()
+
+val softfloat_ui64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui64_to_f32 _ _ = ()
+
+
+val softfloat_f64_to_i32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_i32 _ _ = ()
+
+val softfloat_f64_to_ui32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_ui32 _ _ = ()
+
+val softfloat_i32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i32_to_f64 _ _ = ()
+
+val softfloat_ui32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui32_to_f64 _ _ = ()
+
+val softfloat_f64_to_i64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_i64 _ _ = ()
+
+val softfloat_f64_to_ui64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_ui64 _ _ = ()
+
+val softfloat_i64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_i64_to_f64 _ _ = ()
+
+val softfloat_ui64_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_ui64_to_f64 _ _ = ()
+
+
+val softfloat_f32_to_f64: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f32_to_f64 _ _ = ()
+
+val softfloat_f64_to_f32: forall 'rm 's. Size 'rm, Size 's => bitvector 'rm -> bitvector 's -> unit
+let softfloat_f64_to_f32 _ _ = ()
+
+
+
diff --git a/model/prelude_mem.sail b/model/prelude_mem.sail
index b8d47d0..85d141b 100644
--- a/model/prelude_mem.sail
+++ b/model/prelude_mem.sail
@@ -17,15 +17,16 @@
    would be even better if it could be <= 8 bytes so that data can
    also be a 64-bit int but CHERI needs 128-bit accesses for
    capabilities and SIMD / vector instructions will also need more. */
-   type max_mem_access : Int = 16
+type max_mem_access : Int = 16
 
-val write_ram : forall 'n, 0 < 'n <= max_mem_access . (write_kind, xlenbits, atom('n), bits(8 * 'n), mem_meta) -> bool effect {wmv, wmvt}
+val write_ram = {lem: "write_ram", coq: "write_ram"} : forall 'n, 0 < 'n <= max_mem_access . (write_kind, xlenbits, atom('n), bits(8 * 'n), mem_meta) -> bool effect {wmv, wmvt}
 function write_ram(wk, addr, width, data, meta) = {
   /* Write out metadata only if the value write succeeds.
    * It is assumed for now that this write always succeeds;
    * there is currently no return value.
-   * FIXME: We should convert the external API to consume
-   * the value along with the metadata to ensure atomicity.
+   * FIXME: We should convert the external API for all backends
+   * (not just for Lem) to consume the value along with the
+   * metadata to ensure atomicity.
    */
   let ret : bool = __write_mem(wk, sizeof(xlen), addr, width, data);
   if ret then __WriteRAM_Meta(addr, width, meta);
@@ -36,10 +37,10 @@ val write_ram_ea : forall 'n, 0 < 'n <= max_mem_access . (write_kind, xlenbits,
 function write_ram_ea(wk, addr, width) =
   __write_mem_ea(wk, sizeof(xlen), addr, width)
 
-/* FIXME: Make this also return the metadata, which will also require external API changes. */
-val read_ram : forall 'n, 0 < 'n <= max_mem_access .  (read_kind, xlenbits, atom('n)) -> bits(8 * 'n) effect {rmem}
-function read_ram(rk, addr, width) =
-  __read_mem(rk, sizeof(xlen), addr, width)
+val read_ram = {lem: "read_ram", coq: "read_ram"} : forall 'n, 0 < 'n <= max_mem_access .  (read_kind, xlenbits, atom('n), bool) -> (bits(8 * 'n), mem_meta) effect {rmem, rmemt}
+function read_ram(rk, addr, width, read_meta) =
+  let meta = if read_meta then __ReadRAM_Meta(addr, width) else default_meta in
+  (__read_mem(rk, sizeof(xlen), addr, width), meta)
 
 val __TraceMemoryWrite : forall 'n 'm. (atom('n), bits('m), bits(8 * 'n)) -> unit
 val __TraceMemoryRead  : forall 'n 'm. (atom('n), bits('m), bits(8 * 'n)) -> unit
diff --git a/model/riscv_csr_ext.sail b/model/riscv_csr_ext.sail
index 8c0cc17..9220534 100644
--- a/model/riscv_csr_ext.sail
+++ b/model/riscv_csr_ext.sail
@@ -1,8 +1,12 @@
 
-/* numeric fallback XXX apparent sail bug prevents this from compiling for C  */
-//mapping clause csr_name_map = reg <-> "UNKNOWN CSR: " ^ hex_bits_12(reg)
+mapping clause csr_name_map = reg <-> hex_bits_12(reg)
 end csr_name_map
 
+/* XXX due to an apparent Sail bug the definition of this function must appear
+   after the last csr_name_map clause and not by the val spec as it was 
+   previously. */
+function csr_name(csr) = csr_name_map(csr)
+
 function clause ext_is_CSR_defined(_, _) = false
 end ext_is_CSR_defined
 
diff --git a/model/riscv_csr_map.sail b/model/riscv_csr_map.sail
index 7ec161b..ba52da6 100644
--- a/model/riscv_csr_map.sail
+++ b/model/riscv_csr_map.sail
@@ -93,7 +93,6 @@ mapping clause csr_name_map = 0x7a2  <-> "tdata2"
 mapping clause csr_name_map = 0x7a3  <-> "tdata3"
 
 val csr_name : csreg -> string
-function csr_name(csr) = csr_name_map(csr)
 overload to_str = {csr_name}
 
 /* Extensions may want to add additional CSR registers to the CSR address map.
diff --git a/model/riscv_duopod.sail b/model/riscv_duopod.sail
index 395a332..b811824 100644
--- a/model/riscv_duopod.sail
+++ b/model/riscv_duopod.sail
@@ -1,4 +1,6 @@
-// This file depends on the xlen definitions in riscv_xlen.sail.
+
+$include "prelude.sail"
+$include "riscv_xlen64.sail"
 
 type regbits = bits(5)
 
@@ -23,7 +25,7 @@ function rX(r) =
 
 val wX : (regbits, xlenbits) -> unit effect {wreg}
 
-function wX (r, v) =
+function wX(r, v) =
   if r != 0b00000 then {
      Xs[unsigned(r)] = v;
   }
diff --git a/model/riscv_ext_regs.sail b/model/riscv_ext_regs.sail
index 9ff83b3..d9674f7 100644
--- a/model/riscv_ext_regs.sail
+++ b/model/riscv_ext_regs.sail
@@ -10,5 +10,22 @@ This function is called after above when running rvfi and allows the model
 to be initialised differently (e.g. CHERI cap regs are initialised
 to omnipotent instead of null).
  */
-val ext_rvfi_init : unit -> unit effect {wreg}
-function ext_rvfi_init () = ()
+val ext_rvfi_init : unit -> unit effect {rreg, wreg}
+function ext_rvfi_init () = {
+  x1 = x1 // to avoid hook being optimized out
+}
+
+
+/*!
+THIS(csrno, priv, isWrite) allows an extension to block access to csrno,
+at Privilege level priv. It should return true if the access is allowed.
+*/
+val ext_check_CSR : (bits(12), Privilege, bool) -> bool
+function ext_check_CSR (csrno, p, isWrite) = true
+
+/*!
+THIS is called if ext_check_CSR returns false. It should
+cause an appropriate RISCV exception.
+ */
+val ext_check_CSR_fail : unit->unit
+function ext_check_CSR_fail () = ()
diff --git a/model/riscv_fdext_control.sail b/model/riscv_fdext_control.sail
new file mode 100644
index 0000000..7155699
--- /dev/null
+++ b/model/riscv_fdext_control.sail
@@ -0,0 +1,24 @@
+/* **************************************************************** */
+/* Floating point register file and accessors for F, D extensions   */
+/* Floating point CSR and accessors                                 */
+/* **************************************************************** */
+
+/* Original version written by Rishiyur S. Nikhil, Sept-Oct 2019    */
+
+/* **************************************************************** */
+
+/* val clause ext_is_CSR_defined : (csreg, Privilege) -> bool effect {rreg} */
+
+function clause ext_is_CSR_defined (0x001, _) = haveFExt() | haveDExt()
+function clause ext_is_CSR_defined (0x002, _) = haveFExt() | haveDExt()
+function clause ext_is_CSR_defined (0x003, _) = haveFExt() | haveDExt()
+
+function clause ext_read_CSR (0x001) = Some (EXTZ (fcsr.FFLAGS()))
+function clause ext_read_CSR (0x002) = Some (EXTZ (fcsr.FRM()))
+function clause ext_read_CSR (0x003) = Some (EXTZ (fcsr.bits()))
+
+function clause ext_write_CSR (0x001, value) = write_fcsr (fcsr.FRM(), value [4..0])
+function clause ext_write_CSR (0x002, value) = write_fcsr (value [2..0], fcsr.FFLAGS())
+function clause ext_write_CSR (0x003, value) = write_fcsr (value [7..5], value [4..0])
+
+/* **************************************************************** */
diff --git a/model/riscv_fdext_regs.sail b/model/riscv_fdext_regs.sail
new file mode 100644
index 0000000..59efd22
--- /dev/null
+++ b/model/riscv_fdext_regs.sail
@@ -0,0 +1,294 @@
+/* **************************************************************** */
+/* Floating point register file and accessors for F, D extensions   */
+/* Floating point CSR and accessors                                 */
+/* **************************************************************** */
+
+/* Original version written by Rishiyur S. Nikhil, Sept-Oct 2019    */
+
+/* **************************************************************** */
+/* Floating point register file                                     */
+
+register fs : vector(32, dec, fregtype)
+
+register f0  : fregtype
+register f1  : fregtype
+register f2  : fregtype
+register f3  : fregtype
+register f4  : fregtype
+register f5  : fregtype
+register f6  : fregtype
+register f7  : fregtype
+register f8  : fregtype
+register f9  : fregtype
+register f10 : fregtype
+register f11 : fregtype
+register f12 : fregtype
+register f13 : fregtype
+register f14 : fregtype
+register f15 : fregtype
+register f16 : fregtype
+register f17 : fregtype
+register f18 : fregtype
+register f19 : fregtype
+register f20 : fregtype
+register f21 : fregtype
+register f22 : fregtype
+register f23 : fregtype
+register f24 : fregtype
+register f25 : fregtype
+register f26 : fregtype
+register f27 : fregtype
+register f28 : fregtype
+register f29 : fregtype
+register f30 : fregtype
+register f31 : fregtype
+
+function dirty_fd_context() -> unit = {
+  mstatus->FS() = extStatus_to_bits(Dirty);
+  mstatus->SD() = 0b1
+}
+
+val rF : forall 'n, 0 <= 'n < 32. regno('n) -> flenbits effect {rreg, escape}
+function rF r = {
+  let v : fregtype =
+    match r {
+      0 => f0,
+      1 => f1,
+      2 => f2,
+      3 => f3,
+      4 => f4,
+      5 => f5,
+      6 => f6,
+      7 => f7,
+      8 => f8,
+      9 => f9,
+      10 => f10,
+      11 => f11,
+      12 => f12,
+      13 => f13,
+      14 => f14,
+      15 => f15,
+      16 => f16,
+      17 => f17,
+      18 => f18,
+      19 => f19,
+      20 => f20,
+      21 => f21,
+      22 => f22,
+      23 => f23,
+      24 => f24,
+      25 => f25,
+      26 => f26,
+      27 => f27,
+      28 => f28,
+      29 => f29,
+      30 => f30,
+      31 => f31,
+      _  => {assert(false, "invalid floating point register number"); zero_freg}
+    };
+  fregval_from_freg(v)
+}
+
+val wF : forall 'n, 0 <= 'n < 32. (regno('n), flenbits) -> unit effect {wreg, escape}
+function wF (r, in_v) = {
+  let v = fregval_into_freg(in_v);
+  match r {
+    0  => f0 = v,
+    1  => f1 = v,
+    2  => f2 = v,
+    3  => f3 = v,
+    4  => f4 = v,
+    5  => f5 = v,
+    6  => f6 = v,
+    7  => f7 = v,
+    8  => f8 = v,
+    9  => f9 = v,
+    10 => f10 = v,
+    11 => f11 = v,
+    12 => f12 = v,
+    13 => f13 = v,
+    14 => f14 = v,
+    15 => f15 = v,
+    16 => f16 = v,
+    17 => f17 = v,
+    18 => f18 = v,
+    19 => f19 = v,
+    20 => f20 = v,
+    21 => f21 = v,
+    22 => f22 = v,
+    23 => f23 = v,
+    24 => f24 = v,
+    25 => f25 = v,
+    26 => f26 = v,
+    27 => f27 = v,
+    28 => f28 = v,
+    29 => f29 = v,
+    30 => f30 = v,
+    31 => f31 = v,
+    _  => assert(false, "invalid floating point register number")
+  };
+
+  dirty_fd_context();
+
+  if   get_config_print_reg()
+  then
+      /* TODO: will only print bits; should we print in floating point format? */
+      print_reg("f" ^ string_of_int(r) ^ " <- " ^ FRegStr(v));
+}
+
+function rF_bits(i: bits(5)) -> flenbits = rF(unsigned(i))
+
+function wF_bits(i: bits(5), data: flenbits) -> unit = {
+  wF(unsigned(i)) = data
+}
+
+overload F = {rF_bits, wF_bits, rF, wF}
+
+/* register names */
+
+val freg_name_abi : regidx <-> string
+
+mapping freg_name_abi = {
+    0b00000 <-> "ft0",
+    0b00001 <-> "ft1",
+    0b00010 <-> "ft2",
+    0b00011 <-> "ft3",
+    0b00100 <-> "ft4",
+    0b00101 <-> "ft5",
+    0b00110 <-> "ft6",
+    0b00111 <-> "ft7",
+    0b01000 <-> "fs0",
+    0b01001 <-> "fs1",
+    0b01010 <-> "fa0",
+    0b01011 <-> "fa1",
+    0b01100 <-> "fa2",
+    0b01101 <-> "fa3",
+    0b01110 <-> "fa4",
+    0b01111 <-> "fa5",
+    0b10000 <-> "fa6",
+    0b10001 <-> "fa7",
+    0b10010 <-> "fs2",
+    0b10011 <-> "fs3",
+    0b10100 <-> "fs4",
+    0b10101 <-> "fs5",
+    0b10110 <-> "fs6",
+    0b10111 <-> "fs7",
+    0b11000 <-> "fs8",
+    0b11001 <-> "fs9",
+    0b11010 <-> "fs10",
+    0b11011 <-> "fs11",
+    0b11100 <-> "ft8",
+    0b11101 <-> "ft9",
+    0b11110 <-> "ft10",
+    0b11111 <-> "ft11"
+}
+
+overload to_str = {freg_name_abi}
+
+/* mappings for assembly */
+
+val freg_name : bits(5) <-> string
+mapping freg_name = {
+    0b00000 <-> "ft0",
+    0b00001 <-> "ft1",
+    0b00010 <-> "ft2",
+    0b00011 <-> "ft3",
+    0b00100 <-> "ft4",
+    0b00101 <-> "ft5",
+    0b00110 <-> "ft6",
+    0b00111 <-> "ft7",
+    0b01000 <-> "fs0",
+    0b01001 <-> "fs1",
+    0b01010 <-> "fa0",
+    0b01011 <-> "fa1",
+    0b01100 <-> "fa2",
+    0b01101 <-> "fa3",
+    0b01110 <-> "fa4",
+    0b01111 <-> "fa5",
+    0b10000 <-> "fa6",
+    0b10001 <-> "fa7",
+    0b10010 <-> "fs2",
+    0b10011 <-> "fs3",
+    0b10100 <-> "fs4",
+    0b10101 <-> "fs5",
+    0b10110 <-> "fs6",
+    0b10111 <-> "fs7",
+    0b11000 <-> "fs8",
+    0b11001 <-> "fs9",
+    0b11010 <-> "fs10",
+    0b11011 <-> "fs11",
+    0b11100 <-> "ft8",
+    0b11101 <-> "ft9",
+    0b11110 <-> "ft10",
+    0b11111 <-> "ft11"
+}
+
+val init_fdext_regs : unit -> unit effect {wreg}
+function init_fdext_regs () = {
+  f0  = zero_freg;
+  f1  = zero_freg;
+  f2  = zero_freg;
+  f3  = zero_freg;
+  f4  = zero_freg;
+  f5  = zero_freg;
+  f6  = zero_freg;
+  f7  = zero_freg;
+  f8  = zero_freg;
+  f9  = zero_freg;
+  f10 = zero_freg;
+  f11 = zero_freg;
+  f12 = zero_freg;
+  f13 = zero_freg;
+  f14 = zero_freg;
+  f15 = zero_freg;
+  f16 = zero_freg;
+  f17 = zero_freg;
+  f18 = zero_freg;
+  f19 = zero_freg;
+  f20 = zero_freg;
+  f21 = zero_freg;
+  f22 = zero_freg;
+  f23 = zero_freg;
+  f24 = zero_freg;
+  f25 = zero_freg;
+  f26 = zero_freg;
+  f27 = zero_freg;
+  f28 = zero_freg;
+  f29 = zero_freg;
+  f30 = zero_freg;
+  f31 = zero_freg
+}
+
+/* **************************************************************** */
+/* Floating Point CSR                                               */
+/*     fflags    address 0x001    same as fcrs [4..0]               */
+/*     frm       address 0x002    same as fcrs [7..5]               */
+/*     fcsr      address 0x003                                      */
+
+
+bitfield Fcsr : bits(32) = {
+  FRM    : 7 .. 5,
+  FFLAGS : 4 .. 0,
+}
+
+register fcsr : Fcsr
+
+val write_fcsr : (bits(3), bits(5)) -> option(xlenbits) effect {rreg, wreg}
+function write_fcsr (frm, fflags) = {
+  fcsr->FRM()    = frm;      /* Note: frm can be an illegal value, 101, 110, 111 */
+  fcsr->FFLAGS() = fflags;
+  dirty_fd_context();
+  Some (EXTZ (fcsr.bits()))
+}
+
+val write_fflags : (bits(5)) -> unit effect {rreg, wreg}
+function write_fflags(fflags) = {
+  fcsr->FFLAGS() = fflags;
+  dirty_fd_context();
+}
+
+val write_frm : (bits(3)) -> unit effect {rreg, wreg}
+function write_frm(frm) = {
+  fcsr->FRM()    = frm;
+  dirty_fd_context();
+}
diff --git a/model/riscv_fetch.sail b/model/riscv_fetch.sail
index 64aff4b..cdda96e 100644
--- a/model/riscv_fetch.sail
+++ b/model/riscv_fetch.sail
@@ -4,7 +4,7 @@
 
 function isRVC(h : half) -> bool = ~ (h[1 .. 0] == 0b11)
 
-val fetch : unit -> FetchResult effect {escape, rmem, rreg, wmv, wmvt, wreg}
+val fetch : unit -> FetchResult effect {escape, rmem, rmemt, rreg, wmv, wmvt, wreg}
 function fetch() -> FetchResult =
   /* fetch PC check for extensions: extensions return a transformed PC to fetch,
    * but any exceptions use the untransformed PC.
@@ -22,7 +22,7 @@ function fetch() -> FetchResult =
            * exceptions.
            */
           match mem_read(Execute(), ppclo, 2, false, false, false) {
-            MemException(e) => F_Error(E_Fetch_Access_Fault(), PC),
+            MemException(e) => F_Error(e, PC),
             MemValue(ilo)   => {
               if   isRVC(ilo)
               then F_RVC(ilo)
@@ -36,7 +36,7 @@ function fetch() -> FetchResult =
                       TR_Failure(e, _)     => F_Error(e, PC_hi),
                       TR_Address(ppchi, _) => {
                         match mem_read(Execute(), ppchi, 2, false, false, false) {
-                          MemException(e) => F_Error(E_Fetch_Access_Fault(), PC_hi),
+                          MemException(e) => F_Error(e, PC_hi),
                           MemValue(ihi)   => F_Base(append(ihi, ilo))
                         }
                       }
diff --git a/model/riscv_flen_D.sail b/model/riscv_flen_D.sail
new file mode 100644
index 0000000..eabd613
--- /dev/null
+++ b/model/riscv_flen_D.sail
@@ -0,0 +1,5 @@
+/* Define the FLEN value for the 'D' extension. */
+
+type flen       : Int = 64
+type flen_bytes : Int = 8
+type flenbits         = bits(flen)
diff --git a/model/riscv_flen_F.sail b/model/riscv_flen_F.sail
new file mode 100644
index 0000000..ad5b381
--- /dev/null
+++ b/model/riscv_flen_F.sail
@@ -0,0 +1,5 @@
+/* Define the FLEN value for the 'F' extension. */
+
+type flen       : Int = 32
+type flen_bytes : Int = 4
+type flenbits         = bits(flen)
diff --git a/model/riscv_freg_type.sail b/model/riscv_freg_type.sail
new file mode 100644
index 0000000..3b099db
--- /dev/null
+++ b/model/riscv_freg_type.sail
@@ -0,0 +1,52 @@
+/* Definitions for floating point registers (F and D extensions) */
+
+/* default register type */
+type fregtype = flenbits
+
+/* default zero register */
+let zero_freg : fregtype = EXTZ(0x0)
+
+/* default register printer */
+val FRegStr : fregtype -> string
+function FRegStr(r) = BitStr(r)
+
+/* conversions */
+
+val fregval_from_freg : fregtype -> flenbits
+function fregval_from_freg(r) = r
+
+val fregval_into_freg : flenbits -> fregtype
+function fregval_into_freg(v) = v
+
+
+/* Rounding Mode
+    Rounding modes occur as a 3-bit field in F,D instructions,
+    and also as a 3-bit 'frm' field in the 'fcsr' CSR.
+    RISC-V uses the following IEEE-defined rounding modes.
+*/
+
+enum rounding_mode = {RM_RNE, RM_RTZ, RM_RDN, RM_RUP, RM_RMM, RM_DYN}
+
+enum f_madd_op_S = {FMADD_S, FMSUB_S, FNMSUB_S, FNMADD_S}
+
+enum f_bin_rm_op_S = {FADD_S, FSUB_S, FMUL_S, FDIV_S}
+
+enum f_un_rm_op_S = {FSQRT_S, FCVT_W_S, FCVT_WU_S, FCVT_S_W, FCVT_S_WU,    // RV32 and RV64
+                     FCVT_L_S, FCVT_LU_S, FCVT_S_L, FCVT_S_LU}             // RV64 only
+
+enum f_un_op_S = {FCLASS_S, FMV_X_W, FMV_W_X}    /* RV32 and RV64 */
+
+enum f_bin_op_S = {FSGNJ_S, FSGNJN_S, FSGNJX_S, FMIN_S, FMAX_S, FEQ_S, FLT_S, FLE_S}
+
+enum f_madd_op_D = {FMADD_D, FMSUB_D, FNMSUB_D, FNMADD_D}
+
+enum f_bin_rm_op_D = {FADD_D, FSUB_D, FMUL_D, FDIV_D}
+
+enum f_un_rm_op_D = {FSQRT_D, FCVT_W_D, FCVT_WU_D, FCVT_D_W, FCVT_D_WU,    // RV32 and RV64
+                     FCVT_S_D, FCVT_D_S,
+                     FCVT_L_D, FCVT_LU_D, FCVT_D_L, FCVT_D_LU}             // RV64 only
+
+enum f_bin_op_D = {FSGNJ_D, FSGNJN_D, FSGNJX_D, FMIN_D, FMAX_D, FEQ_D, FLT_D, FLE_D}
+
+enum f_un_op_D = {FCLASS_D,            /* RV32 and RV64 */
+                  FMV_X_D, FMV_D_X}    /* RV64 only */
diff --git a/model/riscv_insts_aext.sail b/model/riscv_insts_aext.sail
index 7eb01c5..e760b90 100644
--- a/model/riscv_insts_aext.sail
+++ b/model/riscv_insts_aext.sail
@@ -198,21 +198,30 @@ function clause execute (AMO(op, aq, rl, rs2, rs1, width, rd)) = {
             let eares : MemoryOpResult(unit) = match (width, sizeof(xlen)) {
               (WORD, _)    => mem_write_ea(addr, 4, aq & rl, rl, true),
               (DOUBLE, 64) => mem_write_ea(addr, 8, aq & rl, rl, true),
-              _            => internal_error ("AMO expected WORD or DOUBLE")
+              _            => internal_error("AMO expected WORD or DOUBLE")
+            };
+            let is_unsigned : bool = match op {
+              AMOMINU => true,
+              AMOMAXU => true,
+              _       => false
+            };
+            let rs2_val : xlenbits = match width {
+              WORD   => if is_unsigned then EXTZ(X(rs2)[31..0]) else EXTS(X(rs2)[31..0]),
+              DOUBLE => X(rs2),
+              _      => internal_error("AMO expected WORD or DOUBLE")
             };
-            rs2_val : xlenbits = X(rs2);
             match (eares) {
               MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL },
               MemValue(_) => {
-                let rval : MemoryOpResult(xlenbits) = match (width, sizeof(xlen)) {
-                  (WORD, _)    => extend_value(false, mem_read(ReadWrite(Data), addr, 4, aq, aq & rl, true)),
-                  (DOUBLE, 64) => extend_value(false, mem_read(ReadWrite(Data), addr, 8, aq, aq & rl, true)),
-                  _            => internal_error ("AMO expected WORD or DOUBLE")
+                let mval : MemoryOpResult(xlenbits) = match (width, sizeof(xlen)) {
+                  (WORD, _)    => extend_value(is_unsigned, mem_read(ReadWrite(Data), addr, 4, aq, aq & rl, true)),
+                  (DOUBLE, 64) => extend_value(is_unsigned, mem_read(ReadWrite(Data), addr, 8, aq, aq & rl, true)),
+                  _            => internal_error("AMO expected WORD or DOUBLE")
                 };
-                match (rval) {
+                match (mval) {
                   MemException(e)  => { handle_mem_exception(addr, e); RETIRE_FAIL },
                   MemValue(loaded) => {
-                    result  : xlenbits =
+                    let result : xlenbits =
                       match op {
                         AMOSWAP => rs2_val,
                         AMOADD  => rs2_val + loaded,
@@ -228,14 +237,18 @@ function clause execute (AMO(op, aq, rl, rs2, rs1, width, rd)) = {
                         AMOMINU => to_bits(sizeof(xlen), min(unsigned(rs2_val), unsigned(loaded))),
                         AMOMAXU => to_bits(sizeof(xlen), max(unsigned(rs2_val), unsigned(loaded)))
                       };
-
+                    let rval : xlenbits = match width {
+                      WORD   => EXTS(loaded[31..0]),
+                      DOUBLE => loaded,
+                      _      => internal_error("AMO expected WORD or DOUBLE")
+                    };
                     let wval : MemoryOpResult(bool) = match (width, sizeof(xlen)) {
                       (WORD, _)    => mem_write_value(addr, 4, result[31..0], aq & rl, rl, true),
                       (DOUBLE, 64) => mem_write_value(addr, 8, result,        aq & rl, rl, true),
                       _            => internal_error("AMO expected WORD or DOUBLE")
                     };
                     match (wval) {
-                      MemValue(true)  => { X(rd) = loaded; RETIRE_SUCCESS },
+                      MemValue(true)  => { X(rd) = rval; RETIRE_SUCCESS },
                       MemValue(false) => { internal_error("AMO got false from mem_write_value") },
                       MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL }
                     }
@@ -266,4 +279,4 @@ mapping amo_mnemonic : amoop <-> string = {
 }
 
 mapping clause assembly = AMO(op, aq, rl, rs2, rs1, width, rd)
-  <-> amo_mnemonic(op) ^ "." ^ size_mnemonic(width) ^ maybe_aq(aq) ^ maybe_rl(rl) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ reg_name(rs2)
+  <-> amo_mnemonic(op) ^ "." ^ size_mnemonic(width) ^ maybe_aq(aq) ^ maybe_rl(rl) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs2) ^ sep() ^ "(" ^ reg_name(rs1) ^ ")"
diff --git a/model/riscv_insts_base.sail b/model/riscv_insts_base.sail
index d80d34d..bc86859 100644
--- a/model/riscv_insts_base.sail
+++ b/model/riscv_insts_base.sail
@@ -714,9 +714,11 @@ mapping clause encdec = MRET()
   <-> 0b0011000 @ 0b00010 @ 0b00000 @ 0b000 @ 0b00000 @ 0b1110011
 
 function clause execute MRET() = {
-  if   cur_privilege == Machine
-  then set_next_pc(exception_handler(cur_privilege, CTL_MRET(), PC))
-  else handle_illegal();
+  if   cur_privilege != Machine
+  then handle_illegal()
+  else if ~(ext_check_xret_priv (Machine))
+  then ext_fail_xret_priv ()
+  else set_next_pc(exception_handler(cur_privilege, CTL_MRET(), PC));
   RETIRE_FAIL
 }
 
@@ -729,15 +731,16 @@ mapping clause encdec = SRET()
   <-> 0b0001000 @ 0b00010 @ 0b00000 @ 0b000 @ 0b00000 @ 0b1110011
 
 function clause execute SRET() = {
-  match cur_privilege {
-    User       => handle_illegal(),
-    Supervisor => if   (~ (haveSupMode ())) | mstatus.TSR() == 0b1
-                  then handle_illegal()
-                  else set_next_pc(exception_handler(cur_privilege, CTL_SRET(), PC)),
-    Machine    => if   (~ (haveSupMode ()))
-                  then handle_illegal()
-                  else set_next_pc(exception_handler(cur_privilege, CTL_SRET(), PC))
+  let sret_illegal : bool = match cur_privilege {
+    User       => true,
+    Supervisor => ~ (haveSupMode ()) | mstatus.TSR() == 0b1,
+    Machine    => ~ (haveSupMode ())
   };
+  if   sret_illegal
+  then handle_illegal()
+  else if ~(ext_check_xret_priv (Supervisor))
+  then ext_fail_xret_priv ()
+  else set_next_pc(exception_handler(cur_privilege, CTL_SRET(), PC));
   RETIRE_FAIL
 }
 
diff --git a/model/riscv_insts_begin.sail b/model/riscv_insts_begin.sail
index b27711b..661a353 100644
--- a/model/riscv_insts_begin.sail
+++ b/model/riscv_insts_begin.sail
@@ -12,7 +12,7 @@ scattered function execute
 val assembly : ast <-> string
 scattered mapping assembly
 
-val encdec : ast <-> bits(32)
+val encdec : ast <-> bits(32) effect {rreg}
 scattered mapping encdec
 
 val encdec_compressed : ast <-> bits(16)
diff --git a/model/riscv_insts_dext.sail b/model/riscv_insts_dext.sail
new file mode 100644
index 0000000..9e68248
--- /dev/null
+++ b/model/riscv_insts_dext.sail
@@ -0,0 +1,922 @@
+/* **************************************************************** */
+/* This file specifies the instructions in the D extension          */
+/* (double precision floating point).                               */
+
+/* RISC-V follows IEEE 754-2008 floating point arithmetic standard. */
+
+/* Original version written by Rishiyur S. Nikhil, Sept-Oct 2019    */
+
+/* **************************************************************** */
+/* IMPORTANT!                                                       */
+/* The files 'riscv_insts_fext.sail' and 'riscv_insts_dext.sail'    */
+/* define the F and D extensions, respectively.                     */
+/* The texts follow each other very closely; please try to maintain */
+/* this correspondence as the files are maintained for bug-fixes,   */
+/* improvements, and version updates.                               */
+
+/* **************************************************************** */
+/* Note: Rounding Modes and Floating point accrued exception flags  */
+/* are defined in riscv_insts_fext.sail.                            */
+/* In RISC-V, the D extension requires the F extension, so that     */
+/* should have been processed before this one.                      */
+
+/* **************************************************************** */
+/* S and D value structure (sign, exponent, mantissa)               */
+
+/* TODO: this should be a 'mapping' */
+val      fsplit_D : bits(64) -> (bits(1), bits(11), bits(52))
+function fsplit_D   x64 = (x64[63..63], x64[62..52], x64[51..0])
+
+val      fmake_D  : (bits(1), bits(11), bits(52)) -> bits(64)
+function fmake_D (sign, exp, mant) = sign @ exp @ mant
+
+/* ---- Canonical NaNs */
+
+function canonical_NaN_D() -> bits(64) = 0x_7ff8_0000_0000_0000
+
+/* ---- Structure tests */
+
+val      f_is_neg_inf_D : bits(64) -> bool
+function f_is_neg_inf_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == 0b1)
+   & (exp  == ones())
+   & (mant == zeros()))
+}
+
+val      f_is_neg_norm_D : bits(64) -> bool
+function f_is_neg_norm_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == 0b1)
+   & (exp  != zeros())
+   & (exp  != ones()))
+}
+
+val      f_is_neg_subnorm_D : bits(64) -> bool
+function f_is_neg_subnorm_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == 0b1)
+   & (exp  == zeros())
+   & (mant != zeros()))
+}
+
+val      f_is_neg_zero_D : bits(64) -> bool
+function f_is_neg_zero_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == ones())
+   & (exp  == zeros())
+   & (mant == zeros()))
+}
+
+val      f_is_pos_zero_D : bits(64) -> bool
+function f_is_pos_zero_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == zeros())
+   & (exp  == zeros())
+   & (mant == zeros()))
+}
+
+val      f_is_pos_subnorm_D : bits(64) -> bool
+function f_is_pos_subnorm_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == zeros())
+   & (exp  == zeros())
+   & (mant != zeros()))
+}
+
+val      f_is_pos_norm_D : bits(64) -> bool
+function f_is_pos_norm_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == zeros())
+   & (exp  != zeros())
+   & (exp  != ones()))
+}
+
+val      f_is_pos_inf_D : bits(64) -> bool
+function f_is_pos_inf_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (sign == zeros())
+   & (exp  == ones())
+   & (mant == zeros()))
+}
+
+val      f_is_SNaN_D : bits(64) -> bool
+function f_is_SNaN_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (exp == ones())
+   & (mant [51] == bitzero)
+   & (mant != zeros()))
+}
+
+val      f_is_QNaN_D : bits(64) -> bool
+function f_is_QNaN_D   x64 = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  (  (exp == ones())
+   & (mant [51] == bitone))
+}
+
+/* **************************************************************** */
+/* Help functions used in the semantic functions                    */
+
+val      negate_D : bits(64) -> bits(64)
+function negate_D (x64) = {
+  let (sign, exp, mant) = fsplit_D (x64);
+  let new_sign = if (sign == 0b0) then 0b1 else 0b0;
+  fmake_D (new_sign, exp, mant)
+}
+
+val      feq_quiet_D : (bits(64), bits (64)) -> (bool, bits(5))
+function feq_quiet_D   (v1,       v2) = {
+  let (s1, e1, m1) = fsplit_D (v1);
+  let (s2, e2, m2) = fsplit_D (v2);
+
+  let v1Is0    = f_is_neg_zero_D(v1) | f_is_pos_zero_D(v1);
+  let v2Is0    = f_is_neg_zero_D(v2) | f_is_pos_zero_D(v2);
+
+  let result = ((v1 == v2) | (v1Is0 & v2Is0));
+
+  let fflags = if (f_is_SNaN_D(v1) | f_is_SNaN_D(v2)) then
+                 nvFlag()
+               else
+                 zeros();
+
+  (result, fflags)
+}
+
+val      flt_D : (bits(64), bits (64), bool) -> (bool, bits(5))
+function flt_D   (v1,       v2,        is_quiet) = {
+  let (s1, e1, m1) = fsplit_D (v1);
+  let (s2, e2, m2) = fsplit_D (v2);
+
+  let v1IsNaN  = f_is_QNaN_D(v1) | f_is_SNaN_D(v1);
+  let v2IsNaN  = f_is_QNaN_D(v2) | f_is_SNaN_D(v2);
+
+  let result : bool =
+    if (s1 == 0b0) & (s2 == 0b0) then
+      if (e1 == e2) then
+         unsigned (m1) < unsigned (m2)
+      else
+         unsigned (e1) < unsigned (e2)
+    else if (s1 == 0b0) & (s2 == 0b1) then
+      false
+    else if (s1 == 0b1) & (s2 == 0b0) then
+      true
+    else
+      if (e1 == e2) then
+        unsigned (m1) > unsigned (m2)
+      else
+        unsigned (e1) > unsigned (e2);
+
+  let fflags = if is_quiet then
+                 if (f_is_SNaN_D(v1) | f_is_SNaN_D(v2)) then
+                   nvFlag()
+                 else
+                   zeros()
+               else
+                 if (v1IsNaN | v2IsNaN) then
+                   nvFlag()
+                 else
+                   zeros();
+
+  (result, fflags)
+}
+
+val      fle_D : (bits(64), bits (64), bool) -> (bool, bits(5))
+function fle_D   (v1,       v2,        is_quiet) = {
+  let (s1, e1, m1) = fsplit_D (v1);
+  let (s2, e2, m2) = fsplit_D (v2);
+
+  let v1IsNaN  = f_is_QNaN_D(v1) | f_is_SNaN_D(v1);
+  let v2IsNaN  = f_is_QNaN_D(v2) | f_is_SNaN_D(v2);
+
+  let v1Is0    = f_is_neg_zero_D(v1) | f_is_pos_zero_D(v1);
+  let v2Is0    = f_is_neg_zero_D(v2) | f_is_pos_zero_D(v2);
+
+  let result : bool =
+    if (s1 == 0b0) & (s2 == 0b0) then
+      if (e1 == e2) then
+        unsigned (m1) <=  unsigned (m2)
+      else
+        unsigned (e1)  <  unsigned (e2)
+    else if (s1 == 0b0) & (s2 == 0b1) then
+      (v1Is0 & v2Is0)                         /* Equal in this case (+0=-0) */
+    else if (s1 == 0b1) & (s2 == 0b0) then
+      true
+    else
+      if (e1 == e2) then
+        unsigned (m1) >=  unsigned (m2)
+      else
+        unsigned (e1)  >  unsigned (e2);
+
+  let fflags = if is_quiet then
+                 if (f_is_SNaN_D(v1) | f_is_SNaN_D(v2)) then
+                   nvFlag()
+                 else
+                   zeros()
+               else
+                 if (v1IsNaN | v2IsNaN) then
+                   nvFlag()
+                 else
+                   zeros();
+
+  (result, fflags)
+}
+
+/* ****************************************************************** */
+/* Floating-point loads                                               */
+/* These are defined in: riscv_insts_fext.sail                        */
+
+/* ****************************************************************** */
+/* Floating-point stores                                              */
+/* These are defined in: riscv_insts_fext.sail                        */
+
+/* ****************************************************************** */
+/* Fused multiply-add */
+
+/* AST */
+
+union clause ast = F_MADD_TYPE_D : (regidx, regidx, regidx, rounding_mode, regidx, f_madd_op_D)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, FMADD_D)                         if is_RV32D_or_RV64D()
+<-> rs3 @ 0b01 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, FMSUB_D)                         if is_RV32D_or_RV64D()
+<-> rs3 @ 0b01 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_0111  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, FNMSUB_D)                        if is_RV32D_or_RV64D()
+<-> rs3 @ 0b01 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_1011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, FNMADD_D)                        if is_RV32D_or_RV64D()
+<-> rs3 @ 0b01 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_1111  if is_RV32D_or_RV64D()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, op)) = {
+  let rs1_val_64b = F(rs1);
+  let rs2_val_64b = F(rs2);
+  let rs3_val_64b = F(rs3);
+  let rm_3b       = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+  let (fflags, rd_val_64b) : (bits(5), bits(64)) =
+    match op {
+      FMADD_D  => riscv_f64MulAdd (rm_3b, rs1_val_64b, rs2_val_64b, rs3_val_64b),
+      FMSUB_D  => riscv_f64MulAdd (rm_3b, rs1_val_64b, rs2_val_64b, negate_D (rs3_val_64b)),
+      FNMSUB_D => riscv_f64MulAdd (rm_3b, negate_D (rs1_val_64b), rs2_val_64b, rs3_val_64b),
+      FNMADD_D => riscv_f64MulAdd (rm_3b, negate_D (rs1_val_64b), rs2_val_64b, negate_D (rs3_val_64b))
+    };
+  write_fflags(fflags);
+  F(rd) = rd_val_64b;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_madd_type_mnemonic_D : f_madd_op_D <-> string = {
+    FMADD_D  <-> "fmadd.d",
+    FMSUB_D  <-> "fmsub.d",
+    FNMSUB_D <-> "fnmsub.d",
+    FNMADD_D <-> "fnmadd.d"
+}
+
+mapping clause assembly = F_MADD_TYPE_D(rs3, rs2, rs1, rm, rd, op)
+                      <-> f_madd_type_mnemonic_D(op)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+                          ^ sep() ^ freg_name(rs3)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+/* ****************************************************************** */
+/* Binary ops with rounding mode */
+
+/* AST */
+
+union clause ast = F_BIN_RM_TYPE_D : (regidx, regidx, rounding_mode, regidx, f_bin_rm_op_D)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, FADD_D)                             if is_RV32D_or_RV64D()
+<-> 0b000_0001 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, FSUB_D)                             if is_RV32D_or_RV64D()
+<-> 0b000_0101 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, FMUL_D)                             if is_RV32D_or_RV64D()
+<-> 0b000_1001 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, FDIV_D)                             if is_RV32D_or_RV64D()
+<-> 0b000_1101 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, op)) = {
+  let rs1_val_64b = F(rs1);
+  let rs2_val_64b = F(rs2);
+  let rm_3b       = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+  let (fflags, rd_val_64b) : (bits(5), bits(64)) = match op {
+    FADD_D  => riscv_f64Add (rm_3b, rs1_val_64b, rs2_val_64b),
+    FSUB_D  => riscv_f64Sub (rm_3b, rs1_val_64b, rs2_val_64b),
+    FMUL_D  => riscv_f64Mul (rm_3b, rs1_val_64b, rs2_val_64b),
+    FDIV_D  => riscv_f64Div (rm_3b, rs1_val_64b, rs2_val_64b)
+  };
+  write_fflags(fflags);
+  F(rd) = rd_val_64b;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_bin_rm_type_mnemonic_D : f_bin_rm_op_D <-> string = {
+  FADD_D  <-> "fadd.d",
+  FSUB_D  <-> "fsub.d",
+  FMUL_D  <-> "fmul.d",
+  FDIV_D  <-> "fdiv.d"
+}
+
+mapping clause assembly = F_BIN_RM_TYPE_D(rs2, rs1, rm, rd, op)
+                      <-> f_bin_rm_type_mnemonic_D(op)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+/* ****************************************************************** */
+/* Unary with rounding mode */
+
+/* AST */
+
+union clause ast = F_UN_RM_TYPE_D : (regidx, rounding_mode, regidx, f_un_rm_op_D)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FSQRT_D)                                      if is_RV32D_or_RV64D()
+<-> 0b010_1101 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_W_D)                                     if is_RV32D_or_RV64D()
+<-> 0b110_0001 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_WU_D)                                    if is_RV32D_or_RV64D()
+<-> 0b110_0001 @ 0b00001 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_W)                                     if is_RV32D_or_RV64D()
+<-> 0b110_1001 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_WU)                                    if is_RV32D_or_RV64D()
+<-> 0b110_1001 @ 0b00001 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_S_D)                                     if is_RV32D_or_RV64D()
+<-> 0b010_0000 @ 0b00001 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_S)                                     if is_RV32D_or_RV64D()
+<-> 0b010_0001 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+/* D instructions, RV64 only */
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_L_D)                                     if is_RV64D()
+<-> 0b110_0001 @ 0b00010 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_LU_D)                                    if is_RV64D()
+<-> 0b110_0001 @ 0b00011 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_L)                                     if is_RV64D()
+<-> 0b110_1001 @ 0b00010 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64D()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_LU)                                    if is_RV64D()
+<-> 0b110_1001 @ 0b00011 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64D()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FSQRT_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_f64Sqrt   (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_W_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_W) = riscv_f64ToI32 (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  X(rd) = EXTS (rd_val_W);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_WU_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_WU) = riscv_f64ToUi32 (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  X(rd) = EXTS (rd_val_WU);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_W)) = {
+  let rs1_val_W = X(rs1) [31..0];
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_i32ToF64 (rm_3b, rs1_val_W);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_WU)) = {
+  let rs1_val_WU = X(rs1) [31..0];
+  let rm_3b      = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_ui32ToF64 (rm_3b, rs1_val_WU);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_S_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_S) = riscv_f64ToF32 (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_f32ToF64 (rm_3b, rs1_val_S);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_L_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_L) = riscv_f64ToI64 (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  X(rd) = rd_val_L;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_LU_D)) = {
+  let rs1_val_D = F(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_LU) = riscv_f64ToUi64 (rm_3b, rs1_val_D);
+
+  write_fflags(fflags);
+  X(rd) = rd_val_LU;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_L)) = {
+  let rs1_val_L = X(rs1);
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_i64ToF64 (rm_3b, rs1_val_L);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_LU)) = {
+  let rs1_val_LU = X(rs1);
+  let rm_3b      = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_D) = riscv_ui64ToF64 (rm_3b, rs1_val_LU);
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_un_rm_type_mnemonic_D : f_un_rm_op_D <-> string = {
+    FSQRT_D   <-> "fsqrt.d",
+    FCVT_W_D  <-> "fcvt.w.d",
+    FCVT_WU_D <-> "fcvt.wu.d",
+    FCVT_D_W  <-> "fcvt.d.w",
+    FCVT_D_WU <-> "fcvt.d.wu",
+
+    FCVT_L_D  <-> "fcvt.l.d",
+    FCVT_LU_D <-> "fcvt.lu.d",
+    FCVT_D_L  <-> "fcvt.d.l",
+    FCVT_D_LU <-> "fcvt.d.lu",
+
+    FCVT_S_D  <-> "fcvt.s.d",
+    FCVT_D_S  <-> "fcvt.d.s"
+}
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FSQRT_D)
+                      <-> f_un_rm_type_mnemonic_D(FSQRT_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_W_D)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_W_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_WU_D)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_WU_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_W)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_D_W)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_WU)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_D_WU)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_L_D)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_L_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_LU_D)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_LU_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_L)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_D_L)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_LU)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_D_LU)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_S_D)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_S_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_D(rs1, rm, rd, FCVT_D_S)
+                      <-> f_un_rm_type_mnemonic_D(FCVT_D_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+/* ****************************************************************** */
+/* Binary, no rounding mode */
+
+/* AST */
+
+union clause ast = F_BIN_TYPE_D : (regidx, regidx, regidx, f_bin_op_D)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJ_D)               if is_RV32D_or_RV64D()
+                    <-> 0b001_0001 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJN_D)              if is_RV32D_or_RV64D()
+                    <-> 0b001_0001 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJX_D)              if is_RV32D_or_RV64D()
+                    <-> 0b001_0001 @ rs2 @ rs1 @ 0b010 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FMIN_D)                if is_RV32D_or_RV64D()
+                    <-> 0b001_0101 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FMAX_D)                if is_RV32D_or_RV64D()
+                    <-> 0b001_0101 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FEQ_D)                 if is_RV32D_or_RV64D()
+                    <-> 0b101_0001 @ rs2 @ rs1 @ 0b010 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FLT_D)                 if is_RV32D_or_RV64D()
+                    <-> 0b101_0001 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+mapping clause encdec = F_BIN_TYPE_D(rs2, rs1, rd, FLE_D)                 if is_RV32D_or_RV64D()
+                    <-> 0b101_0001 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32D_or_RV64D()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FSGNJ_D)) = {
+  let rs1_val_D    = F(rs1);
+  let rs2_val_D    = F(rs2);
+  let (s1, e1, m1) = fsplit_D (rs1_val_D);
+  let (s2, e2, m2) = fsplit_D (rs2_val_D);
+  let rd_val_D     = fmake_D (s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FSGNJN_D)) = {
+  let rs1_val_D    = F(rs1);
+  let rs2_val_D    = F(rs2);
+  let (s1, e1, m1) = fsplit_D (rs1_val_D);
+  let (s2, e2, m2) = fsplit_D (rs2_val_D);
+  let rd_val_D     = fmake_D (0b1 ^ s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FSGNJX_D)) = {
+  let rs1_val_D    = F(rs1);
+  let rs2_val_D    = F(rs2);
+  let (s1, e1, m1) = fsplit_D (rs1_val_D);
+  let (s2, e2, m2) = fsplit_D (rs2_val_D);
+  let rd_val_D     = fmake_D (s1 ^ s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FMIN_D)) = {
+  let rs1_val_D = F(rs1);
+  let rs2_val_D = F(rs2);
+
+  let is_quiet  = true;
+  let (rs1_lt_rs2, fflags) = fle_D (rs1_val_D, rs2_val_D, is_quiet);
+
+  let rd_val_D  = if      (f_is_SNaN_D(rs1_val_D) & f_is_SNaN_D(rs2_val_D))         then canonical_NaN_D()
+                  else if f_is_SNaN_D(rs1_val_D)                                    then rs2_val_D
+                  else if f_is_SNaN_D(rs2_val_D)                                    then rs1_val_D
+                  else if (f_is_QNaN_D(rs1_val_D) & f_is_QNaN_D(rs2_val_D))         then canonical_NaN_D()
+                  else if f_is_QNaN_D(rs1_val_D)                                    then rs2_val_D
+                  else if f_is_QNaN_D(rs2_val_D)                                    then rs1_val_D
+                  else if (f_is_neg_zero_D(rs1_val_D) & f_is_pos_zero_D(rs2_val_D)) then rs1_val_D
+                  else if (f_is_neg_zero_D(rs2_val_D) & f_is_pos_zero_D(rs1_val_D)) then rs2_val_D
+                  else if rs1_lt_rs2                                                then rs1_val_D
+                  else /* (not rs1_lt_rs2) */                                            rs2_val_D;
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FMAX_D)) = {
+  let rs1_val_D = F(rs1);
+  let rs2_val_D = F(rs2);
+
+  let is_quiet  = true;
+  let (rs2_lt_rs1, fflags) = fle_D (rs2_val_D, rs1_val_D, is_quiet);
+
+  let rd_val_D  = if      (f_is_SNaN_D(rs1_val_D) & f_is_SNaN_D(rs2_val_D))         then canonical_NaN_D()
+                  else if f_is_SNaN_D(rs1_val_D)                                    then rs2_val_D
+                  else if f_is_SNaN_D(rs2_val_D)                                    then rs1_val_D
+                  else if (f_is_QNaN_D(rs1_val_D) & f_is_QNaN_D(rs2_val_D))         then canonical_NaN_D()
+                  else if f_is_QNaN_D(rs1_val_D)                                    then rs2_val_D
+                  else if f_is_QNaN_D(rs2_val_D)                                    then rs1_val_D
+                  else if (f_is_neg_zero_D(rs1_val_D) & f_is_pos_zero_D(rs2_val_D)) then rs2_val_D
+                  else if (f_is_neg_zero_D(rs2_val_D) & f_is_pos_zero_D(rs1_val_D)) then rs1_val_D
+                  else if rs2_lt_rs1                                                then rs1_val_D
+                  else /* (not rs2_lt_rs1) */                                            rs2_val_D;
+
+  write_fflags(fflags);
+  F(rd) = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FEQ_D)) = {
+  let rs1_val_D = F(rs1);
+  let rs2_val_D = F(rs2);
+
+  let (rs1_eq_rs2, fflags) = feq_quiet_D (rs1_val_D, rs2_val_D);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_D(rs1_val_D) | f_is_SNaN_D(rs2_val_D)) then zeros()
+      else if (f_is_QNaN_D(rs1_val_D) | f_is_QNaN_D(rs2_val_D)) then zeros()
+      else if rs1_eq_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FLT_D)) = {
+  let rs1_val_D = F(rs1);
+  let rs2_val_D = F(rs2);
+
+  let is_quiet  = false;
+  let (rs1_lt_rs2, fflags) = flt_D (rs1_val_D, rs2_val_D, is_quiet);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_D(rs1_val_D) | f_is_SNaN_D(rs2_val_D)) then zeros()
+      else if (f_is_QNaN_D(rs1_val_D) | f_is_QNaN_D(rs2_val_D)) then zeros()
+      else if rs1_lt_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_D(rs2, rs1, rd, FLE_D)) = {
+  let rs1_val_D = F(rs1);
+  let rs2_val_D = F(rs2);
+
+  let is_quiet  = false;
+  let (rs1_le_rs2, fflags) = fle_D (rs1_val_D, rs2_val_D, is_quiet);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_D(rs1_val_D) | f_is_SNaN_D(rs2_val_D)) then zeros()
+      else if (f_is_QNaN_D(rs1_val_D) | f_is_QNaN_D(rs2_val_D)) then zeros()
+      else if rs1_le_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_bin_type_mnemonic_D : f_bin_op_D <-> string = {
+    FSGNJ_D  <-> "fsgnj.d",
+    FSGNJN_D <-> "fsgnjn.d",
+    FSGNJX_D <-> "fsgnjx.d",
+    FMIN_D   <-> "fmin.d",
+    FMAX_D   <-> "fmax.d",
+    FEQ_D    <-> "feq.d",
+    FLT_D    <-> "flt.d",
+    FLE_D    <-> "fle.d"
+}
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJ_D)
+                      <-> f_bin_type_mnemonic_D(FSGNJ_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJN_D)
+                      <-> f_bin_type_mnemonic_D(FSGNJN_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FSGNJX_D)
+                      <-> f_bin_type_mnemonic_D(FSGNJX_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FMIN_D)
+                      <-> f_bin_type_mnemonic_D(FMIN_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FMAX_D)
+                      <-> f_bin_type_mnemonic_D(FMAX_D)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FEQ_D)
+                      <-> f_bin_type_mnemonic_D(FEQ_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FLT_D)
+                      <-> f_bin_type_mnemonic_D(FLT_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_D(rs2, rs1, rd, FLE_D)
+                      <-> f_bin_type_mnemonic_D(FLE_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+/* ****************************************************************** */
+/* Unary, no rounding mode */
+
+union clause ast = F_UN_TYPE_D : (regidx, regidx, f_un_op_D)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = F_UN_TYPE_D(rs1, rd, FCLASS_D)                        if haveDExt()
+                    <-> 0b111_0001 @ 0b00000 @ rs1 @ 0b001 @ rd @ 0b101_0011  if haveDExt()
+
+/* D instructions, RV64 only */
+
+mapping clause encdec = F_UN_TYPE_D(rs1, rd, FMV_X_D)                         if is_RV64D()
+                    <-> 0b111_0001 @ 0b00000 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV64D()
+
+mapping clause encdec = F_UN_TYPE_D(rs1, rd, FMV_D_X)                         if is_RV64D()
+                    <-> 0b111_1001 @ 0b00000 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV64D()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_UN_TYPE_D(rs1, rd, FCLASS_D)) = {
+  let rs1_val_D = F(rs1);
+
+  let rd_val_10b : bits (10) =
+    if      f_is_neg_inf_D     (rs1_val_D) then 0b_00_0000_0001
+    else if f_is_neg_norm_D    (rs1_val_D) then 0b_00_0000_0010
+    else if f_is_neg_subnorm_D (rs1_val_D) then 0b_00_0000_0100
+    else if f_is_neg_zero_D    (rs1_val_D) then 0b_00_0000_1000
+    else if f_is_pos_zero_D    (rs1_val_D) then 0b_00_0001_0000
+    else if f_is_pos_subnorm_D (rs1_val_D) then 0b_00_0010_0000
+    else if f_is_pos_norm_D    (rs1_val_D) then 0b_00_0100_0000
+    else if f_is_pos_inf_D     (rs1_val_D) then 0b_00_1000_0000
+    else if f_is_SNaN_D        (rs1_val_D) then 0b_01_0000_0000
+    else if f_is_QNaN_D        (rs1_val_D) then 0b_10_0000_0000
+    else zeros();
+
+  X(rd) = EXTZ (rd_val_10b);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_TYPE_D(rs1, rd, FMV_X_D)) = {
+  let rs1_val_D = F(rs1);
+  let rd_val_X  = rs1_val_D;
+  X(rd)         = rd_val_X;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_TYPE_D(rs1, rd, FMV_D_X)) = {
+  let rs1_val_X = X(rs1);
+  let rd_val_D  = rs1_val_X;
+  F(rd)         = rd_val_D;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_un_type_mnemonic_D : f_un_op_D <-> string = {
+    FMV_X_D  <-> "fmv.x.d",
+    FCLASS_D <-> "fclass.d",
+    FMV_D_X  <-> "fmv.d.x"
+}
+
+mapping clause assembly = F_UN_TYPE_D(rs1, rd, FMV_X_D)
+                      <-> f_un_type_mnemonic_D(FMV_X_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+
+mapping clause assembly = F_UN_TYPE_D(rs1, rd, FMV_D_X)
+                      <-> f_un_type_mnemonic_D(FMV_D_X)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+
+mapping clause assembly = F_UN_TYPE_D(rs1, rd, FCLASS_D)
+                      <-> f_un_type_mnemonic_D(FCLASS_D)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+
+/* ****************************************************************** */
diff --git a/model/riscv_insts_end.sail b/model/riscv_insts_end.sail
index f6223dd..6c16417 100644
--- a/model/riscv_insts_end.sail
+++ b/model/riscv_insts_end.sail
@@ -34,7 +34,7 @@ function print_insn insn = assembly(insn)
 
 overload to_str = {print_insn}
 
-val decode : bits(32) -> ast effect pure
+val decode : bits(32) -> ast effect {rreg}
 function decode bv = encdec(bv)
 
 val decodeCompressed : bits(16) -> ast effect pure
diff --git a/model/riscv_insts_fext.sail b/model/riscv_insts_fext.sail
new file mode 100644
index 0000000..4b9e69e
--- /dev/null
+++ b/model/riscv_insts_fext.sail
@@ -0,0 +1,1096 @@
+/* **************************************************************** */
+/* This file specifies the instructions in the F extension          */
+/* (single precision floating point).                               */
+
+/* RISC-V follows IEEE 754-2008 floating point arithmetic standard. */
+
+/* Original version written by Rishiyur S. Nikhil, Sept-Oct 2019    */
+
+/* **************************************************************** */
+/* IMPORTANT!                                                       */
+/* The files 'riscv_insts_fext.sail' and 'riscv_insts_dext.sail'    */
+/* define the F and D extensions, respectively.                     */
+/* The texts follow each other very closely; please try to maintain */
+/* this correspondence as the files are maintained for bug-fixes,   */
+/* improvements, and version updates.                               */
+
+/* **************************************************************** */
+
+mapping encdec_rounding_mode : rounding_mode <-> bits(3) = {
+  RM_RNE <-> 0b000,
+  RM_RTZ <-> 0b001,
+  RM_RDN <-> 0b010,
+  RM_RUP <-> 0b011,
+  RM_RMM <-> 0b100,
+  RM_DYN <-> 0b111
+}
+
+mapping frm_mnemonic : rounding_mode <-> string = {
+  RM_RNE <-> "rne",
+  RM_RTZ <-> "rtz",
+  RM_RDN <-> "rdn",
+  RM_RUP <-> "rup",
+  RM_RMM <-> "rmm",
+  RM_DYN <-> "dyn"
+}
+
+val       select_instr_or_fcsr_rm : rounding_mode -> rounding_mode effect {rreg}
+function  select_instr_or_fcsr_rm   instr_rm =
+  if   (instr_rm == RM_DYN)
+  then encdec_rounding_mode (fcsr.FRM())
+  else instr_rm
+
+/* **************************************************************** */
+/* Floating point accrued exception flags                           */
+
+function nxFlag() -> bits(5) = 0b_00001
+function ufFlag() -> bits(5) = 0b_00010
+function ofFlag() -> bits(5) = 0b_00100
+function dzFlag() -> bits(5) = 0b_01000
+function nvFlag() -> bits(5) = 0b_10000
+
+/* **************************************************************** */
+/* S and D value structure (sign, exponent, mantissa)               */
+
+/* TODO: this should be a 'mapping' */
+val      fsplit_S : bits(32) -> (bits(1), bits(8), bits(23))
+function fsplit_S   x32 = (x32[31..31], x32[30..23], x32[22..0])
+
+val      fmake_S  : (bits(1), bits(8), bits(23)) -> bits(32)
+function fmake_S (sign, exp, mant) = sign @ exp @ mant
+
+/* ---- Canonical NaNs */
+
+function canonical_NaN_S() -> bits(32) = 0x_7fc0_0000
+
+/* ---- Structure tests */
+
+val      f_is_neg_inf_S : bits(32) -> bool
+function f_is_neg_inf_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == 0b1)
+   & (exp  == ones())
+   & (mant == zeros()))
+}
+
+val      f_is_neg_norm_S : bits(32) -> bool
+function f_is_neg_norm_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == 0b1)
+   & (exp  != zeros())
+   & (exp  != ones()))
+}
+
+val      f_is_neg_subnorm_S : bits(32) -> bool
+function f_is_neg_subnorm_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == 0b1)
+   & (exp  == zeros())
+   & (mant != zeros()))
+}
+
+val      f_is_neg_zero_S : bits(32) -> bool
+function f_is_neg_zero_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == ones())
+   & (exp  == zeros())
+   & (mant == zeros()))
+}
+
+val      f_is_pos_zero_S : bits(32) -> bool
+function f_is_pos_zero_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == zeros())
+   & (exp  == zeros())
+   & (mant == zeros()))
+}
+
+val      f_is_pos_subnorm_S : bits(32) -> bool
+function f_is_pos_subnorm_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == zeros())
+   & (exp  == zeros())
+   & (mant != zeros()))
+}
+
+val      f_is_pos_norm_S : bits(32) -> bool
+function f_is_pos_norm_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == zeros())
+   & (exp  != zeros())
+   & (exp  != ones()))
+}
+
+val      f_is_pos_inf_S : bits(32) -> bool
+function f_is_pos_inf_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (sign == zeros())
+   & (exp  == ones())
+   & (mant == zeros()))
+}
+
+val      f_is_SNaN_S : bits(32) -> bool
+function f_is_SNaN_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (exp == ones())
+   & (mant [22] == bitzero)
+   & (mant != zeros()))
+}
+
+val      f_is_QNaN_S : bits(32) -> bool
+function f_is_QNaN_S   x32 = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  (  (exp == ones())
+   & (mant [22] == bitone))
+}
+
+/* **************************************************************** */
+/* Help functions used in the semantic functions                    */
+
+val      negate_S : bits(32) -> bits(32)
+function negate_S (x32) = {
+  let (sign, exp, mant) = fsplit_S (x32);
+  let new_sign = if (sign == 0b0) then 0b1 else 0b0;
+  fmake_S (new_sign, exp, mant)
+}
+
+val      feq_quiet_S : (bits(32), bits (32)) -> (bool, bits(5))
+function feq_quiet_S   (v1,       v2) = {
+  let (s1, e1, m1) = fsplit_S (v1);
+  let (s2, e2, m2) = fsplit_S (v2);
+
+  let v1Is0    = f_is_neg_zero_S(v1) | f_is_pos_zero_S(v1);
+  let v2Is0    = f_is_neg_zero_S(v2) | f_is_pos_zero_S(v2);
+
+  let result = ((v1 == v2) | (v1Is0 & v2Is0));
+
+  let fflags = if (f_is_SNaN_S(v1) | f_is_SNaN_S(v2)) then
+                 nvFlag()
+               else
+                 zeros();
+
+  (result, fflags)
+}
+
+val      flt_S : (bits(32), bits (32), bool) -> (bool, bits(5))
+function flt_S   (v1,       v2,        is_quiet) = {
+  let (s1, e1, m1) = fsplit_S (v1);
+  let (s2, e2, m2) = fsplit_S (v2);
+
+  let v1IsNaN  = f_is_QNaN_S(v1) | f_is_SNaN_S(v1);
+  let v2IsNaN  = f_is_QNaN_S(v2) | f_is_SNaN_S(v2);
+
+  let result : bool =
+    if (s1 == 0b0) & (s2 == 0b0) then
+      if (e1 == e2) then
+        unsigned (m1) < unsigned (m2)
+      else
+        unsigned (e1) < unsigned (e2)
+    else if (s1 == 0b0) & (s2 == 0b1) then
+        false
+    else if (s1 == 0b1) & (s2 == 0b0) then
+        true
+    else
+        if (e1 == e2) then
+          unsigned (m1) > unsigned (m2)
+        else
+          unsigned (e1) > unsigned (e2);
+
+  let fflags = if is_quiet then
+                 if (f_is_SNaN_S(v1) | f_is_SNaN_S(v2)) then
+                   nvFlag()
+                 else
+                   zeros()
+               else
+                 if (v1IsNaN | v2IsNaN) then
+                   nvFlag()
+                 else
+                   zeros();
+
+  (result, fflags)
+}
+
+val      fle_S : (bits(32), bits (32), bool) -> (bool, bits(5))
+function fle_S   (v1,       v2,        is_quiet) = {
+  let (s1, e1, m1) = fsplit_S (v1);
+  let (s2, e2, m2) = fsplit_S (v2);
+
+  let v1IsNaN  = f_is_QNaN_S(v1) | f_is_SNaN_S(v1);
+  let v2IsNaN  = f_is_QNaN_S(v2) | f_is_SNaN_S(v2);
+
+  let v1Is0    = f_is_neg_zero_S(v1) | f_is_pos_zero_S(v1);
+  let v2Is0    = f_is_neg_zero_S(v2) | f_is_pos_zero_S(v2);
+
+  let result : bool =
+    if (s1 == 0b0) & (s2 == 0b0) then
+      if (e1 == e2) then
+        unsigned (m1) <=  unsigned (m2)
+      else
+        unsigned (e1)  <  unsigned (e2)
+    else if (s1 == 0b0) & (s2 == 0b1) then
+      (v1Is0 & v2Is0)                         /* Equal in this case (+0=-0) */
+    else if (s1 == 0b1) & (s2 == 0b0) then
+      true
+    else
+      if (e1 == e2) then
+        unsigned (m1) >=  unsigned (m2)
+      else
+        unsigned (e1)  >  unsigned (e2);
+
+  let fflags = if is_quiet then
+                 if (f_is_SNaN_S(v1) | f_is_SNaN_S(v2)) then
+                   nvFlag()
+                 else
+                   zeros()
+               else
+                 if (v1IsNaN | v2IsNaN) then
+                   nvFlag()
+                 else
+                   zeros();
+
+  (result, fflags)
+}
+
+/* **************************************************************** */
+/* NaN boxing/unboxing.                                             */
+/* When 32-bit floats (single-precision) are stored in 64-bit regs  */
+/* they must be 'NaN boxed' (upper 32b all ones).                   */
+/* When 32-bit floats (single-precision) are read from 64-bit regs  */
+/* they must be 'NaN unboxed'.                                      */
+
+val      nan_box : bits(32) -> flenbits
+function nan_box   val_32b =
+  if (sizeof(flen) == 32)
+  then val_32b
+  else 0x_FFFF_FFFF @ val_32b
+
+val      nan_unbox : flenbits -> bits(32)
+function nan_unbox   regval =
+  if (sizeof(flen) == 32)
+  then regval
+  else if regval [63..32] == 0x_FFFF_FFFF
+       then regval [31..0]
+       else canonical_NaN_S()
+
+/* **************************************************************** */
+/* Help-functions for 'encdec()' to restrict to certain             */
+/* combinations of {F,D} x {RV32,RV64}                              */
+
+function is_RV32F_or_RV64F () -> bool = (haveFExt() & (sizeof(xlen) == 32 | sizeof(xlen) == 64))
+function is_RV64F          () -> bool = (haveFExt() & sizeof(xlen) == 64)
+
+function is_RV32D_or_RV64D () -> bool = (haveDExt() & (sizeof(xlen) == 32 | sizeof(xlen) == 64))
+function is_RV64D          () -> bool = (haveDExt() & sizeof(xlen) == 64)
+
+/* ****************************************************************** */
+/* Floating-point loads                                               */
+
+/* AST */
+/* FLW and FLD; W/D is encoded in 'word_width' */
+
+union clause ast = LOAD_FP : (bits(12), regidx, regidx, word_width)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = LOAD_FP(imm, rs1, rd, WORD)          if is_RV32F_or_RV64F()
+                    <-> imm @ rs1 @ 0b010 @ rd @ 0b000_0111  if is_RV32F_or_RV64F()
+
+mapping clause encdec = LOAD_FP(imm, rs1, rd, DOUBLE)        if is_RV32D_or_RV64D()
+                    <-> imm @ rs1 @ 0b011 @ rd @ 0b000_0111  if is_RV32D_or_RV64D()
+
+/* Execution semantics ================================ */
+
+val process_fload64 : (regidx, xlenbits, MemoryOpResult(bits(64)))
+                      -> Retired effect {escape, rreg, wreg}
+function process_fload64(rd, addr, value) =
+  if   sizeof(flen) == 64
+  then match value {
+         MemValue(result) => { F(rd) = result; RETIRE_SUCCESS },
+         MemException(e)  => { handle_mem_exception(addr, e); RETIRE_FAIL }
+       }
+  else {
+    /* should not get here */
+    RETIRE_FAIL
+  }
+
+val process_fload32 : (regidx, xlenbits, MemoryOpResult(bits(32)))
+                      -> Retired effect {escape, rreg, wreg}
+function process_fload32(rd, addr, value) =
+  match value {
+    MemValue(result) => { F(rd) = nan_box(result); RETIRE_SUCCESS },
+    MemException(e)  => { handle_mem_exception(addr, e); RETIRE_FAIL }
+  }
+
+
+function clause execute(LOAD_FP(imm, rs1, rd, width)) = {
+  let offset : xlenbits = EXTS(imm);
+  /* Get the address, X(rs1) + offset.
+     Some extensions perform additional checks on address validity. */
+  match ext_data_get_addr(rs1, offset, Read(Data), width) {
+    Ext_DataAddr_Error(e)  => { ext_handle_data_check_error(e); RETIRE_FAIL },
+    Ext_DataAddr_OK(vaddr) =>
+      if   check_misaligned(vaddr, width)
+      then { handle_mem_exception(vaddr, E_Load_Addr_Align()); RETIRE_FAIL }
+      else match translateAddr(vaddr, Read(Data)) {
+        TR_Failure(e, _) => { handle_mem_exception(vaddr, e); RETIRE_FAIL },
+        TR_Address(addr, _) => {
+          let (aq, rl, res) = (false, false, false);
+          match (width, sizeof(xlen)) {
+            (BYTE, _)   => { handle_illegal(); RETIRE_FAIL },
+            (HALF, _)   => { handle_illegal(); RETIRE_FAIL },
+            (WORD, _)   =>
+               process_fload32(rd, vaddr, mem_read(Read(Data), addr, 4, aq, rl, res)),
+            (DOUBLE, 64) =>
+               process_fload64(rd, vaddr, mem_read(Read(Data), addr, 8, aq, rl, res))
+          }
+        }
+      }
+  }
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping clause assembly = LOAD_FP(imm, rs1, rd, width)
+                      <-> "fl" ^ size_mnemonic(width)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ hex_bits_12(imm)
+                          ^ opt_spc() ^ "(" ^ opt_spc() ^ reg_name(rs1) ^ opt_spc() ^ ")"
+
+/* ****************************************************************** */
+/* Floating-point stores                                              */
+
+/* AST */
+/* FLW and FLD; W/D is encoded in 'width' */
+
+union clause ast = STORE_FP : (bits(12), regidx, regidx, word_width)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = STORE_FP(imm7 @ imm5, rs2, rs1, WORD)                             if is_RV32F_or_RV64F()
+                    <-> imm7 : bits(7) @ rs2 @ rs1 @ 0b010 @ imm5 : bits(5) @ 0b010_0111  if is_RV32F_or_RV64F()
+
+mapping clause encdec = STORE_FP(imm7 @ imm5, rs2, rs1, DOUBLE)                           if is_RV32D_or_RV64D()
+                    <-> imm7 : bits(7) @ rs2 @ rs1 @ 0b011 @ imm5 : bits(5) @ 0b010_0111  if is_RV32D_or_RV64D()
+
+/* Execution semantics ================================ */
+
+val process_fstore : (xlenbits, MemoryOpResult(bool)) -> Retired effect {escape, rreg, wreg}
+function process_fstore(vaddr, value) =
+  match value {
+    MemValue(true)  => { RETIRE_SUCCESS },
+    MemValue(false) => { internal_error("store got false from mem_write_value") },
+    MemException(e) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }
+  }
+
+function clause execute (STORE_FP(imm, rs2, rs1, width)) = {
+  let offset : xlenbits = EXTS(imm);
+  let (aq, rl, con) = (false, false, false);
+  /* Get the address, X(rs1) + offset.
+     Some extensions perform additional checks on address validity. */
+  match ext_data_get_addr(rs1, offset, Write(Data), width) {
+    Ext_DataAddr_Error(e)  => { ext_handle_data_check_error(e); RETIRE_FAIL },
+    Ext_DataAddr_OK(vaddr) =>
+      if   check_misaligned(vaddr, width)
+      then { handle_mem_exception(vaddr, E_SAMO_Addr_Align()); RETIRE_FAIL }
+      else match translateAddr(vaddr, Write(Data)) {
+        TR_Failure(e, _)    => { handle_mem_exception(vaddr, e); RETIRE_FAIL },
+        TR_Address(addr, _) => {
+          let eares : MemoryOpResult(unit) = match width {
+            BYTE   => MemValue () /* bogus placeholder for illegal size */,
+            HALF   => MemValue () /* bogus placeholder for illegal size */,
+            WORD   => mem_write_ea(addr, 4, aq, rl, false),
+            DOUBLE => mem_write_ea(addr, 8, aq, rl, false)
+          };
+          match (eares) {
+            MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL },
+            MemValue(_) => {
+              let rs2_val = F(rs2);
+              match (width, sizeof(xlen)) {
+                (BYTE, _)    => { handle_illegal(); RETIRE_FAIL },
+                (HALF, _)    => { handle_illegal(); RETIRE_FAIL },
+                (WORD, _)    => process_fstore (vaddr, mem_write_value(addr, 4, rs2_val[31..0], aq, rl, con)),
+                (DOUBLE, 64) => process_fstore (vaddr, mem_write_value(addr, 8, rs2_val,        aq, rl, con))
+              };
+            }
+          }
+        }
+      }
+  }
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping clause assembly = STORE_FP(imm, rs2, rs1, width)
+                      <-> "fs" ^ size_mnemonic(width)
+                          ^ spc() ^ freg_name(rs2)
+                          ^ sep() ^ hex_bits_12(imm)
+                          ^ opt_spc() ^ "(" ^ opt_spc() ^ reg_name(rs1) ^ opt_spc() ^ ")"
+
+/* ****************************************************************** */
+/* Fused multiply-add */
+
+/* AST */
+
+union clause ast = F_MADD_TYPE_S : (regidx, regidx, regidx, rounding_mode, regidx, f_madd_op_S)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, FMADD_S)                         if is_RV32F_or_RV64F()
+<-> rs3 @ 0b00 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, FMSUB_S)                         if is_RV32F_or_RV64F()
+<-> rs3 @ 0b00 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_0111  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, FNMSUB_S)                        if is_RV32F_or_RV64F()
+<-> rs3 @ 0b00 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_1011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, FNMADD_S)                        if is_RV32F_or_RV64F()
+<-> rs3 @ 0b00 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b100_1111  if is_RV32F_or_RV64F()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, op)) = {
+  let rs1_val_32b = nan_unbox (F(rs1));
+  let rs2_val_32b = nan_unbox (F(rs2));
+  let rs3_val_32b = nan_unbox (F(rs3));
+  let rm_3b       = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+  let (fflags, rd_val_32b) : (bits(5), bits(32)) =
+    match op {
+      FMADD_S  => riscv_f32MulAdd (rm_3b, rs1_val_32b, rs2_val_32b, rs3_val_32b),
+      FMSUB_S  => riscv_f32MulAdd (rm_3b, rs1_val_32b, rs2_val_32b, negate_S (rs3_val_32b)),
+      FNMSUB_S => riscv_f32MulAdd (rm_3b, negate_S (rs1_val_32b), rs2_val_32b, rs3_val_32b),
+      FNMADD_S => riscv_f32MulAdd (rm_3b, negate_S (rs1_val_32b), rs2_val_32b, negate_S (rs3_val_32b))
+    };
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_32b);
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_madd_type_mnemonic_S : f_madd_op_S <-> string = {
+    FMADD_S  <-> "fmadd.s",
+    FMSUB_S  <-> "fmsub.s",
+    FNMSUB_S <-> "fnmsub.s",
+    FNMADD_S <-> "fnmadd.s"
+}
+
+mapping clause assembly = F_MADD_TYPE_S(rs3, rs2, rs1, rm, rd, op)
+                      <-> f_madd_type_mnemonic_S(op)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+                          ^ sep() ^ freg_name(rs3)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+/* ****************************************************************** */
+/* Binary ops with rounding mode */
+
+/* AST */
+
+union clause ast = F_BIN_RM_TYPE_S : (regidx, regidx, rounding_mode, regidx, f_bin_rm_op_S)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, FADD_S)                             if is_RV32F_or_RV64F()
+<-> 0b000_0000 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, FSUB_S)                             if is_RV32F_or_RV64F()
+<-> 0b000_0100 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, FMUL_S)                             if is_RV32F_or_RV64F()
+<-> 0b000_1000 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, FDIV_S)                             if is_RV32F_or_RV64F()
+<-> 0b000_1100 @ rs2 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, op)) = {
+  let rs1_val_32b = nan_unbox (F(rs1));
+  let rs2_val_32b = nan_unbox (F(rs2));
+  let rm_3b       = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+  let (fflags, rd_val_32b) : (bits(5), bits(32)) = match op {
+    FADD_S  => riscv_f32Add (rm_3b, rs1_val_32b, rs2_val_32b),
+    FSUB_S  => riscv_f32Sub (rm_3b, rs1_val_32b, rs2_val_32b),
+    FMUL_S  => riscv_f32Mul (rm_3b, rs1_val_32b, rs2_val_32b),
+    FDIV_S  => riscv_f32Div (rm_3b, rs1_val_32b, rs2_val_32b)
+  };
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_32b);
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_bin_rm_type_mnemonic_S : f_bin_rm_op_S <-> string = {
+  FADD_S  <-> "fadd.s",
+  FSUB_S  <-> "fsub.s",
+  FMUL_S  <-> "fmul.s",
+  FDIV_S  <-> "fdiv.s"
+}
+
+mapping clause assembly = F_BIN_RM_TYPE_S(rs2, rs1, rm, rd, op)
+                      <-> f_bin_rm_type_mnemonic_S(op)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+/* ****************************************************************** */
+/* Unary with rounding mode */
+
+/* AST */
+
+union clause ast = F_UN_RM_TYPE_S : (regidx, rounding_mode, regidx, f_un_rm_op_S)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FSQRT_S)                                      if is_RV32F_or_RV64F()
+<-> 0b010_1100 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_W_S)                                     if is_RV32F_or_RV64F()
+<-> 0b110_0000 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_WU_S)                                    if is_RV32F_or_RV64F()
+<-> 0b110_0000 @ 0b00001 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_W)                                     if is_RV32F_or_RV64F()
+<-> 0b110_1000 @ 0b00000 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_WU)                                    if is_RV32F_or_RV64F()
+<-> 0b110_1000 @ 0b00001 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+/* F instructions, RV64 only */
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_L_S)                                     if is_RV64F()
+<-> 0b110_0000 @ 0b00010 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_LU_S)                                    if is_RV64F()
+<-> 0b110_0000 @ 0b00011 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_L)                                     if is_RV64F()
+<-> 0b110_1000 @ 0b00010 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64F()
+
+mapping clause encdec =
+    F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_LU)                                    if is_RV64F()
+<-> 0b110_1000 @ 0b00011 @ rs1 @ encdec_rounding_mode (rm) @ rd @ 0b101_0011  if is_RV64F()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FSQRT_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_S) = riscv_f32Sqrt   (rm_3b, rs1_val_S);
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_W_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_W) = riscv_f32ToI32 (rm_3b, rs1_val_S);
+
+  write_fflags(fflags);
+  X(rd) = EXTS (rd_val_W);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_WU_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_WU) = riscv_f32ToUi32 (rm_3b, rs1_val_S);
+
+  write_fflags(fflags);
+  X(rd) = EXTS (rd_val_WU);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_W)) = {
+  let rs1_val_W = X(rs1) [31..0];
+  let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_S) = riscv_i32ToF32 (rm_3b, rs1_val_W);
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_WU)) = {
+  let rs1_val_WU = X(rs1) [31..0];
+  let rm_3b      = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+  let (fflags, rd_val_S) = riscv_ui32ToF32 (rm_3b, rs1_val_WU);
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_L_S)) = {
+  if   sizeof(flen) == 64
+  then {
+    let rs1_val_S = nan_unbox (F(rs1));
+    let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+    let (fflags, rd_val_L) = riscv_f32ToI64 (rm_3b, rs1_val_S);
+
+    write_fflags(fflags);
+    X(rd) = rd_val_L;
+    RETIRE_SUCCESS
+  } else {
+    /* this would not decode on RV32 */
+    RETIRE_FAIL
+  }
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_LU_S)) = {
+  if   sizeof(flen) == 64
+  then {
+    let rs1_val_S = nan_unbox (F(rs1));
+    let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+    let (fflags, rd_val_LU) = riscv_f32ToUi64 (rm_3b, rs1_val_S);
+
+    write_fflags(fflags);
+    X(rd) = rd_val_LU;
+    RETIRE_SUCCESS
+  } else {
+    /* this would not decode on RV32 */
+    RETIRE_FAIL
+  }
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_L)) = {
+  if   sizeof(flen) == 64
+  then {
+    let rs1_val_L = X(rs1);
+    let rm_3b     = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+    let (fflags, rd_val_S) = riscv_i64ToF32 (rm_3b, rs1_val_L);
+
+    write_fflags(fflags);
+    F(rd) = nan_box (rd_val_S);
+    RETIRE_SUCCESS
+  } else {
+    /* this would not decode on RV32 */
+    RETIRE_FAIL
+  }
+}
+
+function clause execute (F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_LU)) = {
+  if   sizeof(flen) == 64
+  then {
+    let rs1_val_LU = X(rs1);
+    let rm_3b      = encdec_rounding_mode (select_instr_or_fcsr_rm  (rm));
+
+    let (fflags, rd_val_S) = riscv_ui64ToF32 (rm_3b, rs1_val_LU);
+
+    write_fflags(fflags);
+    F(rd) = nan_box (rd_val_S);
+    RETIRE_SUCCESS
+  } else {
+    /* this would not decode on RV32 */
+    RETIRE_FAIL
+  }
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_un_rm_type_mnemonic_S : f_un_rm_op_S <-> string = {
+    FSQRT_S   <-> "fsqrt.s",
+    FCVT_W_S  <-> "fcvt.w.s",
+    FCVT_WU_S <-> "fcvt.wu.s",
+    FCVT_S_W  <-> "fcvt.s.w",
+    FCVT_S_WU <-> "fcvt.s.wu",
+
+    FCVT_L_S  <-> "fcvt.l.s",
+    FCVT_LU_S <-> "fcvt.lu.s",
+    FCVT_S_L  <-> "fcvt.s.l",
+    FCVT_S_LU <-> "fcvt.s.lu"
+}
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FSQRT_S)
+                      <-> f_un_rm_type_mnemonic_S(FSQRT_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_W_S)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_W_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_WU_S)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_WU_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_W)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_S_W)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_WU)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_S_WU)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_L_S)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_L_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_LU_S)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_LU_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_L)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_S_L)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+mapping clause assembly = F_UN_RM_TYPE_S(rs1, rm, rd, FCVT_S_LU)
+                      <-> f_un_rm_type_mnemonic_S(FCVT_S_LU)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+                          ^ sep() ^ frm_mnemonic(rm)
+
+
+/* ****************************************************************** */
+/* Binary, no rounding mode */
+
+/* AST */
+
+union clause ast = F_BIN_TYPE_S : (regidx, regidx, regidx, f_bin_op_S)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJ_S)               if is_RV32F_or_RV64F()
+                    <-> 0b001_0000 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJN_S)              if is_RV32F_or_RV64F()
+                    <-> 0b001_0000 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJX_S)              if is_RV32F_or_RV64F()
+                    <-> 0b001_0000 @ rs2 @ rs1 @ 0b010 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FMIN_S)                if is_RV32F_or_RV64F()
+                    <-> 0b001_0100 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FMAX_S)                if is_RV32F_or_RV64F()
+                    <-> 0b001_0100 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FEQ_S)                 if is_RV32F_or_RV64F()
+                    <-> 0b101_0000 @ rs2 @ rs1 @ 0b010 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FLT_S)                 if is_RV32F_or_RV64F()
+                    <-> 0b101_0000 @ rs2 @ rs1 @ 0b001 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+mapping clause encdec = F_BIN_TYPE_S(rs2, rs1, rd, FLE_S)                 if is_RV32F_or_RV64F()
+                    <-> 0b101_0000 @ rs2 @ rs1 @ 0b000 @ rd @ 0b101_0011  if is_RV32F_or_RV64F()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FSGNJ_S)) = {
+  let rs1_val_S    = nan_unbox (F(rs1));
+  let rs2_val_S    = nan_unbox (F(rs2));
+  let (s1, e1, m1) = fsplit_S (rs1_val_S);
+  let (s2, e2, m2) = fsplit_S (rs2_val_S);
+  let rd_val_S     = fmake_S (s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FSGNJN_S)) = {
+  let rs1_val_S    = nan_unbox (F(rs1));
+  let rs2_val_S    = nan_unbox (F(rs2));
+  let (s1, e1, m1) = fsplit_S (rs1_val_S);
+  let (s2, e2, m2) = fsplit_S (rs2_val_S);
+  let rd_val_S     = fmake_S (0b1 ^ s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FSGNJX_S)) = {
+  let rs1_val_S    = nan_unbox (F(rs1));
+  let rs2_val_S    = nan_unbox (F(rs2));
+  let (s1, e1, m1) = fsplit_S (rs1_val_S);
+  let (s2, e2, m2) = fsplit_S (rs2_val_S);
+  let rd_val_S     = fmake_S (s1 ^ s2, e1, m1);
+  let fflags       = 0b_00000;
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FMIN_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rs2_val_S = nan_unbox (F(rs2));
+
+  let is_quiet  = true;
+  let (rs1_lt_rs2, fflags) = fle_S (rs1_val_S, rs2_val_S, is_quiet);
+
+  let rd_val_S  = if      (f_is_SNaN_S(rs1_val_S) & f_is_SNaN_S(rs2_val_S))         then canonical_NaN_S()
+                  else if f_is_SNaN_S(rs1_val_S)                                    then rs2_val_S
+                  else if f_is_SNaN_S(rs2_val_S)                                    then rs1_val_S
+                  else if (f_is_QNaN_S(rs1_val_S) & f_is_QNaN_S(rs2_val_S))         then canonical_NaN_S()
+                  else if f_is_QNaN_S(rs1_val_S)                                    then rs2_val_S
+                  else if f_is_QNaN_S(rs2_val_S)                                    then rs1_val_S
+                  else if (f_is_neg_zero_S(rs1_val_S) & f_is_pos_zero_S(rs2_val_S)) then rs1_val_S
+                  else if (f_is_neg_zero_S(rs2_val_S) & f_is_pos_zero_S(rs1_val_S)) then rs2_val_S
+                  else if rs1_lt_rs2                                                then rs1_val_S
+                  else /* (not rs1_lt_rs2) */                                            rs2_val_S;
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FMAX_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rs2_val_S = nan_unbox (F(rs2));
+
+  let is_quiet  = true;
+  let (rs2_lt_rs1, fflags) = fle_S (rs2_val_S, rs1_val_S, is_quiet);
+
+  let rd_val_S  = if      (f_is_SNaN_S(rs1_val_S) & f_is_SNaN_S(rs2_val_S))         then canonical_NaN_S()
+                  else if f_is_SNaN_S(rs1_val_S)                                    then rs2_val_S
+                  else if f_is_SNaN_S(rs2_val_S)                                    then rs1_val_S
+                  else if (f_is_QNaN_S(rs1_val_S) & f_is_QNaN_S(rs2_val_S))         then canonical_NaN_S()
+                  else if f_is_QNaN_S(rs1_val_S)                                    then rs2_val_S
+                  else if f_is_QNaN_S(rs2_val_S)                                    then rs1_val_S
+                  else if (f_is_neg_zero_S(rs1_val_S) & f_is_pos_zero_S(rs2_val_S)) then rs2_val_S
+                  else if (f_is_neg_zero_S(rs2_val_S) & f_is_pos_zero_S(rs1_val_S)) then rs1_val_S
+                  else if rs2_lt_rs1                                                then rs1_val_S
+                  else /* (not rs2_lt_rs1) */                                            rs2_val_S;
+
+  write_fflags(fflags);
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FEQ_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rs2_val_S = nan_unbox (F(rs2));
+
+  let (rs1_eq_rs2, fflags) = feq_quiet_S (rs1_val_S, rs2_val_S);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_S(rs1_val_S) | f_is_SNaN_S(rs2_val_S)) then zeros()
+      else if (f_is_QNaN_S(rs1_val_S) | f_is_QNaN_S(rs2_val_S)) then zeros()
+      else if rs1_eq_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FLT_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rs2_val_S = nan_unbox (F(rs2));
+
+  let is_quiet  = false;
+  let (rs1_lt_rs2, fflags) = flt_S (rs1_val_S, rs2_val_S, is_quiet);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_S(rs1_val_S) | f_is_SNaN_S(rs2_val_S)) then zeros()
+      else if (f_is_QNaN_S(rs1_val_S) | f_is_QNaN_S(rs2_val_S)) then zeros()
+      else if rs1_lt_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_BIN_TYPE_S(rs2, rs1, rd, FLE_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+  let rs2_val_S = nan_unbox (F(rs2));
+
+  let is_quiet  = false;
+  let (rs1_le_rs2, fflags) = fle_S (rs1_val_S, rs2_val_S, is_quiet);
+
+  let rd_val : xlenbits =
+      if      (f_is_SNaN_S(rs1_val_S) | f_is_SNaN_S(rs2_val_S)) then zeros()
+      else if (f_is_QNaN_S(rs1_val_S) | f_is_QNaN_S(rs2_val_S)) then zeros()
+      else if rs1_le_rs2                                        then EXTZ(0b1)
+      else                                                           zeros();
+
+  write_fflags(fflags);
+  X(rd) = rd_val;
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_bin_type_mnemonic_S : f_bin_op_S <-> string = {
+    FSGNJ_S  <-> "fsgnj.s",
+    FSGNJN_S <-> "fsgnjn.s",
+    FSGNJX_S <-> "fsgnjx.s",
+    FMIN_S   <-> "fmin.s",
+    FMAX_S   <-> "fmax.s",
+    FEQ_S    <-> "feq.s",
+    FLT_S    <-> "flt.s",
+    FLE_S    <-> "fle.s"
+}
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJ_S)
+                      <-> f_bin_type_mnemonic_S(FSGNJ_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJN_S)
+                      <-> f_bin_type_mnemonic_S(FSGNJN_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FSGNJX_S)
+                      <-> f_bin_type_mnemonic_S(FSGNJX_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FMIN_S)
+                      <-> f_bin_type_mnemonic_S(FMIN_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FMAX_S)
+                      <-> f_bin_type_mnemonic_S(FMAX_S)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FEQ_S)
+                      <-> f_bin_type_mnemonic_S(FEQ_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FLT_S)
+                      <-> f_bin_type_mnemonic_S(FLT_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+mapping clause assembly = F_BIN_TYPE_S(rs2, rs1, rd, FLE_S)
+                      <-> f_bin_type_mnemonic_S(FLE_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+                          ^ sep() ^ freg_name(rs2)
+
+/* ****************************************************************** */
+/* Unary, no rounding mode */
+
+union clause ast = F_UN_TYPE_S : (regidx, regidx, f_un_op_S)
+
+/* AST <-> Binary encoding ================================ */
+
+mapping clause encdec = F_UN_TYPE_S(rs1, rd, FCLASS_S)                        if haveFExt()
+                    <-> 0b111_0000 @ 0b00000 @ rs1 @ 0b001 @ rd @ 0b101_0011  if haveFExt()
+
+mapping clause encdec = F_UN_TYPE_S(rs1, rd, FMV_X_W)                         if haveFExt()
+                    <-> 0b111_0000 @ 0b00000 @ rs1 @ 0b000 @ rd @ 0b101_0011  if haveFExt()
+
+mapping clause encdec = F_UN_TYPE_S(rs1, rd, FMV_W_X)                         if haveFExt()
+                    <-> 0b111_1000 @ 0b00000 @ rs1 @ 0b000 @ rd @ 0b101_0011  if haveFExt()
+
+/* Execution semantics ================================ */
+
+function clause execute (F_UN_TYPE_S(rs1, rd, FCLASS_S)) = {
+  let rs1_val_S = nan_unbox (F(rs1));
+
+  let rd_val_10b : bits (10) =
+    if      f_is_neg_inf_S     (rs1_val_S) then 0b_00_0000_0001
+    else if f_is_neg_norm_S    (rs1_val_S) then 0b_00_0000_0010
+    else if f_is_neg_subnorm_S (rs1_val_S) then 0b_00_0000_0100
+    else if f_is_neg_zero_S    (rs1_val_S) then 0b_00_0000_1000
+    else if f_is_pos_zero_S    (rs1_val_S) then 0b_00_0001_0000
+    else if f_is_pos_subnorm_S (rs1_val_S) then 0b_00_0010_0000
+    else if f_is_pos_norm_S    (rs1_val_S) then 0b_00_0100_0000
+    else if f_is_pos_inf_S     (rs1_val_S) then 0b_00_1000_0000
+    else if f_is_SNaN_S        (rs1_val_S) then 0b_01_0000_0000
+    else if f_is_QNaN_S        (rs1_val_S) then 0b_10_0000_0000
+    else zeros();
+
+  X(rd) = EXTZ (rd_val_10b);
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_TYPE_S(rs1, rd, FMV_X_W)) = {
+  let rs1_val_S            = F(rs1)[31..0];
+  let rd_val_X  : xlenbits = EXTS(rs1_val_S);
+  X(rd) = rd_val_X;
+  RETIRE_SUCCESS
+}
+
+function clause execute (F_UN_TYPE_S(rs1, rd, FMV_W_X)) = {
+  let rs1_val_X            = X(rs1);
+  let rd_val_S             = rs1_val_X [31..0];
+  F(rd) = nan_box (rd_val_S);
+  RETIRE_SUCCESS
+}
+
+/* AST -> Assembly notation ================================ */
+
+mapping f_un_type_mnemonic_S : f_un_op_S <-> string = {
+    FMV_X_W  <-> "fmv.x.w",
+    FCLASS_S <-> "fclass.s",
+    FMV_W_X  <-> "fmv.w.x"
+}
+
+mapping clause assembly = F_UN_TYPE_S(rs1, rd, FMV_X_W)
+                      <-> f_un_type_mnemonic_S(FMV_X_W)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+
+mapping clause assembly = F_UN_TYPE_S(rs1, rd, FMV_W_X)
+                      <-> f_un_type_mnemonic_S(FMV_W_X)
+                          ^ spc() ^ freg_name(rd)
+                          ^ sep() ^ reg_name(rs1)
+
+mapping clause assembly = F_UN_TYPE_S(rs1, rd, FCLASS_S)
+                      <-> f_un_type_mnemonic_S(FCLASS_S)
+                          ^ spc() ^ reg_name(rd)
+                          ^ sep() ^ freg_name(rs1)
+
+/* ****************************************************************** */
diff --git a/model/riscv_insts_next.sail b/model/riscv_insts_next.sail
index 2af2eeb..0d23452 100644
--- a/model/riscv_insts_next.sail
+++ b/model/riscv_insts_next.sail
@@ -9,6 +9,8 @@ mapping clause encdec = URET()
 function clause execute URET() = {
   if   (~ (haveUsrMode()))
   then handle_illegal()
+  else if ~ (ext_check_xret_priv (User))
+  then ext_fail_xret_priv ()
   else set_next_pc(exception_handler(cur_privilege, CTL_URET(), PC));
   RETIRE_FAIL
 }
diff --git a/model/riscv_insts_zicsr.sail b/model/riscv_insts_zicsr.sail
index dd8a4a0..3f8ccd8 100644
--- a/model/riscv_insts_zicsr.sail
+++ b/model/riscv_insts_zicsr.sail
@@ -122,22 +122,22 @@ function writeCSR (csr : csreg, value : xlenbits) -> unit = {
     (0x3A2,  _) => { pmpWriteCfgReg(2, value); Some(value) },  // pmpcfg2
     (0x3A3, 32) => { pmpWriteCfgReg(3, value); Some(value) },  // pmpcfg3
 
-    (0x3B0,  _) => { pmpaddr0  = pmpWriteAddr(pmp0cfg,  pmpaddr0,  value); Some(pmpaddr0) },
-    (0x3B1,  _) => { pmpaddr1  = pmpWriteAddr(pmp1cfg,  pmpaddr1,  value); Some(pmpaddr1) },
-    (0x3B2,  _) => { pmpaddr2  = pmpWriteAddr(pmp2cfg,  pmpaddr2,  value); Some(pmpaddr2) },
-    (0x3B3,  _) => { pmpaddr3  = pmpWriteAddr(pmp3cfg,  pmpaddr3,  value); Some(pmpaddr3) },
-    (0x3B4,  _) => { pmpaddr4  = pmpWriteAddr(pmp4cfg,  pmpaddr4,  value); Some(pmpaddr4) },
-    (0x3B5,  _) => { pmpaddr5  = pmpWriteAddr(pmp5cfg,  pmpaddr5,  value); Some(pmpaddr5) },
-    (0x3B6,  _) => { pmpaddr6  = pmpWriteAddr(pmp6cfg,  pmpaddr6,  value); Some(pmpaddr6) },
-    (0x3B7,  _) => { pmpaddr7  = pmpWriteAddr(pmp7cfg,  pmpaddr7,  value); Some(pmpaddr7) },
-    (0x3B8,  _) => { pmpaddr8  = pmpWriteAddr(pmp8cfg,  pmpaddr8,  value); Some(pmpaddr8) },
-    (0x3B9,  _) => { pmpaddr9  = pmpWriteAddr(pmp9cfg,  pmpaddr9,  value); Some(pmpaddr9) },
-    (0x3BA,  _) => { pmpaddr10 = pmpWriteAddr(pmp10cfg, pmpaddr10, value); Some(pmpaddr10) },
-    (0x3BB,  _) => { pmpaddr11 = pmpWriteAddr(pmp11cfg, pmpaddr11, value); Some(pmpaddr11) },
-    (0x3BC,  _) => { pmpaddr12 = pmpWriteAddr(pmp12cfg, pmpaddr12, value); Some(pmpaddr12) },
-    (0x3BD,  _) => { pmpaddr13 = pmpWriteAddr(pmp13cfg, pmpaddr13, value); Some(pmpaddr13) },
-    (0x3BE,  _) => { pmpaddr14 = pmpWriteAddr(pmp14cfg, pmpaddr14, value); Some(pmpaddr14) },
-    (0x3BF,  _) => { pmpaddr15 = pmpWriteAddr(pmp15cfg, pmpaddr15, value); Some(pmpaddr15) },
+    (0x3B0,  _) => { pmpaddr0  = pmpWriteAddr(pmpLocked(pmp0cfg),  pmpTORLocked(pmp1cfg),  pmpaddr0,  value); Some(pmpaddr0) },
+    (0x3B1,  _) => { pmpaddr1  = pmpWriteAddr(pmpLocked(pmp1cfg),  pmpTORLocked(pmp2cfg),  pmpaddr1,  value); Some(pmpaddr1) },
+    (0x3B2,  _) => { pmpaddr2  = pmpWriteAddr(pmpLocked(pmp2cfg),  pmpTORLocked(pmp3cfg),  pmpaddr2,  value); Some(pmpaddr2) },
+    (0x3B3,  _) => { pmpaddr3  = pmpWriteAddr(pmpLocked(pmp3cfg),  pmpTORLocked(pmp4cfg),  pmpaddr3,  value); Some(pmpaddr3) },
+    (0x3B4,  _) => { pmpaddr4  = pmpWriteAddr(pmpLocked(pmp4cfg),  pmpTORLocked(pmp5cfg),  pmpaddr4,  value); Some(pmpaddr4) },
+    (0x3B5,  _) => { pmpaddr5  = pmpWriteAddr(pmpLocked(pmp5cfg),  pmpTORLocked(pmp6cfg),  pmpaddr5,  value); Some(pmpaddr5) },
+    (0x3B6,  _) => { pmpaddr6  = pmpWriteAddr(pmpLocked(pmp6cfg),  pmpTORLocked(pmp7cfg),  pmpaddr6,  value); Some(pmpaddr6) },
+    (0x3B7,  _) => { pmpaddr7  = pmpWriteAddr(pmpLocked(pmp7cfg),  pmpTORLocked(pmp8cfg),  pmpaddr7,  value); Some(pmpaddr7) },
+    (0x3B8,  _) => { pmpaddr8  = pmpWriteAddr(pmpLocked(pmp8cfg),  pmpTORLocked(pmp9cfg),  pmpaddr8,  value); Some(pmpaddr8) },
+    (0x3B9,  _) => { pmpaddr9  = pmpWriteAddr(pmpLocked(pmp9cfg),  pmpTORLocked(pmp10cfg), pmpaddr9,  value); Some(pmpaddr9) },
+    (0x3BA,  _) => { pmpaddr10 = pmpWriteAddr(pmpLocked(pmp10cfg), pmpTORLocked(pmp11cfg), pmpaddr10, value); Some(pmpaddr10) },
+    (0x3BB,  _) => { pmpaddr11 = pmpWriteAddr(pmpLocked(pmp11cfg), pmpTORLocked(pmp12cfg), pmpaddr11, value); Some(pmpaddr11) },
+    (0x3BC,  _) => { pmpaddr12 = pmpWriteAddr(pmpLocked(pmp12cfg), pmpTORLocked(pmp13cfg), pmpaddr12, value); Some(pmpaddr12) },
+    (0x3BD,  _) => { pmpaddr13 = pmpWriteAddr(pmpLocked(pmp13cfg), pmpTORLocked(pmp14cfg), pmpaddr13, value); Some(pmpaddr13) },
+    (0x3BE,  _) => { pmpaddr14 = pmpWriteAddr(pmpLocked(pmp14cfg), pmpTORLocked(pmp15cfg), pmpaddr14, value); Some(pmpaddr14) },
+    (0x3BF,  _) => { pmpaddr15 = pmpWriteAddr(pmpLocked(pmp15cfg), false,                  pmpaddr15, value); Some(pmpaddr15) },
 
     /* machine mode counters */
     (0xB00,  _) => { mcycle[(sizeof(xlen) - 1) .. 0] = value; Some(value) },
@@ -179,6 +179,8 @@ function clause execute CSR(csr, rs1, rd, is_imm, op) = {
   };
   if ~ (check_CSR(csr, cur_privilege, isWrite))
   then { handle_illegal(); RETIRE_FAIL }
+  else if ~ (ext_check_CSR(csr, cur_privilege, isWrite))
+  then { ext_check_CSR_fail(); RETIRE_FAIL }
   else {
     let csr_val = readCSR(csr); /* could have side-effects, so technically shouldn't perform for CSRW[I] with rd == 0 */
     if isWrite then {
@@ -206,6 +208,6 @@ mapping csr_mnemonic : csrop <-> string = {
 }
 
 mapping clause assembly = CSR(csr, rs1, rd, true, op)
-  <-> csr_mnemonic(op) ^ "i" ^ spc() ^ reg_name(rd) ^ sep() ^ hex_bits_5(rs1) ^ sep() ^ csr_name_map(csr)
+  <-> csr_mnemonic(op) ^ "i" ^ spc() ^ reg_name(rd) ^ sep() ^ hex_bits_5(rs1) ^ sep() ^ hex_bits_12(csr)
 mapping clause assembly = CSR(csr, rs1, rd, false, op)
-  <-> csr_mnemonic(op) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ csr_name_map(csr)
+  <-> csr_mnemonic(op) ^ spc() ^ reg_name(rd) ^ sep() ^ reg_name(rs1) ^ sep() ^ hex_bits_12(csr)
diff --git a/model/riscv_iris.sail b/model/riscv_iris.sail
new file mode 100644
index 0000000..80f3515
--- /dev/null
+++ b/model/riscv_iris.sail
@@ -0,0 +1,1176 @@
+default Order dec
+
+$include <smt.sail>
+$include <option.sail>
+$include <arith.sail>
+$include <string.sail>
+$include <vector_dec.sail>
+$include <regfp.sail>
+
+val string_startswith = "string_startswith" : (string, string) -> bool
+val string_drop = "string_drop" : (string, nat) -> string
+val string_take = "string_take" : (string, nat) -> string
+val string_length = "string_length" : string -> nat
+val string_append = {c: "concat_str", _: "string_append"} : (string, string) -> string
+
+val eq_anything = {ocaml: "(fun (x, y) -> x = y)", interpreter: "eq_anything", lem: "eq", coq: "generic_eq", c: "eq_anything"} : forall ('a : Type). ('a, 'a) -> bool
+
+overload operator == = {eq_string, eq_anything}
+
+val "reg_deref" : forall ('a : Type). register('a) -> 'a effect {rreg}
+/* sneaky deref with no effect necessary for bitfield writes */
+val _reg_deref = "reg_deref" : forall ('a : Type). register('a) -> 'a
+
+val any_vector_update = {ocaml: "update", lem: "update_list_dec", coq: "vector_update"} : forall 'n ('a : Type).
+  (vector('n, dec, 'a), int, 'a) -> vector('n, dec, 'a)
+
+overload vector_update = {any_vector_update}
+
+val update_subrange = {ocaml: "update_subrange", interpreter: "update_subrange", lem: "update_subrange_vec_dec", coq: "update_subrange_vec_dec"} : forall 'n 'm 'o.
+  (bits('n), atom('m), atom('o), bits('m - ('o - 1))) -> bits('n)
+
+val vector_concat = {ocaml: "append", lem: "append_list", coq: "vec_concat"} : forall ('n : Int) ('m : Int) ('a : Type).
+  (vector('n, dec, 'a), vector('m, dec, 'a)) -> vector('n + 'm, dec, 'a)
+
+overload append = {vector_concat}
+
+overload ~ = {not_bool, not_vec}
+
+val neq_vec = {lem: "neq"} : forall 'n. (bits('n), bits('n)) -> bool
+
+function neq_vec (x, y) = not_bool(eq_bits(x, y))
+
+val neq_anything = {lem: "neq", coq: "generic_neq"} : forall ('a : Type). ('a, 'a) -> bool
+
+function neq_anything (x, y) = not_bool(x == y)
+
+overload operator != = {neq_vec, neq_anything}
+
+overload operator & = {and_vec}
+
+overload operator | = {or_vec}
+
+val string_of_int = {c: "string_of_int", ocaml: "string_of_int", interpreter: "string_of_int", lem: "stringFromInteger", coq: "string_of_int"} : int -> string
+
+val "string_of_bits" : forall 'n. bits('n) -> string
+
+function string_of_bit(b: bit) -> string =
+  match b {
+    bitzero => "0b0",
+    bitone => "0b1"
+  }
+
+overload BitStr = {string_of_bits, string_of_bit}
+
+val xor_vec = {c: "xor_bits", _: "xor_vec"} : forall 'n. (bits('n), bits('n)) -> bits('n)
+
+val int_power = {ocaml: "int_power", interpreter: "int_power", lem: "pow", coq: "pow", c: "pow_int"} : (int, int) -> int
+
+overload operator ^ = {xor_vec, int_power, concat_str}
+
+val sub_vec = {c: "sub_bits", _: "sub_vec"} : forall 'n. (bits('n), bits('n)) -> bits('n)
+
+val sub_vec_int = {c: "sub_bits_int", _: "sub_vec_int"} : forall 'n. (bits('n), int) -> bits('n)
+
+overload operator - = {sub_vec, sub_vec_int}
+
+val quot_round_zero = {ocaml: "quot_round_zero", interpreter: "quot_round_zero", lem: "hardware_quot", c: "tdiv_int", coq: "Z.quot"} : (int, int) -> int
+val rem_round_zero = {ocaml: "rem_round_zero", interpreter: "rem_round_zero", lem: "hardware_mod", c: "tmod_int", coq: "Z.rem"} : (int, int) -> int
+
+/* The following should get us euclidean modulus, and is compatible with pre and post 0.9 versions of sail */
+overload operator % = {emod_int, mod}
+
+val min_nat = {ocaml: "min_int", interpreter: "min_int", lem: "min", coq: "min_nat", c: "min_int"} : (nat, nat) -> nat
+
+val min_int = {ocaml: "min_int", interpreter: "min_int", lem: "min", coq: "Z.min", c: "min_int"} : (int, int) -> int
+
+val max_nat = {ocaml: "max_int", interpreter: "max_int", lem: "max", coq: "max_nat", c: "max_int"} : (nat, nat) -> nat
+
+val max_int = {ocaml: "max_int", interpreter: "max_int", lem: "max", coq: "Z.max", c: "max_int"} : (int, int) -> int
+
+overload min = {min_nat, min_int}
+
+overload max = {max_nat, max_int}
+
+val pow2 = "pow2" : forall 'n. atom('n) -> atom(2 ^ 'n)
+
+val print = "print_endline" : string -> unit
+val print_string = "print_string" : (string, string) -> unit
+
+val print_instr    = {ocaml: "Platform.print_instr", interpreter: "print_endline", c: "print_instr", lem: "print_dbg", _: "print_endline"} : string -> unit
+val print_reg      = {ocaml: "Platform.print_reg", interpreter: "print_endline", c: "print_reg", lem: "print_dbg", _: "print_endline"} : string -> unit
+val print_mem      = {ocaml: "Platform.print_mem_access", interpreter: "print_endline", c: "print_mem_access", lem: "print_dbg", _: "print_endline"} : string -> unit
+val print_platform = {ocaml: "Platform.print_platform", interpreter: "print_endline", c: "print_platform", lem: "print_dbg", _: "print_endline"} : string -> unit
+
+val get_config_print_instr = {ocaml: "Platform.get_config_print_instr", c:"get_config_print_instr"} : unit -> bool
+val get_config_print_reg = {ocaml: "Platform.get_config_print_reg", c:"get_config_print_reg"} : unit -> bool
+val get_config_print_mem = {ocaml: "Platform.get_config_print_mem", c:"get_config_print_mem"} : unit -> bool
+
+val get_config_print_platform = {ocaml: "Platform.get_config_print_platform", c:"get_config_print_platform"} : unit -> bool
+// defaults for other backends
+function get_config_print_instr () = false
+function get_config_print_reg () = false
+function get_config_print_mem () = false
+function get_config_print_platform () = false
+
+val EXTS : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m)
+val EXTZ : forall 'n 'm, 'm >= 'n. (implicit('m), bits('n)) -> bits('m)
+
+function EXTS(m, v) = sail_sign_extend(v, m)
+function EXTZ(m, v) = sail_zero_extend(v, m)
+
+val zeros_implicit : forall 'n, 'n >= 0 . implicit('n) -> bits('n)
+function zeros_implicit (n) = sail_zeros(n)
+overload zeros = {zeros_implicit}
+
+val ones : forall 'n, 'n >= 0 . implicit('n) -> bits('n)
+function ones (n) = sail_ones (n)
+
+val bool_to_bits : bool -> bits(1)
+function bool_to_bits x = if x then 0b1 else 0b0
+
+val bit_to_bool : bit -> bool
+function bit_to_bool b = match b {
+  bitone  => true,
+  bitzero => false
+}
+
+val to_bits : forall 'l, 'l >= 0.(atom('l), int) -> bits('l)
+function to_bits (l, n) = get_slice_int(l, n, 0)
+
+infix 4 <_s
+infix 4 >=_s
+infix 4 <_u
+infix 4 >=_u
+infix 4 <=_u
+
+val operator <_s  : forall 'n, 'n > 0. (bits('n), bits('n)) -> bool
+val operator >=_s : forall 'n, 'n > 0. (bits('n), bits('n)) -> bool
+val operator <_u  : forall 'n. (bits('n), bits('n)) -> bool
+val operator >=_u : forall 'n. (bits('n), bits('n)) -> bool
+val operator <=_u : forall 'n. (bits('n), bits('n)) -> bool
+
+function operator <_s  (x, y) = signed(x) < signed(y)
+function operator >=_s (x, y) = signed(x) >= signed(y)
+function operator <_u  (x, y) = unsigned(x) < unsigned(y)
+function operator >=_u (x, y) = unsigned(x) >= unsigned(y)
+function operator <=_u (x, y) = unsigned(x) <= unsigned(y)
+
+infix 7 >>
+infix 7 <<
+
+val "shift_bits_right" : forall 'n 'm. (bits('n), bits('m)) -> bits('n)
+val "shift_bits_left"  : forall 'n 'm. (bits('n), bits('m)) -> bits('n)
+
+val "shiftl" : forall 'm 'n, 'n >= 0. (bits('m), atom('n)) -> bits('m)
+val "shiftr" : forall 'm 'n, 'n >= 0. (bits('m), atom('n)) -> bits('m)
+
+overload operator >> = {shift_bits_right, shiftr}
+overload operator << = {shift_bits_left, shiftl}
+
+/* Ideally these would be sail builtin */
+
+function shift_right_arith64 (v : bits(64), shift : bits(6)) -> bits(64) =
+    let v128 : bits(128) = EXTS(v) in
+    (v128 >> shift)[63..0]
+
+function shift_right_arith32 (v : bits(32), shift : bits(5)) -> bits(32) =
+    let v64 : bits(64) = EXTS(v) in
+    (v64 >> shift)[31..0]
+
+val "decimal_string_of_bits" : forall 'n. bits('n) -> string
+val hex_bits : forall 'n . (atom('n), bits('n)) <-> string
+
+/* Define the XLEN value for the architecture. */
+
+type xlen       : Int = 64
+type xlen_bytes : Int = 8
+type xlenbits         = bits(xlen)
+/* The default metadata carries no information, and is implemented
+ * using a unit type.
+ */
+
+type mem_meta = unit
+
+let default_meta : mem_meta = ()
+
+val __WriteRAM_Meta : forall 'n. (xlenbits, atom('n), mem_meta) -> unit effect {wmvt}
+function __WriteRAM_Meta(addr, width, meta) = ()
+
+val __ReadRAM_Meta  : forall 'n. (xlenbits, atom('n)) -> mem_meta effect {rmem}
+function __ReadRAM_Meta(addr, width) = ()
+/* These functions define the primitives for physical memory access.
+ * They depend on the XLEN of the architecture.
+ *
+ * They also depend on the type of metadata that is read and written
+ * to physical memory.  For models that do not require this metadata,
+ * a unit type can be used.
+ *
+ * The underlying __read_mem and __write_mem functions are from the
+ * Sail library.  The metadata primitives __{Read,Write}RAM_Meta are
+ * in prelude_mem_metadata.
+ */
+
+
+/* This is a slightly arbitrary limit on the maximum number of bytes
+   in a memory access.  It helps to generate slightly better C code
+   because it means width argument can be fast native integer. It
+   would be even better if it could be <= 8 bytes so that data can
+   also be a 64-bit int but CHERI needs 128-bit accesses for
+   capabilities and SIMD / vector instructions will also need more. */
+type max_mem_access : Int = 16
+
+val write_ram = {lem: "write_ram", coq: "write_ram"} : forall 'n, 0 < 'n <= max_mem_access . (write_kind, xlenbits, atom('n), bits(8 * 'n), mem_meta) -> bool effect {wmv, wmvt}
+
+val write_ram_ea : forall 'n, 0 < 'n <= max_mem_access . (write_kind, xlenbits, atom('n)) -> unit effect {eamem}
+function write_ram_ea(wk, addr, width) =
+  __write_mem_ea(wk, sizeof(xlen), addr, width)
+
+val read_ram = {lem: "read_ram", coq: "read_ram"} : forall 'n, 0 < 'n <= max_mem_access .  (read_kind, xlenbits, atom('n), bool) -> (bits(8 * 'n), mem_meta) effect {rmem, rmemt}
+function read_ram(rk, addr, width, read_meta) =
+  let meta = if read_meta then __ReadRAM_Meta(addr, width) else default_meta in
+  (__read_mem(rk, sizeof(xlen), addr, width), meta)
+
+
+/* Basic type and function definitions used pervasively in the model. */
+
+/* this value is only defined for the runtime platform for ELF loading
+ * checks, and not used in the model.
+ */
+let xlen_val = sizeof(xlen)
+
+let xlen_max_unsigned = 2 ^ sizeof(xlen) - 1
+let xlen_max_signed = 2 ^ (sizeof(xlen) - 1) - 1
+let xlen_min_signed = 0 - 2 ^ (sizeof(xlen) - 1)
+
+type half = bits(16)
+type word = bits(32)
+
+/* register identifiers */
+
+type regidx  = bits(5)
+type cregidx = bits(3)    /* identifiers in RVC instructions */
+type csreg   = bits(12)   /* CSR addressing */
+
+/* register file indexing */
+
+type regno ('n : Int), 0 <= 'n < 32 = atom('n)
+
+val regidx_to_regno : bits(5) -> {'n, 0 <= 'n < 32. regno('n)}
+function regidx_to_regno b = let 'r = unsigned(b) in r
+
+/* mapping RVC register indices into normal indices */
+val creg2reg_idx : cregidx -> regidx
+function creg2reg_idx(creg) = 0b01 @ creg
+
+/* some architecture and ABI relevant register identifiers */
+let zreg : regidx = 0b00000  /* x0, zero register  */
+let ra   : regidx = 0b00001  /* x1, return address */
+let sp   : regidx = 0b00010  /* x2, stack pointer  */
+
+/* instruction fields */
+
+type opcode = bits(7)
+type imm12  = bits(12)
+type imm20  = bits(20)
+type amo    = bits(1)  /* amo opcode flags */
+
+/* base architecture definitions */
+
+enum Architecture = {RV32, RV64, RV128}
+type arch_xlen = bits(2)
+function architecture(a : arch_xlen) -> option(Architecture) =
+  match (a) {
+    0b01 => Some(RV32),
+    0b10 => Some(RV64),
+    0b11 => Some(RV128),
+    _    => None()
+  }
+
+function arch_to_bits(a : Architecture) -> arch_xlen =
+  match (a) {
+    RV32  => 0b01,
+    RV64  => 0b10,
+    RV128 => 0b11
+  }
+
+/* enum denoting whether an executed instruction retires */
+
+enum Retired = {RETIRE_SUCCESS, RETIRE_FAIL}
+
+/* memory access types */
+
+union AccessType ('a : Type) = {
+  Read      : 'a,
+  Write     : 'a,
+  ReadWrite : 'a,
+  Execute   : unit
+}
+
+enum word_width = {BYTE, HALF, WORD, DOUBLE}
+/* model-internal exceptions */
+
+union exception = {
+  Error_not_implemented : string,
+  Error_internal_error  : unit
+}
+
+val not_implemented : forall ('a : Type). string -> 'a effect {escape}
+function not_implemented message = throw(Error_not_implemented(message))
+
+val internal_error : forall ('a : Type). string -> 'a effect {escape}
+function internal_error(s) = {
+    assert (false, s);
+    throw Error_internal_error()
+}
+
+/* instruction opcode grouping */
+enum bop = {RISCV_BEQ, RISCV_BNE, RISCV_BLT,
+            RISCV_BGE, RISCV_BLTU, RISCV_BGEU}    /* branch ops */
+enum iop = {RISCV_ADDI, RISCV_SLTI, RISCV_SLTIU,
+            RISCV_XORI, RISCV_ORI, RISCV_ANDI}    /* immediate ops */
+
+mapping bool_bits : bool <-> bits(1) = {
+  true   <-> 0b1,
+  false  <-> 0b0
+}
+
+mapping bool_not_bits : bool <-> bits(1) = {
+  true   <-> 0b0,
+  false  <-> 0b1
+}
+
+mapping size_bits : word_width <-> bits(2) = {
+  BYTE   <-> 0b00,
+  HALF   <-> 0b01,
+  WORD   <-> 0b10,
+  DOUBLE <-> 0b11
+}
+
+val word_width_bytes : word_width -> {'s, 's == 1 | 's == 2 | 's == 4 | 's == 8 . atom('s)}
+function word_width_bytes width = match width {
+  BYTE   => 1,
+  HALF   => 2,
+  WORD   => 4,
+  DOUBLE => 8
+}
+// Extensions for memory Accesstype.
+
+type ext_access_type = unit
+
+let Data  : ext_access_type = ()
+
+let default_write_acc : ext_access_type = Data
+
+val accessType_to_str : AccessType(ext_access_type) -> string
+function accessType_to_str (a) =
+  match (a) {
+    Read(Data)      => "R",
+    Write(Data)     => "W",
+    ReadWrite(Data) => "RW",
+    Execute()       => "X"
+  }
+
+overload to_str = {accessType_to_str}
+/* default register type */
+type regtype = xlenbits
+
+/* default zero register */
+let zero_reg : regtype = EXTZ(0x0)
+
+/* default register printer */
+val RegStr : regtype -> string
+function RegStr(r) = BitStr(r)
+
+/* conversions */
+
+val regval_from_reg : regtype -> xlenbits
+function regval_from_reg(r) = r
+
+val regval_into_reg : xlenbits -> regtype
+function regval_into_reg(v) = v
+/* program counter */
+
+register PC       : xlenbits
+register nextPC   : xlenbits
+
+/* internal state to hold instruction bits for faulting instructions */
+register instbits : xlenbits
+
+/* register file and accessors */
+
+register Xs : vector(32, dec, regtype)
+
+register x1  : regtype
+register x2  : regtype
+register x3  : regtype
+register x4  : regtype
+register x5  : regtype
+register x6  : regtype
+register x7  : regtype
+register x8  : regtype
+register x9  : regtype
+register x10 : regtype
+register x11 : regtype
+register x12 : regtype
+register x13 : regtype
+register x14 : regtype
+register x15 : regtype
+register x16 : regtype
+register x17 : regtype
+register x18 : regtype
+register x19 : regtype
+register x20 : regtype
+register x21 : regtype
+register x22 : regtype
+register x23 : regtype
+register x24 : regtype
+register x25 : regtype
+register x26 : regtype
+register x27 : regtype
+register x28 : regtype
+register x29 : regtype
+register x30 : regtype
+register x31 : regtype
+
+val rX : forall 'n, 0 <= 'n < 32. regno('n) -> xlenbits effect {rreg, escape}
+function rX r = {
+  let v : regtype =
+    match r {
+      0 => zero_reg,
+      1 => x1,
+      2 => x2,
+      3 => x3,
+      4 => x4,
+      5 => x5,
+      6 => x6,
+      7 => x7,
+      8 => x8,
+      9 => x9,
+      10 => x10,
+      11 => x11,
+      12 => x12,
+      13 => x13,
+      14 => x14,
+      15 => x15,
+      16 => x16,
+      17 => x17,
+      18 => x18,
+      19 => x19,
+      20 => x20,
+      21 => x21,
+      22 => x22,
+      23 => x23,
+      24 => x24,
+      25 => x25,
+      26 => x26,
+      27 => x27,
+      28 => x28,
+      29 => x29,
+      30 => x30,
+      31 => x31,
+      _  => {assert(false, "invalid register number"); zero_reg}
+    };
+  regval_from_reg(v)
+}
+
+val wX : forall 'n, 0 <= 'n < 32. (regno('n), xlenbits) -> unit effect {wreg, escape}
+function wX (r, in_v) = {
+  let v = regval_into_reg(in_v);
+  match r {
+    0  => (),
+    1  => x1 = v,
+    2  => x2 = v,
+    3  => x3 = v,
+    4  => x4 = v,
+    5  => x5 = v,
+    6  => x6 = v,
+    7  => x7 = v,
+    8  => x8 = v,
+    9  => x9 = v,
+    10 => x10 = v,
+    11 => x11 = v,
+    12 => x12 = v,
+    13 => x13 = v,
+    14 => x14 = v,
+    15 => x15 = v,
+    16 => x16 = v,
+    17 => x17 = v,
+    18 => x18 = v,
+    19 => x19 = v,
+    20 => x20 = v,
+    21 => x21 = v,
+    22 => x22 = v,
+    23 => x23 = v,
+    24 => x24 = v,
+    25 => x25 = v,
+    26 => x26 = v,
+    27 => x27 = v,
+    28 => x28 = v,
+    29 => x29 = v,
+    30 => x30 = v,
+    31 => x31 = v,
+    _  => assert(false, "invalid register number")
+  };
+  if (r != 0) then {
+     if   get_config_print_reg()
+     then print_reg("x" ^ string_of_int(r) ^ " <- " ^ RegStr(v));
+  }
+}
+
+function rX_bits(i: bits(5)) -> xlenbits = rX(unsigned(i))
+
+function wX_bits(i: bits(5), data: xlenbits) -> unit = {
+  wX(unsigned(i)) = data
+}
+
+overload X = {rX_bits, wX_bits, rX, wX}
+
+val init_base_regs : unit -> unit effect {wreg}
+function init_base_regs () = {
+  x1  = zero_reg;
+  x2  = zero_reg;
+  x3  = zero_reg;
+  x4  = zero_reg;
+  x5  = zero_reg;
+  x6  = zero_reg;
+  x7  = zero_reg;
+  x8  = zero_reg;
+  x9  = zero_reg;
+  x10 = zero_reg;
+  x11 = zero_reg;
+  x12 = zero_reg;
+  x13 = zero_reg;
+  x14 = zero_reg;
+  x15 = zero_reg;
+  x16 = zero_reg;
+  x17 = zero_reg;
+  x18 = zero_reg;
+  x19 = zero_reg;
+  x20 = zero_reg;
+  x21 = zero_reg;
+  x22 = zero_reg;
+  x23 = zero_reg;
+  x24 = zero_reg;
+  x25 = zero_reg;
+  x26 = zero_reg;
+  x27 = zero_reg;
+  x28 = zero_reg;
+  x29 = zero_reg;
+  x30 = zero_reg;
+  x31 = zero_reg
+}
+/* accessors for default architectural addresses, for use from within instructions */
+
+/*!
+  Retrieves the architectural PC value. This is not necessarily the value
+  found in the PC register as extensions may choose to override this function.
+  The value in the PC register is the absolute virtual address of the instruction
+  to fetch.
+ */
+val get_arch_pc : unit -> xlenbits effect {rreg}
+function get_arch_pc() = PC
+
+val get_next_pc : unit -> xlenbits effect {rreg}
+function get_next_pc() = nextPC
+
+val set_next_pc : xlenbits -> unit effect {wreg}
+function set_next_pc(pc) = {
+  nextPC = pc
+}
+
+val tick_pc : unit -> unit effect {rreg, wreg}
+function tick_pc() = {
+  PC = nextPC
+}
+
+/* Extensions may wish to interpose on fetch, control transfer, and data
+ * addresses used to access memory and perhaps modify them.  This file
+ * defines the return values used by functions that perform this interposition.
+ *
+ * The model defines defaults for these functions in riscv_addr_checks.sail;
+ * extensions would need to define their own functions to override them.
+ */
+
+union Ext_FetchAddr_Check ('a : Type) = {
+  Ext_FetchAddr_OK  : xlenbits,  /* PC value to use for the actual fetch */
+  Ext_FetchAddr_Error : 'a
+}
+
+union Ext_ControlAddr_Check ('a : Type) = {
+  Ext_ControlAddr_OK : xlenbits, /* PC value to use for the target of the control operation */
+  Ext_ControlAddr_Error : 'a
+}
+
+union Ext_DataAddr_Check ('a : Type) = {
+  Ext_DataAddr_OK : xlenbits,    /* Address to use for the data access */
+  Ext_DataAddr_Error : 'a
+}
+/* default fetch address checks */
+
+type ext_fetch_addr_error = unit
+
+/* Since fetch is done in granules, the check function gets two arguments:
+ * start_pc: the PC at the start of the current fetch sequence
+ * pc:       the PC for the current granule
+ *
+ * returns:  the *virtual* memory address to use for the fetch.
+ *           any address translation errors are reported for pc, not the returned value.
+ */
+function ext_fetch_check_pc(start_pc : xlenbits, pc : xlenbits) -> Ext_FetchAddr_Check(ext_fetch_addr_error) =
+  Ext_FetchAddr_OK(pc)
+
+function ext_handle_fetch_check_error(err : ext_fetch_addr_error) -> unit =
+  ()
+
+/* default control address checks */
+
+type ext_control_addr_error = unit
+
+/* these functions return the address to use as the target for
+ * the control transfer.  any address translation or other errors
+ * are reported for the original value, not the returned value.
+ *
+ * NOTE: the input value does *not* have bit[0] set to 0, to enable
+ * more accurate bounds checking.  There is no constraint on the output
+ * value, which will have bit[0] cleared by the caller if needed.
+ */
+
+/* the control address is derived from a non-PC register, e.g. in JALR */
+function ext_control_check_addr(pc : xlenbits) -> Ext_ControlAddr_Check(ext_control_addr_error) =
+  Ext_ControlAddr_OK(pc)
+
+/* the control address is derived from the PC register, e.g. in JAL */
+function ext_control_check_pc(pc : xlenbits) -> Ext_ControlAddr_Check(ext_control_addr_error) =
+  Ext_ControlAddr_OK(pc)
+
+function ext_handle_control_check_error(err : ext_control_addr_error) -> unit =
+  ()
+
+
+/* The default data address function does not perform any checks so
+   just uses unit for error type. */
+type ext_data_addr_error = unit
+
+/* Default data addr is just base register + immediate offset (may be zero).
+   Extensions might override and add additional checks. */
+function ext_data_get_addr(base : regidx, offset : xlenbits, acc : AccessType(ext_access_type), width : word_width)
+         -> Ext_DataAddr_Check(ext_data_addr_error) =
+  let addr = X(base) + offset in
+  Ext_DataAddr_OK(addr)
+
+/* Machine-mode and supervisor-mode functionality. */
+
+union ExceptionType = {
+ E_Fetch_Addr_Align   : unit,
+ E_Fetch_Access_Fault : unit,
+ E_Illegal_Instr      : unit,
+ E_Breakpoint         : unit,
+ E_Load_Addr_Align    : unit,
+ E_Load_Access_Fault  : unit,
+ E_SAMO_Addr_Align    : unit,
+ E_SAMO_Access_Fault  : unit,
+ E_U_EnvCall          : unit,
+ E_S_EnvCall          : unit,
+ E_Reserved_10        : unit,
+ E_M_EnvCall          : unit,
+ E_Fetch_Page_Fault   : unit,
+ E_Load_Page_Fault    : unit,
+ E_Reserved_14        : unit,
+ E_SAMO_Page_Fault    : unit,
+}
+
+function handle_mem_exception(addr : xlenbits, e : ExceptionType) -> unit = {
+  assert(false);
+}
+
+
+/* memory access exceptions, defined here for use by the platform model. */
+
+union MemoryOpResult ('a : Type) = {
+  MemValue     : 'a,
+  MemException : ExceptionType
+}
+
+val MemoryOpResult_add_meta : forall ('t : Type). (MemoryOpResult('t), mem_meta) -> MemoryOpResult(('t, mem_meta))
+function MemoryOpResult_add_meta(r, m) = match r {
+  MemValue(v)     => MemValue(v, m),
+  MemException(e) => MemException(e)
+}
+
+val MemoryOpResult_drop_meta : forall ('t : Type). MemoryOpResult(('t, mem_meta)) -> MemoryOpResult('t)
+function MemoryOpResult_drop_meta(r) = match r {
+  MemValue(v, m)  => MemValue(v),
+  MemException(e) => MemException(e)
+}
+
+/* whether the platform supports misaligned accesses without trapping to M-mode. if false,
+ * misaligned loads/stores are trapped to Machine mode.
+ */
+function plat_enable_misaligned_access ()  : unit -> bool = true
+
+/* Platform-specific handling of instruction faults */
+
+function handle_illegal() -> unit = {
+  assert(false);
+}
+
+/* Physical memory model.
+ *
+ * This assumes that the platform memory map has been defined, so that accesses
+ * to MMIO regions can be dispatched.
+ *
+ * The implementation below supports the reading and writing of memory
+ * metadata in addition to raw memory data.
+ *
+ * The external API for this module is
+ *   {mem_read, mem_read_meta, mem_write_ea, mem_write_value_meta, mem_write_value}
+ * where mem_write_value is a special case of mem_write_value_meta that uses
+ * a default value of the metadata.
+ *
+ * The internal implementation first performs a PMP check (if PMP is
+ * enabled), and then dispatches to MMIO regions or physical memory as
+ * per the platform memory map.
+ */
+
+function is_aligned_addr forall 'n. (addr : xlenbits, width : atom('n)) -> bool =
+  unsigned(addr) % width == 0
+
+function read_kind_of_flags (aq : bool, rl : bool, res : bool) -> option(read_kind) =
+  match (aq, rl, res) {
+    (false, false, false) => Some(Read_plain),
+    (true, false, false)  => Some(Read_RISCV_acquire),
+    (true, true, false)   => Some(Read_RISCV_strong_acquire),
+    (false, false, true)  => Some(Read_RISCV_reserved),
+    (true, false, true)   => Some(Read_RISCV_reserved_acquire),
+    (true, true, true)    => Some(Read_RISCV_reserved_strong_acquire),
+    (false, true, false)  => None(), /* should these be instead throwing error_not_implemented as below? */
+    (false, true, true)   => None()
+  }
+
+// only used for actual memory regions, to avoid MMIO effects
+function phys_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl: bool, res : bool, meta : bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) = {
+  let result = (match read_kind_of_flags(aq, rl, res) {
+    Some(rk) => Some(read_ram(rk, paddr, width, meta)),
+    None()   => None()
+  }) : option((bits(8 * 'n), mem_meta));
+  match (t, result) {
+    (Execute(),  None()) => MemException(E_Fetch_Access_Fault()),
+    (Read(Data), None()) => MemException(E_Load_Access_Fault()),
+    (_,          None()) => MemException(E_SAMO_Access_Fault()),
+    (_,      Some(v, m)) => { MemValue(v, m) }
+  }
+}
+
+val mem_read      : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool) -> MemoryOpResult(bits(8 * 'n))             effect {rmem, rmemt, rreg, escape}
+
+function mem_read (typ, paddr, width, aq, rl, res) = {
+ let result : MemoryOpResult(bits(8 * 'n)) =
+  if (aq | res) & (~ (is_aligned_addr(paddr, width)))
+  then MemException(E_Load_Addr_Align())
+  else match (aq, rl, res) {
+    (false, true,  false) => throw(Error_not_implemented("load.rl")),
+    (false, true,  true)  => throw(Error_not_implemented("lr.rl")),
+    (_, _, _)             => MemoryOpResult_drop_meta(phys_mem_read(typ, paddr, width, aq, rl, res, false))
+  };
+ result
+}
+
+val mem_write_ea : forall 'n, 0 < 'n <= max_mem_access . (xlenbits, atom('n), bool, bool, bool) -> MemoryOpResult(unit) effect {eamem, escape}
+
+function mem_write_ea (addr, width, aq, rl, con) = {
+  if (rl | con) & (~ (is_aligned_addr(addr, width)))
+  then MemException(E_SAMO_Addr_Align())
+  else match (aq, rl, con) {
+    (false, false, false) => MemValue(write_ram_ea(Write_plain, addr, width)),
+    (false, true,  false) => MemValue(write_ram_ea(Write_RISCV_release, addr, width)),
+    (false, false, true)  => MemValue(write_ram_ea(Write_RISCV_conditional, addr, width)),
+    (false, true , true)  => MemValue(write_ram_ea(Write_RISCV_conditional_release, addr, width)),
+    (true,  false, false) => throw(Error_not_implemented("store.aq")),
+    (true,  true,  false) => MemValue(write_ram_ea(Write_RISCV_strong_release, addr, width)),
+    (true,  false, true)  => throw(Error_not_implemented("sc.aq")),
+    (true,  true , true)  => MemValue(write_ram_ea(Write_RISCV_conditional_strong_release, addr, width))
+  }
+}
+
+// only used for actual memory regions, to avoid MMIO effects
+function phys_mem_write forall 'n, 0 < 'n <= max_mem_access . (wk : write_kind, paddr : xlenbits, width : atom('n), data : bits(8 * 'n), meta : mem_meta) -> MemoryOpResult(bool) = {
+  let result = MemValue(write_ram(wk, paddr, width, data, meta));
+  result
+}
+
+/* Atomic accesses can be done to MMIO regions, e.g. in kernel access to device registers. */
+
+/* Memory write with an explicit metadata value.  Metadata writes are
+ * currently assumed to have the same alignment constraints as their
+ * data.
+ * NOTE: The wreg effect is due to MMIO, the rreg is due to checking mtime.
+ */
+val mem_write_value_meta : forall 'n, 0 < 'n <= max_mem_access . (xlenbits, atom('n), bits(8 * 'n), ext_access_type, mem_meta, bool, bool, bool) -> MemoryOpResult(bool) effect {wmv, wmvt, rreg, wreg, escape}
+function mem_write_value_meta (paddr, width, value, ext_acc, meta, aq, rl, con) = {
+  if (rl | con) & (~ (is_aligned_addr(paddr, width)))
+  then MemException(E_SAMO_Addr_Align())
+  else match (aq, rl, con) {
+    (false, false, false) => phys_mem_write(Write_plain, paddr, width, value, meta),
+    (false, true,  false) => phys_mem_write(Write_RISCV_release, paddr, width, value, meta),
+    (false, false, true)  => phys_mem_write(Write_RISCV_conditional, paddr, width, value, meta),
+    (false, true , true)  => phys_mem_write(Write_RISCV_conditional_release, paddr, width, value, meta),
+    (true,  true,  false) => phys_mem_write(Write_RISCV_strong_release, paddr, width, value, meta),
+    (true,  true , true)  => phys_mem_write(Write_RISCV_conditional_strong_release, paddr, width, value, meta),
+    // throw an illegal instruction here?
+    (true,  false, false) => throw(Error_not_implemented("store.aq")),
+    (true,  false, true)  => throw(Error_not_implemented("sc.aq"))
+  }
+}
+
+/* Memory write with a default metadata value. */
+val mem_write_value : forall 'n, 0 < 'n <= max_mem_access . (xlenbits, atom('n), bits(8 * 'n), bool, bool, bool) -> MemoryOpResult(bool) effect {wmv, wmvt, rreg, wreg, escape}
+function mem_write_value (paddr, width, value, aq, rl, con) =
+  mem_write_value_meta(paddr, width, value, default_write_acc, default_meta, aq, rl, con)
+
+/* Result of address translation */
+
+type ext_ptw = unit
+
+union TR_Result('paddr : Type, 'failure : Type) = {
+  TR_Address : ('paddr, ext_ptw),
+  TR_Failure : ('failure, ext_ptw)
+}
+
+val translateAddr : (xlenbits, AccessType(ext_access_type)) -> TR_Result(xlenbits, ExceptionType) effect {escape, rmem, rmemt, rreg, wmv, wmvt, wreg}
+function translateAddr(vAddr, ac) = {
+  TR_Address(vAddr, ());
+}
+
+/* Instruction definitions.
+ *
+ * This includes decoding, execution, and assembly parsing and printing.
+ */
+
+scattered union ast
+
+/* returns whether an instruction was retired, used for computing minstret */
+val execute : ast -> Retired effect {escape, wreg, rreg, wmv, wmvt, eamem, rmem, rmemt, barr, exmem, undef}
+scattered function execute
+
+val encdec : ast <-> bits(32)
+scattered mapping encdec
+
+///* see riscv_jalr_seq.sail or riscv_jalr_rmem.sail for the execute clause. */
+//
+///* *****************************************************************
+//union clause ast = BTYPE : (bits(13), regidx, regidx, bop)
+//
+//mapping encdec_bop : bop <-> bits(3) = {
+//  RISCV_BEQ  <-> 0b000,
+//  RISCV_BNE  <-> 0b001,
+//  RISCV_BLT  <-> 0b100,
+//  RISCV_BGE  <-> 0b101,
+//  RISCV_BLTU <-> 0b110,
+//  RISCV_BGEU <-> 0b111
+//}
+//
+//mapping clause encdec = BTYPE(imm7_6 @ imm5_0 @ imm7_5_0 @ imm5_4_1 @ 0b0, rs2, rs1, op)
+//  <-> imm7_6 : bits(1) @ imm7_5_0 : bits(6) @ rs2 @ rs1 @ encdec_bop(op) @ imm5_4_1 : bits(4) @ imm5_0 : bits(1) @ 0b1100011
+//
+//function clause execute (BTYPE(imm, rs2, rs1, op)) = {
+//  let rs1_val = X(rs1);
+//  let rs2_val = X(rs2);
+//  let taken : bool = match op {
+//    RISCV_BEQ  => rs1_val == rs2_val,
+//    RISCV_BNE  => rs1_val != rs2_val,
+//    RISCV_BLT  => rs1_val <_s rs2_val,
+//    RISCV_BGE  => rs1_val >=_s rs2_val,
+//    RISCV_BLTU => rs1_val <_u rs2_val,
+//    RISCV_BGEU => rs1_val >=_u rs2_val
+//  };
+//  let t : xlenbits = PC + EXTS(imm);
+//  if taken then {
+//    /* Extensions get the first checks on the prospective target address. */
+//    match ext_control_check_pc(t) {
+//      Ext_ControlAddr_Error(e) => {
+//        assert(false);
+//        RETIRE_FAIL
+//      },
+//      Ext_ControlAddr_OK(target) => {
+//        if bit_to_bool(target[1]) & (~ (haveRVC())) then {
+//          handle_mem_exception(target, E_Fetch_Addr_Align());
+//          RETIRE_FAIL;
+//        } else {
+//          set_next_pc(target);
+//          RETIRE_SUCCESS
+//        }
+//      }
+//    }
+//  } else RETIRE_SUCCESS
+//}
+
+/* ****************************************************************** */
+union clause ast = ITYPE : (bits(12), regidx, regidx, iop)
+
+mapping encdec_iop : iop <-> bits(3) = {
+  RISCV_ADDI  <-> 0b000,
+  RISCV_SLTI  <-> 0b010,
+  RISCV_SLTIU <-> 0b011,
+  RISCV_ANDI  <-> 0b111,
+  RISCV_ORI   <-> 0b110,
+  RISCV_XORI  <-> 0b100
+}
+
+mapping clause encdec = ITYPE(imm, rs1, rd, op)
+  <-> imm @ rs1 @ encdec_iop(op) @ rd @ 0b0010011
+
+function clause execute (ITYPE (imm, rs1, rd, op)) = {
+  let rs1_val = X(rs1);
+  let immext : xlenbits = EXTS(imm);
+  let result : xlenbits = match op {
+    RISCV_ADDI  => rs1_val + immext,
+    RISCV_SLTI  => EXTZ(bool_to_bits(rs1_val <_s immext)),
+    RISCV_SLTIU => EXTZ(bool_to_bits(rs1_val <_u immext)),
+    RISCV_ANDI  => rs1_val & immext,
+    RISCV_ORI   => rs1_val | immext,
+    RISCV_XORI  => rs1_val ^ immext
+  };
+  X(rd) = result;
+  RETIRE_SUCCESS
+}
+
+mapping itype_mnemonic : iop <-> string = {
+  RISCV_ADDI  <-> "addi",
+  RISCV_SLTI  <-> "slti",
+  RISCV_SLTIU <-> "sltiu",
+  RISCV_XORI  <-> "xori",
+  RISCV_ORI   <-> "ori",
+  RISCV_ANDI  <-> "andi"
+}
+
+/* ****************************************************************** */
+union clause ast = LOAD : (bits(12), regidx, regidx, bool, word_width, bool, bool)
+
+/* unsigned loads are only present for widths strictly less than xlen,
+   signed loads also present for widths equal to xlen */
+mapping clause encdec = LOAD(imm, rs1, rd, is_unsigned, size, false, false) if (word_width_bytes(size) < sizeof(xlen_bytes)) | (not_bool(is_unsigned) & word_width_bytes(size) <= sizeof(xlen_bytes))
+  <-> imm @ rs1 @ bool_bits(is_unsigned) @ size_bits(size) @ rd @ 0b0000011 if (word_width_bytes(size) < sizeof(xlen_bytes)) | (not_bool(is_unsigned) & word_width_bytes(size) <= sizeof(xlen_bytes))
+
+val extend_value : forall 'n, 0 < 'n <= xlen_bytes. (bool, MemoryOpResult(bits(8 * 'n))) -> MemoryOpResult(xlenbits)
+function extend_value(is_unsigned, value) = match (value) {
+  MemValue(v)     => MemValue(if is_unsigned then EXTZ(v) else EXTS(v) : xlenbits),
+  MemException(e) => MemException(e)
+}
+
+val process_load : forall 'n, 0 < 'n <= xlen_bytes. (regidx, xlenbits, MemoryOpResult(bits(8 * 'n)), bool) -> Retired effect {escape, rreg, wreg}
+function process_load(rd, addr, value, is_unsigned) =
+  match extend_value(is_unsigned, value) {
+    MemValue(result) => { X(rd) = result; RETIRE_SUCCESS },
+    MemException(e)  => { handle_mem_exception(addr, e); RETIRE_FAIL }
+  }
+
+function check_misaligned(vaddr : xlenbits, width : word_width) -> bool =
+  if   plat_enable_misaligned_access() then false
+  else match width {
+         BYTE   => false,
+         HALF   => vaddr[0] == bitone,
+         WORD   => vaddr[0] == bitone | vaddr[1] == bitone,
+         DOUBLE => vaddr[0] == bitone | vaddr[1] == bitone | vaddr[2] == bitone
+       }
+
+function clause execute(LOAD(imm, rs1, rd, is_unsigned, width, aq, rl)) = {
+  let offset : xlenbits = EXTS(imm);
+  /* Get the address, X(rs1) + offset.
+     Some extensions perform additional checks on address validity. */
+  match ext_data_get_addr(rs1, offset, Read(Data), width) {
+    Ext_DataAddr_Error(e)  => { assert(false); RETIRE_FAIL },
+    Ext_DataAddr_OK(vaddr) =>
+      if   check_misaligned(vaddr, width)
+      then { handle_mem_exception(vaddr, E_Load_Addr_Align()); RETIRE_FAIL }
+      else match translateAddr(vaddr, Read(Data)) {
+        TR_Failure(e, _) => { handle_mem_exception(vaddr, e); RETIRE_FAIL },
+        TR_Address(addr, _) =>
+          match (width, sizeof(xlen)) {
+            (BYTE, _)   =>
+               process_load(rd, vaddr, mem_read(Read(Data), addr, 1, aq, rl, false), is_unsigned),
+            (HALF, _)   =>
+               process_load(rd, vaddr, mem_read(Read(Data), addr, 2, aq, rl, false), is_unsigned),
+            (WORD, _)   =>
+               process_load(rd, vaddr, mem_read(Read(Data), addr, 4, aq, rl, false), is_unsigned),
+            (DOUBLE, 64) =>
+               process_load(rd, vaddr, mem_read(Read(Data), addr, 8, aq, rl, false), is_unsigned)
+          }
+      }
+  }
+}
+
+/* ****************************************************************** */
+union clause ast = STORE : (bits(12), regidx, regidx, word_width, bool, bool)
+
+mapping clause encdec = STORE(imm7 @ imm5, rs2, rs1, size, false, false)              if word_width_bytes(size) <= sizeof(xlen_bytes)
+  <-> imm7 : bits(7) @ rs2 @ rs1 @ 0b0 @ size_bits(size) @ imm5 : bits(5) @ 0b0100011 if word_width_bytes(size) <= sizeof(xlen_bytes)
+
+/* NOTE: Currently, we only EA if address translation is successful.
+   This may need revisiting. */
+function clause execute (STORE(imm, rs2, rs1, width, aq, rl)) = {
+  let offset : xlenbits = EXTS(imm);
+  /* Get the address, X(rs1) + offset.
+     Some extensions perform additional checks on address validity. */
+  match ext_data_get_addr(rs1, offset, Write(Data), width) {
+    Ext_DataAddr_Error(e)  => { assert (false); RETIRE_FAIL },
+    Ext_DataAddr_OK(vaddr) =>
+      if   check_misaligned(vaddr, width)
+      then { handle_mem_exception(vaddr, E_SAMO_Addr_Align()); RETIRE_FAIL }
+      else match translateAddr(vaddr, Write(Data)) {
+        TR_Failure(e, _)    => { handle_mem_exception(vaddr, e); RETIRE_FAIL },
+        TR_Address(addr, _) => {
+          let eares : MemoryOpResult(unit) = match width {
+            BYTE   => mem_write_ea(addr, 1, aq, rl, false),
+            HALF   => mem_write_ea(addr, 2, aq, rl, false),
+            WORD   => mem_write_ea(addr, 4, aq, rl, false),
+            DOUBLE => mem_write_ea(addr, 8, aq, rl, false)
+          };
+          match (eares) {
+            MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL },
+            MemValue(_) => {
+              let rs2_val = X(rs2);
+              let res : MemoryOpResult(bool) = match (width, sizeof(xlen)) {
+                (BYTE, _)    => mem_write_value(addr, 1, rs2_val[7..0],  aq, rl, false),
+                (HALF, _)    => mem_write_value(addr, 2, rs2_val[15..0], aq, rl, false),
+                (WORD, _)    => mem_write_value(addr, 4, rs2_val[31..0], aq, rl, false),
+                (DOUBLE, 64) => mem_write_value(addr, 8, rs2_val,        aq, rl, false)
+              };
+              match (res) {
+                MemValue(true)  => RETIRE_SUCCESS,
+                MemValue(false) => internal_error("store got false from mem_write_value"),
+                MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL }
+              }
+            }
+          }
+        }
+      }
+  }
+}
+
+/* Put the illegal instructions last to use their wildcard match. */
+
+/* ****************************************************************** */
+
+union clause ast = ILLEGAL : word
+
+mapping clause encdec = ILLEGAL(s) <-> s
+
+function clause execute (ILLEGAL(s)) = { handle_illegal(); RETIRE_FAIL }
+
+/* ****************************************************************** */
+
+/* End definitions */
+end ast
+end execute
+end encdec
+end encdec_compressed
+
+val decode : bits(32) -> ast effect pure
+function decode bv = encdec(bv)
+
+/* The result of a fetch, which includes any possible error
+ * from an extension that interposes on the fetch operation.
+ */
+
+union FetchResult = {
+  F_Ext_Error : ext_fetch_addr_error,      /* For extensions */
+  F_Base      : word,                      /* Base ISA */
+  F_RVC       : half,                      /* Compressed ISA */
+  F_Error     : (ExceptionType, xlenbits)  /* standard exception and PC */
+}
+/* The default implementation of hooks for the step() and main() functions. */
+
+function ext_init() -> unit = ()
+
+function ext_fetch_hook(f : FetchResult) -> FetchResult = f
+
+function ext_pre_step_hook()  -> unit = ()
+function ext_post_step_hook() -> unit = ()
+/* Extensions may wish to interpose and transform decoded instructions,
+ * based on other machine state.  This is supported via a post-decode
+ * instruction hook, the default implementation of which is provided below.
+ */
+
+val ext_post_decode_hook : ast -> ast effect {rreg}
+function ext_post_decode_hook(x) = x
+
+val fetch : unit -> FetchResult effect {escape, rmem, rmemt, rreg, wmv, wmvt, wreg}
+function fetch() -> FetchResult =
+  /* fetch PC check for extensions: extensions return a transformed PC to fetch,
+   * but any exceptions use the untransformed PC.
+   */
+  match ext_fetch_check_pc(PC, PC) {
+    Ext_FetchAddr_Error(e)   => F_Ext_Error(e),
+    Ext_FetchAddr_OK(use_pc) => {
+      if   (use_pc[0] != bitzero | (use_pc[1] != bitzero))
+      then F_Error(E_Fetch_Addr_Align(), PC)
+      else match translateAddr(use_pc, Execute()) {
+        TR_Failure(e, _)     => F_Error(e, PC),
+        TR_Address(ppc, _) => {
+          match mem_read(Execute(), ppc, 4, false, false, false) {
+            MemException(e) => F_Error(e, PC),
+            MemValue(ibits)   => F_Base(ibits)
+            }
+          }
+        }
+      }
+    }
+    
+/* The emulator fetch-execute-interrupt dispatch loop. */
+
+/* returns whether to increment the step count in the trace */
+function step(step_no : int) -> bool = {
+  /* for step extensions */
+  ext_pre_step_hook();
+
+  let (retired, stepped) : (Retired, bool) =
+      /* the extension hook interposes on the fetch result */
+      let f : FetchResult = ext_fetch_hook(fetch()) in
+      match f {
+        /* extension error */
+        F_Ext_Error(e)   => {
+          ext_handle_fetch_check_error(e);
+          (RETIRE_FAIL, false)
+        },
+        /* standard error */
+        F_Error(e, addr) => {
+          handle_mem_exception(addr, e);
+          (RETIRE_FAIL, false)
+        },
+        F_Base(w) => {
+          let ast = decode(w);
+          nextPC = PC + 4;
+          (execute(ext_post_decode_hook(ast)), true)
+        }
+      };
+
+  tick_pc();
+
+  /* for step extensions */
+  ext_post_step_hook();
+
+  stepped
+}
+
+function loop () : unit -> unit = {
+  step_no : int = 0;
+  while (true) do {
+    let stepped = step(step_no);
+    if stepped then step_no = step_no + 1;
+  }
+}
+
+
+function main () : unit -> unit = {
+  // PC = __GetSlice_int(64, elf_entry(), 0);
+  PC = sail_zero_extend(0x1000, sizeof(xlen));
+  print_bits("PC = ", PC);
+
+  try {
+    loop()
+  } catch {
+    Error_not_implemented(s) => print_string("Error: Not implemented: ", s),
+    Error_internal_error() => print("Error: internal error")
+  }
+}
diff --git a/model/riscv_mem.sail b/model/riscv_mem.sail
index d02c49d..b3fa37d 100644
--- a/model/riscv_mem.sail
+++ b/model/riscv_mem.sail
@@ -7,7 +7,7 @@
  * metadata in addition to raw memory data.
  *
  * The external API for this module is
- *   {mem_read, mem_write_ea, mem_write_value_meta, mem_write_value}
+ *   {mem_read, mem_read_meta, mem_write_ea, mem_write_value_meta, mem_write_value}
  * where mem_write_value is a special case of mem_write_value_meta that uses
  * a default value of the metadata.
  *
@@ -19,43 +19,53 @@
 function is_aligned_addr forall 'n. (addr : xlenbits, width : atom('n)) -> bool =
   unsigned(addr) % width == 0
 
-// only used for actual memory regions, to avoid MMIO effects
-function phys_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl: bool, res : bool) -> MemoryOpResult(bits(8 * 'n)) = {
-  let result = (match (aq, rl, res) {
-    (false, false, false) => Some(read_ram(Read_plain, paddr, width)),
-    (true, false, false)  => Some(read_ram(Read_RISCV_acquire, paddr, width)),
-    (true, true, false)   => Some(read_ram(Read_RISCV_strong_acquire, paddr, width)),
-    (false, false, true)  => Some(read_ram(Read_RISCV_reserved, paddr, width)),
-    (true, false, true)   => Some(read_ram(Read_RISCV_reserved_acquire, paddr, width)),
-    (true, true, true)    => Some(read_ram(Read_RISCV_reserved_strong_acquire, paddr, width)),
+function read_kind_of_flags (aq : bool, rl : bool, res : bool) -> option(read_kind) =
+  match (aq, rl, res) {
+    (false, false, false) => Some(Read_plain),
+    (true, false, false)  => Some(Read_RISCV_acquire),
+    (true, true, false)   => Some(Read_RISCV_strong_acquire),
+    (false, false, true)  => Some(Read_RISCV_reserved),
+    (true, false, true)   => Some(Read_RISCV_reserved_acquire),
+    (true, true, true)    => Some(Read_RISCV_reserved_strong_acquire),
     (false, true, false)  => None(), /* should these be instead throwing error_not_implemented as below? */
     (false, true, true)   => None()
-  }) : option(bits(8 * 'n));
+  }
+
+// only used for actual memory regions, to avoid MMIO effects
+function phys_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl: bool, res : bool, meta : bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) = {
+  let result = (match read_kind_of_flags(aq, rl, res) {
+    Some(rk) => Some(read_ram(rk, paddr, width, meta)),
+    None()   => None()
+  }) : option((bits(8 * 'n), mem_meta));
   match (t, result) {
     (Execute(),  None()) => MemException(E_Fetch_Access_Fault()),
     (Read(Data), None()) => MemException(E_Load_Access_Fault()),
     (_,          None()) => MemException(E_SAMO_Access_Fault()),
-    (_,         Some(v)) => { if   get_config_print_mem()
+    (_,      Some(v, m)) => { if   get_config_print_mem()
                               then print_mem("mem[" ^ to_str(t) ^ "," ^ BitStr(paddr) ^ "] -> " ^ BitStr(v));
-                              MemValue(v) }
+                              MemValue(v, m) }
   }
 }
 
 /* dispatches to MMIO regions or physical memory regions depending on physical memory map */
-function checked_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl : bool, res: bool) -> MemoryOpResult(bits(8 * 'n)) =
+function checked_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl : bool, res: bool, meta : bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) =
   if   within_mmio_readable(paddr, width)
-  then mmio_read(paddr, width)
+  then MemoryOpResult_add_meta(mmio_read(t, paddr, width), default_meta)
   else if within_phys_mem(paddr, width)
-  then phys_mem_read(t, paddr, width, aq, rl, res)
-  else MemException(E_Load_Access_Fault())
+  then phys_mem_read(t, paddr, width, aq, rl, res, meta)
+  else match t {
+    Execute()  => MemException(E_Fetch_Access_Fault()),
+    Read(Data) => MemException(E_Load_Access_Fault()),
+    _          => MemException(E_SAMO_Access_Fault())
+  }
 
 /* PMP checks if enabled */
-function pmp_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl : bool, res: bool) -> MemoryOpResult(bits(8 * 'n)) =
+function pmp_mem_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n), aq : bool, rl : bool, res: bool, meta : bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) =
   if   (~ (plat_enable_pmp ()))
-  then checked_mem_read(t, paddr, width, aq, rl, res)
+  then checked_mem_read(t, paddr, width, aq, rl, res, meta)
   else {
     match pmpCheck(paddr, width, t, effectivePrivilege(mstatus, cur_privilege)) {
-      None()  => checked_mem_read(t, paddr, width, aq, rl, res),
+      None()  => checked_mem_read(t, paddr, width, aq, rl, res, meta),
       Some(e) => MemException(e)
     }
   }
@@ -70,7 +80,8 @@ function rvfi_read (addr, width, result) = {
     MemValue(v) => if   width <= 8
                    then { rvfi_exec->rvfi_mem_rdata() = sail_zero_extend(v,64);
                           rvfi_exec->rvfi_mem_rmask() = rvfi_encode_width_mask(width) }
-                   else (),
+                   else { rvfi_exec->rvfi_mem_rdata() = v[63..0];
+                          rvfi_exec->rvfi_mem_rmask() = 0xFF},
     MemException(_) => ()
   };
 }
@@ -81,24 +92,29 @@ $endif
 
 /* NOTE: The rreg effect is due to MMIO. */
 $ifdef RVFI_DII
-val mem_read : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool) -> MemoryOpResult(bits(8 * 'n)) effect {wreg, rmem, rreg, escape}
+val mem_read      : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool)       -> MemoryOpResult(bits(8 * 'n))             effect {wreg, rmem, rmemt, rreg, escape}
+val mem_read_meta : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) effect {wreg, rmem, rmemt, rreg, escape}
 $else
-val mem_read : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool) -> MemoryOpResult(bits(8 * 'n)) effect {rmem, rreg, escape}
+val mem_read      : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool)       -> MemoryOpResult(bits(8 * 'n))             effect {rmem, rmemt, rreg, escape}
+val mem_read_meta : forall 'n, 0 < 'n <= max_mem_access . (AccessType(ext_access_type), xlenbits, atom('n), bool, bool, bool, bool) -> MemoryOpResult((bits(8 * 'n), mem_meta)) effect {rmem, rmemt, rreg, escape}
 $endif
 
-function mem_read (typ, paddr, width, aq, rl, res) = {
- let result : MemoryOpResult(bits(8 * 'n)) =
-  if (aq | res) & (~ (is_aligned_addr(paddr, width)))
-  then MemException(E_Load_Addr_Align())
-  else match (aq, rl, res) {
-    (false, true,  false) => throw(Error_not_implemented("load.rl")),
-    (false, true,  true)  => throw(Error_not_implemented("lr.rl")),
-    (_, _, _)             => pmp_mem_read(typ, paddr, width, aq, rl, res)
-  };
- rvfi_read(paddr, width, result);
- result
+function mem_read_meta (typ, paddr, width, aq, rl, res, meta) = {
+  let result : MemoryOpResult((bits(8 * 'n), mem_meta)) =
+    if (aq | res) & (~ (is_aligned_addr(paddr, width)))
+    then MemException(E_Load_Addr_Align())
+    else match (aq, rl, res) {
+      (false, true,  false) => throw(Error_not_implemented("load.rl")),
+      (false, true,  true)  => throw(Error_not_implemented("lr.rl")),
+      (_, _, _)             => pmp_mem_read(typ, paddr, width, aq, rl, res, meta)
+    };
+  rvfi_read(paddr, width, MemoryOpResult_drop_meta(result));
+  result
 }
 
+function mem_read (typ, paddr, width, aq, rl, res) =
+  MemoryOpResult_drop_meta(mem_read_meta(typ, paddr, width, aq, rl, res, false))
+
 val mem_write_ea : forall 'n, 0 < 'n <= max_mem_access . (xlenbits, atom('n), bool, bool, bool) -> MemoryOpResult(unit) effect {eamem, escape}
 
 function mem_write_ea (addr, width, aq, rl, con) = {
@@ -123,6 +139,9 @@ function rvfi_write (addr, width, value) = {
   if width <= 8 then {
     rvfi_exec->rvfi_mem_wdata() = sail_zero_extend(value,64);
     rvfi_exec->rvfi_mem_wmask() = rvfi_encode_width_mask(width);
+  } else {
+    rvfi_exec->rvfi_mem_wdata() = value[63..0];
+    rvfi_exec->rvfi_mem_wmask() = 0xFF;
   }
 }
 $else
diff --git a/model/riscv_platform.sail b/model/riscv_platform.sail
index 7cc63cc..7e07cf1 100644
--- a/model/riscv_platform.sail
+++ b/model/riscv_platform.sail
@@ -142,8 +142,8 @@ let MTIMECMP_BASE_HI : xlenbits = EXTZ(0x04004)
 let MTIME_BASE       : xlenbits = EXTZ(0x0bff8)
 let MTIME_BASE_HI    : xlenbits = EXTZ(0x0bffc)
 
-val clint_load : forall 'n, 'n > 0. (xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) effect {rreg}
-function clint_load(addr, width) = {
+val clint_load : forall 'n, 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) effect {rreg}
+function clint_load(t, addr, width) = {
   let addr = addr - plat_clint_base ();
   /* FIXME: For now, only allow exact aligned access. */
   if addr == MSIP_BASE & ('n == 8 | 'n == 4)
@@ -194,7 +194,11 @@ function clint_load(addr, width) = {
   else {
     if   get_config_print_platform()
     then print_platform("clint[" ^ BitStr(addr) ^ "] -> <not-mapped>");
-    MemException(E_Load_Access_Fault())
+    match t {
+      Execute()  => MemException(E_Fetch_Access_Fault()),
+      Read(Data) => MemException(E_Load_Access_Fault()),
+      _          => MemException(E_SAMO_Access_Fault())
+    }
   }
 }
 
@@ -274,8 +278,8 @@ register htif_exit_code : bits(64)
  * dispatched the address.
  */
 
-val htif_load : forall 'n, 'n > 0. (xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) effect {rreg}
-function htif_load(paddr, width) = {
+val htif_load : forall 'n, 'n > 0. (AccessType(ext_access_type), xlenbits, int('n)) -> MemoryOpResult(bits(8 * 'n)) effect {rreg}
+function htif_load(t, paddr, width) = {
   if   get_config_print_platform()
   then print_platform("htif[" ^ BitStr(paddr) ^ "] -> " ^ BitStr(htif_tohost));
   /* FIXME: For now, only allow the expected access widths. */
@@ -285,7 +289,11 @@ function htif_load(paddr, width) = {
   then    MemValue(sail_zero_extend(htif_tohost[31..0], 32))  /* FIXME: Redundant zero_extend currently required by Lem backend */
   else if width == 4 & paddr == plat_htif_tohost() + 4
   then    MemValue(sail_zero_extend(htif_tohost[63..32], 32)) /* FIXME: Redundant zero_extend currently required by Lem backend */
-  else    MemException(E_Load_Access_Fault())
+  else match t {
+    Execute()  => MemException(E_Fetch_Access_Fault()),
+    Read(Data) => MemException(E_Load_Access_Fault()),
+    _          => MemException(E_SAMO_Access_Fault())
+  }
 }
 
 /* The rreg,wreg effects are an artifact of using 'register' to implement device state. */
@@ -351,12 +359,16 @@ $else
 function within_mmio_writable forall 'n, 0 < 'n <= max_mem_access . (addr : xlenbits, width : atom('n)) -> bool = false
 $endif
 
-function mmio_read forall 'n, 0 < 'n <= max_mem_access . (paddr : xlenbits, width : atom('n)) -> MemoryOpResult(bits(8 * 'n)) =
+function mmio_read forall 'n, 0 < 'n <= max_mem_access . (t : AccessType(ext_access_type), paddr : xlenbits, width : atom('n)) -> MemoryOpResult(bits(8 * 'n)) =
   if   within_clint(paddr, width)
-  then clint_load(paddr, width)
+  then clint_load(t, paddr, width)
   else if within_htif_readable(paddr, width) & (1 <= 'n)
-  then htif_load(paddr, width)
-  else MemException(E_Load_Access_Fault())
+  then htif_load(t, paddr, width)
+  else match t {
+    Execute()  => MemException(E_Fetch_Access_Fault()),
+    Read(Data) => MemException(E_Load_Access_Fault()),
+    _          => MemException(E_SAMO_Access_Fault())
+  }
 
 function mmio_write forall 'n, 0 <'n <= max_mem_access . (paddr : xlenbits, width : atom('n), data: bits(8 * 'n)) -> MemoryOpResult(bool) =
   if   within_clint(paddr, width)
diff --git a/model/riscv_pmp_control.sail b/model/riscv_pmp_control.sail
index 4f43a6c..1970afc 100644
--- a/model/riscv_pmp_control.sail
+++ b/model/riscv_pmp_control.sail
@@ -40,7 +40,7 @@ function pmpCheckRWX(ent, acc) = {
 val pmpCheckPerms: (Pmpcfg_ent, AccessType(ext_access_type), Privilege) -> bool
 function pmpCheckPerms(ent, acc, priv) = {
   match priv {
-    Machine => if   ent.L() == 0b1
+    Machine => if   pmpLocked(ent)
                then pmpCheckRWX(ent, acc)
                else true,
     _       => pmpCheckRWX(ent, acc)
diff --git a/model/riscv_pmp_regs.sail b/model/riscv_pmp_regs.sail
index 978ef18..a823a06 100644
--- a/model/riscv_pmp_regs.sail
+++ b/model/riscv_pmp_regs.sail
@@ -85,9 +85,15 @@ function pmpReadCfgReg(n) = {
        }
 }
 
-/* Helper to handle locked entries */
+/* Helpers to handle locked entries */
+function pmpLocked(cfg: Pmpcfg_ent) -> bool =
+   cfg.L() == 0b1
+
+function pmpTORLocked(cfg: Pmpcfg_ent) -> bool =
+   (cfg.L() == 0b1) & (pmpAddrMatchType_of_bits(cfg.A()) == TOR)
+
 function pmpWriteCfg(cfg: Pmpcfg_ent, v: bits(8)) -> Pmpcfg_ent =
-  if cfg.L() == 0b1 then cfg else Mk_Pmpcfg_ent(v)
+  if pmpLocked(cfg) then cfg else Mk_Pmpcfg_ent(v)
 
 val pmpWriteCfgReg : forall 'n, 0 <= 'n < 4 . (atom('n), xlenbits) -> unit effect {rreg, wreg}
 function pmpWriteCfgReg(n, v) = {
@@ -137,7 +143,7 @@ function pmpWriteCfgReg(n, v) = {
        }
 }
 
-function pmpWriteAddr(cfg: Pmpcfg_ent, reg: xlenbits, v: xlenbits) -> xlenbits =
+function pmpWriteAddr(locked: bool, tor_locked: bool, reg: xlenbits, v: xlenbits) -> xlenbits =
   if   sizeof(xlen) == 32
-  then { if cfg.L() == 0b1 then reg else v }
-  else { if cfg.L() == 0b1 then reg else EXTZ(v[53..0]) }
+  then { if (locked | tor_locked) then reg else v }
+  else { if (locked | tor_locked) then reg else EXTZ(v[53..0]) }
diff --git a/model/riscv_softfloat_interface.sail b/model/riscv_softfloat_interface.sail
new file mode 100644
index 0000000..1cc16a9
--- /dev/null
+++ b/model/riscv_softfloat_interface.sail
@@ -0,0 +1,260 @@
+/* **************************************************************** */
+/* This file lists all the external Berkeley softfloat functions    */
+/* invoked from the SAIL spec for RISC-V F and D extensions         */
+/* (in:    riscv_insts_fdext.sail)                                  */
+/*                                                                  */
+/* Each of these functions corresponds to one in 'SoftFloat.hs'     */
+/* in    https://github.com/GaloisInc/softfloat-hs.git              */
+/* written by Ben Selfridge,                                        */
+/* which is a set of pure-functional Haskell wrappers on the        */
+/* Berkely softfloat C library written by John Hauser.              */
+
+/* For now, the bodies of all these functions are placeholders      */
+/* while we develop    riscv_insts_fdext.sail                       */
+/* They should be replaced with external calls to Berkeley softfloat*/
+/* functions in a similar manner to the Haskell softfloat wrappers. */
+
+/* **************************************************************** */
+/* All arguments and results have one of these types                */
+
+type bits_rm     = bits(3)    /* Rounding mode */
+type bits_fflags = bits(5)    /* Accrued exceptions: NV,DZ,OF,UF,NX */
+type bits_S      = bits(32)   /* Single-precision float value */
+type bits_D      = bits(64)   /* Double-precision float value */
+
+type bits_W      = bits(32)   /* Signed integer */
+type bits_WU     = bits(32)   /* Unsigned integer */
+
+type bits_L      = bits(64)   /* Signed integer */
+type bits_LU     = bits(64)   /* Unsigned integer */
+
+/* ***************************************************************** */
+/* Internal registers to pass results across the softfloat interface
+ * to avoid return types involving structures.
+ */
+register float_result : bits(64)
+register float_fflags : bits(64)
+
+/* **************************************************************** */
+/* ADD/SUB/MUL/DIV                                                  */
+
+val     extern_f32Add = {c: "softfloat_f32add", ocaml: "Softfloat.f32_add", lem: "softfloat_f32_add"} : (bits_rm, bits_S, bits_S) -> unit
+val      riscv_f32Add : (bits_rm, bits_S, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32Add (rm, v1, v2) = {
+  extern_f32Add(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f32Sub = {c: "softfloat_f32sub", ocaml: "Softfloat.f32_sub", lem: "softfloat_f32_sub"} : (bits_rm, bits_S, bits_S) -> unit
+val      riscv_f32Sub : (bits_rm, bits_S, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32Sub (rm, v1, v2) = {
+  extern_f32Sub(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f32Mul = {c: "softfloat_f32mul", ocaml: "Softfloat.f32_mul", lem: "softfloat_f32_mul"} : (bits_rm, bits_S, bits_S) -> unit
+val      riscv_f32Mul : (bits_rm, bits_S, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32Mul (rm, v1, v2) = {
+  extern_f32Mul(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f32Div = {c: "softfloat_f32div", ocaml: "Softfloat.f32_div", lem: "softfloat_f32_div"} : (bits_rm, bits_S, bits_S) -> unit
+val      riscv_f32Div : (bits_rm, bits_S, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32Div (rm, v1, v2) = {
+  extern_f32Div(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f64Add = {c: "softfloat_f64add", ocaml: "Softfloat.f64_add", lem: "softfloat_f64_add"} : (bits_rm, bits_D, bits_D) -> unit
+val      riscv_f64Add : (bits_rm, bits_D, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64Add (rm, v1, v2) = {
+  extern_f64Add(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64Sub = {c: "softfloat_f64sub", ocaml: "Softfloat.f64_sub", lem: "softfloat_f64_sub"} : (bits_rm, bits_D, bits_D) -> unit
+val      riscv_f64Sub : (bits_rm, bits_D, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64Sub (rm, v1, v2) = {
+  extern_f64Sub(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64Mul = {c: "softfloat_f64mul", ocaml: "Softfloat.f64_mul", lem: "softfloat_f64_mul"} : (bits_rm, bits_D, bits_D) -> unit
+val      riscv_f64Mul : (bits_rm, bits_D, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64Mul (rm, v1, v2) = {
+  extern_f64Mul(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64Div = {c: "softfloat_f64div", ocaml: "Softfloat.f64_div", lem: "softfloat_f64_div"} : (bits_rm, bits_D, bits_D) -> unit
+val      riscv_f64Div : (bits_rm, bits_D, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64Div (rm, v1, v2) = {
+  extern_f64Div(rm, v1, v2);
+  (float_fflags[4 .. 0], float_result)
+}
+
+/* **************************************************************** */
+/* MULTIPLY-ADD                                                     */
+
+val     extern_f32MulAdd = {c: "softfloat_f32muladd", ocaml: "Softfloat.f32_muladd", lem: "softfloat_f32_muladd"} : (bits_rm, bits_S, bits_S, bits_S) -> unit
+val      riscv_f32MulAdd : (bits_rm, bits_S, bits_S, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32MulAdd (rm, v1, v2, v3) = {
+  extern_f32MulAdd(rm, v1, v2, v3);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f64MulAdd = {c: "softfloat_f64muladd", ocaml: "Softfloat.f64_muladd", lem: "softfloat_f64_muladd"} : (bits_rm, bits_D, bits_D, bits_D) -> unit
+val      riscv_f64MulAdd : (bits_rm, bits_D, bits_D, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64MulAdd (rm, v1, v2, v3) = {
+  extern_f64MulAdd(rm, v1, v2, v3);
+  (float_fflags[4 .. 0], float_result)
+}
+
+/* **************************************************************** */
+/* SQUARE ROOT                                                      */
+
+val     extern_f32Sqrt = {c: "softfloat_f32sqrt", ocaml: "Softfloat.f32_sqrt", lem: "softfloat_f32_sqrt"} : (bits_rm, bits_S) -> unit
+val      riscv_f32Sqrt : (bits_rm, bits_S) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f32Sqrt (rm, v) = {
+  extern_f32Sqrt(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f64Sqrt = {c: "softfloat_f64sqrt", ocaml: "Softfloat.f64_sqrt", lem: "softfloat_f64_sqrt"} : (bits_rm, bits_D) -> unit
+val      riscv_f64Sqrt : (bits_rm, bits_D) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f64Sqrt (rm, v) = {
+  extern_f64Sqrt(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+/* **************************************************************** */
+/* CONVERSIONS                                                      */
+
+val     extern_f32ToI32 = {c: "softfloat_f32toi32", ocaml: "Softfloat.f32_to_i32", lem: "softfloat_f32_to_i32"} : (bits_rm, bits_S) -> unit
+val      riscv_f32ToI32 : (bits_rm, bits_S) -> (bits_fflags, bits_W) effect {rreg}
+function riscv_f32ToI32 (rm, v) = {
+  extern_f32ToI32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f32ToUi32 = {c: "softfloat_f32toui32", ocaml: "Softfloat.f32_to_ui32", lem: "softfloat_f32_to_ui32"} : (bits_rm, bits_S) -> unit
+val      riscv_f32ToUi32 : (bits_rm, bits_S) -> (bits_fflags, bits_WU) effect {rreg}
+function riscv_f32ToUi32 (rm, v) = {
+  extern_f32ToUi32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_i32ToF32 = {c: "softfloat_i32tof32", ocaml: "Softfloat.i32_to_f32", lem: "softfloat_i32_to_f32"} : (bits_rm, bits_W) -> unit
+val      riscv_i32ToF32 : (bits_rm, bits_W) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_i32ToF32 (rm, v) = {
+  extern_i32ToF32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_ui32ToF32 = {c: "softfloat_ui32tof32", ocaml: "Softfloat.ui32_to_f32", lem: "softfloat_ui32_to_f32"} : (bits_rm, bits_WU) -> unit
+val      riscv_ui32ToF32 : (bits_rm, bits_WU) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_ui32ToF32 (rm, v) = {
+  extern_ui32ToF32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f32ToI64 = {c: "softfloat_f32toi64", ocaml: "Softfloat.f32_to_i64", lem: "softfloat_f32_to_i64"} : (bits_rm, bits_S) -> unit
+val      riscv_f32ToI64 : (bits_rm, bits_S) -> (bits_fflags, bits_L) effect {rreg}
+function riscv_f32ToI64 (rm, v) = {
+  extern_f32ToI64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f32ToUi64 = {c: "softfloat_f32toui64", ocaml: "Softfloat.f32_to_ui64", lem: "softfloat_f32_to_ui64"} : (bits_rm, bits_S) -> unit
+val      riscv_f32ToUi64 : (bits_rm, bits_S) -> (bits_fflags, bits_LU) effect {rreg}
+function riscv_f32ToUi64 (rm, v) = {
+  extern_f32ToUi64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_i64ToF32 = {c: "softfloat_i64tof32", ocaml: "Softfloat.i64_to_f32", lem: "softfloat_i64_to_f32"} : (bits_rm, bits_L) -> unit
+val      riscv_i64ToF32 : (bits_rm, bits_L) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_i64ToF32 (rm, v) = {
+  extern_i64ToF32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_ui64ToF32 = {c: "softfloat_ui64tof32", ocaml: "Softfloat.ui64_to_f32", lem: "softfloat_ui64_to_f32"} : (bits_rm, bits_L) -> unit
+val      riscv_ui64ToF32 : (bits_rm, bits_LU) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_ui64ToF32 (rm, v) = {
+  extern_ui64ToF32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f64ToI32 = {c: "softfloat_f64toi32", ocaml: "Softfloat.f64_to_i32", lem: "softfloat_f64_to_i32"} : (bits_rm, bits_D) -> unit
+val      riscv_f64ToI32 : (bits_rm, bits_D) -> (bits_fflags, bits_W) effect {rreg}
+function riscv_f64ToI32 (rm, v) = {
+  extern_f64ToI32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_f64ToUi32 = {c: "softfloat_f64toui32", ocaml: "Softfloat.f64_to_ui32", lem: "softfloat_f64_to_ui32"} : (bits_rm, bits_D) -> unit
+val      riscv_f64ToUi32 : (bits_rm, bits_D) -> (bits_fflags, bits_WU) effect {rreg}
+function riscv_f64ToUi32 (rm, v) = {
+  extern_f64ToUi32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+val     extern_i32ToF64 = {c: "softfloat_i32tof64", ocaml: "Softfloat.i32_to_f64", lem: "softfloat_i32_to_f64"} : (bits_rm, bits_W) -> unit
+val      riscv_i32ToF64 : (bits_rm, bits_W) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_i32ToF64 (rm, v) = {
+  extern_i32ToF64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_ui32ToF64 = {c: "softfloat_ui32tof64", ocaml: "Softfloat.ui32_to_f64", lem: "softfloat_ui32_to_f64"} : (bits_rm, bits_WU) -> unit
+val      riscv_ui32ToF64 : (bits_rm, bits_WU) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_ui32ToF64 (rm, v) = {
+  extern_ui32ToF64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64ToI64 = {c: "softfloat_f64toi64", ocaml: "Softfloat.f64_to_i64", lem: "softfloat_f64_to_i64"} : (bits_rm, bits_D) -> unit
+val      riscv_f64ToI64 : (bits_rm, bits_D) -> (bits_fflags, bits_L) effect {rreg}
+function riscv_f64ToI64 (rm, v) = {
+  extern_f64ToI64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64ToUi64 = {c: "softfloat_f64toui64", ocaml: "Softfloat.f64_to_ui64", lem: "softfloat_f64_to_ui64"} : (bits_rm, bits_D) -> unit
+val      riscv_f64ToUi64 : (bits_rm, bits_D) -> (bits_fflags, bits_LU) effect {rreg}
+function riscv_f64ToUi64 (rm, v) = {
+  extern_f64ToUi64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_i64ToF64 = {c: "softfloat_i64tof64", ocaml: "Softfloat.i64_to_f64", lem: "softfloat_i64_to_f64"} : (bits_rm, bits_L) -> unit
+val      riscv_i64ToF64 : (bits_rm, bits_L) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_i64ToF64 (rm, v) = {
+  extern_i64ToF64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_ui64ToF64 = {c: "softfloat_ui64tof64", ocaml: "Softfloat.ui64_to_f64", lem: "softfloat_ui64_to_f64"} : (bits_rm, bits_LU) -> unit
+val      riscv_ui64ToF64 : (bits_rm, bits_LU) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_ui64ToF64 (rm, v) = {
+  extern_ui64ToF64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f32ToF64 = {c: "softfloat_f32tof64", ocaml: "Softfloat.f32_to_f64", lem: "softfloat_f32_to_f64"} : (bits_rm, bits_S) -> unit
+val      riscv_f32ToF64 : (bits_rm, bits_S) -> (bits_fflags, bits_D) effect {rreg}
+function riscv_f32ToF64 (rm, v) = {
+  extern_f32ToF64(rm, v);
+  (float_fflags[4 .. 0], float_result)
+}
+
+val     extern_f64ToF32 = {c: "softfloat_f64tof32", ocaml: "Softfloat.f64_to_f32", lem: "softfloat_f64_to_f32"} : (bits_rm, bits_D) -> unit
+val      riscv_f64ToF32 : (bits_rm, bits_D) -> (bits_fflags, bits_S) effect {rreg}
+function riscv_f64ToF32 (rm, v) = {
+  extern_f64ToF32(rm, v);
+  (float_fflags[4 .. 0], float_result[31 .. 0])
+}
+
+/* **************************************************************** */
diff --git a/model/riscv_step_rvfi.sail b/model/riscv_step_rvfi.sail
index 0ab482a..dd24365 100644
--- a/model/riscv_step_rvfi.sail
+++ b/model/riscv_step_rvfi.sail
@@ -12,6 +12,7 @@ function ext_post_step_hook() -> unit = {
 val ext_init : unit -> unit effect {wreg}
 function ext_init() = {
   init_base_regs();
+  init_fdext_regs();
   /* these are here so that the C backend doesn't prune them out. */
   rvfi_set_instr_packet(0x0000000000000000);
   print_bits("", rvfi_get_cmd());
diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail
index 8162cb8..d906f5e 100644
--- a/model/riscv_sys_control.sail
+++ b/model/riscv_sys_control.sail
@@ -454,6 +454,14 @@ function init_sys() -> unit = {
   misa->U()   = 0b1;                            /* user-mode */
   misa->S()   = 0b1;                            /* supervisor-mode */
 
+  /* On RV64, we currently support either both F and D, or neither.
+   * On RV32, we currently only support F.
+   */
+  misa->F()   = bool_to_bits(sys_enable_fdext());      /* single-precision */
+  misa->D()   = if   sizeof(xlen) == 64
+                then bool_to_bits(sys_enable_fdext())  /* double-precision */
+                else 0b0;
+
   mstatus = set_mstatus_SXL(mstatus, misa.MXL());
   mstatus = set_mstatus_UXL(mstatus, misa.MXL());
   mstatus->SD()   = 0b0;
@@ -489,3 +497,15 @@ union MemoryOpResult ('a : Type) = {
   MemValue     : 'a,
   MemException : ExceptionType
 }
+
+val MemoryOpResult_add_meta : forall ('t : Type). (MemoryOpResult('t), mem_meta) -> MemoryOpResult(('t, mem_meta))
+function MemoryOpResult_add_meta(r, m) = match r {
+  MemValue(v)     => MemValue(v, m),
+  MemException(e) => MemException(e)
+}
+
+val MemoryOpResult_drop_meta : forall ('t : Type). MemoryOpResult(('t, mem_meta)) -> MemoryOpResult('t)
+function MemoryOpResult_drop_meta(r) = match r {
+  MemValue(v, m)  => MemValue(v),
+  MemException(e) => MemException(e)
+}
diff --git a/model/riscv_sys_exceptions.sail b/model/riscv_sys_exceptions.sail
index 94d869e..fa693e8 100644
--- a/model/riscv_sys_exceptions.sail
+++ b/model/riscv_sys_exceptions.sail
@@ -2,6 +2,11 @@
 
 type ext_exception = unit
 
+/* Is XRET from given mode permitted by extension? */
+function ext_check_xret_priv (p : Privilege) : Privilege -> bool = true
+/* Called if above check fails */
+function ext_fail_xret_priv () : unit -> unit = ()
+
 function handle_trap_extension(p : Privilege, pc : xlenbits, u : option(unit)) -> unit = ()
 
 /* used for traps and ECALL */
diff --git a/model/riscv_sys_regs.sail b/model/riscv_sys_regs.sail
index 722c1d5..3b808a6 100644
--- a/model/riscv_sys_regs.sail
+++ b/model/riscv_sys_regs.sail
@@ -74,6 +74,8 @@ register misa : Misa
 val sys_enable_writable_misa = {c: "sys_enable_writable_misa", ocaml: "Platform.enable_writable_misa", _: "sys_enable_writable_misa"} : unit -> bool
 /* whether misa.c was enabled at boot */
 val sys_enable_rvc = {c: "sys_enable_rvc", ocaml: "Platform.enable_rvc", _: "sys_enable_rvc"} : unit -> bool
+/* whether misa.{f,d} were enabled at boot */
+val sys_enable_fdext = {c: "sys_enable_fdext", ocaml: "Platform.enable_fdext", _: "sys_enable_fdext"} : unit -> bool
 
 /* This function allows an extension to veto a write to Misa
    if it would violate an alignment restriction on
@@ -101,6 +103,7 @@ function haveMulDiv()  -> bool = misa.M() == 0b1
 function haveSupMode() -> bool = misa.S() == 0b1
 function haveUsrMode() -> bool = misa.U() == 0b1
 function haveNExt()    -> bool = misa.N() == 0b1
+/* see below for F and D extension tests */
 
 bitfield Mstatus : xlenbits = {
   SD   : xlen - 1,
@@ -177,7 +180,6 @@ function legalize_mstatus(o : Mstatus, v : xlenbits) -> Mstatus = {
    * to support code running in S/U-modes.  Spike does this, and for now, we match it.
    * FIXME: This should be made a platform parameter.
    */
-  // let m = update_FS(m, extStatus_to_bits(Off));
 
   let dirty = extStatus_of_bits(m.FS()) == Dirty | extStatus_of_bits(m.XS()) == Dirty;
   let m = update_SD(m, bool_to_bits(dirty));
@@ -213,6 +215,10 @@ function in32BitMode() -> bool = {
   cur_Architecture() == RV32
 }
 
+/* F and D extensions have to enabled both via misa.{FD} as well as mstatus.FS */
+function haveFExt()    -> bool = (misa.F() == 0b1) & (mstatus.FS() != 0b00)
+function haveDExt()    -> bool = (misa.D() == 0b1) & (mstatus.FS() != 0b00)
+
 /* interrupt processing state */
 
 bitfield Minterrupts : xlenbits = {
diff --git a/model/riscv_termination_rv32.sail b/model/riscv_termination_rv32.sail
index 7cf8cb8..7318421 100644
--- a/model/riscv_termination_rv32.sail
+++ b/model/riscv_termination_rv32.sail
@@ -1 +1 @@
-termination_measure walk32(_,_,_,_,_,_,level,_) = level
+termination_measure walk32(_,_,_,_,_,_,level,_,_) = level
diff --git a/model/riscv_types.sail b/model/riscv_types.sail
index cacf0db..987743a 100644
--- a/model/riscv_types.sail
+++ b/model/riscv_types.sail
@@ -108,8 +108,6 @@ enum word_width = {BYTE, HALF, WORD, DOUBLE}
 
 /* architectural interrupt definitions */
 
-type exc_code = bits(8)
-
 enum InterruptType = {
   I_U_Software,
   I_S_Software,
@@ -181,7 +179,7 @@ function exceptionType_to_bits(e) =
     E_SAMO_Page_Fault()    => 0x0f,
 
     /* extensions */
-    E_Extension(e)         => 0x18    /* First code for a custom extension */
+    E_Extension(e)         => ext_exc_type_to_bits(e)
   }
 
 val num_of_ExceptionType : ExceptionType -> {'n, (0 <= 'n < xlen). int('n)}
@@ -205,7 +203,7 @@ function num_of_ExceptionType(e) =
     E_SAMO_Page_Fault()    => 15,
 
     /* extensions */
-    E_Extension(e)         => 24    /* First code for a custom extension */
+    E_Extension(e)         => num_of_ext_exc_type(e)
 
   }
 
@@ -230,7 +228,7 @@ function exceptionType_to_str(e) =
     E_SAMO_Page_Fault()    => "store/amo-page-fault",
 
     /* extensions */
-    E_Extension(e)         => "extension-exception"
+    E_Extension(e)         => ext_exc_type_to_str(e)
   }
 
 overload to_str = {exceptionType_to_str}
diff --git a/model/riscv_types_common.sail b/model/riscv_types_common.sail
new file mode 100644
index 0000000..9db34a0
--- /dev/null
+++ b/model/riscv_types_common.sail
@@ -0,0 +1 @@
+type exc_code = bits(8)
diff --git a/model/riscv_types_ext.sail b/model/riscv_types_ext.sail
index 5a05c39..6562981 100644
--- a/model/riscv_types_ext.sail
+++ b/model/riscv_types_ext.sail
@@ -20,3 +20,15 @@ type ext_exc_type = unit /* No exception extensions */
 /* Default translation of PTW errors into exception annotations */
 function ext_translate_exception(e : ext_ptw_error) -> ext_exc_type =
   e
+
+/* Default conversion of extension exceptions to bits */
+val ext_exc_type_to_bits : ext_exc_type -> exc_code
+function ext_exc_type_to_bits(e) = 0x18 /* First code for a custom extension */
+
+/* Default conversion of extension exceptions to integers */
+val num_of_ext_exc_type : ext_exc_type -> {'n, (0 <= 'n < xlen). int('n)}
+function num_of_ext_exc_type(e) = 24 /* First code for a custom extension */
+
+/* Default conversion of extension exceptions to strings */
+val ext_exc_type_to_str : ext_exc_type -> string
+function ext_exc_type_to_str(e) = "extension-exception"
diff --git a/model/riscv_vmem_rv32.sail b/model/riscv_vmem_rv32.sail
index 4ff7891..bea786c 100644
--- a/model/riscv_vmem_rv32.sail
+++ b/model/riscv_vmem_rv32.sail
@@ -26,7 +26,7 @@ function translationMode(priv) = {
 
 /* Top-level address translation dispatcher */
 
-val translateAddr : (xlenbits, AccessType(ext_access_type)) -> TR_Result(xlenbits, ExceptionType) effect {escape, rmem, rreg, wmv, wmvt, wreg}
+val translateAddr : (xlenbits, AccessType(ext_access_type)) -> TR_Result(xlenbits, ExceptionType) effect {escape, rmem, rmemt, rreg, wmv, wmvt, wreg}
 function translateAddr(vAddr, ac) = {
   let effPriv : Privilege = match ac {
     Execute() => cur_privilege,
diff --git a/model/riscv_vmem_rv64.sail b/model/riscv_vmem_rv64.sail
index c55e9dc..8b7dc44 100644
--- a/model/riscv_vmem_rv64.sail
+++ b/model/riscv_vmem_rv64.sail
@@ -33,7 +33,7 @@ function translationMode(priv) = {
 
 /* Top-level address translation dispatcher */
 
-val translateAddr : (xlenbits, AccessType(ext_access_type)) -> TR_Result(xlenbits, ExceptionType) effect {escape, rmem, rreg, wmv, wmvt, wreg}
+val translateAddr : (xlenbits, AccessType(ext_access_type)) -> TR_Result(xlenbits, ExceptionType) effect {escape, rmem, rmemt, rreg, wmv, wmvt, wreg}
 function translateAddr(vAddr, ac) = {
   let effPriv : Privilege = match ac {
     Execute() => cur_privilege,
diff --git a/model/riscv_vmem_sv32.sail b/model/riscv_vmem_sv32.sail
index e535915..1a27072 100644
--- a/model/riscv_vmem_sv32.sail
+++ b/model/riscv_vmem_sv32.sail
@@ -6,7 +6,7 @@
 
 function to_phys_addr(a : paddr32) -> xlenbits = a[31..0]
 
-val walk32 : (vaddr32, AccessType(ext_access_type), Privilege, bool, bool, paddr32, nat, bool, ext_ptw) -> PTW_Result(paddr32, SV32_PTE) effect {rmem, rreg, escape}
+val walk32 : (vaddr32, AccessType(ext_access_type), Privilege, bool, bool, paddr32, nat, bool, ext_ptw) -> PTW_Result(paddr32, SV32_PTE) effect {rmem, rmemt, rreg, escape}
 function walk32(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
   let va = Mk_SV32_Vaddr(vaddr);
   let pt_ofs : paddr32 = shiftl(EXTZ(shiftr(va.VPNi(), (level * SV32_LEVEL_BITS))[(SV32_LEVEL_BITS - 1) .. 0]),
@@ -37,13 +37,13 @@ function walk32(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
         PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
       } else {
         if isPTEPtr(pbits, ext_pte) then {
-          if level == 0 then {
+          if level > 0 then {
+            /* walk down the pointer to the next level */
+            walk32(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
+          } else {
             /* last-level PTE contains a pointer instead of a leaf */
 /*          print("walk32: last-level pte contains a ptr"); */
             PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
-          } else {
-            /* walk down the pointer to the next level */
-            walk32(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
           }
         } else { /* leaf PTE */
           match checkPTEPermission(ac, priv, mxr, do_sum, pattr, ext_pte, ext_ptw) {
@@ -115,7 +115,7 @@ function flush_TLB32(asid, addr) =
 
 /* address translation */
 
-val translate32 : (asid32, paddr32, vaddr32, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr32, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem}
+val translate32 : (asid32, paddr32, vaddr32, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr32, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem, rmemt}
 function translate32(asid, ptb, vAddr, ac, priv, mxr, do_sum, level, ext_ptw) = {
   match lookup_TLB32(asid, vAddr) {
     Some(idx, ent) => {
diff --git a/model/riscv_vmem_sv39.sail b/model/riscv_vmem_sv39.sail
index a1edc4e..37c98a2 100644
--- a/model/riscv_vmem_sv39.sail
+++ b/model/riscv_vmem_sv39.sail
@@ -1,6 +1,6 @@
 /* Sv39 address translation for RV64. */
 
-val walk39 : (vaddr39, AccessType(ext_access_type), Privilege, bool, bool, paddr64, nat, bool, ext_ptw) -> PTW_Result(paddr64, SV39_PTE) effect {rmem, rreg, escape}
+val walk39 : (vaddr39, AccessType(ext_access_type), Privilege, bool, bool, paddr64, nat, bool, ext_ptw) -> PTW_Result(paddr64, SV39_PTE) effect {rmem, rmemt, rreg, escape}
 function walk39(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
   let va = Mk_SV39_Vaddr(vaddr);
   let pt_ofs : paddr64 = shiftl(EXTZ(shiftr(va.VPNi(), (level * SV39_LEVEL_BITS))[(SV39_LEVEL_BITS - 1) .. 0]),
@@ -31,13 +31,13 @@ function walk39(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
         PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
       } else {
         if isPTEPtr(pbits, ext_pte) then {
-          if level == 0 then {
+          if level > 0 then {
+            /* walk down the pointer to the next level */
+            walk39(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
+          } else {
             /* last-level PTE contains a pointer instead of a leaf */
 /*          print("walk39: last-level pte contains a ptr"); */
             PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
-          } else {
-            /* walk down the pointer to the next level */
-            walk39(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
           }
         } else { /* leaf PTE */
           match checkPTEPermission(ac, priv, mxr, do_sum, pattr, ext_pte, ext_ptw) {
@@ -109,7 +109,7 @@ function flush_TLB39(asid, addr) =
 
 /* address translation */
 
-val translate39 : (asid64, paddr64, vaddr39, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr64, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem}
+val translate39 : (asid64, paddr64, vaddr39, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr64, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem, rmemt}
 function translate39(asid, ptb, vAddr, ac, priv, mxr, do_sum, level, ext_ptw) = {
   match lookup_TLB39(asid, vAddr) {
     Some(idx, ent) => {
diff --git a/model/riscv_vmem_sv48.sail b/model/riscv_vmem_sv48.sail
index 6bfeea4..36304cf 100644
--- a/model/riscv_vmem_sv48.sail
+++ b/model/riscv_vmem_sv48.sail
@@ -1,6 +1,6 @@
 /* Sv48 address translation for RV64. */
 
-val walk48 : (vaddr48, AccessType(ext_access_type), Privilege, bool, bool, paddr64, nat, bool, ext_ptw) -> PTW_Result(paddr64, SV48_PTE) effect {rmem, rreg, escape}
+val walk48 : (vaddr48, AccessType(ext_access_type), Privilege, bool, bool, paddr64, nat, bool, ext_ptw) -> PTW_Result(paddr64, SV48_PTE) effect {rmem, rmemt, rreg, escape}
 function walk48(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
   let va = Mk_SV48_Vaddr(vaddr);
   let pt_ofs : paddr64 = shiftl(EXTZ(shiftr(va.VPNi(), (level * SV48_LEVEL_BITS))[(SV48_LEVEL_BITS - 1) .. 0]),
@@ -31,13 +31,13 @@ function walk48(vaddr, ac, priv, mxr, do_sum, ptb, level, global, ext_ptw) = {
         PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
       } else {
         if isPTEPtr(pbits, ext_pte) then {
-          if level == 0 then {
+          if level > 0 then {
+            /* walk down the pointer to the next level */
+            walk48(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
+          } else {
             /* last-level PTE contains a pointer instead of a leaf */
 /*          print("walk48: last-level pte contains a ptr"); */
             PTW_Failure(PTW_Invalid_PTE(), ext_ptw)
-          } else {
-            /* walk down the pointer to the next level */
-            walk48(vaddr, ac, priv, mxr, do_sum, shiftl(EXTZ(pte.PPNi()), PAGESIZE_BITS), level - 1, is_global, ext_ptw)
           }
         } else { /* leaf PTE */
           match checkPTEPermission(ac, priv, mxr, do_sum, pattr, ext_pte, ext_ptw) {
@@ -109,7 +109,7 @@ function flush_TLB48(asid, addr) =
 
 /* address translation */
 
-val translate48 : (asid64, paddr64, vaddr48, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr64, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem}
+val translate48 : (asid64, paddr64, vaddr48, AccessType(ext_access_type), Privilege, bool, bool, nat, ext_ptw) -> TR_Result(paddr64, PTW_Error) effect {rreg, wreg, wmv, wmvt, escape, rmem, rmemt}
 function translate48(asid, ptb, vAddr, ac, priv, mxr, do_sum, level, ext_ptw) = {
   match walk48(vAddr, ac, priv, mxr, do_sum, ptb, level, false, ext_ptw) {
     PTW_Failure(f, ext_ptw) => TR_Failure(f, ext_ptw),
diff --git a/ocaml_emulator/platform.ml b/ocaml_emulator/platform.ml
index b2a19fe..9996268 100644
--- a/ocaml_emulator/platform.ml
+++ b/ocaml_emulator/platform.ml
@@ -75,6 +75,7 @@ let make_rom arch start_pc =
 
 let enable_writable_misa ()          = !config_enable_writable_misa
 let enable_rvc ()                    = !config_enable_rvc
+let enable_fdext ()                  = false
 let enable_dirty_update ()           = !config_enable_dirty_update
 let enable_misaligned_access ()      = !config_enable_misaligned_access
 let mtval_has_illegal_inst_bits ()   = !config_mtval_has_illegal_inst_bits
diff --git a/ocaml_emulator/softfloat.ml b/ocaml_emulator/softfloat.ml
new file mode 100644
index 0000000..ef84185
--- /dev/null
+++ b/ocaml_emulator/softfloat.ml
@@ -0,0 +1,91 @@
+
+let f32_add rm v1 v2 =
+  ()
+
+let f32_sub rm v1 v2 =
+  ()
+
+let f32_mul rm v1 v2 =
+  ()
+
+let f32_div rm v1 v2 =
+  ()
+
+let f64_add rm v1 v2 =
+  ()
+
+let f64_sub rm v1 v2 =
+  ()
+
+let f64_mul rm v1 v2 =
+  ()
+
+let f64_div rm v1 v2 =
+  ()
+
+let f32_muladd rm v1 v2 v3 =
+  ()
+
+let f64_muladd rm v1 v2 v3 =
+  ()
+
+let f32_sqrt rm v =
+  ()
+
+let f64_sqrt rm v =
+  ()
+
+let f32_to_i32 rm v =
+  ()
+
+let f32_to_ui32 rm v =
+  ()
+
+let i32_to_f32 rm v =
+  ()
+
+let ui32_to_f32 rm v =
+  ()
+
+let f32_to_i64 rm v =
+  ()
+
+let f32_to_ui64 rm v =
+  ()
+
+let i64_to_f32 rm v =
+  ()
+
+let ui64_to_f32 rm v =
+  ()
+
+let f64_to_i32 rm v =
+  ()
+
+let f64_to_ui32 rm v =
+  ()
+
+let i32_to_f64 rm v =
+  ()
+
+let ui32_to_f64 rm v =
+  ()
+
+let f64_to_i64 rm v =
+  ()
+
+let f64_to_ui64 rm v =
+  ()
+
+let i64_to_f64 rm v =
+  ()
+
+let ui64_to_f64 rm v =
+  ()
+
+let f32_to_f64 rm v =
+  ()
+
+let f64_to_f32 rm v =
+  ()
+
diff --git a/opam b/opam
index fb65f9a..9622fea 100644
--- a/opam
+++ b/opam
@@ -1,6 +1,6 @@
 opam-version: "1.2"
 name: "sail-riscv"
-version: "0.3"
+version: "0.4"
 maintainer: "Sail Devs <cl-sail-dev@lists.cam.ac.uk>"
 authors: [
   "Alasdair Armstrong"
diff --git a/test/riscv-tests/rv32ud-p-fadd.dump b/test/riscv-tests/rv32ud-p-fadd.dump
new file mode 100644
index 0000000..4c152c5
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fadd.dump
@@ -0,0 +1,478 @@
+
+rv32ud-p-fadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00053007          	fld	ft0,0(a0)
+80000118:	00853087          	fld	ft1,8(a0)
+8000011c:	01053107          	fld	ft2,16(a0)
+80000120:	01852683          	lw	a3,24(a0)
+80000124:	01c52303          	lw	t1,28(a0)
+80000128:	021071d3          	fadd.d	ft3,ft0,ft1
+8000012c:	00353027          	fsd	ft3,0(a0)
+80000130:	00452383          	lw	t2,4(a0)
+80000134:	00052503          	lw	a0,0(a0)
+80000138:	001015f3          	fsflags	a1,zero
+8000013c:	00000613          	li	a2,0
+80000140:	26d51a63          	bne	a0,a3,800003b4 <fail>
+80000144:	26731863          	bne	t1,t2,800003b4 <fail>
+80000148:	26c59663          	bne	a1,a2,800003b4 <fail>
+
+8000014c <test_3>:
+8000014c:	00300193          	li	gp,3
+80000150:	00002517          	auipc	a0,0x2
+80000154:	ed050513          	addi	a0,a0,-304 # 80002020 <test_3_data>
+80000158:	00053007          	fld	ft0,0(a0)
+8000015c:	00853087          	fld	ft1,8(a0)
+80000160:	01053107          	fld	ft2,16(a0)
+80000164:	01852683          	lw	a3,24(a0)
+80000168:	01c52303          	lw	t1,28(a0)
+8000016c:	021071d3          	fadd.d	ft3,ft0,ft1
+80000170:	00353027          	fsd	ft3,0(a0)
+80000174:	00452383          	lw	t2,4(a0)
+80000178:	00052503          	lw	a0,0(a0)
+8000017c:	001015f3          	fsflags	a1,zero
+80000180:	00100613          	li	a2,1
+80000184:	22d51863          	bne	a0,a3,800003b4 <fail>
+80000188:	22731663          	bne	t1,t2,800003b4 <fail>
+8000018c:	22c59463          	bne	a1,a2,800003b4 <fail>
+
+80000190 <test_4>:
+80000190:	00400193          	li	gp,4
+80000194:	00002517          	auipc	a0,0x2
+80000198:	eac50513          	addi	a0,a0,-340 # 80002040 <test_4_data>
+8000019c:	00053007          	fld	ft0,0(a0)
+800001a0:	00853087          	fld	ft1,8(a0)
+800001a4:	01053107          	fld	ft2,16(a0)
+800001a8:	01852683          	lw	a3,24(a0)
+800001ac:	01c52303          	lw	t1,28(a0)
+800001b0:	021071d3          	fadd.d	ft3,ft0,ft1
+800001b4:	00353027          	fsd	ft3,0(a0)
+800001b8:	00452383          	lw	t2,4(a0)
+800001bc:	00052503          	lw	a0,0(a0)
+800001c0:	001015f3          	fsflags	a1,zero
+800001c4:	00100613          	li	a2,1
+800001c8:	1ed51663          	bne	a0,a3,800003b4 <fail>
+800001cc:	1e731463          	bne	t1,t2,800003b4 <fail>
+800001d0:	1ec59263          	bne	a1,a2,800003b4 <fail>
+
+800001d4 <test_5>:
+800001d4:	00500193          	li	gp,5
+800001d8:	00002517          	auipc	a0,0x2
+800001dc:	e8850513          	addi	a0,a0,-376 # 80002060 <test_5_data>
+800001e0:	00053007          	fld	ft0,0(a0)
+800001e4:	00853087          	fld	ft1,8(a0)
+800001e8:	01053107          	fld	ft2,16(a0)
+800001ec:	01852683          	lw	a3,24(a0)
+800001f0:	01c52303          	lw	t1,28(a0)
+800001f4:	0a1071d3          	fsub.d	ft3,ft0,ft1
+800001f8:	00353027          	fsd	ft3,0(a0)
+800001fc:	00452383          	lw	t2,4(a0)
+80000200:	00052503          	lw	a0,0(a0)
+80000204:	001015f3          	fsflags	a1,zero
+80000208:	00000613          	li	a2,0
+8000020c:	1ad51463          	bne	a0,a3,800003b4 <fail>
+80000210:	1a731263          	bne	t1,t2,800003b4 <fail>
+80000214:	1ac59063          	bne	a1,a2,800003b4 <fail>
+
+80000218 <test_6>:
+80000218:	00600193          	li	gp,6
+8000021c:	00002517          	auipc	a0,0x2
+80000220:	e6450513          	addi	a0,a0,-412 # 80002080 <test_6_data>
+80000224:	00053007          	fld	ft0,0(a0)
+80000228:	00853087          	fld	ft1,8(a0)
+8000022c:	01053107          	fld	ft2,16(a0)
+80000230:	01852683          	lw	a3,24(a0)
+80000234:	01c52303          	lw	t1,28(a0)
+80000238:	0a1071d3          	fsub.d	ft3,ft0,ft1
+8000023c:	00353027          	fsd	ft3,0(a0)
+80000240:	00452383          	lw	t2,4(a0)
+80000244:	00052503          	lw	a0,0(a0)
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00100613          	li	a2,1
+80000250:	16d51263          	bne	a0,a3,800003b4 <fail>
+80000254:	16731063          	bne	t1,t2,800003b4 <fail>
+80000258:	14c59e63          	bne	a1,a2,800003b4 <fail>
+
+8000025c <test_7>:
+8000025c:	00700193          	li	gp,7
+80000260:	00002517          	auipc	a0,0x2
+80000264:	e4050513          	addi	a0,a0,-448 # 800020a0 <test_7_data>
+80000268:	00053007          	fld	ft0,0(a0)
+8000026c:	00853087          	fld	ft1,8(a0)
+80000270:	01053107          	fld	ft2,16(a0)
+80000274:	01852683          	lw	a3,24(a0)
+80000278:	01c52303          	lw	t1,28(a0)
+8000027c:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80000280:	00353027          	fsd	ft3,0(a0)
+80000284:	00452383          	lw	t2,4(a0)
+80000288:	00052503          	lw	a0,0(a0)
+8000028c:	001015f3          	fsflags	a1,zero
+80000290:	00100613          	li	a2,1
+80000294:	12d51063          	bne	a0,a3,800003b4 <fail>
+80000298:	10731e63          	bne	t1,t2,800003b4 <fail>
+8000029c:	10c59c63          	bne	a1,a2,800003b4 <fail>
+
+800002a0 <test_8>:
+800002a0:	00800193          	li	gp,8
+800002a4:	00002517          	auipc	a0,0x2
+800002a8:	e1c50513          	addi	a0,a0,-484 # 800020c0 <test_8_data>
+800002ac:	00053007          	fld	ft0,0(a0)
+800002b0:	00853087          	fld	ft1,8(a0)
+800002b4:	01053107          	fld	ft2,16(a0)
+800002b8:	01852683          	lw	a3,24(a0)
+800002bc:	01c52303          	lw	t1,28(a0)
+800002c0:	121071d3          	fmul.d	ft3,ft0,ft1
+800002c4:	00353027          	fsd	ft3,0(a0)
+800002c8:	00452383          	lw	t2,4(a0)
+800002cc:	00052503          	lw	a0,0(a0)
+800002d0:	001015f3          	fsflags	a1,zero
+800002d4:	00000613          	li	a2,0
+800002d8:	0cd51e63          	bne	a0,a3,800003b4 <fail>
+800002dc:	0c731c63          	bne	t1,t2,800003b4 <fail>
+800002e0:	0cc59a63          	bne	a1,a2,800003b4 <fail>
+
+800002e4 <test_9>:
+800002e4:	00900193          	li	gp,9
+800002e8:	00002517          	auipc	a0,0x2
+800002ec:	df850513          	addi	a0,a0,-520 # 800020e0 <test_9_data>
+800002f0:	00053007          	fld	ft0,0(a0)
+800002f4:	00853087          	fld	ft1,8(a0)
+800002f8:	01053107          	fld	ft2,16(a0)
+800002fc:	01852683          	lw	a3,24(a0)
+80000300:	01c52303          	lw	t1,28(a0)
+80000304:	121071d3          	fmul.d	ft3,ft0,ft1
+80000308:	00353027          	fsd	ft3,0(a0)
+8000030c:	00452383          	lw	t2,4(a0)
+80000310:	00052503          	lw	a0,0(a0)
+80000314:	001015f3          	fsflags	a1,zero
+80000318:	00100613          	li	a2,1
+8000031c:	08d51c63          	bne	a0,a3,800003b4 <fail>
+80000320:	08731a63          	bne	t1,t2,800003b4 <fail>
+80000324:	08c59863          	bne	a1,a2,800003b4 <fail>
+
+80000328 <test_10>:
+80000328:	00a00193          	li	gp,10
+8000032c:	00002517          	auipc	a0,0x2
+80000330:	dd450513          	addi	a0,a0,-556 # 80002100 <test_10_data>
+80000334:	00053007          	fld	ft0,0(a0)
+80000338:	00853087          	fld	ft1,8(a0)
+8000033c:	01053107          	fld	ft2,16(a0)
+80000340:	01852683          	lw	a3,24(a0)
+80000344:	01c52303          	lw	t1,28(a0)
+80000348:	121071d3          	fmul.d	ft3,ft0,ft1
+8000034c:	00353027          	fsd	ft3,0(a0)
+80000350:	00452383          	lw	t2,4(a0)
+80000354:	00052503          	lw	a0,0(a0)
+80000358:	001015f3          	fsflags	a1,zero
+8000035c:	00100613          	li	a2,1
+80000360:	04d51a63          	bne	a0,a3,800003b4 <fail>
+80000364:	04731863          	bne	t1,t2,800003b4 <fail>
+80000368:	04c59663          	bne	a1,a2,800003b4 <fail>
+
+8000036c <test_11>:
+8000036c:	00b00193          	li	gp,11
+80000370:	00002517          	auipc	a0,0x2
+80000374:	db050513          	addi	a0,a0,-592 # 80002120 <test_11_data>
+80000378:	00053007          	fld	ft0,0(a0)
+8000037c:	00853087          	fld	ft1,8(a0)
+80000380:	01053107          	fld	ft2,16(a0)
+80000384:	01852683          	lw	a3,24(a0)
+80000388:	01c52303          	lw	t1,28(a0)
+8000038c:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80000390:	00353027          	fsd	ft3,0(a0)
+80000394:	00452383          	lw	t2,4(a0)
+80000398:	00052503          	lw	a0,0(a0)
+8000039c:	001015f3          	fsflags	a1,zero
+800003a0:	01000613          	li	a2,16
+800003a4:	00d51863          	bne	a0,a3,800003b4 <fail>
+800003a8:	00731663          	bne	t1,t2,800003b4 <fail>
+800003ac:	00c59463          	bne	a1,a2,800003b4 <fail>
+800003b0:	00301c63          	bne	zero,gp,800003c8 <pass>
+
+800003b4 <fail>:
+800003b4:	0ff0000f          	fence
+800003b8:	00018063          	beqz	gp,800003b8 <fail+0x4>
+800003bc:	00119193          	slli	gp,gp,0x1
+800003c0:	0011e193          	ori	gp,gp,1
+800003c4:	00000073          	ecall
+
+800003c8 <pass>:
+800003c8:	0ff0000f          	fence
+800003cc:	00100193          	li	gp,1
+800003d0:	00000073          	ecall
+800003d4:	c0001073          	unimp
+800003d8:	0000                	unimp
+800003da:	0000                	unimp
+800003dc:	0000                	unimp
+800003de:	0000                	unimp
+800003e0:	0000                	unimp
+800003e2:	0000                	unimp
+800003e4:	0000                	unimp
+800003e6:	0000                	unimp
+800003e8:	0000                	unimp
+800003ea:	0000                	unimp
+800003ec:	0000                	unimp
+800003ee:	0000                	unimp
+800003f0:	0000                	unimp
+800003f2:	0000                	unimp
+800003f4:	0000                	unimp
+800003f6:	0000                	unimp
+800003f8:	0000                	unimp
+800003fa:	0000                	unimp
+800003fc:	0000                	unimp
+800003fe:	0000                	unimp
+80000400:	0000                	unimp
+80000402:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	0000                	unimp
+80002004:	0000                	unimp
+80002006:	4004                	lw	s1,0(s0)
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	3ff0                	fld	fa2,248(a5)
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	0000                	unimp
+8000201e:	400c                	lw	a1,0(s0)
+
+80002020 <test_3_data>:
+80002020:	6666                	flw	fa2,88(sp)
+80002022:	6666                	flw	fa2,88(sp)
+80002024:	4c66                	lw	s8,88(sp)
+80002026:	999ac093          	xori	ra,s5,-1639
+8000202a:	9999                	andi	a1,a1,-26
+8000202c:	9999                	andi	a1,a1,-26
+8000202e:	3ff1                	jal	8000200a <test_2_data+0xa>
+80002030:	0000                	unimp
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	4800                	lw	s0,16(s0)
+8000203e:	          	xori	ra,gp,-689
+
+80002040 <test_4_data>:
+80002040:	d4f1                	beqz	s1,8000200c <test_2_data+0xc>
+80002042:	53c8                	lw	a0,36(a5)
+80002044:	400921fb          	0x400921fb
+80002048:	8c3a                	mv	s8,a4
+8000204a:	e230                	fsw	fa2,64(a2)
+8000204c:	798e                	flw	fs3,224(sp)
+8000204e:	3e45                	jal	80001bfe <fromhost+0xbbe>
+80002050:	0000                	unimp
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	6ddf 5520 21fb      	0x21fb55206ddf
+8000205e:	4009                	c.li	zero,2
+
+80002060 <test_5_data>:
+80002060:	0000                	unimp
+80002062:	0000                	unimp
+80002064:	0000                	unimp
+80002066:	4004                	lw	s1,0(s0)
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	3ff0                	fld	fa2,248(a5)
+80002070:	0000                	unimp
+80002072:	0000                	unimp
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	0000                	unimp
+8000207e:	3ff8                	fld	fa4,248(a5)
+
+80002080 <test_6_data>:
+80002080:	6666                	flw	fa2,88(sp)
+80002082:	6666                	flw	fa2,88(sp)
+80002084:	4c66                	lw	s8,88(sp)
+80002086:	999ac093          	xori	ra,s5,-1639
+8000208a:	9999                	andi	a1,a1,-26
+8000208c:	9999                	andi	a1,a1,-26
+8000208e:	bff1                	j	8000206a <test_5_data+0xa>
+80002090:	0000                	unimp
+80002092:	0000                	unimp
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	4800                	lw	s0,16(s0)
+8000209e:	          	xori	ra,gp,-689
+
+800020a0 <test_7_data>:
+800020a0:	d4f1                	beqz	s1,8000206c <test_5_data+0xc>
+800020a2:	53c8                	lw	a0,36(a5)
+800020a4:	400921fb          	0x400921fb
+800020a8:	8c3a                	mv	s8,a4
+800020aa:	e230                	fsw	fa2,64(a2)
+800020ac:	798e                	flw	fs3,224(sp)
+800020ae:	3e45                	jal	80001c5e <fromhost+0xc1e>
+800020b0:	0000                	unimp
+800020b2:	0000                	unimp
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	52713c03          	0x52713c03
+800020bc:	400921fb          	0x400921fb
+
+800020c0 <test_8_data>:
+800020c0:	0000                	unimp
+800020c2:	0000                	unimp
+800020c4:	0000                	unimp
+800020c6:	4004                	lw	s1,0(s0)
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	3ff0                	fld	fa2,248(a5)
+800020d0:	0000                	unimp
+800020d2:	0000                	unimp
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	4004                	lw	s1,0(s0)
+
+800020e0 <test_9_data>:
+800020e0:	6666                	flw	fa2,88(sp)
+800020e2:	6666                	flw	fa2,88(sp)
+800020e4:	4c66                	lw	s8,88(sp)
+800020e6:	999ac093          	xori	ra,s5,-1639
+800020ea:	9999                	andi	a1,a1,-26
+800020ec:	9999                	andi	a1,a1,-26
+800020ee:	bff1                	j	800020ca <test_8_data+0xa>
+800020f0:	0000                	unimp
+800020f2:	0000                	unimp
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	0a3d                	addi	s4,s4,15
+800020fa:	3a70a3d7          	0x3a70a3d7
+800020fe:	4095                	li	ra,5
+
+80002100 <test_10_data>:
+80002100:	d4f1                	beqz	s1,800020cc <test_8_data+0xc>
+80002102:	53c8                	lw	a0,36(a5)
+80002104:	400921fb          	0x400921fb
+80002108:	8c3a                	mv	s8,a4
+8000210a:	e230                	fsw	fa2,64(a2)
+8000210c:	798e                	flw	fs3,224(sp)
+8000210e:	3e45                	jal	80001cbe <fromhost+0xc7e>
+80002110:	0000                	unimp
+80002112:	0000                	unimp
+80002114:	0000                	unimp
+80002116:	0000                	unimp
+80002118:	ff09                	bnez	a4,80002032 <test_3_data+0x12>
+8000211a:	a5c1                	j	800027da <_end+0x69a>
+8000211c:	ddc5                	beqz	a1,800020d4 <test_8_data+0x14>
+8000211e:	3e60                	fld	fs0,248(a2)
+
+80002120 <test_11_data>:
+80002120:	0000                	unimp
+80002122:	0000                	unimp
+80002124:	0000                	unimp
+80002126:	7ff0                	flw	fa2,124(a5)
+80002128:	0000                	unimp
+8000212a:	0000                	unimp
+8000212c:	0000                	unimp
+8000212e:	7ff0                	flw	fa2,124(a5)
+80002130:	0000                	unimp
+80002132:	0000                	unimp
+80002134:	0000                	unimp
+80002136:	0000                	unimp
+80002138:	0000                	unimp
+8000213a:	0000                	unimp
+8000213c:	0000                	unimp
+8000213e:	7ff8                	flw	fa4,124(a5)
diff --git a/test/riscv-tests/rv32ud-p-fadd.elf b/test/riscv-tests/rv32ud-p-fadd.elf
new file mode 100644
index 0000000..d183561
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fadd.elf
diff --git a/test/riscv-tests/rv32ud-p-fclass.dump b/test/riscv-tests/rv32ud-p-fclass.dump
new file mode 100644
index 0000000..c581415
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fclass.dump
@@ -0,0 +1,277 @@
+
+rv32ud-p-fclass:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00002517          	auipc	a0,0x2
+8000010c:	ef850513          	addi	a0,a0,-264 # 80002000 <test_2_data>
+80000110:	00053507          	fld	fa0,0(a0)
+80000114:	e2051553          	fclass.d	a0,fa0
+80000118:	00100e93          	li	t4,1
+8000011c:	00200193          	li	gp,2
+80000120:	11d51263          	bne	a0,t4,80000224 <fail>
+
+80000124 <test_3>:
+80000124:	00002517          	auipc	a0,0x2
+80000128:	ee450513          	addi	a0,a0,-284 # 80002008 <test_3_data>
+8000012c:	00053507          	fld	fa0,0(a0)
+80000130:	e2051553          	fclass.d	a0,fa0
+80000134:	00200e93          	li	t4,2
+80000138:	00300193          	li	gp,3
+8000013c:	0fd51463          	bne	a0,t4,80000224 <fail>
+
+80000140 <test_4>:
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_4_data>
+80000148:	00053507          	fld	fa0,0(a0)
+8000014c:	e2051553          	fclass.d	a0,fa0
+80000150:	00400e93          	li	t4,4
+80000154:	00400193          	li	gp,4
+80000158:	0dd51663          	bne	a0,t4,80000224 <fail>
+
+8000015c <test_5>:
+8000015c:	00002517          	auipc	a0,0x2
+80000160:	ebc50513          	addi	a0,a0,-324 # 80002018 <test_5_data>
+80000164:	00053507          	fld	fa0,0(a0)
+80000168:	e2051553          	fclass.d	a0,fa0
+8000016c:	00800e93          	li	t4,8
+80000170:	00500193          	li	gp,5
+80000174:	0bd51863          	bne	a0,t4,80000224 <fail>
+
+80000178 <test_6>:
+80000178:	00002517          	auipc	a0,0x2
+8000017c:	ea850513          	addi	a0,a0,-344 # 80002020 <test_6_data>
+80000180:	00053507          	fld	fa0,0(a0)
+80000184:	e2051553          	fclass.d	a0,fa0
+80000188:	01000e93          	li	t4,16
+8000018c:	00600193          	li	gp,6
+80000190:	09d51a63          	bne	a0,t4,80000224 <fail>
+
+80000194 <test_7>:
+80000194:	00002517          	auipc	a0,0x2
+80000198:	e9450513          	addi	a0,a0,-364 # 80002028 <test_7_data>
+8000019c:	00053507          	fld	fa0,0(a0)
+800001a0:	e2051553          	fclass.d	a0,fa0
+800001a4:	02000e93          	li	t4,32
+800001a8:	00700193          	li	gp,7
+800001ac:	07d51c63          	bne	a0,t4,80000224 <fail>
+
+800001b0 <test_8>:
+800001b0:	00002517          	auipc	a0,0x2
+800001b4:	e8050513          	addi	a0,a0,-384 # 80002030 <test_8_data>
+800001b8:	00053507          	fld	fa0,0(a0)
+800001bc:	e2051553          	fclass.d	a0,fa0
+800001c0:	04000e93          	li	t4,64
+800001c4:	00800193          	li	gp,8
+800001c8:	05d51e63          	bne	a0,t4,80000224 <fail>
+
+800001cc <test_9>:
+800001cc:	00002517          	auipc	a0,0x2
+800001d0:	e6c50513          	addi	a0,a0,-404 # 80002038 <test_9_data>
+800001d4:	00053507          	fld	fa0,0(a0)
+800001d8:	e2051553          	fclass.d	a0,fa0
+800001dc:	08000e93          	li	t4,128
+800001e0:	00900193          	li	gp,9
+800001e4:	05d51063          	bne	a0,t4,80000224 <fail>
+
+800001e8 <test_10>:
+800001e8:	00002517          	auipc	a0,0x2
+800001ec:	e5850513          	addi	a0,a0,-424 # 80002040 <test_10_data>
+800001f0:	00053507          	fld	fa0,0(a0)
+800001f4:	e2051553          	fclass.d	a0,fa0
+800001f8:	10000e93          	li	t4,256
+800001fc:	00a00193          	li	gp,10
+80000200:	03d51263          	bne	a0,t4,80000224 <fail>
+
+80000204 <test_11>:
+80000204:	00002517          	auipc	a0,0x2
+80000208:	e4450513          	addi	a0,a0,-444 # 80002048 <test_11_data>
+8000020c:	00053507          	fld	fa0,0(a0)
+80000210:	e2051553          	fclass.d	a0,fa0
+80000214:	20000e93          	li	t4,512
+80000218:	00b00193          	li	gp,11
+8000021c:	01d51463          	bne	a0,t4,80000224 <fail>
+80000220:	00301c63          	bne	zero,gp,80000238 <pass>
+
+80000224 <fail>:
+80000224:	0ff0000f          	fence
+80000228:	00018063          	beqz	gp,80000228 <fail+0x4>
+8000022c:	00119193          	slli	gp,gp,0x1
+80000230:	0011e193          	ori	gp,gp,1
+80000234:	00000073          	ecall
+
+80000238 <pass>:
+80000238:	0ff0000f          	fence
+8000023c:	00100193          	li	gp,1
+80000240:	00000073          	ecall
+80000244:	c0001073          	unimp
+80000248:	0000                	unimp
+8000024a:	0000                	unimp
+8000024c:	0000                	unimp
+8000024e:	0000                	unimp
+80000250:	0000                	unimp
+80000252:	0000                	unimp
+80000254:	0000                	unimp
+80000256:	0000                	unimp
+80000258:	0000                	unimp
+8000025a:	0000                	unimp
+8000025c:	0000                	unimp
+8000025e:	0000                	unimp
+80000260:	0000                	unimp
+80000262:	0000                	unimp
+80000264:	0000                	unimp
+80000266:	0000                	unimp
+80000268:	0000                	unimp
+8000026a:	0000                	unimp
+8000026c:	0000                	unimp
+8000026e:	0000                	unimp
+80000270:	0000                	unimp
+80000272:	0000                	unimp
+80000274:	0000                	unimp
+80000276:	0000                	unimp
+80000278:	0000                	unimp
+8000027a:	0000                	unimp
+8000027c:	0000                	unimp
+8000027e:	0000                	unimp
+80000280:	0000                	unimp
+80000282:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	0000                	unimp
+80002004:	0000                	unimp
+80002006:	fff0                	fsw	fa2,124(a5)
+
+80002008 <test_3_data>:
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	bff0                	fsd	fa2,248(a5)
+
+80002010 <test_4_data>:
+80002010:	ffff                	0xffff
+80002012:	ffff                	0xffff
+80002014:	ffff                	0xffff
+80002016:	          	0x800f
+
+80002018 <test_5_data>:
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	0000                	unimp
+8000201e:	8000                	0x8000
+
+80002020 <test_6_data>:
+80002020:	0000                	unimp
+80002022:	0000                	unimp
+80002024:	0000                	unimp
+80002026:	0000                	unimp
+
+80002028 <test_7_data>:
+80002028:	ffff                	0xffff
+8000202a:	ffff                	0xffff
+8000202c:	ffff                	0xffff
+8000202e:	          	fence	unknown,unknown
+
+80002030 <test_8_data>:
+80002030:	0000                	unimp
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	3ff0                	fld	fa2,248(a5)
+
+80002038 <test_9_data>:
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	7ff0                	flw	fa2,124(a5)
+
+80002040 <test_10_data>:
+80002040:	0001                	nop
+80002042:	0000                	unimp
+80002044:	0000                	unimp
+80002046:	7ff0                	flw	fa2,124(a5)
+
+80002048 <test_11_data>:
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0000                	unimp
+8000204e:	7ff8                	flw	fa4,124(a5)
diff --git a/test/riscv-tests/rv32ud-p-fclass.elf b/test/riscv-tests/rv32ud-p-fclass.elf
new file mode 100644
index 0000000..7e67e8b
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fclass.elf
diff --git a/test/riscv-tests/rv32ud-p-fcmp.dump b/test/riscv-tests/rv32ud-p-fcmp.dump
new file mode 100644
index 0000000..e0b297e
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcmp.dump
@@ -0,0 +1,612 @@
+
+rv32ud-p-fcmp:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00053007          	fld	ft0,0(a0)
+80000118:	00853087          	fld	ft1,8(a0)
+8000011c:	01053107          	fld	ft2,16(a0)
+80000120:	01852683          	lw	a3,24(a0)
+80000124:	01c52303          	lw	t1,28(a0)
+80000128:	a2102553          	feq.d	a0,ft0,ft1
+8000012c:	00000393          	li	t2,0
+80000130:	001015f3          	fsflags	a1,zero
+80000134:	00000613          	li	a2,0
+80000138:	34d51c63          	bne	a0,a3,80000490 <fail>
+8000013c:	34731a63          	bne	t1,t2,80000490 <fail>
+80000140:	34c59863          	bne	a1,a2,80000490 <fail>
+
+80000144 <test_3>:
+80000144:	00300193          	li	gp,3
+80000148:	00002517          	auipc	a0,0x2
+8000014c:	ed850513          	addi	a0,a0,-296 # 80002020 <test_3_data>
+80000150:	00053007          	fld	ft0,0(a0)
+80000154:	00853087          	fld	ft1,8(a0)
+80000158:	01053107          	fld	ft2,16(a0)
+8000015c:	01852683          	lw	a3,24(a0)
+80000160:	01c52303          	lw	t1,28(a0)
+80000164:	a2100553          	fle.d	a0,ft0,ft1
+80000168:	00000393          	li	t2,0
+8000016c:	001015f3          	fsflags	a1,zero
+80000170:	00000613          	li	a2,0
+80000174:	30d51e63          	bne	a0,a3,80000490 <fail>
+80000178:	30731c63          	bne	t1,t2,80000490 <fail>
+8000017c:	30c59a63          	bne	a1,a2,80000490 <fail>
+
+80000180 <test_4>:
+80000180:	00400193          	li	gp,4
+80000184:	00002517          	auipc	a0,0x2
+80000188:	ebc50513          	addi	a0,a0,-324 # 80002040 <test_4_data>
+8000018c:	00053007          	fld	ft0,0(a0)
+80000190:	00853087          	fld	ft1,8(a0)
+80000194:	01053107          	fld	ft2,16(a0)
+80000198:	01852683          	lw	a3,24(a0)
+8000019c:	01c52303          	lw	t1,28(a0)
+800001a0:	a2101553          	flt.d	a0,ft0,ft1
+800001a4:	00000393          	li	t2,0
+800001a8:	001015f3          	fsflags	a1,zero
+800001ac:	00000613          	li	a2,0
+800001b0:	2ed51063          	bne	a0,a3,80000490 <fail>
+800001b4:	2c731e63          	bne	t1,t2,80000490 <fail>
+800001b8:	2cc59c63          	bne	a1,a2,80000490 <fail>
+
+800001bc <test_5>:
+800001bc:	00500193          	li	gp,5
+800001c0:	00002517          	auipc	a0,0x2
+800001c4:	ea050513          	addi	a0,a0,-352 # 80002060 <test_5_data>
+800001c8:	00053007          	fld	ft0,0(a0)
+800001cc:	00853087          	fld	ft1,8(a0)
+800001d0:	01053107          	fld	ft2,16(a0)
+800001d4:	01852683          	lw	a3,24(a0)
+800001d8:	01c52303          	lw	t1,28(a0)
+800001dc:	a2102553          	feq.d	a0,ft0,ft1
+800001e0:	00000393          	li	t2,0
+800001e4:	001015f3          	fsflags	a1,zero
+800001e8:	00000613          	li	a2,0
+800001ec:	2ad51263          	bne	a0,a3,80000490 <fail>
+800001f0:	2a731063          	bne	t1,t2,80000490 <fail>
+800001f4:	28c59e63          	bne	a1,a2,80000490 <fail>
+
+800001f8 <test_6>:
+800001f8:	00600193          	li	gp,6
+800001fc:	00002517          	auipc	a0,0x2
+80000200:	e8450513          	addi	a0,a0,-380 # 80002080 <test_6_data>
+80000204:	00053007          	fld	ft0,0(a0)
+80000208:	00853087          	fld	ft1,8(a0)
+8000020c:	01053107          	fld	ft2,16(a0)
+80000210:	01852683          	lw	a3,24(a0)
+80000214:	01c52303          	lw	t1,28(a0)
+80000218:	a2100553          	fle.d	a0,ft0,ft1
+8000021c:	00000393          	li	t2,0
+80000220:	001015f3          	fsflags	a1,zero
+80000224:	00000613          	li	a2,0
+80000228:	26d51463          	bne	a0,a3,80000490 <fail>
+8000022c:	26731263          	bne	t1,t2,80000490 <fail>
+80000230:	26c59063          	bne	a1,a2,80000490 <fail>
+
+80000234 <test_7>:
+80000234:	00700193          	li	gp,7
+80000238:	00002517          	auipc	a0,0x2
+8000023c:	e6850513          	addi	a0,a0,-408 # 800020a0 <test_7_data>
+80000240:	00053007          	fld	ft0,0(a0)
+80000244:	00853087          	fld	ft1,8(a0)
+80000248:	01053107          	fld	ft2,16(a0)
+8000024c:	01852683          	lw	a3,24(a0)
+80000250:	01c52303          	lw	t1,28(a0)
+80000254:	a2101553          	flt.d	a0,ft0,ft1
+80000258:	00000393          	li	t2,0
+8000025c:	001015f3          	fsflags	a1,zero
+80000260:	00000613          	li	a2,0
+80000264:	22d51663          	bne	a0,a3,80000490 <fail>
+80000268:	22731463          	bne	t1,t2,80000490 <fail>
+8000026c:	22c59263          	bne	a1,a2,80000490 <fail>
+
+80000270 <test_8>:
+80000270:	00800193          	li	gp,8
+80000274:	00002517          	auipc	a0,0x2
+80000278:	e4c50513          	addi	a0,a0,-436 # 800020c0 <test_8_data>
+8000027c:	00053007          	fld	ft0,0(a0)
+80000280:	00853087          	fld	ft1,8(a0)
+80000284:	01053107          	fld	ft2,16(a0)
+80000288:	01852683          	lw	a3,24(a0)
+8000028c:	01c52303          	lw	t1,28(a0)
+80000290:	a2102553          	feq.d	a0,ft0,ft1
+80000294:	00000393          	li	t2,0
+80000298:	001015f3          	fsflags	a1,zero
+8000029c:	00000613          	li	a2,0
+800002a0:	1ed51863          	bne	a0,a3,80000490 <fail>
+800002a4:	1e731663          	bne	t1,t2,80000490 <fail>
+800002a8:	1ec59463          	bne	a1,a2,80000490 <fail>
+
+800002ac <test_9>:
+800002ac:	00900193          	li	gp,9
+800002b0:	00002517          	auipc	a0,0x2
+800002b4:	e3050513          	addi	a0,a0,-464 # 800020e0 <test_9_data>
+800002b8:	00053007          	fld	ft0,0(a0)
+800002bc:	00853087          	fld	ft1,8(a0)
+800002c0:	01053107          	fld	ft2,16(a0)
+800002c4:	01852683          	lw	a3,24(a0)
+800002c8:	01c52303          	lw	t1,28(a0)
+800002cc:	a2102553          	feq.d	a0,ft0,ft1
+800002d0:	00000393          	li	t2,0
+800002d4:	001015f3          	fsflags	a1,zero
+800002d8:	00000613          	li	a2,0
+800002dc:	1ad51a63          	bne	a0,a3,80000490 <fail>
+800002e0:	1a731863          	bne	t1,t2,80000490 <fail>
+800002e4:	1ac59663          	bne	a1,a2,80000490 <fail>
+
+800002e8 <test_10>:
+800002e8:	00a00193          	li	gp,10
+800002ec:	00002517          	auipc	a0,0x2
+800002f0:	e1450513          	addi	a0,a0,-492 # 80002100 <test_10_data>
+800002f4:	00053007          	fld	ft0,0(a0)
+800002f8:	00853087          	fld	ft1,8(a0)
+800002fc:	01053107          	fld	ft2,16(a0)
+80000300:	01852683          	lw	a3,24(a0)
+80000304:	01c52303          	lw	t1,28(a0)
+80000308:	a2102553          	feq.d	a0,ft0,ft1
+8000030c:	00000393          	li	t2,0
+80000310:	001015f3          	fsflags	a1,zero
+80000314:	01000613          	li	a2,16
+80000318:	16d51c63          	bne	a0,a3,80000490 <fail>
+8000031c:	16731a63          	bne	t1,t2,80000490 <fail>
+80000320:	16c59863          	bne	a1,a2,80000490 <fail>
+
+80000324 <test_11>:
+80000324:	00b00193          	li	gp,11
+80000328:	00002517          	auipc	a0,0x2
+8000032c:	df850513          	addi	a0,a0,-520 # 80002120 <test_11_data>
+80000330:	00053007          	fld	ft0,0(a0)
+80000334:	00853087          	fld	ft1,8(a0)
+80000338:	01053107          	fld	ft2,16(a0)
+8000033c:	01852683          	lw	a3,24(a0)
+80000340:	01c52303          	lw	t1,28(a0)
+80000344:	a2101553          	flt.d	a0,ft0,ft1
+80000348:	00000393          	li	t2,0
+8000034c:	001015f3          	fsflags	a1,zero
+80000350:	01000613          	li	a2,16
+80000354:	12d51e63          	bne	a0,a3,80000490 <fail>
+80000358:	12731c63          	bne	t1,t2,80000490 <fail>
+8000035c:	12c59a63          	bne	a1,a2,80000490 <fail>
+
+80000360 <test_12>:
+80000360:	00c00193          	li	gp,12
+80000364:	00002517          	auipc	a0,0x2
+80000368:	ddc50513          	addi	a0,a0,-548 # 80002140 <test_12_data>
+8000036c:	00053007          	fld	ft0,0(a0)
+80000370:	00853087          	fld	ft1,8(a0)
+80000374:	01053107          	fld	ft2,16(a0)
+80000378:	01852683          	lw	a3,24(a0)
+8000037c:	01c52303          	lw	t1,28(a0)
+80000380:	a2101553          	flt.d	a0,ft0,ft1
+80000384:	00000393          	li	t2,0
+80000388:	001015f3          	fsflags	a1,zero
+8000038c:	01000613          	li	a2,16
+80000390:	10d51063          	bne	a0,a3,80000490 <fail>
+80000394:	0e731e63          	bne	t1,t2,80000490 <fail>
+80000398:	0ec59c63          	bne	a1,a2,80000490 <fail>
+
+8000039c <test_13>:
+8000039c:	00d00193          	li	gp,13
+800003a0:	00002517          	auipc	a0,0x2
+800003a4:	dc050513          	addi	a0,a0,-576 # 80002160 <test_13_data>
+800003a8:	00053007          	fld	ft0,0(a0)
+800003ac:	00853087          	fld	ft1,8(a0)
+800003b0:	01053107          	fld	ft2,16(a0)
+800003b4:	01852683          	lw	a3,24(a0)
+800003b8:	01c52303          	lw	t1,28(a0)
+800003bc:	a2101553          	flt.d	a0,ft0,ft1
+800003c0:	00000393          	li	t2,0
+800003c4:	001015f3          	fsflags	a1,zero
+800003c8:	01000613          	li	a2,16
+800003cc:	0cd51263          	bne	a0,a3,80000490 <fail>
+800003d0:	0c731063          	bne	t1,t2,80000490 <fail>
+800003d4:	0ac59e63          	bne	a1,a2,80000490 <fail>
+
+800003d8 <test_14>:
+800003d8:	00e00193          	li	gp,14
+800003dc:	00002517          	auipc	a0,0x2
+800003e0:	da450513          	addi	a0,a0,-604 # 80002180 <test_14_data>
+800003e4:	00053007          	fld	ft0,0(a0)
+800003e8:	00853087          	fld	ft1,8(a0)
+800003ec:	01053107          	fld	ft2,16(a0)
+800003f0:	01852683          	lw	a3,24(a0)
+800003f4:	01c52303          	lw	t1,28(a0)
+800003f8:	a2100553          	fle.d	a0,ft0,ft1
+800003fc:	00000393          	li	t2,0
+80000400:	001015f3          	fsflags	a1,zero
+80000404:	01000613          	li	a2,16
+80000408:	08d51463          	bne	a0,a3,80000490 <fail>
+8000040c:	08731263          	bne	t1,t2,80000490 <fail>
+80000410:	08c59063          	bne	a1,a2,80000490 <fail>
+
+80000414 <test_15>:
+80000414:	00f00193          	li	gp,15
+80000418:	00002517          	auipc	a0,0x2
+8000041c:	d8850513          	addi	a0,a0,-632 # 800021a0 <test_15_data>
+80000420:	00053007          	fld	ft0,0(a0)
+80000424:	00853087          	fld	ft1,8(a0)
+80000428:	01053107          	fld	ft2,16(a0)
+8000042c:	01852683          	lw	a3,24(a0)
+80000430:	01c52303          	lw	t1,28(a0)
+80000434:	a2100553          	fle.d	a0,ft0,ft1
+80000438:	00000393          	li	t2,0
+8000043c:	001015f3          	fsflags	a1,zero
+80000440:	01000613          	li	a2,16
+80000444:	04d51663          	bne	a0,a3,80000490 <fail>
+80000448:	04731463          	bne	t1,t2,80000490 <fail>
+8000044c:	04c59263          	bne	a1,a2,80000490 <fail>
+
+80000450 <test_16>:
+80000450:	01000193          	li	gp,16
+80000454:	00002517          	auipc	a0,0x2
+80000458:	d6c50513          	addi	a0,a0,-660 # 800021c0 <test_16_data>
+8000045c:	00053007          	fld	ft0,0(a0)
+80000460:	00853087          	fld	ft1,8(a0)
+80000464:	01053107          	fld	ft2,16(a0)
+80000468:	01852683          	lw	a3,24(a0)
+8000046c:	01c52303          	lw	t1,28(a0)
+80000470:	a2100553          	fle.d	a0,ft0,ft1
+80000474:	00000393          	li	t2,0
+80000478:	001015f3          	fsflags	a1,zero
+8000047c:	01000613          	li	a2,16
+80000480:	00d51863          	bne	a0,a3,80000490 <fail>
+80000484:	00731663          	bne	t1,t2,80000490 <fail>
+80000488:	00c59463          	bne	a1,a2,80000490 <fail>
+8000048c:	00301c63          	bne	zero,gp,800004a4 <pass>
+
+80000490 <fail>:
+80000490:	0ff0000f          	fence
+80000494:	00018063          	beqz	gp,80000494 <fail+0x4>
+80000498:	00119193          	slli	gp,gp,0x1
+8000049c:	0011e193          	ori	gp,gp,1
+800004a0:	00000073          	ecall
+
+800004a4 <pass>:
+800004a4:	0ff0000f          	fence
+800004a8:	00100193          	li	gp,1
+800004ac:	00000073          	ecall
+800004b0:	c0001073          	unimp
+800004b4:	0000                	unimp
+800004b6:	0000                	unimp
+800004b8:	0000                	unimp
+800004ba:	0000                	unimp
+800004bc:	0000                	unimp
+800004be:	0000                	unimp
+800004c0:	0000                	unimp
+800004c2:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	5c28f5c3          	0x5c28f5c3
+80002004:	bff5c28f          	0xbff5c28f
+80002008:	5c28f5c3          	0x5c28f5c3
+8000200c:	bff5c28f          	0xbff5c28f
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	0001                	nop
+8000201a:	0000                	unimp
+8000201c:	0000                	unimp
+8000201e:	0000                	unimp
+
+80002020 <test_3_data>:
+80002020:	5c28f5c3          	0x5c28f5c3
+80002024:	bff5c28f          	0xbff5c28f
+80002028:	5c28f5c3          	0x5c28f5c3
+8000202c:	bff5c28f          	0xbff5c28f
+80002030:	0000                	unimp
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0001                	nop
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	0000                	unimp
+
+80002040 <test_4_data>:
+80002040:	5c28f5c3          	0x5c28f5c3
+80002044:	bff5c28f          	0xbff5c28f
+80002048:	5c28f5c3          	0x5c28f5c3
+8000204c:	bff5c28f          	0xbff5c28f
+80002050:	0000                	unimp
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0000                	unimp
+8000205e:	0000                	unimp
+
+80002060 <test_5_data>:
+80002060:	51ec                	lw	a1,100(a1)
+80002062:	1eb8                	addi	a4,sp,888
+80002064:	eb85                	bnez	a5,80002094 <test_6_data+0x14>
+80002066:	bff5                	j	80002062 <test_5_data+0x2>
+80002068:	5c28f5c3          	0x5c28f5c3
+8000206c:	bff5c28f          	0xbff5c28f
+80002070:	0000                	unimp
+80002072:	0000                	unimp
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	0000                	unimp
+8000207e:	0000                	unimp
+
+80002080 <test_6_data>:
+80002080:	51ec                	lw	a1,100(a1)
+80002082:	1eb8                	addi	a4,sp,888
+80002084:	eb85                	bnez	a5,800020b4 <test_7_data+0x14>
+80002086:	bff5                	j	80002082 <test_6_data+0x2>
+80002088:	5c28f5c3          	0x5c28f5c3
+8000208c:	bff5c28f          	0xbff5c28f
+80002090:	0000                	unimp
+80002092:	0000                	unimp
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0001                	nop
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	0000                	unimp
+
+800020a0 <test_7_data>:
+800020a0:	51ec                	lw	a1,100(a1)
+800020a2:	1eb8                	addi	a4,sp,888
+800020a4:	eb85                	bnez	a5,800020d4 <test_8_data+0x14>
+800020a6:	bff5                	j	800020a2 <test_7_data+0x2>
+800020a8:	5c28f5c3          	0x5c28f5c3
+800020ac:	bff5c28f          	0xbff5c28f
+800020b0:	0000                	unimp
+800020b2:	0000                	unimp
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0001                	nop
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	0000                	unimp
+
+800020c0 <test_8_data>:
+800020c0:	ffff                	0xffff
+800020c2:	ffff                	0xffff
+800020c4:	ffff                	0xffff
+800020c6:	7fff                	0x7fff
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	0000                	unimp
+800020d0:	0000                	unimp
+800020d2:	0000                	unimp
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	0000                	unimp
+
+800020e0 <test_9_data>:
+800020e0:	ffff                	0xffff
+800020e2:	ffff                	0xffff
+800020e4:	ffff                	0xffff
+800020e6:	7fff                	0x7fff
+800020e8:	ffff                	0xffff
+800020ea:	ffff                	0xffff
+800020ec:	ffff                	0xffff
+800020ee:	7fff                	0x7fff
+800020f0:	0000                	unimp
+800020f2:	0000                	unimp
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	0000                	unimp
+800020fa:	0000                	unimp
+800020fc:	0000                	unimp
+800020fe:	0000                	unimp
+
+80002100 <test_10_data>:
+80002100:	0001                	nop
+80002102:	0000                	unimp
+80002104:	0000                	unimp
+80002106:	7ff0                	flw	fa2,124(a5)
+80002108:	0000                	unimp
+8000210a:	0000                	unimp
+8000210c:	0000                	unimp
+8000210e:	0000                	unimp
+80002110:	0000                	unimp
+80002112:	0000                	unimp
+80002114:	0000                	unimp
+80002116:	0000                	unimp
+80002118:	0000                	unimp
+8000211a:	0000                	unimp
+8000211c:	0000                	unimp
+8000211e:	0000                	unimp
+
+80002120 <test_11_data>:
+80002120:	ffff                	0xffff
+80002122:	ffff                	0xffff
+80002124:	ffff                	0xffff
+80002126:	7fff                	0x7fff
+80002128:	0000                	unimp
+8000212a:	0000                	unimp
+8000212c:	0000                	unimp
+8000212e:	0000                	unimp
+80002130:	0000                	unimp
+80002132:	0000                	unimp
+80002134:	0000                	unimp
+80002136:	0000                	unimp
+80002138:	0000                	unimp
+8000213a:	0000                	unimp
+8000213c:	0000                	unimp
+8000213e:	0000                	unimp
+
+80002140 <test_12_data>:
+80002140:	ffff                	0xffff
+80002142:	ffff                	0xffff
+80002144:	ffff                	0xffff
+80002146:	7fff                	0x7fff
+80002148:	ffff                	0xffff
+8000214a:	ffff                	0xffff
+8000214c:	ffff                	0xffff
+8000214e:	7fff                	0x7fff
+80002150:	0000                	unimp
+80002152:	0000                	unimp
+80002154:	0000                	unimp
+80002156:	0000                	unimp
+80002158:	0000                	unimp
+8000215a:	0000                	unimp
+8000215c:	0000                	unimp
+8000215e:	0000                	unimp
+
+80002160 <test_13_data>:
+80002160:	0001                	nop
+80002162:	0000                	unimp
+80002164:	0000                	unimp
+80002166:	7ff0                	flw	fa2,124(a5)
+80002168:	0000                	unimp
+8000216a:	0000                	unimp
+8000216c:	0000                	unimp
+8000216e:	0000                	unimp
+80002170:	0000                	unimp
+80002172:	0000                	unimp
+80002174:	0000                	unimp
+80002176:	0000                	unimp
+80002178:	0000                	unimp
+8000217a:	0000                	unimp
+8000217c:	0000                	unimp
+8000217e:	0000                	unimp
+
+80002180 <test_14_data>:
+80002180:	ffff                	0xffff
+80002182:	ffff                	0xffff
+80002184:	ffff                	0xffff
+80002186:	7fff                	0x7fff
+80002188:	0000                	unimp
+8000218a:	0000                	unimp
+8000218c:	0000                	unimp
+8000218e:	0000                	unimp
+80002190:	0000                	unimp
+80002192:	0000                	unimp
+80002194:	0000                	unimp
+80002196:	0000                	unimp
+80002198:	0000                	unimp
+8000219a:	0000                	unimp
+8000219c:	0000                	unimp
+8000219e:	0000                	unimp
+
+800021a0 <test_15_data>:
+800021a0:	ffff                	0xffff
+800021a2:	ffff                	0xffff
+800021a4:	ffff                	0xffff
+800021a6:	7fff                	0x7fff
+800021a8:	ffff                	0xffff
+800021aa:	ffff                	0xffff
+800021ac:	ffff                	0xffff
+800021ae:	7fff                	0x7fff
+800021b0:	0000                	unimp
+800021b2:	0000                	unimp
+800021b4:	0000                	unimp
+800021b6:	0000                	unimp
+800021b8:	0000                	unimp
+800021ba:	0000                	unimp
+800021bc:	0000                	unimp
+800021be:	0000                	unimp
+
+800021c0 <test_16_data>:
+800021c0:	0001                	nop
+800021c2:	0000                	unimp
+800021c4:	0000                	unimp
+800021c6:	7ff0                	flw	fa2,124(a5)
+800021c8:	0000                	unimp
+800021ca:	0000                	unimp
+800021cc:	0000                	unimp
+800021ce:	0000                	unimp
+800021d0:	0000                	unimp
+800021d2:	0000                	unimp
+800021d4:	0000                	unimp
+800021d6:	0000                	unimp
+800021d8:	0000                	unimp
+800021da:	0000                	unimp
+800021dc:	0000                	unimp
+800021de:	0000                	unimp
diff --git a/test/riscv-tests/rv32ud-p-fcmp.elf b/test/riscv-tests/rv32ud-p-fcmp.elf
new file mode 100644
index 0000000..110986d
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcmp.elf
diff --git a/test/riscv-tests/rv32ud-p-fcvt.dump b/test/riscv-tests/rv32ud-p-fcvt.dump
new file mode 100644
index 0000000..98a0897
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcvt.dump
@@ -0,0 +1,286 @@
+
+rv32ud-p-fcvt:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052683          	lw	a3,0(a0)
+80000118:	00452703          	lw	a4,4(a0)
+8000011c:	00200593          	li	a1,2
+80000120:	d2058053          	fcvt.d.w	ft0,a1
+80000124:	00053027          	fsd	ft0,0(a0)
+80000128:	00452583          	lw	a1,4(a0)
+8000012c:	00052503          	lw	a0,0(a0)
+80000130:	00101073          	fsflags	zero
+80000134:	16d51263          	bne	a0,a3,80000298 <fail>
+80000138:	16e59063          	bne	a1,a4,80000298 <fail>
+
+8000013c <test_3>:
+8000013c:	00300193          	li	gp,3
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ec850513          	addi	a0,a0,-312 # 80002008 <test_3_data>
+80000148:	00052683          	lw	a3,0(a0)
+8000014c:	00452703          	lw	a4,4(a0)
+80000150:	ffe00593          	li	a1,-2
+80000154:	d2058053          	fcvt.d.w	ft0,a1
+80000158:	00053027          	fsd	ft0,0(a0)
+8000015c:	00452583          	lw	a1,4(a0)
+80000160:	00052503          	lw	a0,0(a0)
+80000164:	00101073          	fsflags	zero
+80000168:	12d51863          	bne	a0,a3,80000298 <fail>
+8000016c:	12e59663          	bne	a1,a4,80000298 <fail>
+
+80000170 <test_4>:
+80000170:	00400193          	li	gp,4
+80000174:	00002517          	auipc	a0,0x2
+80000178:	e9c50513          	addi	a0,a0,-356 # 80002010 <test_4_data>
+8000017c:	00052683          	lw	a3,0(a0)
+80000180:	00452703          	lw	a4,4(a0)
+80000184:	00200593          	li	a1,2
+80000188:	d2158053          	fcvt.d.wu	ft0,a1
+8000018c:	00053027          	fsd	ft0,0(a0)
+80000190:	00452583          	lw	a1,4(a0)
+80000194:	00052503          	lw	a0,0(a0)
+80000198:	00101073          	fsflags	zero
+8000019c:	0ed51e63          	bne	a0,a3,80000298 <fail>
+800001a0:	0ee59c63          	bne	a1,a4,80000298 <fail>
+
+800001a4 <test_5>:
+800001a4:	00500193          	li	gp,5
+800001a8:	00002517          	auipc	a0,0x2
+800001ac:	e7050513          	addi	a0,a0,-400 # 80002018 <test_5_data>
+800001b0:	00052683          	lw	a3,0(a0)
+800001b4:	00452703          	lw	a4,4(a0)
+800001b8:	ffe00593          	li	a1,-2
+800001bc:	d2158053          	fcvt.d.wu	ft0,a1
+800001c0:	00053027          	fsd	ft0,0(a0)
+800001c4:	00452583          	lw	a1,4(a0)
+800001c8:	00052503          	lw	a0,0(a0)
+800001cc:	00101073          	fsflags	zero
+800001d0:	0cd51463          	bne	a0,a3,80000298 <fail>
+800001d4:	0ce59263          	bne	a1,a4,80000298 <fail>
+
+800001d8 <test_10>:
+800001d8:	00a00193          	li	gp,10
+800001dc:	00002517          	auipc	a0,0x2
+800001e0:	e4450513          	addi	a0,a0,-444 # 80002020 <test_10_data>
+800001e4:	00053007          	fld	ft0,0(a0)
+800001e8:	00853087          	fld	ft1,8(a0)
+800001ec:	01053107          	fld	ft2,16(a0)
+800001f0:	01852683          	lw	a3,24(a0)
+800001f4:	01c52303          	lw	t1,28(a0)
+800001f8:	401071d3          	fcvt.s.d	ft3,ft0
+800001fc:	420181d3          	fcvt.d.s	ft3,ft3
+80000200:	00353027          	fsd	ft3,0(a0)
+80000204:	00452383          	lw	t2,4(a0)
+80000208:	00052503          	lw	a0,0(a0)
+8000020c:	001015f3          	fsflags	a1,zero
+80000210:	00000613          	li	a2,0
+80000214:	08d51263          	bne	a0,a3,80000298 <fail>
+80000218:	08731063          	bne	t1,t2,80000298 <fail>
+8000021c:	06c59e63          	bne	a1,a2,80000298 <fail>
+
+80000220 <test_11>:
+80000220:	00b00193          	li	gp,11
+80000224:	00002517          	auipc	a0,0x2
+80000228:	e1c50513          	addi	a0,a0,-484 # 80002040 <test_11_data>
+8000022c:	00052007          	flw	ft0,0(a0)
+80000230:	00452087          	flw	ft1,4(a0)
+80000234:	00852107          	flw	ft2,8(a0)
+80000238:	00c52683          	lw	a3,12(a0)
+8000023c:	420001d3          	fcvt.d.s	ft3,ft0
+80000240:	4011f1d3          	fcvt.s.d	ft3,ft3
+80000244:	e0018553          	fmv.x.w	a0,ft3
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00000613          	li	a2,0
+80000250:	04d51463          	bne	a0,a3,80000298 <fail>
+80000254:	04c59263          	bne	a1,a2,80000298 <fail>
+
+80000258 <test_12>:
+80000258:	00002597          	auipc	a1,0x2
+8000025c:	e0858593          	addi	a1,a1,-504 # 80002060 <begin_signature>
+80000260:	0005b107          	fld	ft2,0(a1)
+80000264:	40117153          	fcvt.s.d	ft2,ft2
+80000268:	42010153          	fcvt.d.s	ft2,ft2
+8000026c:	0025b027          	fsd	ft2,0(a1)
+80000270:	0005a503          	lw	a0,0(a1)
+80000274:	0045a583          	lw	a1,4(a1)
+80000278:	00002f97          	auipc	t6,0x2
+8000027c:	dd8f8f93          	addi	t6,t6,-552 # 80002050 <test_12_data>
+80000280:	000fae83          	lw	t4,0(t6)
+80000284:	004faf83          	lw	t6,4(t6)
+80000288:	00c00193          	li	gp,12
+8000028c:	01d51663          	bne	a0,t4,80000298 <fail>
+80000290:	01f59463          	bne	a1,t6,80000298 <fail>
+80000294:	00301c63          	bne	zero,gp,800002ac <pass>
+
+80000298 <fail>:
+80000298:	0ff0000f          	fence
+8000029c:	00018063          	beqz	gp,8000029c <fail+0x4>
+800002a0:	00119193          	slli	gp,gp,0x1
+800002a4:	0011e193          	ori	gp,gp,1
+800002a8:	00000073          	ecall
+
+800002ac <pass>:
+800002ac:	0ff0000f          	fence
+800002b0:	00100193          	li	gp,1
+800002b4:	00000073          	ecall
+800002b8:	c0001073          	unimp
+800002bc:	0000                	unimp
+800002be:	0000                	unimp
+800002c0:	0000                	unimp
+800002c2:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	0000                	unimp
+80002004:	0000                	unimp
+80002006:	4000                	lw	s0,0(s0)
+
+80002008 <test_3_data>:
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	c000                	sw	s0,0(s0)
+
+80002010 <test_4_data>:
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	4000                	lw	s0,0(s0)
+
+80002018 <test_5_data>:
+80002018:	0000                	unimp
+8000201a:	ffc0                	fsw	fs0,60(a5)
+8000201c:	ffff                	0xffff
+8000201e:	          	jal	gp,8000601e <_end+0x3fae>
+
+80002020 <test_10_data>:
+80002020:	0000                	unimp
+80002022:	0000                	unimp
+80002024:	0000                	unimp
+80002026:	bff8                	fsd	fa4,248(a5)
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	0000                	unimp
+8000202e:	0000                	unimp
+80002030:	0000                	unimp
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	bff8                	fsd	fa4,248(a5)
+
+80002040 <test_11_data>:
+80002040:	0000                	unimp
+80002042:	bfc0                	fsd	fs0,184(a5)
+80002044:	0000                	unimp
+80002046:	0000                	unimp
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0000                	unimp
+8000204e:	bfc0                	fsd	fs0,184(a5)
+
+80002050 <test_12_data>:
+80002050:	0000                	unimp
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	7ff8                	flw	fa4,124(a5)
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0000                	unimp
+8000205e:	0000                	unimp
+
+80002060 <begin_signature>:
+80002060:	8004                	0x8004
+80002062:	ffff                	0xffff
+80002064:	ffff                	0xffff
+80002066:	7ffc                	flw	fa5,124(a5)
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	0000                	unimp
diff --git a/test/riscv-tests/rv32ud-p-fcvt.elf b/test/riscv-tests/rv32ud-p-fcvt.elf
new file mode 100644
index 0000000..fda1e44
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcvt.elf
diff --git a/test/riscv-tests/rv32ud-p-fcvt_w.dump b/test/riscv-tests/rv32ud-p-fcvt_w.dump
new file mode 100644
index 0000000..e7027cb
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcvt_w.dump
@@ -0,0 +1,604 @@
+
+rv32ud-p-fcvt_w:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000128:	001015f3          	fsflags	a1,zero
+8000012c:	00100613          	li	a2,1
+80000130:	3cd51463          	bne	a0,a3,800004f8 <fail>
+80000134:	3cc59263          	bne	a1,a2,800004f8 <fail>
+
+80000138 <test_3>:
+80000138:	00300193          	li	gp,3
+8000013c:	00002517          	auipc	a0,0x2
+80000140:	ed450513          	addi	a0,a0,-300 # 80002010 <test_3_data>
+80000144:	00052007          	flw	ft0,0(a0)
+80000148:	00452087          	flw	ft1,4(a0)
+8000014c:	00852107          	flw	ft2,8(a0)
+80000150:	00c52683          	lw	a3,12(a0)
+80000154:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000158:	001015f3          	fsflags	a1,zero
+8000015c:	00000613          	li	a2,0
+80000160:	38d51c63          	bne	a0,a3,800004f8 <fail>
+80000164:	38c59a63          	bne	a1,a2,800004f8 <fail>
+
+80000168 <test_4>:
+80000168:	00400193          	li	gp,4
+8000016c:	00002517          	auipc	a0,0x2
+80000170:	eb450513          	addi	a0,a0,-332 # 80002020 <test_4_data>
+80000174:	00052007          	flw	ft0,0(a0)
+80000178:	00452087          	flw	ft1,4(a0)
+8000017c:	00852107          	flw	ft2,8(a0)
+80000180:	00c52683          	lw	a3,12(a0)
+80000184:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000188:	001015f3          	fsflags	a1,zero
+8000018c:	00100613          	li	a2,1
+80000190:	36d51463          	bne	a0,a3,800004f8 <fail>
+80000194:	36c59263          	bne	a1,a2,800004f8 <fail>
+
+80000198 <test_5>:
+80000198:	00500193          	li	gp,5
+8000019c:	00002517          	auipc	a0,0x2
+800001a0:	e9450513          	addi	a0,a0,-364 # 80002030 <test_5_data>
+800001a4:	00052007          	flw	ft0,0(a0)
+800001a8:	00452087          	flw	ft1,4(a0)
+800001ac:	00852107          	flw	ft2,8(a0)
+800001b0:	00c52683          	lw	a3,12(a0)
+800001b4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+800001b8:	001015f3          	fsflags	a1,zero
+800001bc:	00100613          	li	a2,1
+800001c0:	32d51c63          	bne	a0,a3,800004f8 <fail>
+800001c4:	32c59a63          	bne	a1,a2,800004f8 <fail>
+
+800001c8 <test_6>:
+800001c8:	00600193          	li	gp,6
+800001cc:	00002517          	auipc	a0,0x2
+800001d0:	e7450513          	addi	a0,a0,-396 # 80002040 <test_6_data>
+800001d4:	00052007          	flw	ft0,0(a0)
+800001d8:	00452087          	flw	ft1,4(a0)
+800001dc:	00852107          	flw	ft2,8(a0)
+800001e0:	00c52683          	lw	a3,12(a0)
+800001e4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+800001e8:	001015f3          	fsflags	a1,zero
+800001ec:	00000613          	li	a2,0
+800001f0:	30d51463          	bne	a0,a3,800004f8 <fail>
+800001f4:	30c59263          	bne	a1,a2,800004f8 <fail>
+
+800001f8 <test_7>:
+800001f8:	00700193          	li	gp,7
+800001fc:	00002517          	auipc	a0,0x2
+80000200:	e5450513          	addi	a0,a0,-428 # 80002050 <test_7_data>
+80000204:	00052007          	flw	ft0,0(a0)
+80000208:	00452087          	flw	ft1,4(a0)
+8000020c:	00852107          	flw	ft2,8(a0)
+80000210:	00c52683          	lw	a3,12(a0)
+80000214:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000218:	001015f3          	fsflags	a1,zero
+8000021c:	00100613          	li	a2,1
+80000220:	2cd51c63          	bne	a0,a3,800004f8 <fail>
+80000224:	2cc59a63          	bne	a1,a2,800004f8 <fail>
+
+80000228 <test_8>:
+80000228:	00800193          	li	gp,8
+8000022c:	00002517          	auipc	a0,0x2
+80000230:	e3450513          	addi	a0,a0,-460 # 80002060 <test_8_data>
+80000234:	00052007          	flw	ft0,0(a0)
+80000238:	00452087          	flw	ft1,4(a0)
+8000023c:	00852107          	flw	ft2,8(a0)
+80000240:	00c52683          	lw	a3,12(a0)
+80000244:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	01000613          	li	a2,16
+80000250:	2ad51463          	bne	a0,a3,800004f8 <fail>
+80000254:	2ac59263          	bne	a1,a2,800004f8 <fail>
+
+80000258 <test_9>:
+80000258:	00900193          	li	gp,9
+8000025c:	00002517          	auipc	a0,0x2
+80000260:	e1450513          	addi	a0,a0,-492 # 80002070 <test_9_data>
+80000264:	00052007          	flw	ft0,0(a0)
+80000268:	00452087          	flw	ft1,4(a0)
+8000026c:	00852107          	flw	ft2,8(a0)
+80000270:	00c52683          	lw	a3,12(a0)
+80000274:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000278:	001015f3          	fsflags	a1,zero
+8000027c:	01000613          	li	a2,16
+80000280:	26d51c63          	bne	a0,a3,800004f8 <fail>
+80000284:	26c59a63          	bne	a1,a2,800004f8 <fail>
+
+80000288 <test_12>:
+80000288:	00c00193          	li	gp,12
+8000028c:	00002517          	auipc	a0,0x2
+80000290:	df450513          	addi	a0,a0,-524 # 80002080 <test_12_data>
+80000294:	00052007          	flw	ft0,0(a0)
+80000298:	00452087          	flw	ft1,4(a0)
+8000029c:	00852107          	flw	ft2,8(a0)
+800002a0:	00c52683          	lw	a3,12(a0)
+800002a4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800002a8:	001015f3          	fsflags	a1,zero
+800002ac:	01000613          	li	a2,16
+800002b0:	24d51463          	bne	a0,a3,800004f8 <fail>
+800002b4:	24c59263          	bne	a1,a2,800004f8 <fail>
+
+800002b8 <test_13>:
+800002b8:	00d00193          	li	gp,13
+800002bc:	00002517          	auipc	a0,0x2
+800002c0:	dd450513          	addi	a0,a0,-556 # 80002090 <test_13_data>
+800002c4:	00052007          	flw	ft0,0(a0)
+800002c8:	00452087          	flw	ft1,4(a0)
+800002cc:	00852107          	flw	ft2,8(a0)
+800002d0:	00c52683          	lw	a3,12(a0)
+800002d4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800002d8:	001015f3          	fsflags	a1,zero
+800002dc:	01000613          	li	a2,16
+800002e0:	20d51c63          	bne	a0,a3,800004f8 <fail>
+800002e4:	20c59a63          	bne	a1,a2,800004f8 <fail>
+
+800002e8 <test_14>:
+800002e8:	00e00193          	li	gp,14
+800002ec:	00002517          	auipc	a0,0x2
+800002f0:	db450513          	addi	a0,a0,-588 # 800020a0 <test_14_data>
+800002f4:	00052007          	flw	ft0,0(a0)
+800002f8:	00452087          	flw	ft1,4(a0)
+800002fc:	00852107          	flw	ft2,8(a0)
+80000300:	00c52683          	lw	a3,12(a0)
+80000304:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000308:	001015f3          	fsflags	a1,zero
+8000030c:	00100613          	li	a2,1
+80000310:	1ed51463          	bne	a0,a3,800004f8 <fail>
+80000314:	1ec59263          	bne	a1,a2,800004f8 <fail>
+
+80000318 <test_15>:
+80000318:	00f00193          	li	gp,15
+8000031c:	00002517          	auipc	a0,0x2
+80000320:	d9450513          	addi	a0,a0,-620 # 800020b0 <test_15_data>
+80000324:	00052007          	flw	ft0,0(a0)
+80000328:	00452087          	flw	ft1,4(a0)
+8000032c:	00852107          	flw	ft2,8(a0)
+80000330:	00c52683          	lw	a3,12(a0)
+80000334:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000338:	001015f3          	fsflags	a1,zero
+8000033c:	00100613          	li	a2,1
+80000340:	1ad51c63          	bne	a0,a3,800004f8 <fail>
+80000344:	1ac59a63          	bne	a1,a2,800004f8 <fail>
+
+80000348 <test_16>:
+80000348:	01000193          	li	gp,16
+8000034c:	00002517          	auipc	a0,0x2
+80000350:	d7450513          	addi	a0,a0,-652 # 800020c0 <test_16_data>
+80000354:	00052007          	flw	ft0,0(a0)
+80000358:	00452087          	flw	ft1,4(a0)
+8000035c:	00852107          	flw	ft2,8(a0)
+80000360:	00c52683          	lw	a3,12(a0)
+80000364:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000368:	001015f3          	fsflags	a1,zero
+8000036c:	00000613          	li	a2,0
+80000370:	18d51463          	bne	a0,a3,800004f8 <fail>
+80000374:	18c59263          	bne	a1,a2,800004f8 <fail>
+
+80000378 <test_17>:
+80000378:	01100193          	li	gp,17
+8000037c:	00002517          	auipc	a0,0x2
+80000380:	d5450513          	addi	a0,a0,-684 # 800020d0 <test_17_data>
+80000384:	00052007          	flw	ft0,0(a0)
+80000388:	00452087          	flw	ft1,4(a0)
+8000038c:	00852107          	flw	ft2,8(a0)
+80000390:	00c52683          	lw	a3,12(a0)
+80000394:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000398:	001015f3          	fsflags	a1,zero
+8000039c:	00100613          	li	a2,1
+800003a0:	14d51c63          	bne	a0,a3,800004f8 <fail>
+800003a4:	14c59a63          	bne	a1,a2,800004f8 <fail>
+
+800003a8 <test_18>:
+800003a8:	01200193          	li	gp,18
+800003ac:	00002517          	auipc	a0,0x2
+800003b0:	d3450513          	addi	a0,a0,-716 # 800020e0 <test_18_data>
+800003b4:	00052007          	flw	ft0,0(a0)
+800003b8:	00452087          	flw	ft1,4(a0)
+800003bc:	00852107          	flw	ft2,8(a0)
+800003c0:	00c52683          	lw	a3,12(a0)
+800003c4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800003c8:	001015f3          	fsflags	a1,zero
+800003cc:	01000613          	li	a2,16
+800003d0:	12d51463          	bne	a0,a3,800004f8 <fail>
+800003d4:	12c59263          	bne	a1,a2,800004f8 <fail>
+
+800003d8 <test_19>:
+800003d8:	01300193          	li	gp,19
+800003dc:	00002517          	auipc	a0,0x2
+800003e0:	d1450513          	addi	a0,a0,-748 # 800020f0 <test_19_data>
+800003e4:	00052007          	flw	ft0,0(a0)
+800003e8:	00452087          	flw	ft1,4(a0)
+800003ec:	00852107          	flw	ft2,8(a0)
+800003f0:	00c52683          	lw	a3,12(a0)
+800003f4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800003f8:	001015f3          	fsflags	a1,zero
+800003fc:	00000613          	li	a2,0
+80000400:	0ed51c63          	bne	a0,a3,800004f8 <fail>
+80000404:	0ec59a63          	bne	a1,a2,800004f8 <fail>
+
+80000408 <test_42>:
+80000408:	00002097          	auipc	ra,0x2
+8000040c:	cf808093          	addi	ra,ra,-776 # 80002100 <begin_signature>
+80000410:	0000a087          	flw	ft1,0(ra)
+80000414:	c000f0d3          	fcvt.w.s	ra,ft1
+80000418:	80000eb7          	lui	t4,0x80000
+8000041c:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+80000420:	02a00193          	li	gp,42
+80000424:	0dd09a63          	bne	ra,t4,800004f8 <fail>
+
+80000428 <test_44>:
+80000428:	00002097          	auipc	ra,0x2
+8000042c:	cd808093          	addi	ra,ra,-808 # 80002100 <begin_signature>
+80000430:	0080a087          	flw	ft1,8(ra)
+80000434:	c000f0d3          	fcvt.w.s	ra,ft1
+80000438:	80000eb7          	lui	t4,0x80000
+8000043c:	02c00193          	li	gp,44
+80000440:	0bd09c63          	bne	ra,t4,800004f8 <fail>
+
+80000444 <test_52>:
+80000444:	00002097          	auipc	ra,0x2
+80000448:	cbc08093          	addi	ra,ra,-836 # 80002100 <begin_signature>
+8000044c:	0040a087          	flw	ft1,4(ra)
+80000450:	c000f0d3          	fcvt.w.s	ra,ft1
+80000454:	80000eb7          	lui	t4,0x80000
+80000458:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+8000045c:	03400193          	li	gp,52
+80000460:	09d09c63          	bne	ra,t4,800004f8 <fail>
+
+80000464 <test_54>:
+80000464:	00002097          	auipc	ra,0x2
+80000468:	c9c08093          	addi	ra,ra,-868 # 80002100 <begin_signature>
+8000046c:	00c0a087          	flw	ft1,12(ra)
+80000470:	c000f0d3          	fcvt.w.s	ra,ft1
+80000474:	80000eb7          	lui	t4,0x80000
+80000478:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+8000047c:	03600193          	li	gp,54
+80000480:	07d09c63          	bne	ra,t4,800004f8 <fail>
+
+80000484 <test_62>:
+80000484:	00002097          	auipc	ra,0x2
+80000488:	c7c08093          	addi	ra,ra,-900 # 80002100 <begin_signature>
+8000048c:	0000a087          	flw	ft1,0(ra)
+80000490:	c010f0d3          	fcvt.wu.s	ra,ft1
+80000494:	fff00e93          	li	t4,-1
+80000498:	03e00193          	li	gp,62
+8000049c:	05d09e63          	bne	ra,t4,800004f8 <fail>
+
+800004a0 <test_63>:
+800004a0:	00002097          	auipc	ra,0x2
+800004a4:	c6008093          	addi	ra,ra,-928 # 80002100 <begin_signature>
+800004a8:	0040a087          	flw	ft1,4(ra)
+800004ac:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004b0:	fff00e93          	li	t4,-1
+800004b4:	03f00193          	li	gp,63
+800004b8:	05d09063          	bne	ra,t4,800004f8 <fail>
+
+800004bc <test_64>:
+800004bc:	00002097          	auipc	ra,0x2
+800004c0:	c4408093          	addi	ra,ra,-956 # 80002100 <begin_signature>
+800004c4:	0080a087          	flw	ft1,8(ra)
+800004c8:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004cc:	00000e93          	li	t4,0
+800004d0:	04000193          	li	gp,64
+800004d4:	03d09263          	bne	ra,t4,800004f8 <fail>
+
+800004d8 <test_65>:
+800004d8:	00002097          	auipc	ra,0x2
+800004dc:	c2808093          	addi	ra,ra,-984 # 80002100 <begin_signature>
+800004e0:	00c0a087          	flw	ft1,12(ra)
+800004e4:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004e8:	fff00e93          	li	t4,-1
+800004ec:	04100193          	li	gp,65
+800004f0:	01d09463          	bne	ra,t4,800004f8 <fail>
+800004f4:	00301c63          	bne	zero,gp,8000050c <pass>
+
+800004f8 <fail>:
+800004f8:	0ff0000f          	fence
+800004fc:	00018063          	beqz	gp,800004fc <fail+0x4>
+80000500:	00119193          	slli	gp,gp,0x1
+80000504:	0011e193          	ori	gp,gp,1
+80000508:	00000073          	ecall
+
+8000050c <pass>:
+8000050c:	0ff0000f          	fence
+80000510:	00100193          	li	gp,1
+80000514:	00000073          	ecall
+80000518:	c0001073          	unimp
+8000051c:	0000                	unimp
+8000051e:	0000                	unimp
+80000520:	0000                	unimp
+80000522:	0000                	unimp
+80000524:	0000                	unimp
+80000526:	0000                	unimp
+80000528:	0000                	unimp
+8000052a:	0000                	unimp
+8000052c:	0000                	unimp
+8000052e:	0000                	unimp
+80000530:	0000                	unimp
+80000532:	0000                	unimp
+80000534:	0000                	unimp
+80000536:	0000                	unimp
+80000538:	0000                	unimp
+8000053a:	0000                	unimp
+8000053c:	0000                	unimp
+8000053e:	0000                	unimp
+80000540:	0000                	unimp
+80000542:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	cccd                	beqz	s1,800020ba <test_15_data+0xa>
+80002002:	bf8c                	fsd	fa1,56(a5)
+80002004:	0000                	unimp
+80002006:	0000                	unimp
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	ffff                	0xffff
+8000200e:	ffff                	0xffff
+
+80002010 <test_3_data>:
+80002010:	0000                	unimp
+80002012:	bf80                	fsd	fs0,56(a5)
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	ffff                	0xffff
+8000201e:	ffff                	0xffff
+
+80002020 <test_4_data>:
+80002020:	6666                	flw	fa2,88(sp)
+80002022:	bf66                	fsd	fs9,440(sp)
+80002024:	0000                	unimp
+80002026:	0000                	unimp
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	0000                	unimp
+8000202e:	0000                	unimp
+
+80002030 <test_5_data>:
+80002030:	6666                	flw	fa2,88(sp)
+80002032:	3f66                	fld	ft10,120(sp)
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	0000                	unimp
+
+80002040 <test_6_data>:
+80002040:	0000                	unimp
+80002042:	3f80                	fld	fs0,56(a5)
+80002044:	0000                	unimp
+80002046:	0000                	unimp
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0001                	nop
+8000204e:	0000                	unimp
+
+80002050 <test_7_data>:
+80002050:	cccd                	beqz	s1,8000210a <begin_signature+0xa>
+80002052:	3f8c                	fld	fa1,56(a5)
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0001                	nop
+8000205e:	0000                	unimp
+
+80002060 <test_8_data>:
+80002060:	d05e                	sw	s7,32(sp)
+80002062:	cf32                	sw	a2,156(sp)
+80002064:	0000                	unimp
+80002066:	0000                	unimp
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	8000                	0x8000
+
+80002070 <test_9_data>:
+80002070:	d05e                	sw	s7,32(sp)
+80002072:	4f32                	lw	t5,12(sp)
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	ffff                	0xffff
+8000207e:	7fff                	0x7fff
+
+80002080 <test_12_data>:
+80002080:	0000                	unimp
+80002082:	c040                	sw	s0,4(s0)
+80002084:	0000                	unimp
+80002086:	0000                	unimp
+80002088:	0000                	unimp
+8000208a:	0000                	unimp
+8000208c:	0000                	unimp
+8000208e:	0000                	unimp
+
+80002090 <test_13_data>:
+80002090:	0000                	unimp
+80002092:	bf80                	fsd	fs0,56(a5)
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	0000                	unimp
+
+800020a0 <test_14_data>:
+800020a0:	6666                	flw	fa2,88(sp)
+800020a2:	bf66                	fsd	fs9,440(sp)
+800020a4:	0000                	unimp
+800020a6:	0000                	unimp
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	0000                	unimp
+
+800020b0 <test_15_data>:
+800020b0:	6666                	flw	fa2,88(sp)
+800020b2:	3f66                	fld	ft10,120(sp)
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	0000                	unimp
+
+800020c0 <test_16_data>:
+800020c0:	0000                	unimp
+800020c2:	3f80                	fld	fs0,56(a5)
+800020c4:	0000                	unimp
+800020c6:	0000                	unimp
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0001                	nop
+800020ce:	0000                	unimp
+
+800020d0 <test_17_data>:
+800020d0:	cccd                	beqz	s1,8000218a <_end+0x5a>
+800020d2:	3f8c                	fld	fa1,56(a5)
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0001                	nop
+800020de:	0000                	unimp
+
+800020e0 <test_18_data>:
+800020e0:	d05e                	sw	s7,32(sp)
+800020e2:	cf32                	sw	a2,156(sp)
+800020e4:	0000                	unimp
+800020e6:	0000                	unimp
+800020e8:	0000                	unimp
+800020ea:	0000                	unimp
+800020ec:	0000                	unimp
+800020ee:	0000                	unimp
+
+800020f0 <test_19_data>:
+800020f0:	d05e                	sw	s7,32(sp)
+800020f2:	4f32                	lw	t5,12(sp)
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	0000                	unimp
+800020fa:	0000                	unimp
+800020fc:	5e00                	lw	s0,56(a2)
+800020fe:	b2d0                	fsd	fa2,160(a3)
+
+80002100 <begin_signature>:
+80002100:	ffff                	0xffff
+80002102:	ffff                	0xffff
+80002104:	ffff                	0xffff
+80002106:	7fff                	0x7fff
+80002108:	0000                	unimp
+8000210a:	ff80                	fsw	fs0,56(a5)
+8000210c:	0000                	unimp
+8000210e:	7f80                	flw	fs0,56(a5)
+
+80002110 <tdat_d>:
+80002110:	ffff                	0xffff
+80002112:	ffff                	0xffff
+80002114:	ffff                	0xffff
+80002116:	ffff                	0xffff
+80002118:	ffff                	0xffff
+8000211a:	ffff                	0xffff
+8000211c:	ffff                	0xffff
+8000211e:	7fff                	0x7fff
+80002120:	0000                	unimp
+80002122:	0000                	unimp
+80002124:	0000                	unimp
+80002126:	fff0                	fsw	fa2,124(a5)
+80002128:	0000                	unimp
+8000212a:	0000                	unimp
+8000212c:	0000                	unimp
+8000212e:	7ff0                	flw	fa2,124(a5)
diff --git a/test/riscv-tests/rv32ud-p-fcvt_w.elf b/test/riscv-tests/rv32ud-p-fcvt_w.elf
new file mode 100644
index 0000000..77b06c0
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fcvt_w.elf
diff --git a/test/riscv-tests/rv32ud-p-fdiv.dump b/test/riscv-tests/rv32ud-p-fdiv.dump
new file mode 100644
index 0000000..f4dd59c
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fdiv.dump
@@ -0,0 +1,407 @@
+
+rv32ud-p-fdiv:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00053007          	fld	ft0,0(a0)
+80000118:	00853087          	fld	ft1,8(a0)
+8000011c:	01053107          	fld	ft2,16(a0)
+80000120:	01852683          	lw	a3,24(a0)
+80000124:	01c52303          	lw	t1,28(a0)
+80000128:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+8000012c:	00353027          	fsd	ft3,0(a0)
+80000130:	00452383          	lw	t2,4(a0)
+80000134:	00052503          	lw	a0,0(a0)
+80000138:	001015f3          	fsflags	a1,zero
+8000013c:	00100613          	li	a2,1
+80000140:	1ed51663          	bne	a0,a3,8000032c <fail>
+80000144:	1e731463          	bne	t1,t2,8000032c <fail>
+80000148:	1ec59263          	bne	a1,a2,8000032c <fail>
+
+8000014c <test_3>:
+8000014c:	00300193          	li	gp,3
+80000150:	00002517          	auipc	a0,0x2
+80000154:	ed050513          	addi	a0,a0,-304 # 80002020 <test_3_data>
+80000158:	00053007          	fld	ft0,0(a0)
+8000015c:	00853087          	fld	ft1,8(a0)
+80000160:	01053107          	fld	ft2,16(a0)
+80000164:	01852683          	lw	a3,24(a0)
+80000168:	01c52303          	lw	t1,28(a0)
+8000016c:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+80000170:	00353027          	fsd	ft3,0(a0)
+80000174:	00452383          	lw	t2,4(a0)
+80000178:	00052503          	lw	a0,0(a0)
+8000017c:	001015f3          	fsflags	a1,zero
+80000180:	00100613          	li	a2,1
+80000184:	1ad51463          	bne	a0,a3,8000032c <fail>
+80000188:	1a731263          	bne	t1,t2,8000032c <fail>
+8000018c:	1ac59063          	bne	a1,a2,8000032c <fail>
+
+80000190 <test_4>:
+80000190:	00400193          	li	gp,4
+80000194:	00002517          	auipc	a0,0x2
+80000198:	eac50513          	addi	a0,a0,-340 # 80002040 <test_4_data>
+8000019c:	00053007          	fld	ft0,0(a0)
+800001a0:	00853087          	fld	ft1,8(a0)
+800001a4:	01053107          	fld	ft2,16(a0)
+800001a8:	01852683          	lw	a3,24(a0)
+800001ac:	01c52303          	lw	t1,28(a0)
+800001b0:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+800001b4:	00353027          	fsd	ft3,0(a0)
+800001b8:	00452383          	lw	t2,4(a0)
+800001bc:	00052503          	lw	a0,0(a0)
+800001c0:	001015f3          	fsflags	a1,zero
+800001c4:	00000613          	li	a2,0
+800001c8:	16d51263          	bne	a0,a3,8000032c <fail>
+800001cc:	16731063          	bne	t1,t2,8000032c <fail>
+800001d0:	14c59e63          	bne	a1,a2,8000032c <fail>
+
+800001d4 <test_5>:
+800001d4:	00500193          	li	gp,5
+800001d8:	00002517          	auipc	a0,0x2
+800001dc:	e8850513          	addi	a0,a0,-376 # 80002060 <test_5_data>
+800001e0:	00053007          	fld	ft0,0(a0)
+800001e4:	00853087          	fld	ft1,8(a0)
+800001e8:	01053107          	fld	ft2,16(a0)
+800001ec:	01852683          	lw	a3,24(a0)
+800001f0:	01c52303          	lw	t1,28(a0)
+800001f4:	5a0071d3          	fsqrt.d	ft3,ft0
+800001f8:	00353027          	fsd	ft3,0(a0)
+800001fc:	00452383          	lw	t2,4(a0)
+80000200:	00052503          	lw	a0,0(a0)
+80000204:	001015f3          	fsflags	a1,zero
+80000208:	00100613          	li	a2,1
+8000020c:	12d51063          	bne	a0,a3,8000032c <fail>
+80000210:	10731e63          	bne	t1,t2,8000032c <fail>
+80000214:	10c59c63          	bne	a1,a2,8000032c <fail>
+
+80000218 <test_6>:
+80000218:	00600193          	li	gp,6
+8000021c:	00002517          	auipc	a0,0x2
+80000220:	e6450513          	addi	a0,a0,-412 # 80002080 <test_6_data>
+80000224:	00053007          	fld	ft0,0(a0)
+80000228:	00853087          	fld	ft1,8(a0)
+8000022c:	01053107          	fld	ft2,16(a0)
+80000230:	01852683          	lw	a3,24(a0)
+80000234:	01c52303          	lw	t1,28(a0)
+80000238:	5a0071d3          	fsqrt.d	ft3,ft0
+8000023c:	00353027          	fsd	ft3,0(a0)
+80000240:	00452383          	lw	t2,4(a0)
+80000244:	00052503          	lw	a0,0(a0)
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00000613          	li	a2,0
+80000250:	0cd51e63          	bne	a0,a3,8000032c <fail>
+80000254:	0c731c63          	bne	t1,t2,8000032c <fail>
+80000258:	0cc59a63          	bne	a1,a2,8000032c <fail>
+
+8000025c <test_16>:
+8000025c:	01000193          	li	gp,16
+80000260:	00002517          	auipc	a0,0x2
+80000264:	e4050513          	addi	a0,a0,-448 # 800020a0 <test_16_data>
+80000268:	00053007          	fld	ft0,0(a0)
+8000026c:	00853087          	fld	ft1,8(a0)
+80000270:	01053107          	fld	ft2,16(a0)
+80000274:	01852683          	lw	a3,24(a0)
+80000278:	01c52303          	lw	t1,28(a0)
+8000027c:	5a0071d3          	fsqrt.d	ft3,ft0
+80000280:	00353027          	fsd	ft3,0(a0)
+80000284:	00452383          	lw	t2,4(a0)
+80000288:	00052503          	lw	a0,0(a0)
+8000028c:	001015f3          	fsflags	a1,zero
+80000290:	01000613          	li	a2,16
+80000294:	08d51c63          	bne	a0,a3,8000032c <fail>
+80000298:	08731a63          	bne	t1,t2,8000032c <fail>
+8000029c:	08c59863          	bne	a1,a2,8000032c <fail>
+
+800002a0 <test_7>:
+800002a0:	00700193          	li	gp,7
+800002a4:	00002517          	auipc	a0,0x2
+800002a8:	e1c50513          	addi	a0,a0,-484 # 800020c0 <test_7_data>
+800002ac:	00053007          	fld	ft0,0(a0)
+800002b0:	00853087          	fld	ft1,8(a0)
+800002b4:	01053107          	fld	ft2,16(a0)
+800002b8:	01852683          	lw	a3,24(a0)
+800002bc:	01c52303          	lw	t1,28(a0)
+800002c0:	5a0071d3          	fsqrt.d	ft3,ft0
+800002c4:	00353027          	fsd	ft3,0(a0)
+800002c8:	00452383          	lw	t2,4(a0)
+800002cc:	00052503          	lw	a0,0(a0)
+800002d0:	001015f3          	fsflags	a1,zero
+800002d4:	00100613          	li	a2,1
+800002d8:	04d51a63          	bne	a0,a3,8000032c <fail>
+800002dc:	04731863          	bne	t1,t2,8000032c <fail>
+800002e0:	04c59663          	bne	a1,a2,8000032c <fail>
+
+800002e4 <test_8>:
+800002e4:	00800193          	li	gp,8
+800002e8:	00002517          	auipc	a0,0x2
+800002ec:	df850513          	addi	a0,a0,-520 # 800020e0 <test_8_data>
+800002f0:	00053007          	fld	ft0,0(a0)
+800002f4:	00853087          	fld	ft1,8(a0)
+800002f8:	01053107          	fld	ft2,16(a0)
+800002fc:	01852683          	lw	a3,24(a0)
+80000300:	01c52303          	lw	t1,28(a0)
+80000304:	5a0071d3          	fsqrt.d	ft3,ft0
+80000308:	00353027          	fsd	ft3,0(a0)
+8000030c:	00452383          	lw	t2,4(a0)
+80000310:	00052503          	lw	a0,0(a0)
+80000314:	001015f3          	fsflags	a1,zero
+80000318:	00100613          	li	a2,1
+8000031c:	00d51863          	bne	a0,a3,8000032c <fail>
+80000320:	00731663          	bne	t1,t2,8000032c <fail>
+80000324:	00c59463          	bne	a1,a2,8000032c <fail>
+80000328:	00301c63          	bne	zero,gp,80000340 <pass>
+
+8000032c <fail>:
+8000032c:	0ff0000f          	fence
+80000330:	00018063          	beqz	gp,80000330 <fail+0x4>
+80000334:	00119193          	slli	gp,gp,0x1
+80000338:	0011e193          	ori	gp,gp,1
+8000033c:	00000073          	ecall
+
+80000340 <pass>:
+80000340:	0ff0000f          	fence
+80000344:	00100193          	li	gp,1
+80000348:	00000073          	ecall
+8000034c:	c0001073          	unimp
+80000350:	0000                	unimp
+80000352:	0000                	unimp
+80000354:	0000                	unimp
+80000356:	0000                	unimp
+80000358:	0000                	unimp
+8000035a:	0000                	unimp
+8000035c:	0000                	unimp
+8000035e:	0000                	unimp
+80000360:	0000                	unimp
+80000362:	0000                	unimp
+80000364:	0000                	unimp
+80000366:	0000                	unimp
+80000368:	0000                	unimp
+8000036a:	0000                	unimp
+8000036c:	0000                	unimp
+8000036e:	0000                	unimp
+80000370:	0000                	unimp
+80000372:	0000                	unimp
+80000374:	0000                	unimp
+80000376:	0000                	unimp
+80000378:	0000                	unimp
+8000037a:	0000                	unimp
+8000037c:	0000                	unimp
+8000037e:	0000                	unimp
+80000380:	0000                	unimp
+80000382:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	d4f1                	beqz	s1,80001fcc <fromhost+0xf8c>
+80002002:	53c8                	lw	a0,36(a5)
+80002004:	400921fb          	0x400921fb
+80002008:	b0dd                	j	800018ee <fromhost+0x8ae>
+8000200a:	89f1                	andi	a1,a1,28
+8000200c:	bf0a                	fsd	ft2,440(sp)
+8000200e:	4005                	c.li	zero,1
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	83ec                	0x83ec
+8000201a:	7ddbf6c3          	0x7ddbf6c3
+8000201e:	3ff2                	fld	ft11,312(sp)
+
+80002020 <test_3_data>:
+80002020:	0000                	unimp
+80002022:	0000                	unimp
+80002024:	4800                	lw	s0,16(s0)
+80002026:	6666c093          	xori	ra,a3,1638
+8000202a:	6666                	flw	fa2,88(sp)
+8000202c:	4c66                	lw	s8,88(sp)
+8000202e:	00004093          	xori	ra,zero,0
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	29a5                	jal	800024b0 <_end+0x3b0>
+8000203a:	3e19                	jal	80001b50 <fromhost+0xb10>
+8000203c:	f8b4                	fsw	fa3,112(s1)
+8000203e:	          	jal	t6,7ff1dd8c <_start-0xe2274>
+
+80002040 <test_4_data>:
+80002040:	d4f1                	beqz	s1,8000200c <test_2_data+0xc>
+80002042:	53c8                	lw	a0,36(a5)
+80002044:	400921fb          	0x400921fb
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0000                	unimp
+8000204e:	3ff0                	fld	fa2,248(a5)
+80002050:	0000                	unimp
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	d4f1                	beqz	s1,80002024 <test_3_data+0x4>
+8000205a:	53c8                	lw	a0,36(a5)
+8000205c:	400921fb          	0x400921fb
+
+80002060 <test_5_data>:
+80002060:	d4f1                	beqz	s1,8000202c <test_3_data+0xc>
+80002062:	53c8                	lw	a0,36(a5)
+80002064:	400921fb          	0x400921fb
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	0000                	unimp
+80002070:	0000                	unimp
+80002072:	0000                	unimp
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	916f587b          	0x916f587b
+8000207c:	5bf8                	lw	a4,116(a5)
+8000207e:	3ffc                	fld	fa5,248(a5)
+
+80002080 <test_6_data>:
+80002080:	0000                	unimp
+80002082:	0000                	unimp
+80002084:	8800                	0x8800
+80002086:	000040c3          	fmadd.s	ft1,ft0,ft0,ft0,rmm
+8000208a:	0000                	unimp
+8000208c:	0000                	unimp
+8000208e:	0000                	unimp
+80002090:	0000                	unimp
+80002092:	0000                	unimp
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	4059                	c.li	zero,22
+
+800020a0 <test_16_data>:
+800020a0:	0000                	unimp
+800020a2:	0000                	unimp
+800020a4:	0000                	unimp
+800020a6:	bff0                	fsd	fa2,248(a5)
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	0000                	unimp
+800020b0:	0000                	unimp
+800020b2:	0000                	unimp
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	7ff8                	flw	fa4,124(a5)
+
+800020c0 <test_7_data>:
+800020c0:	0000                	unimp
+800020c2:	0000                	unimp
+800020c4:	6000                	flw	fs0,0(s0)
+800020c6:	4065                	c.li	zero,25
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	0000                	unimp
+800020d0:	0000                	unimp
+800020d2:	0000                	unimp
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	74f5                	lui	s1,0xffffd
+800020da:	ce96                	sw	t0,92(sp)
+800020dc:	2744                	fld	fs1,136(a4)
+800020de:	402a                	0x402a
+
+800020e0 <test_8_data>:
+800020e0:	a105                	j	80002500 <_end+0x400>
+800020e2:	c70a                	sw	sp,140(sp)
+800020e4:	94df 3e85 0000      	0x3e8594df
+800020ea:	0000                	unimp
+800020ec:	0000                	unimp
+800020ee:	0000                	unimp
+800020f0:	0000                	unimp
+800020f2:	0000                	unimp
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	7f99                	lui	t6,0xfffe6
+800020fa:	4789c0e3          	blt	s3,s8,80002d5a <_end+0xc5a>
+800020fe:	3f3a                	fld	ft10,424(sp)
diff --git a/test/riscv-tests/rv32ud-p-fdiv.elf b/test/riscv-tests/rv32ud-p-fdiv.elf
new file mode 100644
index 0000000..56fe7eb
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fdiv.elf
diff --git a/test/riscv-tests/rv32ud-p-fmadd.dump b/test/riscv-tests/rv32ud-p-fmadd.dump
new file mode 100644
index 0000000..c7fb072
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fmadd.dump
@@ -0,0 +1,555 @@
+
+rv32ud-p-fmadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00053007          	fld	ft0,0(a0)
+80000118:	00853087          	fld	ft1,8(a0)
+8000011c:	01053107          	fld	ft2,16(a0)
+80000120:	01852683          	lw	a3,24(a0)
+80000124:	01c52303          	lw	t1,28(a0)
+80000128:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+8000012c:	00353027          	fsd	ft3,0(a0)
+80000130:	00452383          	lw	t2,4(a0)
+80000134:	00052503          	lw	a0,0(a0)
+80000138:	001015f3          	fsflags	a1,zero
+8000013c:	00000613          	li	a2,0
+80000140:	2ed51e63          	bne	a0,a3,8000043c <fail>
+80000144:	2e731c63          	bne	t1,t2,8000043c <fail>
+80000148:	2ec59a63          	bne	a1,a2,8000043c <fail>
+
+8000014c <test_3>:
+8000014c:	00300193          	li	gp,3
+80000150:	00002517          	auipc	a0,0x2
+80000154:	ed050513          	addi	a0,a0,-304 # 80002020 <test_3_data>
+80000158:	00053007          	fld	ft0,0(a0)
+8000015c:	00853087          	fld	ft1,8(a0)
+80000160:	01053107          	fld	ft2,16(a0)
+80000164:	01852683          	lw	a3,24(a0)
+80000168:	01c52303          	lw	t1,28(a0)
+8000016c:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+80000170:	00353027          	fsd	ft3,0(a0)
+80000174:	00452383          	lw	t2,4(a0)
+80000178:	00052503          	lw	a0,0(a0)
+8000017c:	001015f3          	fsflags	a1,zero
+80000180:	00100613          	li	a2,1
+80000184:	2ad51c63          	bne	a0,a3,8000043c <fail>
+80000188:	2a731a63          	bne	t1,t2,8000043c <fail>
+8000018c:	2ac59863          	bne	a1,a2,8000043c <fail>
+
+80000190 <test_4>:
+80000190:	00400193          	li	gp,4
+80000194:	00002517          	auipc	a0,0x2
+80000198:	eac50513          	addi	a0,a0,-340 # 80002040 <test_4_data>
+8000019c:	00053007          	fld	ft0,0(a0)
+800001a0:	00853087          	fld	ft1,8(a0)
+800001a4:	01053107          	fld	ft2,16(a0)
+800001a8:	01852683          	lw	a3,24(a0)
+800001ac:	01c52303          	lw	t1,28(a0)
+800001b0:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+800001b4:	00353027          	fsd	ft3,0(a0)
+800001b8:	00452383          	lw	t2,4(a0)
+800001bc:	00052503          	lw	a0,0(a0)
+800001c0:	001015f3          	fsflags	a1,zero
+800001c4:	00000613          	li	a2,0
+800001c8:	26d51a63          	bne	a0,a3,8000043c <fail>
+800001cc:	26731863          	bne	t1,t2,8000043c <fail>
+800001d0:	26c59663          	bne	a1,a2,8000043c <fail>
+
+800001d4 <test_5>:
+800001d4:	00500193          	li	gp,5
+800001d8:	00002517          	auipc	a0,0x2
+800001dc:	e8850513          	addi	a0,a0,-376 # 80002060 <test_5_data>
+800001e0:	00053007          	fld	ft0,0(a0)
+800001e4:	00853087          	fld	ft1,8(a0)
+800001e8:	01053107          	fld	ft2,16(a0)
+800001ec:	01852683          	lw	a3,24(a0)
+800001f0:	01c52303          	lw	t1,28(a0)
+800001f4:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+800001f8:	00353027          	fsd	ft3,0(a0)
+800001fc:	00452383          	lw	t2,4(a0)
+80000200:	00052503          	lw	a0,0(a0)
+80000204:	001015f3          	fsflags	a1,zero
+80000208:	00000613          	li	a2,0
+8000020c:	22d51863          	bne	a0,a3,8000043c <fail>
+80000210:	22731663          	bne	t1,t2,8000043c <fail>
+80000214:	22c59463          	bne	a1,a2,8000043c <fail>
+
+80000218 <test_6>:
+80000218:	00600193          	li	gp,6
+8000021c:	00002517          	auipc	a0,0x2
+80000220:	e6450513          	addi	a0,a0,-412 # 80002080 <test_6_data>
+80000224:	00053007          	fld	ft0,0(a0)
+80000228:	00853087          	fld	ft1,8(a0)
+8000022c:	01053107          	fld	ft2,16(a0)
+80000230:	01852683          	lw	a3,24(a0)
+80000234:	01c52303          	lw	t1,28(a0)
+80000238:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+8000023c:	00353027          	fsd	ft3,0(a0)
+80000240:	00452383          	lw	t2,4(a0)
+80000244:	00052503          	lw	a0,0(a0)
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00100613          	li	a2,1
+80000250:	1ed51663          	bne	a0,a3,8000043c <fail>
+80000254:	1e731463          	bne	t1,t2,8000043c <fail>
+80000258:	1ec59263          	bne	a1,a2,8000043c <fail>
+
+8000025c <test_7>:
+8000025c:	00700193          	li	gp,7
+80000260:	00002517          	auipc	a0,0x2
+80000264:	e4050513          	addi	a0,a0,-448 # 800020a0 <test_7_data>
+80000268:	00053007          	fld	ft0,0(a0)
+8000026c:	00853087          	fld	ft1,8(a0)
+80000270:	01053107          	fld	ft2,16(a0)
+80000274:	01852683          	lw	a3,24(a0)
+80000278:	01c52303          	lw	t1,28(a0)
+8000027c:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+80000280:	00353027          	fsd	ft3,0(a0)
+80000284:	00452383          	lw	t2,4(a0)
+80000288:	00052503          	lw	a0,0(a0)
+8000028c:	001015f3          	fsflags	a1,zero
+80000290:	00000613          	li	a2,0
+80000294:	1ad51463          	bne	a0,a3,8000043c <fail>
+80000298:	1a731263          	bne	t1,t2,8000043c <fail>
+8000029c:	1ac59063          	bne	a1,a2,8000043c <fail>
+
+800002a0 <test_8>:
+800002a0:	00800193          	li	gp,8
+800002a4:	00002517          	auipc	a0,0x2
+800002a8:	e1c50513          	addi	a0,a0,-484 # 800020c0 <test_8_data>
+800002ac:	00053007          	fld	ft0,0(a0)
+800002b0:	00853087          	fld	ft1,8(a0)
+800002b4:	01053107          	fld	ft2,16(a0)
+800002b8:	01852683          	lw	a3,24(a0)
+800002bc:	01c52303          	lw	t1,28(a0)
+800002c0:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+800002c4:	00353027          	fsd	ft3,0(a0)
+800002c8:	00452383          	lw	t2,4(a0)
+800002cc:	00052503          	lw	a0,0(a0)
+800002d0:	001015f3          	fsflags	a1,zero
+800002d4:	00000613          	li	a2,0
+800002d8:	16d51263          	bne	a0,a3,8000043c <fail>
+800002dc:	16731063          	bne	t1,t2,8000043c <fail>
+800002e0:	14c59e63          	bne	a1,a2,8000043c <fail>
+
+800002e4 <test_9>:
+800002e4:	00900193          	li	gp,9
+800002e8:	00002517          	auipc	a0,0x2
+800002ec:	df850513          	addi	a0,a0,-520 # 800020e0 <test_9_data>
+800002f0:	00053007          	fld	ft0,0(a0)
+800002f4:	00853087          	fld	ft1,8(a0)
+800002f8:	01053107          	fld	ft2,16(a0)
+800002fc:	01852683          	lw	a3,24(a0)
+80000300:	01c52303          	lw	t1,28(a0)
+80000304:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+80000308:	00353027          	fsd	ft3,0(a0)
+8000030c:	00452383          	lw	t2,4(a0)
+80000310:	00052503          	lw	a0,0(a0)
+80000314:	001015f3          	fsflags	a1,zero
+80000318:	00100613          	li	a2,1
+8000031c:	12d51063          	bne	a0,a3,8000043c <fail>
+80000320:	10731e63          	bne	t1,t2,8000043c <fail>
+80000324:	10c59c63          	bne	a1,a2,8000043c <fail>
+
+80000328 <test_10>:
+80000328:	00a00193          	li	gp,10
+8000032c:	00002517          	auipc	a0,0x2
+80000330:	dd450513          	addi	a0,a0,-556 # 80002100 <test_10_data>
+80000334:	00053007          	fld	ft0,0(a0)
+80000338:	00853087          	fld	ft1,8(a0)
+8000033c:	01053107          	fld	ft2,16(a0)
+80000340:	01852683          	lw	a3,24(a0)
+80000344:	01c52303          	lw	t1,28(a0)
+80000348:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+8000034c:	00353027          	fsd	ft3,0(a0)
+80000350:	00452383          	lw	t2,4(a0)
+80000354:	00052503          	lw	a0,0(a0)
+80000358:	001015f3          	fsflags	a1,zero
+8000035c:	00000613          	li	a2,0
+80000360:	0cd51e63          	bne	a0,a3,8000043c <fail>
+80000364:	0c731c63          	bne	t1,t2,8000043c <fail>
+80000368:	0cc59a63          	bne	a1,a2,8000043c <fail>
+
+8000036c <test_11>:
+8000036c:	00b00193          	li	gp,11
+80000370:	00002517          	auipc	a0,0x2
+80000374:	db050513          	addi	a0,a0,-592 # 80002120 <test_11_data>
+80000378:	00053007          	fld	ft0,0(a0)
+8000037c:	00853087          	fld	ft1,8(a0)
+80000380:	01053107          	fld	ft2,16(a0)
+80000384:	01852683          	lw	a3,24(a0)
+80000388:	01c52303          	lw	t1,28(a0)
+8000038c:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+80000390:	00353027          	fsd	ft3,0(a0)
+80000394:	00452383          	lw	t2,4(a0)
+80000398:	00052503          	lw	a0,0(a0)
+8000039c:	001015f3          	fsflags	a1,zero
+800003a0:	00000613          	li	a2,0
+800003a4:	08d51c63          	bne	a0,a3,8000043c <fail>
+800003a8:	08731a63          	bne	t1,t2,8000043c <fail>
+800003ac:	08c59863          	bne	a1,a2,8000043c <fail>
+
+800003b0 <test_12>:
+800003b0:	00c00193          	li	gp,12
+800003b4:	00002517          	auipc	a0,0x2
+800003b8:	d8c50513          	addi	a0,a0,-628 # 80002140 <test_12_data>
+800003bc:	00053007          	fld	ft0,0(a0)
+800003c0:	00853087          	fld	ft1,8(a0)
+800003c4:	01053107          	fld	ft2,16(a0)
+800003c8:	01852683          	lw	a3,24(a0)
+800003cc:	01c52303          	lw	t1,28(a0)
+800003d0:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+800003d4:	00353027          	fsd	ft3,0(a0)
+800003d8:	00452383          	lw	t2,4(a0)
+800003dc:	00052503          	lw	a0,0(a0)
+800003e0:	001015f3          	fsflags	a1,zero
+800003e4:	00100613          	li	a2,1
+800003e8:	04d51a63          	bne	a0,a3,8000043c <fail>
+800003ec:	04731863          	bne	t1,t2,8000043c <fail>
+800003f0:	04c59663          	bne	a1,a2,8000043c <fail>
+
+800003f4 <test_13>:
+800003f4:	00d00193          	li	gp,13
+800003f8:	00002517          	auipc	a0,0x2
+800003fc:	d6850513          	addi	a0,a0,-664 # 80002160 <test_13_data>
+80000400:	00053007          	fld	ft0,0(a0)
+80000404:	00853087          	fld	ft1,8(a0)
+80000408:	01053107          	fld	ft2,16(a0)
+8000040c:	01852683          	lw	a3,24(a0)
+80000410:	01c52303          	lw	t1,28(a0)
+80000414:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+80000418:	00353027          	fsd	ft3,0(a0)
+8000041c:	00452383          	lw	t2,4(a0)
+80000420:	00052503          	lw	a0,0(a0)
+80000424:	001015f3          	fsflags	a1,zero
+80000428:	00000613          	li	a2,0
+8000042c:	00d51863          	bne	a0,a3,8000043c <fail>
+80000430:	00731663          	bne	t1,t2,8000043c <fail>
+80000434:	00c59463          	bne	a1,a2,8000043c <fail>
+80000438:	00301c63          	bne	zero,gp,80000450 <pass>
+
+8000043c <fail>:
+8000043c:	0ff0000f          	fence
+80000440:	00018063          	beqz	gp,80000440 <fail+0x4>
+80000444:	00119193          	slli	gp,gp,0x1
+80000448:	0011e193          	ori	gp,gp,1
+8000044c:	00000073          	ecall
+
+80000450 <pass>:
+80000450:	0ff0000f          	fence
+80000454:	00100193          	li	gp,1
+80000458:	00000073          	ecall
+8000045c:	c0001073          	unimp
+80000460:	0000                	unimp
+80000462:	0000                	unimp
+80000464:	0000                	unimp
+80000466:	0000                	unimp
+80000468:	0000                	unimp
+8000046a:	0000                	unimp
+8000046c:	0000                	unimp
+8000046e:	0000                	unimp
+80000470:	0000                	unimp
+80000472:	0000                	unimp
+80000474:	0000                	unimp
+80000476:	0000                	unimp
+80000478:	0000                	unimp
+8000047a:	0000                	unimp
+8000047c:	0000                	unimp
+8000047e:	0000                	unimp
+80000480:	0000                	unimp
+80000482:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	0000                	unimp
+80002004:	0000                	unimp
+80002006:	3ff0                	fld	fa2,248(a5)
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	4004                	lw	s1,0(s0)
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	3ff0                	fld	fa2,248(a5)
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	0000                	unimp
+8000201e:	400c                	lw	a1,0(s0)
+
+80002020 <test_3_data>:
+80002020:	0000                	unimp
+80002022:	0000                	unimp
+80002024:	0000                	unimp
+80002026:	bff0                	fsd	fa2,248(a5)
+80002028:	6666                	flw	fa2,88(sp)
+8000202a:	6666                	flw	fa2,88(sp)
+8000202c:	4c66                	lw	s8,88(sp)
+8000202e:	999ac093          	xori	ra,s5,-1639
+80002032:	9999                	andi	a1,a1,-26
+80002034:	9999                	andi	a1,a1,-26
+80002036:	3ff1                	jal	80002012 <test_2_data+0x12>
+80002038:	cccc                	sw	a1,28(s1)
+8000203a:	cccc                	sw	a1,28(s1)
+8000203c:	50cc                	lw	a1,36(s1)
+8000203e:	          	xori	ra,zero,0
+
+80002040 <test_4_data>:
+80002040:	0000                	unimp
+80002042:	0000                	unimp
+80002044:	0000                	unimp
+80002046:	4000                	lw	s0,0(s0)
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0000                	unimp
+8000204e:	c014                	sw	a3,0(s0)
+80002050:	0000                	unimp
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	c000                	sw	s0,0(s0)
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0000                	unimp
+8000205e:	c028                	sw	a0,64(s0)
+
+80002060 <test_5_data>:
+80002060:	0000                	unimp
+80002062:	0000                	unimp
+80002064:	0000                	unimp
+80002066:	3ff0                	fld	fa2,248(a5)
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	4004                	lw	s1,0(s0)
+80002070:	0000                	unimp
+80002072:	0000                	unimp
+80002074:	0000                	unimp
+80002076:	3ff0                	fld	fa2,248(a5)
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	0000                	unimp
+8000207e:	c00c                	sw	a1,0(s0)
+
+80002080 <test_6_data>:
+80002080:	0000                	unimp
+80002082:	0000                	unimp
+80002084:	0000                	unimp
+80002086:	bff0                	fsd	fa2,248(a5)
+80002088:	6666                	flw	fa2,88(sp)
+8000208a:	6666                	flw	fa2,88(sp)
+8000208c:	4c66                	lw	s8,88(sp)
+8000208e:	999ac093          	xori	ra,s5,-1639
+80002092:	9999                	andi	a1,a1,-26
+80002094:	9999                	andi	a1,a1,-26
+80002096:	3ff1                	jal	80002072 <test_5_data+0x12>
+80002098:	cccc                	sw	a1,28(s1)
+8000209a:	cccc                	sw	a1,28(s1)
+8000209c:	50cc                	lw	a1,36(s1)
+8000209e:	          	xori	ra,ra,0
+
+800020a0 <test_7_data>:
+800020a0:	0000                	unimp
+800020a2:	0000                	unimp
+800020a4:	0000                	unimp
+800020a6:	4000                	lw	s0,0(s0)
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	c014                	sw	a3,0(s0)
+800020b0:	0000                	unimp
+800020b2:	0000                	unimp
+800020b4:	0000                	unimp
+800020b6:	c000                	sw	s0,0(s0)
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	4028                	lw	a0,64(s0)
+
+800020c0 <test_8_data>:
+800020c0:	0000                	unimp
+800020c2:	0000                	unimp
+800020c4:	0000                	unimp
+800020c6:	3ff0                	fld	fa2,248(a5)
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	4004                	lw	s1,0(s0)
+800020d0:	0000                	unimp
+800020d2:	0000                	unimp
+800020d4:	0000                	unimp
+800020d6:	3ff0                	fld	fa2,248(a5)
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	3ff8                	fld	fa4,248(a5)
+
+800020e0 <test_9_data>:
+800020e0:	0000                	unimp
+800020e2:	0000                	unimp
+800020e4:	0000                	unimp
+800020e6:	bff0                	fsd	fa2,248(a5)
+800020e8:	6666                	flw	fa2,88(sp)
+800020ea:	6666                	flw	fa2,88(sp)
+800020ec:	4c66                	lw	s8,88(sp)
+800020ee:	999ac093          	xori	ra,s5,-1639
+800020f2:	9999                	andi	a1,a1,-26
+800020f4:	9999                	andi	a1,a1,-26
+800020f6:	3ff1                	jal	800020d2 <test_8_data+0x12>
+800020f8:	0000                	unimp
+800020fa:	0000                	unimp
+800020fc:	4800                	lw	s0,16(s0)
+800020fe:	          	xori	ra,zero,0
+
+80002100 <test_10_data>:
+80002100:	0000                	unimp
+80002102:	0000                	unimp
+80002104:	0000                	unimp
+80002106:	4000                	lw	s0,0(s0)
+80002108:	0000                	unimp
+8000210a:	0000                	unimp
+8000210c:	0000                	unimp
+8000210e:	c014                	sw	a3,0(s0)
+80002110:	0000                	unimp
+80002112:	0000                	unimp
+80002114:	0000                	unimp
+80002116:	c000                	sw	s0,0(s0)
+80002118:	0000                	unimp
+8000211a:	0000                	unimp
+8000211c:	0000                	unimp
+8000211e:	c020                	sw	s0,64(s0)
+
+80002120 <test_11_data>:
+80002120:	0000                	unimp
+80002122:	0000                	unimp
+80002124:	0000                	unimp
+80002126:	3ff0                	fld	fa2,248(a5)
+80002128:	0000                	unimp
+8000212a:	0000                	unimp
+8000212c:	0000                	unimp
+8000212e:	4004                	lw	s1,0(s0)
+80002130:	0000                	unimp
+80002132:	0000                	unimp
+80002134:	0000                	unimp
+80002136:	3ff0                	fld	fa2,248(a5)
+80002138:	0000                	unimp
+8000213a:	0000                	unimp
+8000213c:	0000                	unimp
+8000213e:	bff8                	fsd	fa4,248(a5)
+
+80002140 <test_12_data>:
+80002140:	0000                	unimp
+80002142:	0000                	unimp
+80002144:	0000                	unimp
+80002146:	bff0                	fsd	fa2,248(a5)
+80002148:	6666                	flw	fa2,88(sp)
+8000214a:	6666                	flw	fa2,88(sp)
+8000214c:	4c66                	lw	s8,88(sp)
+8000214e:	999ac093          	xori	ra,s5,-1639
+80002152:	9999                	andi	a1,a1,-26
+80002154:	9999                	andi	a1,a1,-26
+80002156:	3ff1                	jal	80002132 <test_11_data+0x12>
+80002158:	0000                	unimp
+8000215a:	0000                	unimp
+8000215c:	4800                	lw	s0,16(s0)
+8000215e:	          	xori	ra,ra,0
+
+80002160 <test_13_data>:
+80002160:	0000                	unimp
+80002162:	0000                	unimp
+80002164:	0000                	unimp
+80002166:	4000                	lw	s0,0(s0)
+80002168:	0000                	unimp
+8000216a:	0000                	unimp
+8000216c:	0000                	unimp
+8000216e:	c014                	sw	a3,0(s0)
+80002170:	0000                	unimp
+80002172:	0000                	unimp
+80002174:	0000                	unimp
+80002176:	c000                	sw	s0,0(s0)
+80002178:	0000                	unimp
+8000217a:	0000                	unimp
+8000217c:	0000                	unimp
+8000217e:	4020                	lw	s0,64(s0)
diff --git a/test/riscv-tests/rv32ud-p-fmadd.elf b/test/riscv-tests/rv32ud-p-fmadd.elf
new file mode 100644
index 0000000..33a8d12
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fmadd.elf
diff --git a/test/riscv-tests/rv32ud-p-fmin.dump b/test/riscv-tests/rv32ud-p-fmin.dump
new file mode 100644
index 0000000..359df06
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fmin.dump
@@ -0,0 +1,760 @@
+
+rv32ud-p-fmin:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00053007          	fld	ft0,0(a0)
+80000118:	00853087          	fld	ft1,8(a0)
+8000011c:	01053107          	fld	ft2,16(a0)
+80000120:	01852683          	lw	a3,24(a0)
+80000124:	01c52303          	lw	t1,28(a0)
+80000128:	2a1001d3          	fmin.d	ft3,ft0,ft1
+8000012c:	00353027          	fsd	ft3,0(a0)
+80000130:	00452383          	lw	t2,4(a0)
+80000134:	00052503          	lw	a0,0(a0)
+80000138:	001015f3          	fsflags	a1,zero
+8000013c:	00000613          	li	a2,0
+80000140:	48d51a63          	bne	a0,a3,800005d4 <fail>
+80000144:	48731863          	bne	t1,t2,800005d4 <fail>
+80000148:	48c59663          	bne	a1,a2,800005d4 <fail>
+
+8000014c <test_3>:
+8000014c:	00300193          	li	gp,3
+80000150:	00002517          	auipc	a0,0x2
+80000154:	ed050513          	addi	a0,a0,-304 # 80002020 <test_3_data>
+80000158:	00053007          	fld	ft0,0(a0)
+8000015c:	00853087          	fld	ft1,8(a0)
+80000160:	01053107          	fld	ft2,16(a0)
+80000164:	01852683          	lw	a3,24(a0)
+80000168:	01c52303          	lw	t1,28(a0)
+8000016c:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80000170:	00353027          	fsd	ft3,0(a0)
+80000174:	00452383          	lw	t2,4(a0)
+80000178:	00052503          	lw	a0,0(a0)
+8000017c:	001015f3          	fsflags	a1,zero
+80000180:	00000613          	li	a2,0
+80000184:	44d51863          	bne	a0,a3,800005d4 <fail>
+80000188:	44731663          	bne	t1,t2,800005d4 <fail>
+8000018c:	44c59463          	bne	a1,a2,800005d4 <fail>
+
+80000190 <test_4>:
+80000190:	00400193          	li	gp,4
+80000194:	00002517          	auipc	a0,0x2
+80000198:	eac50513          	addi	a0,a0,-340 # 80002040 <test_4_data>
+8000019c:	00053007          	fld	ft0,0(a0)
+800001a0:	00853087          	fld	ft1,8(a0)
+800001a4:	01053107          	fld	ft2,16(a0)
+800001a8:	01852683          	lw	a3,24(a0)
+800001ac:	01c52303          	lw	t1,28(a0)
+800001b0:	2a1001d3          	fmin.d	ft3,ft0,ft1
+800001b4:	00353027          	fsd	ft3,0(a0)
+800001b8:	00452383          	lw	t2,4(a0)
+800001bc:	00052503          	lw	a0,0(a0)
+800001c0:	001015f3          	fsflags	a1,zero
+800001c4:	00000613          	li	a2,0
+800001c8:	40d51663          	bne	a0,a3,800005d4 <fail>
+800001cc:	40731463          	bne	t1,t2,800005d4 <fail>
+800001d0:	40c59263          	bne	a1,a2,800005d4 <fail>
+
+800001d4 <test_5>:
+800001d4:	00500193          	li	gp,5
+800001d8:	00002517          	auipc	a0,0x2
+800001dc:	e8850513          	addi	a0,a0,-376 # 80002060 <test_5_data>
+800001e0:	00053007          	fld	ft0,0(a0)
+800001e4:	00853087          	fld	ft1,8(a0)
+800001e8:	01053107          	fld	ft2,16(a0)
+800001ec:	01852683          	lw	a3,24(a0)
+800001f0:	01c52303          	lw	t1,28(a0)
+800001f4:	2a1001d3          	fmin.d	ft3,ft0,ft1
+800001f8:	00353027          	fsd	ft3,0(a0)
+800001fc:	00452383          	lw	t2,4(a0)
+80000200:	00052503          	lw	a0,0(a0)
+80000204:	001015f3          	fsflags	a1,zero
+80000208:	00000613          	li	a2,0
+8000020c:	3cd51463          	bne	a0,a3,800005d4 <fail>
+80000210:	3c731263          	bne	t1,t2,800005d4 <fail>
+80000214:	3cc59063          	bne	a1,a2,800005d4 <fail>
+
+80000218 <test_6>:
+80000218:	00600193          	li	gp,6
+8000021c:	00002517          	auipc	a0,0x2
+80000220:	e6450513          	addi	a0,a0,-412 # 80002080 <test_6_data>
+80000224:	00053007          	fld	ft0,0(a0)
+80000228:	00853087          	fld	ft1,8(a0)
+8000022c:	01053107          	fld	ft2,16(a0)
+80000230:	01852683          	lw	a3,24(a0)
+80000234:	01c52303          	lw	t1,28(a0)
+80000238:	2a1001d3          	fmin.d	ft3,ft0,ft1
+8000023c:	00353027          	fsd	ft3,0(a0)
+80000240:	00452383          	lw	t2,4(a0)
+80000244:	00052503          	lw	a0,0(a0)
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00000613          	li	a2,0
+80000250:	38d51263          	bne	a0,a3,800005d4 <fail>
+80000254:	38731063          	bne	t1,t2,800005d4 <fail>
+80000258:	36c59e63          	bne	a1,a2,800005d4 <fail>
+
+8000025c <test_7>:
+8000025c:	00700193          	li	gp,7
+80000260:	00002517          	auipc	a0,0x2
+80000264:	e4050513          	addi	a0,a0,-448 # 800020a0 <test_7_data>
+80000268:	00053007          	fld	ft0,0(a0)
+8000026c:	00853087          	fld	ft1,8(a0)
+80000270:	01053107          	fld	ft2,16(a0)
+80000274:	01852683          	lw	a3,24(a0)
+80000278:	01c52303          	lw	t1,28(a0)
+8000027c:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80000280:	00353027          	fsd	ft3,0(a0)
+80000284:	00452383          	lw	t2,4(a0)
+80000288:	00052503          	lw	a0,0(a0)
+8000028c:	001015f3          	fsflags	a1,zero
+80000290:	00000613          	li	a2,0
+80000294:	34d51063          	bne	a0,a3,800005d4 <fail>
+80000298:	32731e63          	bne	t1,t2,800005d4 <fail>
+8000029c:	32c59c63          	bne	a1,a2,800005d4 <fail>
+
+800002a0 <test_12>:
+800002a0:	00c00193          	li	gp,12
+800002a4:	00002517          	auipc	a0,0x2
+800002a8:	e1c50513          	addi	a0,a0,-484 # 800020c0 <test_12_data>
+800002ac:	00053007          	fld	ft0,0(a0)
+800002b0:	00853087          	fld	ft1,8(a0)
+800002b4:	01053107          	fld	ft2,16(a0)
+800002b8:	01852683          	lw	a3,24(a0)
+800002bc:	01c52303          	lw	t1,28(a0)
+800002c0:	2a1011d3          	fmax.d	ft3,ft0,ft1
+800002c4:	00353027          	fsd	ft3,0(a0)
+800002c8:	00452383          	lw	t2,4(a0)
+800002cc:	00052503          	lw	a0,0(a0)
+800002d0:	001015f3          	fsflags	a1,zero
+800002d4:	00000613          	li	a2,0
+800002d8:	2ed51e63          	bne	a0,a3,800005d4 <fail>
+800002dc:	2e731c63          	bne	t1,t2,800005d4 <fail>
+800002e0:	2ec59a63          	bne	a1,a2,800005d4 <fail>
+
+800002e4 <test_13>:
+800002e4:	00d00193          	li	gp,13
+800002e8:	00002517          	auipc	a0,0x2
+800002ec:	df850513          	addi	a0,a0,-520 # 800020e0 <test_13_data>
+800002f0:	00053007          	fld	ft0,0(a0)
+800002f4:	00853087          	fld	ft1,8(a0)
+800002f8:	01053107          	fld	ft2,16(a0)
+800002fc:	01852683          	lw	a3,24(a0)
+80000300:	01c52303          	lw	t1,28(a0)
+80000304:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80000308:	00353027          	fsd	ft3,0(a0)
+8000030c:	00452383          	lw	t2,4(a0)
+80000310:	00052503          	lw	a0,0(a0)
+80000314:	001015f3          	fsflags	a1,zero
+80000318:	00000613          	li	a2,0
+8000031c:	2ad51c63          	bne	a0,a3,800005d4 <fail>
+80000320:	2a731a63          	bne	t1,t2,800005d4 <fail>
+80000324:	2ac59863          	bne	a1,a2,800005d4 <fail>
+
+80000328 <test_14>:
+80000328:	00e00193          	li	gp,14
+8000032c:	00002517          	auipc	a0,0x2
+80000330:	dd450513          	addi	a0,a0,-556 # 80002100 <test_14_data>
+80000334:	00053007          	fld	ft0,0(a0)
+80000338:	00853087          	fld	ft1,8(a0)
+8000033c:	01053107          	fld	ft2,16(a0)
+80000340:	01852683          	lw	a3,24(a0)
+80000344:	01c52303          	lw	t1,28(a0)
+80000348:	2a1011d3          	fmax.d	ft3,ft0,ft1
+8000034c:	00353027          	fsd	ft3,0(a0)
+80000350:	00452383          	lw	t2,4(a0)
+80000354:	00052503          	lw	a0,0(a0)
+80000358:	001015f3          	fsflags	a1,zero
+8000035c:	00000613          	li	a2,0
+80000360:	26d51a63          	bne	a0,a3,800005d4 <fail>
+80000364:	26731863          	bne	t1,t2,800005d4 <fail>
+80000368:	26c59663          	bne	a1,a2,800005d4 <fail>
+
+8000036c <test_15>:
+8000036c:	00f00193          	li	gp,15
+80000370:	00002517          	auipc	a0,0x2
+80000374:	db050513          	addi	a0,a0,-592 # 80002120 <test_15_data>
+80000378:	00053007          	fld	ft0,0(a0)
+8000037c:	00853087          	fld	ft1,8(a0)
+80000380:	01053107          	fld	ft2,16(a0)
+80000384:	01852683          	lw	a3,24(a0)
+80000388:	01c52303          	lw	t1,28(a0)
+8000038c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80000390:	00353027          	fsd	ft3,0(a0)
+80000394:	00452383          	lw	t2,4(a0)
+80000398:	00052503          	lw	a0,0(a0)
+8000039c:	001015f3          	fsflags	a1,zero
+800003a0:	00000613          	li	a2,0
+800003a4:	22d51863          	bne	a0,a3,800005d4 <fail>
+800003a8:	22731663          	bne	t1,t2,800005d4 <fail>
+800003ac:	22c59463          	bne	a1,a2,800005d4 <fail>
+
+800003b0 <test_16>:
+800003b0:	01000193          	li	gp,16
+800003b4:	00002517          	auipc	a0,0x2
+800003b8:	d8c50513          	addi	a0,a0,-628 # 80002140 <test_16_data>
+800003bc:	00053007          	fld	ft0,0(a0)
+800003c0:	00853087          	fld	ft1,8(a0)
+800003c4:	01053107          	fld	ft2,16(a0)
+800003c8:	01852683          	lw	a3,24(a0)
+800003cc:	01c52303          	lw	t1,28(a0)
+800003d0:	2a1011d3          	fmax.d	ft3,ft0,ft1
+800003d4:	00353027          	fsd	ft3,0(a0)
+800003d8:	00452383          	lw	t2,4(a0)
+800003dc:	00052503          	lw	a0,0(a0)
+800003e0:	001015f3          	fsflags	a1,zero
+800003e4:	00000613          	li	a2,0
+800003e8:	1ed51663          	bne	a0,a3,800005d4 <fail>
+800003ec:	1e731463          	bne	t1,t2,800005d4 <fail>
+800003f0:	1ec59263          	bne	a1,a2,800005d4 <fail>
+
+800003f4 <test_17>:
+800003f4:	01100193          	li	gp,17
+800003f8:	00002517          	auipc	a0,0x2
+800003fc:	d6850513          	addi	a0,a0,-664 # 80002160 <test_17_data>
+80000400:	00053007          	fld	ft0,0(a0)
+80000404:	00853087          	fld	ft1,8(a0)
+80000408:	01053107          	fld	ft2,16(a0)
+8000040c:	01852683          	lw	a3,24(a0)
+80000410:	01c52303          	lw	t1,28(a0)
+80000414:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80000418:	00353027          	fsd	ft3,0(a0)
+8000041c:	00452383          	lw	t2,4(a0)
+80000420:	00052503          	lw	a0,0(a0)
+80000424:	001015f3          	fsflags	a1,zero
+80000428:	00000613          	li	a2,0
+8000042c:	1ad51463          	bne	a0,a3,800005d4 <fail>
+80000430:	1a731263          	bne	t1,t2,800005d4 <fail>
+80000434:	1ac59063          	bne	a1,a2,800005d4 <fail>
+
+80000438 <test_20>:
+80000438:	01400193          	li	gp,20
+8000043c:	00002517          	auipc	a0,0x2
+80000440:	d4450513          	addi	a0,a0,-700 # 80002180 <test_20_data>
+80000444:	00053007          	fld	ft0,0(a0)
+80000448:	00853087          	fld	ft1,8(a0)
+8000044c:	01053107          	fld	ft2,16(a0)
+80000450:	01852683          	lw	a3,24(a0)
+80000454:	01c52303          	lw	t1,28(a0)
+80000458:	2a1011d3          	fmax.d	ft3,ft0,ft1
+8000045c:	00353027          	fsd	ft3,0(a0)
+80000460:	00452383          	lw	t2,4(a0)
+80000464:	00052503          	lw	a0,0(a0)
+80000468:	001015f3          	fsflags	a1,zero
+8000046c:	01000613          	li	a2,16
+80000470:	16d51263          	bne	a0,a3,800005d4 <fail>
+80000474:	16731063          	bne	t1,t2,800005d4 <fail>
+80000478:	14c59e63          	bne	a1,a2,800005d4 <fail>
+
+8000047c <test_21>:
+8000047c:	01500193          	li	gp,21
+80000480:	00002517          	auipc	a0,0x2
+80000484:	d2050513          	addi	a0,a0,-736 # 800021a0 <test_21_data>
+80000488:	00053007          	fld	ft0,0(a0)
+8000048c:	00853087          	fld	ft1,8(a0)
+80000490:	01053107          	fld	ft2,16(a0)
+80000494:	01852683          	lw	a3,24(a0)
+80000498:	01c52303          	lw	t1,28(a0)
+8000049c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+800004a0:	00353027          	fsd	ft3,0(a0)
+800004a4:	00452383          	lw	t2,4(a0)
+800004a8:	00052503          	lw	a0,0(a0)
+800004ac:	001015f3          	fsflags	a1,zero
+800004b0:	00000613          	li	a2,0
+800004b4:	12d51063          	bne	a0,a3,800005d4 <fail>
+800004b8:	10731e63          	bne	t1,t2,800005d4 <fail>
+800004bc:	10c59c63          	bne	a1,a2,800005d4 <fail>
+
+800004c0 <test_30>:
+800004c0:	01e00193          	li	gp,30
+800004c4:	00002517          	auipc	a0,0x2
+800004c8:	cfc50513          	addi	a0,a0,-772 # 800021c0 <test_30_data>
+800004cc:	00053007          	fld	ft0,0(a0)
+800004d0:	00853087          	fld	ft1,8(a0)
+800004d4:	01053107          	fld	ft2,16(a0)
+800004d8:	01852683          	lw	a3,24(a0)
+800004dc:	01c52303          	lw	t1,28(a0)
+800004e0:	2a1001d3          	fmin.d	ft3,ft0,ft1
+800004e4:	00353027          	fsd	ft3,0(a0)
+800004e8:	00452383          	lw	t2,4(a0)
+800004ec:	00052503          	lw	a0,0(a0)
+800004f0:	001015f3          	fsflags	a1,zero
+800004f4:	00000613          	li	a2,0
+800004f8:	0cd51e63          	bne	a0,a3,800005d4 <fail>
+800004fc:	0c731c63          	bne	t1,t2,800005d4 <fail>
+80000500:	0cc59a63          	bne	a1,a2,800005d4 <fail>
+
+80000504 <test_31>:
+80000504:	01f00193          	li	gp,31
+80000508:	00002517          	auipc	a0,0x2
+8000050c:	cd850513          	addi	a0,a0,-808 # 800021e0 <test_31_data>
+80000510:	00053007          	fld	ft0,0(a0)
+80000514:	00853087          	fld	ft1,8(a0)
+80000518:	01053107          	fld	ft2,16(a0)
+8000051c:	01852683          	lw	a3,24(a0)
+80000520:	01c52303          	lw	t1,28(a0)
+80000524:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80000528:	00353027          	fsd	ft3,0(a0)
+8000052c:	00452383          	lw	t2,4(a0)
+80000530:	00052503          	lw	a0,0(a0)
+80000534:	001015f3          	fsflags	a1,zero
+80000538:	00000613          	li	a2,0
+8000053c:	08d51c63          	bne	a0,a3,800005d4 <fail>
+80000540:	08731a63          	bne	t1,t2,800005d4 <fail>
+80000544:	08c59863          	bne	a1,a2,800005d4 <fail>
+
+80000548 <test_32>:
+80000548:	02000193          	li	gp,32
+8000054c:	00002517          	auipc	a0,0x2
+80000550:	cb450513          	addi	a0,a0,-844 # 80002200 <test_32_data>
+80000554:	00053007          	fld	ft0,0(a0)
+80000558:	00853087          	fld	ft1,8(a0)
+8000055c:	01053107          	fld	ft2,16(a0)
+80000560:	01852683          	lw	a3,24(a0)
+80000564:	01c52303          	lw	t1,28(a0)
+80000568:	2a1011d3          	fmax.d	ft3,ft0,ft1
+8000056c:	00353027          	fsd	ft3,0(a0)
+80000570:	00452383          	lw	t2,4(a0)
+80000574:	00052503          	lw	a0,0(a0)
+80000578:	001015f3          	fsflags	a1,zero
+8000057c:	00000613          	li	a2,0
+80000580:	04d51a63          	bne	a0,a3,800005d4 <fail>
+80000584:	04731863          	bne	t1,t2,800005d4 <fail>
+80000588:	04c59663          	bne	a1,a2,800005d4 <fail>
+
+8000058c <test_33>:
+8000058c:	02100193          	li	gp,33
+80000590:	00002517          	auipc	a0,0x2
+80000594:	c9050513          	addi	a0,a0,-880 # 80002220 <test_33_data>
+80000598:	00053007          	fld	ft0,0(a0)
+8000059c:	00853087          	fld	ft1,8(a0)
+800005a0:	01053107          	fld	ft2,16(a0)
+800005a4:	01852683          	lw	a3,24(a0)
+800005a8:	01c52303          	lw	t1,28(a0)
+800005ac:	2a1011d3          	fmax.d	ft3,ft0,ft1
+800005b0:	00353027          	fsd	ft3,0(a0)
+800005b4:	00452383          	lw	t2,4(a0)
+800005b8:	00052503          	lw	a0,0(a0)
+800005bc:	001015f3          	fsflags	a1,zero
+800005c0:	00000613          	li	a2,0
+800005c4:	00d51863          	bne	a0,a3,800005d4 <fail>
+800005c8:	00731663          	bne	t1,t2,800005d4 <fail>
+800005cc:	00c59463          	bne	a1,a2,800005d4 <fail>
+800005d0:	00301c63          	bne	zero,gp,800005e8 <pass>
+
+800005d4 <fail>:
+800005d4:	0ff0000f          	fence
+800005d8:	00018063          	beqz	gp,800005d8 <fail+0x4>
+800005dc:	00119193          	slli	gp,gp,0x1
+800005e0:	0011e193          	ori	gp,gp,1
+800005e4:	00000073          	ecall
+
+800005e8 <pass>:
+800005e8:	0ff0000f          	fence
+800005ec:	00100193          	li	gp,1
+800005f0:	00000073          	ecall
+800005f4:	c0001073          	unimp
+800005f8:	0000                	unimp
+800005fa:	0000                	unimp
+800005fc:	0000                	unimp
+800005fe:	0000                	unimp
+80000600:	0000                	unimp
+80000602:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	0000                	unimp
+80002004:	0000                	unimp
+80002006:	4004                	lw	s1,0(s0)
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	3ff0                	fld	fa2,248(a5)
+80002010:	0000                	unimp
+80002012:	0000                	unimp
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	0000                	unimp
+8000201e:	3ff0                	fld	fa2,248(a5)
+
+80002020 <test_3_data>:
+80002020:	6666                	flw	fa2,88(sp)
+80002022:	6666                	flw	fa2,88(sp)
+80002024:	4c66                	lw	s8,88(sp)
+80002026:	999ac093          	xori	ra,s5,-1639
+8000202a:	9999                	andi	a1,a1,-26
+8000202c:	9999                	andi	a1,a1,-26
+8000202e:	3ff1                	jal	8000200a <test_2_data+0xa>
+80002030:	0000                	unimp
+80002032:	0000                	unimp
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	6666                	flw	fa2,88(sp)
+8000203a:	6666                	flw	fa2,88(sp)
+8000203c:	4c66                	lw	s8,88(sp)
+8000203e:	          	xori	ra,s5,-1639
+
+80002040 <test_4_data>:
+80002040:	999a                	add	s3,s3,t1
+80002042:	9999                	andi	a1,a1,-26
+80002044:	9999                	andi	a1,a1,-26
+80002046:	3ff1                	jal	80002022 <test_3_data+0x2>
+80002048:	6666                	flw	fa2,88(sp)
+8000204a:	6666                	flw	fa2,88(sp)
+8000204c:	4c66                	lw	s8,88(sp)
+8000204e:	0000c093          	xori	ra,ra,0
+80002052:	0000                	unimp
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	6666                	flw	fa2,88(sp)
+8000205a:	6666                	flw	fa2,88(sp)
+8000205c:	4c66                	lw	s8,88(sp)
+8000205e:	          	not	ra,t6
+
+80002060 <test_5_data>:
+80002060:	ffff                	0xffff
+80002062:	ffff                	0xffff
+80002064:	ffff                	0xffff
+80002066:	7fff                	0x7fff
+80002068:	6666                	flw	fa2,88(sp)
+8000206a:	6666                	flw	fa2,88(sp)
+8000206c:	4c66                	lw	s8,88(sp)
+8000206e:	0000c093          	xori	ra,ra,0
+80002072:	0000                	unimp
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	6666                	flw	fa2,88(sp)
+8000207a:	6666                	flw	fa2,88(sp)
+8000207c:	4c66                	lw	s8,88(sp)
+8000207e:	          	xori	ra,gp,-689
+
+80002080 <test_6_data>:
+80002080:	d4f1                	beqz	s1,8000204c <test_4_data+0xc>
+80002082:	53c8                	lw	a0,36(a5)
+80002084:	400921fb          	0x400921fb
+80002088:	8c3a                	mv	s8,a4
+8000208a:	e230                	fsw	fa2,64(a2)
+8000208c:	798e                	flw	fs3,224(sp)
+8000208e:	3e45                	jal	80001c3e <fromhost+0xbfe>
+80002090:	0000                	unimp
+80002092:	0000                	unimp
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	8c3a                	mv	s8,a4
+8000209a:	e230                	fsw	fa2,64(a2)
+8000209c:	798e                	flw	fs3,224(sp)
+8000209e:	3e45                	jal	80001c4e <fromhost+0xc0e>
+
+800020a0 <test_7_data>:
+800020a0:	0000                	unimp
+800020a2:	0000                	unimp
+800020a4:	0000                	unimp
+800020a6:	bff0                	fsd	fa2,248(a5)
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	c000                	sw	s0,0(s0)
+800020b0:	0000                	unimp
+800020b2:	0000                	unimp
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	c000                	sw	s0,0(s0)
+
+800020c0 <test_12_data>:
+800020c0:	0000                	unimp
+800020c2:	0000                	unimp
+800020c4:	0000                	unimp
+800020c6:	4004                	lw	s1,0(s0)
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	3ff0                	fld	fa2,248(a5)
+800020d0:	0000                	unimp
+800020d2:	0000                	unimp
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	4004                	lw	s1,0(s0)
+
+800020e0 <test_13_data>:
+800020e0:	6666                	flw	fa2,88(sp)
+800020e2:	6666                	flw	fa2,88(sp)
+800020e4:	4c66                	lw	s8,88(sp)
+800020e6:	999ac093          	xori	ra,s5,-1639
+800020ea:	9999                	andi	a1,a1,-26
+800020ec:	9999                	andi	a1,a1,-26
+800020ee:	3ff1                	jal	800020ca <test_12_data+0xa>
+800020f0:	0000                	unimp
+800020f2:	0000                	unimp
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	999a                	add	s3,s3,t1
+800020fa:	9999                	andi	a1,a1,-26
+800020fc:	9999                	andi	a1,a1,-26
+800020fe:	3ff1                	jal	800020da <test_12_data+0x1a>
+
+80002100 <test_14_data>:
+80002100:	999a                	add	s3,s3,t1
+80002102:	9999                	andi	a1,a1,-26
+80002104:	9999                	andi	a1,a1,-26
+80002106:	3ff1                	jal	800020e2 <test_13_data+0x2>
+80002108:	6666                	flw	fa2,88(sp)
+8000210a:	6666                	flw	fa2,88(sp)
+8000210c:	4c66                	lw	s8,88(sp)
+8000210e:	0000c093          	xori	ra,ra,0
+80002112:	0000                	unimp
+80002114:	0000                	unimp
+80002116:	0000                	unimp
+80002118:	999a                	add	s3,s3,t1
+8000211a:	9999                	andi	a1,a1,-26
+8000211c:	9999                	andi	a1,a1,-26
+8000211e:	3ff1                	jal	800020fa <test_13_data+0x1a>
+
+80002120 <test_15_data>:
+80002120:	ffff                	0xffff
+80002122:	ffff                	0xffff
+80002124:	ffff                	0xffff
+80002126:	7fff                	0x7fff
+80002128:	6666                	flw	fa2,88(sp)
+8000212a:	6666                	flw	fa2,88(sp)
+8000212c:	4c66                	lw	s8,88(sp)
+8000212e:	0000c093          	xori	ra,ra,0
+80002132:	0000                	unimp
+80002134:	0000                	unimp
+80002136:	0000                	unimp
+80002138:	6666                	flw	fa2,88(sp)
+8000213a:	6666                	flw	fa2,88(sp)
+8000213c:	4c66                	lw	s8,88(sp)
+8000213e:	          	xori	ra,gp,-689
+
+80002140 <test_16_data>:
+80002140:	d4f1                	beqz	s1,8000210c <test_14_data+0xc>
+80002142:	53c8                	lw	a0,36(a5)
+80002144:	400921fb          	0x400921fb
+80002148:	8c3a                	mv	s8,a4
+8000214a:	e230                	fsw	fa2,64(a2)
+8000214c:	798e                	flw	fs3,224(sp)
+8000214e:	3e45                	jal	80001cfe <fromhost+0xcbe>
+80002150:	0000                	unimp
+80002152:	0000                	unimp
+80002154:	0000                	unimp
+80002156:	0000                	unimp
+80002158:	d4f1                	beqz	s1,80002124 <test_15_data+0x4>
+8000215a:	53c8                	lw	a0,36(a5)
+8000215c:	400921fb          	0x400921fb
+
+80002160 <test_17_data>:
+80002160:	0000                	unimp
+80002162:	0000                	unimp
+80002164:	0000                	unimp
+80002166:	bff0                	fsd	fa2,248(a5)
+80002168:	0000                	unimp
+8000216a:	0000                	unimp
+8000216c:	0000                	unimp
+8000216e:	c000                	sw	s0,0(s0)
+80002170:	0000                	unimp
+80002172:	0000                	unimp
+80002174:	0000                	unimp
+80002176:	0000                	unimp
+80002178:	0000                	unimp
+8000217a:	0000                	unimp
+8000217c:	0000                	unimp
+8000217e:	bff0                	fsd	fa2,248(a5)
+
+80002180 <test_20_data>:
+80002180:	0001                	nop
+80002182:	0000                	unimp
+80002184:	0000                	unimp
+80002186:	7ff0                	flw	fa2,124(a5)
+80002188:	0000                	unimp
+8000218a:	0000                	unimp
+8000218c:	0000                	unimp
+8000218e:	3ff0                	fld	fa2,248(a5)
+80002190:	0000                	unimp
+80002192:	0000                	unimp
+80002194:	0000                	unimp
+80002196:	0000                	unimp
+80002198:	0000                	unimp
+8000219a:	0000                	unimp
+8000219c:	0000                	unimp
+8000219e:	3ff0                	fld	fa2,248(a5)
+
+800021a0 <test_21_data>:
+800021a0:	ffff                	0xffff
+800021a2:	ffff                	0xffff
+800021a4:	ffff                	0xffff
+800021a6:	7fff                	0x7fff
+800021a8:	ffff                	0xffff
+800021aa:	ffff                	0xffff
+800021ac:	ffff                	0xffff
+800021ae:	7fff                	0x7fff
+800021b0:	0000                	unimp
+800021b2:	0000                	unimp
+800021b4:	0000                	unimp
+800021b6:	0000                	unimp
+800021b8:	0000                	unimp
+800021ba:	0000                	unimp
+800021bc:	0000                	unimp
+800021be:	7ff8                	flw	fa4,124(a5)
+
+800021c0 <test_30_data>:
+800021c0:	0000                	unimp
+800021c2:	0000                	unimp
+800021c4:	0000                	unimp
+800021c6:	8000                	0x8000
+800021c8:	0000                	unimp
+800021ca:	0000                	unimp
+800021cc:	0000                	unimp
+800021ce:	0000                	unimp
+800021d0:	0000                	unimp
+800021d2:	0000                	unimp
+800021d4:	0000                	unimp
+800021d6:	0000                	unimp
+800021d8:	0000                	unimp
+800021da:	0000                	unimp
+800021dc:	0000                	unimp
+800021de:	8000                	0x8000
+
+800021e0 <test_31_data>:
+800021e0:	0000                	unimp
+800021e2:	0000                	unimp
+800021e4:	0000                	unimp
+800021e6:	0000                	unimp
+800021e8:	0000                	unimp
+800021ea:	0000                	unimp
+800021ec:	0000                	unimp
+800021ee:	8000                	0x8000
+800021f0:	0000                	unimp
+800021f2:	0000                	unimp
+800021f4:	0000                	unimp
+800021f6:	0000                	unimp
+800021f8:	0000                	unimp
+800021fa:	0000                	unimp
+800021fc:	0000                	unimp
+800021fe:	8000                	0x8000
+
+80002200 <test_32_data>:
+80002200:	0000                	unimp
+80002202:	0000                	unimp
+80002204:	0000                	unimp
+80002206:	8000                	0x8000
+80002208:	0000                	unimp
+8000220a:	0000                	unimp
+8000220c:	0000                	unimp
+8000220e:	0000                	unimp
+80002210:	0000                	unimp
+80002212:	0000                	unimp
+80002214:	0000                	unimp
+80002216:	0000                	unimp
+80002218:	0000                	unimp
+8000221a:	0000                	unimp
+8000221c:	0000                	unimp
+8000221e:	0000                	unimp
+
+80002220 <test_33_data>:
+80002220:	0000                	unimp
+80002222:	0000                	unimp
+80002224:	0000                	unimp
+80002226:	0000                	unimp
+80002228:	0000                	unimp
+8000222a:	0000                	unimp
+8000222c:	0000                	unimp
+8000222e:	8000                	0x8000
+80002230:	0000                	unimp
+80002232:	0000                	unimp
+80002234:	0000                	unimp
+80002236:	0000                	unimp
+80002238:	0000                	unimp
+8000223a:	0000                	unimp
+8000223c:	0000                	unimp
+8000223e:	0000                	unimp
diff --git a/test/riscv-tests/rv32ud-p-fmin.elf b/test/riscv-tests/rv32ud-p-fmin.elf
new file mode 100644
index 0000000..1ff0304
--- /dev/null
+++ b/test/riscv-tests/rv32ud-p-fmin.elf
diff --git a/test/riscv-tests/rv32ud-v-fadd.dump b/test/riscv-tests/rv32ud-v-fadd.dump
new file mode 100644
index 0000000..0d3663f
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fadd.dump
@@ -0,0 +1,1273 @@
+
+rv32ud-v-fadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	9e458593          	addi	a1,a1,-1564 # 80002eac <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	a0058593          	addi	a1,a1,-1536 # 80002f38 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	9ac58593          	addi	a1,a1,-1620 # 80002f50 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	8e058593          	addi	a1,a1,-1824 # 80002ef0 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	8d058593          	addi	a1,a1,-1840 # 80003018 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	83858593          	addi	a1,a1,-1992 # 80002ff4 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	73460613          	addi	a2,a2,1844 # 80003044 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	64460613          	addi	a2,a2,1604 # 80002fc0 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	5c460613          	addi	a2,a2,1476 # 80002f8c <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	03300793          	li	a5,51
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0e7037b7          	lui	a5,0xe703
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	6e978793          	addi	a5,a5,1769 # e7036e9 <_start-0x718fc917>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00053007          	fld	ft0,0(a0)
+80002bf4:	00853087          	fld	ft1,8(a0)
+80002bf8:	01053107          	fld	ft2,16(a0)
+80002bfc:	01852683          	lw	a3,24(a0)
+80002c00:	01c52303          	lw	t1,28(a0)
+80002c04:	021071d3          	fadd.d	ft3,ft0,ft1
+80002c08:	00353027          	fsd	ft3,0(a0)
+80002c0c:	00452383          	lw	t2,4(a0)
+80002c10:	00052503          	lw	a0,0(a0)
+80002c14:	001015f3          	fsflags	a1,zero
+80002c18:	00000613          	li	a2,0
+80002c1c:	26d51a63          	bne	a0,a3,80002e90 <fail>
+80002c20:	26731863          	bne	t1,t2,80002e90 <fail>
+80002c24:	26c59663          	bne	a1,a2,80002e90 <fail>
+
+80002c28 <test_3>:
+80002c28:	00300193          	li	gp,3
+80002c2c:	00001517          	auipc	a0,0x1
+80002c30:	3f450513          	addi	a0,a0,1012 # 80004020 <test_3_data>
+80002c34:	00053007          	fld	ft0,0(a0)
+80002c38:	00853087          	fld	ft1,8(a0)
+80002c3c:	01053107          	fld	ft2,16(a0)
+80002c40:	01852683          	lw	a3,24(a0)
+80002c44:	01c52303          	lw	t1,28(a0)
+80002c48:	021071d3          	fadd.d	ft3,ft0,ft1
+80002c4c:	00353027          	fsd	ft3,0(a0)
+80002c50:	00452383          	lw	t2,4(a0)
+80002c54:	00052503          	lw	a0,0(a0)
+80002c58:	001015f3          	fsflags	a1,zero
+80002c5c:	00100613          	li	a2,1
+80002c60:	22d51863          	bne	a0,a3,80002e90 <fail>
+80002c64:	22731663          	bne	t1,t2,80002e90 <fail>
+80002c68:	22c59463          	bne	a1,a2,80002e90 <fail>
+
+80002c6c <test_4>:
+80002c6c:	00400193          	li	gp,4
+80002c70:	00001517          	auipc	a0,0x1
+80002c74:	3d050513          	addi	a0,a0,976 # 80004040 <test_4_data>
+80002c78:	00053007          	fld	ft0,0(a0)
+80002c7c:	00853087          	fld	ft1,8(a0)
+80002c80:	01053107          	fld	ft2,16(a0)
+80002c84:	01852683          	lw	a3,24(a0)
+80002c88:	01c52303          	lw	t1,28(a0)
+80002c8c:	021071d3          	fadd.d	ft3,ft0,ft1
+80002c90:	00353027          	fsd	ft3,0(a0)
+80002c94:	00452383          	lw	t2,4(a0)
+80002c98:	00052503          	lw	a0,0(a0)
+80002c9c:	001015f3          	fsflags	a1,zero
+80002ca0:	00100613          	li	a2,1
+80002ca4:	1ed51663          	bne	a0,a3,80002e90 <fail>
+80002ca8:	1e731463          	bne	t1,t2,80002e90 <fail>
+80002cac:	1ec59263          	bne	a1,a2,80002e90 <fail>
+
+80002cb0 <test_5>:
+80002cb0:	00500193          	li	gp,5
+80002cb4:	00001517          	auipc	a0,0x1
+80002cb8:	3ac50513          	addi	a0,a0,940 # 80004060 <test_5_data>
+80002cbc:	00053007          	fld	ft0,0(a0)
+80002cc0:	00853087          	fld	ft1,8(a0)
+80002cc4:	01053107          	fld	ft2,16(a0)
+80002cc8:	01852683          	lw	a3,24(a0)
+80002ccc:	01c52303          	lw	t1,28(a0)
+80002cd0:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80002cd4:	00353027          	fsd	ft3,0(a0)
+80002cd8:	00452383          	lw	t2,4(a0)
+80002cdc:	00052503          	lw	a0,0(a0)
+80002ce0:	001015f3          	fsflags	a1,zero
+80002ce4:	00000613          	li	a2,0
+80002ce8:	1ad51463          	bne	a0,a3,80002e90 <fail>
+80002cec:	1a731263          	bne	t1,t2,80002e90 <fail>
+80002cf0:	1ac59063          	bne	a1,a2,80002e90 <fail>
+
+80002cf4 <test_6>:
+80002cf4:	00600193          	li	gp,6
+80002cf8:	00001517          	auipc	a0,0x1
+80002cfc:	38850513          	addi	a0,a0,904 # 80004080 <test_6_data>
+80002d00:	00053007          	fld	ft0,0(a0)
+80002d04:	00853087          	fld	ft1,8(a0)
+80002d08:	01053107          	fld	ft2,16(a0)
+80002d0c:	01852683          	lw	a3,24(a0)
+80002d10:	01c52303          	lw	t1,28(a0)
+80002d14:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80002d18:	00353027          	fsd	ft3,0(a0)
+80002d1c:	00452383          	lw	t2,4(a0)
+80002d20:	00052503          	lw	a0,0(a0)
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00100613          	li	a2,1
+80002d2c:	16d51263          	bne	a0,a3,80002e90 <fail>
+80002d30:	16731063          	bne	t1,t2,80002e90 <fail>
+80002d34:	14c59e63          	bne	a1,a2,80002e90 <fail>
+
+80002d38 <test_7>:
+80002d38:	00700193          	li	gp,7
+80002d3c:	00001517          	auipc	a0,0x1
+80002d40:	36450513          	addi	a0,a0,868 # 800040a0 <test_7_data>
+80002d44:	00053007          	fld	ft0,0(a0)
+80002d48:	00853087          	fld	ft1,8(a0)
+80002d4c:	01053107          	fld	ft2,16(a0)
+80002d50:	01852683          	lw	a3,24(a0)
+80002d54:	01c52303          	lw	t1,28(a0)
+80002d58:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80002d5c:	00353027          	fsd	ft3,0(a0)
+80002d60:	00452383          	lw	t2,4(a0)
+80002d64:	00052503          	lw	a0,0(a0)
+80002d68:	001015f3          	fsflags	a1,zero
+80002d6c:	00100613          	li	a2,1
+80002d70:	12d51063          	bne	a0,a3,80002e90 <fail>
+80002d74:	10731e63          	bne	t1,t2,80002e90 <fail>
+80002d78:	10c59c63          	bne	a1,a2,80002e90 <fail>
+
+80002d7c <test_8>:
+80002d7c:	00800193          	li	gp,8
+80002d80:	00001517          	auipc	a0,0x1
+80002d84:	34050513          	addi	a0,a0,832 # 800040c0 <test_8_data>
+80002d88:	00053007          	fld	ft0,0(a0)
+80002d8c:	00853087          	fld	ft1,8(a0)
+80002d90:	01053107          	fld	ft2,16(a0)
+80002d94:	01852683          	lw	a3,24(a0)
+80002d98:	01c52303          	lw	t1,28(a0)
+80002d9c:	121071d3          	fmul.d	ft3,ft0,ft1
+80002da0:	00353027          	fsd	ft3,0(a0)
+80002da4:	00452383          	lw	t2,4(a0)
+80002da8:	00052503          	lw	a0,0(a0)
+80002dac:	001015f3          	fsflags	a1,zero
+80002db0:	00000613          	li	a2,0
+80002db4:	0cd51e63          	bne	a0,a3,80002e90 <fail>
+80002db8:	0c731c63          	bne	t1,t2,80002e90 <fail>
+80002dbc:	0cc59a63          	bne	a1,a2,80002e90 <fail>
+
+80002dc0 <test_9>:
+80002dc0:	00900193          	li	gp,9
+80002dc4:	00001517          	auipc	a0,0x1
+80002dc8:	31c50513          	addi	a0,a0,796 # 800040e0 <test_9_data>
+80002dcc:	00053007          	fld	ft0,0(a0)
+80002dd0:	00853087          	fld	ft1,8(a0)
+80002dd4:	01053107          	fld	ft2,16(a0)
+80002dd8:	01852683          	lw	a3,24(a0)
+80002ddc:	01c52303          	lw	t1,28(a0)
+80002de0:	121071d3          	fmul.d	ft3,ft0,ft1
+80002de4:	00353027          	fsd	ft3,0(a0)
+80002de8:	00452383          	lw	t2,4(a0)
+80002dec:	00052503          	lw	a0,0(a0)
+80002df0:	001015f3          	fsflags	a1,zero
+80002df4:	00100613          	li	a2,1
+80002df8:	08d51c63          	bne	a0,a3,80002e90 <fail>
+80002dfc:	08731a63          	bne	t1,t2,80002e90 <fail>
+80002e00:	08c59863          	bne	a1,a2,80002e90 <fail>
+
+80002e04 <test_10>:
+80002e04:	00a00193          	li	gp,10
+80002e08:	00001517          	auipc	a0,0x1
+80002e0c:	2f850513          	addi	a0,a0,760 # 80004100 <test_10_data>
+80002e10:	00053007          	fld	ft0,0(a0)
+80002e14:	00853087          	fld	ft1,8(a0)
+80002e18:	01053107          	fld	ft2,16(a0)
+80002e1c:	01852683          	lw	a3,24(a0)
+80002e20:	01c52303          	lw	t1,28(a0)
+80002e24:	121071d3          	fmul.d	ft3,ft0,ft1
+80002e28:	00353027          	fsd	ft3,0(a0)
+80002e2c:	00452383          	lw	t2,4(a0)
+80002e30:	00052503          	lw	a0,0(a0)
+80002e34:	001015f3          	fsflags	a1,zero
+80002e38:	00100613          	li	a2,1
+80002e3c:	04d51a63          	bne	a0,a3,80002e90 <fail>
+80002e40:	04731863          	bne	t1,t2,80002e90 <fail>
+80002e44:	04c59663          	bne	a1,a2,80002e90 <fail>
+
+80002e48 <test_11>:
+80002e48:	00b00193          	li	gp,11
+80002e4c:	00001517          	auipc	a0,0x1
+80002e50:	2d450513          	addi	a0,a0,724 # 80004120 <test_11_data>
+80002e54:	00053007          	fld	ft0,0(a0)
+80002e58:	00853087          	fld	ft1,8(a0)
+80002e5c:	01053107          	fld	ft2,16(a0)
+80002e60:	01852683          	lw	a3,24(a0)
+80002e64:	01c52303          	lw	t1,28(a0)
+80002e68:	0a1071d3          	fsub.d	ft3,ft0,ft1
+80002e6c:	00353027          	fsd	ft3,0(a0)
+80002e70:	00452383          	lw	t2,4(a0)
+80002e74:	00052503          	lw	a0,0(a0)
+80002e78:	001015f3          	fsflags	a1,zero
+80002e7c:	01000613          	li	a2,16
+80002e80:	00d51863          	bne	a0,a3,80002e90 <fail>
+80002e84:	00731663          	bne	t1,t2,80002e90 <fail>
+80002e88:	00c59463          	bne	a1,a2,80002e90 <fail>
+80002e8c:	00301a63          	bne	zero,gp,80002ea0 <pass>
+
+80002e90 <fail>:
+80002e90:	00119513          	slli	a0,gp,0x1
+80002e94:	00050063          	beqz	a0,80002e94 <fail+0x4>
+80002e98:	00156513          	ori	a0,a0,1
+80002e9c:	00000073          	ecall
+
+80002ea0 <pass>:
+80002ea0:	00100513          	li	a0,1
+80002ea4:	00000073          	ecall
+80002ea8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	0000                	unimp
+80004002:	0000                	unimp
+80004004:	0000                	unimp
+80004006:	4004                	lw	s1,0(s0)
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	0000                	unimp
+8000400e:	3ff0                	fld	fa2,248(a5)
+80004010:	0000                	unimp
+80004012:	0000                	unimp
+80004014:	0000                	unimp
+80004016:	0000                	unimp
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	0000                	unimp
+8000401e:	400c                	lw	a1,0(s0)
+
+80004020 <test_3_data>:
+80004020:	6666                	flw	fa2,88(sp)
+80004022:	6666                	flw	fa2,88(sp)
+80004024:	4c66                	lw	s8,88(sp)
+80004026:	999ac093          	xori	ra,s5,-1639
+8000402a:	9999                	andi	a1,a1,-26
+8000402c:	9999                	andi	a1,a1,-26
+8000402e:	3ff1                	jal	8000400a <test_2_data+0xa>
+80004030:	0000                	unimp
+80004032:	0000                	unimp
+80004034:	0000                	unimp
+80004036:	0000                	unimp
+80004038:	0000                	unimp
+8000403a:	0000                	unimp
+8000403c:	4800                	lw	s0,16(s0)
+8000403e:	          	xori	ra,gp,-689
+
+80004040 <test_4_data>:
+80004040:	d4f1                	beqz	s1,8000400c <test_2_data+0xc>
+80004042:	53c8                	lw	a0,36(a5)
+80004044:	400921fb          	0x400921fb
+80004048:	8c3a                	mv	s8,a4
+8000404a:	e230                	fsw	fa2,64(a2)
+8000404c:	798e                	flw	fs3,224(sp)
+8000404e:	3e45                	jal	80003bfe <pass+0xd5e>
+80004050:	0000                	unimp
+80004052:	0000                	unimp
+80004054:	0000                	unimp
+80004056:	0000                	unimp
+80004058:	6ddf 5520 21fb      	0x21fb55206ddf
+8000405e:	4009                	c.li	zero,2
+
+80004060 <test_5_data>:
+80004060:	0000                	unimp
+80004062:	0000                	unimp
+80004064:	0000                	unimp
+80004066:	4004                	lw	s1,0(s0)
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	3ff0                	fld	fa2,248(a5)
+80004070:	0000                	unimp
+80004072:	0000                	unimp
+80004074:	0000                	unimp
+80004076:	0000                	unimp
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	0000                	unimp
+8000407e:	3ff8                	fld	fa4,248(a5)
+
+80004080 <test_6_data>:
+80004080:	6666                	flw	fa2,88(sp)
+80004082:	6666                	flw	fa2,88(sp)
+80004084:	4c66                	lw	s8,88(sp)
+80004086:	999ac093          	xori	ra,s5,-1639
+8000408a:	9999                	andi	a1,a1,-26
+8000408c:	9999                	andi	a1,a1,-26
+8000408e:	bff1                	j	8000406a <test_5_data+0xa>
+80004090:	0000                	unimp
+80004092:	0000                	unimp
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	0000                	unimp
+8000409a:	0000                	unimp
+8000409c:	4800                	lw	s0,16(s0)
+8000409e:	          	xori	ra,gp,-689
+
+800040a0 <test_7_data>:
+800040a0:	d4f1                	beqz	s1,8000406c <test_5_data+0xc>
+800040a2:	53c8                	lw	a0,36(a5)
+800040a4:	400921fb          	0x400921fb
+800040a8:	8c3a                	mv	s8,a4
+800040aa:	e230                	fsw	fa2,64(a2)
+800040ac:	798e                	flw	fs3,224(sp)
+800040ae:	3e45                	jal	80003c5e <pass+0xdbe>
+800040b0:	0000                	unimp
+800040b2:	0000                	unimp
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	52713c03          	0x52713c03
+800040bc:	400921fb          	0x400921fb
+
+800040c0 <test_8_data>:
+800040c0:	0000                	unimp
+800040c2:	0000                	unimp
+800040c4:	0000                	unimp
+800040c6:	4004                	lw	s1,0(s0)
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	3ff0                	fld	fa2,248(a5)
+800040d0:	0000                	unimp
+800040d2:	0000                	unimp
+800040d4:	0000                	unimp
+800040d6:	0000                	unimp
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	4004                	lw	s1,0(s0)
+
+800040e0 <test_9_data>:
+800040e0:	6666                	flw	fa2,88(sp)
+800040e2:	6666                	flw	fa2,88(sp)
+800040e4:	4c66                	lw	s8,88(sp)
+800040e6:	999ac093          	xori	ra,s5,-1639
+800040ea:	9999                	andi	a1,a1,-26
+800040ec:	9999                	andi	a1,a1,-26
+800040ee:	bff1                	j	800040ca <test_8_data+0xa>
+800040f0:	0000                	unimp
+800040f2:	0000                	unimp
+800040f4:	0000                	unimp
+800040f6:	0000                	unimp
+800040f8:	0a3d                	addi	s4,s4,15
+800040fa:	3a70a3d7          	0x3a70a3d7
+800040fe:	4095                	li	ra,5
+
+80004100 <test_10_data>:
+80004100:	d4f1                	beqz	s1,800040cc <test_8_data+0xc>
+80004102:	53c8                	lw	a0,36(a5)
+80004104:	400921fb          	0x400921fb
+80004108:	8c3a                	mv	s8,a4
+8000410a:	e230                	fsw	fa2,64(a2)
+8000410c:	798e                	flw	fs3,224(sp)
+8000410e:	3e45                	jal	80003cbe <pass+0xe1e>
+80004110:	0000                	unimp
+80004112:	0000                	unimp
+80004114:	0000                	unimp
+80004116:	0000                	unimp
+80004118:	ff09                	bnez	a4,80004032 <test_3_data+0x12>
+8000411a:	a5c1                	j	800047da <begin_signature+0x69a>
+8000411c:	ddc5                	beqz	a1,800040d4 <test_8_data+0x14>
+8000411e:	3e60                	fld	fs0,248(a2)
+
+80004120 <test_11_data>:
+80004120:	0000                	unimp
+80004122:	0000                	unimp
+80004124:	0000                	unimp
+80004126:	7ff0                	flw	fa2,124(a5)
+80004128:	0000                	unimp
+8000412a:	0000                	unimp
+8000412c:	0000                	unimp
+8000412e:	7ff0                	flw	fa2,124(a5)
+80004130:	0000                	unimp
+80004132:	0000                	unimp
+80004134:	0000                	unimp
+80004136:	0000                	unimp
+80004138:	0000                	unimp
+8000413a:	0000                	unimp
+8000413c:	0000                	unimp
+8000413e:	7ff8                	flw	fa4,124(a5)
diff --git a/test/riscv-tests/rv32ud-v-fadd.elf b/test/riscv-tests/rv32ud-v-fadd.elf
new file mode 100644
index 0000000..27a2549
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fadd.elf
diff --git a/test/riscv-tests/rv32ud-v-fclass.dump b/test/riscv-tests/rv32ud-v-fclass.dump
new file mode 100644
index 0000000..3ffa2f4
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fclass.dump
@@ -0,0 +1,1064 @@
+
+rv32ud-v-fclass:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	85458593          	addi	a1,a1,-1964 # 80002d1c <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	87058593          	addi	a1,a1,-1936 # 80002da8 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	81c58593          	addi	a1,a1,-2020 # 80002dc0 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00000597          	auipc	a1,0x0
+80002614:	75058593          	addi	a1,a1,1872 # 80002d60 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00000597          	auipc	a1,0x0
+8000274c:	74058593          	addi	a1,a1,1856 # 80002e88 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	6a858593          	addi	a1,a1,1704 # 80002e64 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	5a460613          	addi	a2,a2,1444 # 80002eb4 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	4b460613          	addi	a2,a2,1204 # 80002e30 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	43460613          	addi	a2,a2,1076 # 80002dfc <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	01b00793          	li	a5,27
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	05d877b7          	lui	a5,0x5d87
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	67d78793          	addi	a5,a5,1661 # 5d8767d <_start-0x7a278983>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00000517          	auipc	a0,0x0
+80002be8:	41c50513          	addi	a0,a0,1052 # 80003000 <test_2_data>
+80002bec:	00053507          	fld	fa0,0(a0)
+80002bf0:	e2051553          	fclass.d	a0,fa0
+80002bf4:	00100e93          	li	t4,1
+80002bf8:	00200193          	li	gp,2
+80002bfc:	11d51263          	bne	a0,t4,80002d00 <fail>
+
+80002c00 <test_3>:
+80002c00:	00000517          	auipc	a0,0x0
+80002c04:	40850513          	addi	a0,a0,1032 # 80003008 <test_3_data>
+80002c08:	00053507          	fld	fa0,0(a0)
+80002c0c:	e2051553          	fclass.d	a0,fa0
+80002c10:	00200e93          	li	t4,2
+80002c14:	00300193          	li	gp,3
+80002c18:	0fd51463          	bne	a0,t4,80002d00 <fail>
+
+80002c1c <test_4>:
+80002c1c:	00000517          	auipc	a0,0x0
+80002c20:	3f450513          	addi	a0,a0,1012 # 80003010 <test_4_data>
+80002c24:	00053507          	fld	fa0,0(a0)
+80002c28:	e2051553          	fclass.d	a0,fa0
+80002c2c:	00400e93          	li	t4,4
+80002c30:	00400193          	li	gp,4
+80002c34:	0dd51663          	bne	a0,t4,80002d00 <fail>
+
+80002c38 <test_5>:
+80002c38:	00000517          	auipc	a0,0x0
+80002c3c:	3e050513          	addi	a0,a0,992 # 80003018 <test_5_data>
+80002c40:	00053507          	fld	fa0,0(a0)
+80002c44:	e2051553          	fclass.d	a0,fa0
+80002c48:	00800e93          	li	t4,8
+80002c4c:	00500193          	li	gp,5
+80002c50:	0bd51863          	bne	a0,t4,80002d00 <fail>
+
+80002c54 <test_6>:
+80002c54:	00000517          	auipc	a0,0x0
+80002c58:	3cc50513          	addi	a0,a0,972 # 80003020 <test_6_data>
+80002c5c:	00053507          	fld	fa0,0(a0)
+80002c60:	e2051553          	fclass.d	a0,fa0
+80002c64:	01000e93          	li	t4,16
+80002c68:	00600193          	li	gp,6
+80002c6c:	09d51a63          	bne	a0,t4,80002d00 <fail>
+
+80002c70 <test_7>:
+80002c70:	00000517          	auipc	a0,0x0
+80002c74:	3b850513          	addi	a0,a0,952 # 80003028 <test_7_data>
+80002c78:	00053507          	fld	fa0,0(a0)
+80002c7c:	e2051553          	fclass.d	a0,fa0
+80002c80:	02000e93          	li	t4,32
+80002c84:	00700193          	li	gp,7
+80002c88:	07d51c63          	bne	a0,t4,80002d00 <fail>
+
+80002c8c <test_8>:
+80002c8c:	00000517          	auipc	a0,0x0
+80002c90:	3a450513          	addi	a0,a0,932 # 80003030 <test_8_data>
+80002c94:	00053507          	fld	fa0,0(a0)
+80002c98:	e2051553          	fclass.d	a0,fa0
+80002c9c:	04000e93          	li	t4,64
+80002ca0:	00800193          	li	gp,8
+80002ca4:	05d51e63          	bne	a0,t4,80002d00 <fail>
+
+80002ca8 <test_9>:
+80002ca8:	00000517          	auipc	a0,0x0
+80002cac:	39050513          	addi	a0,a0,912 # 80003038 <test_9_data>
+80002cb0:	00053507          	fld	fa0,0(a0)
+80002cb4:	e2051553          	fclass.d	a0,fa0
+80002cb8:	08000e93          	li	t4,128
+80002cbc:	00900193          	li	gp,9
+80002cc0:	05d51063          	bne	a0,t4,80002d00 <fail>
+
+80002cc4 <test_10>:
+80002cc4:	00000517          	auipc	a0,0x0
+80002cc8:	37c50513          	addi	a0,a0,892 # 80003040 <test_10_data>
+80002ccc:	00053507          	fld	fa0,0(a0)
+80002cd0:	e2051553          	fclass.d	a0,fa0
+80002cd4:	10000e93          	li	t4,256
+80002cd8:	00a00193          	li	gp,10
+80002cdc:	03d51263          	bne	a0,t4,80002d00 <fail>
+
+80002ce0 <test_11>:
+80002ce0:	00000517          	auipc	a0,0x0
+80002ce4:	36850513          	addi	a0,a0,872 # 80003048 <test_11_data>
+80002ce8:	00053507          	fld	fa0,0(a0)
+80002cec:	e2051553          	fclass.d	a0,fa0
+80002cf0:	20000e93          	li	t4,512
+80002cf4:	00b00193          	li	gp,11
+80002cf8:	01d51463          	bne	a0,t4,80002d00 <fail>
+80002cfc:	00301a63          	bne	zero,gp,80002d10 <pass>
+
+80002d00 <fail>:
+80002d00:	00119513          	slli	a0,gp,0x1
+80002d04:	00050063          	beqz	a0,80002d04 <fail+0x4>
+80002d08:	00156513          	ori	a0,a0,1
+80002d0c:	00000073          	ecall
+
+80002d10 <pass>:
+80002d10:	00100513          	li	a0,1
+80002d14:	00000073          	ecall
+80002d18:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	0000                	unimp
+80003002:	0000                	unimp
+80003004:	0000                	unimp
+80003006:	fff0                	fsw	fa2,124(a5)
+
+80003008 <test_3_data>:
+80003008:	0000                	unimp
+8000300a:	0000                	unimp
+8000300c:	0000                	unimp
+8000300e:	bff0                	fsd	fa2,248(a5)
+
+80003010 <test_4_data>:
+80003010:	ffff                	0xffff
+80003012:	ffff                	0xffff
+80003014:	ffff                	0xffff
+80003016:	          	0x800f
+
+80003018 <test_5_data>:
+80003018:	0000                	unimp
+8000301a:	0000                	unimp
+8000301c:	0000                	unimp
+8000301e:	8000                	0x8000
+
+80003020 <test_6_data>:
+80003020:	0000                	unimp
+80003022:	0000                	unimp
+80003024:	0000                	unimp
+80003026:	0000                	unimp
+
+80003028 <test_7_data>:
+80003028:	ffff                	0xffff
+8000302a:	ffff                	0xffff
+8000302c:	ffff                	0xffff
+8000302e:	          	fence	unknown,unknown
+
+80003030 <test_8_data>:
+80003030:	0000                	unimp
+80003032:	0000                	unimp
+80003034:	0000                	unimp
+80003036:	3ff0                	fld	fa2,248(a5)
+
+80003038 <test_9_data>:
+80003038:	0000                	unimp
+8000303a:	0000                	unimp
+8000303c:	0000                	unimp
+8000303e:	7ff0                	flw	fa2,124(a5)
+
+80003040 <test_10_data>:
+80003040:	0001                	nop
+80003042:	0000                	unimp
+80003044:	0000                	unimp
+80003046:	7ff0                	flw	fa2,124(a5)
+
+80003048 <test_11_data>:
+80003048:	0000                	unimp
+8000304a:	0000                	unimp
+8000304c:	0000                	unimp
+8000304e:	7ff8                	flw	fa4,124(a5)
diff --git a/test/riscv-tests/rv32ud-v-fclass.elf b/test/riscv-tests/rv32ud-v-fclass.elf
new file mode 100644
index 0000000..31800e6
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fclass.elf
diff --git a/test/riscv-tests/rv32ud-v-fcmp.dump b/test/riscv-tests/rv32ud-v-fcmp.dump
new file mode 100644
index 0000000..0cfaa35
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcmp.dump
@@ -0,0 +1,1421 @@
+
+rv32ud-v-fcmp:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	ac058593          	addi	a1,a1,-1344 # 80002f88 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	adc58593          	addi	a1,a1,-1316 # 80003014 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	a8858593          	addi	a1,a1,-1400 # 8000302c <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	9bc58593          	addi	a1,a1,-1604 # 80002fcc <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	9ac58593          	addi	a1,a1,-1620 # 800030f4 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	91458593          	addi	a1,a1,-1772 # 800030d0 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00001617          	auipc	a2,0x1
+80002914:	81060613          	addi	a2,a2,-2032 # 80003120 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	72060613          	addi	a2,a2,1824 # 8000309c <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	6a060613          	addi	a2,a2,1696 # 80003068 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	02b00793          	li	a5,43
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0d1287b7          	lui	a5,0xd128
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	c7f78793          	addi	a5,a5,-897 # d127c7f <_start-0x72ed8381>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00053007          	fld	ft0,0(a0)
+80002bf4:	00853087          	fld	ft1,8(a0)
+80002bf8:	01053107          	fld	ft2,16(a0)
+80002bfc:	01852683          	lw	a3,24(a0)
+80002c00:	01c52303          	lw	t1,28(a0)
+80002c04:	a2102553          	feq.d	a0,ft0,ft1
+80002c08:	00000393          	li	t2,0
+80002c0c:	001015f3          	fsflags	a1,zero
+80002c10:	00000613          	li	a2,0
+80002c14:	34d51c63          	bne	a0,a3,80002f6c <fail>
+80002c18:	34731a63          	bne	t1,t2,80002f6c <fail>
+80002c1c:	34c59863          	bne	a1,a2,80002f6c <fail>
+
+80002c20 <test_3>:
+80002c20:	00300193          	li	gp,3
+80002c24:	00001517          	auipc	a0,0x1
+80002c28:	3fc50513          	addi	a0,a0,1020 # 80004020 <test_3_data>
+80002c2c:	00053007          	fld	ft0,0(a0)
+80002c30:	00853087          	fld	ft1,8(a0)
+80002c34:	01053107          	fld	ft2,16(a0)
+80002c38:	01852683          	lw	a3,24(a0)
+80002c3c:	01c52303          	lw	t1,28(a0)
+80002c40:	a2100553          	fle.d	a0,ft0,ft1
+80002c44:	00000393          	li	t2,0
+80002c48:	001015f3          	fsflags	a1,zero
+80002c4c:	00000613          	li	a2,0
+80002c50:	30d51e63          	bne	a0,a3,80002f6c <fail>
+80002c54:	30731c63          	bne	t1,t2,80002f6c <fail>
+80002c58:	30c59a63          	bne	a1,a2,80002f6c <fail>
+
+80002c5c <test_4>:
+80002c5c:	00400193          	li	gp,4
+80002c60:	00001517          	auipc	a0,0x1
+80002c64:	3e050513          	addi	a0,a0,992 # 80004040 <test_4_data>
+80002c68:	00053007          	fld	ft0,0(a0)
+80002c6c:	00853087          	fld	ft1,8(a0)
+80002c70:	01053107          	fld	ft2,16(a0)
+80002c74:	01852683          	lw	a3,24(a0)
+80002c78:	01c52303          	lw	t1,28(a0)
+80002c7c:	a2101553          	flt.d	a0,ft0,ft1
+80002c80:	00000393          	li	t2,0
+80002c84:	001015f3          	fsflags	a1,zero
+80002c88:	00000613          	li	a2,0
+80002c8c:	2ed51063          	bne	a0,a3,80002f6c <fail>
+80002c90:	2c731e63          	bne	t1,t2,80002f6c <fail>
+80002c94:	2cc59c63          	bne	a1,a2,80002f6c <fail>
+
+80002c98 <test_5>:
+80002c98:	00500193          	li	gp,5
+80002c9c:	00001517          	auipc	a0,0x1
+80002ca0:	3c450513          	addi	a0,a0,964 # 80004060 <test_5_data>
+80002ca4:	00053007          	fld	ft0,0(a0)
+80002ca8:	00853087          	fld	ft1,8(a0)
+80002cac:	01053107          	fld	ft2,16(a0)
+80002cb0:	01852683          	lw	a3,24(a0)
+80002cb4:	01c52303          	lw	t1,28(a0)
+80002cb8:	a2102553          	feq.d	a0,ft0,ft1
+80002cbc:	00000393          	li	t2,0
+80002cc0:	001015f3          	fsflags	a1,zero
+80002cc4:	00000613          	li	a2,0
+80002cc8:	2ad51263          	bne	a0,a3,80002f6c <fail>
+80002ccc:	2a731063          	bne	t1,t2,80002f6c <fail>
+80002cd0:	28c59e63          	bne	a1,a2,80002f6c <fail>
+
+80002cd4 <test_6>:
+80002cd4:	00600193          	li	gp,6
+80002cd8:	00001517          	auipc	a0,0x1
+80002cdc:	3a850513          	addi	a0,a0,936 # 80004080 <test_6_data>
+80002ce0:	00053007          	fld	ft0,0(a0)
+80002ce4:	00853087          	fld	ft1,8(a0)
+80002ce8:	01053107          	fld	ft2,16(a0)
+80002cec:	01852683          	lw	a3,24(a0)
+80002cf0:	01c52303          	lw	t1,28(a0)
+80002cf4:	a2100553          	fle.d	a0,ft0,ft1
+80002cf8:	00000393          	li	t2,0
+80002cfc:	001015f3          	fsflags	a1,zero
+80002d00:	00000613          	li	a2,0
+80002d04:	26d51463          	bne	a0,a3,80002f6c <fail>
+80002d08:	26731263          	bne	t1,t2,80002f6c <fail>
+80002d0c:	26c59063          	bne	a1,a2,80002f6c <fail>
+
+80002d10 <test_7>:
+80002d10:	00700193          	li	gp,7
+80002d14:	00001517          	auipc	a0,0x1
+80002d18:	38c50513          	addi	a0,a0,908 # 800040a0 <test_7_data>
+80002d1c:	00053007          	fld	ft0,0(a0)
+80002d20:	00853087          	fld	ft1,8(a0)
+80002d24:	01053107          	fld	ft2,16(a0)
+80002d28:	01852683          	lw	a3,24(a0)
+80002d2c:	01c52303          	lw	t1,28(a0)
+80002d30:	a2101553          	flt.d	a0,ft0,ft1
+80002d34:	00000393          	li	t2,0
+80002d38:	001015f3          	fsflags	a1,zero
+80002d3c:	00000613          	li	a2,0
+80002d40:	22d51663          	bne	a0,a3,80002f6c <fail>
+80002d44:	22731463          	bne	t1,t2,80002f6c <fail>
+80002d48:	22c59263          	bne	a1,a2,80002f6c <fail>
+
+80002d4c <test_8>:
+80002d4c:	00800193          	li	gp,8
+80002d50:	00001517          	auipc	a0,0x1
+80002d54:	37050513          	addi	a0,a0,880 # 800040c0 <test_8_data>
+80002d58:	00053007          	fld	ft0,0(a0)
+80002d5c:	00853087          	fld	ft1,8(a0)
+80002d60:	01053107          	fld	ft2,16(a0)
+80002d64:	01852683          	lw	a3,24(a0)
+80002d68:	01c52303          	lw	t1,28(a0)
+80002d6c:	a2102553          	feq.d	a0,ft0,ft1
+80002d70:	00000393          	li	t2,0
+80002d74:	001015f3          	fsflags	a1,zero
+80002d78:	00000613          	li	a2,0
+80002d7c:	1ed51863          	bne	a0,a3,80002f6c <fail>
+80002d80:	1e731663          	bne	t1,t2,80002f6c <fail>
+80002d84:	1ec59463          	bne	a1,a2,80002f6c <fail>
+
+80002d88 <test_9>:
+80002d88:	00900193          	li	gp,9
+80002d8c:	00001517          	auipc	a0,0x1
+80002d90:	35450513          	addi	a0,a0,852 # 800040e0 <test_9_data>
+80002d94:	00053007          	fld	ft0,0(a0)
+80002d98:	00853087          	fld	ft1,8(a0)
+80002d9c:	01053107          	fld	ft2,16(a0)
+80002da0:	01852683          	lw	a3,24(a0)
+80002da4:	01c52303          	lw	t1,28(a0)
+80002da8:	a2102553          	feq.d	a0,ft0,ft1
+80002dac:	00000393          	li	t2,0
+80002db0:	001015f3          	fsflags	a1,zero
+80002db4:	00000613          	li	a2,0
+80002db8:	1ad51a63          	bne	a0,a3,80002f6c <fail>
+80002dbc:	1a731863          	bne	t1,t2,80002f6c <fail>
+80002dc0:	1ac59663          	bne	a1,a2,80002f6c <fail>
+
+80002dc4 <test_10>:
+80002dc4:	00a00193          	li	gp,10
+80002dc8:	00001517          	auipc	a0,0x1
+80002dcc:	33850513          	addi	a0,a0,824 # 80004100 <test_10_data>
+80002dd0:	00053007          	fld	ft0,0(a0)
+80002dd4:	00853087          	fld	ft1,8(a0)
+80002dd8:	01053107          	fld	ft2,16(a0)
+80002ddc:	01852683          	lw	a3,24(a0)
+80002de0:	01c52303          	lw	t1,28(a0)
+80002de4:	a2102553          	feq.d	a0,ft0,ft1
+80002de8:	00000393          	li	t2,0
+80002dec:	001015f3          	fsflags	a1,zero
+80002df0:	01000613          	li	a2,16
+80002df4:	16d51c63          	bne	a0,a3,80002f6c <fail>
+80002df8:	16731a63          	bne	t1,t2,80002f6c <fail>
+80002dfc:	16c59863          	bne	a1,a2,80002f6c <fail>
+
+80002e00 <test_11>:
+80002e00:	00b00193          	li	gp,11
+80002e04:	00001517          	auipc	a0,0x1
+80002e08:	31c50513          	addi	a0,a0,796 # 80004120 <test_11_data>
+80002e0c:	00053007          	fld	ft0,0(a0)
+80002e10:	00853087          	fld	ft1,8(a0)
+80002e14:	01053107          	fld	ft2,16(a0)
+80002e18:	01852683          	lw	a3,24(a0)
+80002e1c:	01c52303          	lw	t1,28(a0)
+80002e20:	a2101553          	flt.d	a0,ft0,ft1
+80002e24:	00000393          	li	t2,0
+80002e28:	001015f3          	fsflags	a1,zero
+80002e2c:	01000613          	li	a2,16
+80002e30:	12d51e63          	bne	a0,a3,80002f6c <fail>
+80002e34:	12731c63          	bne	t1,t2,80002f6c <fail>
+80002e38:	12c59a63          	bne	a1,a2,80002f6c <fail>
+
+80002e3c <test_12>:
+80002e3c:	00c00193          	li	gp,12
+80002e40:	00001517          	auipc	a0,0x1
+80002e44:	30050513          	addi	a0,a0,768 # 80004140 <test_12_data>
+80002e48:	00053007          	fld	ft0,0(a0)
+80002e4c:	00853087          	fld	ft1,8(a0)
+80002e50:	01053107          	fld	ft2,16(a0)
+80002e54:	01852683          	lw	a3,24(a0)
+80002e58:	01c52303          	lw	t1,28(a0)
+80002e5c:	a2101553          	flt.d	a0,ft0,ft1
+80002e60:	00000393          	li	t2,0
+80002e64:	001015f3          	fsflags	a1,zero
+80002e68:	01000613          	li	a2,16
+80002e6c:	10d51063          	bne	a0,a3,80002f6c <fail>
+80002e70:	0e731e63          	bne	t1,t2,80002f6c <fail>
+80002e74:	0ec59c63          	bne	a1,a2,80002f6c <fail>
+
+80002e78 <test_13>:
+80002e78:	00d00193          	li	gp,13
+80002e7c:	00001517          	auipc	a0,0x1
+80002e80:	2e450513          	addi	a0,a0,740 # 80004160 <test_13_data>
+80002e84:	00053007          	fld	ft0,0(a0)
+80002e88:	00853087          	fld	ft1,8(a0)
+80002e8c:	01053107          	fld	ft2,16(a0)
+80002e90:	01852683          	lw	a3,24(a0)
+80002e94:	01c52303          	lw	t1,28(a0)
+80002e98:	a2101553          	flt.d	a0,ft0,ft1
+80002e9c:	00000393          	li	t2,0
+80002ea0:	001015f3          	fsflags	a1,zero
+80002ea4:	01000613          	li	a2,16
+80002ea8:	0cd51263          	bne	a0,a3,80002f6c <fail>
+80002eac:	0c731063          	bne	t1,t2,80002f6c <fail>
+80002eb0:	0ac59e63          	bne	a1,a2,80002f6c <fail>
+
+80002eb4 <test_14>:
+80002eb4:	00e00193          	li	gp,14
+80002eb8:	00001517          	auipc	a0,0x1
+80002ebc:	2c850513          	addi	a0,a0,712 # 80004180 <test_14_data>
+80002ec0:	00053007          	fld	ft0,0(a0)
+80002ec4:	00853087          	fld	ft1,8(a0)
+80002ec8:	01053107          	fld	ft2,16(a0)
+80002ecc:	01852683          	lw	a3,24(a0)
+80002ed0:	01c52303          	lw	t1,28(a0)
+80002ed4:	a2100553          	fle.d	a0,ft0,ft1
+80002ed8:	00000393          	li	t2,0
+80002edc:	001015f3          	fsflags	a1,zero
+80002ee0:	01000613          	li	a2,16
+80002ee4:	08d51463          	bne	a0,a3,80002f6c <fail>
+80002ee8:	08731263          	bne	t1,t2,80002f6c <fail>
+80002eec:	08c59063          	bne	a1,a2,80002f6c <fail>
+
+80002ef0 <test_15>:
+80002ef0:	00f00193          	li	gp,15
+80002ef4:	00001517          	auipc	a0,0x1
+80002ef8:	2ac50513          	addi	a0,a0,684 # 800041a0 <test_15_data>
+80002efc:	00053007          	fld	ft0,0(a0)
+80002f00:	00853087          	fld	ft1,8(a0)
+80002f04:	01053107          	fld	ft2,16(a0)
+80002f08:	01852683          	lw	a3,24(a0)
+80002f0c:	01c52303          	lw	t1,28(a0)
+80002f10:	a2100553          	fle.d	a0,ft0,ft1
+80002f14:	00000393          	li	t2,0
+80002f18:	001015f3          	fsflags	a1,zero
+80002f1c:	01000613          	li	a2,16
+80002f20:	04d51663          	bne	a0,a3,80002f6c <fail>
+80002f24:	04731463          	bne	t1,t2,80002f6c <fail>
+80002f28:	04c59263          	bne	a1,a2,80002f6c <fail>
+
+80002f2c <test_16>:
+80002f2c:	01000193          	li	gp,16
+80002f30:	00001517          	auipc	a0,0x1
+80002f34:	29050513          	addi	a0,a0,656 # 800041c0 <test_16_data>
+80002f38:	00053007          	fld	ft0,0(a0)
+80002f3c:	00853087          	fld	ft1,8(a0)
+80002f40:	01053107          	fld	ft2,16(a0)
+80002f44:	01852683          	lw	a3,24(a0)
+80002f48:	01c52303          	lw	t1,28(a0)
+80002f4c:	a2100553          	fle.d	a0,ft0,ft1
+80002f50:	00000393          	li	t2,0
+80002f54:	001015f3          	fsflags	a1,zero
+80002f58:	01000613          	li	a2,16
+80002f5c:	00d51863          	bne	a0,a3,80002f6c <fail>
+80002f60:	00731663          	bne	t1,t2,80002f6c <fail>
+80002f64:	00c59463          	bne	a1,a2,80002f6c <fail>
+80002f68:	00301a63          	bne	zero,gp,80002f7c <pass>
+
+80002f6c <fail>:
+80002f6c:	00119513          	slli	a0,gp,0x1
+80002f70:	00050063          	beqz	a0,80002f70 <fail+0x4>
+80002f74:	00156513          	ori	a0,a0,1
+80002f78:	00000073          	ecall
+
+80002f7c <pass>:
+80002f7c:	00100513          	li	a0,1
+80002f80:	00000073          	ecall
+80002f84:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	5c28f5c3          	0x5c28f5c3
+80004004:	bff5c28f          	0xbff5c28f
+80004008:	5c28f5c3          	0x5c28f5c3
+8000400c:	bff5c28f          	0xbff5c28f
+80004010:	0000                	unimp
+80004012:	0000                	unimp
+80004014:	0000                	unimp
+80004016:	0000                	unimp
+80004018:	0001                	nop
+8000401a:	0000                	unimp
+8000401c:	0000                	unimp
+8000401e:	0000                	unimp
+
+80004020 <test_3_data>:
+80004020:	5c28f5c3          	0x5c28f5c3
+80004024:	bff5c28f          	0xbff5c28f
+80004028:	5c28f5c3          	0x5c28f5c3
+8000402c:	bff5c28f          	0xbff5c28f
+80004030:	0000                	unimp
+80004032:	0000                	unimp
+80004034:	0000                	unimp
+80004036:	0000                	unimp
+80004038:	0001                	nop
+8000403a:	0000                	unimp
+8000403c:	0000                	unimp
+8000403e:	0000                	unimp
+
+80004040 <test_4_data>:
+80004040:	5c28f5c3          	0x5c28f5c3
+80004044:	bff5c28f          	0xbff5c28f
+80004048:	5c28f5c3          	0x5c28f5c3
+8000404c:	bff5c28f          	0xbff5c28f
+80004050:	0000                	unimp
+80004052:	0000                	unimp
+80004054:	0000                	unimp
+80004056:	0000                	unimp
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0000                	unimp
+8000405e:	0000                	unimp
+
+80004060 <test_5_data>:
+80004060:	51ec                	lw	a1,100(a1)
+80004062:	1eb8                	addi	a4,sp,888
+80004064:	eb85                	bnez	a5,80004094 <test_6_data+0x14>
+80004066:	bff5                	j	80004062 <test_5_data+0x2>
+80004068:	5c28f5c3          	0x5c28f5c3
+8000406c:	bff5c28f          	0xbff5c28f
+80004070:	0000                	unimp
+80004072:	0000                	unimp
+80004074:	0000                	unimp
+80004076:	0000                	unimp
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	0000                	unimp
+8000407e:	0000                	unimp
+
+80004080 <test_6_data>:
+80004080:	51ec                	lw	a1,100(a1)
+80004082:	1eb8                	addi	a4,sp,888
+80004084:	eb85                	bnez	a5,800040b4 <test_7_data+0x14>
+80004086:	bff5                	j	80004082 <test_6_data+0x2>
+80004088:	5c28f5c3          	0x5c28f5c3
+8000408c:	bff5c28f          	0xbff5c28f
+80004090:	0000                	unimp
+80004092:	0000                	unimp
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	0001                	nop
+8000409a:	0000                	unimp
+8000409c:	0000                	unimp
+8000409e:	0000                	unimp
+
+800040a0 <test_7_data>:
+800040a0:	51ec                	lw	a1,100(a1)
+800040a2:	1eb8                	addi	a4,sp,888
+800040a4:	eb85                	bnez	a5,800040d4 <test_8_data+0x14>
+800040a6:	bff5                	j	800040a2 <test_7_data+0x2>
+800040a8:	5c28f5c3          	0x5c28f5c3
+800040ac:	bff5c28f          	0xbff5c28f
+800040b0:	0000                	unimp
+800040b2:	0000                	unimp
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	0001                	nop
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	0000                	unimp
+
+800040c0 <test_8_data>:
+800040c0:	ffff                	0xffff
+800040c2:	ffff                	0xffff
+800040c4:	ffff                	0xffff
+800040c6:	7fff                	0x7fff
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	0000                	unimp
+800040d0:	0000                	unimp
+800040d2:	0000                	unimp
+800040d4:	0000                	unimp
+800040d6:	0000                	unimp
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	0000                	unimp
+
+800040e0 <test_9_data>:
+800040e0:	ffff                	0xffff
+800040e2:	ffff                	0xffff
+800040e4:	ffff                	0xffff
+800040e6:	7fff                	0x7fff
+800040e8:	ffff                	0xffff
+800040ea:	ffff                	0xffff
+800040ec:	ffff                	0xffff
+800040ee:	7fff                	0x7fff
+800040f0:	0000                	unimp
+800040f2:	0000                	unimp
+800040f4:	0000                	unimp
+800040f6:	0000                	unimp
+800040f8:	0000                	unimp
+800040fa:	0000                	unimp
+800040fc:	0000                	unimp
+800040fe:	0000                	unimp
+
+80004100 <test_10_data>:
+80004100:	0001                	nop
+80004102:	0000                	unimp
+80004104:	0000                	unimp
+80004106:	7ff0                	flw	fa2,124(a5)
+80004108:	0000                	unimp
+8000410a:	0000                	unimp
+8000410c:	0000                	unimp
+8000410e:	0000                	unimp
+80004110:	0000                	unimp
+80004112:	0000                	unimp
+80004114:	0000                	unimp
+80004116:	0000                	unimp
+80004118:	0000                	unimp
+8000411a:	0000                	unimp
+8000411c:	0000                	unimp
+8000411e:	0000                	unimp
+
+80004120 <test_11_data>:
+80004120:	ffff                	0xffff
+80004122:	ffff                	0xffff
+80004124:	ffff                	0xffff
+80004126:	7fff                	0x7fff
+80004128:	0000                	unimp
+8000412a:	0000                	unimp
+8000412c:	0000                	unimp
+8000412e:	0000                	unimp
+80004130:	0000                	unimp
+80004132:	0000                	unimp
+80004134:	0000                	unimp
+80004136:	0000                	unimp
+80004138:	0000                	unimp
+8000413a:	0000                	unimp
+8000413c:	0000                	unimp
+8000413e:	0000                	unimp
+
+80004140 <test_12_data>:
+80004140:	ffff                	0xffff
+80004142:	ffff                	0xffff
+80004144:	ffff                	0xffff
+80004146:	7fff                	0x7fff
+80004148:	ffff                	0xffff
+8000414a:	ffff                	0xffff
+8000414c:	ffff                	0xffff
+8000414e:	7fff                	0x7fff
+80004150:	0000                	unimp
+80004152:	0000                	unimp
+80004154:	0000                	unimp
+80004156:	0000                	unimp
+80004158:	0000                	unimp
+8000415a:	0000                	unimp
+8000415c:	0000                	unimp
+8000415e:	0000                	unimp
+
+80004160 <test_13_data>:
+80004160:	0001                	nop
+80004162:	0000                	unimp
+80004164:	0000                	unimp
+80004166:	7ff0                	flw	fa2,124(a5)
+80004168:	0000                	unimp
+8000416a:	0000                	unimp
+8000416c:	0000                	unimp
+8000416e:	0000                	unimp
+80004170:	0000                	unimp
+80004172:	0000                	unimp
+80004174:	0000                	unimp
+80004176:	0000                	unimp
+80004178:	0000                	unimp
+8000417a:	0000                	unimp
+8000417c:	0000                	unimp
+8000417e:	0000                	unimp
+
+80004180 <test_14_data>:
+80004180:	ffff                	0xffff
+80004182:	ffff                	0xffff
+80004184:	ffff                	0xffff
+80004186:	7fff                	0x7fff
+80004188:	0000                	unimp
+8000418a:	0000                	unimp
+8000418c:	0000                	unimp
+8000418e:	0000                	unimp
+80004190:	0000                	unimp
+80004192:	0000                	unimp
+80004194:	0000                	unimp
+80004196:	0000                	unimp
+80004198:	0000                	unimp
+8000419a:	0000                	unimp
+8000419c:	0000                	unimp
+8000419e:	0000                	unimp
+
+800041a0 <test_15_data>:
+800041a0:	ffff                	0xffff
+800041a2:	ffff                	0xffff
+800041a4:	ffff                	0xffff
+800041a6:	7fff                	0x7fff
+800041a8:	ffff                	0xffff
+800041aa:	ffff                	0xffff
+800041ac:	ffff                	0xffff
+800041ae:	7fff                	0x7fff
+800041b0:	0000                	unimp
+800041b2:	0000                	unimp
+800041b4:	0000                	unimp
+800041b6:	0000                	unimp
+800041b8:	0000                	unimp
+800041ba:	0000                	unimp
+800041bc:	0000                	unimp
+800041be:	0000                	unimp
+
+800041c0 <test_16_data>:
+800041c0:	0001                	nop
+800041c2:	0000                	unimp
+800041c4:	0000                	unimp
+800041c6:	7ff0                	flw	fa2,124(a5)
+800041c8:	0000                	unimp
+800041ca:	0000                	unimp
+800041cc:	0000                	unimp
+800041ce:	0000                	unimp
+800041d0:	0000                	unimp
+800041d2:	0000                	unimp
+800041d4:	0000                	unimp
+800041d6:	0000                	unimp
+800041d8:	0000                	unimp
+800041da:	0000                	unimp
+800041dc:	0000                	unimp
+800041de:	0000                	unimp
diff --git a/test/riscv-tests/rv32ud-v-fcmp.elf b/test/riscv-tests/rv32ud-v-fcmp.elf
new file mode 100644
index 0000000..bc134d7
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcmp.elf
diff --git a/test/riscv-tests/rv32ud-v-fcvt.dump b/test/riscv-tests/rv32ud-v-fcvt.dump
new file mode 100644
index 0000000..1425a18
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcvt.dump
@@ -0,0 +1,1095 @@
+
+rv32ud-v-fcvt:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	8c858593          	addi	a1,a1,-1848 # 80002d90 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	8e458593          	addi	a1,a1,-1820 # 80002e1c <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	89058593          	addi	a1,a1,-1904 # 80002e34 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00000597          	auipc	a1,0x0
+80002614:	7c458593          	addi	a1,a1,1988 # 80002dd4 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00000597          	auipc	a1,0x0
+8000274c:	7b458593          	addi	a1,a1,1972 # 80002efc <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	71c58593          	addi	a1,a1,1820 # 80002ed8 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	61860613          	addi	a2,a2,1560 # 80002f28 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	52860613          	addi	a2,a2,1320 # 80002ea4 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	4a860613          	addi	a2,a2,1192 # 80002e70 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	01900793          	li	a5,25
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0c98a7b7          	lui	a5,0xc98a
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	68178793          	addi	a5,a5,1665 # c98a681 <_start-0x7367597f>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00000517          	auipc	a0,0x0
+80002bec:	41850513          	addi	a0,a0,1048 # 80003000 <test_2_data>
+80002bf0:	00052683          	lw	a3,0(a0)
+80002bf4:	00452703          	lw	a4,4(a0)
+80002bf8:	00200593          	li	a1,2
+80002bfc:	d2058053          	fcvt.d.w	ft0,a1
+80002c00:	00053027          	fsd	ft0,0(a0)
+80002c04:	00452583          	lw	a1,4(a0)
+80002c08:	00052503          	lw	a0,0(a0)
+80002c0c:	00101073          	fsflags	zero
+80002c10:	16d51263          	bne	a0,a3,80002d74 <fail>
+80002c14:	16e59063          	bne	a1,a4,80002d74 <fail>
+
+80002c18 <test_3>:
+80002c18:	00300193          	li	gp,3
+80002c1c:	00000517          	auipc	a0,0x0
+80002c20:	3ec50513          	addi	a0,a0,1004 # 80003008 <test_3_data>
+80002c24:	00052683          	lw	a3,0(a0)
+80002c28:	00452703          	lw	a4,4(a0)
+80002c2c:	ffe00593          	li	a1,-2
+80002c30:	d2058053          	fcvt.d.w	ft0,a1
+80002c34:	00053027          	fsd	ft0,0(a0)
+80002c38:	00452583          	lw	a1,4(a0)
+80002c3c:	00052503          	lw	a0,0(a0)
+80002c40:	00101073          	fsflags	zero
+80002c44:	12d51863          	bne	a0,a3,80002d74 <fail>
+80002c48:	12e59663          	bne	a1,a4,80002d74 <fail>
+
+80002c4c <test_4>:
+80002c4c:	00400193          	li	gp,4
+80002c50:	00000517          	auipc	a0,0x0
+80002c54:	3c050513          	addi	a0,a0,960 # 80003010 <test_4_data>
+80002c58:	00052683          	lw	a3,0(a0)
+80002c5c:	00452703          	lw	a4,4(a0)
+80002c60:	00200593          	li	a1,2
+80002c64:	d2158053          	fcvt.d.wu	ft0,a1
+80002c68:	00053027          	fsd	ft0,0(a0)
+80002c6c:	00452583          	lw	a1,4(a0)
+80002c70:	00052503          	lw	a0,0(a0)
+80002c74:	00101073          	fsflags	zero
+80002c78:	0ed51e63          	bne	a0,a3,80002d74 <fail>
+80002c7c:	0ee59c63          	bne	a1,a4,80002d74 <fail>
+
+80002c80 <test_5>:
+80002c80:	00500193          	li	gp,5
+80002c84:	00000517          	auipc	a0,0x0
+80002c88:	39450513          	addi	a0,a0,916 # 80003018 <test_5_data>
+80002c8c:	00052683          	lw	a3,0(a0)
+80002c90:	00452703          	lw	a4,4(a0)
+80002c94:	ffe00593          	li	a1,-2
+80002c98:	d2158053          	fcvt.d.wu	ft0,a1
+80002c9c:	00053027          	fsd	ft0,0(a0)
+80002ca0:	00452583          	lw	a1,4(a0)
+80002ca4:	00052503          	lw	a0,0(a0)
+80002ca8:	00101073          	fsflags	zero
+80002cac:	0cd51463          	bne	a0,a3,80002d74 <fail>
+80002cb0:	0ce59263          	bne	a1,a4,80002d74 <fail>
+
+80002cb4 <test_10>:
+80002cb4:	00a00193          	li	gp,10
+80002cb8:	00000517          	auipc	a0,0x0
+80002cbc:	36850513          	addi	a0,a0,872 # 80003020 <test_10_data>
+80002cc0:	00053007          	fld	ft0,0(a0)
+80002cc4:	00853087          	fld	ft1,8(a0)
+80002cc8:	01053107          	fld	ft2,16(a0)
+80002ccc:	01852683          	lw	a3,24(a0)
+80002cd0:	01c52303          	lw	t1,28(a0)
+80002cd4:	401071d3          	fcvt.s.d	ft3,ft0
+80002cd8:	420181d3          	fcvt.d.s	ft3,ft3
+80002cdc:	00353027          	fsd	ft3,0(a0)
+80002ce0:	00452383          	lw	t2,4(a0)
+80002ce4:	00052503          	lw	a0,0(a0)
+80002ce8:	001015f3          	fsflags	a1,zero
+80002cec:	00000613          	li	a2,0
+80002cf0:	08d51263          	bne	a0,a3,80002d74 <fail>
+80002cf4:	08731063          	bne	t1,t2,80002d74 <fail>
+80002cf8:	06c59e63          	bne	a1,a2,80002d74 <fail>
+
+80002cfc <test_11>:
+80002cfc:	00b00193          	li	gp,11
+80002d00:	00000517          	auipc	a0,0x0
+80002d04:	34050513          	addi	a0,a0,832 # 80003040 <test_11_data>
+80002d08:	00052007          	flw	ft0,0(a0)
+80002d0c:	00452087          	flw	ft1,4(a0)
+80002d10:	00852107          	flw	ft2,8(a0)
+80002d14:	00c52683          	lw	a3,12(a0)
+80002d18:	420001d3          	fcvt.d.s	ft3,ft0
+80002d1c:	4011f1d3          	fcvt.s.d	ft3,ft3
+80002d20:	e0018553          	fmv.x.w	a0,ft3
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00000613          	li	a2,0
+80002d2c:	04d51463          	bne	a0,a3,80002d74 <fail>
+80002d30:	04c59263          	bne	a1,a2,80002d74 <fail>
+
+80002d34 <test_12>:
+80002d34:	00000597          	auipc	a1,0x0
+80002d38:	32c58593          	addi	a1,a1,812 # 80003060 <begin_signature>
+80002d3c:	0005b107          	fld	ft2,0(a1)
+80002d40:	40117153          	fcvt.s.d	ft2,ft2
+80002d44:	42010153          	fcvt.d.s	ft2,ft2
+80002d48:	0025b027          	fsd	ft2,0(a1)
+80002d4c:	0005a503          	lw	a0,0(a1)
+80002d50:	0045a583          	lw	a1,4(a1)
+80002d54:	00000f97          	auipc	t6,0x0
+80002d58:	2fcf8f93          	addi	t6,t6,764 # 80003050 <test_12_data>
+80002d5c:	000fae83          	lw	t4,0(t6)
+80002d60:	004faf83          	lw	t6,4(t6)
+80002d64:	00c00193          	li	gp,12
+80002d68:	01d51663          	bne	a0,t4,80002d74 <fail>
+80002d6c:	01f59463          	bne	a1,t6,80002d74 <fail>
+80002d70:	00301a63          	bne	zero,gp,80002d84 <pass>
+
+80002d74 <fail>:
+80002d74:	00119513          	slli	a0,gp,0x1
+80002d78:	00050063          	beqz	a0,80002d78 <fail+0x4>
+80002d7c:	00156513          	ori	a0,a0,1
+80002d80:	00000073          	ecall
+
+80002d84 <pass>:
+80002d84:	00100513          	li	a0,1
+80002d88:	00000073          	ecall
+80002d8c:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	0000                	unimp
+80003002:	0000                	unimp
+80003004:	0000                	unimp
+80003006:	4000                	lw	s0,0(s0)
+
+80003008 <test_3_data>:
+80003008:	0000                	unimp
+8000300a:	0000                	unimp
+8000300c:	0000                	unimp
+8000300e:	c000                	sw	s0,0(s0)
+
+80003010 <test_4_data>:
+80003010:	0000                	unimp
+80003012:	0000                	unimp
+80003014:	0000                	unimp
+80003016:	4000                	lw	s0,0(s0)
+
+80003018 <test_5_data>:
+80003018:	0000                	unimp
+8000301a:	ffc0                	fsw	fs0,60(a5)
+8000301c:	ffff                	0xffff
+8000301e:	          	jal	gp,8000701e <_end+0xc26>
+
+80003020 <test_10_data>:
+80003020:	0000                	unimp
+80003022:	0000                	unimp
+80003024:	0000                	unimp
+80003026:	bff8                	fsd	fa4,248(a5)
+80003028:	0000                	unimp
+8000302a:	0000                	unimp
+8000302c:	0000                	unimp
+8000302e:	0000                	unimp
+80003030:	0000                	unimp
+80003032:	0000                	unimp
+80003034:	0000                	unimp
+80003036:	0000                	unimp
+80003038:	0000                	unimp
+8000303a:	0000                	unimp
+8000303c:	0000                	unimp
+8000303e:	bff8                	fsd	fa4,248(a5)
+
+80003040 <test_11_data>:
+80003040:	0000                	unimp
+80003042:	bfc0                	fsd	fs0,184(a5)
+80003044:	0000                	unimp
+80003046:	0000                	unimp
+80003048:	0000                	unimp
+8000304a:	0000                	unimp
+8000304c:	0000                	unimp
+8000304e:	bfc0                	fsd	fs0,184(a5)
+
+80003050 <test_12_data>:
+80003050:	0000                	unimp
+80003052:	0000                	unimp
+80003054:	0000                	unimp
+80003056:	7ff8                	flw	fa4,124(a5)
+80003058:	0000                	unimp
+8000305a:	0000                	unimp
+8000305c:	0000                	unimp
+8000305e:	0000                	unimp
+
+80003060 <begin_signature>:
+80003060:	8004                	0x8004
+80003062:	ffff                	0xffff
+80003064:	ffff                	0xffff
+80003066:	7ffc                	flw	fa5,124(a5)
diff --git a/test/riscv-tests/rv32ud-v-fcvt.elf b/test/riscv-tests/rv32ud-v-fcvt.elf
new file mode 100644
index 0000000..b12379f
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcvt.elf
diff --git a/test/riscv-tests/rv32ud-v-fcvt_w.dump b/test/riscv-tests/rv32ud-v-fcvt_w.dump
new file mode 100644
index 0000000..bd8f33f
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcvt_w.dump
@@ -0,0 +1,1401 @@
+
+rv32ud-v-fcvt_w:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	b2858593          	addi	a1,a1,-1240 # 80002ff0 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	b4458593          	addi	a1,a1,-1212 # 8000307c <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	af058593          	addi	a1,a1,-1296 # 80003094 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	a2458593          	addi	a1,a1,-1500 # 80003034 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	a1458593          	addi	a1,a1,-1516 # 8000315c <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	97c58593          	addi	a1,a1,-1668 # 80003138 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00001617          	auipc	a2,0x1
+80002914:	87860613          	addi	a2,a2,-1928 # 80003188 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	78860613          	addi	a2,a2,1928 # 80003104 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	70860613          	addi	a2,a2,1800 # 800030d0 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	00e00793          	li	a5,14
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0ddd07b7          	lui	a5,0xddd0
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	ebd78793          	addi	a5,a5,-323 # ddcfebd <_start-0x72230143>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c04:	001015f3          	fsflags	a1,zero
+80002c08:	00100613          	li	a2,1
+80002c0c:	3cd51463          	bne	a0,a3,80002fd4 <fail>
+80002c10:	3cc59263          	bne	a1,a2,80002fd4 <fail>
+
+80002c14 <test_3>:
+80002c14:	00300193          	li	gp,3
+80002c18:	00001517          	auipc	a0,0x1
+80002c1c:	3f850513          	addi	a0,a0,1016 # 80004010 <test_3_data>
+80002c20:	00052007          	flw	ft0,0(a0)
+80002c24:	00452087          	flw	ft1,4(a0)
+80002c28:	00852107          	flw	ft2,8(a0)
+80002c2c:	00c52683          	lw	a3,12(a0)
+80002c30:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c34:	001015f3          	fsflags	a1,zero
+80002c38:	00000613          	li	a2,0
+80002c3c:	38d51c63          	bne	a0,a3,80002fd4 <fail>
+80002c40:	38c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002c44 <test_4>:
+80002c44:	00400193          	li	gp,4
+80002c48:	00001517          	auipc	a0,0x1
+80002c4c:	3d850513          	addi	a0,a0,984 # 80004020 <test_4_data>
+80002c50:	00052007          	flw	ft0,0(a0)
+80002c54:	00452087          	flw	ft1,4(a0)
+80002c58:	00852107          	flw	ft2,8(a0)
+80002c5c:	00c52683          	lw	a3,12(a0)
+80002c60:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c64:	001015f3          	fsflags	a1,zero
+80002c68:	00100613          	li	a2,1
+80002c6c:	36d51463          	bne	a0,a3,80002fd4 <fail>
+80002c70:	36c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002c74 <test_5>:
+80002c74:	00500193          	li	gp,5
+80002c78:	00001517          	auipc	a0,0x1
+80002c7c:	3b850513          	addi	a0,a0,952 # 80004030 <test_5_data>
+80002c80:	00052007          	flw	ft0,0(a0)
+80002c84:	00452087          	flw	ft1,4(a0)
+80002c88:	00852107          	flw	ft2,8(a0)
+80002c8c:	00c52683          	lw	a3,12(a0)
+80002c90:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c94:	001015f3          	fsflags	a1,zero
+80002c98:	00100613          	li	a2,1
+80002c9c:	32d51c63          	bne	a0,a3,80002fd4 <fail>
+80002ca0:	32c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002ca4 <test_6>:
+80002ca4:	00600193          	li	gp,6
+80002ca8:	00001517          	auipc	a0,0x1
+80002cac:	39850513          	addi	a0,a0,920 # 80004040 <test_6_data>
+80002cb0:	00052007          	flw	ft0,0(a0)
+80002cb4:	00452087          	flw	ft1,4(a0)
+80002cb8:	00852107          	flw	ft2,8(a0)
+80002cbc:	00c52683          	lw	a3,12(a0)
+80002cc0:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002cc4:	001015f3          	fsflags	a1,zero
+80002cc8:	00000613          	li	a2,0
+80002ccc:	30d51463          	bne	a0,a3,80002fd4 <fail>
+80002cd0:	30c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002cd4 <test_7>:
+80002cd4:	00700193          	li	gp,7
+80002cd8:	00001517          	auipc	a0,0x1
+80002cdc:	37850513          	addi	a0,a0,888 # 80004050 <test_7_data>
+80002ce0:	00052007          	flw	ft0,0(a0)
+80002ce4:	00452087          	flw	ft1,4(a0)
+80002ce8:	00852107          	flw	ft2,8(a0)
+80002cec:	00c52683          	lw	a3,12(a0)
+80002cf0:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002cf4:	001015f3          	fsflags	a1,zero
+80002cf8:	00100613          	li	a2,1
+80002cfc:	2cd51c63          	bne	a0,a3,80002fd4 <fail>
+80002d00:	2cc59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002d04 <test_8>:
+80002d04:	00800193          	li	gp,8
+80002d08:	00001517          	auipc	a0,0x1
+80002d0c:	35850513          	addi	a0,a0,856 # 80004060 <test_8_data>
+80002d10:	00052007          	flw	ft0,0(a0)
+80002d14:	00452087          	flw	ft1,4(a0)
+80002d18:	00852107          	flw	ft2,8(a0)
+80002d1c:	00c52683          	lw	a3,12(a0)
+80002d20:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	01000613          	li	a2,16
+80002d2c:	2ad51463          	bne	a0,a3,80002fd4 <fail>
+80002d30:	2ac59263          	bne	a1,a2,80002fd4 <fail>
+
+80002d34 <test_9>:
+80002d34:	00900193          	li	gp,9
+80002d38:	00001517          	auipc	a0,0x1
+80002d3c:	33850513          	addi	a0,a0,824 # 80004070 <test_9_data>
+80002d40:	00052007          	flw	ft0,0(a0)
+80002d44:	00452087          	flw	ft1,4(a0)
+80002d48:	00852107          	flw	ft2,8(a0)
+80002d4c:	00c52683          	lw	a3,12(a0)
+80002d50:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002d54:	001015f3          	fsflags	a1,zero
+80002d58:	01000613          	li	a2,16
+80002d5c:	26d51c63          	bne	a0,a3,80002fd4 <fail>
+80002d60:	26c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002d64 <test_12>:
+80002d64:	00c00193          	li	gp,12
+80002d68:	00001517          	auipc	a0,0x1
+80002d6c:	31850513          	addi	a0,a0,792 # 80004080 <test_12_data>
+80002d70:	00052007          	flw	ft0,0(a0)
+80002d74:	00452087          	flw	ft1,4(a0)
+80002d78:	00852107          	flw	ft2,8(a0)
+80002d7c:	00c52683          	lw	a3,12(a0)
+80002d80:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002d84:	001015f3          	fsflags	a1,zero
+80002d88:	01000613          	li	a2,16
+80002d8c:	24d51463          	bne	a0,a3,80002fd4 <fail>
+80002d90:	24c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002d94 <test_13>:
+80002d94:	00d00193          	li	gp,13
+80002d98:	00001517          	auipc	a0,0x1
+80002d9c:	2f850513          	addi	a0,a0,760 # 80004090 <test_13_data>
+80002da0:	00052007          	flw	ft0,0(a0)
+80002da4:	00452087          	flw	ft1,4(a0)
+80002da8:	00852107          	flw	ft2,8(a0)
+80002dac:	00c52683          	lw	a3,12(a0)
+80002db0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002db4:	001015f3          	fsflags	a1,zero
+80002db8:	01000613          	li	a2,16
+80002dbc:	20d51c63          	bne	a0,a3,80002fd4 <fail>
+80002dc0:	20c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002dc4 <test_14>:
+80002dc4:	00e00193          	li	gp,14
+80002dc8:	00001517          	auipc	a0,0x1
+80002dcc:	2d850513          	addi	a0,a0,728 # 800040a0 <test_14_data>
+80002dd0:	00052007          	flw	ft0,0(a0)
+80002dd4:	00452087          	flw	ft1,4(a0)
+80002dd8:	00852107          	flw	ft2,8(a0)
+80002ddc:	00c52683          	lw	a3,12(a0)
+80002de0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002de4:	001015f3          	fsflags	a1,zero
+80002de8:	00100613          	li	a2,1
+80002dec:	1ed51463          	bne	a0,a3,80002fd4 <fail>
+80002df0:	1ec59263          	bne	a1,a2,80002fd4 <fail>
+
+80002df4 <test_15>:
+80002df4:	00f00193          	li	gp,15
+80002df8:	00001517          	auipc	a0,0x1
+80002dfc:	2b850513          	addi	a0,a0,696 # 800040b0 <test_15_data>
+80002e00:	00052007          	flw	ft0,0(a0)
+80002e04:	00452087          	flw	ft1,4(a0)
+80002e08:	00852107          	flw	ft2,8(a0)
+80002e0c:	00c52683          	lw	a3,12(a0)
+80002e10:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e14:	001015f3          	fsflags	a1,zero
+80002e18:	00100613          	li	a2,1
+80002e1c:	1ad51c63          	bne	a0,a3,80002fd4 <fail>
+80002e20:	1ac59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002e24 <test_16>:
+80002e24:	01000193          	li	gp,16
+80002e28:	00001517          	auipc	a0,0x1
+80002e2c:	29850513          	addi	a0,a0,664 # 800040c0 <test_16_data>
+80002e30:	00052007          	flw	ft0,0(a0)
+80002e34:	00452087          	flw	ft1,4(a0)
+80002e38:	00852107          	flw	ft2,8(a0)
+80002e3c:	00c52683          	lw	a3,12(a0)
+80002e40:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e44:	001015f3          	fsflags	a1,zero
+80002e48:	00000613          	li	a2,0
+80002e4c:	18d51463          	bne	a0,a3,80002fd4 <fail>
+80002e50:	18c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002e54 <test_17>:
+80002e54:	01100193          	li	gp,17
+80002e58:	00001517          	auipc	a0,0x1
+80002e5c:	27850513          	addi	a0,a0,632 # 800040d0 <test_17_data>
+80002e60:	00052007          	flw	ft0,0(a0)
+80002e64:	00452087          	flw	ft1,4(a0)
+80002e68:	00852107          	flw	ft2,8(a0)
+80002e6c:	00c52683          	lw	a3,12(a0)
+80002e70:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e74:	001015f3          	fsflags	a1,zero
+80002e78:	00100613          	li	a2,1
+80002e7c:	14d51c63          	bne	a0,a3,80002fd4 <fail>
+80002e80:	14c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002e84 <test_18>:
+80002e84:	01200193          	li	gp,18
+80002e88:	00001517          	auipc	a0,0x1
+80002e8c:	25850513          	addi	a0,a0,600 # 800040e0 <test_18_data>
+80002e90:	00052007          	flw	ft0,0(a0)
+80002e94:	00452087          	flw	ft1,4(a0)
+80002e98:	00852107          	flw	ft2,8(a0)
+80002e9c:	00c52683          	lw	a3,12(a0)
+80002ea0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002ea4:	001015f3          	fsflags	a1,zero
+80002ea8:	01000613          	li	a2,16
+80002eac:	12d51463          	bne	a0,a3,80002fd4 <fail>
+80002eb0:	12c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002eb4 <test_19>:
+80002eb4:	01300193          	li	gp,19
+80002eb8:	00001517          	auipc	a0,0x1
+80002ebc:	23850513          	addi	a0,a0,568 # 800040f0 <test_19_data>
+80002ec0:	00052007          	flw	ft0,0(a0)
+80002ec4:	00452087          	flw	ft1,4(a0)
+80002ec8:	00852107          	flw	ft2,8(a0)
+80002ecc:	00c52683          	lw	a3,12(a0)
+80002ed0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002ed4:	001015f3          	fsflags	a1,zero
+80002ed8:	00000613          	li	a2,0
+80002edc:	0ed51c63          	bne	a0,a3,80002fd4 <fail>
+80002ee0:	0ec59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002ee4 <test_42>:
+80002ee4:	00001097          	auipc	ra,0x1
+80002ee8:	21c08093          	addi	ra,ra,540 # 80004100 <begin_signature>
+80002eec:	0000a087          	flw	ft1,0(ra)
+80002ef0:	c000f0d3          	fcvt.w.s	ra,ft1
+80002ef4:	80000eb7          	lui	t4,0x80000
+80002ef8:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002efc:	02a00193          	li	gp,42
+80002f00:	0dd09a63          	bne	ra,t4,80002fd4 <fail>
+
+80002f04 <test_44>:
+80002f04:	00001097          	auipc	ra,0x1
+80002f08:	1fc08093          	addi	ra,ra,508 # 80004100 <begin_signature>
+80002f0c:	0080a087          	flw	ft1,8(ra)
+80002f10:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f14:	80000eb7          	lui	t4,0x80000
+80002f18:	02c00193          	li	gp,44
+80002f1c:	0bd09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f20 <test_52>:
+80002f20:	00001097          	auipc	ra,0x1
+80002f24:	1e008093          	addi	ra,ra,480 # 80004100 <begin_signature>
+80002f28:	0040a087          	flw	ft1,4(ra)
+80002f2c:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f30:	80000eb7          	lui	t4,0x80000
+80002f34:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002f38:	03400193          	li	gp,52
+80002f3c:	09d09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f40 <test_54>:
+80002f40:	00001097          	auipc	ra,0x1
+80002f44:	1c008093          	addi	ra,ra,448 # 80004100 <begin_signature>
+80002f48:	00c0a087          	flw	ft1,12(ra)
+80002f4c:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f50:	80000eb7          	lui	t4,0x80000
+80002f54:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002f58:	03600193          	li	gp,54
+80002f5c:	07d09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f60 <test_62>:
+80002f60:	00001097          	auipc	ra,0x1
+80002f64:	1a008093          	addi	ra,ra,416 # 80004100 <begin_signature>
+80002f68:	0000a087          	flw	ft1,0(ra)
+80002f6c:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002f70:	fff00e93          	li	t4,-1
+80002f74:	03e00193          	li	gp,62
+80002f78:	05d09e63          	bne	ra,t4,80002fd4 <fail>
+
+80002f7c <test_63>:
+80002f7c:	00001097          	auipc	ra,0x1
+80002f80:	18408093          	addi	ra,ra,388 # 80004100 <begin_signature>
+80002f84:	0040a087          	flw	ft1,4(ra)
+80002f88:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002f8c:	fff00e93          	li	t4,-1
+80002f90:	03f00193          	li	gp,63
+80002f94:	05d09063          	bne	ra,t4,80002fd4 <fail>
+
+80002f98 <test_64>:
+80002f98:	00001097          	auipc	ra,0x1
+80002f9c:	16808093          	addi	ra,ra,360 # 80004100 <begin_signature>
+80002fa0:	0080a087          	flw	ft1,8(ra)
+80002fa4:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002fa8:	00000e93          	li	t4,0
+80002fac:	04000193          	li	gp,64
+80002fb0:	03d09263          	bne	ra,t4,80002fd4 <fail>
+
+80002fb4 <test_65>:
+80002fb4:	00001097          	auipc	ra,0x1
+80002fb8:	14c08093          	addi	ra,ra,332 # 80004100 <begin_signature>
+80002fbc:	00c0a087          	flw	ft1,12(ra)
+80002fc0:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002fc4:	fff00e93          	li	t4,-1
+80002fc8:	04100193          	li	gp,65
+80002fcc:	01d09463          	bne	ra,t4,80002fd4 <fail>
+80002fd0:	00301a63          	bne	zero,gp,80002fe4 <pass>
+
+80002fd4 <fail>:
+80002fd4:	00119513          	slli	a0,gp,0x1
+80002fd8:	00050063          	beqz	a0,80002fd8 <fail+0x4>
+80002fdc:	00156513          	ori	a0,a0,1
+80002fe0:	00000073          	ecall
+
+80002fe4 <pass>:
+80002fe4:	00100513          	li	a0,1
+80002fe8:	00000073          	ecall
+80002fec:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	cccd                	beqz	s1,800040ba <test_15_data+0xa>
+80004002:	bf8c                	fsd	fa1,56(a5)
+80004004:	0000                	unimp
+80004006:	0000                	unimp
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	ffff                	0xffff
+8000400e:	ffff                	0xffff
+
+80004010 <test_3_data>:
+80004010:	0000                	unimp
+80004012:	bf80                	fsd	fs0,56(a5)
+80004014:	0000                	unimp
+80004016:	0000                	unimp
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	ffff                	0xffff
+8000401e:	ffff                	0xffff
+
+80004020 <test_4_data>:
+80004020:	6666                	flw	fa2,88(sp)
+80004022:	bf66                	fsd	fs9,440(sp)
+80004024:	0000                	unimp
+80004026:	0000                	unimp
+80004028:	0000                	unimp
+8000402a:	0000                	unimp
+8000402c:	0000                	unimp
+8000402e:	0000                	unimp
+
+80004030 <test_5_data>:
+80004030:	6666                	flw	fa2,88(sp)
+80004032:	3f66                	fld	ft10,120(sp)
+80004034:	0000                	unimp
+80004036:	0000                	unimp
+80004038:	0000                	unimp
+8000403a:	0000                	unimp
+8000403c:	0000                	unimp
+8000403e:	0000                	unimp
+
+80004040 <test_6_data>:
+80004040:	0000                	unimp
+80004042:	3f80                	fld	fs0,56(a5)
+80004044:	0000                	unimp
+80004046:	0000                	unimp
+80004048:	0000                	unimp
+8000404a:	0000                	unimp
+8000404c:	0001                	nop
+8000404e:	0000                	unimp
+
+80004050 <test_7_data>:
+80004050:	cccd                	beqz	s1,8000410a <begin_signature+0xa>
+80004052:	3f8c                	fld	fa1,56(a5)
+80004054:	0000                	unimp
+80004056:	0000                	unimp
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0001                	nop
+8000405e:	0000                	unimp
+
+80004060 <test_8_data>:
+80004060:	d05e                	sw	s7,32(sp)
+80004062:	cf32                	sw	a2,156(sp)
+80004064:	0000                	unimp
+80004066:	0000                	unimp
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	8000                	0x8000
+
+80004070 <test_9_data>:
+80004070:	d05e                	sw	s7,32(sp)
+80004072:	4f32                	lw	t5,12(sp)
+80004074:	0000                	unimp
+80004076:	0000                	unimp
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	ffff                	0xffff
+8000407e:	7fff                	0x7fff
+
+80004080 <test_12_data>:
+80004080:	0000                	unimp
+80004082:	c040                	sw	s0,4(s0)
+80004084:	0000                	unimp
+80004086:	0000                	unimp
+80004088:	0000                	unimp
+8000408a:	0000                	unimp
+8000408c:	0000                	unimp
+8000408e:	0000                	unimp
+
+80004090 <test_13_data>:
+80004090:	0000                	unimp
+80004092:	bf80                	fsd	fs0,56(a5)
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	0000                	unimp
+8000409a:	0000                	unimp
+8000409c:	0000                	unimp
+8000409e:	0000                	unimp
+
+800040a0 <test_14_data>:
+800040a0:	6666                	flw	fa2,88(sp)
+800040a2:	bf66                	fsd	fs9,440(sp)
+800040a4:	0000                	unimp
+800040a6:	0000                	unimp
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	0000                	unimp
+800040ae:	0000                	unimp
+
+800040b0 <test_15_data>:
+800040b0:	6666                	flw	fa2,88(sp)
+800040b2:	3f66                	fld	ft10,120(sp)
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	0000                	unimp
+
+800040c0 <test_16_data>:
+800040c0:	0000                	unimp
+800040c2:	3f80                	fld	fs0,56(a5)
+800040c4:	0000                	unimp
+800040c6:	0000                	unimp
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0001                	nop
+800040ce:	0000                	unimp
+
+800040d0 <test_17_data>:
+800040d0:	cccd                	beqz	s1,8000418a <tdat_d+0x7a>
+800040d2:	3f8c                	fld	fa1,56(a5)
+800040d4:	0000                	unimp
+800040d6:	0000                	unimp
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0001                	nop
+800040de:	0000                	unimp
+
+800040e0 <test_18_data>:
+800040e0:	d05e                	sw	s7,32(sp)
+800040e2:	cf32                	sw	a2,156(sp)
+800040e4:	0000                	unimp
+800040e6:	0000                	unimp
+800040e8:	0000                	unimp
+800040ea:	0000                	unimp
+800040ec:	0000                	unimp
+800040ee:	0000                	unimp
+
+800040f0 <test_19_data>:
+800040f0:	d05e                	sw	s7,32(sp)
+800040f2:	4f32                	lw	t5,12(sp)
+800040f4:	0000                	unimp
+800040f6:	0000                	unimp
+800040f8:	0000                	unimp
+800040fa:	0000                	unimp
+800040fc:	5e00                	lw	s0,56(a2)
+800040fe:	b2d0                	fsd	fa2,160(a3)
+
+80004100 <begin_signature>:
+80004100:	ffff                	0xffff
+80004102:	ffff                	0xffff
+80004104:	ffff                	0xffff
+80004106:	7fff                	0x7fff
+80004108:	0000                	unimp
+8000410a:	ff80                	fsw	fs0,56(a5)
+8000410c:	0000                	unimp
+8000410e:	7f80                	flw	fs0,56(a5)
+
+80004110 <tdat_d>:
+80004110:	ffff                	0xffff
+80004112:	ffff                	0xffff
+80004114:	ffff                	0xffff
+80004116:	ffff                	0xffff
+80004118:	ffff                	0xffff
+8000411a:	ffff                	0xffff
+8000411c:	ffff                	0xffff
+8000411e:	7fff                	0x7fff
+80004120:	0000                	unimp
+80004122:	0000                	unimp
+80004124:	0000                	unimp
+80004126:	fff0                	fsw	fa2,124(a5)
+80004128:	0000                	unimp
+8000412a:	0000                	unimp
+8000412c:	0000                	unimp
+8000412e:	7ff0                	flw	fa2,124(a5)
diff --git a/test/riscv-tests/rv32ud-v-fcvt_w.elf b/test/riscv-tests/rv32ud-v-fcvt_w.elf
new file mode 100644
index 0000000..ddbd2db
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fcvt_w.elf
diff --git a/test/riscv-tests/rv32ud-v-fdiv.dump b/test/riscv-tests/rv32ud-v-fdiv.dump
new file mode 100644
index 0000000..ee9c731
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fdiv.dump
@@ -0,0 +1,1198 @@
+
+rv32ud-v-fdiv:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	95c58593          	addi	a1,a1,-1700 # 80002e24 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	97858593          	addi	a1,a1,-1672 # 80002eb0 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	92458593          	addi	a1,a1,-1756 # 80002ec8 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	85858593          	addi	a1,a1,-1960 # 80002e68 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	84858593          	addi	a1,a1,-1976 # 80002f90 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	7b058593          	addi	a1,a1,1968 # 80002f6c <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	6ac60613          	addi	a2,a2,1708 # 80002fbc <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	5bc60613          	addi	a2,a2,1468 # 80002f38 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	53c60613          	addi	a2,a2,1340 # 80002f04 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	00300793          	li	a5,3
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	008197b7          	lui	a5,0x819
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	08678793          	addi	a5,a5,134 # 819086 <_start-0x7f7e6f7a>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00000517          	auipc	a0,0x0
+80002bec:	41850513          	addi	a0,a0,1048 # 80003000 <test_2_data>
+80002bf0:	00053007          	fld	ft0,0(a0)
+80002bf4:	00853087          	fld	ft1,8(a0)
+80002bf8:	01053107          	fld	ft2,16(a0)
+80002bfc:	01852683          	lw	a3,24(a0)
+80002c00:	01c52303          	lw	t1,28(a0)
+80002c04:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+80002c08:	00353027          	fsd	ft3,0(a0)
+80002c0c:	00452383          	lw	t2,4(a0)
+80002c10:	00052503          	lw	a0,0(a0)
+80002c14:	001015f3          	fsflags	a1,zero
+80002c18:	00100613          	li	a2,1
+80002c1c:	1ed51663          	bne	a0,a3,80002e08 <fail>
+80002c20:	1e731463          	bne	t1,t2,80002e08 <fail>
+80002c24:	1ec59263          	bne	a1,a2,80002e08 <fail>
+
+80002c28 <test_3>:
+80002c28:	00300193          	li	gp,3
+80002c2c:	00000517          	auipc	a0,0x0
+80002c30:	3f450513          	addi	a0,a0,1012 # 80003020 <test_3_data>
+80002c34:	00053007          	fld	ft0,0(a0)
+80002c38:	00853087          	fld	ft1,8(a0)
+80002c3c:	01053107          	fld	ft2,16(a0)
+80002c40:	01852683          	lw	a3,24(a0)
+80002c44:	01c52303          	lw	t1,28(a0)
+80002c48:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+80002c4c:	00353027          	fsd	ft3,0(a0)
+80002c50:	00452383          	lw	t2,4(a0)
+80002c54:	00052503          	lw	a0,0(a0)
+80002c58:	001015f3          	fsflags	a1,zero
+80002c5c:	00100613          	li	a2,1
+80002c60:	1ad51463          	bne	a0,a3,80002e08 <fail>
+80002c64:	1a731263          	bne	t1,t2,80002e08 <fail>
+80002c68:	1ac59063          	bne	a1,a2,80002e08 <fail>
+
+80002c6c <test_4>:
+80002c6c:	00400193          	li	gp,4
+80002c70:	00000517          	auipc	a0,0x0
+80002c74:	3d050513          	addi	a0,a0,976 # 80003040 <test_4_data>
+80002c78:	00053007          	fld	ft0,0(a0)
+80002c7c:	00853087          	fld	ft1,8(a0)
+80002c80:	01053107          	fld	ft2,16(a0)
+80002c84:	01852683          	lw	a3,24(a0)
+80002c88:	01c52303          	lw	t1,28(a0)
+80002c8c:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+80002c90:	00353027          	fsd	ft3,0(a0)
+80002c94:	00452383          	lw	t2,4(a0)
+80002c98:	00052503          	lw	a0,0(a0)
+80002c9c:	001015f3          	fsflags	a1,zero
+80002ca0:	00000613          	li	a2,0
+80002ca4:	16d51263          	bne	a0,a3,80002e08 <fail>
+80002ca8:	16731063          	bne	t1,t2,80002e08 <fail>
+80002cac:	14c59e63          	bne	a1,a2,80002e08 <fail>
+
+80002cb0 <test_5>:
+80002cb0:	00500193          	li	gp,5
+80002cb4:	00000517          	auipc	a0,0x0
+80002cb8:	3ac50513          	addi	a0,a0,940 # 80003060 <test_5_data>
+80002cbc:	00053007          	fld	ft0,0(a0)
+80002cc0:	00853087          	fld	ft1,8(a0)
+80002cc4:	01053107          	fld	ft2,16(a0)
+80002cc8:	01852683          	lw	a3,24(a0)
+80002ccc:	01c52303          	lw	t1,28(a0)
+80002cd0:	5a0071d3          	fsqrt.d	ft3,ft0
+80002cd4:	00353027          	fsd	ft3,0(a0)
+80002cd8:	00452383          	lw	t2,4(a0)
+80002cdc:	00052503          	lw	a0,0(a0)
+80002ce0:	001015f3          	fsflags	a1,zero
+80002ce4:	00100613          	li	a2,1
+80002ce8:	12d51063          	bne	a0,a3,80002e08 <fail>
+80002cec:	10731e63          	bne	t1,t2,80002e08 <fail>
+80002cf0:	10c59c63          	bne	a1,a2,80002e08 <fail>
+
+80002cf4 <test_6>:
+80002cf4:	00600193          	li	gp,6
+80002cf8:	00000517          	auipc	a0,0x0
+80002cfc:	38850513          	addi	a0,a0,904 # 80003080 <test_6_data>
+80002d00:	00053007          	fld	ft0,0(a0)
+80002d04:	00853087          	fld	ft1,8(a0)
+80002d08:	01053107          	fld	ft2,16(a0)
+80002d0c:	01852683          	lw	a3,24(a0)
+80002d10:	01c52303          	lw	t1,28(a0)
+80002d14:	5a0071d3          	fsqrt.d	ft3,ft0
+80002d18:	00353027          	fsd	ft3,0(a0)
+80002d1c:	00452383          	lw	t2,4(a0)
+80002d20:	00052503          	lw	a0,0(a0)
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00000613          	li	a2,0
+80002d2c:	0cd51e63          	bne	a0,a3,80002e08 <fail>
+80002d30:	0c731c63          	bne	t1,t2,80002e08 <fail>
+80002d34:	0cc59a63          	bne	a1,a2,80002e08 <fail>
+
+80002d38 <test_16>:
+80002d38:	01000193          	li	gp,16
+80002d3c:	00000517          	auipc	a0,0x0
+80002d40:	36450513          	addi	a0,a0,868 # 800030a0 <test_16_data>
+80002d44:	00053007          	fld	ft0,0(a0)
+80002d48:	00853087          	fld	ft1,8(a0)
+80002d4c:	01053107          	fld	ft2,16(a0)
+80002d50:	01852683          	lw	a3,24(a0)
+80002d54:	01c52303          	lw	t1,28(a0)
+80002d58:	5a0071d3          	fsqrt.d	ft3,ft0
+80002d5c:	00353027          	fsd	ft3,0(a0)
+80002d60:	00452383          	lw	t2,4(a0)
+80002d64:	00052503          	lw	a0,0(a0)
+80002d68:	001015f3          	fsflags	a1,zero
+80002d6c:	01000613          	li	a2,16
+80002d70:	08d51c63          	bne	a0,a3,80002e08 <fail>
+80002d74:	08731a63          	bne	t1,t2,80002e08 <fail>
+80002d78:	08c59863          	bne	a1,a2,80002e08 <fail>
+
+80002d7c <test_7>:
+80002d7c:	00700193          	li	gp,7
+80002d80:	00000517          	auipc	a0,0x0
+80002d84:	34050513          	addi	a0,a0,832 # 800030c0 <test_7_data>
+80002d88:	00053007          	fld	ft0,0(a0)
+80002d8c:	00853087          	fld	ft1,8(a0)
+80002d90:	01053107          	fld	ft2,16(a0)
+80002d94:	01852683          	lw	a3,24(a0)
+80002d98:	01c52303          	lw	t1,28(a0)
+80002d9c:	5a0071d3          	fsqrt.d	ft3,ft0
+80002da0:	00353027          	fsd	ft3,0(a0)
+80002da4:	00452383          	lw	t2,4(a0)
+80002da8:	00052503          	lw	a0,0(a0)
+80002dac:	001015f3          	fsflags	a1,zero
+80002db0:	00100613          	li	a2,1
+80002db4:	04d51a63          	bne	a0,a3,80002e08 <fail>
+80002db8:	04731863          	bne	t1,t2,80002e08 <fail>
+80002dbc:	04c59663          	bne	a1,a2,80002e08 <fail>
+
+80002dc0 <test_8>:
+80002dc0:	00800193          	li	gp,8
+80002dc4:	00000517          	auipc	a0,0x0
+80002dc8:	31c50513          	addi	a0,a0,796 # 800030e0 <test_8_data>
+80002dcc:	00053007          	fld	ft0,0(a0)
+80002dd0:	00853087          	fld	ft1,8(a0)
+80002dd4:	01053107          	fld	ft2,16(a0)
+80002dd8:	01852683          	lw	a3,24(a0)
+80002ddc:	01c52303          	lw	t1,28(a0)
+80002de0:	5a0071d3          	fsqrt.d	ft3,ft0
+80002de4:	00353027          	fsd	ft3,0(a0)
+80002de8:	00452383          	lw	t2,4(a0)
+80002dec:	00052503          	lw	a0,0(a0)
+80002df0:	001015f3          	fsflags	a1,zero
+80002df4:	00100613          	li	a2,1
+80002df8:	00d51863          	bne	a0,a3,80002e08 <fail>
+80002dfc:	00731663          	bne	t1,t2,80002e08 <fail>
+80002e00:	00c59463          	bne	a1,a2,80002e08 <fail>
+80002e04:	00301a63          	bne	zero,gp,80002e18 <pass>
+
+80002e08 <fail>:
+80002e08:	00119513          	slli	a0,gp,0x1
+80002e0c:	00050063          	beqz	a0,80002e0c <fail+0x4>
+80002e10:	00156513          	ori	a0,a0,1
+80002e14:	00000073          	ecall
+
+80002e18 <pass>:
+80002e18:	00100513          	li	a0,1
+80002e1c:	00000073          	ecall
+80002e20:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	d4f1                	beqz	s1,80002fcc <pass+0x1b4>
+80003002:	53c8                	lw	a0,36(a5)
+80003004:	400921fb          	0x400921fb
+80003008:	b0dd                	j	800028ee <handle_trap+0x276>
+8000300a:	89f1                	andi	a1,a1,28
+8000300c:	bf0a                	fsd	ft2,440(sp)
+8000300e:	4005                	c.li	zero,1
+80003010:	0000                	unimp
+80003012:	0000                	unimp
+80003014:	0000                	unimp
+80003016:	0000                	unimp
+80003018:	83ec                	0x83ec
+8000301a:	7ddbf6c3          	0x7ddbf6c3
+8000301e:	3ff2                	fld	ft11,312(sp)
+
+80003020 <test_3_data>:
+80003020:	0000                	unimp
+80003022:	0000                	unimp
+80003024:	4800                	lw	s0,16(s0)
+80003026:	6666c093          	xori	ra,a3,1638
+8000302a:	6666                	flw	fa2,88(sp)
+8000302c:	4c66                	lw	s8,88(sp)
+8000302e:	00004093          	xori	ra,zero,0
+80003032:	0000                	unimp
+80003034:	0000                	unimp
+80003036:	0000                	unimp
+80003038:	29a5                	jal	800034b0 <begin_signature+0x3b0>
+8000303a:	3e19                	jal	80002b50 <vm_boot+0x110>
+8000303c:	f8b4                	fsw	fa3,112(s1)
+8000303e:	          	jal	t6,7ff1ed8c <_start-0xe1274>
+
+80003040 <test_4_data>:
+80003040:	d4f1                	beqz	s1,8000300c <test_2_data+0xc>
+80003042:	53c8                	lw	a0,36(a5)
+80003044:	400921fb          	0x400921fb
+80003048:	0000                	unimp
+8000304a:	0000                	unimp
+8000304c:	0000                	unimp
+8000304e:	3ff0                	fld	fa2,248(a5)
+80003050:	0000                	unimp
+80003052:	0000                	unimp
+80003054:	0000                	unimp
+80003056:	0000                	unimp
+80003058:	d4f1                	beqz	s1,80003024 <test_3_data+0x4>
+8000305a:	53c8                	lw	a0,36(a5)
+8000305c:	400921fb          	0x400921fb
+
+80003060 <test_5_data>:
+80003060:	d4f1                	beqz	s1,8000302c <test_3_data+0xc>
+80003062:	53c8                	lw	a0,36(a5)
+80003064:	400921fb          	0x400921fb
+80003068:	0000                	unimp
+8000306a:	0000                	unimp
+8000306c:	0000                	unimp
+8000306e:	0000                	unimp
+80003070:	0000                	unimp
+80003072:	0000                	unimp
+80003074:	0000                	unimp
+80003076:	0000                	unimp
+80003078:	916f587b          	0x916f587b
+8000307c:	5bf8                	lw	a4,116(a5)
+8000307e:	3ffc                	fld	fa5,248(a5)
+
+80003080 <test_6_data>:
+80003080:	0000                	unimp
+80003082:	0000                	unimp
+80003084:	8800                	0x8800
+80003086:	000040c3          	fmadd.s	ft1,ft0,ft0,ft0,rmm
+8000308a:	0000                	unimp
+8000308c:	0000                	unimp
+8000308e:	0000                	unimp
+80003090:	0000                	unimp
+80003092:	0000                	unimp
+80003094:	0000                	unimp
+80003096:	0000                	unimp
+80003098:	0000                	unimp
+8000309a:	0000                	unimp
+8000309c:	0000                	unimp
+8000309e:	4059                	c.li	zero,22
+
+800030a0 <test_16_data>:
+800030a0:	0000                	unimp
+800030a2:	0000                	unimp
+800030a4:	0000                	unimp
+800030a6:	bff0                	fsd	fa2,248(a5)
+800030a8:	0000                	unimp
+800030aa:	0000                	unimp
+800030ac:	0000                	unimp
+800030ae:	0000                	unimp
+800030b0:	0000                	unimp
+800030b2:	0000                	unimp
+800030b4:	0000                	unimp
+800030b6:	0000                	unimp
+800030b8:	0000                	unimp
+800030ba:	0000                	unimp
+800030bc:	0000                	unimp
+800030be:	7ff8                	flw	fa4,124(a5)
+
+800030c0 <test_7_data>:
+800030c0:	0000                	unimp
+800030c2:	0000                	unimp
+800030c4:	6000                	flw	fs0,0(s0)
+800030c6:	4065                	c.li	zero,25
+800030c8:	0000                	unimp
+800030ca:	0000                	unimp
+800030cc:	0000                	unimp
+800030ce:	0000                	unimp
+800030d0:	0000                	unimp
+800030d2:	0000                	unimp
+800030d4:	0000                	unimp
+800030d6:	0000                	unimp
+800030d8:	74f5                	lui	s1,0xffffd
+800030da:	ce96                	sw	t0,92(sp)
+800030dc:	2744                	fld	fs1,136(a4)
+800030de:	402a                	0x402a
+
+800030e0 <test_8_data>:
+800030e0:	a105                	j	80003500 <begin_signature+0x400>
+800030e2:	c70a                	sw	sp,140(sp)
+800030e4:	94df 3e85 0000      	0x3e8594df
+800030ea:	0000                	unimp
+800030ec:	0000                	unimp
+800030ee:	0000                	unimp
+800030f0:	0000                	unimp
+800030f2:	0000                	unimp
+800030f4:	0000                	unimp
+800030f6:	0000                	unimp
+800030f8:	7f99                	lui	t6,0xfffe6
+800030fa:	4789c0e3          	blt	s3,s8,80003d5a <begin_signature+0xc5a>
+800030fe:	3f3a                	fld	ft10,424(sp)
diff --git a/test/riscv-tests/rv32ud-v-fdiv.elf b/test/riscv-tests/rv32ud-v-fdiv.elf
new file mode 100644
index 0000000..8ee5839
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fdiv.elf
diff --git a/test/riscv-tests/rv32ud-v-fmadd.dump b/test/riscv-tests/rv32ud-v-fmadd.dump
new file mode 100644
index 0000000..2927645
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fmadd.dump
@@ -0,0 +1,1354 @@
+
+rv32ud-v-fmadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	a6c58593          	addi	a1,a1,-1428 # 80002f34 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	a8858593          	addi	a1,a1,-1400 # 80002fc0 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	a3458593          	addi	a1,a1,-1484 # 80002fd8 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	96858593          	addi	a1,a1,-1688 # 80002f78 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	95858593          	addi	a1,a1,-1704 # 800030a0 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	8c058593          	addi	a1,a1,-1856 # 8000307c <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	7bc60613          	addi	a2,a2,1980 # 800030cc <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	6cc60613          	addi	a2,a2,1740 # 80003048 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	64c60613          	addi	a2,a2,1612 # 80003014 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	03b00793          	li	a5,59
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0d9687b7          	lui	a5,0xd968
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	7c078793          	addi	a5,a5,1984 # d9687c0 <_start-0x72697840>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00053007          	fld	ft0,0(a0)
+80002bf4:	00853087          	fld	ft1,8(a0)
+80002bf8:	01053107          	fld	ft2,16(a0)
+80002bfc:	01852683          	lw	a3,24(a0)
+80002c00:	01c52303          	lw	t1,28(a0)
+80002c04:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+80002c08:	00353027          	fsd	ft3,0(a0)
+80002c0c:	00452383          	lw	t2,4(a0)
+80002c10:	00052503          	lw	a0,0(a0)
+80002c14:	001015f3          	fsflags	a1,zero
+80002c18:	00000613          	li	a2,0
+80002c1c:	2ed51e63          	bne	a0,a3,80002f18 <fail>
+80002c20:	2e731c63          	bne	t1,t2,80002f18 <fail>
+80002c24:	2ec59a63          	bne	a1,a2,80002f18 <fail>
+
+80002c28 <test_3>:
+80002c28:	00300193          	li	gp,3
+80002c2c:	00001517          	auipc	a0,0x1
+80002c30:	3f450513          	addi	a0,a0,1012 # 80004020 <test_3_data>
+80002c34:	00053007          	fld	ft0,0(a0)
+80002c38:	00853087          	fld	ft1,8(a0)
+80002c3c:	01053107          	fld	ft2,16(a0)
+80002c40:	01852683          	lw	a3,24(a0)
+80002c44:	01c52303          	lw	t1,28(a0)
+80002c48:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+80002c4c:	00353027          	fsd	ft3,0(a0)
+80002c50:	00452383          	lw	t2,4(a0)
+80002c54:	00052503          	lw	a0,0(a0)
+80002c58:	001015f3          	fsflags	a1,zero
+80002c5c:	00100613          	li	a2,1
+80002c60:	2ad51c63          	bne	a0,a3,80002f18 <fail>
+80002c64:	2a731a63          	bne	t1,t2,80002f18 <fail>
+80002c68:	2ac59863          	bne	a1,a2,80002f18 <fail>
+
+80002c6c <test_4>:
+80002c6c:	00400193          	li	gp,4
+80002c70:	00001517          	auipc	a0,0x1
+80002c74:	3d050513          	addi	a0,a0,976 # 80004040 <test_4_data>
+80002c78:	00053007          	fld	ft0,0(a0)
+80002c7c:	00853087          	fld	ft1,8(a0)
+80002c80:	01053107          	fld	ft2,16(a0)
+80002c84:	01852683          	lw	a3,24(a0)
+80002c88:	01c52303          	lw	t1,28(a0)
+80002c8c:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+80002c90:	00353027          	fsd	ft3,0(a0)
+80002c94:	00452383          	lw	t2,4(a0)
+80002c98:	00052503          	lw	a0,0(a0)
+80002c9c:	001015f3          	fsflags	a1,zero
+80002ca0:	00000613          	li	a2,0
+80002ca4:	26d51a63          	bne	a0,a3,80002f18 <fail>
+80002ca8:	26731863          	bne	t1,t2,80002f18 <fail>
+80002cac:	26c59663          	bne	a1,a2,80002f18 <fail>
+
+80002cb0 <test_5>:
+80002cb0:	00500193          	li	gp,5
+80002cb4:	00001517          	auipc	a0,0x1
+80002cb8:	3ac50513          	addi	a0,a0,940 # 80004060 <test_5_data>
+80002cbc:	00053007          	fld	ft0,0(a0)
+80002cc0:	00853087          	fld	ft1,8(a0)
+80002cc4:	01053107          	fld	ft2,16(a0)
+80002cc8:	01852683          	lw	a3,24(a0)
+80002ccc:	01c52303          	lw	t1,28(a0)
+80002cd0:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+80002cd4:	00353027          	fsd	ft3,0(a0)
+80002cd8:	00452383          	lw	t2,4(a0)
+80002cdc:	00052503          	lw	a0,0(a0)
+80002ce0:	001015f3          	fsflags	a1,zero
+80002ce4:	00000613          	li	a2,0
+80002ce8:	22d51863          	bne	a0,a3,80002f18 <fail>
+80002cec:	22731663          	bne	t1,t2,80002f18 <fail>
+80002cf0:	22c59463          	bne	a1,a2,80002f18 <fail>
+
+80002cf4 <test_6>:
+80002cf4:	00600193          	li	gp,6
+80002cf8:	00001517          	auipc	a0,0x1
+80002cfc:	38850513          	addi	a0,a0,904 # 80004080 <test_6_data>
+80002d00:	00053007          	fld	ft0,0(a0)
+80002d04:	00853087          	fld	ft1,8(a0)
+80002d08:	01053107          	fld	ft2,16(a0)
+80002d0c:	01852683          	lw	a3,24(a0)
+80002d10:	01c52303          	lw	t1,28(a0)
+80002d14:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+80002d18:	00353027          	fsd	ft3,0(a0)
+80002d1c:	00452383          	lw	t2,4(a0)
+80002d20:	00052503          	lw	a0,0(a0)
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00100613          	li	a2,1
+80002d2c:	1ed51663          	bne	a0,a3,80002f18 <fail>
+80002d30:	1e731463          	bne	t1,t2,80002f18 <fail>
+80002d34:	1ec59263          	bne	a1,a2,80002f18 <fail>
+
+80002d38 <test_7>:
+80002d38:	00700193          	li	gp,7
+80002d3c:	00001517          	auipc	a0,0x1
+80002d40:	36450513          	addi	a0,a0,868 # 800040a0 <test_7_data>
+80002d44:	00053007          	fld	ft0,0(a0)
+80002d48:	00853087          	fld	ft1,8(a0)
+80002d4c:	01053107          	fld	ft2,16(a0)
+80002d50:	01852683          	lw	a3,24(a0)
+80002d54:	01c52303          	lw	t1,28(a0)
+80002d58:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+80002d5c:	00353027          	fsd	ft3,0(a0)
+80002d60:	00452383          	lw	t2,4(a0)
+80002d64:	00052503          	lw	a0,0(a0)
+80002d68:	001015f3          	fsflags	a1,zero
+80002d6c:	00000613          	li	a2,0
+80002d70:	1ad51463          	bne	a0,a3,80002f18 <fail>
+80002d74:	1a731263          	bne	t1,t2,80002f18 <fail>
+80002d78:	1ac59063          	bne	a1,a2,80002f18 <fail>
+
+80002d7c <test_8>:
+80002d7c:	00800193          	li	gp,8
+80002d80:	00001517          	auipc	a0,0x1
+80002d84:	34050513          	addi	a0,a0,832 # 800040c0 <test_8_data>
+80002d88:	00053007          	fld	ft0,0(a0)
+80002d8c:	00853087          	fld	ft1,8(a0)
+80002d90:	01053107          	fld	ft2,16(a0)
+80002d94:	01852683          	lw	a3,24(a0)
+80002d98:	01c52303          	lw	t1,28(a0)
+80002d9c:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+80002da0:	00353027          	fsd	ft3,0(a0)
+80002da4:	00452383          	lw	t2,4(a0)
+80002da8:	00052503          	lw	a0,0(a0)
+80002dac:	001015f3          	fsflags	a1,zero
+80002db0:	00000613          	li	a2,0
+80002db4:	16d51263          	bne	a0,a3,80002f18 <fail>
+80002db8:	16731063          	bne	t1,t2,80002f18 <fail>
+80002dbc:	14c59e63          	bne	a1,a2,80002f18 <fail>
+
+80002dc0 <test_9>:
+80002dc0:	00900193          	li	gp,9
+80002dc4:	00001517          	auipc	a0,0x1
+80002dc8:	31c50513          	addi	a0,a0,796 # 800040e0 <test_9_data>
+80002dcc:	00053007          	fld	ft0,0(a0)
+80002dd0:	00853087          	fld	ft1,8(a0)
+80002dd4:	01053107          	fld	ft2,16(a0)
+80002dd8:	01852683          	lw	a3,24(a0)
+80002ddc:	01c52303          	lw	t1,28(a0)
+80002de0:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+80002de4:	00353027          	fsd	ft3,0(a0)
+80002de8:	00452383          	lw	t2,4(a0)
+80002dec:	00052503          	lw	a0,0(a0)
+80002df0:	001015f3          	fsflags	a1,zero
+80002df4:	00100613          	li	a2,1
+80002df8:	12d51063          	bne	a0,a3,80002f18 <fail>
+80002dfc:	10731e63          	bne	t1,t2,80002f18 <fail>
+80002e00:	10c59c63          	bne	a1,a2,80002f18 <fail>
+
+80002e04 <test_10>:
+80002e04:	00a00193          	li	gp,10
+80002e08:	00001517          	auipc	a0,0x1
+80002e0c:	2f850513          	addi	a0,a0,760 # 80004100 <test_10_data>
+80002e10:	00053007          	fld	ft0,0(a0)
+80002e14:	00853087          	fld	ft1,8(a0)
+80002e18:	01053107          	fld	ft2,16(a0)
+80002e1c:	01852683          	lw	a3,24(a0)
+80002e20:	01c52303          	lw	t1,28(a0)
+80002e24:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+80002e28:	00353027          	fsd	ft3,0(a0)
+80002e2c:	00452383          	lw	t2,4(a0)
+80002e30:	00052503          	lw	a0,0(a0)
+80002e34:	001015f3          	fsflags	a1,zero
+80002e38:	00000613          	li	a2,0
+80002e3c:	0cd51e63          	bne	a0,a3,80002f18 <fail>
+80002e40:	0c731c63          	bne	t1,t2,80002f18 <fail>
+80002e44:	0cc59a63          	bne	a1,a2,80002f18 <fail>
+
+80002e48 <test_11>:
+80002e48:	00b00193          	li	gp,11
+80002e4c:	00001517          	auipc	a0,0x1
+80002e50:	2d450513          	addi	a0,a0,724 # 80004120 <test_11_data>
+80002e54:	00053007          	fld	ft0,0(a0)
+80002e58:	00853087          	fld	ft1,8(a0)
+80002e5c:	01053107          	fld	ft2,16(a0)
+80002e60:	01852683          	lw	a3,24(a0)
+80002e64:	01c52303          	lw	t1,28(a0)
+80002e68:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+80002e6c:	00353027          	fsd	ft3,0(a0)
+80002e70:	00452383          	lw	t2,4(a0)
+80002e74:	00052503          	lw	a0,0(a0)
+80002e78:	001015f3          	fsflags	a1,zero
+80002e7c:	00000613          	li	a2,0
+80002e80:	08d51c63          	bne	a0,a3,80002f18 <fail>
+80002e84:	08731a63          	bne	t1,t2,80002f18 <fail>
+80002e88:	08c59863          	bne	a1,a2,80002f18 <fail>
+
+80002e8c <test_12>:
+80002e8c:	00c00193          	li	gp,12
+80002e90:	00001517          	auipc	a0,0x1
+80002e94:	2b050513          	addi	a0,a0,688 # 80004140 <test_12_data>
+80002e98:	00053007          	fld	ft0,0(a0)
+80002e9c:	00853087          	fld	ft1,8(a0)
+80002ea0:	01053107          	fld	ft2,16(a0)
+80002ea4:	01852683          	lw	a3,24(a0)
+80002ea8:	01c52303          	lw	t1,28(a0)
+80002eac:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+80002eb0:	00353027          	fsd	ft3,0(a0)
+80002eb4:	00452383          	lw	t2,4(a0)
+80002eb8:	00052503          	lw	a0,0(a0)
+80002ebc:	001015f3          	fsflags	a1,zero
+80002ec0:	00100613          	li	a2,1
+80002ec4:	04d51a63          	bne	a0,a3,80002f18 <fail>
+80002ec8:	04731863          	bne	t1,t2,80002f18 <fail>
+80002ecc:	04c59663          	bne	a1,a2,80002f18 <fail>
+
+80002ed0 <test_13>:
+80002ed0:	00d00193          	li	gp,13
+80002ed4:	00001517          	auipc	a0,0x1
+80002ed8:	28c50513          	addi	a0,a0,652 # 80004160 <test_13_data>
+80002edc:	00053007          	fld	ft0,0(a0)
+80002ee0:	00853087          	fld	ft1,8(a0)
+80002ee4:	01053107          	fld	ft2,16(a0)
+80002ee8:	01852683          	lw	a3,24(a0)
+80002eec:	01c52303          	lw	t1,28(a0)
+80002ef0:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+80002ef4:	00353027          	fsd	ft3,0(a0)
+80002ef8:	00452383          	lw	t2,4(a0)
+80002efc:	00052503          	lw	a0,0(a0)
+80002f00:	001015f3          	fsflags	a1,zero
+80002f04:	00000613          	li	a2,0
+80002f08:	00d51863          	bne	a0,a3,80002f18 <fail>
+80002f0c:	00731663          	bne	t1,t2,80002f18 <fail>
+80002f10:	00c59463          	bne	a1,a2,80002f18 <fail>
+80002f14:	00301a63          	bne	zero,gp,80002f28 <pass>
+
+80002f18 <fail>:
+80002f18:	00119513          	slli	a0,gp,0x1
+80002f1c:	00050063          	beqz	a0,80002f1c <fail+0x4>
+80002f20:	00156513          	ori	a0,a0,1
+80002f24:	00000073          	ecall
+
+80002f28 <pass>:
+80002f28:	00100513          	li	a0,1
+80002f2c:	00000073          	ecall
+80002f30:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	0000                	unimp
+80004002:	0000                	unimp
+80004004:	0000                	unimp
+80004006:	3ff0                	fld	fa2,248(a5)
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	0000                	unimp
+8000400e:	4004                	lw	s1,0(s0)
+80004010:	0000                	unimp
+80004012:	0000                	unimp
+80004014:	0000                	unimp
+80004016:	3ff0                	fld	fa2,248(a5)
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	0000                	unimp
+8000401e:	400c                	lw	a1,0(s0)
+
+80004020 <test_3_data>:
+80004020:	0000                	unimp
+80004022:	0000                	unimp
+80004024:	0000                	unimp
+80004026:	bff0                	fsd	fa2,248(a5)
+80004028:	6666                	flw	fa2,88(sp)
+8000402a:	6666                	flw	fa2,88(sp)
+8000402c:	4c66                	lw	s8,88(sp)
+8000402e:	999ac093          	xori	ra,s5,-1639
+80004032:	9999                	andi	a1,a1,-26
+80004034:	9999                	andi	a1,a1,-26
+80004036:	3ff1                	jal	80004012 <test_2_data+0x12>
+80004038:	cccc                	sw	a1,28(s1)
+8000403a:	cccc                	sw	a1,28(s1)
+8000403c:	50cc                	lw	a1,36(s1)
+8000403e:	          	xori	ra,zero,0
+
+80004040 <test_4_data>:
+80004040:	0000                	unimp
+80004042:	0000                	unimp
+80004044:	0000                	unimp
+80004046:	4000                	lw	s0,0(s0)
+80004048:	0000                	unimp
+8000404a:	0000                	unimp
+8000404c:	0000                	unimp
+8000404e:	c014                	sw	a3,0(s0)
+80004050:	0000                	unimp
+80004052:	0000                	unimp
+80004054:	0000                	unimp
+80004056:	c000                	sw	s0,0(s0)
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0000                	unimp
+8000405e:	c028                	sw	a0,64(s0)
+
+80004060 <test_5_data>:
+80004060:	0000                	unimp
+80004062:	0000                	unimp
+80004064:	0000                	unimp
+80004066:	3ff0                	fld	fa2,248(a5)
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	4004                	lw	s1,0(s0)
+80004070:	0000                	unimp
+80004072:	0000                	unimp
+80004074:	0000                	unimp
+80004076:	3ff0                	fld	fa2,248(a5)
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	0000                	unimp
+8000407e:	c00c                	sw	a1,0(s0)
+
+80004080 <test_6_data>:
+80004080:	0000                	unimp
+80004082:	0000                	unimp
+80004084:	0000                	unimp
+80004086:	bff0                	fsd	fa2,248(a5)
+80004088:	6666                	flw	fa2,88(sp)
+8000408a:	6666                	flw	fa2,88(sp)
+8000408c:	4c66                	lw	s8,88(sp)
+8000408e:	999ac093          	xori	ra,s5,-1639
+80004092:	9999                	andi	a1,a1,-26
+80004094:	9999                	andi	a1,a1,-26
+80004096:	3ff1                	jal	80004072 <test_5_data+0x12>
+80004098:	cccc                	sw	a1,28(s1)
+8000409a:	cccc                	sw	a1,28(s1)
+8000409c:	50cc                	lw	a1,36(s1)
+8000409e:	          	xori	ra,ra,0
+
+800040a0 <test_7_data>:
+800040a0:	0000                	unimp
+800040a2:	0000                	unimp
+800040a4:	0000                	unimp
+800040a6:	4000                	lw	s0,0(s0)
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	0000                	unimp
+800040ae:	c014                	sw	a3,0(s0)
+800040b0:	0000                	unimp
+800040b2:	0000                	unimp
+800040b4:	0000                	unimp
+800040b6:	c000                	sw	s0,0(s0)
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	4028                	lw	a0,64(s0)
+
+800040c0 <test_8_data>:
+800040c0:	0000                	unimp
+800040c2:	0000                	unimp
+800040c4:	0000                	unimp
+800040c6:	3ff0                	fld	fa2,248(a5)
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	4004                	lw	s1,0(s0)
+800040d0:	0000                	unimp
+800040d2:	0000                	unimp
+800040d4:	0000                	unimp
+800040d6:	3ff0                	fld	fa2,248(a5)
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	3ff8                	fld	fa4,248(a5)
+
+800040e0 <test_9_data>:
+800040e0:	0000                	unimp
+800040e2:	0000                	unimp
+800040e4:	0000                	unimp
+800040e6:	bff0                	fsd	fa2,248(a5)
+800040e8:	6666                	flw	fa2,88(sp)
+800040ea:	6666                	flw	fa2,88(sp)
+800040ec:	4c66                	lw	s8,88(sp)
+800040ee:	999ac093          	xori	ra,s5,-1639
+800040f2:	9999                	andi	a1,a1,-26
+800040f4:	9999                	andi	a1,a1,-26
+800040f6:	3ff1                	jal	800040d2 <test_8_data+0x12>
+800040f8:	0000                	unimp
+800040fa:	0000                	unimp
+800040fc:	4800                	lw	s0,16(s0)
+800040fe:	          	xori	ra,zero,0
+
+80004100 <test_10_data>:
+80004100:	0000                	unimp
+80004102:	0000                	unimp
+80004104:	0000                	unimp
+80004106:	4000                	lw	s0,0(s0)
+80004108:	0000                	unimp
+8000410a:	0000                	unimp
+8000410c:	0000                	unimp
+8000410e:	c014                	sw	a3,0(s0)
+80004110:	0000                	unimp
+80004112:	0000                	unimp
+80004114:	0000                	unimp
+80004116:	c000                	sw	s0,0(s0)
+80004118:	0000                	unimp
+8000411a:	0000                	unimp
+8000411c:	0000                	unimp
+8000411e:	c020                	sw	s0,64(s0)
+
+80004120 <test_11_data>:
+80004120:	0000                	unimp
+80004122:	0000                	unimp
+80004124:	0000                	unimp
+80004126:	3ff0                	fld	fa2,248(a5)
+80004128:	0000                	unimp
+8000412a:	0000                	unimp
+8000412c:	0000                	unimp
+8000412e:	4004                	lw	s1,0(s0)
+80004130:	0000                	unimp
+80004132:	0000                	unimp
+80004134:	0000                	unimp
+80004136:	3ff0                	fld	fa2,248(a5)
+80004138:	0000                	unimp
+8000413a:	0000                	unimp
+8000413c:	0000                	unimp
+8000413e:	bff8                	fsd	fa4,248(a5)
+
+80004140 <test_12_data>:
+80004140:	0000                	unimp
+80004142:	0000                	unimp
+80004144:	0000                	unimp
+80004146:	bff0                	fsd	fa2,248(a5)
+80004148:	6666                	flw	fa2,88(sp)
+8000414a:	6666                	flw	fa2,88(sp)
+8000414c:	4c66                	lw	s8,88(sp)
+8000414e:	999ac093          	xori	ra,s5,-1639
+80004152:	9999                	andi	a1,a1,-26
+80004154:	9999                	andi	a1,a1,-26
+80004156:	3ff1                	jal	80004132 <test_11_data+0x12>
+80004158:	0000                	unimp
+8000415a:	0000                	unimp
+8000415c:	4800                	lw	s0,16(s0)
+8000415e:	          	xori	ra,ra,0
+
+80004160 <test_13_data>:
+80004160:	0000                	unimp
+80004162:	0000                	unimp
+80004164:	0000                	unimp
+80004166:	4000                	lw	s0,0(s0)
+80004168:	0000                	unimp
+8000416a:	0000                	unimp
+8000416c:	0000                	unimp
+8000416e:	c014                	sw	a3,0(s0)
+80004170:	0000                	unimp
+80004172:	0000                	unimp
+80004174:	0000                	unimp
+80004176:	c000                	sw	s0,0(s0)
+80004178:	0000                	unimp
+8000417a:	0000                	unimp
+8000417c:	0000                	unimp
+8000417e:	4020                	lw	s0,64(s0)
diff --git a/test/riscv-tests/rv32ud-v-fmadd.elf b/test/riscv-tests/rv32ud-v-fmadd.elf
new file mode 100644
index 0000000..737fe51
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fmadd.elf
diff --git a/test/riscv-tests/rv32ud-v-fmin.dump b/test/riscv-tests/rv32ud-v-fmin.dump
new file mode 100644
index 0000000..1817a18
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fmin.dump
@@ -0,0 +1,1571 @@
+
+rv32ud-v-fmin:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	c0458593          	addi	a1,a1,-1020 # 800030cc <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	c2058593          	addi	a1,a1,-992 # 80003158 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	bcc58593          	addi	a1,a1,-1076 # 80003170 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	b0058593          	addi	a1,a1,-1280 # 80003110 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	af058593          	addi	a1,a1,-1296 # 80003238 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	a5858593          	addi	a1,a1,-1448 # 80003214 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00001617          	auipc	a2,0x1
+80002914:	95460613          	addi	a2,a2,-1708 # 80003264 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00001617          	auipc	a2,0x1
+80002980:	86460613          	addi	a2,a2,-1948 # 800031e0 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	7e460613          	addi	a2,a2,2020 # 800031ac <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	00100793          	li	a5,1
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0f1707b7          	lui	a5,0xf170
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	0b878793          	addi	a5,a5,184 # f1700b8 <_start-0x70e8ff48>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00053007          	fld	ft0,0(a0)
+80002bf4:	00853087          	fld	ft1,8(a0)
+80002bf8:	01053107          	fld	ft2,16(a0)
+80002bfc:	01852683          	lw	a3,24(a0)
+80002c00:	01c52303          	lw	t1,28(a0)
+80002c04:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002c08:	00353027          	fsd	ft3,0(a0)
+80002c0c:	00452383          	lw	t2,4(a0)
+80002c10:	00052503          	lw	a0,0(a0)
+80002c14:	001015f3          	fsflags	a1,zero
+80002c18:	00000613          	li	a2,0
+80002c1c:	48d51a63          	bne	a0,a3,800030b0 <fail>
+80002c20:	48731863          	bne	t1,t2,800030b0 <fail>
+80002c24:	48c59663          	bne	a1,a2,800030b0 <fail>
+
+80002c28 <test_3>:
+80002c28:	00300193          	li	gp,3
+80002c2c:	00001517          	auipc	a0,0x1
+80002c30:	3f450513          	addi	a0,a0,1012 # 80004020 <test_3_data>
+80002c34:	00053007          	fld	ft0,0(a0)
+80002c38:	00853087          	fld	ft1,8(a0)
+80002c3c:	01053107          	fld	ft2,16(a0)
+80002c40:	01852683          	lw	a3,24(a0)
+80002c44:	01c52303          	lw	t1,28(a0)
+80002c48:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002c4c:	00353027          	fsd	ft3,0(a0)
+80002c50:	00452383          	lw	t2,4(a0)
+80002c54:	00052503          	lw	a0,0(a0)
+80002c58:	001015f3          	fsflags	a1,zero
+80002c5c:	00000613          	li	a2,0
+80002c60:	44d51863          	bne	a0,a3,800030b0 <fail>
+80002c64:	44731663          	bne	t1,t2,800030b0 <fail>
+80002c68:	44c59463          	bne	a1,a2,800030b0 <fail>
+
+80002c6c <test_4>:
+80002c6c:	00400193          	li	gp,4
+80002c70:	00001517          	auipc	a0,0x1
+80002c74:	3d050513          	addi	a0,a0,976 # 80004040 <test_4_data>
+80002c78:	00053007          	fld	ft0,0(a0)
+80002c7c:	00853087          	fld	ft1,8(a0)
+80002c80:	01053107          	fld	ft2,16(a0)
+80002c84:	01852683          	lw	a3,24(a0)
+80002c88:	01c52303          	lw	t1,28(a0)
+80002c8c:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002c90:	00353027          	fsd	ft3,0(a0)
+80002c94:	00452383          	lw	t2,4(a0)
+80002c98:	00052503          	lw	a0,0(a0)
+80002c9c:	001015f3          	fsflags	a1,zero
+80002ca0:	00000613          	li	a2,0
+80002ca4:	40d51663          	bne	a0,a3,800030b0 <fail>
+80002ca8:	40731463          	bne	t1,t2,800030b0 <fail>
+80002cac:	40c59263          	bne	a1,a2,800030b0 <fail>
+
+80002cb0 <test_5>:
+80002cb0:	00500193          	li	gp,5
+80002cb4:	00001517          	auipc	a0,0x1
+80002cb8:	3ac50513          	addi	a0,a0,940 # 80004060 <test_5_data>
+80002cbc:	00053007          	fld	ft0,0(a0)
+80002cc0:	00853087          	fld	ft1,8(a0)
+80002cc4:	01053107          	fld	ft2,16(a0)
+80002cc8:	01852683          	lw	a3,24(a0)
+80002ccc:	01c52303          	lw	t1,28(a0)
+80002cd0:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002cd4:	00353027          	fsd	ft3,0(a0)
+80002cd8:	00452383          	lw	t2,4(a0)
+80002cdc:	00052503          	lw	a0,0(a0)
+80002ce0:	001015f3          	fsflags	a1,zero
+80002ce4:	00000613          	li	a2,0
+80002ce8:	3cd51463          	bne	a0,a3,800030b0 <fail>
+80002cec:	3c731263          	bne	t1,t2,800030b0 <fail>
+80002cf0:	3cc59063          	bne	a1,a2,800030b0 <fail>
+
+80002cf4 <test_6>:
+80002cf4:	00600193          	li	gp,6
+80002cf8:	00001517          	auipc	a0,0x1
+80002cfc:	38850513          	addi	a0,a0,904 # 80004080 <test_6_data>
+80002d00:	00053007          	fld	ft0,0(a0)
+80002d04:	00853087          	fld	ft1,8(a0)
+80002d08:	01053107          	fld	ft2,16(a0)
+80002d0c:	01852683          	lw	a3,24(a0)
+80002d10:	01c52303          	lw	t1,28(a0)
+80002d14:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002d18:	00353027          	fsd	ft3,0(a0)
+80002d1c:	00452383          	lw	t2,4(a0)
+80002d20:	00052503          	lw	a0,0(a0)
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00000613          	li	a2,0
+80002d2c:	38d51263          	bne	a0,a3,800030b0 <fail>
+80002d30:	38731063          	bne	t1,t2,800030b0 <fail>
+80002d34:	36c59e63          	bne	a1,a2,800030b0 <fail>
+
+80002d38 <test_7>:
+80002d38:	00700193          	li	gp,7
+80002d3c:	00001517          	auipc	a0,0x1
+80002d40:	36450513          	addi	a0,a0,868 # 800040a0 <test_7_data>
+80002d44:	00053007          	fld	ft0,0(a0)
+80002d48:	00853087          	fld	ft1,8(a0)
+80002d4c:	01053107          	fld	ft2,16(a0)
+80002d50:	01852683          	lw	a3,24(a0)
+80002d54:	01c52303          	lw	t1,28(a0)
+80002d58:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002d5c:	00353027          	fsd	ft3,0(a0)
+80002d60:	00452383          	lw	t2,4(a0)
+80002d64:	00052503          	lw	a0,0(a0)
+80002d68:	001015f3          	fsflags	a1,zero
+80002d6c:	00000613          	li	a2,0
+80002d70:	34d51063          	bne	a0,a3,800030b0 <fail>
+80002d74:	32731e63          	bne	t1,t2,800030b0 <fail>
+80002d78:	32c59c63          	bne	a1,a2,800030b0 <fail>
+
+80002d7c <test_12>:
+80002d7c:	00c00193          	li	gp,12
+80002d80:	00001517          	auipc	a0,0x1
+80002d84:	34050513          	addi	a0,a0,832 # 800040c0 <test_12_data>
+80002d88:	00053007          	fld	ft0,0(a0)
+80002d8c:	00853087          	fld	ft1,8(a0)
+80002d90:	01053107          	fld	ft2,16(a0)
+80002d94:	01852683          	lw	a3,24(a0)
+80002d98:	01c52303          	lw	t1,28(a0)
+80002d9c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002da0:	00353027          	fsd	ft3,0(a0)
+80002da4:	00452383          	lw	t2,4(a0)
+80002da8:	00052503          	lw	a0,0(a0)
+80002dac:	001015f3          	fsflags	a1,zero
+80002db0:	00000613          	li	a2,0
+80002db4:	2ed51e63          	bne	a0,a3,800030b0 <fail>
+80002db8:	2e731c63          	bne	t1,t2,800030b0 <fail>
+80002dbc:	2ec59a63          	bne	a1,a2,800030b0 <fail>
+
+80002dc0 <test_13>:
+80002dc0:	00d00193          	li	gp,13
+80002dc4:	00001517          	auipc	a0,0x1
+80002dc8:	31c50513          	addi	a0,a0,796 # 800040e0 <test_13_data>
+80002dcc:	00053007          	fld	ft0,0(a0)
+80002dd0:	00853087          	fld	ft1,8(a0)
+80002dd4:	01053107          	fld	ft2,16(a0)
+80002dd8:	01852683          	lw	a3,24(a0)
+80002ddc:	01c52303          	lw	t1,28(a0)
+80002de0:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002de4:	00353027          	fsd	ft3,0(a0)
+80002de8:	00452383          	lw	t2,4(a0)
+80002dec:	00052503          	lw	a0,0(a0)
+80002df0:	001015f3          	fsflags	a1,zero
+80002df4:	00000613          	li	a2,0
+80002df8:	2ad51c63          	bne	a0,a3,800030b0 <fail>
+80002dfc:	2a731a63          	bne	t1,t2,800030b0 <fail>
+80002e00:	2ac59863          	bne	a1,a2,800030b0 <fail>
+
+80002e04 <test_14>:
+80002e04:	00e00193          	li	gp,14
+80002e08:	00001517          	auipc	a0,0x1
+80002e0c:	2f850513          	addi	a0,a0,760 # 80004100 <test_14_data>
+80002e10:	00053007          	fld	ft0,0(a0)
+80002e14:	00853087          	fld	ft1,8(a0)
+80002e18:	01053107          	fld	ft2,16(a0)
+80002e1c:	01852683          	lw	a3,24(a0)
+80002e20:	01c52303          	lw	t1,28(a0)
+80002e24:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002e28:	00353027          	fsd	ft3,0(a0)
+80002e2c:	00452383          	lw	t2,4(a0)
+80002e30:	00052503          	lw	a0,0(a0)
+80002e34:	001015f3          	fsflags	a1,zero
+80002e38:	00000613          	li	a2,0
+80002e3c:	26d51a63          	bne	a0,a3,800030b0 <fail>
+80002e40:	26731863          	bne	t1,t2,800030b0 <fail>
+80002e44:	26c59663          	bne	a1,a2,800030b0 <fail>
+
+80002e48 <test_15>:
+80002e48:	00f00193          	li	gp,15
+80002e4c:	00001517          	auipc	a0,0x1
+80002e50:	2d450513          	addi	a0,a0,724 # 80004120 <test_15_data>
+80002e54:	00053007          	fld	ft0,0(a0)
+80002e58:	00853087          	fld	ft1,8(a0)
+80002e5c:	01053107          	fld	ft2,16(a0)
+80002e60:	01852683          	lw	a3,24(a0)
+80002e64:	01c52303          	lw	t1,28(a0)
+80002e68:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002e6c:	00353027          	fsd	ft3,0(a0)
+80002e70:	00452383          	lw	t2,4(a0)
+80002e74:	00052503          	lw	a0,0(a0)
+80002e78:	001015f3          	fsflags	a1,zero
+80002e7c:	00000613          	li	a2,0
+80002e80:	22d51863          	bne	a0,a3,800030b0 <fail>
+80002e84:	22731663          	bne	t1,t2,800030b0 <fail>
+80002e88:	22c59463          	bne	a1,a2,800030b0 <fail>
+
+80002e8c <test_16>:
+80002e8c:	01000193          	li	gp,16
+80002e90:	00001517          	auipc	a0,0x1
+80002e94:	2b050513          	addi	a0,a0,688 # 80004140 <test_16_data>
+80002e98:	00053007          	fld	ft0,0(a0)
+80002e9c:	00853087          	fld	ft1,8(a0)
+80002ea0:	01053107          	fld	ft2,16(a0)
+80002ea4:	01852683          	lw	a3,24(a0)
+80002ea8:	01c52303          	lw	t1,28(a0)
+80002eac:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002eb0:	00353027          	fsd	ft3,0(a0)
+80002eb4:	00452383          	lw	t2,4(a0)
+80002eb8:	00052503          	lw	a0,0(a0)
+80002ebc:	001015f3          	fsflags	a1,zero
+80002ec0:	00000613          	li	a2,0
+80002ec4:	1ed51663          	bne	a0,a3,800030b0 <fail>
+80002ec8:	1e731463          	bne	t1,t2,800030b0 <fail>
+80002ecc:	1ec59263          	bne	a1,a2,800030b0 <fail>
+
+80002ed0 <test_17>:
+80002ed0:	01100193          	li	gp,17
+80002ed4:	00001517          	auipc	a0,0x1
+80002ed8:	28c50513          	addi	a0,a0,652 # 80004160 <test_17_data>
+80002edc:	00053007          	fld	ft0,0(a0)
+80002ee0:	00853087          	fld	ft1,8(a0)
+80002ee4:	01053107          	fld	ft2,16(a0)
+80002ee8:	01852683          	lw	a3,24(a0)
+80002eec:	01c52303          	lw	t1,28(a0)
+80002ef0:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002ef4:	00353027          	fsd	ft3,0(a0)
+80002ef8:	00452383          	lw	t2,4(a0)
+80002efc:	00052503          	lw	a0,0(a0)
+80002f00:	001015f3          	fsflags	a1,zero
+80002f04:	00000613          	li	a2,0
+80002f08:	1ad51463          	bne	a0,a3,800030b0 <fail>
+80002f0c:	1a731263          	bne	t1,t2,800030b0 <fail>
+80002f10:	1ac59063          	bne	a1,a2,800030b0 <fail>
+
+80002f14 <test_20>:
+80002f14:	01400193          	li	gp,20
+80002f18:	00001517          	auipc	a0,0x1
+80002f1c:	26850513          	addi	a0,a0,616 # 80004180 <test_20_data>
+80002f20:	00053007          	fld	ft0,0(a0)
+80002f24:	00853087          	fld	ft1,8(a0)
+80002f28:	01053107          	fld	ft2,16(a0)
+80002f2c:	01852683          	lw	a3,24(a0)
+80002f30:	01c52303          	lw	t1,28(a0)
+80002f34:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002f38:	00353027          	fsd	ft3,0(a0)
+80002f3c:	00452383          	lw	t2,4(a0)
+80002f40:	00052503          	lw	a0,0(a0)
+80002f44:	001015f3          	fsflags	a1,zero
+80002f48:	01000613          	li	a2,16
+80002f4c:	16d51263          	bne	a0,a3,800030b0 <fail>
+80002f50:	16731063          	bne	t1,t2,800030b0 <fail>
+80002f54:	14c59e63          	bne	a1,a2,800030b0 <fail>
+
+80002f58 <test_21>:
+80002f58:	01500193          	li	gp,21
+80002f5c:	00001517          	auipc	a0,0x1
+80002f60:	24450513          	addi	a0,a0,580 # 800041a0 <test_21_data>
+80002f64:	00053007          	fld	ft0,0(a0)
+80002f68:	00853087          	fld	ft1,8(a0)
+80002f6c:	01053107          	fld	ft2,16(a0)
+80002f70:	01852683          	lw	a3,24(a0)
+80002f74:	01c52303          	lw	t1,28(a0)
+80002f78:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80002f7c:	00353027          	fsd	ft3,0(a0)
+80002f80:	00452383          	lw	t2,4(a0)
+80002f84:	00052503          	lw	a0,0(a0)
+80002f88:	001015f3          	fsflags	a1,zero
+80002f8c:	00000613          	li	a2,0
+80002f90:	12d51063          	bne	a0,a3,800030b0 <fail>
+80002f94:	10731e63          	bne	t1,t2,800030b0 <fail>
+80002f98:	10c59c63          	bne	a1,a2,800030b0 <fail>
+
+80002f9c <test_30>:
+80002f9c:	01e00193          	li	gp,30
+80002fa0:	00001517          	auipc	a0,0x1
+80002fa4:	22050513          	addi	a0,a0,544 # 800041c0 <test_30_data>
+80002fa8:	00053007          	fld	ft0,0(a0)
+80002fac:	00853087          	fld	ft1,8(a0)
+80002fb0:	01053107          	fld	ft2,16(a0)
+80002fb4:	01852683          	lw	a3,24(a0)
+80002fb8:	01c52303          	lw	t1,28(a0)
+80002fbc:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80002fc0:	00353027          	fsd	ft3,0(a0)
+80002fc4:	00452383          	lw	t2,4(a0)
+80002fc8:	00052503          	lw	a0,0(a0)
+80002fcc:	001015f3          	fsflags	a1,zero
+80002fd0:	00000613          	li	a2,0
+80002fd4:	0cd51e63          	bne	a0,a3,800030b0 <fail>
+80002fd8:	0c731c63          	bne	t1,t2,800030b0 <fail>
+80002fdc:	0cc59a63          	bne	a1,a2,800030b0 <fail>
+
+80002fe0 <test_31>:
+80002fe0:	01f00193          	li	gp,31
+80002fe4:	00001517          	auipc	a0,0x1
+80002fe8:	1fc50513          	addi	a0,a0,508 # 800041e0 <test_31_data>
+80002fec:	00053007          	fld	ft0,0(a0)
+80002ff0:	00853087          	fld	ft1,8(a0)
+80002ff4:	01053107          	fld	ft2,16(a0)
+80002ff8:	01852683          	lw	a3,24(a0)
+80002ffc:	01c52303          	lw	t1,28(a0)
+80003000:	2a1001d3          	fmin.d	ft3,ft0,ft1
+80003004:	00353027          	fsd	ft3,0(a0)
+80003008:	00452383          	lw	t2,4(a0)
+8000300c:	00052503          	lw	a0,0(a0)
+80003010:	001015f3          	fsflags	a1,zero
+80003014:	00000613          	li	a2,0
+80003018:	08d51c63          	bne	a0,a3,800030b0 <fail>
+8000301c:	08731a63          	bne	t1,t2,800030b0 <fail>
+80003020:	08c59863          	bne	a1,a2,800030b0 <fail>
+
+80003024 <test_32>:
+80003024:	02000193          	li	gp,32
+80003028:	00001517          	auipc	a0,0x1
+8000302c:	1d850513          	addi	a0,a0,472 # 80004200 <test_32_data>
+80003030:	00053007          	fld	ft0,0(a0)
+80003034:	00853087          	fld	ft1,8(a0)
+80003038:	01053107          	fld	ft2,16(a0)
+8000303c:	01852683          	lw	a3,24(a0)
+80003040:	01c52303          	lw	t1,28(a0)
+80003044:	2a1011d3          	fmax.d	ft3,ft0,ft1
+80003048:	00353027          	fsd	ft3,0(a0)
+8000304c:	00452383          	lw	t2,4(a0)
+80003050:	00052503          	lw	a0,0(a0)
+80003054:	001015f3          	fsflags	a1,zero
+80003058:	00000613          	li	a2,0
+8000305c:	04d51a63          	bne	a0,a3,800030b0 <fail>
+80003060:	04731863          	bne	t1,t2,800030b0 <fail>
+80003064:	04c59663          	bne	a1,a2,800030b0 <fail>
+
+80003068 <test_33>:
+80003068:	02100193          	li	gp,33
+8000306c:	00001517          	auipc	a0,0x1
+80003070:	1b450513          	addi	a0,a0,436 # 80004220 <test_33_data>
+80003074:	00053007          	fld	ft0,0(a0)
+80003078:	00853087          	fld	ft1,8(a0)
+8000307c:	01053107          	fld	ft2,16(a0)
+80003080:	01852683          	lw	a3,24(a0)
+80003084:	01c52303          	lw	t1,28(a0)
+80003088:	2a1011d3          	fmax.d	ft3,ft0,ft1
+8000308c:	00353027          	fsd	ft3,0(a0)
+80003090:	00452383          	lw	t2,4(a0)
+80003094:	00052503          	lw	a0,0(a0)
+80003098:	001015f3          	fsflags	a1,zero
+8000309c:	00000613          	li	a2,0
+800030a0:	00d51863          	bne	a0,a3,800030b0 <fail>
+800030a4:	00731663          	bne	t1,t2,800030b0 <fail>
+800030a8:	00c59463          	bne	a1,a2,800030b0 <fail>
+800030ac:	00301a63          	bne	zero,gp,800030c0 <pass>
+
+800030b0 <fail>:
+800030b0:	00119513          	slli	a0,gp,0x1
+800030b4:	00050063          	beqz	a0,800030b4 <fail+0x4>
+800030b8:	00156513          	ori	a0,a0,1
+800030bc:	00000073          	ecall
+
+800030c0 <pass>:
+800030c0:	00100513          	li	a0,1
+800030c4:	00000073          	ecall
+800030c8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	0000                	unimp
+80004002:	0000                	unimp
+80004004:	0000                	unimp
+80004006:	4004                	lw	s1,0(s0)
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	0000                	unimp
+8000400e:	3ff0                	fld	fa2,248(a5)
+80004010:	0000                	unimp
+80004012:	0000                	unimp
+80004014:	0000                	unimp
+80004016:	0000                	unimp
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	0000                	unimp
+8000401e:	3ff0                	fld	fa2,248(a5)
+
+80004020 <test_3_data>:
+80004020:	6666                	flw	fa2,88(sp)
+80004022:	6666                	flw	fa2,88(sp)
+80004024:	4c66                	lw	s8,88(sp)
+80004026:	999ac093          	xori	ra,s5,-1639
+8000402a:	9999                	andi	a1,a1,-26
+8000402c:	9999                	andi	a1,a1,-26
+8000402e:	3ff1                	jal	8000400a <test_2_data+0xa>
+80004030:	0000                	unimp
+80004032:	0000                	unimp
+80004034:	0000                	unimp
+80004036:	0000                	unimp
+80004038:	6666                	flw	fa2,88(sp)
+8000403a:	6666                	flw	fa2,88(sp)
+8000403c:	4c66                	lw	s8,88(sp)
+8000403e:	          	xori	ra,s5,-1639
+
+80004040 <test_4_data>:
+80004040:	999a                	add	s3,s3,t1
+80004042:	9999                	andi	a1,a1,-26
+80004044:	9999                	andi	a1,a1,-26
+80004046:	3ff1                	jal	80004022 <test_3_data+0x2>
+80004048:	6666                	flw	fa2,88(sp)
+8000404a:	6666                	flw	fa2,88(sp)
+8000404c:	4c66                	lw	s8,88(sp)
+8000404e:	0000c093          	xori	ra,ra,0
+80004052:	0000                	unimp
+80004054:	0000                	unimp
+80004056:	0000                	unimp
+80004058:	6666                	flw	fa2,88(sp)
+8000405a:	6666                	flw	fa2,88(sp)
+8000405c:	4c66                	lw	s8,88(sp)
+8000405e:	          	not	ra,t6
+
+80004060 <test_5_data>:
+80004060:	ffff                	0xffff
+80004062:	ffff                	0xffff
+80004064:	ffff                	0xffff
+80004066:	7fff                	0x7fff
+80004068:	6666                	flw	fa2,88(sp)
+8000406a:	6666                	flw	fa2,88(sp)
+8000406c:	4c66                	lw	s8,88(sp)
+8000406e:	0000c093          	xori	ra,ra,0
+80004072:	0000                	unimp
+80004074:	0000                	unimp
+80004076:	0000                	unimp
+80004078:	6666                	flw	fa2,88(sp)
+8000407a:	6666                	flw	fa2,88(sp)
+8000407c:	4c66                	lw	s8,88(sp)
+8000407e:	          	xori	ra,gp,-689
+
+80004080 <test_6_data>:
+80004080:	d4f1                	beqz	s1,8000404c <test_4_data+0xc>
+80004082:	53c8                	lw	a0,36(a5)
+80004084:	400921fb          	0x400921fb
+80004088:	8c3a                	mv	s8,a4
+8000408a:	e230                	fsw	fa2,64(a2)
+8000408c:	798e                	flw	fs3,224(sp)
+8000408e:	3e45                	jal	80003c3e <pass+0xb7e>
+80004090:	0000                	unimp
+80004092:	0000                	unimp
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	8c3a                	mv	s8,a4
+8000409a:	e230                	fsw	fa2,64(a2)
+8000409c:	798e                	flw	fs3,224(sp)
+8000409e:	3e45                	jal	80003c4e <pass+0xb8e>
+
+800040a0 <test_7_data>:
+800040a0:	0000                	unimp
+800040a2:	0000                	unimp
+800040a4:	0000                	unimp
+800040a6:	bff0                	fsd	fa2,248(a5)
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	0000                	unimp
+800040ae:	c000                	sw	s0,0(s0)
+800040b0:	0000                	unimp
+800040b2:	0000                	unimp
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	c000                	sw	s0,0(s0)
+
+800040c0 <test_12_data>:
+800040c0:	0000                	unimp
+800040c2:	0000                	unimp
+800040c4:	0000                	unimp
+800040c6:	4004                	lw	s1,0(s0)
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	3ff0                	fld	fa2,248(a5)
+800040d0:	0000                	unimp
+800040d2:	0000                	unimp
+800040d4:	0000                	unimp
+800040d6:	0000                	unimp
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	4004                	lw	s1,0(s0)
+
+800040e0 <test_13_data>:
+800040e0:	6666                	flw	fa2,88(sp)
+800040e2:	6666                	flw	fa2,88(sp)
+800040e4:	4c66                	lw	s8,88(sp)
+800040e6:	999ac093          	xori	ra,s5,-1639
+800040ea:	9999                	andi	a1,a1,-26
+800040ec:	9999                	andi	a1,a1,-26
+800040ee:	3ff1                	jal	800040ca <test_12_data+0xa>
+800040f0:	0000                	unimp
+800040f2:	0000                	unimp
+800040f4:	0000                	unimp
+800040f6:	0000                	unimp
+800040f8:	999a                	add	s3,s3,t1
+800040fa:	9999                	andi	a1,a1,-26
+800040fc:	9999                	andi	a1,a1,-26
+800040fe:	3ff1                	jal	800040da <test_12_data+0x1a>
+
+80004100 <test_14_data>:
+80004100:	999a                	add	s3,s3,t1
+80004102:	9999                	andi	a1,a1,-26
+80004104:	9999                	andi	a1,a1,-26
+80004106:	3ff1                	jal	800040e2 <test_13_data+0x2>
+80004108:	6666                	flw	fa2,88(sp)
+8000410a:	6666                	flw	fa2,88(sp)
+8000410c:	4c66                	lw	s8,88(sp)
+8000410e:	0000c093          	xori	ra,ra,0
+80004112:	0000                	unimp
+80004114:	0000                	unimp
+80004116:	0000                	unimp
+80004118:	999a                	add	s3,s3,t1
+8000411a:	9999                	andi	a1,a1,-26
+8000411c:	9999                	andi	a1,a1,-26
+8000411e:	3ff1                	jal	800040fa <test_13_data+0x1a>
+
+80004120 <test_15_data>:
+80004120:	ffff                	0xffff
+80004122:	ffff                	0xffff
+80004124:	ffff                	0xffff
+80004126:	7fff                	0x7fff
+80004128:	6666                	flw	fa2,88(sp)
+8000412a:	6666                	flw	fa2,88(sp)
+8000412c:	4c66                	lw	s8,88(sp)
+8000412e:	0000c093          	xori	ra,ra,0
+80004132:	0000                	unimp
+80004134:	0000                	unimp
+80004136:	0000                	unimp
+80004138:	6666                	flw	fa2,88(sp)
+8000413a:	6666                	flw	fa2,88(sp)
+8000413c:	4c66                	lw	s8,88(sp)
+8000413e:	          	xori	ra,gp,-689
+
+80004140 <test_16_data>:
+80004140:	d4f1                	beqz	s1,8000410c <test_14_data+0xc>
+80004142:	53c8                	lw	a0,36(a5)
+80004144:	400921fb          	0x400921fb
+80004148:	8c3a                	mv	s8,a4
+8000414a:	e230                	fsw	fa2,64(a2)
+8000414c:	798e                	flw	fs3,224(sp)
+8000414e:	3e45                	jal	80003cfe <pass+0xc3e>
+80004150:	0000                	unimp
+80004152:	0000                	unimp
+80004154:	0000                	unimp
+80004156:	0000                	unimp
+80004158:	d4f1                	beqz	s1,80004124 <test_15_data+0x4>
+8000415a:	53c8                	lw	a0,36(a5)
+8000415c:	400921fb          	0x400921fb
+
+80004160 <test_17_data>:
+80004160:	0000                	unimp
+80004162:	0000                	unimp
+80004164:	0000                	unimp
+80004166:	bff0                	fsd	fa2,248(a5)
+80004168:	0000                	unimp
+8000416a:	0000                	unimp
+8000416c:	0000                	unimp
+8000416e:	c000                	sw	s0,0(s0)
+80004170:	0000                	unimp
+80004172:	0000                	unimp
+80004174:	0000                	unimp
+80004176:	0000                	unimp
+80004178:	0000                	unimp
+8000417a:	0000                	unimp
+8000417c:	0000                	unimp
+8000417e:	bff0                	fsd	fa2,248(a5)
+
+80004180 <test_20_data>:
+80004180:	0001                	nop
+80004182:	0000                	unimp
+80004184:	0000                	unimp
+80004186:	7ff0                	flw	fa2,124(a5)
+80004188:	0000                	unimp
+8000418a:	0000                	unimp
+8000418c:	0000                	unimp
+8000418e:	3ff0                	fld	fa2,248(a5)
+80004190:	0000                	unimp
+80004192:	0000                	unimp
+80004194:	0000                	unimp
+80004196:	0000                	unimp
+80004198:	0000                	unimp
+8000419a:	0000                	unimp
+8000419c:	0000                	unimp
+8000419e:	3ff0                	fld	fa2,248(a5)
+
+800041a0 <test_21_data>:
+800041a0:	ffff                	0xffff
+800041a2:	ffff                	0xffff
+800041a4:	ffff                	0xffff
+800041a6:	7fff                	0x7fff
+800041a8:	ffff                	0xffff
+800041aa:	ffff                	0xffff
+800041ac:	ffff                	0xffff
+800041ae:	7fff                	0x7fff
+800041b0:	0000                	unimp
+800041b2:	0000                	unimp
+800041b4:	0000                	unimp
+800041b6:	0000                	unimp
+800041b8:	0000                	unimp
+800041ba:	0000                	unimp
+800041bc:	0000                	unimp
+800041be:	7ff8                	flw	fa4,124(a5)
+
+800041c0 <test_30_data>:
+800041c0:	0000                	unimp
+800041c2:	0000                	unimp
+800041c4:	0000                	unimp
+800041c6:	8000                	0x8000
+800041c8:	0000                	unimp
+800041ca:	0000                	unimp
+800041cc:	0000                	unimp
+800041ce:	0000                	unimp
+800041d0:	0000                	unimp
+800041d2:	0000                	unimp
+800041d4:	0000                	unimp
+800041d6:	0000                	unimp
+800041d8:	0000                	unimp
+800041da:	0000                	unimp
+800041dc:	0000                	unimp
+800041de:	8000                	0x8000
+
+800041e0 <test_31_data>:
+800041e0:	0000                	unimp
+800041e2:	0000                	unimp
+800041e4:	0000                	unimp
+800041e6:	0000                	unimp
+800041e8:	0000                	unimp
+800041ea:	0000                	unimp
+800041ec:	0000                	unimp
+800041ee:	8000                	0x8000
+800041f0:	0000                	unimp
+800041f2:	0000                	unimp
+800041f4:	0000                	unimp
+800041f6:	0000                	unimp
+800041f8:	0000                	unimp
+800041fa:	0000                	unimp
+800041fc:	0000                	unimp
+800041fe:	8000                	0x8000
+
+80004200 <test_32_data>:
+80004200:	0000                	unimp
+80004202:	0000                	unimp
+80004204:	0000                	unimp
+80004206:	8000                	0x8000
+80004208:	0000                	unimp
+8000420a:	0000                	unimp
+8000420c:	0000                	unimp
+8000420e:	0000                	unimp
+80004210:	0000                	unimp
+80004212:	0000                	unimp
+80004214:	0000                	unimp
+80004216:	0000                	unimp
+80004218:	0000                	unimp
+8000421a:	0000                	unimp
+8000421c:	0000                	unimp
+8000421e:	0000                	unimp
+
+80004220 <test_33_data>:
+80004220:	0000                	unimp
+80004222:	0000                	unimp
+80004224:	0000                	unimp
+80004226:	0000                	unimp
+80004228:	0000                	unimp
+8000422a:	0000                	unimp
+8000422c:	0000                	unimp
+8000422e:	8000                	0x8000
+80004230:	0000                	unimp
+80004232:	0000                	unimp
+80004234:	0000                	unimp
+80004236:	0000                	unimp
+80004238:	0000                	unimp
+8000423a:	0000                	unimp
+8000423c:	0000                	unimp
+8000423e:	0000                	unimp
diff --git a/test/riscv-tests/rv32ud-v-fmin.elf b/test/riscv-tests/rv32ud-v-fmin.elf
new file mode 100644
index 0000000..65567e7
--- /dev/null
+++ b/test/riscv-tests/rv32ud-v-fmin.elf
diff --git a/test/riscv-tests/rv32uf-p-fadd.dump b/test/riscv-tests/rv32uf-p-fadd.dump
new file mode 100644
index 0000000..8214d0a
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fadd.dump
@@ -0,0 +1,342 @@
+
+rv32uf-p-fadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	001071d3          	fadd.s	ft3,ft0,ft1
+80000128:	e0018553          	fmv.x.w	a0,ft3
+8000012c:	001015f3          	fsflags	a1,zero
+80000130:	00000613          	li	a2,0
+80000134:	1ed51063          	bne	a0,a3,80000314 <fail>
+80000138:	1cc59e63          	bne	a1,a2,80000314 <fail>
+
+8000013c <test_3>:
+8000013c:	00300193          	li	gp,3
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+80000148:	00052007          	flw	ft0,0(a0)
+8000014c:	00452087          	flw	ft1,4(a0)
+80000150:	00852107          	flw	ft2,8(a0)
+80000154:	00c52683          	lw	a3,12(a0)
+80000158:	001071d3          	fadd.s	ft3,ft0,ft1
+8000015c:	e0018553          	fmv.x.w	a0,ft3
+80000160:	001015f3          	fsflags	a1,zero
+80000164:	00100613          	li	a2,1
+80000168:	1ad51663          	bne	a0,a3,80000314 <fail>
+8000016c:	1ac59463          	bne	a1,a2,80000314 <fail>
+
+80000170 <test_4>:
+80000170:	00400193          	li	gp,4
+80000174:	00002517          	auipc	a0,0x2
+80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+8000017c:	00052007          	flw	ft0,0(a0)
+80000180:	00452087          	flw	ft1,4(a0)
+80000184:	00852107          	flw	ft2,8(a0)
+80000188:	00c52683          	lw	a3,12(a0)
+8000018c:	001071d3          	fadd.s	ft3,ft0,ft1
+80000190:	e0018553          	fmv.x.w	a0,ft3
+80000194:	001015f3          	fsflags	a1,zero
+80000198:	00100613          	li	a2,1
+8000019c:	16d51c63          	bne	a0,a3,80000314 <fail>
+800001a0:	16c59a63          	bne	a1,a2,80000314 <fail>
+
+800001a4 <test_5>:
+800001a4:	00500193          	li	gp,5
+800001a8:	00002517          	auipc	a0,0x2
+800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+800001b0:	00052007          	flw	ft0,0(a0)
+800001b4:	00452087          	flw	ft1,4(a0)
+800001b8:	00852107          	flw	ft2,8(a0)
+800001bc:	00c52683          	lw	a3,12(a0)
+800001c0:	081071d3          	fsub.s	ft3,ft0,ft1
+800001c4:	e0018553          	fmv.x.w	a0,ft3
+800001c8:	001015f3          	fsflags	a1,zero
+800001cc:	00000613          	li	a2,0
+800001d0:	14d51263          	bne	a0,a3,80000314 <fail>
+800001d4:	14c59063          	bne	a1,a2,80000314 <fail>
+
+800001d8 <test_6>:
+800001d8:	00600193          	li	gp,6
+800001dc:	00002517          	auipc	a0,0x2
+800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+800001e4:	00052007          	flw	ft0,0(a0)
+800001e8:	00452087          	flw	ft1,4(a0)
+800001ec:	00852107          	flw	ft2,8(a0)
+800001f0:	00c52683          	lw	a3,12(a0)
+800001f4:	081071d3          	fsub.s	ft3,ft0,ft1
+800001f8:	e0018553          	fmv.x.w	a0,ft3
+800001fc:	001015f3          	fsflags	a1,zero
+80000200:	00100613          	li	a2,1
+80000204:	10d51863          	bne	a0,a3,80000314 <fail>
+80000208:	10c59663          	bne	a1,a2,80000314 <fail>
+
+8000020c <test_7>:
+8000020c:	00700193          	li	gp,7
+80000210:	00002517          	auipc	a0,0x2
+80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+80000218:	00052007          	flw	ft0,0(a0)
+8000021c:	00452087          	flw	ft1,4(a0)
+80000220:	00852107          	flw	ft2,8(a0)
+80000224:	00c52683          	lw	a3,12(a0)
+80000228:	081071d3          	fsub.s	ft3,ft0,ft1
+8000022c:	e0018553          	fmv.x.w	a0,ft3
+80000230:	001015f3          	fsflags	a1,zero
+80000234:	00100613          	li	a2,1
+80000238:	0cd51e63          	bne	a0,a3,80000314 <fail>
+8000023c:	0cc59c63          	bne	a1,a2,80000314 <fail>
+
+80000240 <test_8>:
+80000240:	00800193          	li	gp,8
+80000244:	00002517          	auipc	a0,0x2
+80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_8_data>
+8000024c:	00052007          	flw	ft0,0(a0)
+80000250:	00452087          	flw	ft1,4(a0)
+80000254:	00852107          	flw	ft2,8(a0)
+80000258:	00c52683          	lw	a3,12(a0)
+8000025c:	101071d3          	fmul.s	ft3,ft0,ft1
+80000260:	e0018553          	fmv.x.w	a0,ft3
+80000264:	001015f3          	fsflags	a1,zero
+80000268:	00000613          	li	a2,0
+8000026c:	0ad51463          	bne	a0,a3,80000314 <fail>
+80000270:	0ac59263          	bne	a1,a2,80000314 <fail>
+
+80000274 <test_9>:
+80000274:	00900193          	li	gp,9
+80000278:	00002517          	auipc	a0,0x2
+8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_9_data>
+80000280:	00052007          	flw	ft0,0(a0)
+80000284:	00452087          	flw	ft1,4(a0)
+80000288:	00852107          	flw	ft2,8(a0)
+8000028c:	00c52683          	lw	a3,12(a0)
+80000290:	101071d3          	fmul.s	ft3,ft0,ft1
+80000294:	e0018553          	fmv.x.w	a0,ft3
+80000298:	001015f3          	fsflags	a1,zero
+8000029c:	00100613          	li	a2,1
+800002a0:	06d51a63          	bne	a0,a3,80000314 <fail>
+800002a4:	06c59863          	bne	a1,a2,80000314 <fail>
+
+800002a8 <test_10>:
+800002a8:	00a00193          	li	gp,10
+800002ac:	00002517          	auipc	a0,0x2
+800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_10_data>
+800002b4:	00052007          	flw	ft0,0(a0)
+800002b8:	00452087          	flw	ft1,4(a0)
+800002bc:	00852107          	flw	ft2,8(a0)
+800002c0:	00c52683          	lw	a3,12(a0)
+800002c4:	101071d3          	fmul.s	ft3,ft0,ft1
+800002c8:	e0018553          	fmv.x.w	a0,ft3
+800002cc:	001015f3          	fsflags	a1,zero
+800002d0:	00100613          	li	a2,1
+800002d4:	04d51063          	bne	a0,a3,80000314 <fail>
+800002d8:	02c59e63          	bne	a1,a2,80000314 <fail>
+
+800002dc <test_11>:
+800002dc:	00b00193          	li	gp,11
+800002e0:	00002517          	auipc	a0,0x2
+800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_11_data>
+800002e8:	00052007          	flw	ft0,0(a0)
+800002ec:	00452087          	flw	ft1,4(a0)
+800002f0:	00852107          	flw	ft2,8(a0)
+800002f4:	00c52683          	lw	a3,12(a0)
+800002f8:	081071d3          	fsub.s	ft3,ft0,ft1
+800002fc:	e0018553          	fmv.x.w	a0,ft3
+80000300:	001015f3          	fsflags	a1,zero
+80000304:	01000613          	li	a2,16
+80000308:	00d51663          	bne	a0,a3,80000314 <fail>
+8000030c:	00c59463          	bne	a1,a2,80000314 <fail>
+80000310:	00301c63          	bne	zero,gp,80000328 <pass>
+
+80000314 <fail>:
+80000314:	0ff0000f          	fence
+80000318:	00018063          	beqz	gp,80000318 <fail+0x4>
+8000031c:	00119193          	slli	gp,gp,0x1
+80000320:	0011e193          	ori	gp,gp,1
+80000324:	00000073          	ecall
+
+80000328 <pass>:
+80000328:	0ff0000f          	fence
+8000032c:	00100193          	li	gp,1
+80000330:	00000073          	ecall
+80000334:	c0001073          	unimp
+80000338:	0000                	unimp
+8000033a:	0000                	unimp
+8000033c:	0000                	unimp
+8000033e:	0000                	unimp
+80000340:	0000                	unimp
+80000342:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	4020                	lw	s0,64(s0)
+80002004:	0000                	unimp
+80002006:	3f80                	fld	fs0,56(a5)
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	4060                	lw	s0,68(s0)
+
+80002010 <test_3_data>:
+80002010:	c49a6333          	0xc49a6333
+80002014:	cccd                	beqz	s1,800020ce <_end+0x2e>
+80002016:	3f8c                	fld	fa1,56(a5)
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	4000                	lw	s0,0(s0)
+8000201e:	c49a                	sw	t1,72(sp)
+
+80002020 <test_4_data>:
+80002020:	40490fdb          	0x40490fdb
+80002024:	322bcc77          	0x322bcc77
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	40490fdb          	0x40490fdb
+
+80002030 <test_5_data>:
+80002030:	0000                	unimp
+80002032:	4020                	lw	s0,64(s0)
+80002034:	0000                	unimp
+80002036:	3f80                	fld	fs0,56(a5)
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	3fc0                	fld	fs0,184(a5)
+
+80002040 <test_6_data>:
+80002040:	c49a6333          	0xc49a6333
+80002044:	cccd                	beqz	s1,800020fe <_end+0x5e>
+80002046:	bf8c                	fsd	fa1,56(a5)
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	4000                	lw	s0,0(s0)
+8000204e:	c49a                	sw	t1,72(sp)
+
+80002050 <test_7_data>:
+80002050:	40490fdb          	0x40490fdb
+80002054:	322bcc77          	0x322bcc77
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	40490fdb          	0x40490fdb
+
+80002060 <test_8_data>:
+80002060:	0000                	unimp
+80002062:	4020                	lw	s0,64(s0)
+80002064:	0000                	unimp
+80002066:	3f80                	fld	fs0,56(a5)
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	4020                	lw	s0,64(s0)
+
+80002070 <test_9_data>:
+80002070:	c49a6333          	0xc49a6333
+80002074:	cccd                	beqz	s1,8000212e <_end+0x8e>
+80002076:	bf8c                	fsd	fa1,56(a5)
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	d385                	beqz	a5,80001f9c <fromhost+0xf5c>
+8000207e:	44a9                	li	s1,10
+
+80002080 <test_10_data>:
+80002080:	40490fdb          	0x40490fdb
+80002084:	322bcc77          	0x322bcc77
+80002088:	0000                	unimp
+8000208a:	0000                	unimp
+8000208c:	ee2d                	bnez	a2,80002106 <_end+0x66>
+8000208e:	3306                	fld	ft6,96(sp)
+
+80002090 <test_11_data>:
+80002090:	0000                	unimp
+80002092:	7f80                	flw	fs0,56(a5)
+80002094:	0000                	unimp
+80002096:	7f80                	flw	fs0,56(a5)
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	7fc0                	flw	fs0,60(a5)
diff --git a/test/riscv-tests/rv32uf-p-fadd.elf b/test/riscv-tests/rv32uf-p-fadd.elf
new file mode 100644
index 0000000..a783f7a
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fadd.elf
diff --git a/test/riscv-tests/rv32uf-p-fclass.dump b/test/riscv-tests/rv32uf-p-fclass.dump
new file mode 100644
index 0000000..6b32b55
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fclass.dump
@@ -0,0 +1,190 @@
+
+rv32uf-p-fclass:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	ff800537          	lui	a0,0xff800
+8000010c:	f0050553          	fmv.w.x	fa0,a0
+80000110:	e0051553          	fclass.s	a0,fa0
+80000114:	00100e93          	li	t4,1
+80000118:	00200193          	li	gp,2
+8000011c:	0fd51663          	bne	a0,t4,80000208 <fail>
+
+80000120 <test_3>:
+80000120:	bf800537          	lui	a0,0xbf800
+80000124:	f0050553          	fmv.w.x	fa0,a0
+80000128:	e0051553          	fclass.s	a0,fa0
+8000012c:	00200e93          	li	t4,2
+80000130:	00300193          	li	gp,3
+80000134:	0dd51a63          	bne	a0,t4,80000208 <fail>
+
+80000138 <test_4>:
+80000138:	80800537          	lui	a0,0x80800
+8000013c:	fff50513          	addi	a0,a0,-1 # 807fffff <_end+0x7fdfff>
+80000140:	f0050553          	fmv.w.x	fa0,a0
+80000144:	e0051553          	fclass.s	a0,fa0
+80000148:	00400e93          	li	t4,4
+8000014c:	00400193          	li	gp,4
+80000150:	0bd51c63          	bne	a0,t4,80000208 <fail>
+
+80000154 <test_5>:
+80000154:	80000537          	lui	a0,0x80000
+80000158:	f0050553          	fmv.w.x	fa0,a0
+8000015c:	e0051553          	fclass.s	a0,fa0
+80000160:	00800e93          	li	t4,8
+80000164:	00500193          	li	gp,5
+80000168:	0bd51063          	bne	a0,t4,80000208 <fail>
+
+8000016c <test_6>:
+8000016c:	00000513          	li	a0,0
+80000170:	f0050553          	fmv.w.x	fa0,a0
+80000174:	e0051553          	fclass.s	a0,fa0
+80000178:	01000e93          	li	t4,16
+8000017c:	00600193          	li	gp,6
+80000180:	09d51463          	bne	a0,t4,80000208 <fail>
+
+80000184 <test_7>:
+80000184:	00800537          	lui	a0,0x800
+80000188:	fff50513          	addi	a0,a0,-1 # 7fffff <_start-0x7f800001>
+8000018c:	f0050553          	fmv.w.x	fa0,a0
+80000190:	e0051553          	fclass.s	a0,fa0
+80000194:	02000e93          	li	t4,32
+80000198:	00700193          	li	gp,7
+8000019c:	07d51663          	bne	a0,t4,80000208 <fail>
+
+800001a0 <test_8>:
+800001a0:	3f800537          	lui	a0,0x3f800
+800001a4:	f0050553          	fmv.w.x	fa0,a0
+800001a8:	e0051553          	fclass.s	a0,fa0
+800001ac:	04000e93          	li	t4,64
+800001b0:	00800193          	li	gp,8
+800001b4:	05d51a63          	bne	a0,t4,80000208 <fail>
+
+800001b8 <test_9>:
+800001b8:	7f800537          	lui	a0,0x7f800
+800001bc:	f0050553          	fmv.w.x	fa0,a0
+800001c0:	e0051553          	fclass.s	a0,fa0
+800001c4:	08000e93          	li	t4,128
+800001c8:	00900193          	li	gp,9
+800001cc:	03d51e63          	bne	a0,t4,80000208 <fail>
+
+800001d0 <test_10>:
+800001d0:	7f800537          	lui	a0,0x7f800
+800001d4:	00150513          	addi	a0,a0,1 # 7f800001 <_start-0x7fffff>
+800001d8:	f0050553          	fmv.w.x	fa0,a0
+800001dc:	e0051553          	fclass.s	a0,fa0
+800001e0:	10000e93          	li	t4,256
+800001e4:	00a00193          	li	gp,10
+800001e8:	03d51063          	bne	a0,t4,80000208 <fail>
+
+800001ec <test_11>:
+800001ec:	7fc00537          	lui	a0,0x7fc00
+800001f0:	f0050553          	fmv.w.x	fa0,a0
+800001f4:	e0051553          	fclass.s	a0,fa0
+800001f8:	20000e93          	li	t4,512
+800001fc:	00b00193          	li	gp,11
+80000200:	01d51463          	bne	a0,t4,80000208 <fail>
+80000204:	00301c63          	bne	zero,gp,8000021c <pass>
+
+80000208 <fail>:
+80000208:	0ff0000f          	fence
+8000020c:	00018063          	beqz	gp,8000020c <fail+0x4>
+80000210:	00119193          	slli	gp,gp,0x1
+80000214:	0011e193          	ori	gp,gp,1
+80000218:	00000073          	ecall
+
+8000021c <pass>:
+8000021c:	0ff0000f          	fence
+80000220:	00100193          	li	gp,1
+80000224:	00000073          	ecall
+80000228:	c0001073          	unimp
+8000022c:	0000                	unimp
+8000022e:	0000                	unimp
+80000230:	0000                	unimp
+80000232:	0000                	unimp
+80000234:	0000                	unimp
+80000236:	0000                	unimp
+80000238:	0000                	unimp
+8000023a:	0000                	unimp
+8000023c:	0000                	unimp
+8000023e:	0000                	unimp
+80000240:	0000                	unimp
+80000242:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-p-fclass.elf b/test/riscv-tests/rv32uf-p-fclass.elf
new file mode 100644
index 0000000..3a520ad
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fclass.elf
diff --git a/test/riscv-tests/rv32uf-p-fcmp.dump b/test/riscv-tests/rv32uf-p-fcmp.dump
new file mode 100644
index 0000000..0674288
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcmp.dump
@@ -0,0 +1,450 @@
+
+rv32uf-p-fcmp:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	a0102553          	feq.s	a0,ft0,ft1
+80000128:	001015f3          	fsflags	a1,zero
+8000012c:	00000613          	li	a2,0
+80000130:	2ad51663          	bne	a0,a3,800003dc <fail>
+80000134:	2ac59463          	bne	a1,a2,800003dc <fail>
+
+80000138 <test_3>:
+80000138:	00300193          	li	gp,3
+8000013c:	00002517          	auipc	a0,0x2
+80000140:	ed450513          	addi	a0,a0,-300 # 80002010 <test_3_data>
+80000144:	00052007          	flw	ft0,0(a0)
+80000148:	00452087          	flw	ft1,4(a0)
+8000014c:	00852107          	flw	ft2,8(a0)
+80000150:	00c52683          	lw	a3,12(a0)
+80000154:	a0100553          	fle.s	a0,ft0,ft1
+80000158:	001015f3          	fsflags	a1,zero
+8000015c:	00000613          	li	a2,0
+80000160:	26d51e63          	bne	a0,a3,800003dc <fail>
+80000164:	26c59c63          	bne	a1,a2,800003dc <fail>
+
+80000168 <test_4>:
+80000168:	00400193          	li	gp,4
+8000016c:	00002517          	auipc	a0,0x2
+80000170:	eb450513          	addi	a0,a0,-332 # 80002020 <test_4_data>
+80000174:	00052007          	flw	ft0,0(a0)
+80000178:	00452087          	flw	ft1,4(a0)
+8000017c:	00852107          	flw	ft2,8(a0)
+80000180:	00c52683          	lw	a3,12(a0)
+80000184:	a0101553          	flt.s	a0,ft0,ft1
+80000188:	001015f3          	fsflags	a1,zero
+8000018c:	00000613          	li	a2,0
+80000190:	24d51663          	bne	a0,a3,800003dc <fail>
+80000194:	24c59463          	bne	a1,a2,800003dc <fail>
+
+80000198 <test_5>:
+80000198:	00500193          	li	gp,5
+8000019c:	00002517          	auipc	a0,0x2
+800001a0:	e9450513          	addi	a0,a0,-364 # 80002030 <test_5_data>
+800001a4:	00052007          	flw	ft0,0(a0)
+800001a8:	00452087          	flw	ft1,4(a0)
+800001ac:	00852107          	flw	ft2,8(a0)
+800001b0:	00c52683          	lw	a3,12(a0)
+800001b4:	a0102553          	feq.s	a0,ft0,ft1
+800001b8:	001015f3          	fsflags	a1,zero
+800001bc:	00000613          	li	a2,0
+800001c0:	20d51e63          	bne	a0,a3,800003dc <fail>
+800001c4:	20c59c63          	bne	a1,a2,800003dc <fail>
+
+800001c8 <test_6>:
+800001c8:	00600193          	li	gp,6
+800001cc:	00002517          	auipc	a0,0x2
+800001d0:	e7450513          	addi	a0,a0,-396 # 80002040 <test_6_data>
+800001d4:	00052007          	flw	ft0,0(a0)
+800001d8:	00452087          	flw	ft1,4(a0)
+800001dc:	00852107          	flw	ft2,8(a0)
+800001e0:	00c52683          	lw	a3,12(a0)
+800001e4:	a0100553          	fle.s	a0,ft0,ft1
+800001e8:	001015f3          	fsflags	a1,zero
+800001ec:	00000613          	li	a2,0
+800001f0:	1ed51663          	bne	a0,a3,800003dc <fail>
+800001f4:	1ec59463          	bne	a1,a2,800003dc <fail>
+
+800001f8 <test_7>:
+800001f8:	00700193          	li	gp,7
+800001fc:	00002517          	auipc	a0,0x2
+80000200:	e5450513          	addi	a0,a0,-428 # 80002050 <test_7_data>
+80000204:	00052007          	flw	ft0,0(a0)
+80000208:	00452087          	flw	ft1,4(a0)
+8000020c:	00852107          	flw	ft2,8(a0)
+80000210:	00c52683          	lw	a3,12(a0)
+80000214:	a0101553          	flt.s	a0,ft0,ft1
+80000218:	001015f3          	fsflags	a1,zero
+8000021c:	00000613          	li	a2,0
+80000220:	1ad51e63          	bne	a0,a3,800003dc <fail>
+80000224:	1ac59c63          	bne	a1,a2,800003dc <fail>
+
+80000228 <test_8>:
+80000228:	00800193          	li	gp,8
+8000022c:	00002517          	auipc	a0,0x2
+80000230:	e3450513          	addi	a0,a0,-460 # 80002060 <test_8_data>
+80000234:	00052007          	flw	ft0,0(a0)
+80000238:	00452087          	flw	ft1,4(a0)
+8000023c:	00852107          	flw	ft2,8(a0)
+80000240:	00c52683          	lw	a3,12(a0)
+80000244:	a0102553          	feq.s	a0,ft0,ft1
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	00000613          	li	a2,0
+80000250:	18d51663          	bne	a0,a3,800003dc <fail>
+80000254:	18c59463          	bne	a1,a2,800003dc <fail>
+
+80000258 <test_9>:
+80000258:	00900193          	li	gp,9
+8000025c:	00002517          	auipc	a0,0x2
+80000260:	e1450513          	addi	a0,a0,-492 # 80002070 <test_9_data>
+80000264:	00052007          	flw	ft0,0(a0)
+80000268:	00452087          	flw	ft1,4(a0)
+8000026c:	00852107          	flw	ft2,8(a0)
+80000270:	00c52683          	lw	a3,12(a0)
+80000274:	a0102553          	feq.s	a0,ft0,ft1
+80000278:	001015f3          	fsflags	a1,zero
+8000027c:	00000613          	li	a2,0
+80000280:	14d51e63          	bne	a0,a3,800003dc <fail>
+80000284:	14c59c63          	bne	a1,a2,800003dc <fail>
+
+80000288 <test_10>:
+80000288:	00a00193          	li	gp,10
+8000028c:	00002517          	auipc	a0,0x2
+80000290:	df450513          	addi	a0,a0,-524 # 80002080 <test_10_data>
+80000294:	00052007          	flw	ft0,0(a0)
+80000298:	00452087          	flw	ft1,4(a0)
+8000029c:	00852107          	flw	ft2,8(a0)
+800002a0:	00c52683          	lw	a3,12(a0)
+800002a4:	a0102553          	feq.s	a0,ft0,ft1
+800002a8:	001015f3          	fsflags	a1,zero
+800002ac:	01000613          	li	a2,16
+800002b0:	12d51663          	bne	a0,a3,800003dc <fail>
+800002b4:	12c59463          	bne	a1,a2,800003dc <fail>
+
+800002b8 <test_11>:
+800002b8:	00b00193          	li	gp,11
+800002bc:	00002517          	auipc	a0,0x2
+800002c0:	dd450513          	addi	a0,a0,-556 # 80002090 <test_11_data>
+800002c4:	00052007          	flw	ft0,0(a0)
+800002c8:	00452087          	flw	ft1,4(a0)
+800002cc:	00852107          	flw	ft2,8(a0)
+800002d0:	00c52683          	lw	a3,12(a0)
+800002d4:	a0101553          	flt.s	a0,ft0,ft1
+800002d8:	001015f3          	fsflags	a1,zero
+800002dc:	01000613          	li	a2,16
+800002e0:	0ed51e63          	bne	a0,a3,800003dc <fail>
+800002e4:	0ec59c63          	bne	a1,a2,800003dc <fail>
+
+800002e8 <test_12>:
+800002e8:	00c00193          	li	gp,12
+800002ec:	00002517          	auipc	a0,0x2
+800002f0:	db450513          	addi	a0,a0,-588 # 800020a0 <test_12_data>
+800002f4:	00052007          	flw	ft0,0(a0)
+800002f8:	00452087          	flw	ft1,4(a0)
+800002fc:	00852107          	flw	ft2,8(a0)
+80000300:	00c52683          	lw	a3,12(a0)
+80000304:	a0101553          	flt.s	a0,ft0,ft1
+80000308:	001015f3          	fsflags	a1,zero
+8000030c:	01000613          	li	a2,16
+80000310:	0cd51663          	bne	a0,a3,800003dc <fail>
+80000314:	0cc59463          	bne	a1,a2,800003dc <fail>
+
+80000318 <test_13>:
+80000318:	00d00193          	li	gp,13
+8000031c:	00002517          	auipc	a0,0x2
+80000320:	d9450513          	addi	a0,a0,-620 # 800020b0 <test_13_data>
+80000324:	00052007          	flw	ft0,0(a0)
+80000328:	00452087          	flw	ft1,4(a0)
+8000032c:	00852107          	flw	ft2,8(a0)
+80000330:	00c52683          	lw	a3,12(a0)
+80000334:	a0101553          	flt.s	a0,ft0,ft1
+80000338:	001015f3          	fsflags	a1,zero
+8000033c:	01000613          	li	a2,16
+80000340:	08d51e63          	bne	a0,a3,800003dc <fail>
+80000344:	08c59c63          	bne	a1,a2,800003dc <fail>
+
+80000348 <test_14>:
+80000348:	00e00193          	li	gp,14
+8000034c:	00002517          	auipc	a0,0x2
+80000350:	d7450513          	addi	a0,a0,-652 # 800020c0 <test_14_data>
+80000354:	00052007          	flw	ft0,0(a0)
+80000358:	00452087          	flw	ft1,4(a0)
+8000035c:	00852107          	flw	ft2,8(a0)
+80000360:	00c52683          	lw	a3,12(a0)
+80000364:	a0100553          	fle.s	a0,ft0,ft1
+80000368:	001015f3          	fsflags	a1,zero
+8000036c:	01000613          	li	a2,16
+80000370:	06d51663          	bne	a0,a3,800003dc <fail>
+80000374:	06c59463          	bne	a1,a2,800003dc <fail>
+
+80000378 <test_15>:
+80000378:	00f00193          	li	gp,15
+8000037c:	00002517          	auipc	a0,0x2
+80000380:	d5450513          	addi	a0,a0,-684 # 800020d0 <test_15_data>
+80000384:	00052007          	flw	ft0,0(a0)
+80000388:	00452087          	flw	ft1,4(a0)
+8000038c:	00852107          	flw	ft2,8(a0)
+80000390:	00c52683          	lw	a3,12(a0)
+80000394:	a0100553          	fle.s	a0,ft0,ft1
+80000398:	001015f3          	fsflags	a1,zero
+8000039c:	01000613          	li	a2,16
+800003a0:	02d51e63          	bne	a0,a3,800003dc <fail>
+800003a4:	02c59c63          	bne	a1,a2,800003dc <fail>
+
+800003a8 <test_16>:
+800003a8:	01000193          	li	gp,16
+800003ac:	00002517          	auipc	a0,0x2
+800003b0:	d3450513          	addi	a0,a0,-716 # 800020e0 <test_16_data>
+800003b4:	00052007          	flw	ft0,0(a0)
+800003b8:	00452087          	flw	ft1,4(a0)
+800003bc:	00852107          	flw	ft2,8(a0)
+800003c0:	00c52683          	lw	a3,12(a0)
+800003c4:	a0100553          	fle.s	a0,ft0,ft1
+800003c8:	001015f3          	fsflags	a1,zero
+800003cc:	01000613          	li	a2,16
+800003d0:	00d51663          	bne	a0,a3,800003dc <fail>
+800003d4:	00c59463          	bne	a1,a2,800003dc <fail>
+800003d8:	00301c63          	bne	zero,gp,800003f0 <pass>
+
+800003dc <fail>:
+800003dc:	0ff0000f          	fence
+800003e0:	00018063          	beqz	gp,800003e0 <fail+0x4>
+800003e4:	00119193          	slli	gp,gp,0x1
+800003e8:	0011e193          	ori	gp,gp,1
+800003ec:	00000073          	ecall
+
+800003f0 <pass>:
+800003f0:	0ff0000f          	fence
+800003f4:	00100193          	li	gp,1
+800003f8:	00000073          	ecall
+800003fc:	c0001073          	unimp
+80000400:	0000                	unimp
+80000402:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	bfae147b          	0xbfae147b
+80002004:	bfae147b          	0xbfae147b
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0001                	nop
+8000200e:	0000                	unimp
+
+80002010 <test_3_data>:
+80002010:	bfae147b          	0xbfae147b
+80002014:	bfae147b          	0xbfae147b
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	0001                	nop
+8000201e:	0000                	unimp
+
+80002020 <test_4_data>:
+80002020:	bfae147b          	0xbfae147b
+80002024:	bfae147b          	0xbfae147b
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	0000                	unimp
+8000202e:	0000                	unimp
+
+80002030 <test_5_data>:
+80002030:	5c29                	li	s8,-22
+80002032:	147bbfaf          	0x147bbfaf
+80002036:	bfae                	fsd	fa1,504(sp)
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	0000                	unimp
+
+80002040 <test_6_data>:
+80002040:	5c29                	li	s8,-22
+80002042:	147bbfaf          	0x147bbfaf
+80002046:	bfae                	fsd	fa1,504(sp)
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0001                	nop
+8000204e:	0000                	unimp
+
+80002050 <test_7_data>:
+80002050:	5c29                	li	s8,-22
+80002052:	147bbfaf          	0x147bbfaf
+80002056:	bfae                	fsd	fa1,504(sp)
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0001                	nop
+8000205e:	0000                	unimp
+
+80002060 <test_8_data>:
+80002060:	ffff                	0xffff
+80002062:	7fff                	0x7fff
+80002064:	0000                	unimp
+80002066:	0000                	unimp
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	0000                	unimp
+
+80002070 <test_9_data>:
+80002070:	ffff                	0xffff
+80002072:	7fff                	0x7fff
+80002074:	ffff                	0xffff
+80002076:	7fff                	0x7fff
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	0000                	unimp
+8000207e:	0000                	unimp
+
+80002080 <test_10_data>:
+80002080:	0001                	nop
+80002082:	7f80                	flw	fs0,56(a5)
+80002084:	0000                	unimp
+80002086:	0000                	unimp
+80002088:	0000                	unimp
+8000208a:	0000                	unimp
+8000208c:	0000                	unimp
+8000208e:	0000                	unimp
+
+80002090 <test_11_data>:
+80002090:	ffff                	0xffff
+80002092:	7fff                	0x7fff
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	0000                	unimp
+
+800020a0 <test_12_data>:
+800020a0:	ffff                	0xffff
+800020a2:	7fff                	0x7fff
+800020a4:	ffff                	0xffff
+800020a6:	7fff                	0x7fff
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	0000                	unimp
+
+800020b0 <test_13_data>:
+800020b0:	0001                	nop
+800020b2:	7f80                	flw	fs0,56(a5)
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	0000                	unimp
+
+800020c0 <test_14_data>:
+800020c0:	ffff                	0xffff
+800020c2:	7fff                	0x7fff
+800020c4:	0000                	unimp
+800020c6:	0000                	unimp
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	0000                	unimp
+
+800020d0 <test_15_data>:
+800020d0:	ffff                	0xffff
+800020d2:	7fff                	0x7fff
+800020d4:	ffff                	0xffff
+800020d6:	7fff                	0x7fff
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	0000                	unimp
+
+800020e0 <test_16_data>:
+800020e0:	0001                	nop
+800020e2:	7f80                	flw	fs0,56(a5)
+800020e4:	0000                	unimp
+800020e6:	0000                	unimp
+800020e8:	0000                	unimp
+800020ea:	0000                	unimp
+800020ec:	0000                	unimp
+800020ee:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-p-fcmp.elf b/test/riscv-tests/rv32uf-p-fcmp.elf
new file mode 100644
index 0000000..b0f64b1
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcmp.elf
diff --git a/test/riscv-tests/rv32uf-p-fcvt.dump b/test/riscv-tests/rv32uf-p-fcvt.dump
new file mode 100644
index 0000000..1afed49
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcvt.dump
@@ -0,0 +1,159 @@
+
+rv32uf-p-fcvt:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052683          	lw	a3,0(a0)
+80000118:	00200513          	li	a0,2
+8000011c:	d0057053          	fcvt.s.w	ft0,a0
+80000120:	00101073          	fsflags	zero
+80000124:	e0000553          	fmv.x.w	a0,ft0
+80000128:	06d51a63          	bne	a0,a3,8000019c <fail>
+
+8000012c <test_3>:
+8000012c:	00300193          	li	gp,3
+80000130:	00002517          	auipc	a0,0x2
+80000134:	ed450513          	addi	a0,a0,-300 # 80002004 <test_3_data>
+80000138:	00052683          	lw	a3,0(a0)
+8000013c:	ffe00513          	li	a0,-2
+80000140:	d0057053          	fcvt.s.w	ft0,a0
+80000144:	00101073          	fsflags	zero
+80000148:	e0000553          	fmv.x.w	a0,ft0
+8000014c:	04d51863          	bne	a0,a3,8000019c <fail>
+
+80000150 <test_4>:
+80000150:	00400193          	li	gp,4
+80000154:	00002517          	auipc	a0,0x2
+80000158:	eb450513          	addi	a0,a0,-332 # 80002008 <test_4_data>
+8000015c:	00052683          	lw	a3,0(a0)
+80000160:	00200513          	li	a0,2
+80000164:	d0157053          	fcvt.s.wu	ft0,a0
+80000168:	00101073          	fsflags	zero
+8000016c:	e0000553          	fmv.x.w	a0,ft0
+80000170:	02d51663          	bne	a0,a3,8000019c <fail>
+
+80000174 <test_5>:
+80000174:	00500193          	li	gp,5
+80000178:	00002517          	auipc	a0,0x2
+8000017c:	e9450513          	addi	a0,a0,-364 # 8000200c <test_5_data>
+80000180:	00052683          	lw	a3,0(a0)
+80000184:	ffe00513          	li	a0,-2
+80000188:	d0157053          	fcvt.s.wu	ft0,a0
+8000018c:	00101073          	fsflags	zero
+80000190:	e0000553          	fmv.x.w	a0,ft0
+80000194:	00d51463          	bne	a0,a3,8000019c <fail>
+80000198:	00301c63          	bne	zero,gp,800001b0 <pass>
+
+8000019c <fail>:
+8000019c:	0ff0000f          	fence
+800001a0:	00018063          	beqz	gp,800001a0 <fail+0x4>
+800001a4:	00119193          	slli	gp,gp,0x1
+800001a8:	0011e193          	ori	gp,gp,1
+800001ac:	00000073          	ecall
+
+800001b0 <pass>:
+800001b0:	0ff0000f          	fence
+800001b4:	00100193          	li	gp,1
+800001b8:	00000073          	ecall
+800001bc:	c0001073          	unimp
+800001c0:	0000                	unimp
+800001c2:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	4000                	lw	s0,0(s0)
+
+80002004 <test_3_data>:
+80002004:	0000                	unimp
+80002006:	c000                	sw	s0,0(s0)
+
+80002008 <test_4_data>:
+80002008:	0000                	unimp
+8000200a:	4000                	lw	s0,0(s0)
+
+8000200c <test_5_data>:
+8000200c:	0000                	unimp
+8000200e:	4f80                	lw	s0,24(a5)
diff --git a/test/riscv-tests/rv32uf-p-fcvt.elf b/test/riscv-tests/rv32uf-p-fcvt.elf
new file mode 100644
index 0000000..da776a2
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcvt.elf
diff --git a/test/riscv-tests/rv32uf-p-fcvt_w.dump b/test/riscv-tests/rv32uf-p-fcvt_w.dump
new file mode 100644
index 0000000..728571c
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcvt_w.dump
@@ -0,0 +1,604 @@
+
+rv32uf-p-fcvt_w:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000128:	001015f3          	fsflags	a1,zero
+8000012c:	00100613          	li	a2,1
+80000130:	3cd51463          	bne	a0,a3,800004f8 <fail>
+80000134:	3cc59263          	bne	a1,a2,800004f8 <fail>
+
+80000138 <test_3>:
+80000138:	00300193          	li	gp,3
+8000013c:	00002517          	auipc	a0,0x2
+80000140:	ed450513          	addi	a0,a0,-300 # 80002010 <test_3_data>
+80000144:	00052007          	flw	ft0,0(a0)
+80000148:	00452087          	flw	ft1,4(a0)
+8000014c:	00852107          	flw	ft2,8(a0)
+80000150:	00c52683          	lw	a3,12(a0)
+80000154:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000158:	001015f3          	fsflags	a1,zero
+8000015c:	00000613          	li	a2,0
+80000160:	38d51c63          	bne	a0,a3,800004f8 <fail>
+80000164:	38c59a63          	bne	a1,a2,800004f8 <fail>
+
+80000168 <test_4>:
+80000168:	00400193          	li	gp,4
+8000016c:	00002517          	auipc	a0,0x2
+80000170:	eb450513          	addi	a0,a0,-332 # 80002020 <test_4_data>
+80000174:	00052007          	flw	ft0,0(a0)
+80000178:	00452087          	flw	ft1,4(a0)
+8000017c:	00852107          	flw	ft2,8(a0)
+80000180:	00c52683          	lw	a3,12(a0)
+80000184:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000188:	001015f3          	fsflags	a1,zero
+8000018c:	00100613          	li	a2,1
+80000190:	36d51463          	bne	a0,a3,800004f8 <fail>
+80000194:	36c59263          	bne	a1,a2,800004f8 <fail>
+
+80000198 <test_5>:
+80000198:	00500193          	li	gp,5
+8000019c:	00002517          	auipc	a0,0x2
+800001a0:	e9450513          	addi	a0,a0,-364 # 80002030 <test_5_data>
+800001a4:	00052007          	flw	ft0,0(a0)
+800001a8:	00452087          	flw	ft1,4(a0)
+800001ac:	00852107          	flw	ft2,8(a0)
+800001b0:	00c52683          	lw	a3,12(a0)
+800001b4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+800001b8:	001015f3          	fsflags	a1,zero
+800001bc:	00100613          	li	a2,1
+800001c0:	32d51c63          	bne	a0,a3,800004f8 <fail>
+800001c4:	32c59a63          	bne	a1,a2,800004f8 <fail>
+
+800001c8 <test_6>:
+800001c8:	00600193          	li	gp,6
+800001cc:	00002517          	auipc	a0,0x2
+800001d0:	e7450513          	addi	a0,a0,-396 # 80002040 <test_6_data>
+800001d4:	00052007          	flw	ft0,0(a0)
+800001d8:	00452087          	flw	ft1,4(a0)
+800001dc:	00852107          	flw	ft2,8(a0)
+800001e0:	00c52683          	lw	a3,12(a0)
+800001e4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+800001e8:	001015f3          	fsflags	a1,zero
+800001ec:	00000613          	li	a2,0
+800001f0:	30d51463          	bne	a0,a3,800004f8 <fail>
+800001f4:	30c59263          	bne	a1,a2,800004f8 <fail>
+
+800001f8 <test_7>:
+800001f8:	00700193          	li	gp,7
+800001fc:	00002517          	auipc	a0,0x2
+80000200:	e5450513          	addi	a0,a0,-428 # 80002050 <test_7_data>
+80000204:	00052007          	flw	ft0,0(a0)
+80000208:	00452087          	flw	ft1,4(a0)
+8000020c:	00852107          	flw	ft2,8(a0)
+80000210:	00c52683          	lw	a3,12(a0)
+80000214:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000218:	001015f3          	fsflags	a1,zero
+8000021c:	00100613          	li	a2,1
+80000220:	2cd51c63          	bne	a0,a3,800004f8 <fail>
+80000224:	2cc59a63          	bne	a1,a2,800004f8 <fail>
+
+80000228 <test_8>:
+80000228:	00800193          	li	gp,8
+8000022c:	00002517          	auipc	a0,0x2
+80000230:	e3450513          	addi	a0,a0,-460 # 80002060 <test_8_data>
+80000234:	00052007          	flw	ft0,0(a0)
+80000238:	00452087          	flw	ft1,4(a0)
+8000023c:	00852107          	flw	ft2,8(a0)
+80000240:	00c52683          	lw	a3,12(a0)
+80000244:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000248:	001015f3          	fsflags	a1,zero
+8000024c:	01000613          	li	a2,16
+80000250:	2ad51463          	bne	a0,a3,800004f8 <fail>
+80000254:	2ac59263          	bne	a1,a2,800004f8 <fail>
+
+80000258 <test_9>:
+80000258:	00900193          	li	gp,9
+8000025c:	00002517          	auipc	a0,0x2
+80000260:	e1450513          	addi	a0,a0,-492 # 80002070 <test_9_data>
+80000264:	00052007          	flw	ft0,0(a0)
+80000268:	00452087          	flw	ft1,4(a0)
+8000026c:	00852107          	flw	ft2,8(a0)
+80000270:	00c52683          	lw	a3,12(a0)
+80000274:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80000278:	001015f3          	fsflags	a1,zero
+8000027c:	01000613          	li	a2,16
+80000280:	26d51c63          	bne	a0,a3,800004f8 <fail>
+80000284:	26c59a63          	bne	a1,a2,800004f8 <fail>
+
+80000288 <test_12>:
+80000288:	00c00193          	li	gp,12
+8000028c:	00002517          	auipc	a0,0x2
+80000290:	df450513          	addi	a0,a0,-524 # 80002080 <test_12_data>
+80000294:	00052007          	flw	ft0,0(a0)
+80000298:	00452087          	flw	ft1,4(a0)
+8000029c:	00852107          	flw	ft2,8(a0)
+800002a0:	00c52683          	lw	a3,12(a0)
+800002a4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800002a8:	001015f3          	fsflags	a1,zero
+800002ac:	01000613          	li	a2,16
+800002b0:	24d51463          	bne	a0,a3,800004f8 <fail>
+800002b4:	24c59263          	bne	a1,a2,800004f8 <fail>
+
+800002b8 <test_13>:
+800002b8:	00d00193          	li	gp,13
+800002bc:	00002517          	auipc	a0,0x2
+800002c0:	dd450513          	addi	a0,a0,-556 # 80002090 <test_13_data>
+800002c4:	00052007          	flw	ft0,0(a0)
+800002c8:	00452087          	flw	ft1,4(a0)
+800002cc:	00852107          	flw	ft2,8(a0)
+800002d0:	00c52683          	lw	a3,12(a0)
+800002d4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800002d8:	001015f3          	fsflags	a1,zero
+800002dc:	01000613          	li	a2,16
+800002e0:	20d51c63          	bne	a0,a3,800004f8 <fail>
+800002e4:	20c59a63          	bne	a1,a2,800004f8 <fail>
+
+800002e8 <test_14>:
+800002e8:	00e00193          	li	gp,14
+800002ec:	00002517          	auipc	a0,0x2
+800002f0:	db450513          	addi	a0,a0,-588 # 800020a0 <test_14_data>
+800002f4:	00052007          	flw	ft0,0(a0)
+800002f8:	00452087          	flw	ft1,4(a0)
+800002fc:	00852107          	flw	ft2,8(a0)
+80000300:	00c52683          	lw	a3,12(a0)
+80000304:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000308:	001015f3          	fsflags	a1,zero
+8000030c:	00100613          	li	a2,1
+80000310:	1ed51463          	bne	a0,a3,800004f8 <fail>
+80000314:	1ec59263          	bne	a1,a2,800004f8 <fail>
+
+80000318 <test_15>:
+80000318:	00f00193          	li	gp,15
+8000031c:	00002517          	auipc	a0,0x2
+80000320:	d9450513          	addi	a0,a0,-620 # 800020b0 <test_15_data>
+80000324:	00052007          	flw	ft0,0(a0)
+80000328:	00452087          	flw	ft1,4(a0)
+8000032c:	00852107          	flw	ft2,8(a0)
+80000330:	00c52683          	lw	a3,12(a0)
+80000334:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000338:	001015f3          	fsflags	a1,zero
+8000033c:	00100613          	li	a2,1
+80000340:	1ad51c63          	bne	a0,a3,800004f8 <fail>
+80000344:	1ac59a63          	bne	a1,a2,800004f8 <fail>
+
+80000348 <test_16>:
+80000348:	01000193          	li	gp,16
+8000034c:	00002517          	auipc	a0,0x2
+80000350:	d7450513          	addi	a0,a0,-652 # 800020c0 <test_16_data>
+80000354:	00052007          	flw	ft0,0(a0)
+80000358:	00452087          	flw	ft1,4(a0)
+8000035c:	00852107          	flw	ft2,8(a0)
+80000360:	00c52683          	lw	a3,12(a0)
+80000364:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000368:	001015f3          	fsflags	a1,zero
+8000036c:	00000613          	li	a2,0
+80000370:	18d51463          	bne	a0,a3,800004f8 <fail>
+80000374:	18c59263          	bne	a1,a2,800004f8 <fail>
+
+80000378 <test_17>:
+80000378:	01100193          	li	gp,17
+8000037c:	00002517          	auipc	a0,0x2
+80000380:	d5450513          	addi	a0,a0,-684 # 800020d0 <test_17_data>
+80000384:	00052007          	flw	ft0,0(a0)
+80000388:	00452087          	flw	ft1,4(a0)
+8000038c:	00852107          	flw	ft2,8(a0)
+80000390:	00c52683          	lw	a3,12(a0)
+80000394:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80000398:	001015f3          	fsflags	a1,zero
+8000039c:	00100613          	li	a2,1
+800003a0:	14d51c63          	bne	a0,a3,800004f8 <fail>
+800003a4:	14c59a63          	bne	a1,a2,800004f8 <fail>
+
+800003a8 <test_18>:
+800003a8:	01200193          	li	gp,18
+800003ac:	00002517          	auipc	a0,0x2
+800003b0:	d3450513          	addi	a0,a0,-716 # 800020e0 <test_18_data>
+800003b4:	00052007          	flw	ft0,0(a0)
+800003b8:	00452087          	flw	ft1,4(a0)
+800003bc:	00852107          	flw	ft2,8(a0)
+800003c0:	00c52683          	lw	a3,12(a0)
+800003c4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800003c8:	001015f3          	fsflags	a1,zero
+800003cc:	01000613          	li	a2,16
+800003d0:	12d51463          	bne	a0,a3,800004f8 <fail>
+800003d4:	12c59263          	bne	a1,a2,800004f8 <fail>
+
+800003d8 <test_19>:
+800003d8:	01300193          	li	gp,19
+800003dc:	00002517          	auipc	a0,0x2
+800003e0:	d1450513          	addi	a0,a0,-748 # 800020f0 <test_19_data>
+800003e4:	00052007          	flw	ft0,0(a0)
+800003e8:	00452087          	flw	ft1,4(a0)
+800003ec:	00852107          	flw	ft2,8(a0)
+800003f0:	00c52683          	lw	a3,12(a0)
+800003f4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+800003f8:	001015f3          	fsflags	a1,zero
+800003fc:	00000613          	li	a2,0
+80000400:	0ed51c63          	bne	a0,a3,800004f8 <fail>
+80000404:	0ec59a63          	bne	a1,a2,800004f8 <fail>
+
+80000408 <test_42>:
+80000408:	00002097          	auipc	ra,0x2
+8000040c:	cf808093          	addi	ra,ra,-776 # 80002100 <begin_signature>
+80000410:	0000a087          	flw	ft1,0(ra)
+80000414:	c000f0d3          	fcvt.w.s	ra,ft1
+80000418:	80000eb7          	lui	t4,0x80000
+8000041c:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+80000420:	02a00193          	li	gp,42
+80000424:	0dd09a63          	bne	ra,t4,800004f8 <fail>
+
+80000428 <test_44>:
+80000428:	00002097          	auipc	ra,0x2
+8000042c:	cd808093          	addi	ra,ra,-808 # 80002100 <begin_signature>
+80000430:	0080a087          	flw	ft1,8(ra)
+80000434:	c000f0d3          	fcvt.w.s	ra,ft1
+80000438:	80000eb7          	lui	t4,0x80000
+8000043c:	02c00193          	li	gp,44
+80000440:	0bd09c63          	bne	ra,t4,800004f8 <fail>
+
+80000444 <test_52>:
+80000444:	00002097          	auipc	ra,0x2
+80000448:	cbc08093          	addi	ra,ra,-836 # 80002100 <begin_signature>
+8000044c:	0040a087          	flw	ft1,4(ra)
+80000450:	c000f0d3          	fcvt.w.s	ra,ft1
+80000454:	80000eb7          	lui	t4,0x80000
+80000458:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+8000045c:	03400193          	li	gp,52
+80000460:	09d09c63          	bne	ra,t4,800004f8 <fail>
+
+80000464 <test_54>:
+80000464:	00002097          	auipc	ra,0x2
+80000468:	c9c08093          	addi	ra,ra,-868 # 80002100 <begin_signature>
+8000046c:	00c0a087          	flw	ft1,12(ra)
+80000470:	c000f0d3          	fcvt.w.s	ra,ft1
+80000474:	80000eb7          	lui	t4,0x80000
+80000478:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffffdecf>
+8000047c:	03600193          	li	gp,54
+80000480:	07d09c63          	bne	ra,t4,800004f8 <fail>
+
+80000484 <test_62>:
+80000484:	00002097          	auipc	ra,0x2
+80000488:	c7c08093          	addi	ra,ra,-900 # 80002100 <begin_signature>
+8000048c:	0000a087          	flw	ft1,0(ra)
+80000490:	c010f0d3          	fcvt.wu.s	ra,ft1
+80000494:	fff00e93          	li	t4,-1
+80000498:	03e00193          	li	gp,62
+8000049c:	05d09e63          	bne	ra,t4,800004f8 <fail>
+
+800004a0 <test_63>:
+800004a0:	00002097          	auipc	ra,0x2
+800004a4:	c6008093          	addi	ra,ra,-928 # 80002100 <begin_signature>
+800004a8:	0040a087          	flw	ft1,4(ra)
+800004ac:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004b0:	fff00e93          	li	t4,-1
+800004b4:	03f00193          	li	gp,63
+800004b8:	05d09063          	bne	ra,t4,800004f8 <fail>
+
+800004bc <test_64>:
+800004bc:	00002097          	auipc	ra,0x2
+800004c0:	c4408093          	addi	ra,ra,-956 # 80002100 <begin_signature>
+800004c4:	0080a087          	flw	ft1,8(ra)
+800004c8:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004cc:	00000e93          	li	t4,0
+800004d0:	04000193          	li	gp,64
+800004d4:	03d09263          	bne	ra,t4,800004f8 <fail>
+
+800004d8 <test_65>:
+800004d8:	00002097          	auipc	ra,0x2
+800004dc:	c2808093          	addi	ra,ra,-984 # 80002100 <begin_signature>
+800004e0:	00c0a087          	flw	ft1,12(ra)
+800004e4:	c010f0d3          	fcvt.wu.s	ra,ft1
+800004e8:	fff00e93          	li	t4,-1
+800004ec:	04100193          	li	gp,65
+800004f0:	01d09463          	bne	ra,t4,800004f8 <fail>
+800004f4:	00301c63          	bne	zero,gp,8000050c <pass>
+
+800004f8 <fail>:
+800004f8:	0ff0000f          	fence
+800004fc:	00018063          	beqz	gp,800004fc <fail+0x4>
+80000500:	00119193          	slli	gp,gp,0x1
+80000504:	0011e193          	ori	gp,gp,1
+80000508:	00000073          	ecall
+
+8000050c <pass>:
+8000050c:	0ff0000f          	fence
+80000510:	00100193          	li	gp,1
+80000514:	00000073          	ecall
+80000518:	c0001073          	unimp
+8000051c:	0000                	unimp
+8000051e:	0000                	unimp
+80000520:	0000                	unimp
+80000522:	0000                	unimp
+80000524:	0000                	unimp
+80000526:	0000                	unimp
+80000528:	0000                	unimp
+8000052a:	0000                	unimp
+8000052c:	0000                	unimp
+8000052e:	0000                	unimp
+80000530:	0000                	unimp
+80000532:	0000                	unimp
+80000534:	0000                	unimp
+80000536:	0000                	unimp
+80000538:	0000                	unimp
+8000053a:	0000                	unimp
+8000053c:	0000                	unimp
+8000053e:	0000                	unimp
+80000540:	0000                	unimp
+80000542:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	cccd                	beqz	s1,800020ba <test_15_data+0xa>
+80002002:	bf8c                	fsd	fa1,56(a5)
+80002004:	0000                	unimp
+80002006:	0000                	unimp
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	ffff                	0xffff
+8000200e:	ffff                	0xffff
+
+80002010 <test_3_data>:
+80002010:	0000                	unimp
+80002012:	bf80                	fsd	fs0,56(a5)
+80002014:	0000                	unimp
+80002016:	0000                	unimp
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	ffff                	0xffff
+8000201e:	ffff                	0xffff
+
+80002020 <test_4_data>:
+80002020:	6666                	flw	fa2,88(sp)
+80002022:	bf66                	fsd	fs9,440(sp)
+80002024:	0000                	unimp
+80002026:	0000                	unimp
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	0000                	unimp
+8000202e:	0000                	unimp
+
+80002030 <test_5_data>:
+80002030:	6666                	flw	fa2,88(sp)
+80002032:	3f66                	fld	ft10,120(sp)
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	0000                	unimp
+8000203e:	0000                	unimp
+
+80002040 <test_6_data>:
+80002040:	0000                	unimp
+80002042:	3f80                	fld	fs0,56(a5)
+80002044:	0000                	unimp
+80002046:	0000                	unimp
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0001                	nop
+8000204e:	0000                	unimp
+
+80002050 <test_7_data>:
+80002050:	cccd                	beqz	s1,8000210a <begin_signature+0xa>
+80002052:	3f8c                	fld	fa1,56(a5)
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0001                	nop
+8000205e:	0000                	unimp
+
+80002060 <test_8_data>:
+80002060:	d05e                	sw	s7,32(sp)
+80002062:	cf32                	sw	a2,156(sp)
+80002064:	0000                	unimp
+80002066:	0000                	unimp
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	8000                	0x8000
+
+80002070 <test_9_data>:
+80002070:	d05e                	sw	s7,32(sp)
+80002072:	4f32                	lw	t5,12(sp)
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	ffff                	0xffff
+8000207e:	7fff                	0x7fff
+
+80002080 <test_12_data>:
+80002080:	0000                	unimp
+80002082:	c040                	sw	s0,4(s0)
+80002084:	0000                	unimp
+80002086:	0000                	unimp
+80002088:	0000                	unimp
+8000208a:	0000                	unimp
+8000208c:	0000                	unimp
+8000208e:	0000                	unimp
+
+80002090 <test_13_data>:
+80002090:	0000                	unimp
+80002092:	bf80                	fsd	fs0,56(a5)
+80002094:	0000                	unimp
+80002096:	0000                	unimp
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	0000                	unimp
+8000209e:	0000                	unimp
+
+800020a0 <test_14_data>:
+800020a0:	6666                	flw	fa2,88(sp)
+800020a2:	bf66                	fsd	fs9,440(sp)
+800020a4:	0000                	unimp
+800020a6:	0000                	unimp
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	0000                	unimp
+800020ae:	0000                	unimp
+
+800020b0 <test_15_data>:
+800020b0:	6666                	flw	fa2,88(sp)
+800020b2:	3f66                	fld	ft10,120(sp)
+800020b4:	0000                	unimp
+800020b6:	0000                	unimp
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	0000                	unimp
+
+800020c0 <test_16_data>:
+800020c0:	0000                	unimp
+800020c2:	3f80                	fld	fs0,56(a5)
+800020c4:	0000                	unimp
+800020c6:	0000                	unimp
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0001                	nop
+800020ce:	0000                	unimp
+
+800020d0 <test_17_data>:
+800020d0:	cccd                	beqz	s1,8000218a <_end+0x5a>
+800020d2:	3f8c                	fld	fa1,56(a5)
+800020d4:	0000                	unimp
+800020d6:	0000                	unimp
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0001                	nop
+800020de:	0000                	unimp
+
+800020e0 <test_18_data>:
+800020e0:	d05e                	sw	s7,32(sp)
+800020e2:	cf32                	sw	a2,156(sp)
+800020e4:	0000                	unimp
+800020e6:	0000                	unimp
+800020e8:	0000                	unimp
+800020ea:	0000                	unimp
+800020ec:	0000                	unimp
+800020ee:	0000                	unimp
+
+800020f0 <test_19_data>:
+800020f0:	d05e                	sw	s7,32(sp)
+800020f2:	4f32                	lw	t5,12(sp)
+800020f4:	0000                	unimp
+800020f6:	0000                	unimp
+800020f8:	0000                	unimp
+800020fa:	0000                	unimp
+800020fc:	5e00                	lw	s0,56(a2)
+800020fe:	b2d0                	fsd	fa2,160(a3)
+
+80002100 <begin_signature>:
+80002100:	ffff                	0xffff
+80002102:	ffff                	0xffff
+80002104:	ffff                	0xffff
+80002106:	7fff                	0x7fff
+80002108:	0000                	unimp
+8000210a:	ff80                	fsw	fs0,56(a5)
+8000210c:	0000                	unimp
+8000210e:	7f80                	flw	fs0,56(a5)
+
+80002110 <tdat_d>:
+80002110:	ffff                	0xffff
+80002112:	ffff                	0xffff
+80002114:	ffff                	0xffff
+80002116:	ffff                	0xffff
+80002118:	ffff                	0xffff
+8000211a:	ffff                	0xffff
+8000211c:	ffff                	0xffff
+8000211e:	7fff                	0x7fff
+80002120:	0000                	unimp
+80002122:	0000                	unimp
+80002124:	0000                	unimp
+80002126:	fff0                	fsw	fa2,124(a5)
+80002128:	0000                	unimp
+8000212a:	0000                	unimp
+8000212c:	0000                	unimp
+8000212e:	7ff0                	flw	fa2,124(a5)
diff --git a/test/riscv-tests/rv32uf-p-fcvt_w.elf b/test/riscv-tests/rv32uf-p-fcvt_w.elf
new file mode 100644
index 0000000..05dc1ab
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fcvt_w.elf
diff --git a/test/riscv-tests/rv32uf-p-fdiv.dump b/test/riscv-tests/rv32uf-p-fdiv.dump
new file mode 100644
index 0000000..1f44e60
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fdiv.dump
@@ -0,0 +1,294 @@
+
+rv32uf-p-fdiv:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	181071d3          	fdiv.s	ft3,ft0,ft1
+80000128:	e0018553          	fmv.x.w	a0,ft3
+8000012c:	001015f3          	fsflags	a1,zero
+80000130:	00100613          	li	a2,1
+80000134:	14d51263          	bne	a0,a3,80000278 <fail>
+80000138:	14c59063          	bne	a1,a2,80000278 <fail>
+
+8000013c <test_3>:
+8000013c:	00300193          	li	gp,3
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+80000148:	00052007          	flw	ft0,0(a0)
+8000014c:	00452087          	flw	ft1,4(a0)
+80000150:	00852107          	flw	ft2,8(a0)
+80000154:	00c52683          	lw	a3,12(a0)
+80000158:	181071d3          	fdiv.s	ft3,ft0,ft1
+8000015c:	e0018553          	fmv.x.w	a0,ft3
+80000160:	001015f3          	fsflags	a1,zero
+80000164:	00100613          	li	a2,1
+80000168:	10d51863          	bne	a0,a3,80000278 <fail>
+8000016c:	10c59663          	bne	a1,a2,80000278 <fail>
+
+80000170 <test_4>:
+80000170:	00400193          	li	gp,4
+80000174:	00002517          	auipc	a0,0x2
+80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+8000017c:	00052007          	flw	ft0,0(a0)
+80000180:	00452087          	flw	ft1,4(a0)
+80000184:	00852107          	flw	ft2,8(a0)
+80000188:	00c52683          	lw	a3,12(a0)
+8000018c:	181071d3          	fdiv.s	ft3,ft0,ft1
+80000190:	e0018553          	fmv.x.w	a0,ft3
+80000194:	001015f3          	fsflags	a1,zero
+80000198:	00000613          	li	a2,0
+8000019c:	0cd51e63          	bne	a0,a3,80000278 <fail>
+800001a0:	0cc59c63          	bne	a1,a2,80000278 <fail>
+
+800001a4 <test_5>:
+800001a4:	00500193          	li	gp,5
+800001a8:	00002517          	auipc	a0,0x2
+800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+800001b0:	00052007          	flw	ft0,0(a0)
+800001b4:	00452087          	flw	ft1,4(a0)
+800001b8:	00852107          	flw	ft2,8(a0)
+800001bc:	00c52683          	lw	a3,12(a0)
+800001c0:	580071d3          	fsqrt.s	ft3,ft0
+800001c4:	e0018553          	fmv.x.w	a0,ft3
+800001c8:	001015f3          	fsflags	a1,zero
+800001cc:	00100613          	li	a2,1
+800001d0:	0ad51463          	bne	a0,a3,80000278 <fail>
+800001d4:	0ac59263          	bne	a1,a2,80000278 <fail>
+
+800001d8 <test_6>:
+800001d8:	00600193          	li	gp,6
+800001dc:	00002517          	auipc	a0,0x2
+800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+800001e4:	00052007          	flw	ft0,0(a0)
+800001e8:	00452087          	flw	ft1,4(a0)
+800001ec:	00852107          	flw	ft2,8(a0)
+800001f0:	00c52683          	lw	a3,12(a0)
+800001f4:	580071d3          	fsqrt.s	ft3,ft0
+800001f8:	e0018553          	fmv.x.w	a0,ft3
+800001fc:	001015f3          	fsflags	a1,zero
+80000200:	00000613          	li	a2,0
+80000204:	06d51a63          	bne	a0,a3,80000278 <fail>
+80000208:	06c59863          	bne	a1,a2,80000278 <fail>
+
+8000020c <test_7>:
+8000020c:	00700193          	li	gp,7
+80000210:	00002517          	auipc	a0,0x2
+80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+80000218:	00052007          	flw	ft0,0(a0)
+8000021c:	00452087          	flw	ft1,4(a0)
+80000220:	00852107          	flw	ft2,8(a0)
+80000224:	00c52683          	lw	a3,12(a0)
+80000228:	580071d3          	fsqrt.s	ft3,ft0
+8000022c:	e0018553          	fmv.x.w	a0,ft3
+80000230:	001015f3          	fsflags	a1,zero
+80000234:	01000613          	li	a2,16
+80000238:	04d51063          	bne	a0,a3,80000278 <fail>
+8000023c:	02c59e63          	bne	a1,a2,80000278 <fail>
+
+80000240 <test_8>:
+80000240:	00800193          	li	gp,8
+80000244:	00002517          	auipc	a0,0x2
+80000248:	e2050513          	addi	a0,a0,-480 # 80002064 <test_8_data>
+8000024c:	00052007          	flw	ft0,0(a0)
+80000250:	00452087          	flw	ft1,4(a0)
+80000254:	00852107          	flw	ft2,8(a0)
+80000258:	00c52683          	lw	a3,12(a0)
+8000025c:	580071d3          	fsqrt.s	ft3,ft0
+80000260:	e0018553          	fmv.x.w	a0,ft3
+80000264:	001015f3          	fsflags	a1,zero
+80000268:	00100613          	li	a2,1
+8000026c:	00d51663          	bne	a0,a3,80000278 <fail>
+80000270:	00c59463          	bne	a1,a2,80000278 <fail>
+80000274:	00301c63          	bne	zero,gp,8000028c <pass>
+
+80000278 <fail>:
+80000278:	0ff0000f          	fence
+8000027c:	00018063          	beqz	gp,8000027c <fail+0x4>
+80000280:	00119193          	slli	gp,gp,0x1
+80000284:	0011e193          	ori	gp,gp,1
+80000288:	00000073          	ecall
+
+8000028c <pass>:
+8000028c:	0ff0000f          	fence
+80000290:	00100193          	li	gp,1
+80000294:	00000073          	ecall
+80000298:	c0001073          	unimp
+8000029c:	0000                	unimp
+8000029e:	0000                	unimp
+800002a0:	0000                	unimp
+800002a2:	0000                	unimp
+800002a4:	0000                	unimp
+800002a6:	0000                	unimp
+800002a8:	0000                	unimp
+800002aa:	0000                	unimp
+800002ac:	0000                	unimp
+800002ae:	0000                	unimp
+800002b0:	0000                	unimp
+800002b2:	0000                	unimp
+800002b4:	0000                	unimp
+800002b6:	0000                	unimp
+800002b8:	0000                	unimp
+800002ba:	0000                	unimp
+800002bc:	0000                	unimp
+800002be:	0000                	unimp
+800002c0:	0000                	unimp
+800002c2:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	40490fdb          	0x40490fdb
+80002004:	f854                	fsw	fa3,52(s0)
+80002006:	402d                	c.li	zero,11
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	eee0                	fsw	fs0,92(a3)
+8000200e:	          	sltiu	t6,zero,1024
+
+80002010 <test_3_data>:
+80002010:	4000                	lw	s0,0(s0)
+80002012:	c49a                	sw	t1,72(sp)
+80002014:	449a6333          	0x449a6333
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	c5a2                	sw	s0,200(sp)
+8000201e:	bf7f                	0xbf7f
+
+80002020 <test_4_data>:
+80002020:	40490fdb          	0x40490fdb
+80002024:	0000                	unimp
+80002026:	3f80                	fld	fs0,56(a5)
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	40490fdb          	0x40490fdb
+
+80002030 <test_5_data>:
+80002030:	40490fdb          	0x40490fdb
+80002034:	0000                	unimp
+80002036:	0000                	unimp
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	dfc5                	beqz	a5,80001ff4 <fromhost+0xfb4>
+8000203e:	3fe2                	fld	ft11,56(sp)
+
+80002040 <test_6_data>:
+80002040:	4000                	lw	s0,0(s0)
+80002042:	461c                	lw	a5,8(a2)
+80002044:	0000                	unimp
+80002046:	0000                	unimp
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	0000                	unimp
+8000204e:	42c8                	lw	a0,4(a3)
+
+80002050 <test_7_data>:
+80002050:	0000                	unimp
+80002052:	bf80                	fsd	fs0,56(a5)
+80002054:	0000                	unimp
+80002056:	0000                	unimp
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0000                	unimp
+8000205e:	7fc0                	flw	fs0,60(a5)
+80002060:	0000                	unimp
+80002062:	0000                	unimp
+
+80002064 <test_8_data>:
+80002064:	0000                	unimp
+80002066:	0000432b          	0x432b
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	0000                	unimp
+80002070:	3a26                	fld	fs4,104(sp)
+80002072:	4151                	li	sp,20
+80002074:	0000                	unimp
+80002076:	0000                	unimp
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	0000                	unimp
+8000207e:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-p-fdiv.elf b/test/riscv-tests/rv32uf-p-fdiv.elf
new file mode 100644
index 0000000..4812852
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fdiv.elf
diff --git a/test/riscv-tests/rv32uf-p-fmadd.dump b/test/riscv-tests/rv32uf-p-fmadd.dump
new file mode 100644
index 0000000..fd13da7
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fmadd.dump
@@ -0,0 +1,411 @@
+
+rv32uf-p-fmadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+80000128:	e0018553          	fmv.x.w	a0,ft3
+8000012c:	001015f3          	fsflags	a1,zero
+80000130:	00000613          	li	a2,0
+80000134:	24d51463          	bne	a0,a3,8000037c <fail>
+80000138:	24c59263          	bne	a1,a2,8000037c <fail>
+
+8000013c <test_3>:
+8000013c:	00300193          	li	gp,3
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+80000148:	00052007          	flw	ft0,0(a0)
+8000014c:	00452087          	flw	ft1,4(a0)
+80000150:	00852107          	flw	ft2,8(a0)
+80000154:	00c52683          	lw	a3,12(a0)
+80000158:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+8000015c:	e0018553          	fmv.x.w	a0,ft3
+80000160:	001015f3          	fsflags	a1,zero
+80000164:	00100613          	li	a2,1
+80000168:	20d51a63          	bne	a0,a3,8000037c <fail>
+8000016c:	20c59863          	bne	a1,a2,8000037c <fail>
+
+80000170 <test_4>:
+80000170:	00400193          	li	gp,4
+80000174:	00002517          	auipc	a0,0x2
+80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+8000017c:	00052007          	flw	ft0,0(a0)
+80000180:	00452087          	flw	ft1,4(a0)
+80000184:	00852107          	flw	ft2,8(a0)
+80000188:	00c52683          	lw	a3,12(a0)
+8000018c:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+80000190:	e0018553          	fmv.x.w	a0,ft3
+80000194:	001015f3          	fsflags	a1,zero
+80000198:	00000613          	li	a2,0
+8000019c:	1ed51063          	bne	a0,a3,8000037c <fail>
+800001a0:	1cc59e63          	bne	a1,a2,8000037c <fail>
+
+800001a4 <test_5>:
+800001a4:	00500193          	li	gp,5
+800001a8:	00002517          	auipc	a0,0x2
+800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+800001b0:	00052007          	flw	ft0,0(a0)
+800001b4:	00452087          	flw	ft1,4(a0)
+800001b8:	00852107          	flw	ft2,8(a0)
+800001bc:	00c52683          	lw	a3,12(a0)
+800001c0:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+800001c4:	e0018553          	fmv.x.w	a0,ft3
+800001c8:	001015f3          	fsflags	a1,zero
+800001cc:	00000613          	li	a2,0
+800001d0:	1ad51663          	bne	a0,a3,8000037c <fail>
+800001d4:	1ac59463          	bne	a1,a2,8000037c <fail>
+
+800001d8 <test_6>:
+800001d8:	00600193          	li	gp,6
+800001dc:	00002517          	auipc	a0,0x2
+800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+800001e4:	00052007          	flw	ft0,0(a0)
+800001e8:	00452087          	flw	ft1,4(a0)
+800001ec:	00852107          	flw	ft2,8(a0)
+800001f0:	00c52683          	lw	a3,12(a0)
+800001f4:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+800001f8:	e0018553          	fmv.x.w	a0,ft3
+800001fc:	001015f3          	fsflags	a1,zero
+80000200:	00100613          	li	a2,1
+80000204:	16d51c63          	bne	a0,a3,8000037c <fail>
+80000208:	16c59a63          	bne	a1,a2,8000037c <fail>
+
+8000020c <test_7>:
+8000020c:	00700193          	li	gp,7
+80000210:	00002517          	auipc	a0,0x2
+80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+80000218:	00052007          	flw	ft0,0(a0)
+8000021c:	00452087          	flw	ft1,4(a0)
+80000220:	00852107          	flw	ft2,8(a0)
+80000224:	00c52683          	lw	a3,12(a0)
+80000228:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+8000022c:	e0018553          	fmv.x.w	a0,ft3
+80000230:	001015f3          	fsflags	a1,zero
+80000234:	00000613          	li	a2,0
+80000238:	14d51263          	bne	a0,a3,8000037c <fail>
+8000023c:	14c59063          	bne	a1,a2,8000037c <fail>
+
+80000240 <test_8>:
+80000240:	00800193          	li	gp,8
+80000244:	00002517          	auipc	a0,0x2
+80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_8_data>
+8000024c:	00052007          	flw	ft0,0(a0)
+80000250:	00452087          	flw	ft1,4(a0)
+80000254:	00852107          	flw	ft2,8(a0)
+80000258:	00c52683          	lw	a3,12(a0)
+8000025c:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+80000260:	e0018553          	fmv.x.w	a0,ft3
+80000264:	001015f3          	fsflags	a1,zero
+80000268:	00000613          	li	a2,0
+8000026c:	10d51863          	bne	a0,a3,8000037c <fail>
+80000270:	10c59663          	bne	a1,a2,8000037c <fail>
+
+80000274 <test_9>:
+80000274:	00900193          	li	gp,9
+80000278:	00002517          	auipc	a0,0x2
+8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_9_data>
+80000280:	00052007          	flw	ft0,0(a0)
+80000284:	00452087          	flw	ft1,4(a0)
+80000288:	00852107          	flw	ft2,8(a0)
+8000028c:	00c52683          	lw	a3,12(a0)
+80000290:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+80000294:	e0018553          	fmv.x.w	a0,ft3
+80000298:	001015f3          	fsflags	a1,zero
+8000029c:	00100613          	li	a2,1
+800002a0:	0cd51e63          	bne	a0,a3,8000037c <fail>
+800002a4:	0cc59c63          	bne	a1,a2,8000037c <fail>
+
+800002a8 <test_10>:
+800002a8:	00a00193          	li	gp,10
+800002ac:	00002517          	auipc	a0,0x2
+800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_10_data>
+800002b4:	00052007          	flw	ft0,0(a0)
+800002b8:	00452087          	flw	ft1,4(a0)
+800002bc:	00852107          	flw	ft2,8(a0)
+800002c0:	00c52683          	lw	a3,12(a0)
+800002c4:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+800002c8:	e0018553          	fmv.x.w	a0,ft3
+800002cc:	001015f3          	fsflags	a1,zero
+800002d0:	00000613          	li	a2,0
+800002d4:	0ad51463          	bne	a0,a3,8000037c <fail>
+800002d8:	0ac59263          	bne	a1,a2,8000037c <fail>
+
+800002dc <test_11>:
+800002dc:	00b00193          	li	gp,11
+800002e0:	00002517          	auipc	a0,0x2
+800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_11_data>
+800002e8:	00052007          	flw	ft0,0(a0)
+800002ec:	00452087          	flw	ft1,4(a0)
+800002f0:	00852107          	flw	ft2,8(a0)
+800002f4:	00c52683          	lw	a3,12(a0)
+800002f8:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+800002fc:	e0018553          	fmv.x.w	a0,ft3
+80000300:	001015f3          	fsflags	a1,zero
+80000304:	00000613          	li	a2,0
+80000308:	06d51a63          	bne	a0,a3,8000037c <fail>
+8000030c:	06c59863          	bne	a1,a2,8000037c <fail>
+
+80000310 <test_12>:
+80000310:	00c00193          	li	gp,12
+80000314:	00002517          	auipc	a0,0x2
+80000318:	d8c50513          	addi	a0,a0,-628 # 800020a0 <test_12_data>
+8000031c:	00052007          	flw	ft0,0(a0)
+80000320:	00452087          	flw	ft1,4(a0)
+80000324:	00852107          	flw	ft2,8(a0)
+80000328:	00c52683          	lw	a3,12(a0)
+8000032c:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+80000330:	e0018553          	fmv.x.w	a0,ft3
+80000334:	001015f3          	fsflags	a1,zero
+80000338:	00100613          	li	a2,1
+8000033c:	04d51063          	bne	a0,a3,8000037c <fail>
+80000340:	02c59e63          	bne	a1,a2,8000037c <fail>
+
+80000344 <test_13>:
+80000344:	00d00193          	li	gp,13
+80000348:	00002517          	auipc	a0,0x2
+8000034c:	d6850513          	addi	a0,a0,-664 # 800020b0 <test_13_data>
+80000350:	00052007          	flw	ft0,0(a0)
+80000354:	00452087          	flw	ft1,4(a0)
+80000358:	00852107          	flw	ft2,8(a0)
+8000035c:	00c52683          	lw	a3,12(a0)
+80000360:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+80000364:	e0018553          	fmv.x.w	a0,ft3
+80000368:	001015f3          	fsflags	a1,zero
+8000036c:	00000613          	li	a2,0
+80000370:	00d51663          	bne	a0,a3,8000037c <fail>
+80000374:	00c59463          	bne	a1,a2,8000037c <fail>
+80000378:	00301c63          	bne	zero,gp,80000390 <pass>
+
+8000037c <fail>:
+8000037c:	0ff0000f          	fence
+80000380:	00018063          	beqz	gp,80000380 <fail+0x4>
+80000384:	00119193          	slli	gp,gp,0x1
+80000388:	0011e193          	ori	gp,gp,1
+8000038c:	00000073          	ecall
+
+80000390 <pass>:
+80000390:	0ff0000f          	fence
+80000394:	00100193          	li	gp,1
+80000398:	00000073          	ecall
+8000039c:	c0001073          	unimp
+800003a0:	0000                	unimp
+800003a2:	0000                	unimp
+800003a4:	0000                	unimp
+800003a6:	0000                	unimp
+800003a8:	0000                	unimp
+800003aa:	0000                	unimp
+800003ac:	0000                	unimp
+800003ae:	0000                	unimp
+800003b0:	0000                	unimp
+800003b2:	0000                	unimp
+800003b4:	0000                	unimp
+800003b6:	0000                	unimp
+800003b8:	0000                	unimp
+800003ba:	0000                	unimp
+800003bc:	0000                	unimp
+800003be:	0000                	unimp
+800003c0:	0000                	unimp
+800003c2:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	3f80                	fld	fs0,56(a5)
+80002004:	0000                	unimp
+80002006:	4020                	lw	s0,64(s0)
+80002008:	0000                	unimp
+8000200a:	3f80                	fld	fs0,56(a5)
+8000200c:	0000                	unimp
+8000200e:	4060                	lw	s0,68(s0)
+
+80002010 <test_3_data>:
+80002010:	0000                	unimp
+80002012:	bf80                	fsd	fs0,56(a5)
+80002014:	c49a6333          	0xc49a6333
+80002018:	cccd                	beqz	s1,800020d2 <_end+0x12>
+8000201a:	3f8c                	fld	fa1,56(a5)
+8000201c:	8666                	mv	a2,s9
+8000201e:	449a                	lw	s1,132(sp)
+
+80002020 <test_4_data>:
+80002020:	0000                	unimp
+80002022:	4000                	lw	s0,0(s0)
+80002024:	0000                	unimp
+80002026:	c0a0                	sw	s0,64(s1)
+80002028:	0000                	unimp
+8000202a:	c000                	sw	s0,0(s0)
+8000202c:	0000                	unimp
+8000202e:	c140                	sw	s0,4(a0)
+
+80002030 <test_5_data>:
+80002030:	0000                	unimp
+80002032:	3f80                	fld	fs0,56(a5)
+80002034:	0000                	unimp
+80002036:	4020                	lw	s0,64(s0)
+80002038:	0000                	unimp
+8000203a:	3f80                	fld	fs0,56(a5)
+8000203c:	0000                	unimp
+8000203e:	c060                	sw	s0,68(s0)
+
+80002040 <test_6_data>:
+80002040:	0000                	unimp
+80002042:	bf80                	fsd	fs0,56(a5)
+80002044:	c49a6333          	0xc49a6333
+80002048:	cccd                	beqz	s1,80002102 <_end+0x42>
+8000204a:	3f8c                	fld	fa1,56(a5)
+8000204c:	8666                	mv	a2,s9
+8000204e:	c49a                	sw	t1,72(sp)
+
+80002050 <test_7_data>:
+80002050:	0000                	unimp
+80002052:	4000                	lw	s0,0(s0)
+80002054:	0000                	unimp
+80002056:	c0a0                	sw	s0,64(s1)
+80002058:	0000                	unimp
+8000205a:	c000                	sw	s0,0(s0)
+8000205c:	0000                	unimp
+8000205e:	4140                	lw	s0,4(a0)
+
+80002060 <test_8_data>:
+80002060:	0000                	unimp
+80002062:	3f80                	fld	fs0,56(a5)
+80002064:	0000                	unimp
+80002066:	4020                	lw	s0,64(s0)
+80002068:	0000                	unimp
+8000206a:	3f80                	fld	fs0,56(a5)
+8000206c:	0000                	unimp
+8000206e:	3fc0                	fld	fs0,184(a5)
+
+80002070 <test_9_data>:
+80002070:	0000                	unimp
+80002072:	bf80                	fsd	fs0,56(a5)
+80002074:	c49a6333          	0xc49a6333
+80002078:	cccd                	beqz	s1,80002132 <_end+0x72>
+8000207a:	3f8c                	fld	fa1,56(a5)
+8000207c:	4000                	lw	s0,0(s0)
+8000207e:	449a                	lw	s1,132(sp)
+
+80002080 <test_10_data>:
+80002080:	0000                	unimp
+80002082:	4000                	lw	s0,0(s0)
+80002084:	0000                	unimp
+80002086:	c0a0                	sw	s0,64(s1)
+80002088:	0000                	unimp
+8000208a:	c000                	sw	s0,0(s0)
+8000208c:	0000                	unimp
+8000208e:	c100                	sw	s0,0(a0)
+
+80002090 <test_11_data>:
+80002090:	0000                	unimp
+80002092:	3f80                	fld	fs0,56(a5)
+80002094:	0000                	unimp
+80002096:	4020                	lw	s0,64(s0)
+80002098:	0000                	unimp
+8000209a:	3f80                	fld	fs0,56(a5)
+8000209c:	0000                	unimp
+8000209e:	bfc0                	fsd	fs0,184(a5)
+
+800020a0 <test_12_data>:
+800020a0:	0000                	unimp
+800020a2:	bf80                	fsd	fs0,56(a5)
+800020a4:	c49a6333          	0xc49a6333
+800020a8:	cccd                	beqz	s1,80002162 <_end+0xa2>
+800020aa:	3f8c                	fld	fa1,56(a5)
+800020ac:	4000                	lw	s0,0(s0)
+800020ae:	c49a                	sw	t1,72(sp)
+
+800020b0 <test_13_data>:
+800020b0:	0000                	unimp
+800020b2:	4000                	lw	s0,0(s0)
+800020b4:	0000                	unimp
+800020b6:	c0a0                	sw	s0,64(s1)
+800020b8:	0000                	unimp
+800020ba:	c000                	sw	s0,0(s0)
+800020bc:	0000                	unimp
+800020be:	4100                	lw	s0,0(a0)
diff --git a/test/riscv-tests/rv32uf-p-fmadd.elf b/test/riscv-tests/rv32uf-p-fmadd.elf
new file mode 100644
index 0000000..e68a2ce
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fmadd.elf
diff --git a/test/riscv-tests/rv32uf-p-fmin.dump b/test/riscv-tests/rv32uf-p-fmin.dump
new file mode 100644
index 0000000..88a685c
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fmin.dump
@@ -0,0 +1,553 @@
+
+rv32uf-p-fmin:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	04c0006f          	j	8000004c <reset_vector>
+
+80000004 <trap_vector>:
+80000004:	34202f73          	csrr	t5,mcause
+80000008:	00800f93          	li	t6,8
+8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+80000010:	00900f93          	li	t6,9
+80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+80000018:	00b00f93          	li	t6,11
+8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+80000020:	80000f17          	auipc	t5,0x80000
+80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+8000002c:	000f0067          	jr	t5
+80000030:	34202f73          	csrr	t5,mcause
+80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+80000038:	0040006f          	j	8000003c <handle_exception>
+
+8000003c <handle_exception>:
+8000003c:	5391e193          	ori	gp,gp,1337
+
+80000040 <write_tohost>:
+80000040:	00001f17          	auipc	t5,0x1
+80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+8000004c <reset_vector>:
+8000004c:	f1402573          	csrr	a0,mhartid
+80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+80000054:	00000297          	auipc	t0,0x0
+80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+8000005c:	30529073          	csrw	mtvec,t0
+80000060:	18005073          	csrwi	satp,0
+80000064:	00000297          	auipc	t0,0x0
+80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+8000006c:	30529073          	csrw	mtvec,t0
+80000070:	fff00293          	li	t0,-1
+80000074:	3b029073          	csrw	pmpaddr0,t0
+80000078:	01f00293          	li	t0,31
+8000007c:	3a029073          	csrw	pmpcfg0,t0
+80000080:	00000297          	auipc	t0,0x0
+80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+80000088:	30529073          	csrw	mtvec,t0
+8000008c:	30205073          	csrwi	medeleg,0
+80000090:	30305073          	csrwi	mideleg,0
+80000094:	30405073          	csrwi	mie,0
+80000098:	00000193          	li	gp,0
+8000009c:	00000297          	auipc	t0,0x0
+800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+800000a4:	30529073          	csrw	mtvec,t0
+800000a8:	00100513          	li	a0,1
+800000ac:	01f51513          	slli	a0,a0,0x1f
+800000b0:	00054863          	bltz	a0,800000c0 <reset_vector+0x74>
+800000b4:	0ff0000f          	fence
+800000b8:	00100193          	li	gp,1
+800000bc:	00000073          	ecall
+800000c0:	80000297          	auipc	t0,0x80000
+800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+800000cc:	10529073          	csrw	stvec,t0
+800000d0:	0000b2b7          	lui	t0,0xb
+800000d4:	10928293          	addi	t0,t0,265 # b109 <_start-0x7fff4ef7>
+800000d8:	30229073          	csrw	medeleg,t0
+800000dc:	30202373          	csrr	t1,medeleg
+800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+800000e4:	30005073          	csrwi	mstatus,0
+800000e8:	00002537          	lui	a0,0x2
+800000ec:	30052073          	csrs	mstatus,a0
+800000f0:	00305073          	csrwi	fcsr,0
+800000f4:	00000297          	auipc	t0,0x0
+800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+800000fc:	34129073          	csrw	mepc,t0
+80000100:	f1402573          	csrr	a0,mhartid
+80000104:	30200073          	mret
+
+80000108 <test_2>:
+80000108:	00200193          	li	gp,2
+8000010c:	00002517          	auipc	a0,0x2
+80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+80000114:	00052007          	flw	ft0,0(a0)
+80000118:	00452087          	flw	ft1,4(a0)
+8000011c:	00852107          	flw	ft2,8(a0)
+80000120:	00c52683          	lw	a3,12(a0)
+80000124:	281001d3          	fmin.s	ft3,ft0,ft1
+80000128:	e0018553          	fmv.x.w	a0,ft3
+8000012c:	001015f3          	fsflags	a1,zero
+80000130:	00000613          	li	a2,0
+80000134:	38d51063          	bne	a0,a3,800004b4 <fail>
+80000138:	36c59e63          	bne	a1,a2,800004b4 <fail>
+
+8000013c <test_3>:
+8000013c:	00300193          	li	gp,3
+80000140:	00002517          	auipc	a0,0x2
+80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+80000148:	00052007          	flw	ft0,0(a0)
+8000014c:	00452087          	flw	ft1,4(a0)
+80000150:	00852107          	flw	ft2,8(a0)
+80000154:	00c52683          	lw	a3,12(a0)
+80000158:	281001d3          	fmin.s	ft3,ft0,ft1
+8000015c:	e0018553          	fmv.x.w	a0,ft3
+80000160:	001015f3          	fsflags	a1,zero
+80000164:	00000613          	li	a2,0
+80000168:	34d51663          	bne	a0,a3,800004b4 <fail>
+8000016c:	34c59463          	bne	a1,a2,800004b4 <fail>
+
+80000170 <test_4>:
+80000170:	00400193          	li	gp,4
+80000174:	00002517          	auipc	a0,0x2
+80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+8000017c:	00052007          	flw	ft0,0(a0)
+80000180:	00452087          	flw	ft1,4(a0)
+80000184:	00852107          	flw	ft2,8(a0)
+80000188:	00c52683          	lw	a3,12(a0)
+8000018c:	281001d3          	fmin.s	ft3,ft0,ft1
+80000190:	e0018553          	fmv.x.w	a0,ft3
+80000194:	001015f3          	fsflags	a1,zero
+80000198:	00000613          	li	a2,0
+8000019c:	30d51c63          	bne	a0,a3,800004b4 <fail>
+800001a0:	30c59a63          	bne	a1,a2,800004b4 <fail>
+
+800001a4 <test_5>:
+800001a4:	00500193          	li	gp,5
+800001a8:	00002517          	auipc	a0,0x2
+800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+800001b0:	00052007          	flw	ft0,0(a0)
+800001b4:	00452087          	flw	ft1,4(a0)
+800001b8:	00852107          	flw	ft2,8(a0)
+800001bc:	00c52683          	lw	a3,12(a0)
+800001c0:	281001d3          	fmin.s	ft3,ft0,ft1
+800001c4:	e0018553          	fmv.x.w	a0,ft3
+800001c8:	001015f3          	fsflags	a1,zero
+800001cc:	00000613          	li	a2,0
+800001d0:	2ed51263          	bne	a0,a3,800004b4 <fail>
+800001d4:	2ec59063          	bne	a1,a2,800004b4 <fail>
+
+800001d8 <test_6>:
+800001d8:	00600193          	li	gp,6
+800001dc:	00002517          	auipc	a0,0x2
+800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+800001e4:	00052007          	flw	ft0,0(a0)
+800001e8:	00452087          	flw	ft1,4(a0)
+800001ec:	00852107          	flw	ft2,8(a0)
+800001f0:	00c52683          	lw	a3,12(a0)
+800001f4:	281001d3          	fmin.s	ft3,ft0,ft1
+800001f8:	e0018553          	fmv.x.w	a0,ft3
+800001fc:	001015f3          	fsflags	a1,zero
+80000200:	00000613          	li	a2,0
+80000204:	2ad51863          	bne	a0,a3,800004b4 <fail>
+80000208:	2ac59663          	bne	a1,a2,800004b4 <fail>
+
+8000020c <test_7>:
+8000020c:	00700193          	li	gp,7
+80000210:	00002517          	auipc	a0,0x2
+80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+80000218:	00052007          	flw	ft0,0(a0)
+8000021c:	00452087          	flw	ft1,4(a0)
+80000220:	00852107          	flw	ft2,8(a0)
+80000224:	00c52683          	lw	a3,12(a0)
+80000228:	281001d3          	fmin.s	ft3,ft0,ft1
+8000022c:	e0018553          	fmv.x.w	a0,ft3
+80000230:	001015f3          	fsflags	a1,zero
+80000234:	00000613          	li	a2,0
+80000238:	26d51e63          	bne	a0,a3,800004b4 <fail>
+8000023c:	26c59c63          	bne	a1,a2,800004b4 <fail>
+
+80000240 <test_12>:
+80000240:	00c00193          	li	gp,12
+80000244:	00002517          	auipc	a0,0x2
+80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_12_data>
+8000024c:	00052007          	flw	ft0,0(a0)
+80000250:	00452087          	flw	ft1,4(a0)
+80000254:	00852107          	flw	ft2,8(a0)
+80000258:	00c52683          	lw	a3,12(a0)
+8000025c:	281011d3          	fmax.s	ft3,ft0,ft1
+80000260:	e0018553          	fmv.x.w	a0,ft3
+80000264:	001015f3          	fsflags	a1,zero
+80000268:	00000613          	li	a2,0
+8000026c:	24d51463          	bne	a0,a3,800004b4 <fail>
+80000270:	24c59263          	bne	a1,a2,800004b4 <fail>
+
+80000274 <test_13>:
+80000274:	00d00193          	li	gp,13
+80000278:	00002517          	auipc	a0,0x2
+8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_13_data>
+80000280:	00052007          	flw	ft0,0(a0)
+80000284:	00452087          	flw	ft1,4(a0)
+80000288:	00852107          	flw	ft2,8(a0)
+8000028c:	00c52683          	lw	a3,12(a0)
+80000290:	281011d3          	fmax.s	ft3,ft0,ft1
+80000294:	e0018553          	fmv.x.w	a0,ft3
+80000298:	001015f3          	fsflags	a1,zero
+8000029c:	00000613          	li	a2,0
+800002a0:	20d51a63          	bne	a0,a3,800004b4 <fail>
+800002a4:	20c59863          	bne	a1,a2,800004b4 <fail>
+
+800002a8 <test_14>:
+800002a8:	00e00193          	li	gp,14
+800002ac:	00002517          	auipc	a0,0x2
+800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_14_data>
+800002b4:	00052007          	flw	ft0,0(a0)
+800002b8:	00452087          	flw	ft1,4(a0)
+800002bc:	00852107          	flw	ft2,8(a0)
+800002c0:	00c52683          	lw	a3,12(a0)
+800002c4:	281011d3          	fmax.s	ft3,ft0,ft1
+800002c8:	e0018553          	fmv.x.w	a0,ft3
+800002cc:	001015f3          	fsflags	a1,zero
+800002d0:	00000613          	li	a2,0
+800002d4:	1ed51063          	bne	a0,a3,800004b4 <fail>
+800002d8:	1cc59e63          	bne	a1,a2,800004b4 <fail>
+
+800002dc <test_15>:
+800002dc:	00f00193          	li	gp,15
+800002e0:	00002517          	auipc	a0,0x2
+800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_15_data>
+800002e8:	00052007          	flw	ft0,0(a0)
+800002ec:	00452087          	flw	ft1,4(a0)
+800002f0:	00852107          	flw	ft2,8(a0)
+800002f4:	00c52683          	lw	a3,12(a0)
+800002f8:	281011d3          	fmax.s	ft3,ft0,ft1
+800002fc:	e0018553          	fmv.x.w	a0,ft3
+80000300:	001015f3          	fsflags	a1,zero
+80000304:	00000613          	li	a2,0
+80000308:	1ad51663          	bne	a0,a3,800004b4 <fail>
+8000030c:	1ac59463          	bne	a1,a2,800004b4 <fail>
+
+80000310 <test_16>:
+80000310:	01000193          	li	gp,16
+80000314:	00002517          	auipc	a0,0x2
+80000318:	d8c50513          	addi	a0,a0,-628 # 800020a0 <test_16_data>
+8000031c:	00052007          	flw	ft0,0(a0)
+80000320:	00452087          	flw	ft1,4(a0)
+80000324:	00852107          	flw	ft2,8(a0)
+80000328:	00c52683          	lw	a3,12(a0)
+8000032c:	281011d3          	fmax.s	ft3,ft0,ft1
+80000330:	e0018553          	fmv.x.w	a0,ft3
+80000334:	001015f3          	fsflags	a1,zero
+80000338:	00000613          	li	a2,0
+8000033c:	16d51c63          	bne	a0,a3,800004b4 <fail>
+80000340:	16c59a63          	bne	a1,a2,800004b4 <fail>
+
+80000344 <test_17>:
+80000344:	01100193          	li	gp,17
+80000348:	00002517          	auipc	a0,0x2
+8000034c:	d6850513          	addi	a0,a0,-664 # 800020b0 <test_17_data>
+80000350:	00052007          	flw	ft0,0(a0)
+80000354:	00452087          	flw	ft1,4(a0)
+80000358:	00852107          	flw	ft2,8(a0)
+8000035c:	00c52683          	lw	a3,12(a0)
+80000360:	281011d3          	fmax.s	ft3,ft0,ft1
+80000364:	e0018553          	fmv.x.w	a0,ft3
+80000368:	001015f3          	fsflags	a1,zero
+8000036c:	00000613          	li	a2,0
+80000370:	14d51263          	bne	a0,a3,800004b4 <fail>
+80000374:	14c59063          	bne	a1,a2,800004b4 <fail>
+
+80000378 <test_20>:
+80000378:	01400193          	li	gp,20
+8000037c:	00002517          	auipc	a0,0x2
+80000380:	d4450513          	addi	a0,a0,-700 # 800020c0 <test_20_data>
+80000384:	00052007          	flw	ft0,0(a0)
+80000388:	00452087          	flw	ft1,4(a0)
+8000038c:	00852107          	flw	ft2,8(a0)
+80000390:	00c52683          	lw	a3,12(a0)
+80000394:	281011d3          	fmax.s	ft3,ft0,ft1
+80000398:	e0018553          	fmv.x.w	a0,ft3
+8000039c:	001015f3          	fsflags	a1,zero
+800003a0:	01000613          	li	a2,16
+800003a4:	10d51863          	bne	a0,a3,800004b4 <fail>
+800003a8:	10c59663          	bne	a1,a2,800004b4 <fail>
+
+800003ac <test_21>:
+800003ac:	01500193          	li	gp,21
+800003b0:	00002517          	auipc	a0,0x2
+800003b4:	d2050513          	addi	a0,a0,-736 # 800020d0 <test_21_data>
+800003b8:	00052007          	flw	ft0,0(a0)
+800003bc:	00452087          	flw	ft1,4(a0)
+800003c0:	00852107          	flw	ft2,8(a0)
+800003c4:	00c52683          	lw	a3,12(a0)
+800003c8:	281011d3          	fmax.s	ft3,ft0,ft1
+800003cc:	e0018553          	fmv.x.w	a0,ft3
+800003d0:	001015f3          	fsflags	a1,zero
+800003d4:	00000613          	li	a2,0
+800003d8:	0cd51e63          	bne	a0,a3,800004b4 <fail>
+800003dc:	0cc59c63          	bne	a1,a2,800004b4 <fail>
+
+800003e0 <test_30>:
+800003e0:	01e00193          	li	gp,30
+800003e4:	00002517          	auipc	a0,0x2
+800003e8:	cfc50513          	addi	a0,a0,-772 # 800020e0 <test_30_data>
+800003ec:	00052007          	flw	ft0,0(a0)
+800003f0:	00452087          	flw	ft1,4(a0)
+800003f4:	00852107          	flw	ft2,8(a0)
+800003f8:	00c52683          	lw	a3,12(a0)
+800003fc:	281001d3          	fmin.s	ft3,ft0,ft1
+80000400:	e0018553          	fmv.x.w	a0,ft3
+80000404:	001015f3          	fsflags	a1,zero
+80000408:	00000613          	li	a2,0
+8000040c:	0ad51463          	bne	a0,a3,800004b4 <fail>
+80000410:	0ac59263          	bne	a1,a2,800004b4 <fail>
+
+80000414 <test_31>:
+80000414:	01f00193          	li	gp,31
+80000418:	00002517          	auipc	a0,0x2
+8000041c:	cd850513          	addi	a0,a0,-808 # 800020f0 <test_31_data>
+80000420:	00052007          	flw	ft0,0(a0)
+80000424:	00452087          	flw	ft1,4(a0)
+80000428:	00852107          	flw	ft2,8(a0)
+8000042c:	00c52683          	lw	a3,12(a0)
+80000430:	281001d3          	fmin.s	ft3,ft0,ft1
+80000434:	e0018553          	fmv.x.w	a0,ft3
+80000438:	001015f3          	fsflags	a1,zero
+8000043c:	00000613          	li	a2,0
+80000440:	06d51a63          	bne	a0,a3,800004b4 <fail>
+80000444:	06c59863          	bne	a1,a2,800004b4 <fail>
+
+80000448 <test_32>:
+80000448:	02000193          	li	gp,32
+8000044c:	00002517          	auipc	a0,0x2
+80000450:	cb450513          	addi	a0,a0,-844 # 80002100 <test_32_data>
+80000454:	00052007          	flw	ft0,0(a0)
+80000458:	00452087          	flw	ft1,4(a0)
+8000045c:	00852107          	flw	ft2,8(a0)
+80000460:	00c52683          	lw	a3,12(a0)
+80000464:	281011d3          	fmax.s	ft3,ft0,ft1
+80000468:	e0018553          	fmv.x.w	a0,ft3
+8000046c:	001015f3          	fsflags	a1,zero
+80000470:	00000613          	li	a2,0
+80000474:	04d51063          	bne	a0,a3,800004b4 <fail>
+80000478:	02c59e63          	bne	a1,a2,800004b4 <fail>
+
+8000047c <test_33>:
+8000047c:	02100193          	li	gp,33
+80000480:	00002517          	auipc	a0,0x2
+80000484:	c9050513          	addi	a0,a0,-880 # 80002110 <test_33_data>
+80000488:	00052007          	flw	ft0,0(a0)
+8000048c:	00452087          	flw	ft1,4(a0)
+80000490:	00852107          	flw	ft2,8(a0)
+80000494:	00c52683          	lw	a3,12(a0)
+80000498:	281011d3          	fmax.s	ft3,ft0,ft1
+8000049c:	e0018553          	fmv.x.w	a0,ft3
+800004a0:	001015f3          	fsflags	a1,zero
+800004a4:	00000613          	li	a2,0
+800004a8:	00d51663          	bne	a0,a3,800004b4 <fail>
+800004ac:	00c59463          	bne	a1,a2,800004b4 <fail>
+800004b0:	00301c63          	bne	zero,gp,800004c8 <pass>
+
+800004b4 <fail>:
+800004b4:	0ff0000f          	fence
+800004b8:	00018063          	beqz	gp,800004b8 <fail+0x4>
+800004bc:	00119193          	slli	gp,gp,0x1
+800004c0:	0011e193          	ori	gp,gp,1
+800004c4:	00000073          	ecall
+
+800004c8 <pass>:
+800004c8:	0ff0000f          	fence
+800004cc:	00100193          	li	gp,1
+800004d0:	00000073          	ecall
+800004d4:	c0001073          	unimp
+800004d8:	0000                	unimp
+800004da:	0000                	unimp
+800004dc:	0000                	unimp
+800004de:	0000                	unimp
+800004e0:	0000                	unimp
+800004e2:	0000                	unimp
+800004e4:	0000                	unimp
+800004e6:	0000                	unimp
+800004e8:	0000                	unimp
+800004ea:	0000                	unimp
+800004ec:	0000                	unimp
+800004ee:	0000                	unimp
+800004f0:	0000                	unimp
+800004f2:	0000                	unimp
+800004f4:	0000                	unimp
+800004f6:	0000                	unimp
+800004f8:	0000                	unimp
+800004fa:	0000                	unimp
+800004fc:	0000                	unimp
+800004fe:	0000                	unimp
+80000500:	0000                	unimp
+80000502:	0000                	unimp
+
+Disassembly of section .data:
+
+80002000 <test_2_data>:
+80002000:	0000                	unimp
+80002002:	4020                	lw	s0,64(s0)
+80002004:	0000                	unimp
+80002006:	3f80                	fld	fs0,56(a5)
+80002008:	0000                	unimp
+8000200a:	0000                	unimp
+8000200c:	0000                	unimp
+8000200e:	3f80                	fld	fs0,56(a5)
+
+80002010 <test_3_data>:
+80002010:	c49a6333          	0xc49a6333
+80002014:	cccd                	beqz	s1,800020ce <test_20_data+0xe>
+80002016:	3f8c                	fld	fa1,56(a5)
+80002018:	0000                	unimp
+8000201a:	0000                	unimp
+8000201c:	c49a6333          	0xc49a6333
+
+80002020 <test_4_data>:
+80002020:	cccd                	beqz	s1,800020da <test_21_data+0xa>
+80002022:	3f8c                	fld	fa1,56(a5)
+80002024:	c49a6333          	0xc49a6333
+80002028:	0000                	unimp
+8000202a:	0000                	unimp
+8000202c:	c49a6333          	0xc49a6333
+
+80002030 <test_5_data>:
+80002030:	ffff                	0xffff
+80002032:	7fff                	0x7fff
+80002034:	c49a6333          	0xc49a6333
+80002038:	0000                	unimp
+8000203a:	0000                	unimp
+8000203c:	c49a6333          	0xc49a6333
+
+80002040 <test_6_data>:
+80002040:	40490fdb          	0x40490fdb
+80002044:	322bcc77          	0x322bcc77
+80002048:	0000                	unimp
+8000204a:	0000                	unimp
+8000204c:	322bcc77          	0x322bcc77
+
+80002050 <test_7_data>:
+80002050:	0000                	unimp
+80002052:	bf80                	fsd	fs0,56(a5)
+80002054:	0000                	unimp
+80002056:	c000                	sw	s0,0(s0)
+80002058:	0000                	unimp
+8000205a:	0000                	unimp
+8000205c:	0000                	unimp
+8000205e:	c000                	sw	s0,0(s0)
+
+80002060 <test_12_data>:
+80002060:	0000                	unimp
+80002062:	4020                	lw	s0,64(s0)
+80002064:	0000                	unimp
+80002066:	3f80                	fld	fs0,56(a5)
+80002068:	0000                	unimp
+8000206a:	0000                	unimp
+8000206c:	0000                	unimp
+8000206e:	4020                	lw	s0,64(s0)
+
+80002070 <test_13_data>:
+80002070:	c49a6333          	0xc49a6333
+80002074:	cccd                	beqz	s1,8000212e <_end+0xe>
+80002076:	3f8c                	fld	fa1,56(a5)
+80002078:	0000                	unimp
+8000207a:	0000                	unimp
+8000207c:	cccd                	beqz	s1,80002136 <_end+0x16>
+8000207e:	3f8c                	fld	fa1,56(a5)
+
+80002080 <test_14_data>:
+80002080:	cccd                	beqz	s1,8000213a <_end+0x1a>
+80002082:	3f8c                	fld	fa1,56(a5)
+80002084:	c49a6333          	0xc49a6333
+80002088:	0000                	unimp
+8000208a:	0000                	unimp
+8000208c:	cccd                	beqz	s1,80002146 <_end+0x26>
+8000208e:	3f8c                	fld	fa1,56(a5)
+
+80002090 <test_15_data>:
+80002090:	ffff                	0xffff
+80002092:	7fff                	0x7fff
+80002094:	c49a6333          	0xc49a6333
+80002098:	0000                	unimp
+8000209a:	0000                	unimp
+8000209c:	c49a6333          	0xc49a6333
+
+800020a0 <test_16_data>:
+800020a0:	40490fdb          	0x40490fdb
+800020a4:	322bcc77          	0x322bcc77
+800020a8:	0000                	unimp
+800020aa:	0000                	unimp
+800020ac:	40490fdb          	0x40490fdb
+
+800020b0 <test_17_data>:
+800020b0:	0000                	unimp
+800020b2:	bf80                	fsd	fs0,56(a5)
+800020b4:	0000                	unimp
+800020b6:	c000                	sw	s0,0(s0)
+800020b8:	0000                	unimp
+800020ba:	0000                	unimp
+800020bc:	0000                	unimp
+800020be:	bf80                	fsd	fs0,56(a5)
+
+800020c0 <test_20_data>:
+800020c0:	0001                	nop
+800020c2:	7f80                	flw	fs0,56(a5)
+800020c4:	0000                	unimp
+800020c6:	3f80                	fld	fs0,56(a5)
+800020c8:	0000                	unimp
+800020ca:	0000                	unimp
+800020cc:	0000                	unimp
+800020ce:	3f80                	fld	fs0,56(a5)
+
+800020d0 <test_21_data>:
+800020d0:	ffff                	0xffff
+800020d2:	7fff                	0x7fff
+800020d4:	ffff                	0xffff
+800020d6:	7fff                	0x7fff
+800020d8:	0000                	unimp
+800020da:	0000                	unimp
+800020dc:	0000                	unimp
+800020de:	7fc0                	flw	fs0,60(a5)
+
+800020e0 <test_30_data>:
+800020e0:	0000                	unimp
+800020e2:	8000                	0x8000
+800020e4:	0000                	unimp
+800020e6:	0000                	unimp
+800020e8:	0000                	unimp
+800020ea:	0000                	unimp
+800020ec:	0000                	unimp
+800020ee:	8000                	0x8000
+
+800020f0 <test_31_data>:
+800020f0:	0000                	unimp
+800020f2:	0000                	unimp
+800020f4:	0000                	unimp
+800020f6:	8000                	0x8000
+800020f8:	0000                	unimp
+800020fa:	0000                	unimp
+800020fc:	0000                	unimp
+800020fe:	8000                	0x8000
+
+80002100 <test_32_data>:
+80002100:	0000                	unimp
+80002102:	8000                	0x8000
+80002104:	0000                	unimp
+80002106:	0000                	unimp
+80002108:	0000                	unimp
+8000210a:	0000                	unimp
+8000210c:	0000                	unimp
+8000210e:	0000                	unimp
+
+80002110 <test_33_data>:
+80002110:	0000                	unimp
+80002112:	0000                	unimp
+80002114:	0000                	unimp
+80002116:	8000                	0x8000
+80002118:	0000                	unimp
+8000211a:	0000                	unimp
+8000211c:	0000                	unimp
+8000211e:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-p-fmin.elf b/test/riscv-tests/rv32uf-p-fmin.elf
new file mode 100644
index 0000000..e1774aa
--- /dev/null
+++ b/test/riscv-tests/rv32uf-p-fmin.elf
diff --git a/test/riscv-tests/rv32uf-v-fadd.dump b/test/riscv-tests/rv32uf-v-fadd.dump
new file mode 100644
index 0000000..ecde990
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fadd.dump
@@ -0,0 +1,1153 @@
+
+rv32uf-v-fadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	94458593          	addi	a1,a1,-1724 # 80002e0c <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	96058593          	addi	a1,a1,-1696 # 80002e98 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	90c58593          	addi	a1,a1,-1780 # 80002eb0 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	84058593          	addi	a1,a1,-1984 # 80002e50 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	83058593          	addi	a1,a1,-2000 # 80002f78 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	79858593          	addi	a1,a1,1944 # 80002f54 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	69460613          	addi	a2,a2,1684 # 80002fa4 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	5a460613          	addi	a2,a2,1444 # 80002f20 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	52460613          	addi	a2,a2,1316 # 80002eec <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	02200793          	li	a5,34
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	029657b7          	lui	a5,0x2965
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	30878793          	addi	a5,a5,776 # 2965308 <_start-0x7d69acf8>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00000517          	auipc	a0,0x0
+80002bec:	41850513          	addi	a0,a0,1048 # 80003000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	001071d3          	fadd.s	ft3,ft0,ft1
+80002c04:	e0018553          	fmv.x.w	a0,ft3
+80002c08:	001015f3          	fsflags	a1,zero
+80002c0c:	00000613          	li	a2,0
+80002c10:	1ed51063          	bne	a0,a3,80002df0 <fail>
+80002c14:	1cc59e63          	bne	a1,a2,80002df0 <fail>
+
+80002c18 <test_3>:
+80002c18:	00300193          	li	gp,3
+80002c1c:	00000517          	auipc	a0,0x0
+80002c20:	3f450513          	addi	a0,a0,1012 # 80003010 <test_3_data>
+80002c24:	00052007          	flw	ft0,0(a0)
+80002c28:	00452087          	flw	ft1,4(a0)
+80002c2c:	00852107          	flw	ft2,8(a0)
+80002c30:	00c52683          	lw	a3,12(a0)
+80002c34:	001071d3          	fadd.s	ft3,ft0,ft1
+80002c38:	e0018553          	fmv.x.w	a0,ft3
+80002c3c:	001015f3          	fsflags	a1,zero
+80002c40:	00100613          	li	a2,1
+80002c44:	1ad51663          	bne	a0,a3,80002df0 <fail>
+80002c48:	1ac59463          	bne	a1,a2,80002df0 <fail>
+
+80002c4c <test_4>:
+80002c4c:	00400193          	li	gp,4
+80002c50:	00000517          	auipc	a0,0x0
+80002c54:	3d050513          	addi	a0,a0,976 # 80003020 <test_4_data>
+80002c58:	00052007          	flw	ft0,0(a0)
+80002c5c:	00452087          	flw	ft1,4(a0)
+80002c60:	00852107          	flw	ft2,8(a0)
+80002c64:	00c52683          	lw	a3,12(a0)
+80002c68:	001071d3          	fadd.s	ft3,ft0,ft1
+80002c6c:	e0018553          	fmv.x.w	a0,ft3
+80002c70:	001015f3          	fsflags	a1,zero
+80002c74:	00100613          	li	a2,1
+80002c78:	16d51c63          	bne	a0,a3,80002df0 <fail>
+80002c7c:	16c59a63          	bne	a1,a2,80002df0 <fail>
+
+80002c80 <test_5>:
+80002c80:	00500193          	li	gp,5
+80002c84:	00000517          	auipc	a0,0x0
+80002c88:	3ac50513          	addi	a0,a0,940 # 80003030 <test_5_data>
+80002c8c:	00052007          	flw	ft0,0(a0)
+80002c90:	00452087          	flw	ft1,4(a0)
+80002c94:	00852107          	flw	ft2,8(a0)
+80002c98:	00c52683          	lw	a3,12(a0)
+80002c9c:	081071d3          	fsub.s	ft3,ft0,ft1
+80002ca0:	e0018553          	fmv.x.w	a0,ft3
+80002ca4:	001015f3          	fsflags	a1,zero
+80002ca8:	00000613          	li	a2,0
+80002cac:	14d51263          	bne	a0,a3,80002df0 <fail>
+80002cb0:	14c59063          	bne	a1,a2,80002df0 <fail>
+
+80002cb4 <test_6>:
+80002cb4:	00600193          	li	gp,6
+80002cb8:	00000517          	auipc	a0,0x0
+80002cbc:	38850513          	addi	a0,a0,904 # 80003040 <test_6_data>
+80002cc0:	00052007          	flw	ft0,0(a0)
+80002cc4:	00452087          	flw	ft1,4(a0)
+80002cc8:	00852107          	flw	ft2,8(a0)
+80002ccc:	00c52683          	lw	a3,12(a0)
+80002cd0:	081071d3          	fsub.s	ft3,ft0,ft1
+80002cd4:	e0018553          	fmv.x.w	a0,ft3
+80002cd8:	001015f3          	fsflags	a1,zero
+80002cdc:	00100613          	li	a2,1
+80002ce0:	10d51863          	bne	a0,a3,80002df0 <fail>
+80002ce4:	10c59663          	bne	a1,a2,80002df0 <fail>
+
+80002ce8 <test_7>:
+80002ce8:	00700193          	li	gp,7
+80002cec:	00000517          	auipc	a0,0x0
+80002cf0:	36450513          	addi	a0,a0,868 # 80003050 <test_7_data>
+80002cf4:	00052007          	flw	ft0,0(a0)
+80002cf8:	00452087          	flw	ft1,4(a0)
+80002cfc:	00852107          	flw	ft2,8(a0)
+80002d00:	00c52683          	lw	a3,12(a0)
+80002d04:	081071d3          	fsub.s	ft3,ft0,ft1
+80002d08:	e0018553          	fmv.x.w	a0,ft3
+80002d0c:	001015f3          	fsflags	a1,zero
+80002d10:	00100613          	li	a2,1
+80002d14:	0cd51e63          	bne	a0,a3,80002df0 <fail>
+80002d18:	0cc59c63          	bne	a1,a2,80002df0 <fail>
+
+80002d1c <test_8>:
+80002d1c:	00800193          	li	gp,8
+80002d20:	00000517          	auipc	a0,0x0
+80002d24:	34050513          	addi	a0,a0,832 # 80003060 <test_8_data>
+80002d28:	00052007          	flw	ft0,0(a0)
+80002d2c:	00452087          	flw	ft1,4(a0)
+80002d30:	00852107          	flw	ft2,8(a0)
+80002d34:	00c52683          	lw	a3,12(a0)
+80002d38:	101071d3          	fmul.s	ft3,ft0,ft1
+80002d3c:	e0018553          	fmv.x.w	a0,ft3
+80002d40:	001015f3          	fsflags	a1,zero
+80002d44:	00000613          	li	a2,0
+80002d48:	0ad51463          	bne	a0,a3,80002df0 <fail>
+80002d4c:	0ac59263          	bne	a1,a2,80002df0 <fail>
+
+80002d50 <test_9>:
+80002d50:	00900193          	li	gp,9
+80002d54:	00000517          	auipc	a0,0x0
+80002d58:	31c50513          	addi	a0,a0,796 # 80003070 <test_9_data>
+80002d5c:	00052007          	flw	ft0,0(a0)
+80002d60:	00452087          	flw	ft1,4(a0)
+80002d64:	00852107          	flw	ft2,8(a0)
+80002d68:	00c52683          	lw	a3,12(a0)
+80002d6c:	101071d3          	fmul.s	ft3,ft0,ft1
+80002d70:	e0018553          	fmv.x.w	a0,ft3
+80002d74:	001015f3          	fsflags	a1,zero
+80002d78:	00100613          	li	a2,1
+80002d7c:	06d51a63          	bne	a0,a3,80002df0 <fail>
+80002d80:	06c59863          	bne	a1,a2,80002df0 <fail>
+
+80002d84 <test_10>:
+80002d84:	00a00193          	li	gp,10
+80002d88:	00000517          	auipc	a0,0x0
+80002d8c:	2f850513          	addi	a0,a0,760 # 80003080 <test_10_data>
+80002d90:	00052007          	flw	ft0,0(a0)
+80002d94:	00452087          	flw	ft1,4(a0)
+80002d98:	00852107          	flw	ft2,8(a0)
+80002d9c:	00c52683          	lw	a3,12(a0)
+80002da0:	101071d3          	fmul.s	ft3,ft0,ft1
+80002da4:	e0018553          	fmv.x.w	a0,ft3
+80002da8:	001015f3          	fsflags	a1,zero
+80002dac:	00100613          	li	a2,1
+80002db0:	04d51063          	bne	a0,a3,80002df0 <fail>
+80002db4:	02c59e63          	bne	a1,a2,80002df0 <fail>
+
+80002db8 <test_11>:
+80002db8:	00b00193          	li	gp,11
+80002dbc:	00000517          	auipc	a0,0x0
+80002dc0:	2d450513          	addi	a0,a0,724 # 80003090 <test_11_data>
+80002dc4:	00052007          	flw	ft0,0(a0)
+80002dc8:	00452087          	flw	ft1,4(a0)
+80002dcc:	00852107          	flw	ft2,8(a0)
+80002dd0:	00c52683          	lw	a3,12(a0)
+80002dd4:	081071d3          	fsub.s	ft3,ft0,ft1
+80002dd8:	e0018553          	fmv.x.w	a0,ft3
+80002ddc:	001015f3          	fsflags	a1,zero
+80002de0:	01000613          	li	a2,16
+80002de4:	00d51663          	bne	a0,a3,80002df0 <fail>
+80002de8:	00c59463          	bne	a1,a2,80002df0 <fail>
+80002dec:	00301a63          	bne	zero,gp,80002e00 <pass>
+
+80002df0 <fail>:
+80002df0:	00119513          	slli	a0,gp,0x1
+80002df4:	00050063          	beqz	a0,80002df4 <fail+0x4>
+80002df8:	00156513          	ori	a0,a0,1
+80002dfc:	00000073          	ecall
+
+80002e00 <pass>:
+80002e00:	00100513          	li	a0,1
+80002e04:	00000073          	ecall
+80002e08:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	0000                	unimp
+80003002:	4020                	lw	s0,64(s0)
+80003004:	0000                	unimp
+80003006:	3f80                	fld	fs0,56(a5)
+80003008:	0000                	unimp
+8000300a:	0000                	unimp
+8000300c:	0000                	unimp
+8000300e:	4060                	lw	s0,68(s0)
+
+80003010 <test_3_data>:
+80003010:	c49a6333          	0xc49a6333
+80003014:	cccd                	beqz	s1,800030ce <begin_signature+0x2e>
+80003016:	3f8c                	fld	fa1,56(a5)
+80003018:	0000                	unimp
+8000301a:	0000                	unimp
+8000301c:	4000                	lw	s0,0(s0)
+8000301e:	c49a                	sw	t1,72(sp)
+
+80003020 <test_4_data>:
+80003020:	40490fdb          	0x40490fdb
+80003024:	322bcc77          	0x322bcc77
+80003028:	0000                	unimp
+8000302a:	0000                	unimp
+8000302c:	40490fdb          	0x40490fdb
+
+80003030 <test_5_data>:
+80003030:	0000                	unimp
+80003032:	4020                	lw	s0,64(s0)
+80003034:	0000                	unimp
+80003036:	3f80                	fld	fs0,56(a5)
+80003038:	0000                	unimp
+8000303a:	0000                	unimp
+8000303c:	0000                	unimp
+8000303e:	3fc0                	fld	fs0,184(a5)
+
+80003040 <test_6_data>:
+80003040:	c49a6333          	0xc49a6333
+80003044:	cccd                	beqz	s1,800030fe <begin_signature+0x5e>
+80003046:	bf8c                	fsd	fa1,56(a5)
+80003048:	0000                	unimp
+8000304a:	0000                	unimp
+8000304c:	4000                	lw	s0,0(s0)
+8000304e:	c49a                	sw	t1,72(sp)
+
+80003050 <test_7_data>:
+80003050:	40490fdb          	0x40490fdb
+80003054:	322bcc77          	0x322bcc77
+80003058:	0000                	unimp
+8000305a:	0000                	unimp
+8000305c:	40490fdb          	0x40490fdb
+
+80003060 <test_8_data>:
+80003060:	0000                	unimp
+80003062:	4020                	lw	s0,64(s0)
+80003064:	0000                	unimp
+80003066:	3f80                	fld	fs0,56(a5)
+80003068:	0000                	unimp
+8000306a:	0000                	unimp
+8000306c:	0000                	unimp
+8000306e:	4020                	lw	s0,64(s0)
+
+80003070 <test_9_data>:
+80003070:	c49a6333          	0xc49a6333
+80003074:	cccd                	beqz	s1,8000312e <begin_signature+0x8e>
+80003076:	bf8c                	fsd	fa1,56(a5)
+80003078:	0000                	unimp
+8000307a:	0000                	unimp
+8000307c:	d385                	beqz	a5,80002f9c <pass+0x19c>
+8000307e:	44a9                	li	s1,10
+
+80003080 <test_10_data>:
+80003080:	40490fdb          	0x40490fdb
+80003084:	322bcc77          	0x322bcc77
+80003088:	0000                	unimp
+8000308a:	0000                	unimp
+8000308c:	ee2d                	bnez	a2,80003106 <begin_signature+0x66>
+8000308e:	3306                	fld	ft6,96(sp)
+
+80003090 <test_11_data>:
+80003090:	0000                	unimp
+80003092:	7f80                	flw	fs0,56(a5)
+80003094:	0000                	unimp
+80003096:	7f80                	flw	fs0,56(a5)
+80003098:	0000                	unimp
+8000309a:	0000                	unimp
+8000309c:	0000                	unimp
+8000309e:	7fc0                	flw	fs0,60(a5)
diff --git a/test/riscv-tests/rv32uf-v-fadd.elf b/test/riscv-tests/rv32uf-v-fadd.elf
new file mode 100644
index 0000000..39441ea
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fadd.elf
diff --git a/test/riscv-tests/rv32uf-v-fclass.dump b/test/riscv-tests/rv32uf-v-fclass.dump
new file mode 100644
index 0000000..9de68ee
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fclass.dump
@@ -0,0 +1,995 @@
+
+rv32uf-v-fclass:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00006117          	auipc	sp,0x6
+8000001c:	35010113          	addi	sp,sp,848 # 80006368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00001317          	auipc	t1,0x1
+80002370:	c9430313          	addi	t1,t1,-876 # 80003000 <begin_signature>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00003797          	auipc	a5,0x3
+8000238c:	06c78793          	addi	a5,a5,108 # 800053f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00003717          	auipc	a4,0x3
+800023a0:	05470713          	addi	a4,a4,84 # 800053f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00003697          	auipc	a3,0x3
+800023ac:	04f6a623          	sw	a5,76(a3) # 800053f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00003717          	auipc	a4,0x3
+800023dc:	e2070713          	addi	a4,a4,-480 # 800051f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbfac08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00003797          	auipc	a5,0x3
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800053f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	83858593          	addi	a1,a1,-1992 # 80002d00 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	85458593          	addi	a1,a1,-1964 # 80002d8c <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	80058593          	addi	a1,a1,-2048 # 80002da4 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00000597          	auipc	a1,0x0
+80002614:	73458593          	addi	a1,a1,1844 # 80002d44 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00000597          	auipc	a1,0x0
+8000274c:	72458593          	addi	a1,a1,1828 # 80002e6c <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	68c58593          	addi	a1,a1,1676 # 80002e48 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00003b17          	auipc	s6,0x3
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800051f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00000d17          	auipc	s10,0x0
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80003000 <begin_signature>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00003717          	auipc	a4,0x3
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800053f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00003717          	auipc	a4,0x3
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800053f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00003717          	auipc	a4,0x3
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800053f0 <freelist_tail>
+80002900:	00003717          	auipc	a4,0x3
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800053f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	58860613          	addi	a2,a2,1416 # 80002e98 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	49860613          	addi	a2,a2,1176 # 80002e14 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	41860613          	addi	a2,a2,1048 # 80002de0 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00001797          	auipc	a5,0x1
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80004000 <begin_signature+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00000697          	auipc	a3,0x0
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80003000 <begin_signature>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00000717          	auipc	a4,0x0
+80002a6c:	59870713          	addi	a4,a4,1432 # 80003000 <begin_signature>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00001697          	auipc	a3,0x1
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80003ffc <begin_signature+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbfaccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc02797          	auipc	a5,0x7fc02
+80002aec:	51878793          	addi	a5,a5,1304 # ffc05000 <_end+0x7fbffc08>
+80002af0:	00003717          	auipc	a4,0x3
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800053f4 <freelist_head>
+80002af8:	7fc02797          	auipc	a5,0x7fc02
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc051f0 <_end+0x7fbffdf8>
+80002b00:	00003717          	auipc	a4,0x3
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800053f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00002717          	auipc	a4,0x2
+80002b10:	4f470713          	addi	a4,a4,1268 # 80005000 <freelist_nodes>
+80002b14:	00002317          	auipc	t1,0x2
+80002b18:	6e430313          	addi	t1,t1,1764 # 800051f8 <user_mapping>
+80002b1c:	02400793          	li	a5,36
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00002797          	auipc	a5,0x2
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800051f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	06cb57b7          	lui	a5,0x6cb5
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	32878793          	addi	a5,a5,808 # 6cb5328 <_start-0x7934acd8>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	ff800537          	lui	a0,0xff800
+80002be8:	f0050553          	fmv.w.x	fa0,a0
+80002bec:	e0051553          	fclass.s	a0,fa0
+80002bf0:	00100e93          	li	t4,1
+80002bf4:	00200193          	li	gp,2
+80002bf8:	0fd51663          	bne	a0,t4,80002ce4 <fail>
+
+80002bfc <test_3>:
+80002bfc:	bf800537          	lui	a0,0xbf800
+80002c00:	f0050553          	fmv.w.x	fa0,a0
+80002c04:	e0051553          	fclass.s	a0,fa0
+80002c08:	00200e93          	li	t4,2
+80002c0c:	00300193          	li	gp,3
+80002c10:	0dd51a63          	bne	a0,t4,80002ce4 <fail>
+
+80002c14 <test_4>:
+80002c14:	80800537          	lui	a0,0x80800
+80002c18:	fff50513          	addi	a0,a0,-1 # 807fffff <_end+0x7fac07>
+80002c1c:	f0050553          	fmv.w.x	fa0,a0
+80002c20:	e0051553          	fclass.s	a0,fa0
+80002c24:	00400e93          	li	t4,4
+80002c28:	00400193          	li	gp,4
+80002c2c:	0bd51c63          	bne	a0,t4,80002ce4 <fail>
+
+80002c30 <test_5>:
+80002c30:	80000537          	lui	a0,0x80000
+80002c34:	f0050553          	fmv.w.x	fa0,a0
+80002c38:	e0051553          	fclass.s	a0,fa0
+80002c3c:	00800e93          	li	t4,8
+80002c40:	00500193          	li	gp,5
+80002c44:	0bd51063          	bne	a0,t4,80002ce4 <fail>
+
+80002c48 <test_6>:
+80002c48:	00000513          	li	a0,0
+80002c4c:	f0050553          	fmv.w.x	fa0,a0
+80002c50:	e0051553          	fclass.s	a0,fa0
+80002c54:	01000e93          	li	t4,16
+80002c58:	00600193          	li	gp,6
+80002c5c:	09d51463          	bne	a0,t4,80002ce4 <fail>
+
+80002c60 <test_7>:
+80002c60:	00800537          	lui	a0,0x800
+80002c64:	fff50513          	addi	a0,a0,-1 # 7fffff <_start-0x7f800001>
+80002c68:	f0050553          	fmv.w.x	fa0,a0
+80002c6c:	e0051553          	fclass.s	a0,fa0
+80002c70:	02000e93          	li	t4,32
+80002c74:	00700193          	li	gp,7
+80002c78:	07d51663          	bne	a0,t4,80002ce4 <fail>
+
+80002c7c <test_8>:
+80002c7c:	3f800537          	lui	a0,0x3f800
+80002c80:	f0050553          	fmv.w.x	fa0,a0
+80002c84:	e0051553          	fclass.s	a0,fa0
+80002c88:	04000e93          	li	t4,64
+80002c8c:	00800193          	li	gp,8
+80002c90:	05d51a63          	bne	a0,t4,80002ce4 <fail>
+
+80002c94 <test_9>:
+80002c94:	7f800537          	lui	a0,0x7f800
+80002c98:	f0050553          	fmv.w.x	fa0,a0
+80002c9c:	e0051553          	fclass.s	a0,fa0
+80002ca0:	08000e93          	li	t4,128
+80002ca4:	00900193          	li	gp,9
+80002ca8:	03d51e63          	bne	a0,t4,80002ce4 <fail>
+
+80002cac <test_10>:
+80002cac:	7f800537          	lui	a0,0x7f800
+80002cb0:	00150513          	addi	a0,a0,1 # 7f800001 <_start-0x7fffff>
+80002cb4:	f0050553          	fmv.w.x	fa0,a0
+80002cb8:	e0051553          	fclass.s	a0,fa0
+80002cbc:	10000e93          	li	t4,256
+80002cc0:	00a00193          	li	gp,10
+80002cc4:	03d51063          	bne	a0,t4,80002ce4 <fail>
+
+80002cc8 <test_11>:
+80002cc8:	7fc00537          	lui	a0,0x7fc00
+80002ccc:	f0050553          	fmv.w.x	fa0,a0
+80002cd0:	e0051553          	fclass.s	a0,fa0
+80002cd4:	20000e93          	li	t4,512
+80002cd8:	00b00193          	li	gp,11
+80002cdc:	01d51463          	bne	a0,t4,80002ce4 <fail>
+80002ce0:	00301a63          	bne	zero,gp,80002cf4 <pass>
+
+80002ce4 <fail>:
+80002ce4:	00119513          	slli	a0,gp,0x1
+80002ce8:	00050063          	beqz	a0,80002ce8 <fail+0x4>
+80002cec:	00156513          	ori	a0,a0,1
+80002cf0:	00000073          	ecall
+
+80002cf4 <pass>:
+80002cf4:	00100513          	li	a0,1
+80002cf8:	00000073          	ecall
+80002cfc:	c0001073          	unimp
diff --git a/test/riscv-tests/rv32uf-v-fclass.elf b/test/riscv-tests/rv32uf-v-fclass.elf
new file mode 100644
index 0000000..d65d9d2
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fclass.elf
diff --git a/test/riscv-tests/rv32uf-v-fcmp.dump b/test/riscv-tests/rv32uf-v-fcmp.dump
new file mode 100644
index 0000000..43c9537
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcmp.dump
@@ -0,0 +1,1265 @@
+
+rv32uf-v-fcmp:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	a0c58593          	addi	a1,a1,-1524 # 80002ed4 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	a2858593          	addi	a1,a1,-1496 # 80002f60 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	9d458593          	addi	a1,a1,-1580 # 80002f78 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	90858593          	addi	a1,a1,-1784 # 80002f18 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	8f858593          	addi	a1,a1,-1800 # 80003040 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	86058593          	addi	a1,a1,-1952 # 8000301c <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	75c60613          	addi	a2,a2,1884 # 8000306c <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	66c60613          	addi	a2,a2,1644 # 80002fe8 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	5ec60613          	addi	a2,a2,1516 # 80002fb4 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	01200793          	li	a5,18
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0760b7b7          	lui	a5,0x760b
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	68c78793          	addi	a5,a5,1676 # 760b68c <_start-0x789f4974>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	a0102553          	feq.s	a0,ft0,ft1
+80002c04:	001015f3          	fsflags	a1,zero
+80002c08:	00000613          	li	a2,0
+80002c0c:	2ad51663          	bne	a0,a3,80002eb8 <fail>
+80002c10:	2ac59463          	bne	a1,a2,80002eb8 <fail>
+
+80002c14 <test_3>:
+80002c14:	00300193          	li	gp,3
+80002c18:	00001517          	auipc	a0,0x1
+80002c1c:	3f850513          	addi	a0,a0,1016 # 80004010 <test_3_data>
+80002c20:	00052007          	flw	ft0,0(a0)
+80002c24:	00452087          	flw	ft1,4(a0)
+80002c28:	00852107          	flw	ft2,8(a0)
+80002c2c:	00c52683          	lw	a3,12(a0)
+80002c30:	a0100553          	fle.s	a0,ft0,ft1
+80002c34:	001015f3          	fsflags	a1,zero
+80002c38:	00000613          	li	a2,0
+80002c3c:	26d51e63          	bne	a0,a3,80002eb8 <fail>
+80002c40:	26c59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002c44 <test_4>:
+80002c44:	00400193          	li	gp,4
+80002c48:	00001517          	auipc	a0,0x1
+80002c4c:	3d850513          	addi	a0,a0,984 # 80004020 <test_4_data>
+80002c50:	00052007          	flw	ft0,0(a0)
+80002c54:	00452087          	flw	ft1,4(a0)
+80002c58:	00852107          	flw	ft2,8(a0)
+80002c5c:	00c52683          	lw	a3,12(a0)
+80002c60:	a0101553          	flt.s	a0,ft0,ft1
+80002c64:	001015f3          	fsflags	a1,zero
+80002c68:	00000613          	li	a2,0
+80002c6c:	24d51663          	bne	a0,a3,80002eb8 <fail>
+80002c70:	24c59463          	bne	a1,a2,80002eb8 <fail>
+
+80002c74 <test_5>:
+80002c74:	00500193          	li	gp,5
+80002c78:	00001517          	auipc	a0,0x1
+80002c7c:	3b850513          	addi	a0,a0,952 # 80004030 <test_5_data>
+80002c80:	00052007          	flw	ft0,0(a0)
+80002c84:	00452087          	flw	ft1,4(a0)
+80002c88:	00852107          	flw	ft2,8(a0)
+80002c8c:	00c52683          	lw	a3,12(a0)
+80002c90:	a0102553          	feq.s	a0,ft0,ft1
+80002c94:	001015f3          	fsflags	a1,zero
+80002c98:	00000613          	li	a2,0
+80002c9c:	20d51e63          	bne	a0,a3,80002eb8 <fail>
+80002ca0:	20c59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002ca4 <test_6>:
+80002ca4:	00600193          	li	gp,6
+80002ca8:	00001517          	auipc	a0,0x1
+80002cac:	39850513          	addi	a0,a0,920 # 80004040 <test_6_data>
+80002cb0:	00052007          	flw	ft0,0(a0)
+80002cb4:	00452087          	flw	ft1,4(a0)
+80002cb8:	00852107          	flw	ft2,8(a0)
+80002cbc:	00c52683          	lw	a3,12(a0)
+80002cc0:	a0100553          	fle.s	a0,ft0,ft1
+80002cc4:	001015f3          	fsflags	a1,zero
+80002cc8:	00000613          	li	a2,0
+80002ccc:	1ed51663          	bne	a0,a3,80002eb8 <fail>
+80002cd0:	1ec59463          	bne	a1,a2,80002eb8 <fail>
+
+80002cd4 <test_7>:
+80002cd4:	00700193          	li	gp,7
+80002cd8:	00001517          	auipc	a0,0x1
+80002cdc:	37850513          	addi	a0,a0,888 # 80004050 <test_7_data>
+80002ce0:	00052007          	flw	ft0,0(a0)
+80002ce4:	00452087          	flw	ft1,4(a0)
+80002ce8:	00852107          	flw	ft2,8(a0)
+80002cec:	00c52683          	lw	a3,12(a0)
+80002cf0:	a0101553          	flt.s	a0,ft0,ft1
+80002cf4:	001015f3          	fsflags	a1,zero
+80002cf8:	00000613          	li	a2,0
+80002cfc:	1ad51e63          	bne	a0,a3,80002eb8 <fail>
+80002d00:	1ac59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002d04 <test_8>:
+80002d04:	00800193          	li	gp,8
+80002d08:	00001517          	auipc	a0,0x1
+80002d0c:	35850513          	addi	a0,a0,856 # 80004060 <test_8_data>
+80002d10:	00052007          	flw	ft0,0(a0)
+80002d14:	00452087          	flw	ft1,4(a0)
+80002d18:	00852107          	flw	ft2,8(a0)
+80002d1c:	00c52683          	lw	a3,12(a0)
+80002d20:	a0102553          	feq.s	a0,ft0,ft1
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	00000613          	li	a2,0
+80002d2c:	18d51663          	bne	a0,a3,80002eb8 <fail>
+80002d30:	18c59463          	bne	a1,a2,80002eb8 <fail>
+
+80002d34 <test_9>:
+80002d34:	00900193          	li	gp,9
+80002d38:	00001517          	auipc	a0,0x1
+80002d3c:	33850513          	addi	a0,a0,824 # 80004070 <test_9_data>
+80002d40:	00052007          	flw	ft0,0(a0)
+80002d44:	00452087          	flw	ft1,4(a0)
+80002d48:	00852107          	flw	ft2,8(a0)
+80002d4c:	00c52683          	lw	a3,12(a0)
+80002d50:	a0102553          	feq.s	a0,ft0,ft1
+80002d54:	001015f3          	fsflags	a1,zero
+80002d58:	00000613          	li	a2,0
+80002d5c:	14d51e63          	bne	a0,a3,80002eb8 <fail>
+80002d60:	14c59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002d64 <test_10>:
+80002d64:	00a00193          	li	gp,10
+80002d68:	00001517          	auipc	a0,0x1
+80002d6c:	31850513          	addi	a0,a0,792 # 80004080 <test_10_data>
+80002d70:	00052007          	flw	ft0,0(a0)
+80002d74:	00452087          	flw	ft1,4(a0)
+80002d78:	00852107          	flw	ft2,8(a0)
+80002d7c:	00c52683          	lw	a3,12(a0)
+80002d80:	a0102553          	feq.s	a0,ft0,ft1
+80002d84:	001015f3          	fsflags	a1,zero
+80002d88:	01000613          	li	a2,16
+80002d8c:	12d51663          	bne	a0,a3,80002eb8 <fail>
+80002d90:	12c59463          	bne	a1,a2,80002eb8 <fail>
+
+80002d94 <test_11>:
+80002d94:	00b00193          	li	gp,11
+80002d98:	00001517          	auipc	a0,0x1
+80002d9c:	2f850513          	addi	a0,a0,760 # 80004090 <test_11_data>
+80002da0:	00052007          	flw	ft0,0(a0)
+80002da4:	00452087          	flw	ft1,4(a0)
+80002da8:	00852107          	flw	ft2,8(a0)
+80002dac:	00c52683          	lw	a3,12(a0)
+80002db0:	a0101553          	flt.s	a0,ft0,ft1
+80002db4:	001015f3          	fsflags	a1,zero
+80002db8:	01000613          	li	a2,16
+80002dbc:	0ed51e63          	bne	a0,a3,80002eb8 <fail>
+80002dc0:	0ec59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002dc4 <test_12>:
+80002dc4:	00c00193          	li	gp,12
+80002dc8:	00001517          	auipc	a0,0x1
+80002dcc:	2d850513          	addi	a0,a0,728 # 800040a0 <test_12_data>
+80002dd0:	00052007          	flw	ft0,0(a0)
+80002dd4:	00452087          	flw	ft1,4(a0)
+80002dd8:	00852107          	flw	ft2,8(a0)
+80002ddc:	00c52683          	lw	a3,12(a0)
+80002de0:	a0101553          	flt.s	a0,ft0,ft1
+80002de4:	001015f3          	fsflags	a1,zero
+80002de8:	01000613          	li	a2,16
+80002dec:	0cd51663          	bne	a0,a3,80002eb8 <fail>
+80002df0:	0cc59463          	bne	a1,a2,80002eb8 <fail>
+
+80002df4 <test_13>:
+80002df4:	00d00193          	li	gp,13
+80002df8:	00001517          	auipc	a0,0x1
+80002dfc:	2b850513          	addi	a0,a0,696 # 800040b0 <test_13_data>
+80002e00:	00052007          	flw	ft0,0(a0)
+80002e04:	00452087          	flw	ft1,4(a0)
+80002e08:	00852107          	flw	ft2,8(a0)
+80002e0c:	00c52683          	lw	a3,12(a0)
+80002e10:	a0101553          	flt.s	a0,ft0,ft1
+80002e14:	001015f3          	fsflags	a1,zero
+80002e18:	01000613          	li	a2,16
+80002e1c:	08d51e63          	bne	a0,a3,80002eb8 <fail>
+80002e20:	08c59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002e24 <test_14>:
+80002e24:	00e00193          	li	gp,14
+80002e28:	00001517          	auipc	a0,0x1
+80002e2c:	29850513          	addi	a0,a0,664 # 800040c0 <test_14_data>
+80002e30:	00052007          	flw	ft0,0(a0)
+80002e34:	00452087          	flw	ft1,4(a0)
+80002e38:	00852107          	flw	ft2,8(a0)
+80002e3c:	00c52683          	lw	a3,12(a0)
+80002e40:	a0100553          	fle.s	a0,ft0,ft1
+80002e44:	001015f3          	fsflags	a1,zero
+80002e48:	01000613          	li	a2,16
+80002e4c:	06d51663          	bne	a0,a3,80002eb8 <fail>
+80002e50:	06c59463          	bne	a1,a2,80002eb8 <fail>
+
+80002e54 <test_15>:
+80002e54:	00f00193          	li	gp,15
+80002e58:	00001517          	auipc	a0,0x1
+80002e5c:	27850513          	addi	a0,a0,632 # 800040d0 <test_15_data>
+80002e60:	00052007          	flw	ft0,0(a0)
+80002e64:	00452087          	flw	ft1,4(a0)
+80002e68:	00852107          	flw	ft2,8(a0)
+80002e6c:	00c52683          	lw	a3,12(a0)
+80002e70:	a0100553          	fle.s	a0,ft0,ft1
+80002e74:	001015f3          	fsflags	a1,zero
+80002e78:	01000613          	li	a2,16
+80002e7c:	02d51e63          	bne	a0,a3,80002eb8 <fail>
+80002e80:	02c59c63          	bne	a1,a2,80002eb8 <fail>
+
+80002e84 <test_16>:
+80002e84:	01000193          	li	gp,16
+80002e88:	00001517          	auipc	a0,0x1
+80002e8c:	25850513          	addi	a0,a0,600 # 800040e0 <test_16_data>
+80002e90:	00052007          	flw	ft0,0(a0)
+80002e94:	00452087          	flw	ft1,4(a0)
+80002e98:	00852107          	flw	ft2,8(a0)
+80002e9c:	00c52683          	lw	a3,12(a0)
+80002ea0:	a0100553          	fle.s	a0,ft0,ft1
+80002ea4:	001015f3          	fsflags	a1,zero
+80002ea8:	01000613          	li	a2,16
+80002eac:	00d51663          	bne	a0,a3,80002eb8 <fail>
+80002eb0:	00c59463          	bne	a1,a2,80002eb8 <fail>
+80002eb4:	00301a63          	bne	zero,gp,80002ec8 <pass>
+
+80002eb8 <fail>:
+80002eb8:	00119513          	slli	a0,gp,0x1
+80002ebc:	00050063          	beqz	a0,80002ebc <fail+0x4>
+80002ec0:	00156513          	ori	a0,a0,1
+80002ec4:	00000073          	ecall
+
+80002ec8 <pass>:
+80002ec8:	00100513          	li	a0,1
+80002ecc:	00000073          	ecall
+80002ed0:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	bfae147b          	0xbfae147b
+80004004:	bfae147b          	0xbfae147b
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	0001                	nop
+8000400e:	0000                	unimp
+
+80004010 <test_3_data>:
+80004010:	bfae147b          	0xbfae147b
+80004014:	bfae147b          	0xbfae147b
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	0001                	nop
+8000401e:	0000                	unimp
+
+80004020 <test_4_data>:
+80004020:	bfae147b          	0xbfae147b
+80004024:	bfae147b          	0xbfae147b
+80004028:	0000                	unimp
+8000402a:	0000                	unimp
+8000402c:	0000                	unimp
+8000402e:	0000                	unimp
+
+80004030 <test_5_data>:
+80004030:	5c29                	li	s8,-22
+80004032:	147bbfaf          	0x147bbfaf
+80004036:	bfae                	fsd	fa1,504(sp)
+80004038:	0000                	unimp
+8000403a:	0000                	unimp
+8000403c:	0000                	unimp
+8000403e:	0000                	unimp
+
+80004040 <test_6_data>:
+80004040:	5c29                	li	s8,-22
+80004042:	147bbfaf          	0x147bbfaf
+80004046:	bfae                	fsd	fa1,504(sp)
+80004048:	0000                	unimp
+8000404a:	0000                	unimp
+8000404c:	0001                	nop
+8000404e:	0000                	unimp
+
+80004050 <test_7_data>:
+80004050:	5c29                	li	s8,-22
+80004052:	147bbfaf          	0x147bbfaf
+80004056:	bfae                	fsd	fa1,504(sp)
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0001                	nop
+8000405e:	0000                	unimp
+
+80004060 <test_8_data>:
+80004060:	ffff                	0xffff
+80004062:	7fff                	0x7fff
+80004064:	0000                	unimp
+80004066:	0000                	unimp
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	0000                	unimp
+
+80004070 <test_9_data>:
+80004070:	ffff                	0xffff
+80004072:	7fff                	0x7fff
+80004074:	ffff                	0xffff
+80004076:	7fff                	0x7fff
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	0000                	unimp
+8000407e:	0000                	unimp
+
+80004080 <test_10_data>:
+80004080:	0001                	nop
+80004082:	7f80                	flw	fs0,56(a5)
+80004084:	0000                	unimp
+80004086:	0000                	unimp
+80004088:	0000                	unimp
+8000408a:	0000                	unimp
+8000408c:	0000                	unimp
+8000408e:	0000                	unimp
+
+80004090 <test_11_data>:
+80004090:	ffff                	0xffff
+80004092:	7fff                	0x7fff
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	0000                	unimp
+8000409a:	0000                	unimp
+8000409c:	0000                	unimp
+8000409e:	0000                	unimp
+
+800040a0 <test_12_data>:
+800040a0:	ffff                	0xffff
+800040a2:	7fff                	0x7fff
+800040a4:	ffff                	0xffff
+800040a6:	7fff                	0x7fff
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	0000                	unimp
+800040ae:	0000                	unimp
+
+800040b0 <test_13_data>:
+800040b0:	0001                	nop
+800040b2:	7f80                	flw	fs0,56(a5)
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	0000                	unimp
+
+800040c0 <test_14_data>:
+800040c0:	ffff                	0xffff
+800040c2:	7fff                	0x7fff
+800040c4:	0000                	unimp
+800040c6:	0000                	unimp
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	0000                	unimp
+
+800040d0 <test_15_data>:
+800040d0:	ffff                	0xffff
+800040d2:	7fff                	0x7fff
+800040d4:	ffff                	0xffff
+800040d6:	7fff                	0x7fff
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	0000                	unimp
+
+800040e0 <test_16_data>:
+800040e0:	0001                	nop
+800040e2:	7f80                	flw	fs0,56(a5)
+800040e4:	0000                	unimp
+800040e6:	0000                	unimp
+800040e8:	0000                	unimp
+800040ea:	0000                	unimp
+800040ec:	0000                	unimp
+800040ee:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-v-fcmp.elf b/test/riscv-tests/rv32uf-v-fcmp.elf
new file mode 100644
index 0000000..e39a0cb
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcmp.elf
diff --git a/test/riscv-tests/rv32uf-v-fcvt.dump b/test/riscv-tests/rv32uf-v-fcvt.dump
new file mode 100644
index 0000000..0ca4fd8
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcvt.dump
@@ -0,0 +1,974 @@
+
+rv32uf-v-fcvt:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00000597          	auipc	a1,0x0
+800024cc:	7cc58593          	addi	a1,a1,1996 # 80002c94 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00000597          	auipc	a1,0x0
+8000253c:	7e858593          	addi	a1,a1,2024 # 80002d20 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00000597          	auipc	a1,0x0
+800025a8:	79458593          	addi	a1,a1,1940 # 80002d38 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00000597          	auipc	a1,0x0
+80002614:	6c858593          	addi	a1,a1,1736 # 80002cd8 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00000597          	auipc	a1,0x0
+8000274c:	6b858593          	addi	a1,a1,1720 # 80002e00 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	62058593          	addi	a1,a1,1568 # 80002ddc <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	51c60613          	addi	a2,a2,1308 # 80002e2c <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	42c60613          	addi	a2,a2,1068 # 80002da8 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	3ac60613          	addi	a2,a2,940 # 80002d74 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	03200793          	li	a5,50
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	072117b7          	lui	a5,0x7211
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	20978793          	addi	a5,a5,521 # 7211209 <_start-0x78deedf7>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00000517          	auipc	a0,0x0
+80002bec:	41850513          	addi	a0,a0,1048 # 80003000 <test_2_data>
+80002bf0:	00052683          	lw	a3,0(a0)
+80002bf4:	00200513          	li	a0,2
+80002bf8:	d0057053          	fcvt.s.w	ft0,a0
+80002bfc:	00101073          	fsflags	zero
+80002c00:	e0000553          	fmv.x.w	a0,ft0
+80002c04:	06d51a63          	bne	a0,a3,80002c78 <fail>
+
+80002c08 <test_3>:
+80002c08:	00300193          	li	gp,3
+80002c0c:	00000517          	auipc	a0,0x0
+80002c10:	3f850513          	addi	a0,a0,1016 # 80003004 <test_3_data>
+80002c14:	00052683          	lw	a3,0(a0)
+80002c18:	ffe00513          	li	a0,-2
+80002c1c:	d0057053          	fcvt.s.w	ft0,a0
+80002c20:	00101073          	fsflags	zero
+80002c24:	e0000553          	fmv.x.w	a0,ft0
+80002c28:	04d51863          	bne	a0,a3,80002c78 <fail>
+
+80002c2c <test_4>:
+80002c2c:	00400193          	li	gp,4
+80002c30:	00000517          	auipc	a0,0x0
+80002c34:	3d850513          	addi	a0,a0,984 # 80003008 <test_4_data>
+80002c38:	00052683          	lw	a3,0(a0)
+80002c3c:	00200513          	li	a0,2
+80002c40:	d0157053          	fcvt.s.wu	ft0,a0
+80002c44:	00101073          	fsflags	zero
+80002c48:	e0000553          	fmv.x.w	a0,ft0
+80002c4c:	02d51663          	bne	a0,a3,80002c78 <fail>
+
+80002c50 <test_5>:
+80002c50:	00500193          	li	gp,5
+80002c54:	00000517          	auipc	a0,0x0
+80002c58:	3b850513          	addi	a0,a0,952 # 8000300c <test_5_data>
+80002c5c:	00052683          	lw	a3,0(a0)
+80002c60:	ffe00513          	li	a0,-2
+80002c64:	d0157053          	fcvt.s.wu	ft0,a0
+80002c68:	00101073          	fsflags	zero
+80002c6c:	e0000553          	fmv.x.w	a0,ft0
+80002c70:	00d51463          	bne	a0,a3,80002c78 <fail>
+80002c74:	00301a63          	bne	zero,gp,80002c88 <pass>
+
+80002c78 <fail>:
+80002c78:	00119513          	slli	a0,gp,0x1
+80002c7c:	00050063          	beqz	a0,80002c7c <fail+0x4>
+80002c80:	00156513          	ori	a0,a0,1
+80002c84:	00000073          	ecall
+
+80002c88 <pass>:
+80002c88:	00100513          	li	a0,1
+80002c8c:	00000073          	ecall
+80002c90:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	0000                	unimp
+80003002:	4000                	lw	s0,0(s0)
+
+80003004 <test_3_data>:
+80003004:	0000                	unimp
+80003006:	c000                	sw	s0,0(s0)
+
+80003008 <test_4_data>:
+80003008:	0000                	unimp
+8000300a:	4000                	lw	s0,0(s0)
+
+8000300c <test_5_data>:
+8000300c:	0000                	unimp
+8000300e:	4f80                	lw	s0,24(a5)
diff --git a/test/riscv-tests/rv32uf-v-fcvt.elf b/test/riscv-tests/rv32uf-v-fcvt.elf
new file mode 100644
index 0000000..949a1df
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcvt.elf
diff --git a/test/riscv-tests/rv32uf-v-fcvt_w.dump b/test/riscv-tests/rv32uf-v-fcvt_w.dump
new file mode 100644
index 0000000..4a3e864
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcvt_w.dump
@@ -0,0 +1,1401 @@
+
+rv32uf-v-fcvt_w:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	b2858593          	addi	a1,a1,-1240 # 80002ff0 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	b4458593          	addi	a1,a1,-1212 # 8000307c <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	af058593          	addi	a1,a1,-1296 # 80003094 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	a2458593          	addi	a1,a1,-1500 # 80003034 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	a1458593          	addi	a1,a1,-1516 # 8000315c <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	97c58593          	addi	a1,a1,-1668 # 80003138 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00001617          	auipc	a2,0x1
+80002914:	87860613          	addi	a2,a2,-1928 # 80003188 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	78860613          	addi	a2,a2,1928 # 80003104 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	70860613          	addi	a2,a2,1800 # 800030d0 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	03200793          	li	a5,50
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	020b57b7          	lui	a5,0x20b5
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	26e78793          	addi	a5,a5,622 # 20b526e <_start-0x7df4ad92>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c04:	001015f3          	fsflags	a1,zero
+80002c08:	00100613          	li	a2,1
+80002c0c:	3cd51463          	bne	a0,a3,80002fd4 <fail>
+80002c10:	3cc59263          	bne	a1,a2,80002fd4 <fail>
+
+80002c14 <test_3>:
+80002c14:	00300193          	li	gp,3
+80002c18:	00001517          	auipc	a0,0x1
+80002c1c:	3f850513          	addi	a0,a0,1016 # 80004010 <test_3_data>
+80002c20:	00052007          	flw	ft0,0(a0)
+80002c24:	00452087          	flw	ft1,4(a0)
+80002c28:	00852107          	flw	ft2,8(a0)
+80002c2c:	00c52683          	lw	a3,12(a0)
+80002c30:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c34:	001015f3          	fsflags	a1,zero
+80002c38:	00000613          	li	a2,0
+80002c3c:	38d51c63          	bne	a0,a3,80002fd4 <fail>
+80002c40:	38c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002c44 <test_4>:
+80002c44:	00400193          	li	gp,4
+80002c48:	00001517          	auipc	a0,0x1
+80002c4c:	3d850513          	addi	a0,a0,984 # 80004020 <test_4_data>
+80002c50:	00052007          	flw	ft0,0(a0)
+80002c54:	00452087          	flw	ft1,4(a0)
+80002c58:	00852107          	flw	ft2,8(a0)
+80002c5c:	00c52683          	lw	a3,12(a0)
+80002c60:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c64:	001015f3          	fsflags	a1,zero
+80002c68:	00100613          	li	a2,1
+80002c6c:	36d51463          	bne	a0,a3,80002fd4 <fail>
+80002c70:	36c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002c74 <test_5>:
+80002c74:	00500193          	li	gp,5
+80002c78:	00001517          	auipc	a0,0x1
+80002c7c:	3b850513          	addi	a0,a0,952 # 80004030 <test_5_data>
+80002c80:	00052007          	flw	ft0,0(a0)
+80002c84:	00452087          	flw	ft1,4(a0)
+80002c88:	00852107          	flw	ft2,8(a0)
+80002c8c:	00c52683          	lw	a3,12(a0)
+80002c90:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002c94:	001015f3          	fsflags	a1,zero
+80002c98:	00100613          	li	a2,1
+80002c9c:	32d51c63          	bne	a0,a3,80002fd4 <fail>
+80002ca0:	32c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002ca4 <test_6>:
+80002ca4:	00600193          	li	gp,6
+80002ca8:	00001517          	auipc	a0,0x1
+80002cac:	39850513          	addi	a0,a0,920 # 80004040 <test_6_data>
+80002cb0:	00052007          	flw	ft0,0(a0)
+80002cb4:	00452087          	flw	ft1,4(a0)
+80002cb8:	00852107          	flw	ft2,8(a0)
+80002cbc:	00c52683          	lw	a3,12(a0)
+80002cc0:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002cc4:	001015f3          	fsflags	a1,zero
+80002cc8:	00000613          	li	a2,0
+80002ccc:	30d51463          	bne	a0,a3,80002fd4 <fail>
+80002cd0:	30c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002cd4 <test_7>:
+80002cd4:	00700193          	li	gp,7
+80002cd8:	00001517          	auipc	a0,0x1
+80002cdc:	37850513          	addi	a0,a0,888 # 80004050 <test_7_data>
+80002ce0:	00052007          	flw	ft0,0(a0)
+80002ce4:	00452087          	flw	ft1,4(a0)
+80002ce8:	00852107          	flw	ft2,8(a0)
+80002cec:	00c52683          	lw	a3,12(a0)
+80002cf0:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002cf4:	001015f3          	fsflags	a1,zero
+80002cf8:	00100613          	li	a2,1
+80002cfc:	2cd51c63          	bne	a0,a3,80002fd4 <fail>
+80002d00:	2cc59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002d04 <test_8>:
+80002d04:	00800193          	li	gp,8
+80002d08:	00001517          	auipc	a0,0x1
+80002d0c:	35850513          	addi	a0,a0,856 # 80004060 <test_8_data>
+80002d10:	00052007          	flw	ft0,0(a0)
+80002d14:	00452087          	flw	ft1,4(a0)
+80002d18:	00852107          	flw	ft2,8(a0)
+80002d1c:	00c52683          	lw	a3,12(a0)
+80002d20:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002d24:	001015f3          	fsflags	a1,zero
+80002d28:	01000613          	li	a2,16
+80002d2c:	2ad51463          	bne	a0,a3,80002fd4 <fail>
+80002d30:	2ac59263          	bne	a1,a2,80002fd4 <fail>
+
+80002d34 <test_9>:
+80002d34:	00900193          	li	gp,9
+80002d38:	00001517          	auipc	a0,0x1
+80002d3c:	33850513          	addi	a0,a0,824 # 80004070 <test_9_data>
+80002d40:	00052007          	flw	ft0,0(a0)
+80002d44:	00452087          	flw	ft1,4(a0)
+80002d48:	00852107          	flw	ft2,8(a0)
+80002d4c:	00c52683          	lw	a3,12(a0)
+80002d50:	c0001553          	fcvt.w.s	a0,ft0,rtz
+80002d54:	001015f3          	fsflags	a1,zero
+80002d58:	01000613          	li	a2,16
+80002d5c:	26d51c63          	bne	a0,a3,80002fd4 <fail>
+80002d60:	26c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002d64 <test_12>:
+80002d64:	00c00193          	li	gp,12
+80002d68:	00001517          	auipc	a0,0x1
+80002d6c:	31850513          	addi	a0,a0,792 # 80004080 <test_12_data>
+80002d70:	00052007          	flw	ft0,0(a0)
+80002d74:	00452087          	flw	ft1,4(a0)
+80002d78:	00852107          	flw	ft2,8(a0)
+80002d7c:	00c52683          	lw	a3,12(a0)
+80002d80:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002d84:	001015f3          	fsflags	a1,zero
+80002d88:	01000613          	li	a2,16
+80002d8c:	24d51463          	bne	a0,a3,80002fd4 <fail>
+80002d90:	24c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002d94 <test_13>:
+80002d94:	00d00193          	li	gp,13
+80002d98:	00001517          	auipc	a0,0x1
+80002d9c:	2f850513          	addi	a0,a0,760 # 80004090 <test_13_data>
+80002da0:	00052007          	flw	ft0,0(a0)
+80002da4:	00452087          	flw	ft1,4(a0)
+80002da8:	00852107          	flw	ft2,8(a0)
+80002dac:	00c52683          	lw	a3,12(a0)
+80002db0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002db4:	001015f3          	fsflags	a1,zero
+80002db8:	01000613          	li	a2,16
+80002dbc:	20d51c63          	bne	a0,a3,80002fd4 <fail>
+80002dc0:	20c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002dc4 <test_14>:
+80002dc4:	00e00193          	li	gp,14
+80002dc8:	00001517          	auipc	a0,0x1
+80002dcc:	2d850513          	addi	a0,a0,728 # 800040a0 <test_14_data>
+80002dd0:	00052007          	flw	ft0,0(a0)
+80002dd4:	00452087          	flw	ft1,4(a0)
+80002dd8:	00852107          	flw	ft2,8(a0)
+80002ddc:	00c52683          	lw	a3,12(a0)
+80002de0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002de4:	001015f3          	fsflags	a1,zero
+80002de8:	00100613          	li	a2,1
+80002dec:	1ed51463          	bne	a0,a3,80002fd4 <fail>
+80002df0:	1ec59263          	bne	a1,a2,80002fd4 <fail>
+
+80002df4 <test_15>:
+80002df4:	00f00193          	li	gp,15
+80002df8:	00001517          	auipc	a0,0x1
+80002dfc:	2b850513          	addi	a0,a0,696 # 800040b0 <test_15_data>
+80002e00:	00052007          	flw	ft0,0(a0)
+80002e04:	00452087          	flw	ft1,4(a0)
+80002e08:	00852107          	flw	ft2,8(a0)
+80002e0c:	00c52683          	lw	a3,12(a0)
+80002e10:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e14:	001015f3          	fsflags	a1,zero
+80002e18:	00100613          	li	a2,1
+80002e1c:	1ad51c63          	bne	a0,a3,80002fd4 <fail>
+80002e20:	1ac59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002e24 <test_16>:
+80002e24:	01000193          	li	gp,16
+80002e28:	00001517          	auipc	a0,0x1
+80002e2c:	29850513          	addi	a0,a0,664 # 800040c0 <test_16_data>
+80002e30:	00052007          	flw	ft0,0(a0)
+80002e34:	00452087          	flw	ft1,4(a0)
+80002e38:	00852107          	flw	ft2,8(a0)
+80002e3c:	00c52683          	lw	a3,12(a0)
+80002e40:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e44:	001015f3          	fsflags	a1,zero
+80002e48:	00000613          	li	a2,0
+80002e4c:	18d51463          	bne	a0,a3,80002fd4 <fail>
+80002e50:	18c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002e54 <test_17>:
+80002e54:	01100193          	li	gp,17
+80002e58:	00001517          	auipc	a0,0x1
+80002e5c:	27850513          	addi	a0,a0,632 # 800040d0 <test_17_data>
+80002e60:	00052007          	flw	ft0,0(a0)
+80002e64:	00452087          	flw	ft1,4(a0)
+80002e68:	00852107          	flw	ft2,8(a0)
+80002e6c:	00c52683          	lw	a3,12(a0)
+80002e70:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002e74:	001015f3          	fsflags	a1,zero
+80002e78:	00100613          	li	a2,1
+80002e7c:	14d51c63          	bne	a0,a3,80002fd4 <fail>
+80002e80:	14c59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002e84 <test_18>:
+80002e84:	01200193          	li	gp,18
+80002e88:	00001517          	auipc	a0,0x1
+80002e8c:	25850513          	addi	a0,a0,600 # 800040e0 <test_18_data>
+80002e90:	00052007          	flw	ft0,0(a0)
+80002e94:	00452087          	flw	ft1,4(a0)
+80002e98:	00852107          	flw	ft2,8(a0)
+80002e9c:	00c52683          	lw	a3,12(a0)
+80002ea0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002ea4:	001015f3          	fsflags	a1,zero
+80002ea8:	01000613          	li	a2,16
+80002eac:	12d51463          	bne	a0,a3,80002fd4 <fail>
+80002eb0:	12c59263          	bne	a1,a2,80002fd4 <fail>
+
+80002eb4 <test_19>:
+80002eb4:	01300193          	li	gp,19
+80002eb8:	00001517          	auipc	a0,0x1
+80002ebc:	23850513          	addi	a0,a0,568 # 800040f0 <test_19_data>
+80002ec0:	00052007          	flw	ft0,0(a0)
+80002ec4:	00452087          	flw	ft1,4(a0)
+80002ec8:	00852107          	flw	ft2,8(a0)
+80002ecc:	00c52683          	lw	a3,12(a0)
+80002ed0:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+80002ed4:	001015f3          	fsflags	a1,zero
+80002ed8:	00000613          	li	a2,0
+80002edc:	0ed51c63          	bne	a0,a3,80002fd4 <fail>
+80002ee0:	0ec59a63          	bne	a1,a2,80002fd4 <fail>
+
+80002ee4 <test_42>:
+80002ee4:	00001097          	auipc	ra,0x1
+80002ee8:	21c08093          	addi	ra,ra,540 # 80004100 <begin_signature>
+80002eec:	0000a087          	flw	ft1,0(ra)
+80002ef0:	c000f0d3          	fcvt.w.s	ra,ft1
+80002ef4:	80000eb7          	lui	t4,0x80000
+80002ef8:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002efc:	02a00193          	li	gp,42
+80002f00:	0dd09a63          	bne	ra,t4,80002fd4 <fail>
+
+80002f04 <test_44>:
+80002f04:	00001097          	auipc	ra,0x1
+80002f08:	1fc08093          	addi	ra,ra,508 # 80004100 <begin_signature>
+80002f0c:	0080a087          	flw	ft1,8(ra)
+80002f10:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f14:	80000eb7          	lui	t4,0x80000
+80002f18:	02c00193          	li	gp,44
+80002f1c:	0bd09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f20 <test_52>:
+80002f20:	00001097          	auipc	ra,0x1
+80002f24:	1e008093          	addi	ra,ra,480 # 80004100 <begin_signature>
+80002f28:	0040a087          	flw	ft1,4(ra)
+80002f2c:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f30:	80000eb7          	lui	t4,0x80000
+80002f34:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002f38:	03400193          	li	gp,52
+80002f3c:	09d09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f40 <test_54>:
+80002f40:	00001097          	auipc	ra,0x1
+80002f44:	1c008093          	addi	ra,ra,448 # 80004100 <begin_signature>
+80002f48:	00c0a087          	flw	ft1,12(ra)
+80002f4c:	c000f0d3          	fcvt.w.s	ra,ft1
+80002f50:	80000eb7          	lui	t4,0x80000
+80002f54:	fffe8e93          	addi	t4,t4,-1 # 7fffffff <_end+0xffff8c07>
+80002f58:	03600193          	li	gp,54
+80002f5c:	07d09c63          	bne	ra,t4,80002fd4 <fail>
+
+80002f60 <test_62>:
+80002f60:	00001097          	auipc	ra,0x1
+80002f64:	1a008093          	addi	ra,ra,416 # 80004100 <begin_signature>
+80002f68:	0000a087          	flw	ft1,0(ra)
+80002f6c:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002f70:	fff00e93          	li	t4,-1
+80002f74:	03e00193          	li	gp,62
+80002f78:	05d09e63          	bne	ra,t4,80002fd4 <fail>
+
+80002f7c <test_63>:
+80002f7c:	00001097          	auipc	ra,0x1
+80002f80:	18408093          	addi	ra,ra,388 # 80004100 <begin_signature>
+80002f84:	0040a087          	flw	ft1,4(ra)
+80002f88:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002f8c:	fff00e93          	li	t4,-1
+80002f90:	03f00193          	li	gp,63
+80002f94:	05d09063          	bne	ra,t4,80002fd4 <fail>
+
+80002f98 <test_64>:
+80002f98:	00001097          	auipc	ra,0x1
+80002f9c:	16808093          	addi	ra,ra,360 # 80004100 <begin_signature>
+80002fa0:	0080a087          	flw	ft1,8(ra)
+80002fa4:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002fa8:	00000e93          	li	t4,0
+80002fac:	04000193          	li	gp,64
+80002fb0:	03d09263          	bne	ra,t4,80002fd4 <fail>
+
+80002fb4 <test_65>:
+80002fb4:	00001097          	auipc	ra,0x1
+80002fb8:	14c08093          	addi	ra,ra,332 # 80004100 <begin_signature>
+80002fbc:	00c0a087          	flw	ft1,12(ra)
+80002fc0:	c010f0d3          	fcvt.wu.s	ra,ft1
+80002fc4:	fff00e93          	li	t4,-1
+80002fc8:	04100193          	li	gp,65
+80002fcc:	01d09463          	bne	ra,t4,80002fd4 <fail>
+80002fd0:	00301a63          	bne	zero,gp,80002fe4 <pass>
+
+80002fd4 <fail>:
+80002fd4:	00119513          	slli	a0,gp,0x1
+80002fd8:	00050063          	beqz	a0,80002fd8 <fail+0x4>
+80002fdc:	00156513          	ori	a0,a0,1
+80002fe0:	00000073          	ecall
+
+80002fe4 <pass>:
+80002fe4:	00100513          	li	a0,1
+80002fe8:	00000073          	ecall
+80002fec:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	cccd                	beqz	s1,800040ba <test_15_data+0xa>
+80004002:	bf8c                	fsd	fa1,56(a5)
+80004004:	0000                	unimp
+80004006:	0000                	unimp
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	ffff                	0xffff
+8000400e:	ffff                	0xffff
+
+80004010 <test_3_data>:
+80004010:	0000                	unimp
+80004012:	bf80                	fsd	fs0,56(a5)
+80004014:	0000                	unimp
+80004016:	0000                	unimp
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	ffff                	0xffff
+8000401e:	ffff                	0xffff
+
+80004020 <test_4_data>:
+80004020:	6666                	flw	fa2,88(sp)
+80004022:	bf66                	fsd	fs9,440(sp)
+80004024:	0000                	unimp
+80004026:	0000                	unimp
+80004028:	0000                	unimp
+8000402a:	0000                	unimp
+8000402c:	0000                	unimp
+8000402e:	0000                	unimp
+
+80004030 <test_5_data>:
+80004030:	6666                	flw	fa2,88(sp)
+80004032:	3f66                	fld	ft10,120(sp)
+80004034:	0000                	unimp
+80004036:	0000                	unimp
+80004038:	0000                	unimp
+8000403a:	0000                	unimp
+8000403c:	0000                	unimp
+8000403e:	0000                	unimp
+
+80004040 <test_6_data>:
+80004040:	0000                	unimp
+80004042:	3f80                	fld	fs0,56(a5)
+80004044:	0000                	unimp
+80004046:	0000                	unimp
+80004048:	0000                	unimp
+8000404a:	0000                	unimp
+8000404c:	0001                	nop
+8000404e:	0000                	unimp
+
+80004050 <test_7_data>:
+80004050:	cccd                	beqz	s1,8000410a <begin_signature+0xa>
+80004052:	3f8c                	fld	fa1,56(a5)
+80004054:	0000                	unimp
+80004056:	0000                	unimp
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0001                	nop
+8000405e:	0000                	unimp
+
+80004060 <test_8_data>:
+80004060:	d05e                	sw	s7,32(sp)
+80004062:	cf32                	sw	a2,156(sp)
+80004064:	0000                	unimp
+80004066:	0000                	unimp
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	8000                	0x8000
+
+80004070 <test_9_data>:
+80004070:	d05e                	sw	s7,32(sp)
+80004072:	4f32                	lw	t5,12(sp)
+80004074:	0000                	unimp
+80004076:	0000                	unimp
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	ffff                	0xffff
+8000407e:	7fff                	0x7fff
+
+80004080 <test_12_data>:
+80004080:	0000                	unimp
+80004082:	c040                	sw	s0,4(s0)
+80004084:	0000                	unimp
+80004086:	0000                	unimp
+80004088:	0000                	unimp
+8000408a:	0000                	unimp
+8000408c:	0000                	unimp
+8000408e:	0000                	unimp
+
+80004090 <test_13_data>:
+80004090:	0000                	unimp
+80004092:	bf80                	fsd	fs0,56(a5)
+80004094:	0000                	unimp
+80004096:	0000                	unimp
+80004098:	0000                	unimp
+8000409a:	0000                	unimp
+8000409c:	0000                	unimp
+8000409e:	0000                	unimp
+
+800040a0 <test_14_data>:
+800040a0:	6666                	flw	fa2,88(sp)
+800040a2:	bf66                	fsd	fs9,440(sp)
+800040a4:	0000                	unimp
+800040a6:	0000                	unimp
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	0000                	unimp
+800040ae:	0000                	unimp
+
+800040b0 <test_15_data>:
+800040b0:	6666                	flw	fa2,88(sp)
+800040b2:	3f66                	fld	ft10,120(sp)
+800040b4:	0000                	unimp
+800040b6:	0000                	unimp
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	0000                	unimp
+
+800040c0 <test_16_data>:
+800040c0:	0000                	unimp
+800040c2:	3f80                	fld	fs0,56(a5)
+800040c4:	0000                	unimp
+800040c6:	0000                	unimp
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0001                	nop
+800040ce:	0000                	unimp
+
+800040d0 <test_17_data>:
+800040d0:	cccd                	beqz	s1,8000418a <tdat_d+0x7a>
+800040d2:	3f8c                	fld	fa1,56(a5)
+800040d4:	0000                	unimp
+800040d6:	0000                	unimp
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0001                	nop
+800040de:	0000                	unimp
+
+800040e0 <test_18_data>:
+800040e0:	d05e                	sw	s7,32(sp)
+800040e2:	cf32                	sw	a2,156(sp)
+800040e4:	0000                	unimp
+800040e6:	0000                	unimp
+800040e8:	0000                	unimp
+800040ea:	0000                	unimp
+800040ec:	0000                	unimp
+800040ee:	0000                	unimp
+
+800040f0 <test_19_data>:
+800040f0:	d05e                	sw	s7,32(sp)
+800040f2:	4f32                	lw	t5,12(sp)
+800040f4:	0000                	unimp
+800040f6:	0000                	unimp
+800040f8:	0000                	unimp
+800040fa:	0000                	unimp
+800040fc:	5e00                	lw	s0,56(a2)
+800040fe:	b2d0                	fsd	fa2,160(a3)
+
+80004100 <begin_signature>:
+80004100:	ffff                	0xffff
+80004102:	ffff                	0xffff
+80004104:	ffff                	0xffff
+80004106:	7fff                	0x7fff
+80004108:	0000                	unimp
+8000410a:	ff80                	fsw	fs0,56(a5)
+8000410c:	0000                	unimp
+8000410e:	7f80                	flw	fs0,56(a5)
+
+80004110 <tdat_d>:
+80004110:	ffff                	0xffff
+80004112:	ffff                	0xffff
+80004114:	ffff                	0xffff
+80004116:	ffff                	0xffff
+80004118:	ffff                	0xffff
+8000411a:	ffff                	0xffff
+8000411c:	ffff                	0xffff
+8000411e:	7fff                	0x7fff
+80004120:	0000                	unimp
+80004122:	0000                	unimp
+80004124:	0000                	unimp
+80004126:	fff0                	fsw	fa2,124(a5)
+80004128:	0000                	unimp
+8000412a:	0000                	unimp
+8000412c:	0000                	unimp
+8000412e:	7ff0                	flw	fa2,124(a5)
diff --git a/test/riscv-tests/rv32uf-v-fcvt_w.elf b/test/riscv-tests/rv32uf-v-fcvt_w.elf
new file mode 100644
index 0000000..f034d02
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fcvt_w.elf
diff --git a/test/riscv-tests/rv32uf-v-fdiv.dump b/test/riscv-tests/rv32uf-v-fdiv.dump
new file mode 100644
index 0000000..cfdccc0
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fdiv.dump
@@ -0,0 +1,1091 @@
+
+rv32uf-v-fdiv:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00007117          	auipc	sp,0x7
+8000001c:	35010113          	addi	sp,sp,848 # 80007368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00002317          	auipc	t1,0x2
+80002370:	c9430313          	addi	t1,t1,-876 # 80004000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00004797          	auipc	a5,0x4
+8000238c:	06c78793          	addi	a5,a5,108 # 800063f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00004717          	auipc	a4,0x4
+800023a0:	05470713          	addi	a4,a4,84 # 800063f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00004697          	auipc	a3,0x4
+800023ac:	04f6a623          	sw	a5,76(a3) # 800063f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00004717          	auipc	a4,0x4
+800023dc:	e2070713          	addi	a4,a4,-480 # 800061f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf9c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00004797          	auipc	a5,0x4
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800063f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	8a858593          	addi	a1,a1,-1880 # 80002d70 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	8c458593          	addi	a1,a1,-1852 # 80002dfc <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	87058593          	addi	a1,a1,-1936 # 80002e14 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00000597          	auipc	a1,0x0
+80002614:	7a458593          	addi	a1,a1,1956 # 80002db4 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00000597          	auipc	a1,0x0
+8000274c:	79458593          	addi	a1,a1,1940 # 80002edc <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00000597          	auipc	a1,0x0
+800027c0:	6fc58593          	addi	a1,a1,1788 # 80002eb8 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00004b17          	auipc	s6,0x4
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800061f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00001d17          	auipc	s10,0x1
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80004000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00004717          	auipc	a4,0x4
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800063f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00004717          	auipc	a4,0x4
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800063f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00004717          	auipc	a4,0x4
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800063f0 <freelist_tail>
+80002900:	00004717          	auipc	a4,0x4
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800063f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	5f860613          	addi	a2,a2,1528 # 80002f08 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	50860613          	addi	a2,a2,1288 # 80002e84 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	48860613          	addi	a2,a2,1160 # 80002e50 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00002797          	auipc	a5,0x2
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80005000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00001697          	auipc	a3,0x1
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80004000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00001717          	auipc	a4,0x1
+80002a6c:	59870713          	addi	a4,a4,1432 # 80004000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00002697          	auipc	a3,0x2
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80004ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf9ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc03797          	auipc	a5,0x7fc03
+80002aec:	51878793          	addi	a5,a5,1304 # ffc06000 <_end+0x7fbffc08>
+80002af0:	00004717          	auipc	a4,0x4
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800063f4 <freelist_head>
+80002af8:	7fc03797          	auipc	a5,0x7fc03
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc061f0 <_end+0x7fbffdf8>
+80002b00:	00004717          	auipc	a4,0x4
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800063f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00003717          	auipc	a4,0x3
+80002b10:	4f470713          	addi	a4,a4,1268 # 80006000 <freelist_nodes>
+80002b14:	00003317          	auipc	t1,0x3
+80002b18:	6e430313          	addi	t1,t1,1764 # 800061f8 <user_mapping>
+80002b1c:	01000793          	li	a5,16
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00003797          	auipc	a5,0x3
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800061f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	036ca7b7          	lui	a5,0x36ca
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	f2a78793          	addi	a5,a5,-214 # 36c9f2a <_start-0x7c9360d6>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00000517          	auipc	a0,0x0
+80002bec:	41850513          	addi	a0,a0,1048 # 80003000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	181071d3          	fdiv.s	ft3,ft0,ft1
+80002c04:	e0018553          	fmv.x.w	a0,ft3
+80002c08:	001015f3          	fsflags	a1,zero
+80002c0c:	00100613          	li	a2,1
+80002c10:	14d51263          	bne	a0,a3,80002d54 <fail>
+80002c14:	14c59063          	bne	a1,a2,80002d54 <fail>
+
+80002c18 <test_3>:
+80002c18:	00300193          	li	gp,3
+80002c1c:	00000517          	auipc	a0,0x0
+80002c20:	3f450513          	addi	a0,a0,1012 # 80003010 <test_3_data>
+80002c24:	00052007          	flw	ft0,0(a0)
+80002c28:	00452087          	flw	ft1,4(a0)
+80002c2c:	00852107          	flw	ft2,8(a0)
+80002c30:	00c52683          	lw	a3,12(a0)
+80002c34:	181071d3          	fdiv.s	ft3,ft0,ft1
+80002c38:	e0018553          	fmv.x.w	a0,ft3
+80002c3c:	001015f3          	fsflags	a1,zero
+80002c40:	00100613          	li	a2,1
+80002c44:	10d51863          	bne	a0,a3,80002d54 <fail>
+80002c48:	10c59663          	bne	a1,a2,80002d54 <fail>
+
+80002c4c <test_4>:
+80002c4c:	00400193          	li	gp,4
+80002c50:	00000517          	auipc	a0,0x0
+80002c54:	3d050513          	addi	a0,a0,976 # 80003020 <test_4_data>
+80002c58:	00052007          	flw	ft0,0(a0)
+80002c5c:	00452087          	flw	ft1,4(a0)
+80002c60:	00852107          	flw	ft2,8(a0)
+80002c64:	00c52683          	lw	a3,12(a0)
+80002c68:	181071d3          	fdiv.s	ft3,ft0,ft1
+80002c6c:	e0018553          	fmv.x.w	a0,ft3
+80002c70:	001015f3          	fsflags	a1,zero
+80002c74:	00000613          	li	a2,0
+80002c78:	0cd51e63          	bne	a0,a3,80002d54 <fail>
+80002c7c:	0cc59c63          	bne	a1,a2,80002d54 <fail>
+
+80002c80 <test_5>:
+80002c80:	00500193          	li	gp,5
+80002c84:	00000517          	auipc	a0,0x0
+80002c88:	3ac50513          	addi	a0,a0,940 # 80003030 <test_5_data>
+80002c8c:	00052007          	flw	ft0,0(a0)
+80002c90:	00452087          	flw	ft1,4(a0)
+80002c94:	00852107          	flw	ft2,8(a0)
+80002c98:	00c52683          	lw	a3,12(a0)
+80002c9c:	580071d3          	fsqrt.s	ft3,ft0
+80002ca0:	e0018553          	fmv.x.w	a0,ft3
+80002ca4:	001015f3          	fsflags	a1,zero
+80002ca8:	00100613          	li	a2,1
+80002cac:	0ad51463          	bne	a0,a3,80002d54 <fail>
+80002cb0:	0ac59263          	bne	a1,a2,80002d54 <fail>
+
+80002cb4 <test_6>:
+80002cb4:	00600193          	li	gp,6
+80002cb8:	00000517          	auipc	a0,0x0
+80002cbc:	38850513          	addi	a0,a0,904 # 80003040 <test_6_data>
+80002cc0:	00052007          	flw	ft0,0(a0)
+80002cc4:	00452087          	flw	ft1,4(a0)
+80002cc8:	00852107          	flw	ft2,8(a0)
+80002ccc:	00c52683          	lw	a3,12(a0)
+80002cd0:	580071d3          	fsqrt.s	ft3,ft0
+80002cd4:	e0018553          	fmv.x.w	a0,ft3
+80002cd8:	001015f3          	fsflags	a1,zero
+80002cdc:	00000613          	li	a2,0
+80002ce0:	06d51a63          	bne	a0,a3,80002d54 <fail>
+80002ce4:	06c59863          	bne	a1,a2,80002d54 <fail>
+
+80002ce8 <test_7>:
+80002ce8:	00700193          	li	gp,7
+80002cec:	00000517          	auipc	a0,0x0
+80002cf0:	36450513          	addi	a0,a0,868 # 80003050 <test_7_data>
+80002cf4:	00052007          	flw	ft0,0(a0)
+80002cf8:	00452087          	flw	ft1,4(a0)
+80002cfc:	00852107          	flw	ft2,8(a0)
+80002d00:	00c52683          	lw	a3,12(a0)
+80002d04:	580071d3          	fsqrt.s	ft3,ft0
+80002d08:	e0018553          	fmv.x.w	a0,ft3
+80002d0c:	001015f3          	fsflags	a1,zero
+80002d10:	01000613          	li	a2,16
+80002d14:	04d51063          	bne	a0,a3,80002d54 <fail>
+80002d18:	02c59e63          	bne	a1,a2,80002d54 <fail>
+
+80002d1c <test_8>:
+80002d1c:	00800193          	li	gp,8
+80002d20:	00000517          	auipc	a0,0x0
+80002d24:	34450513          	addi	a0,a0,836 # 80003064 <test_8_data>
+80002d28:	00052007          	flw	ft0,0(a0)
+80002d2c:	00452087          	flw	ft1,4(a0)
+80002d30:	00852107          	flw	ft2,8(a0)
+80002d34:	00c52683          	lw	a3,12(a0)
+80002d38:	580071d3          	fsqrt.s	ft3,ft0
+80002d3c:	e0018553          	fmv.x.w	a0,ft3
+80002d40:	001015f3          	fsflags	a1,zero
+80002d44:	00100613          	li	a2,1
+80002d48:	00d51663          	bne	a0,a3,80002d54 <fail>
+80002d4c:	00c59463          	bne	a1,a2,80002d54 <fail>
+80002d50:	00301a63          	bne	zero,gp,80002d64 <pass>
+
+80002d54 <fail>:
+80002d54:	00119513          	slli	a0,gp,0x1
+80002d58:	00050063          	beqz	a0,80002d58 <fail+0x4>
+80002d5c:	00156513          	ori	a0,a0,1
+80002d60:	00000073          	ecall
+
+80002d64 <pass>:
+80002d64:	00100513          	li	a0,1
+80002d68:	00000073          	ecall
+80002d6c:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80003000 <test_2_data>:
+80003000:	40490fdb          	0x40490fdb
+80003004:	f854                	fsw	fa3,52(s0)
+80003006:	402d                	c.li	zero,11
+80003008:	0000                	unimp
+8000300a:	0000                	unimp
+8000300c:	eee0                	fsw	fs0,92(a3)
+8000300e:	          	sltiu	t6,zero,1024
+
+80003010 <test_3_data>:
+80003010:	4000                	lw	s0,0(s0)
+80003012:	c49a                	sw	t1,72(sp)
+80003014:	449a6333          	0x449a6333
+80003018:	0000                	unimp
+8000301a:	0000                	unimp
+8000301c:	c5a2                	sw	s0,200(sp)
+8000301e:	bf7f                	0xbf7f
+
+80003020 <test_4_data>:
+80003020:	40490fdb          	0x40490fdb
+80003024:	0000                	unimp
+80003026:	3f80                	fld	fs0,56(a5)
+80003028:	0000                	unimp
+8000302a:	0000                	unimp
+8000302c:	40490fdb          	0x40490fdb
+
+80003030 <test_5_data>:
+80003030:	40490fdb          	0x40490fdb
+80003034:	0000                	unimp
+80003036:	0000                	unimp
+80003038:	0000                	unimp
+8000303a:	0000                	unimp
+8000303c:	dfc5                	beqz	a5,80002ff4 <pass+0x290>
+8000303e:	3fe2                	fld	ft11,56(sp)
+
+80003040 <test_6_data>:
+80003040:	4000                	lw	s0,0(s0)
+80003042:	461c                	lw	a5,8(a2)
+80003044:	0000                	unimp
+80003046:	0000                	unimp
+80003048:	0000                	unimp
+8000304a:	0000                	unimp
+8000304c:	0000                	unimp
+8000304e:	42c8                	lw	a0,4(a3)
+
+80003050 <test_7_data>:
+80003050:	0000                	unimp
+80003052:	bf80                	fsd	fs0,56(a5)
+80003054:	0000                	unimp
+80003056:	0000                	unimp
+80003058:	0000                	unimp
+8000305a:	0000                	unimp
+8000305c:	0000                	unimp
+8000305e:	7fc0                	flw	fs0,60(a5)
+80003060:	0000                	unimp
+80003062:	0000                	unimp
+
+80003064 <test_8_data>:
+80003064:	0000                	unimp
+80003066:	0000432b          	0x432b
+8000306a:	0000                	unimp
+8000306c:	0000                	unimp
+8000306e:	0000                	unimp
+80003070:	3a26                	fld	fs4,104(sp)
+80003072:	4151                	li	sp,20
+80003074:	0000                	unimp
+80003076:	0000                	unimp
+80003078:	0000                	unimp
+8000307a:	0000                	unimp
+8000307c:	0000                	unimp
+8000307e:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-v-fdiv.elf b/test/riscv-tests/rv32uf-v-fdiv.elf
new file mode 100644
index 0000000..812ab3d
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fdiv.elf
diff --git a/test/riscv-tests/rv32uf-v-fmadd.dump b/test/riscv-tests/rv32uf-v-fmadd.dump
new file mode 100644
index 0000000..438ef1b
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fmadd.dump
@@ -0,0 +1,1210 @@
+
+rv32uf-v-fmadd:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	9ac58593          	addi	a1,a1,-1620 # 80002e74 <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	9c858593          	addi	a1,a1,-1592 # 80002f00 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	97458593          	addi	a1,a1,-1676 # 80002f18 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	8a858593          	addi	a1,a1,-1880 # 80002eb8 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	89858593          	addi	a1,a1,-1896 # 80002fe0 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	80058593          	addi	a1,a1,-2048 # 80002fbc <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00000617          	auipc	a2,0x0
+80002914:	6fc60613          	addi	a2,a2,1788 # 8000300c <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	60c60613          	addi	a2,a2,1548 # 80002f88 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	58c60613          	addi	a2,a2,1420 # 80002f54 <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	00900793          	li	a5,9
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	0eae77b7          	lui	a5,0xeae7
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	51278793          	addi	a5,a5,1298 # eae7512 <_start-0x71518aee>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+80002c04:	e0018553          	fmv.x.w	a0,ft3
+80002c08:	001015f3          	fsflags	a1,zero
+80002c0c:	00000613          	li	a2,0
+80002c10:	24d51463          	bne	a0,a3,80002e58 <fail>
+80002c14:	24c59263          	bne	a1,a2,80002e58 <fail>
+
+80002c18 <test_3>:
+80002c18:	00300193          	li	gp,3
+80002c1c:	00001517          	auipc	a0,0x1
+80002c20:	3f450513          	addi	a0,a0,1012 # 80004010 <test_3_data>
+80002c24:	00052007          	flw	ft0,0(a0)
+80002c28:	00452087          	flw	ft1,4(a0)
+80002c2c:	00852107          	flw	ft2,8(a0)
+80002c30:	00c52683          	lw	a3,12(a0)
+80002c34:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+80002c38:	e0018553          	fmv.x.w	a0,ft3
+80002c3c:	001015f3          	fsflags	a1,zero
+80002c40:	00100613          	li	a2,1
+80002c44:	20d51a63          	bne	a0,a3,80002e58 <fail>
+80002c48:	20c59863          	bne	a1,a2,80002e58 <fail>
+
+80002c4c <test_4>:
+80002c4c:	00400193          	li	gp,4
+80002c50:	00001517          	auipc	a0,0x1
+80002c54:	3d050513          	addi	a0,a0,976 # 80004020 <test_4_data>
+80002c58:	00052007          	flw	ft0,0(a0)
+80002c5c:	00452087          	flw	ft1,4(a0)
+80002c60:	00852107          	flw	ft2,8(a0)
+80002c64:	00c52683          	lw	a3,12(a0)
+80002c68:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+80002c6c:	e0018553          	fmv.x.w	a0,ft3
+80002c70:	001015f3          	fsflags	a1,zero
+80002c74:	00000613          	li	a2,0
+80002c78:	1ed51063          	bne	a0,a3,80002e58 <fail>
+80002c7c:	1cc59e63          	bne	a1,a2,80002e58 <fail>
+
+80002c80 <test_5>:
+80002c80:	00500193          	li	gp,5
+80002c84:	00001517          	auipc	a0,0x1
+80002c88:	3ac50513          	addi	a0,a0,940 # 80004030 <test_5_data>
+80002c8c:	00052007          	flw	ft0,0(a0)
+80002c90:	00452087          	flw	ft1,4(a0)
+80002c94:	00852107          	flw	ft2,8(a0)
+80002c98:	00c52683          	lw	a3,12(a0)
+80002c9c:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+80002ca0:	e0018553          	fmv.x.w	a0,ft3
+80002ca4:	001015f3          	fsflags	a1,zero
+80002ca8:	00000613          	li	a2,0
+80002cac:	1ad51663          	bne	a0,a3,80002e58 <fail>
+80002cb0:	1ac59463          	bne	a1,a2,80002e58 <fail>
+
+80002cb4 <test_6>:
+80002cb4:	00600193          	li	gp,6
+80002cb8:	00001517          	auipc	a0,0x1
+80002cbc:	38850513          	addi	a0,a0,904 # 80004040 <test_6_data>
+80002cc0:	00052007          	flw	ft0,0(a0)
+80002cc4:	00452087          	flw	ft1,4(a0)
+80002cc8:	00852107          	flw	ft2,8(a0)
+80002ccc:	00c52683          	lw	a3,12(a0)
+80002cd0:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+80002cd4:	e0018553          	fmv.x.w	a0,ft3
+80002cd8:	001015f3          	fsflags	a1,zero
+80002cdc:	00100613          	li	a2,1
+80002ce0:	16d51c63          	bne	a0,a3,80002e58 <fail>
+80002ce4:	16c59a63          	bne	a1,a2,80002e58 <fail>
+
+80002ce8 <test_7>:
+80002ce8:	00700193          	li	gp,7
+80002cec:	00001517          	auipc	a0,0x1
+80002cf0:	36450513          	addi	a0,a0,868 # 80004050 <test_7_data>
+80002cf4:	00052007          	flw	ft0,0(a0)
+80002cf8:	00452087          	flw	ft1,4(a0)
+80002cfc:	00852107          	flw	ft2,8(a0)
+80002d00:	00c52683          	lw	a3,12(a0)
+80002d04:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+80002d08:	e0018553          	fmv.x.w	a0,ft3
+80002d0c:	001015f3          	fsflags	a1,zero
+80002d10:	00000613          	li	a2,0
+80002d14:	14d51263          	bne	a0,a3,80002e58 <fail>
+80002d18:	14c59063          	bne	a1,a2,80002e58 <fail>
+
+80002d1c <test_8>:
+80002d1c:	00800193          	li	gp,8
+80002d20:	00001517          	auipc	a0,0x1
+80002d24:	34050513          	addi	a0,a0,832 # 80004060 <test_8_data>
+80002d28:	00052007          	flw	ft0,0(a0)
+80002d2c:	00452087          	flw	ft1,4(a0)
+80002d30:	00852107          	flw	ft2,8(a0)
+80002d34:	00c52683          	lw	a3,12(a0)
+80002d38:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+80002d3c:	e0018553          	fmv.x.w	a0,ft3
+80002d40:	001015f3          	fsflags	a1,zero
+80002d44:	00000613          	li	a2,0
+80002d48:	10d51863          	bne	a0,a3,80002e58 <fail>
+80002d4c:	10c59663          	bne	a1,a2,80002e58 <fail>
+
+80002d50 <test_9>:
+80002d50:	00900193          	li	gp,9
+80002d54:	00001517          	auipc	a0,0x1
+80002d58:	31c50513          	addi	a0,a0,796 # 80004070 <test_9_data>
+80002d5c:	00052007          	flw	ft0,0(a0)
+80002d60:	00452087          	flw	ft1,4(a0)
+80002d64:	00852107          	flw	ft2,8(a0)
+80002d68:	00c52683          	lw	a3,12(a0)
+80002d6c:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+80002d70:	e0018553          	fmv.x.w	a0,ft3
+80002d74:	001015f3          	fsflags	a1,zero
+80002d78:	00100613          	li	a2,1
+80002d7c:	0cd51e63          	bne	a0,a3,80002e58 <fail>
+80002d80:	0cc59c63          	bne	a1,a2,80002e58 <fail>
+
+80002d84 <test_10>:
+80002d84:	00a00193          	li	gp,10
+80002d88:	00001517          	auipc	a0,0x1
+80002d8c:	2f850513          	addi	a0,a0,760 # 80004080 <test_10_data>
+80002d90:	00052007          	flw	ft0,0(a0)
+80002d94:	00452087          	flw	ft1,4(a0)
+80002d98:	00852107          	flw	ft2,8(a0)
+80002d9c:	00c52683          	lw	a3,12(a0)
+80002da0:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+80002da4:	e0018553          	fmv.x.w	a0,ft3
+80002da8:	001015f3          	fsflags	a1,zero
+80002dac:	00000613          	li	a2,0
+80002db0:	0ad51463          	bne	a0,a3,80002e58 <fail>
+80002db4:	0ac59263          	bne	a1,a2,80002e58 <fail>
+
+80002db8 <test_11>:
+80002db8:	00b00193          	li	gp,11
+80002dbc:	00001517          	auipc	a0,0x1
+80002dc0:	2d450513          	addi	a0,a0,724 # 80004090 <test_11_data>
+80002dc4:	00052007          	flw	ft0,0(a0)
+80002dc8:	00452087          	flw	ft1,4(a0)
+80002dcc:	00852107          	flw	ft2,8(a0)
+80002dd0:	00c52683          	lw	a3,12(a0)
+80002dd4:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+80002dd8:	e0018553          	fmv.x.w	a0,ft3
+80002ddc:	001015f3          	fsflags	a1,zero
+80002de0:	00000613          	li	a2,0
+80002de4:	06d51a63          	bne	a0,a3,80002e58 <fail>
+80002de8:	06c59863          	bne	a1,a2,80002e58 <fail>
+
+80002dec <test_12>:
+80002dec:	00c00193          	li	gp,12
+80002df0:	00001517          	auipc	a0,0x1
+80002df4:	2b050513          	addi	a0,a0,688 # 800040a0 <test_12_data>
+80002df8:	00052007          	flw	ft0,0(a0)
+80002dfc:	00452087          	flw	ft1,4(a0)
+80002e00:	00852107          	flw	ft2,8(a0)
+80002e04:	00c52683          	lw	a3,12(a0)
+80002e08:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+80002e0c:	e0018553          	fmv.x.w	a0,ft3
+80002e10:	001015f3          	fsflags	a1,zero
+80002e14:	00100613          	li	a2,1
+80002e18:	04d51063          	bne	a0,a3,80002e58 <fail>
+80002e1c:	02c59e63          	bne	a1,a2,80002e58 <fail>
+
+80002e20 <test_13>:
+80002e20:	00d00193          	li	gp,13
+80002e24:	00001517          	auipc	a0,0x1
+80002e28:	28c50513          	addi	a0,a0,652 # 800040b0 <test_13_data>
+80002e2c:	00052007          	flw	ft0,0(a0)
+80002e30:	00452087          	flw	ft1,4(a0)
+80002e34:	00852107          	flw	ft2,8(a0)
+80002e38:	00c52683          	lw	a3,12(a0)
+80002e3c:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+80002e40:	e0018553          	fmv.x.w	a0,ft3
+80002e44:	001015f3          	fsflags	a1,zero
+80002e48:	00000613          	li	a2,0
+80002e4c:	00d51663          	bne	a0,a3,80002e58 <fail>
+80002e50:	00c59463          	bne	a1,a2,80002e58 <fail>
+80002e54:	00301a63          	bne	zero,gp,80002e68 <pass>
+
+80002e58 <fail>:
+80002e58:	00119513          	slli	a0,gp,0x1
+80002e5c:	00050063          	beqz	a0,80002e5c <fail+0x4>
+80002e60:	00156513          	ori	a0,a0,1
+80002e64:	00000073          	ecall
+
+80002e68 <pass>:
+80002e68:	00100513          	li	a0,1
+80002e6c:	00000073          	ecall
+80002e70:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	0000                	unimp
+80004002:	3f80                	fld	fs0,56(a5)
+80004004:	0000                	unimp
+80004006:	4020                	lw	s0,64(s0)
+80004008:	0000                	unimp
+8000400a:	3f80                	fld	fs0,56(a5)
+8000400c:	0000                	unimp
+8000400e:	4060                	lw	s0,68(s0)
+
+80004010 <test_3_data>:
+80004010:	0000                	unimp
+80004012:	bf80                	fsd	fs0,56(a5)
+80004014:	c49a6333          	0xc49a6333
+80004018:	cccd                	beqz	s1,800040d2 <begin_signature+0x12>
+8000401a:	3f8c                	fld	fa1,56(a5)
+8000401c:	8666                	mv	a2,s9
+8000401e:	449a                	lw	s1,132(sp)
+
+80004020 <test_4_data>:
+80004020:	0000                	unimp
+80004022:	4000                	lw	s0,0(s0)
+80004024:	0000                	unimp
+80004026:	c0a0                	sw	s0,64(s1)
+80004028:	0000                	unimp
+8000402a:	c000                	sw	s0,0(s0)
+8000402c:	0000                	unimp
+8000402e:	c140                	sw	s0,4(a0)
+
+80004030 <test_5_data>:
+80004030:	0000                	unimp
+80004032:	3f80                	fld	fs0,56(a5)
+80004034:	0000                	unimp
+80004036:	4020                	lw	s0,64(s0)
+80004038:	0000                	unimp
+8000403a:	3f80                	fld	fs0,56(a5)
+8000403c:	0000                	unimp
+8000403e:	c060                	sw	s0,68(s0)
+
+80004040 <test_6_data>:
+80004040:	0000                	unimp
+80004042:	bf80                	fsd	fs0,56(a5)
+80004044:	c49a6333          	0xc49a6333
+80004048:	cccd                	beqz	s1,80004102 <begin_signature+0x42>
+8000404a:	3f8c                	fld	fa1,56(a5)
+8000404c:	8666                	mv	a2,s9
+8000404e:	c49a                	sw	t1,72(sp)
+
+80004050 <test_7_data>:
+80004050:	0000                	unimp
+80004052:	4000                	lw	s0,0(s0)
+80004054:	0000                	unimp
+80004056:	c0a0                	sw	s0,64(s1)
+80004058:	0000                	unimp
+8000405a:	c000                	sw	s0,0(s0)
+8000405c:	0000                	unimp
+8000405e:	4140                	lw	s0,4(a0)
+
+80004060 <test_8_data>:
+80004060:	0000                	unimp
+80004062:	3f80                	fld	fs0,56(a5)
+80004064:	0000                	unimp
+80004066:	4020                	lw	s0,64(s0)
+80004068:	0000                	unimp
+8000406a:	3f80                	fld	fs0,56(a5)
+8000406c:	0000                	unimp
+8000406e:	3fc0                	fld	fs0,184(a5)
+
+80004070 <test_9_data>:
+80004070:	0000                	unimp
+80004072:	bf80                	fsd	fs0,56(a5)
+80004074:	c49a6333          	0xc49a6333
+80004078:	cccd                	beqz	s1,80004132 <begin_signature+0x72>
+8000407a:	3f8c                	fld	fa1,56(a5)
+8000407c:	4000                	lw	s0,0(s0)
+8000407e:	449a                	lw	s1,132(sp)
+
+80004080 <test_10_data>:
+80004080:	0000                	unimp
+80004082:	4000                	lw	s0,0(s0)
+80004084:	0000                	unimp
+80004086:	c0a0                	sw	s0,64(s1)
+80004088:	0000                	unimp
+8000408a:	c000                	sw	s0,0(s0)
+8000408c:	0000                	unimp
+8000408e:	c100                	sw	s0,0(a0)
+
+80004090 <test_11_data>:
+80004090:	0000                	unimp
+80004092:	3f80                	fld	fs0,56(a5)
+80004094:	0000                	unimp
+80004096:	4020                	lw	s0,64(s0)
+80004098:	0000                	unimp
+8000409a:	3f80                	fld	fs0,56(a5)
+8000409c:	0000                	unimp
+8000409e:	bfc0                	fsd	fs0,184(a5)
+
+800040a0 <test_12_data>:
+800040a0:	0000                	unimp
+800040a2:	bf80                	fsd	fs0,56(a5)
+800040a4:	c49a6333          	0xc49a6333
+800040a8:	cccd                	beqz	s1,80004162 <begin_signature+0xa2>
+800040aa:	3f8c                	fld	fa1,56(a5)
+800040ac:	4000                	lw	s0,0(s0)
+800040ae:	c49a                	sw	t1,72(sp)
+
+800040b0 <test_13_data>:
+800040b0:	0000                	unimp
+800040b2:	4000                	lw	s0,0(s0)
+800040b4:	0000                	unimp
+800040b6:	c0a0                	sw	s0,64(s1)
+800040b8:	0000                	unimp
+800040ba:	c000                	sw	s0,0(s0)
+800040bc:	0000                	unimp
+800040be:	4100                	lw	s0,0(a0)
diff --git a/test/riscv-tests/rv32uf-v-fmadd.elf b/test/riscv-tests/rv32uf-v-fmadd.elf
new file mode 100644
index 0000000..160f48f
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fmadd.elf
diff --git a/test/riscv-tests/rv32uf-v-fmin.dump b/test/riscv-tests/rv32uf-v-fmin.dump
new file mode 100644
index 0000000..9b04ca2
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fmin.dump
@@ -0,0 +1,1348 @@
+
+rv32uf-v-fmin:     file format elf32-littleriscv
+
+
+Disassembly of section .text.init:
+
+80000000 <_start>:
+80000000:	00c0006f          	j	8000000c <handle_reset>
+
+80000004 <nmi_vector>:
+80000004:	2780206f          	j	8000227c <wtf>
+
+80000008 <trap_vector>:
+80000008:	2740206f          	j	8000227c <wtf>
+
+8000000c <handle_reset>:
+8000000c:	00000297          	auipc	t0,0x0
+80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+80000014:	30529073          	csrw	mtvec,t0
+80000018:	00008117          	auipc	sp,0x8
+8000001c:	35010113          	addi	sp,sp,848 # 80008368 <_end+0xf70>
+80000020:	f14022f3          	csrr	t0,mhartid
+80000024:	00c29293          	slli	t0,t0,0xc
+80000028:	00510133          	add	sp,sp,t0
+8000002c:	34011073          	csrw	mscratch,sp
+80000030:	00003517          	auipc	a0,0x3
+80000034:	bb050513          	addi	a0,a0,-1104 # 80002be0 <userstart>
+80000038:	2090206f          	j	80002a40 <vm_boot>
+
+8000003c <pop_tf>:
+8000003c:	08452283          	lw	t0,132(a0)
+80000040:	14129073          	csrw	sepc,t0
+80000044:	00452083          	lw	ra,4(a0)
+80000048:	00852103          	lw	sp,8(a0)
+8000004c:	00c52183          	lw	gp,12(a0)
+80000050:	01052203          	lw	tp,16(a0)
+80000054:	01452283          	lw	t0,20(a0)
+80000058:	01852303          	lw	t1,24(a0)
+8000005c:	01c52383          	lw	t2,28(a0)
+80000060:	02052403          	lw	s0,32(a0)
+80000064:	02452483          	lw	s1,36(a0)
+80000068:	02c52583          	lw	a1,44(a0)
+8000006c:	03052603          	lw	a2,48(a0)
+80000070:	03452683          	lw	a3,52(a0)
+80000074:	03852703          	lw	a4,56(a0)
+80000078:	03c52783          	lw	a5,60(a0)
+8000007c:	04052803          	lw	a6,64(a0)
+80000080:	04452883          	lw	a7,68(a0)
+80000084:	04852903          	lw	s2,72(a0)
+80000088:	04c52983          	lw	s3,76(a0)
+8000008c:	05052a03          	lw	s4,80(a0)
+80000090:	05452a83          	lw	s5,84(a0)
+80000094:	05852b03          	lw	s6,88(a0)
+80000098:	05c52b83          	lw	s7,92(a0)
+8000009c:	06052c03          	lw	s8,96(a0)
+800000a0:	06452c83          	lw	s9,100(a0)
+800000a4:	06852d03          	lw	s10,104(a0)
+800000a8:	06c52d83          	lw	s11,108(a0)
+800000ac:	07052e03          	lw	t3,112(a0)
+800000b0:	07452e83          	lw	t4,116(a0)
+800000b4:	07852f03          	lw	t5,120(a0)
+800000b8:	07c52f83          	lw	t6,124(a0)
+800000bc:	02852503          	lw	a0,40(a0)
+800000c0:	10200073          	sret
+
+800000c4 <trap_entry>:
+800000c4:	14011173          	csrrw	sp,sscratch,sp
+800000c8:	00112223          	sw	ra,4(sp)
+800000cc:	00312623          	sw	gp,12(sp)
+800000d0:	00412823          	sw	tp,16(sp)
+800000d4:	00512a23          	sw	t0,20(sp)
+800000d8:	00612c23          	sw	t1,24(sp)
+800000dc:	00712e23          	sw	t2,28(sp)
+800000e0:	02812023          	sw	s0,32(sp)
+800000e4:	02912223          	sw	s1,36(sp)
+800000e8:	02a12423          	sw	a0,40(sp)
+800000ec:	02b12623          	sw	a1,44(sp)
+800000f0:	02c12823          	sw	a2,48(sp)
+800000f4:	02d12a23          	sw	a3,52(sp)
+800000f8:	02e12c23          	sw	a4,56(sp)
+800000fc:	02f12e23          	sw	a5,60(sp)
+80000100:	05012023          	sw	a6,64(sp)
+80000104:	05112223          	sw	a7,68(sp)
+80000108:	05212423          	sw	s2,72(sp)
+8000010c:	05312623          	sw	s3,76(sp)
+80000110:	05412823          	sw	s4,80(sp)
+80000114:	05512a23          	sw	s5,84(sp)
+80000118:	05612c23          	sw	s6,88(sp)
+8000011c:	05712e23          	sw	s7,92(sp)
+80000120:	07812023          	sw	s8,96(sp)
+80000124:	07912223          	sw	s9,100(sp)
+80000128:	07a12423          	sw	s10,104(sp)
+8000012c:	07b12623          	sw	s11,108(sp)
+80000130:	07c12823          	sw	t3,112(sp)
+80000134:	07d12a23          	sw	t4,116(sp)
+80000138:	07e12c23          	sw	t5,120(sp)
+8000013c:	07f12e23          	sw	t6,124(sp)
+80000140:	140112f3          	csrrw	t0,sscratch,sp
+80000144:	00512423          	sw	t0,8(sp)
+80000148:	100022f3          	csrr	t0,sstatus
+8000014c:	08512023          	sw	t0,128(sp)
+80000150:	141022f3          	csrr	t0,sepc
+80000154:	08512223          	sw	t0,132(sp)
+80000158:	143022f3          	csrr	t0,stval
+8000015c:	08512423          	sw	t0,136(sp)
+80000160:	142022f3          	csrr	t0,scause
+80000164:	08512623          	sw	t0,140(sp)
+80000168:	00010513          	mv	a0,sp
+8000016c:	50c0206f          	j	80002678 <handle_trap>
+
+Disassembly of section .text:
+
+80002000 <memcpy>:
+80002000:	00c5e7b3          	or	a5,a1,a2
+80002004:	00f567b3          	or	a5,a0,a5
+80002008:	0037f793          	andi	a5,a5,3
+8000200c:	00c506b3          	add	a3,a0,a2
+80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+80002014:	00c58633          	add	a2,a1,a2
+80002018:	00050793          	mv	a5,a0
+8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+80002020:	00158593          	addi	a1,a1,1
+80002024:	fff5c703          	lbu	a4,-1(a1)
+80002028:	00178793          	addi	a5,a5,1
+8000202c:	fee78fa3          	sb	a4,-1(a5)
+80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+80002034:	00008067          	ret
+80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+8000203c:	00050793          	mv	a5,a0
+80002040:	00458593          	addi	a1,a1,4
+80002044:	ffc5a703          	lw	a4,-4(a1)
+80002048:	00478793          	addi	a5,a5,4
+8000204c:	fee7ae23          	sw	a4,-4(a5)
+80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+80002054:	00008067          	ret
+80002058:	00008067          	ret
+
+8000205c <memset>:
+8000205c:	00c567b3          	or	a5,a0,a2
+80002060:	0037f793          	andi	a5,a5,3
+80002064:	00c50633          	add	a2,a0,a2
+80002068:	02078063          	beqz	a5,80002088 <memset+0x2c>
+8000206c:	0ff5f593          	andi	a1,a1,255
+80002070:	00050793          	mv	a5,a0
+80002074:	04c57063          	bleu	a2,a0,800020b4 <memset+0x58>
+80002078:	00178793          	addi	a5,a5,1
+8000207c:	feb78fa3          	sb	a1,-1(a5)
+80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+80002084:	00008067          	ret
+80002088:	0ff5f593          	andi	a1,a1,255
+8000208c:	00859793          	slli	a5,a1,0x8
+80002090:	00b7e7b3          	or	a5,a5,a1
+80002094:	01079593          	slli	a1,a5,0x10
+80002098:	00f5e5b3          	or	a1,a1,a5
+8000209c:	fec574e3          	bleu	a2,a0,80002084 <memset+0x28>
+800020a0:	00050793          	mv	a5,a0
+800020a4:	00478793          	addi	a5,a5,4
+800020a8:	feb7ae23          	sw	a1,-4(a5)
+800020ac:	fec7ece3          	bltu	a5,a2,800020a4 <memset+0x48>
+800020b0:	00008067          	ret
+800020b4:	00008067          	ret
+
+800020b8 <strlen>:
+800020b8:	00054783          	lbu	a5,0(a0)
+800020bc:	00050713          	mv	a4,a0
+800020c0:	00078c63          	beqz	a5,800020d8 <strlen+0x20>
+800020c4:	00150513          	addi	a0,a0,1
+800020c8:	00054783          	lbu	a5,0(a0)
+800020cc:	fe079ce3          	bnez	a5,800020c4 <strlen+0xc>
+800020d0:	40e50533          	sub	a0,a0,a4
+800020d4:	00008067          	ret
+800020d8:	00000513          	li	a0,0
+800020dc:	00008067          	ret
+
+800020e0 <strcmp>:
+800020e0:	00150513          	addi	a0,a0,1
+800020e4:	fff54783          	lbu	a5,-1(a0)
+800020e8:	00158593          	addi	a1,a1,1
+800020ec:	fff5c703          	lbu	a4,-1(a1)
+800020f0:	00078863          	beqz	a5,80002100 <strcmp+0x20>
+800020f4:	fee786e3          	beq	a5,a4,800020e0 <strcmp>
+800020f8:	40e78533          	sub	a0,a5,a4
+800020fc:	00008067          	ret
+80002100:	00000793          	li	a5,0
+80002104:	ff5ff06f          	j	800020f8 <strcmp+0x18>
+
+80002108 <memcmp>:
+80002108:	00b567b3          	or	a5,a0,a1
+8000210c:	0037f793          	andi	a5,a5,3
+80002110:	04079263          	bnez	a5,80002154 <memcmp+0x4c>
+80002114:	ffc67693          	andi	a3,a2,-4
+80002118:	00d506b3          	add	a3,a0,a3
+8000211c:	00050813          	mv	a6,a0
+80002120:	02d57a63          	bleu	a3,a0,80002154 <memcmp+0x4c>
+80002124:	00052703          	lw	a4,0(a0)
+80002128:	0005a783          	lw	a5,0(a1)
+8000212c:	00f70a63          	beq	a4,a5,80002140 <memcmp+0x38>
+80002130:	0240006f          	j	80002154 <memcmp+0x4c>
+80002134:	00052703          	lw	a4,0(a0)
+80002138:	0005a783          	lw	a5,0(a1)
+8000213c:	00f71863          	bne	a4,a5,8000214c <memcmp+0x44>
+80002140:	00450513          	addi	a0,a0,4
+80002144:	00458593          	addi	a1,a1,4
+80002148:	fed566e3          	bltu	a0,a3,80002134 <memcmp+0x2c>
+8000214c:	41050833          	sub	a6,a0,a6
+80002150:	41060633          	sub	a2,a2,a6
+80002154:	00c58633          	add	a2,a1,a2
+80002158:	0140006f          	j	8000216c <memcmp+0x64>
+8000215c:	00158593          	addi	a1,a1,1
+80002160:	fff54783          	lbu	a5,-1(a0)
+80002164:	fff5c703          	lbu	a4,-1(a1)
+80002168:	00e79a63          	bne	a5,a4,8000217c <memcmp+0x74>
+8000216c:	00150513          	addi	a0,a0,1
+80002170:	fec596e3          	bne	a1,a2,8000215c <memcmp+0x54>
+80002174:	00000513          	li	a0,0
+80002178:	00008067          	ret
+8000217c:	40e78533          	sub	a0,a5,a4
+80002180:	00008067          	ret
+
+80002184 <strcpy>:
+80002184:	00050793          	mv	a5,a0
+80002188:	00158593          	addi	a1,a1,1
+8000218c:	fff5c703          	lbu	a4,-1(a1)
+80002190:	00178793          	addi	a5,a5,1
+80002194:	fee78fa3          	sb	a4,-1(a5)
+80002198:	fe0718e3          	bnez	a4,80002188 <strcpy+0x4>
+8000219c:	00008067          	ret
+
+800021a0 <atol>:
+800021a0:	00054783          	lbu	a5,0(a0)
+800021a4:	02000713          	li	a4,32
+800021a8:	00e79863          	bne	a5,a4,800021b8 <atol+0x18>
+800021ac:	00150513          	addi	a0,a0,1
+800021b0:	00054783          	lbu	a5,0(a0)
+800021b4:	fee78ce3          	beq	a5,a4,800021ac <atol+0xc>
+800021b8:	fd578713          	addi	a4,a5,-43
+800021bc:	0fd77713          	andi	a4,a4,253
+800021c0:	04070263          	beqz	a4,80002204 <atol+0x64>
+800021c4:	00054683          	lbu	a3,0(a0)
+800021c8:	00050793          	mv	a5,a0
+800021cc:	00000613          	li	a2,0
+800021d0:	04068863          	beqz	a3,80002220 <atol+0x80>
+800021d4:	00000513          	li	a0,0
+800021d8:	00178793          	addi	a5,a5,1
+800021dc:	fd068593          	addi	a1,a3,-48
+800021e0:	00251713          	slli	a4,a0,0x2
+800021e4:	0007c683          	lbu	a3,0(a5)
+800021e8:	00a70533          	add	a0,a4,a0
+800021ec:	00151513          	slli	a0,a0,0x1
+800021f0:	00a58533          	add	a0,a1,a0
+800021f4:	fe0692e3          	bnez	a3,800021d8 <atol+0x38>
+800021f8:	00060463          	beqz	a2,80002200 <atol+0x60>
+800021fc:	40a00533          	neg	a0,a0
+80002200:	00008067          	ret
+80002204:	00154683          	lbu	a3,1(a0)
+80002208:	fd378793          	addi	a5,a5,-45
+8000220c:	0017b613          	seqz	a2,a5
+80002210:	00150793          	addi	a5,a0,1
+80002214:	fc0690e3          	bnez	a3,800021d4 <atol+0x34>
+80002218:	00000513          	li	a0,0
+8000221c:	fddff06f          	j	800021f8 <atol+0x58>
+80002220:	00000513          	li	a0,0
+80002224:	00008067          	ret
+
+80002228 <terminate>:
+80002228:	fffff697          	auipc	a3,0xfffff
+8000222c:	dd868693          	addi	a3,a3,-552 # 80001000 <tohost>
+80002230:	0006a703          	lw	a4,0(a3)
+80002234:	0046a783          	lw	a5,4(a3)
+80002238:	00050813          	mv	a6,a0
+8000223c:	41f55893          	srai	a7,a0,0x1f
+80002240:	00f76733          	or	a4,a4,a5
+80002244:	02070663          	beqz	a4,80002270 <terminate+0x48>
+80002248:	fffff617          	auipc	a2,0xfffff
+8000224c:	df860613          	addi	a2,a2,-520 # 80001040 <fromhost>
+80002250:	00000713          	li	a4,0
+80002254:	00e62023          	sw	a4,0(a2)
+80002258:	00000793          	li	a5,0
+8000225c:	00f62223          	sw	a5,4(a2)
+80002260:	0006a703          	lw	a4,0(a3)
+80002264:	0046a783          	lw	a5,4(a3)
+80002268:	00f76733          	or	a4,a4,a5
+8000226c:	fe0712e3          	bnez	a4,80002250 <terminate+0x28>
+80002270:	0106a023          	sw	a6,0(a3)
+80002274:	0116a223          	sw	a7,4(a3)
+80002278:	0000006f          	j	80002278 <terminate+0x50>
+
+8000227c <wtf>:
+8000227c:	ff010113          	addi	sp,sp,-16
+80002280:	34900513          	li	a0,841
+80002284:	00112623          	sw	ra,12(sp)
+80002288:	fa1ff0ef          	jal	ra,80002228 <terminate>
+
+8000228c <printhex>:
+8000228c:	fe010113          	addi	sp,sp,-32
+80002290:	01b10793          	addi	a5,sp,27
+80002294:	00b10e93          	addi	t4,sp,11
+80002298:	00900e13          	li	t3,9
+8000229c:	00f57693          	andi	a3,a0,15
+800022a0:	01c59313          	slli	t1,a1,0x1c
+800022a4:	00455513          	srli	a0,a0,0x4
+800022a8:	05700613          	li	a2,87
+800022ac:	0ff6f713          	andi	a4,a3,255
+800022b0:	00de6463          	bltu	t3,a3,800022b8 <printhex+0x2c>
+800022b4:	03000613          	li	a2,48
+800022b8:	00c70733          	add	a4,a4,a2
+800022bc:	00e78023          	sb	a4,0(a5)
+800022c0:	fff78793          	addi	a5,a5,-1
+800022c4:	00a36533          	or	a0,t1,a0
+800022c8:	0045d593          	srli	a1,a1,0x4
+800022cc:	fdd798e3          	bne	a5,t4,8000229c <printhex+0x10>
+800022d0:	00c14583          	lbu	a1,12(sp)
+800022d4:	00010e23          	sb	zero,28(sp)
+800022d8:	06058263          	beqz	a1,8000233c <printhex+0xb0>
+800022dc:	00c10513          	addi	a0,sp,12
+800022e0:	fffff697          	auipc	a3,0xfffff
+800022e4:	d2068693          	addi	a3,a3,-736 # 80001000 <tohost>
+800022e8:	fffff617          	auipc	a2,0xfffff
+800022ec:	d5860613          	addi	a2,a2,-680 # 80001040 <fromhost>
+800022f0:	0006a703          	lw	a4,0(a3)
+800022f4:	0046a783          	lw	a5,4(a3)
+800022f8:	00058813          	mv	a6,a1
+800022fc:	00150513          	addi	a0,a0,1
+80002300:	00f76733          	or	a4,a4,a5
+80002304:	010108b7          	lui	a7,0x1010
+80002308:	02070263          	beqz	a4,8000232c <printhex+0xa0>
+8000230c:	00000713          	li	a4,0
+80002310:	00e62023          	sw	a4,0(a2)
+80002314:	00000793          	li	a5,0
+80002318:	00f62223          	sw	a5,4(a2)
+8000231c:	0006a703          	lw	a4,0(a3)
+80002320:	0046a783          	lw	a5,4(a3)
+80002324:	00f76733          	or	a4,a4,a5
+80002328:	fe0712e3          	bnez	a4,8000230c <printhex+0x80>
+8000232c:	00054583          	lbu	a1,0(a0)
+80002330:	0106a023          	sw	a6,0(a3)
+80002334:	0116a223          	sw	a7,4(a3)
+80002338:	fa059ce3          	bnez	a1,800022f0 <printhex+0x64>
+8000233c:	02010113          	addi	sp,sp,32
+80002340:	00008067          	ret
+
+80002344 <handle_fault>:
+80002344:	ff010113          	addi	sp,sp,-16
+80002348:	fffff6b7          	lui	a3,0xfffff
+8000234c:	00112623          	sw	ra,12(sp)
+80002350:	00812423          	sw	s0,8(sp)
+80002354:	00912223          	sw	s1,4(sp)
+80002358:	00d50733          	add	a4,a0,a3
+8000235c:	0003e7b7          	lui	a5,0x3e
+80002360:	16f77263          	bleu	a5,a4,800024c4 <handle_fault+0x180>
+80002364:	00c55613          	srli	a2,a0,0xc
+80002368:	40060e13          	addi	t3,a2,1024
+8000236c:	00003317          	auipc	t1,0x3
+80002370:	c9430313          	addi	t1,t1,-876 # 80005000 <pt>
+80002374:	002e1793          	slli	a5,t3,0x2
+80002378:	00f307b3          	add	a5,t1,a5
+8000237c:	0007a703          	lw	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+80002380:	00d57533          	and	a0,a0,a3
+80002384:	0e071863          	bnez	a4,80002474 <handle_fault+0x130>
+80002388:	00005797          	auipc	a5,0x5
+8000238c:	06c78793          	addi	a5,a5,108 # 800073f4 <freelist_head>
+80002390:	0007a583          	lw	a1,0(a5)
+80002394:	1a058063          	beqz	a1,80002534 <handle_fault+0x1f0>
+80002398:	0045a783          	lw	a5,4(a1)
+8000239c:	00005717          	auipc	a4,0x5
+800023a0:	05470713          	addi	a4,a4,84 # 800073f0 <freelist_tail>
+800023a4:	00072703          	lw	a4,0(a4)
+800023a8:	00005697          	auipc	a3,0x5
+800023ac:	04f6a623          	sw	a5,76(a3) # 800073f4 <freelist_head>
+800023b0:	10e78463          	beq	a5,a4,800024b8 <handle_fault+0x174>
+800023b4:	0005a703          	lw	a4,0(a1)
+800023b8:	002e1793          	slli	a5,t3,0x2
+800023bc:	00f307b3          	add	a5,t1,a5
+800023c0:	00c75713          	srli	a4,a4,0xc
+800023c4:	00a71713          	slli	a4,a4,0xa
+800023c8:	0df76e93          	ori	t4,a4,223
+800023cc:	01f76693          	ori	a3,a4,31
+800023d0:	01d7a023          	sw	t4,0(a5)
+800023d4:	12050073          	sfence.vma	a0
+800023d8:	00005717          	auipc	a4,0x5
+800023dc:	e2070713          	addi	a4,a4,-480 # 800071f8 <user_mapping>
+800023e0:	00361793          	slli	a5,a2,0x3
+800023e4:	00f707b3          	add	a5,a4,a5
+800023e8:	0007a703          	lw	a4,0(a5)
+800023ec:	1a071a63          	bnez	a4,800025a0 <handle_fault+0x25c>
+800023f0:	0005a703          	lw	a4,0(a1)
+800023f4:	00e7a023          	sw	a4,0(a5)
+800023f8:	0045a703          	lw	a4,4(a1)
+800023fc:	00e7a223          	sw	a4,4(a5)
+80002400:	000407b7          	lui	a5,0x40
+80002404:	1007a5f3          	csrrs	a1,sstatus,a5
+80002408:	ffc007b7          	lui	a5,0xffc00
+8000240c:	00f507b3          	add	a5,a0,a5
+80002410:	00001637          	lui	a2,0x1
+80002414:	00050713          	mv	a4,a0
+80002418:	00c78633          	add	a2,a5,a2
+8000241c:	0007af03          	lw	t5,0(a5) # ffc00000 <_end+0x7fbf8c08>
+80002420:	0047ae83          	lw	t4,4(a5)
+80002424:	0087a883          	lw	a7,8(a5)
+80002428:	00c7a803          	lw	a6,12(a5)
+8000242c:	01e72023          	sw	t5,0(a4)
+80002430:	01d72223          	sw	t4,4(a4)
+80002434:	01172423          	sw	a7,8(a4)
+80002438:	01072623          	sw	a6,12(a4)
+8000243c:	01078793          	addi	a5,a5,16
+80002440:	01070713          	addi	a4,a4,16
+80002444:	fcc79ce3          	bne	a5,a2,8000241c <handle_fault+0xd8>
+80002448:	10059073          	csrw	sstatus,a1
+8000244c:	002e1e13          	slli	t3,t3,0x2
+80002450:	01c30333          	add	t1,t1,t3
+80002454:	00d32023          	sw	a3,0(t1)
+80002458:	12050073          	sfence.vma	a0
+8000245c:	0000100f          	fence.i
+80002460:	00c12083          	lw	ra,12(sp)
+80002464:	00812403          	lw	s0,8(sp)
+80002468:	00412483          	lw	s1,4(sp)
+8000246c:	01010113          	addi	sp,sp,16
+80002470:	00008067          	ret
+80002474:	04077693          	andi	a3,a4,64
+80002478:	02069263          	bnez	a3,8000249c <handle_fault+0x158>
+8000247c:	04076713          	ori	a4,a4,64
+80002480:	00e7a023          	sw	a4,0(a5)
+80002484:	12050073          	sfence.vma	a0
+80002488:	00c12083          	lw	ra,12(sp)
+8000248c:	00812403          	lw	s0,8(sp)
+80002490:	00412483          	lw	s1,4(sp)
+80002494:	01010113          	addi	sp,sp,16
+80002498:	00008067          	ret
+8000249c:	08077693          	andi	a3,a4,128
+800024a0:	16069663          	bnez	a3,8000260c <handle_fault+0x2c8>
+800024a4:	00f00693          	li	a3,15
+800024a8:	16d59263          	bne	a1,a3,8000260c <handle_fault+0x2c8>
+800024ac:	08076713          	ori	a4,a4,128
+800024b0:	00e7a023          	sw	a4,0(a5)
+800024b4:	fd1ff06f          	j	80002484 <handle_fault+0x140>
+800024b8:	00005797          	auipc	a5,0x5
+800024bc:	f207ac23          	sw	zero,-200(a5) # 800073f0 <freelist_tail>
+800024c0:	ef5ff06f          	j	800023b4 <handle_fault+0x70>
+800024c4:	04100513          	li	a0,65
+800024c8:	00001597          	auipc	a1,0x1
+800024cc:	ae458593          	addi	a1,a1,-1308 # 80002fac <pass+0xc>
+800024d0:	fffff697          	auipc	a3,0xfffff
+800024d4:	b3068693          	addi	a3,a3,-1232 # 80001000 <tohost>
+800024d8:	fffff617          	auipc	a2,0xfffff
+800024dc:	b6860613          	addi	a2,a2,-1176 # 80001040 <fromhost>
+800024e0:	0006a703          	lw	a4,0(a3)
+800024e4:	0046a783          	lw	a5,4(a3)
+800024e8:	00050313          	mv	t1,a0
+800024ec:	00158593          	addi	a1,a1,1
+800024f0:	00f76733          	or	a4,a4,a5
+800024f4:	010103b7          	lui	t2,0x1010
+800024f8:	02070263          	beqz	a4,8000251c <handle_fault+0x1d8>
+800024fc:	00000793          	li	a5,0
+80002500:	00f62023          	sw	a5,0(a2)
+80002504:	00000813          	li	a6,0
+80002508:	01062223          	sw	a6,4(a2)
+8000250c:	0006a703          	lw	a4,0(a3)
+80002510:	0046a783          	lw	a5,4(a3)
+80002514:	00f76733          	or	a4,a4,a5
+80002518:	fe0712e3          	bnez	a4,800024fc <handle_fault+0x1b8>
+8000251c:	0005c503          	lbu	a0,0(a1)
+80002520:	0066a023          	sw	t1,0(a3)
+80002524:	0076a223          	sw	t2,4(a3)
+80002528:	fa051ce3          	bnez	a0,800024e0 <handle_fault+0x19c>
+8000252c:	00300513          	li	a0,3
+80002530:	cf9ff0ef          	jal	ra,80002228 <terminate>
+80002534:	04100513          	li	a0,65
+80002538:	00001597          	auipc	a1,0x1
+8000253c:	b0058593          	addi	a1,a1,-1280 # 80003038 <pass+0x98>
+80002540:	fffff697          	auipc	a3,0xfffff
+80002544:	ac068693          	addi	a3,a3,-1344 # 80001000 <tohost>
+80002548:	fffff617          	auipc	a2,0xfffff
+8000254c:	af860613          	addi	a2,a2,-1288 # 80001040 <fromhost>
+80002550:	0006a703          	lw	a4,0(a3)
+80002554:	0046a783          	lw	a5,4(a3)
+80002558:	00050f13          	mv	t5,a0
+8000255c:	00158593          	addi	a1,a1,1
+80002560:	00f76733          	or	a4,a4,a5
+80002564:	01010fb7          	lui	t6,0x1010
+80002568:	02070263          	beqz	a4,8000258c <handle_fault+0x248>
+8000256c:	00000793          	li	a5,0
+80002570:	00f62023          	sw	a5,0(a2)
+80002574:	00000813          	li	a6,0
+80002578:	01062223          	sw	a6,4(a2)
+8000257c:	0006a703          	lw	a4,0(a3)
+80002580:	0046a783          	lw	a5,4(a3)
+80002584:	00f76733          	or	a4,a4,a5
+80002588:	fe0712e3          	bnez	a4,8000256c <handle_fault+0x228>
+8000258c:	0005c503          	lbu	a0,0(a1)
+80002590:	01e6a023          	sw	t5,0(a3)
+80002594:	01f6a223          	sw	t6,4(a3)
+80002598:	fa051ce3          	bnez	a0,80002550 <handle_fault+0x20c>
+8000259c:	f91ff06f          	j	8000252c <handle_fault+0x1e8>
+800025a0:	04100513          	li	a0,65
+800025a4:	00001597          	auipc	a1,0x1
+800025a8:	aac58593          	addi	a1,a1,-1364 # 80003050 <pass+0xb0>
+800025ac:	fffff697          	auipc	a3,0xfffff
+800025b0:	a5468693          	addi	a3,a3,-1452 # 80001000 <tohost>
+800025b4:	fffff617          	auipc	a2,0xfffff
+800025b8:	a8c60613          	addi	a2,a2,-1396 # 80001040 <fromhost>
+800025bc:	0006a703          	lw	a4,0(a3)
+800025c0:	0046a783          	lw	a5,4(a3)
+800025c4:	00050813          	mv	a6,a0
+800025c8:	00158593          	addi	a1,a1,1
+800025cc:	00f76733          	or	a4,a4,a5
+800025d0:	010108b7          	lui	a7,0x1010
+800025d4:	02070263          	beqz	a4,800025f8 <handle_fault+0x2b4>
+800025d8:	00000713          	li	a4,0
+800025dc:	00e62023          	sw	a4,0(a2)
+800025e0:	00000793          	li	a5,0
+800025e4:	00f62223          	sw	a5,4(a2)
+800025e8:	0006a703          	lw	a4,0(a3)
+800025ec:	0046a783          	lw	a5,4(a3)
+800025f0:	00f76733          	or	a4,a4,a5
+800025f4:	fe0712e3          	bnez	a4,800025d8 <handle_fault+0x294>
+800025f8:	0005c503          	lbu	a0,0(a1)
+800025fc:	0106a023          	sw	a6,0(a3)
+80002600:	0116a223          	sw	a7,4(a3)
+80002604:	fa051ce3          	bnez	a0,800025bc <handle_fault+0x278>
+80002608:	f25ff06f          	j	8000252c <handle_fault+0x1e8>
+8000260c:	04100793          	li	a5,65
+80002610:	00001597          	auipc	a1,0x1
+80002614:	9e058593          	addi	a1,a1,-1568 # 80002ff0 <pass+0x50>
+80002618:	fffff697          	auipc	a3,0xfffff
+8000261c:	9e868693          	addi	a3,a3,-1560 # 80001000 <tohost>
+80002620:	fffff617          	auipc	a2,0xfffff
+80002624:	a2060613          	addi	a2,a2,-1504 # 80001040 <fromhost>
+80002628:	0006a803          	lw	a6,0(a3)
+8000262c:	0046a883          	lw	a7,4(a3)
+80002630:	00078413          	mv	s0,a5
+80002634:	00158593          	addi	a1,a1,1
+80002638:	01186833          	or	a6,a6,a7
+8000263c:	010104b7          	lui	s1,0x1010
+80002640:	02080263          	beqz	a6,80002664 <handle_fault+0x320>
+80002644:	00000793          	li	a5,0
+80002648:	00f62023          	sw	a5,0(a2)
+8000264c:	00000813          	li	a6,0
+80002650:	01062223          	sw	a6,4(a2)
+80002654:	0006a703          	lw	a4,0(a3)
+80002658:	0046a783          	lw	a5,4(a3)
+8000265c:	00f76733          	or	a4,a4,a5
+80002660:	fe0712e3          	bnez	a4,80002644 <handle_fault+0x300>
+80002664:	0005c783          	lbu	a5,0(a1)
+80002668:	0086a023          	sw	s0,0(a3)
+8000266c:	0096a223          	sw	s1,4(a3)
+80002670:	fa079ce3          	bnez	a5,80002628 <handle_fault+0x2e4>
+80002674:	eb9ff06f          	j	8000252c <handle_fault+0x1e8>
+
+80002678 <handle_trap>:
+80002678:	08c52583          	lw	a1,140(a0)
+8000267c:	fb010113          	addi	sp,sp,-80
+80002680:	03412c23          	sw	s4,56(sp)
+80002684:	04112623          	sw	ra,76(sp)
+80002688:	04812423          	sw	s0,72(sp)
+8000268c:	04912223          	sw	s1,68(sp)
+80002690:	05212023          	sw	s2,64(sp)
+80002694:	03312e23          	sw	s3,60(sp)
+80002698:	03512a23          	sw	s5,52(sp)
+8000269c:	03612823          	sw	s6,48(sp)
+800026a0:	03712623          	sw	s7,44(sp)
+800026a4:	03812423          	sw	s8,40(sp)
+800026a8:	03912223          	sw	s9,36(sp)
+800026ac:	03a12023          	sw	s10,32(sp)
+800026b0:	01b12e23          	sw	s11,28(sp)
+800026b4:	00800793          	li	a5,8
+800026b8:	00050a13          	mv	s4,a0
+800026bc:	16f58663          	beq	a1,a5,80002828 <handle_trap+0x1b0>
+800026c0:	00200793          	li	a5,2
+800026c4:	06f58063          	beq	a1,a5,80002724 <handle_trap+0xac>
+800026c8:	ff458793          	addi	a5,a1,-12
+800026cc:	00100713          	li	a4,1
+800026d0:	00f77663          	bleu	a5,a4,800026dc <handle_trap+0x64>
+800026d4:	00f00793          	li	a5,15
+800026d8:	22f59a63          	bne	a1,a5,8000290c <handle_trap+0x294>
+800026dc:	088a2503          	lw	a0,136(s4)
+800026e0:	c65ff0ef          	jal	ra,80002344 <handle_fault>
+800026e4:	04812403          	lw	s0,72(sp)
+800026e8:	04c12083          	lw	ra,76(sp)
+800026ec:	04412483          	lw	s1,68(sp)
+800026f0:	04012903          	lw	s2,64(sp)
+800026f4:	03c12983          	lw	s3,60(sp)
+800026f8:	03412a83          	lw	s5,52(sp)
+800026fc:	03012b03          	lw	s6,48(sp)
+80002700:	02c12b83          	lw	s7,44(sp)
+80002704:	02812c03          	lw	s8,40(sp)
+80002708:	02412c83          	lw	s9,36(sp)
+8000270c:	02012d03          	lw	s10,32(sp)
+80002710:	01c12d83          	lw	s11,28(sp)
+80002714:	000a0513          	mv	a0,s4
+80002718:	03812a03          	lw	s4,56(sp)
+8000271c:	05010113          	addi	sp,sp,80
+80002720:	91dfd06f          	j	8000003c <pop_tf>
+80002724:	08452703          	lw	a4,132(a0)
+80002728:	00377793          	andi	a5,a4,3
+8000272c:	08079863          	bnez	a5,800027bc <handle_trap+0x144>
+80002730:	008007ef          	jal	a5,80002738 <handle_trap+0xc0>
+80002734:	00301073          	fssr	zero
+80002738:	00072703          	lw	a4,0(a4)
+8000273c:	0007a783          	lw	a5,0(a5)
+80002740:	06f70a63          	beq	a4,a5,800027b4 <handle_trap+0x13c>
+80002744:	04100513          	li	a0,65
+80002748:	00001597          	auipc	a1,0x1
+8000274c:	9d058593          	addi	a1,a1,-1584 # 80003118 <pass+0x178>
+80002750:	fffff697          	auipc	a3,0xfffff
+80002754:	8b068693          	addi	a3,a3,-1872 # 80001000 <tohost>
+80002758:	fffff617          	auipc	a2,0xfffff
+8000275c:	8e860613          	addi	a2,a2,-1816 # 80001040 <fromhost>
+80002760:	0006a703          	lw	a4,0(a3)
+80002764:	0046a783          	lw	a5,4(a3)
+80002768:	00050813          	mv	a6,a0
+8000276c:	00158593          	addi	a1,a1,1
+80002770:	00f76733          	or	a4,a4,a5
+80002774:	010108b7          	lui	a7,0x1010
+80002778:	02070263          	beqz	a4,8000279c <handle_trap+0x124>
+8000277c:	00000713          	li	a4,0
+80002780:	00e62023          	sw	a4,0(a2)
+80002784:	00000793          	li	a5,0
+80002788:	00f62223          	sw	a5,4(a2)
+8000278c:	0006a703          	lw	a4,0(a3)
+80002790:	0046a783          	lw	a5,4(a3)
+80002794:	00f76733          	or	a4,a4,a5
+80002798:	fe0712e3          	bnez	a4,8000277c <handle_trap+0x104>
+8000279c:	0005c503          	lbu	a0,0(a1)
+800027a0:	0106a023          	sw	a6,0(a3)
+800027a4:	0116a223          	sw	a7,4(a3)
+800027a8:	fa051ce3          	bnez	a0,80002760 <handle_trap+0xe8>
+800027ac:	00300513          	li	a0,3
+800027b0:	a79ff0ef          	jal	ra,80002228 <terminate>
+800027b4:	00100513          	li	a0,1
+800027b8:	a71ff0ef          	jal	ra,80002228 <terminate>
+800027bc:	00001597          	auipc	a1,0x1
+800027c0:	93858593          	addi	a1,a1,-1736 # 800030f4 <pass+0x154>
+800027c4:	04100613          	li	a2,65
+800027c8:	fffff697          	auipc	a3,0xfffff
+800027cc:	83868693          	addi	a3,a3,-1992 # 80001000 <tohost>
+800027d0:	fffff517          	auipc	a0,0xfffff
+800027d4:	87050513          	addi	a0,a0,-1936 # 80001040 <fromhost>
+800027d8:	0006a703          	lw	a4,0(a3)
+800027dc:	0046a783          	lw	a5,4(a3)
+800027e0:	00060e13          	mv	t3,a2
+800027e4:	00158593          	addi	a1,a1,1
+800027e8:	00f76733          	or	a4,a4,a5
+800027ec:	01010eb7          	lui	t4,0x1010
+800027f0:	02070263          	beqz	a4,80002814 <handle_trap+0x19c>
+800027f4:	00000793          	li	a5,0
+800027f8:	00f52023          	sw	a5,0(a0)
+800027fc:	00000813          	li	a6,0
+80002800:	01052223          	sw	a6,4(a0)
+80002804:	0006a703          	lw	a4,0(a3)
+80002808:	0046a783          	lw	a5,4(a3)
+8000280c:	00f76733          	or	a4,a4,a5
+80002810:	fe0712e3          	bnez	a4,800027f4 <handle_trap+0x17c>
+80002814:	0005c603          	lbu	a2,0(a1)
+80002818:	01c6a023          	sw	t3,0(a3)
+8000281c:	01d6a223          	sw	t4,4(a3)
+80002820:	fa061ce3          	bnez	a2,800027d8 <handle_trap+0x160>
+80002824:	f89ff06f          	j	800027ac <handle_trap+0x134>
+80002828:	02852783          	lw	a5,40(a0)
+8000282c:	00001a37          	lui	s4,0x1
+80002830:	00005b17          	auipc	s6,0x5
+80002834:	9c8b0b13          	addi	s6,s6,-1592 # 800071f8 <user_mapping>
+80002838:	00f12223          	sw	a5,4(sp)
+8000283c:	00002d17          	auipc	s10,0x2
+80002840:	7c4d0d13          	addi	s10,s10,1988 # 80005000 <pt>
+80002844:	00040cb7          	lui	s9,0x40
+80002848:	ffc00c37          	lui	s8,0xffc00
+8000284c:	0003fab7          	lui	s5,0x3f
+80002850:	01c0006f          	j	8000286c <handle_trap+0x1f4>
+80002854:	00f72223          	sw	a5,4(a4)
+80002858:	00005717          	auipc	a4,0x5
+8000285c:	b8f72c23          	sw	a5,-1128(a4) # 800073f0 <freelist_tail>
+80002860:	000017b7          	lui	a5,0x1
+80002864:	00fa0a33          	add	s4,s4,a5
+80002868:	1b5a0463          	beq	s4,s5,80002a10 <handle_trap+0x398>
+8000286c:	00ca5713          	srli	a4,s4,0xc
+80002870:	00371b93          	slli	s7,a4,0x3
+80002874:	017b0633          	add	a2,s6,s7
+80002878:	00062603          	lw	a2,0(a2)
+8000287c:	fe0602e3          	beqz	a2,80002860 <handle_trap+0x1e8>
+80002880:	40070713          	addi	a4,a4,1024
+80002884:	00271713          	slli	a4,a4,0x2
+80002888:	00ed0733          	add	a4,s10,a4
+8000288c:	00072703          	lw	a4,0(a4)
+80002890:	04077613          	andi	a2,a4,64
+80002894:	12060863          	beqz	a2,800029c4 <handle_trap+0x34c>
+80002898:	00e12623          	sw	a4,12(sp)
+8000289c:	100cadf3          	csrrs	s11,sstatus,s9
+800028a0:	018a0833          	add	a6,s4,s8
+800028a4:	00001637          	lui	a2,0x1
+800028a8:	00080593          	mv	a1,a6
+800028ac:	000a0513          	mv	a0,s4
+800028b0:	01012423          	sw	a6,8(sp)
+800028b4:	855ff0ef          	jal	ra,80002108 <memcmp>
+800028b8:	02050263          	beqz	a0,800028dc <handle_trap+0x264>
+800028bc:	00c12703          	lw	a4,12(sp)
+800028c0:	00812803          	lw	a6,8(sp)
+800028c4:	08077713          	andi	a4,a4,128
+800028c8:	0a070863          	beqz	a4,80002978 <handle_trap+0x300>
+800028cc:	00001637          	lui	a2,0x1
+800028d0:	00080593          	mv	a1,a6
+800028d4:	000a0513          	mv	a0,s4
+800028d8:	f28ff0ef          	jal	ra,80002000 <memcpy>
+800028dc:	017b07b3          	add	a5,s6,s7
+800028e0:	100d9073          	csrw	sstatus,s11
+800028e4:	00005717          	auipc	a4,0x5
+800028e8:	b0c70713          	addi	a4,a4,-1268 # 800073f0 <freelist_tail>
+800028ec:	00072703          	lw	a4,0(a4)
+800028f0:	0007a023          	sw	zero,0(a5) # 1000 <_start-0x7ffff000>
+800028f4:	f60710e3          	bnez	a4,80002854 <handle_trap+0x1dc>
+800028f8:	00005717          	auipc	a4,0x5
+800028fc:	aef72c23          	sw	a5,-1288(a4) # 800073f0 <freelist_tail>
+80002900:	00005717          	auipc	a4,0x5
+80002904:	aef72a23          	sw	a5,-1292(a4) # 800073f4 <freelist_head>
+80002908:	f59ff06f          	j	80002860 <handle_trap+0x1e8>
+8000290c:	04100593          	li	a1,65
+80002910:	00001617          	auipc	a2,0x1
+80002914:	83460613          	addi	a2,a2,-1996 # 80003144 <pass+0x1a4>
+80002918:	ffffe697          	auipc	a3,0xffffe
+8000291c:	6e868693          	addi	a3,a3,1768 # 80001000 <tohost>
+80002920:	ffffe517          	auipc	a0,0xffffe
+80002924:	72050513          	addi	a0,a0,1824 # 80001040 <fromhost>
+80002928:	0006a703          	lw	a4,0(a3)
+8000292c:	0046a783          	lw	a5,4(a3)
+80002930:	00058313          	mv	t1,a1
+80002934:	00160613          	addi	a2,a2,1
+80002938:	00f76733          	or	a4,a4,a5
+8000293c:	010103b7          	lui	t2,0x1010
+80002940:	02070263          	beqz	a4,80002964 <handle_trap+0x2ec>
+80002944:	00000793          	li	a5,0
+80002948:	00f52023          	sw	a5,0(a0)
+8000294c:	00000813          	li	a6,0
+80002950:	01052223          	sw	a6,4(a0)
+80002954:	0006a703          	lw	a4,0(a3)
+80002958:	0046a783          	lw	a5,4(a3)
+8000295c:	00f76733          	or	a4,a4,a5
+80002960:	fe0712e3          	bnez	a4,80002944 <handle_trap+0x2cc>
+80002964:	00064583          	lbu	a1,0(a2)
+80002968:	0066a023          	sw	t1,0(a3)
+8000296c:	0076a223          	sw	t2,4(a3)
+80002970:	fa059ce3          	bnez	a1,80002928 <handle_trap+0x2b0>
+80002974:	e39ff06f          	j	800027ac <handle_trap+0x134>
+80002978:	04100793          	li	a5,65
+8000297c:	00000617          	auipc	a2,0x0
+80002980:	74460613          	addi	a2,a2,1860 # 800030c0 <pass+0x120>
+80002984:	ffffe697          	auipc	a3,0xffffe
+80002988:	67c68693          	addi	a3,a3,1660 # 80001000 <tohost>
+8000298c:	ffffe597          	auipc	a1,0xffffe
+80002990:	6b458593          	addi	a1,a1,1716 # 80001040 <fromhost>
+80002994:	00078413          	mv	s0,a5
+80002998:	00160613          	addi	a2,a2,1
+8000299c:	010104b7          	lui	s1,0x1010
+800029a0:	0006a703          	lw	a4,0(a3)
+800029a4:	0046a783          	lw	a5,4(a3)
+800029a8:	00f76733          	or	a4,a4,a5
+800029ac:	06070663          	beqz	a4,80002a18 <handle_trap+0x3a0>
+800029b0:	00000793          	li	a5,0
+800029b4:	00000813          	li	a6,0
+800029b8:	00f5a023          	sw	a5,0(a1)
+800029bc:	0105a223          	sw	a6,4(a1)
+800029c0:	fe1ff06f          	j	800029a0 <handle_trap+0x328>
+800029c4:	04100793          	li	a5,65
+800029c8:	00000617          	auipc	a2,0x0
+800029cc:	6c460613          	addi	a2,a2,1732 # 8000308c <pass+0xec>
+800029d0:	ffffe697          	auipc	a3,0xffffe
+800029d4:	63068693          	addi	a3,a3,1584 # 80001000 <tohost>
+800029d8:	ffffe597          	auipc	a1,0xffffe
+800029dc:	66858593          	addi	a1,a1,1640 # 80001040 <fromhost>
+800029e0:	00078913          	mv	s2,a5
+800029e4:	00160613          	addi	a2,a2,1
+800029e8:	010109b7          	lui	s3,0x1010
+800029ec:	0006a703          	lw	a4,0(a3)
+800029f0:	0046a783          	lw	a5,4(a3)
+800029f4:	00f76733          	or	a4,a4,a5
+800029f8:	02070a63          	beqz	a4,80002a2c <handle_trap+0x3b4>
+800029fc:	00000793          	li	a5,0
+80002a00:	00000813          	li	a6,0
+80002a04:	00f5a023          	sw	a5,0(a1)
+80002a08:	0105a223          	sw	a6,4(a1)
+80002a0c:	fe1ff06f          	j	800029ec <handle_trap+0x374>
+80002a10:	00412503          	lw	a0,4(sp)
+80002a14:	815ff0ef          	jal	ra,80002228 <terminate>
+80002a18:	00064783          	lbu	a5,0(a2)
+80002a1c:	0086a023          	sw	s0,0(a3)
+80002a20:	0096a223          	sw	s1,4(a3)
+80002a24:	f60798e3          	bnez	a5,80002994 <handle_trap+0x31c>
+80002a28:	d85ff06f          	j	800027ac <handle_trap+0x134>
+80002a2c:	00064783          	lbu	a5,0(a2)
+80002a30:	0126a023          	sw	s2,0(a3)
+80002a34:	0136a223          	sw	s3,4(a3)
+80002a38:	fa0794e3          	bnez	a5,800029e0 <handle_trap+0x368>
+80002a3c:	d71ff06f          	j	800027ac <handle_trap+0x134>
+
+80002a40 <vm_boot>:
+80002a40:	f14027f3          	csrr	a5,mhartid
+80002a44:	14079a63          	bnez	a5,80002b98 <vm_boot+0x158>
+80002a48:	00003797          	auipc	a5,0x3
+80002a4c:	5b878793          	addi	a5,a5,1464 # 80006000 <pt+0x1000>
+80002a50:	00c7d793          	srli	a5,a5,0xc
+80002a54:	00a79793          	slli	a5,a5,0xa
+80002a58:	0017e793          	ori	a5,a5,1
+80002a5c:	00002697          	auipc	a3,0x2
+80002a60:	5af6a223          	sw	a5,1444(a3) # 80005000 <pt>
+80002a64:	200007b7          	lui	a5,0x20000
+80002a68:	00002717          	auipc	a4,0x2
+80002a6c:	59870713          	addi	a4,a4,1432 # 80005000 <pt>
+80002a70:	0cf78793          	addi	a5,a5,207 # 200000cf <_start-0x5fffff31>
+80002a74:	f6010113          	addi	sp,sp,-160
+80002a78:	00003697          	auipc	a3,0x3
+80002a7c:	58f6a223          	sw	a5,1412(a3) # 80005ffc <pt+0xffc>
+80002a80:	00c75793          	srli	a5,a4,0xc
+80002a84:	80000737          	lui	a4,0x80000
+80002a88:	08112e23          	sw	ra,156(sp)
+80002a8c:	08812c23          	sw	s0,152(sp)
+80002a90:	00e7e7b3          	or	a5,a5,a4
+80002a94:	18079073          	csrw	satp,a5
+80002a98:	01f00793          	li	a5,31
+80002a9c:	fff00713          	li	a4,-1
+80002aa0:	00000297          	auipc	t0,0x0
+80002aa4:	01428293          	addi	t0,t0,20 # 80002ab4 <vm_boot+0x74>
+80002aa8:	305292f3          	csrrw	t0,mtvec,t0
+80002aac:	3b071073          	csrw	pmpaddr0,a4
+80002ab0:	3a079073          	csrw	pmpcfg0,a5
+80002ab4:	7fbfd797          	auipc	a5,0x7fbfd
+80002ab8:	61078793          	addi	a5,a5,1552 # ffc000c4 <_end+0x7fbf8ccc>
+80002abc:	10579073          	csrw	stvec,a5
+80002ac0:	340027f3          	csrr	a5,mscratch
+80002ac4:	7fc00837          	lui	a6,0x7fc00
+80002ac8:	010787b3          	add	a5,a5,a6
+80002acc:	14079073          	csrw	sscratch,a5
+80002ad0:	0000b7b7          	lui	a5,0xb
+80002ad4:	10078793          	addi	a5,a5,256 # b100 <_start-0x7fff4f00>
+80002ad8:	30279073          	csrw	medeleg,a5
+80002adc:	0001e7b7          	lui	a5,0x1e
+80002ae0:	30079073          	csrw	mstatus,a5
+80002ae4:	30405073          	csrwi	mie,0
+80002ae8:	7fc04797          	auipc	a5,0x7fc04
+80002aec:	51878793          	addi	a5,a5,1304 # ffc07000 <_end+0x7fbffc08>
+80002af0:	00005717          	auipc	a4,0x5
+80002af4:	90f72223          	sw	a5,-1788(a4) # 800073f4 <freelist_head>
+80002af8:	7fc04797          	auipc	a5,0x7fc04
+80002afc:	6f878793          	addi	a5,a5,1784 # ffc071f0 <_end+0x7fbffdf8>
+80002b00:	00005717          	auipc	a4,0x5
+80002b04:	8ef72823          	sw	a5,-1808(a4) # 800073f0 <freelist_tail>
+80002b08:	000808b7          	lui	a7,0x80
+80002b0c:	00004717          	auipc	a4,0x4
+80002b10:	4f470713          	addi	a4,a4,1268 # 80007000 <freelist_nodes>
+80002b14:	00004317          	auipc	t1,0x4
+80002b18:	6e430313          	addi	t1,t1,1764 # 800071f8 <user_mapping>
+80002b1c:	03200793          	li	a5,50
+80002b20:	03f88893          	addi	a7,a7,63 # 8003f <_start-0x7ff7ffc1>
+80002b24:	00880813          	addi	a6,a6,8 # 7fc00008 <_start-0x3ffff8>
+80002b28:	0017d613          	srli	a2,a5,0x1
+80002b2c:	011786b3          	add	a3,a5,a7
+80002b30:	00f647b3          	xor	a5,a2,a5
+80002b34:	010705b3          	add	a1,a4,a6
+80002b38:	00c69693          	slli	a3,a3,0xc
+80002b3c:	00579793          	slli	a5,a5,0x5
+80002b40:	00d72023          	sw	a3,0(a4)
+80002b44:	00b72223          	sw	a1,4(a4)
+80002b48:	0207f793          	andi	a5,a5,32
+80002b4c:	00870713          	addi	a4,a4,8
+80002b50:	00f667b3          	or	a5,a2,a5
+80002b54:	fce31ae3          	bne	t1,a4,80002b28 <vm_boot+0xe8>
+80002b58:	00050413          	mv	s0,a0
+80002b5c:	09000613          	li	a2,144
+80002b60:	00000593          	li	a1,0
+80002b64:	00010513          	mv	a0,sp
+80002b68:	00004797          	auipc	a5,0x4
+80002b6c:	6807a623          	sw	zero,1676(a5) # 800071f4 <freelist_nodes+0x1f4>
+80002b70:	cecff0ef          	jal	ra,8000205c <memset>
+80002b74:	800007b7          	lui	a5,0x80000
+80002b78:	00f40433          	add	s0,s0,a5
+80002b7c:	00010513          	mv	a0,sp
+80002b80:	08812223          	sw	s0,132(sp)
+80002b84:	cb8fd0ef          	jal	ra,8000003c <pop_tf>
+80002b88:	09c12083          	lw	ra,156(sp)
+80002b8c:	09812403          	lw	s0,152(sp)
+80002b90:	0a010113          	addi	sp,sp,160
+80002b94:	00008067          	ret
+80002b98:	025e77b7          	lui	a5,0x25e7
+80002b9c:	00080637          	lui	a2,0x80
+80002ba0:	a0978793          	addi	a5,a5,-1527 # 25e6a09 <_start-0x7da195f7>
+80002ba4:	ffc60613          	addi	a2,a2,-4 # 7fffc <_start-0x7ff80004>
+80002ba8:	800005b7          	lui	a1,0x80000
+80002bac:	00c7f733          	and	a4,a5,a2
+80002bb0:	0017f693          	andi	a3,a5,1
+80002bb4:	00b70733          	add	a4,a4,a1
+80002bb8:	00068e63          	beqz	a3,80002bd4 <vm_boot+0x194>
+80002bbc:	0007202f          	amoadd.w	zero,zero,(a4)
+80002bc0:	0017d793          	srli	a5,a5,0x1
+80002bc4:	00c7f733          	and	a4,a5,a2
+80002bc8:	0017f693          	andi	a3,a5,1
+80002bcc:	00b70733          	add	a4,a4,a1
+80002bd0:	fe0696e3          	bnez	a3,80002bbc <vm_boot+0x17c>
+80002bd4:	00072003          	lw	zero,0(a4)
+80002bd8:	0017d793          	srli	a5,a5,0x1
+80002bdc:	fe9ff06f          	j	80002bc4 <vm_boot+0x184>
+
+80002be0 <userstart>:
+80002be0:	00301073          	fssr	zero
+
+80002be4 <test_2>:
+80002be4:	00200193          	li	gp,2
+80002be8:	00001517          	auipc	a0,0x1
+80002bec:	41850513          	addi	a0,a0,1048 # 80004000 <test_2_data>
+80002bf0:	00052007          	flw	ft0,0(a0)
+80002bf4:	00452087          	flw	ft1,4(a0)
+80002bf8:	00852107          	flw	ft2,8(a0)
+80002bfc:	00c52683          	lw	a3,12(a0)
+80002c00:	281001d3          	fmin.s	ft3,ft0,ft1
+80002c04:	e0018553          	fmv.x.w	a0,ft3
+80002c08:	001015f3          	fsflags	a1,zero
+80002c0c:	00000613          	li	a2,0
+80002c10:	38d51063          	bne	a0,a3,80002f90 <fail>
+80002c14:	36c59e63          	bne	a1,a2,80002f90 <fail>
+
+80002c18 <test_3>:
+80002c18:	00300193          	li	gp,3
+80002c1c:	00001517          	auipc	a0,0x1
+80002c20:	3f450513          	addi	a0,a0,1012 # 80004010 <test_3_data>
+80002c24:	00052007          	flw	ft0,0(a0)
+80002c28:	00452087          	flw	ft1,4(a0)
+80002c2c:	00852107          	flw	ft2,8(a0)
+80002c30:	00c52683          	lw	a3,12(a0)
+80002c34:	281001d3          	fmin.s	ft3,ft0,ft1
+80002c38:	e0018553          	fmv.x.w	a0,ft3
+80002c3c:	001015f3          	fsflags	a1,zero
+80002c40:	00000613          	li	a2,0
+80002c44:	34d51663          	bne	a0,a3,80002f90 <fail>
+80002c48:	34c59463          	bne	a1,a2,80002f90 <fail>
+
+80002c4c <test_4>:
+80002c4c:	00400193          	li	gp,4
+80002c50:	00001517          	auipc	a0,0x1
+80002c54:	3d050513          	addi	a0,a0,976 # 80004020 <test_4_data>
+80002c58:	00052007          	flw	ft0,0(a0)
+80002c5c:	00452087          	flw	ft1,4(a0)
+80002c60:	00852107          	flw	ft2,8(a0)
+80002c64:	00c52683          	lw	a3,12(a0)
+80002c68:	281001d3          	fmin.s	ft3,ft0,ft1
+80002c6c:	e0018553          	fmv.x.w	a0,ft3
+80002c70:	001015f3          	fsflags	a1,zero
+80002c74:	00000613          	li	a2,0
+80002c78:	30d51c63          	bne	a0,a3,80002f90 <fail>
+80002c7c:	30c59a63          	bne	a1,a2,80002f90 <fail>
+
+80002c80 <test_5>:
+80002c80:	00500193          	li	gp,5
+80002c84:	00001517          	auipc	a0,0x1
+80002c88:	3ac50513          	addi	a0,a0,940 # 80004030 <test_5_data>
+80002c8c:	00052007          	flw	ft0,0(a0)
+80002c90:	00452087          	flw	ft1,4(a0)
+80002c94:	00852107          	flw	ft2,8(a0)
+80002c98:	00c52683          	lw	a3,12(a0)
+80002c9c:	281001d3          	fmin.s	ft3,ft0,ft1
+80002ca0:	e0018553          	fmv.x.w	a0,ft3
+80002ca4:	001015f3          	fsflags	a1,zero
+80002ca8:	00000613          	li	a2,0
+80002cac:	2ed51263          	bne	a0,a3,80002f90 <fail>
+80002cb0:	2ec59063          	bne	a1,a2,80002f90 <fail>
+
+80002cb4 <test_6>:
+80002cb4:	00600193          	li	gp,6
+80002cb8:	00001517          	auipc	a0,0x1
+80002cbc:	38850513          	addi	a0,a0,904 # 80004040 <test_6_data>
+80002cc0:	00052007          	flw	ft0,0(a0)
+80002cc4:	00452087          	flw	ft1,4(a0)
+80002cc8:	00852107          	flw	ft2,8(a0)
+80002ccc:	00c52683          	lw	a3,12(a0)
+80002cd0:	281001d3          	fmin.s	ft3,ft0,ft1
+80002cd4:	e0018553          	fmv.x.w	a0,ft3
+80002cd8:	001015f3          	fsflags	a1,zero
+80002cdc:	00000613          	li	a2,0
+80002ce0:	2ad51863          	bne	a0,a3,80002f90 <fail>
+80002ce4:	2ac59663          	bne	a1,a2,80002f90 <fail>
+
+80002ce8 <test_7>:
+80002ce8:	00700193          	li	gp,7
+80002cec:	00001517          	auipc	a0,0x1
+80002cf0:	36450513          	addi	a0,a0,868 # 80004050 <test_7_data>
+80002cf4:	00052007          	flw	ft0,0(a0)
+80002cf8:	00452087          	flw	ft1,4(a0)
+80002cfc:	00852107          	flw	ft2,8(a0)
+80002d00:	00c52683          	lw	a3,12(a0)
+80002d04:	281001d3          	fmin.s	ft3,ft0,ft1
+80002d08:	e0018553          	fmv.x.w	a0,ft3
+80002d0c:	001015f3          	fsflags	a1,zero
+80002d10:	00000613          	li	a2,0
+80002d14:	26d51e63          	bne	a0,a3,80002f90 <fail>
+80002d18:	26c59c63          	bne	a1,a2,80002f90 <fail>
+
+80002d1c <test_12>:
+80002d1c:	00c00193          	li	gp,12
+80002d20:	00001517          	auipc	a0,0x1
+80002d24:	34050513          	addi	a0,a0,832 # 80004060 <test_12_data>
+80002d28:	00052007          	flw	ft0,0(a0)
+80002d2c:	00452087          	flw	ft1,4(a0)
+80002d30:	00852107          	flw	ft2,8(a0)
+80002d34:	00c52683          	lw	a3,12(a0)
+80002d38:	281011d3          	fmax.s	ft3,ft0,ft1
+80002d3c:	e0018553          	fmv.x.w	a0,ft3
+80002d40:	001015f3          	fsflags	a1,zero
+80002d44:	00000613          	li	a2,0
+80002d48:	24d51463          	bne	a0,a3,80002f90 <fail>
+80002d4c:	24c59263          	bne	a1,a2,80002f90 <fail>
+
+80002d50 <test_13>:
+80002d50:	00d00193          	li	gp,13
+80002d54:	00001517          	auipc	a0,0x1
+80002d58:	31c50513          	addi	a0,a0,796 # 80004070 <test_13_data>
+80002d5c:	00052007          	flw	ft0,0(a0)
+80002d60:	00452087          	flw	ft1,4(a0)
+80002d64:	00852107          	flw	ft2,8(a0)
+80002d68:	00c52683          	lw	a3,12(a0)
+80002d6c:	281011d3          	fmax.s	ft3,ft0,ft1
+80002d70:	e0018553          	fmv.x.w	a0,ft3
+80002d74:	001015f3          	fsflags	a1,zero
+80002d78:	00000613          	li	a2,0
+80002d7c:	20d51a63          	bne	a0,a3,80002f90 <fail>
+80002d80:	20c59863          	bne	a1,a2,80002f90 <fail>
+
+80002d84 <test_14>:
+80002d84:	00e00193          	li	gp,14
+80002d88:	00001517          	auipc	a0,0x1
+80002d8c:	2f850513          	addi	a0,a0,760 # 80004080 <test_14_data>
+80002d90:	00052007          	flw	ft0,0(a0)
+80002d94:	00452087          	flw	ft1,4(a0)
+80002d98:	00852107          	flw	ft2,8(a0)
+80002d9c:	00c52683          	lw	a3,12(a0)
+80002da0:	281011d3          	fmax.s	ft3,ft0,ft1
+80002da4:	e0018553          	fmv.x.w	a0,ft3
+80002da8:	001015f3          	fsflags	a1,zero
+80002dac:	00000613          	li	a2,0
+80002db0:	1ed51063          	bne	a0,a3,80002f90 <fail>
+80002db4:	1cc59e63          	bne	a1,a2,80002f90 <fail>
+
+80002db8 <test_15>:
+80002db8:	00f00193          	li	gp,15
+80002dbc:	00001517          	auipc	a0,0x1
+80002dc0:	2d450513          	addi	a0,a0,724 # 80004090 <test_15_data>
+80002dc4:	00052007          	flw	ft0,0(a0)
+80002dc8:	00452087          	flw	ft1,4(a0)
+80002dcc:	00852107          	flw	ft2,8(a0)
+80002dd0:	00c52683          	lw	a3,12(a0)
+80002dd4:	281011d3          	fmax.s	ft3,ft0,ft1
+80002dd8:	e0018553          	fmv.x.w	a0,ft3
+80002ddc:	001015f3          	fsflags	a1,zero
+80002de0:	00000613          	li	a2,0
+80002de4:	1ad51663          	bne	a0,a3,80002f90 <fail>
+80002de8:	1ac59463          	bne	a1,a2,80002f90 <fail>
+
+80002dec <test_16>:
+80002dec:	01000193          	li	gp,16
+80002df0:	00001517          	auipc	a0,0x1
+80002df4:	2b050513          	addi	a0,a0,688 # 800040a0 <test_16_data>
+80002df8:	00052007          	flw	ft0,0(a0)
+80002dfc:	00452087          	flw	ft1,4(a0)
+80002e00:	00852107          	flw	ft2,8(a0)
+80002e04:	00c52683          	lw	a3,12(a0)
+80002e08:	281011d3          	fmax.s	ft3,ft0,ft1
+80002e0c:	e0018553          	fmv.x.w	a0,ft3
+80002e10:	001015f3          	fsflags	a1,zero
+80002e14:	00000613          	li	a2,0
+80002e18:	16d51c63          	bne	a0,a3,80002f90 <fail>
+80002e1c:	16c59a63          	bne	a1,a2,80002f90 <fail>
+
+80002e20 <test_17>:
+80002e20:	01100193          	li	gp,17
+80002e24:	00001517          	auipc	a0,0x1
+80002e28:	28c50513          	addi	a0,a0,652 # 800040b0 <test_17_data>
+80002e2c:	00052007          	flw	ft0,0(a0)
+80002e30:	00452087          	flw	ft1,4(a0)
+80002e34:	00852107          	flw	ft2,8(a0)
+80002e38:	00c52683          	lw	a3,12(a0)
+80002e3c:	281011d3          	fmax.s	ft3,ft0,ft1
+80002e40:	e0018553          	fmv.x.w	a0,ft3
+80002e44:	001015f3          	fsflags	a1,zero
+80002e48:	00000613          	li	a2,0
+80002e4c:	14d51263          	bne	a0,a3,80002f90 <fail>
+80002e50:	14c59063          	bne	a1,a2,80002f90 <fail>
+
+80002e54 <test_20>:
+80002e54:	01400193          	li	gp,20
+80002e58:	00001517          	auipc	a0,0x1
+80002e5c:	26850513          	addi	a0,a0,616 # 800040c0 <test_20_data>
+80002e60:	00052007          	flw	ft0,0(a0)
+80002e64:	00452087          	flw	ft1,4(a0)
+80002e68:	00852107          	flw	ft2,8(a0)
+80002e6c:	00c52683          	lw	a3,12(a0)
+80002e70:	281011d3          	fmax.s	ft3,ft0,ft1
+80002e74:	e0018553          	fmv.x.w	a0,ft3
+80002e78:	001015f3          	fsflags	a1,zero
+80002e7c:	01000613          	li	a2,16
+80002e80:	10d51863          	bne	a0,a3,80002f90 <fail>
+80002e84:	10c59663          	bne	a1,a2,80002f90 <fail>
+
+80002e88 <test_21>:
+80002e88:	01500193          	li	gp,21
+80002e8c:	00001517          	auipc	a0,0x1
+80002e90:	24450513          	addi	a0,a0,580 # 800040d0 <test_21_data>
+80002e94:	00052007          	flw	ft0,0(a0)
+80002e98:	00452087          	flw	ft1,4(a0)
+80002e9c:	00852107          	flw	ft2,8(a0)
+80002ea0:	00c52683          	lw	a3,12(a0)
+80002ea4:	281011d3          	fmax.s	ft3,ft0,ft1
+80002ea8:	e0018553          	fmv.x.w	a0,ft3
+80002eac:	001015f3          	fsflags	a1,zero
+80002eb0:	00000613          	li	a2,0
+80002eb4:	0cd51e63          	bne	a0,a3,80002f90 <fail>
+80002eb8:	0cc59c63          	bne	a1,a2,80002f90 <fail>
+
+80002ebc <test_30>:
+80002ebc:	01e00193          	li	gp,30
+80002ec0:	00001517          	auipc	a0,0x1
+80002ec4:	22050513          	addi	a0,a0,544 # 800040e0 <test_30_data>
+80002ec8:	00052007          	flw	ft0,0(a0)
+80002ecc:	00452087          	flw	ft1,4(a0)
+80002ed0:	00852107          	flw	ft2,8(a0)
+80002ed4:	00c52683          	lw	a3,12(a0)
+80002ed8:	281001d3          	fmin.s	ft3,ft0,ft1
+80002edc:	e0018553          	fmv.x.w	a0,ft3
+80002ee0:	001015f3          	fsflags	a1,zero
+80002ee4:	00000613          	li	a2,0
+80002ee8:	0ad51463          	bne	a0,a3,80002f90 <fail>
+80002eec:	0ac59263          	bne	a1,a2,80002f90 <fail>
+
+80002ef0 <test_31>:
+80002ef0:	01f00193          	li	gp,31
+80002ef4:	00001517          	auipc	a0,0x1
+80002ef8:	1fc50513          	addi	a0,a0,508 # 800040f0 <test_31_data>
+80002efc:	00052007          	flw	ft0,0(a0)
+80002f00:	00452087          	flw	ft1,4(a0)
+80002f04:	00852107          	flw	ft2,8(a0)
+80002f08:	00c52683          	lw	a3,12(a0)
+80002f0c:	281001d3          	fmin.s	ft3,ft0,ft1
+80002f10:	e0018553          	fmv.x.w	a0,ft3
+80002f14:	001015f3          	fsflags	a1,zero
+80002f18:	00000613          	li	a2,0
+80002f1c:	06d51a63          	bne	a0,a3,80002f90 <fail>
+80002f20:	06c59863          	bne	a1,a2,80002f90 <fail>
+
+80002f24 <test_32>:
+80002f24:	02000193          	li	gp,32
+80002f28:	00001517          	auipc	a0,0x1
+80002f2c:	1d850513          	addi	a0,a0,472 # 80004100 <test_32_data>
+80002f30:	00052007          	flw	ft0,0(a0)
+80002f34:	00452087          	flw	ft1,4(a0)
+80002f38:	00852107          	flw	ft2,8(a0)
+80002f3c:	00c52683          	lw	a3,12(a0)
+80002f40:	281011d3          	fmax.s	ft3,ft0,ft1
+80002f44:	e0018553          	fmv.x.w	a0,ft3
+80002f48:	001015f3          	fsflags	a1,zero
+80002f4c:	00000613          	li	a2,0
+80002f50:	04d51063          	bne	a0,a3,80002f90 <fail>
+80002f54:	02c59e63          	bne	a1,a2,80002f90 <fail>
+
+80002f58 <test_33>:
+80002f58:	02100193          	li	gp,33
+80002f5c:	00001517          	auipc	a0,0x1
+80002f60:	1b450513          	addi	a0,a0,436 # 80004110 <test_33_data>
+80002f64:	00052007          	flw	ft0,0(a0)
+80002f68:	00452087          	flw	ft1,4(a0)
+80002f6c:	00852107          	flw	ft2,8(a0)
+80002f70:	00c52683          	lw	a3,12(a0)
+80002f74:	281011d3          	fmax.s	ft3,ft0,ft1
+80002f78:	e0018553          	fmv.x.w	a0,ft3
+80002f7c:	001015f3          	fsflags	a1,zero
+80002f80:	00000613          	li	a2,0
+80002f84:	00d51663          	bne	a0,a3,80002f90 <fail>
+80002f88:	00c59463          	bne	a1,a2,80002f90 <fail>
+80002f8c:	00301a63          	bne	zero,gp,80002fa0 <pass>
+
+80002f90 <fail>:
+80002f90:	00119513          	slli	a0,gp,0x1
+80002f94:	00050063          	beqz	a0,80002f94 <fail+0x4>
+80002f98:	00156513          	ori	a0,a0,1
+80002f9c:	00000073          	ecall
+
+80002fa0 <pass>:
+80002fa0:	00100513          	li	a0,1
+80002fa4:	00000073          	ecall
+80002fa8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+80004000 <test_2_data>:
+80004000:	0000                	unimp
+80004002:	4020                	lw	s0,64(s0)
+80004004:	0000                	unimp
+80004006:	3f80                	fld	fs0,56(a5)
+80004008:	0000                	unimp
+8000400a:	0000                	unimp
+8000400c:	0000                	unimp
+8000400e:	3f80                	fld	fs0,56(a5)
+
+80004010 <test_3_data>:
+80004010:	c49a6333          	0xc49a6333
+80004014:	cccd                	beqz	s1,800040ce <test_20_data+0xe>
+80004016:	3f8c                	fld	fa1,56(a5)
+80004018:	0000                	unimp
+8000401a:	0000                	unimp
+8000401c:	c49a6333          	0xc49a6333
+
+80004020 <test_4_data>:
+80004020:	cccd                	beqz	s1,800040da <test_21_data+0xa>
+80004022:	3f8c                	fld	fa1,56(a5)
+80004024:	c49a6333          	0xc49a6333
+80004028:	0000                	unimp
+8000402a:	0000                	unimp
+8000402c:	c49a6333          	0xc49a6333
+
+80004030 <test_5_data>:
+80004030:	ffff                	0xffff
+80004032:	7fff                	0x7fff
+80004034:	c49a6333          	0xc49a6333
+80004038:	0000                	unimp
+8000403a:	0000                	unimp
+8000403c:	c49a6333          	0xc49a6333
+
+80004040 <test_6_data>:
+80004040:	40490fdb          	0x40490fdb
+80004044:	322bcc77          	0x322bcc77
+80004048:	0000                	unimp
+8000404a:	0000                	unimp
+8000404c:	322bcc77          	0x322bcc77
+
+80004050 <test_7_data>:
+80004050:	0000                	unimp
+80004052:	bf80                	fsd	fs0,56(a5)
+80004054:	0000                	unimp
+80004056:	c000                	sw	s0,0(s0)
+80004058:	0000                	unimp
+8000405a:	0000                	unimp
+8000405c:	0000                	unimp
+8000405e:	c000                	sw	s0,0(s0)
+
+80004060 <test_12_data>:
+80004060:	0000                	unimp
+80004062:	4020                	lw	s0,64(s0)
+80004064:	0000                	unimp
+80004066:	3f80                	fld	fs0,56(a5)
+80004068:	0000                	unimp
+8000406a:	0000                	unimp
+8000406c:	0000                	unimp
+8000406e:	4020                	lw	s0,64(s0)
+
+80004070 <test_13_data>:
+80004070:	c49a6333          	0xc49a6333
+80004074:	cccd                	beqz	s1,8000412e <begin_signature+0xe>
+80004076:	3f8c                	fld	fa1,56(a5)
+80004078:	0000                	unimp
+8000407a:	0000                	unimp
+8000407c:	cccd                	beqz	s1,80004136 <begin_signature+0x16>
+8000407e:	3f8c                	fld	fa1,56(a5)
+
+80004080 <test_14_data>:
+80004080:	cccd                	beqz	s1,8000413a <begin_signature+0x1a>
+80004082:	3f8c                	fld	fa1,56(a5)
+80004084:	c49a6333          	0xc49a6333
+80004088:	0000                	unimp
+8000408a:	0000                	unimp
+8000408c:	cccd                	beqz	s1,80004146 <begin_signature+0x26>
+8000408e:	3f8c                	fld	fa1,56(a5)
+
+80004090 <test_15_data>:
+80004090:	ffff                	0xffff
+80004092:	7fff                	0x7fff
+80004094:	c49a6333          	0xc49a6333
+80004098:	0000                	unimp
+8000409a:	0000                	unimp
+8000409c:	c49a6333          	0xc49a6333
+
+800040a0 <test_16_data>:
+800040a0:	40490fdb          	0x40490fdb
+800040a4:	322bcc77          	0x322bcc77
+800040a8:	0000                	unimp
+800040aa:	0000                	unimp
+800040ac:	40490fdb          	0x40490fdb
+
+800040b0 <test_17_data>:
+800040b0:	0000                	unimp
+800040b2:	bf80                	fsd	fs0,56(a5)
+800040b4:	0000                	unimp
+800040b6:	c000                	sw	s0,0(s0)
+800040b8:	0000                	unimp
+800040ba:	0000                	unimp
+800040bc:	0000                	unimp
+800040be:	bf80                	fsd	fs0,56(a5)
+
+800040c0 <test_20_data>:
+800040c0:	0001                	nop
+800040c2:	7f80                	flw	fs0,56(a5)
+800040c4:	0000                	unimp
+800040c6:	3f80                	fld	fs0,56(a5)
+800040c8:	0000                	unimp
+800040ca:	0000                	unimp
+800040cc:	0000                	unimp
+800040ce:	3f80                	fld	fs0,56(a5)
+
+800040d0 <test_21_data>:
+800040d0:	ffff                	0xffff
+800040d2:	7fff                	0x7fff
+800040d4:	ffff                	0xffff
+800040d6:	7fff                	0x7fff
+800040d8:	0000                	unimp
+800040da:	0000                	unimp
+800040dc:	0000                	unimp
+800040de:	7fc0                	flw	fs0,60(a5)
+
+800040e0 <test_30_data>:
+800040e0:	0000                	unimp
+800040e2:	8000                	0x8000
+800040e4:	0000                	unimp
+800040e6:	0000                	unimp
+800040e8:	0000                	unimp
+800040ea:	0000                	unimp
+800040ec:	0000                	unimp
+800040ee:	8000                	0x8000
+
+800040f0 <test_31_data>:
+800040f0:	0000                	unimp
+800040f2:	0000                	unimp
+800040f4:	0000                	unimp
+800040f6:	8000                	0x8000
+800040f8:	0000                	unimp
+800040fa:	0000                	unimp
+800040fc:	0000                	unimp
+800040fe:	8000                	0x8000
+
+80004100 <test_32_data>:
+80004100:	0000                	unimp
+80004102:	8000                	0x8000
+80004104:	0000                	unimp
+80004106:	0000                	unimp
+80004108:	0000                	unimp
+8000410a:	0000                	unimp
+8000410c:	0000                	unimp
+8000410e:	0000                	unimp
+
+80004110 <test_33_data>:
+80004110:	0000                	unimp
+80004112:	0000                	unimp
+80004114:	0000                	unimp
+80004116:	8000                	0x8000
+80004118:	0000                	unimp
+8000411a:	0000                	unimp
+8000411c:	0000                	unimp
+8000411e:	0000                	unimp
diff --git a/test/riscv-tests/rv32uf-v-fmin.elf b/test/riscv-tests/rv32uf-v-fmin.elf
new file mode 100644
index 0000000..072abdd
--- /dev/null
+++ b/test/riscv-tests/rv32uf-v-fmin.elf
diff --git a/test/riscv-tests/rv64ud-p-fadd.dump b/test/riscv-tests/rv64ud-p-fadd.dump
new file mode 100644
index 0000000..2775cc5
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fadd.dump
@@ -0,0 +1,422 @@
+
+rv64ud-p-fadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	021071d3          	fadd.d	ft3,ft0,ft1
+    80000128:	e2018553          	fmv.x.d	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	1ed51063          	bne	a0,a3,80000314 <fail>
+    80000138:	1cc59e63          	bne	a1,a2,80000314 <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ee050513          	addi	a0,a0,-288 # 80002020 <test_3_data>
+    80000148:	00053007          	fld	ft0,0(a0)
+    8000014c:	00853087          	fld	ft1,8(a0)
+    80000150:	01053107          	fld	ft2,16(a0)
+    80000154:	01853683          	ld	a3,24(a0)
+    80000158:	021071d3          	fadd.d	ft3,ft0,ft1
+    8000015c:	e2018553          	fmv.x.d	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	1ad51663          	bne	a0,a3,80000314 <fail>
+    8000016c:	1ac59463          	bne	a1,a2,80000314 <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	ecc50513          	addi	a0,a0,-308 # 80002040 <test_4_data>
+    8000017c:	00053007          	fld	ft0,0(a0)
+    80000180:	00853087          	fld	ft1,8(a0)
+    80000184:	01053107          	fld	ft2,16(a0)
+    80000188:	01853683          	ld	a3,24(a0)
+    8000018c:	021071d3          	fadd.d	ft3,ft0,ft1
+    80000190:	e2018553          	fmv.x.d	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00100613          	li	a2,1
+    8000019c:	16d51c63          	bne	a0,a3,80000314 <fail>
+    800001a0:	16c59a63          	bne	a1,a2,80000314 <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	eb850513          	addi	a0,a0,-328 # 80002060 <test_5_data>
+    800001b0:	00053007          	fld	ft0,0(a0)
+    800001b4:	00853087          	fld	ft1,8(a0)
+    800001b8:	01053107          	fld	ft2,16(a0)
+    800001bc:	01853683          	ld	a3,24(a0)
+    800001c0:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    800001c4:	e2018553          	fmv.x.d	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	14d51263          	bne	a0,a3,80000314 <fail>
+    800001d4:	14c59063          	bne	a1,a2,80000314 <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	ea450513          	addi	a0,a0,-348 # 80002080 <test_6_data>
+    800001e4:	00053007          	fld	ft0,0(a0)
+    800001e8:	00853087          	fld	ft1,8(a0)
+    800001ec:	01053107          	fld	ft2,16(a0)
+    800001f0:	01853683          	ld	a3,24(a0)
+    800001f4:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    800001f8:	e2018553          	fmv.x.d	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00100613          	li	a2,1
+    80000204:	10d51863          	bne	a0,a3,80000314 <fail>
+    80000208:	10c59663          	bne	a1,a2,80000314 <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e9050513          	addi	a0,a0,-368 # 800020a0 <test_7_data>
+    80000218:	00053007          	fld	ft0,0(a0)
+    8000021c:	00853087          	fld	ft1,8(a0)
+    80000220:	01053107          	fld	ft2,16(a0)
+    80000224:	01853683          	ld	a3,24(a0)
+    80000228:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    8000022c:	e2018553          	fmv.x.d	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00100613          	li	a2,1
+    80000238:	0cd51e63          	bne	a0,a3,80000314 <fail>
+    8000023c:	0cc59c63          	bne	a1,a2,80000314 <fail>
+
+0000000080000240 <test_8>:
+    80000240:	00800193          	li	gp,8
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e7c50513          	addi	a0,a0,-388 # 800020c0 <test_8_data>
+    8000024c:	00053007          	fld	ft0,0(a0)
+    80000250:	00853087          	fld	ft1,8(a0)
+    80000254:	01053107          	fld	ft2,16(a0)
+    80000258:	01853683          	ld	a3,24(a0)
+    8000025c:	121071d3          	fmul.d	ft3,ft0,ft1
+    80000260:	e2018553          	fmv.x.d	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	0ad51463          	bne	a0,a3,80000314 <fail>
+    80000270:	0ac59263          	bne	a1,a2,80000314 <fail>
+
+0000000080000274 <test_9>:
+    80000274:	00900193          	li	gp,9
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	e6850513          	addi	a0,a0,-408 # 800020e0 <test_9_data>
+    80000280:	00053007          	fld	ft0,0(a0)
+    80000284:	00853087          	fld	ft1,8(a0)
+    80000288:	01053107          	fld	ft2,16(a0)
+    8000028c:	01853683          	ld	a3,24(a0)
+    80000290:	121071d3          	fmul.d	ft3,ft0,ft1
+    80000294:	e2018553          	fmv.x.d	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00100613          	li	a2,1
+    800002a0:	06d51a63          	bne	a0,a3,80000314 <fail>
+    800002a4:	06c59863          	bne	a1,a2,80000314 <fail>
+
+00000000800002a8 <test_10>:
+    800002a8:	00a00193          	li	gp,10
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	e5450513          	addi	a0,a0,-428 # 80002100 <test_10_data>
+    800002b4:	00053007          	fld	ft0,0(a0)
+    800002b8:	00853087          	fld	ft1,8(a0)
+    800002bc:	01053107          	fld	ft2,16(a0)
+    800002c0:	01853683          	ld	a3,24(a0)
+    800002c4:	121071d3          	fmul.d	ft3,ft0,ft1
+    800002c8:	e2018553          	fmv.x.d	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00100613          	li	a2,1
+    800002d4:	04d51063          	bne	a0,a3,80000314 <fail>
+    800002d8:	02c59e63          	bne	a1,a2,80000314 <fail>
+
+00000000800002dc <test_11>:
+    800002dc:	00b00193          	li	gp,11
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	e4050513          	addi	a0,a0,-448 # 80002120 <test_11_data>
+    800002e8:	00053007          	fld	ft0,0(a0)
+    800002ec:	00853087          	fld	ft1,8(a0)
+    800002f0:	01053107          	fld	ft2,16(a0)
+    800002f4:	01853683          	ld	a3,24(a0)
+    800002f8:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    800002fc:	e2018553          	fmv.x.d	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	01000613          	li	a2,16
+    80000308:	00d51663          	bne	a0,a3,80000314 <fail>
+    8000030c:	00c59463          	bne	a1,a2,80000314 <fail>
+    80000310:	00301c63          	bne	zero,gp,80000328 <pass>
+
+0000000080000314 <fail>:
+    80000314:	0ff0000f          	fence
+    80000318:	00018063          	beqz	gp,80000318 <fail+0x4>
+    8000031c:	00119193          	slli	gp,gp,0x1
+    80000320:	0011e193          	ori	gp,gp,1
+    80000324:	00000073          	ecall
+
+0000000080000328 <pass>:
+    80000328:	0ff0000f          	fence
+    8000032c:	00100193          	li	gp,1
+    80000330:	00000073          	ecall
+    80000334:	c0001073          	unimp
+    80000338:	0000                	unimp
+    8000033a:	0000                	unimp
+    8000033c:	0000                	unimp
+    8000033e:	0000                	unimp
+    80000340:	0000                	unimp
+    80000342:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	0000                	unimp
+    80002004:	0000                	unimp
+    80002006:	4004                	lw	s1,0(s0)
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	3ff0                	fld	fa2,248(a5)
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	0000                	unimp
+    8000201e:	400c                	lw	a1,0(s0)
+
+0000000080002020 <test_3_data>:
+    80002020:	6666                	ld	a2,88(sp)
+    80002022:	6666                	ld	a2,88(sp)
+    80002024:	4c66                	lw	s8,88(sp)
+    80002026:	999ac093          	xori	ra,s5,-1639
+    8000202a:	9999                	andi	a1,a1,-26
+    8000202c:	9999                	andi	a1,a1,-26
+    8000202e:	3ff1                	addiw	t6,t6,-4
+    80002030:	0000                	unimp
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	4800                	lw	s0,16(s0)
+    8000203e:	          	xori	ra,gp,-689
+
+0000000080002040 <test_4_data>:
+    80002040:	d4f1                	beqz	s1,8000200c <test_2_data+0xc>
+    80002042:	53c8                	lw	a0,36(a5)
+    80002044:	400921fb          	0x400921fb
+    80002048:	8c3a                	mv	s8,a4
+    8000204a:	e230                	sd	a2,64(a2)
+    8000204c:	798e                	ld	s3,224(sp)
+    8000204e:	3e45                	addiw	t3,t3,-15
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	6ddf 5520 21fb      	0x21fb55206ddf
+    8000205e:	4009                	c.li	zero,2
+
+0000000080002060 <test_5_data>:
+    80002060:	0000                	unimp
+    80002062:	0000                	unimp
+    80002064:	0000                	unimp
+    80002066:	4004                	lw	s1,0(s0)
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	3ff0                	fld	fa2,248(a5)
+    80002070:	0000                	unimp
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	3ff8                	fld	fa4,248(a5)
+
+0000000080002080 <test_6_data>:
+    80002080:	6666                	ld	a2,88(sp)
+    80002082:	6666                	ld	a2,88(sp)
+    80002084:	4c66                	lw	s8,88(sp)
+    80002086:	999ac093          	xori	ra,s5,-1639
+    8000208a:	9999                	andi	a1,a1,-26
+    8000208c:	9999                	andi	a1,a1,-26
+    8000208e:	bff1                	j	8000206a <test_5_data+0xa>
+    80002090:	0000                	unimp
+    80002092:	0000                	unimp
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	4800                	lw	s0,16(s0)
+    8000209e:	          	xori	ra,gp,-689
+
+00000000800020a0 <test_7_data>:
+    800020a0:	d4f1                	beqz	s1,8000206c <test_5_data+0xc>
+    800020a2:	53c8                	lw	a0,36(a5)
+    800020a4:	400921fb          	0x400921fb
+    800020a8:	8c3a                	mv	s8,a4
+    800020aa:	e230                	sd	a2,64(a2)
+    800020ac:	798e                	ld	s3,224(sp)
+    800020ae:	3e45                	addiw	t3,t3,-15
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	52713c03          	ld	s8,1319(sp)
+    800020bc:	400921fb          	0x400921fb
+
+00000000800020c0 <test_8_data>:
+    800020c0:	0000                	unimp
+    800020c2:	0000                	unimp
+    800020c4:	0000                	unimp
+    800020c6:	4004                	lw	s1,0(s0)
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	3ff0                	fld	fa2,248(a5)
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	4004                	lw	s1,0(s0)
+
+00000000800020e0 <test_9_data>:
+    800020e0:	6666                	ld	a2,88(sp)
+    800020e2:	6666                	ld	a2,88(sp)
+    800020e4:	4c66                	lw	s8,88(sp)
+    800020e6:	999ac093          	xori	ra,s5,-1639
+    800020ea:	9999                	andi	a1,a1,-26
+    800020ec:	9999                	andi	a1,a1,-26
+    800020ee:	bff1                	j	800020ca <test_8_data+0xa>
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	0a3d                	addi	s4,s4,15
+    800020fa:	3a70a3d7          	0x3a70a3d7
+    800020fe:	4095                	li	ra,5
+
+0000000080002100 <test_10_data>:
+    80002100:	d4f1                	beqz	s1,800020cc <test_8_data+0xc>
+    80002102:	53c8                	lw	a0,36(a5)
+    80002104:	400921fb          	0x400921fb
+    80002108:	8c3a                	mv	s8,a4
+    8000210a:	e230                	sd	a2,64(a2)
+    8000210c:	798e                	ld	s3,224(sp)
+    8000210e:	3e45                	addiw	t3,t3,-15
+    80002110:	0000                	unimp
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	0000                	unimp
+    80002118:	ff09                	bnez	a4,80002032 <test_3_data+0x12>
+    8000211a:	a5c1                	j	800027da <_end+0x69a>
+    8000211c:	ddc5                	beqz	a1,800020d4 <test_8_data+0x14>
+    8000211e:	3e60                	fld	fs0,248(a2)
+
+0000000080002120 <test_11_data>:
+    80002120:	0000                	unimp
+    80002122:	0000                	unimp
+    80002124:	0000                	unimp
+    80002126:	7ff0                	ld	a2,248(a5)
+    80002128:	0000                	unimp
+    8000212a:	0000                	unimp
+    8000212c:	0000                	unimp
+    8000212e:	7ff0                	ld	a2,248(a5)
+    80002130:	0000                	unimp
+    80002132:	0000                	unimp
+    80002134:	0000                	unimp
+    80002136:	0000                	unimp
+    80002138:	0000                	unimp
+    8000213a:	0000                	unimp
+    8000213c:	0000                	unimp
+    8000213e:	7ff8                	ld	a4,248(a5)
diff --git a/test/riscv-tests/rv64ud-p-fadd.elf b/test/riscv-tests/rv64ud-p-fadd.elf
new file mode 100644
index 0000000..eaa35c6
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fadd.elf
diff --git a/test/riscv-tests/rv64ud-p-fclass.dump b/test/riscv-tests/rv64ud-p-fclass.dump
new file mode 100644
index 0000000..8fb0b28
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fclass.dump
@@ -0,0 +1,212 @@
+
+rv64ud-p-fclass:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	fff0051b          	addiw	a0,zero,-1
+    8000010c:	03451513          	slli	a0,a0,0x34
+    80000110:	f2050553          	fmv.d.x	fa0,a0
+    80000114:	e2051553          	fclass.d	a0,fa0
+    80000118:	00100e93          	li	t4,1
+    8000011c:	00200193          	li	gp,2
+    80000120:	11d51863          	bne	a0,t4,80000230 <fail>
+
+0000000080000124 <test_3>:
+    80000124:	bff0051b          	addiw	a0,zero,-1025
+    80000128:	03451513          	slli	a0,a0,0x34
+    8000012c:	f2050553          	fmv.d.x	fa0,a0
+    80000130:	e2051553          	fclass.d	a0,fa0
+    80000134:	00200e93          	li	t4,2
+    80000138:	00300193          	li	gp,3
+    8000013c:	0fd51a63          	bne	a0,t4,80000230 <fail>
+
+0000000080000140 <test_4>:
+    80000140:	8010051b          	addiw	a0,zero,-2047
+    80000144:	03451513          	slli	a0,a0,0x34
+    80000148:	fff50513          	addi	a0,a0,-1 # 1fff <_start-0x7fffe001>
+    8000014c:	f2050553          	fmv.d.x	fa0,a0
+    80000150:	e2051553          	fclass.d	a0,fa0
+    80000154:	00400e93          	li	t4,4
+    80000158:	00400193          	li	gp,4
+    8000015c:	0dd51a63          	bne	a0,t4,80000230 <fail>
+
+0000000080000160 <test_5>:
+    80000160:	fff0051b          	addiw	a0,zero,-1
+    80000164:	03f51513          	slli	a0,a0,0x3f
+    80000168:	f2050553          	fmv.d.x	fa0,a0
+    8000016c:	e2051553          	fclass.d	a0,fa0
+    80000170:	00800e93          	li	t4,8
+    80000174:	00500193          	li	gp,5
+    80000178:	0bd51c63          	bne	a0,t4,80000230 <fail>
+
+000000008000017c <test_6>:
+    8000017c:	00000513          	li	a0,0
+    80000180:	f2050553          	fmv.d.x	fa0,a0
+    80000184:	e2051553          	fclass.d	a0,fa0
+    80000188:	01000e93          	li	t4,16
+    8000018c:	00600193          	li	gp,6
+    80000190:	0bd51063          	bne	a0,t4,80000230 <fail>
+
+0000000080000194 <test_7>:
+    80000194:	0010051b          	addiw	a0,zero,1
+    80000198:	03451513          	slli	a0,a0,0x34
+    8000019c:	fff50513          	addi	a0,a0,-1
+    800001a0:	f2050553          	fmv.d.x	fa0,a0
+    800001a4:	e2051553          	fclass.d	a0,fa0
+    800001a8:	02000e93          	li	t4,32
+    800001ac:	00700193          	li	gp,7
+    800001b0:	09d51063          	bne	a0,t4,80000230 <fail>
+
+00000000800001b4 <test_8>:
+    800001b4:	3ff0051b          	addiw	a0,zero,1023
+    800001b8:	03451513          	slli	a0,a0,0x34
+    800001bc:	f2050553          	fmv.d.x	fa0,a0
+    800001c0:	e2051553          	fclass.d	a0,fa0
+    800001c4:	04000e93          	li	t4,64
+    800001c8:	00800193          	li	gp,8
+    800001cc:	07d51263          	bne	a0,t4,80000230 <fail>
+
+00000000800001d0 <test_9>:
+    800001d0:	7ff0051b          	addiw	a0,zero,2047
+    800001d4:	03451513          	slli	a0,a0,0x34
+    800001d8:	f2050553          	fmv.d.x	fa0,a0
+    800001dc:	e2051553          	fclass.d	a0,fa0
+    800001e0:	08000e93          	li	t4,128
+    800001e4:	00900193          	li	gp,9
+    800001e8:	05d51463          	bne	a0,t4,80000230 <fail>
+
+00000000800001ec <test_10>:
+    800001ec:	7ff0051b          	addiw	a0,zero,2047
+    800001f0:	03451513          	slli	a0,a0,0x34
+    800001f4:	00150513          	addi	a0,a0,1
+    800001f8:	f2050553          	fmv.d.x	fa0,a0
+    800001fc:	e2051553          	fclass.d	a0,fa0
+    80000200:	10000e93          	li	t4,256
+    80000204:	00a00193          	li	gp,10
+    80000208:	03d51463          	bne	a0,t4,80000230 <fail>
+
+000000008000020c <test_11>:
+    8000020c:	00001537          	lui	a0,0x1
+    80000210:	fff5051b          	addiw	a0,a0,-1
+    80000214:	03351513          	slli	a0,a0,0x33
+    80000218:	f2050553          	fmv.d.x	fa0,a0
+    8000021c:	e2051553          	fclass.d	a0,fa0
+    80000220:	20000e93          	li	t4,512
+    80000224:	00b00193          	li	gp,11
+    80000228:	01d51463          	bne	a0,t4,80000230 <fail>
+    8000022c:	00301c63          	bne	zero,gp,80000244 <pass>
+
+0000000080000230 <fail>:
+    80000230:	0ff0000f          	fence
+    80000234:	00018063          	beqz	gp,80000234 <fail+0x4>
+    80000238:	00119193          	slli	gp,gp,0x1
+    8000023c:	0011e193          	ori	gp,gp,1
+    80000240:	00000073          	ecall
+
+0000000080000244 <pass>:
+    80000244:	0ff0000f          	fence
+    80000248:	00100193          	li	gp,1
+    8000024c:	00000073          	ecall
+    80000250:	c0001073          	unimp
+    80000254:	0000                	unimp
+    80000256:	0000                	unimp
+    80000258:	0000                	unimp
+    8000025a:	0000                	unimp
+    8000025c:	0000                	unimp
+    8000025e:	0000                	unimp
+    80000260:	0000                	unimp
+    80000262:	0000                	unimp
+    80000264:	0000                	unimp
+    80000266:	0000                	unimp
+    80000268:	0000                	unimp
+    8000026a:	0000                	unimp
+    8000026c:	0000                	unimp
+    8000026e:	0000                	unimp
+    80000270:	0000                	unimp
+    80000272:	0000                	unimp
+    80000274:	0000                	unimp
+    80000276:	0000                	unimp
+    80000278:	0000                	unimp
+    8000027a:	0000                	unimp
+    8000027c:	0000                	unimp
+    8000027e:	0000                	unimp
+    80000280:	0000                	unimp
+    80000282:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-p-fclass.elf b/test/riscv-tests/rv64ud-p-fclass.elf
new file mode 100644
index 0000000..7c23d49
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fclass.elf
diff --git a/test/riscv-tests/rv64ud-p-fcmp.dump b/test/riscv-tests/rv64ud-p-fcmp.dump
new file mode 100644
index 0000000..3598543
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcmp.dump
@@ -0,0 +1,561 @@
+
+rv64ud-p-fcmp:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	a2102553          	feq.d	a0,ft0,ft1
+    80000128:	001015f3          	fsflags	a1,zero
+    8000012c:	00000613          	li	a2,0
+    80000130:	2ad51663          	bne	a0,a3,800003dc <fail>
+    80000134:	2ac59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000138 <test_3>:
+    80000138:	00300193          	li	gp,3
+    8000013c:	00002517          	auipc	a0,0x2
+    80000140:	ee450513          	addi	a0,a0,-284 # 80002020 <test_3_data>
+    80000144:	00053007          	fld	ft0,0(a0)
+    80000148:	00853087          	fld	ft1,8(a0)
+    8000014c:	01053107          	fld	ft2,16(a0)
+    80000150:	01853683          	ld	a3,24(a0)
+    80000154:	a2100553          	fle.d	a0,ft0,ft1
+    80000158:	001015f3          	fsflags	a1,zero
+    8000015c:	00000613          	li	a2,0
+    80000160:	26d51e63          	bne	a0,a3,800003dc <fail>
+    80000164:	26c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000168 <test_4>:
+    80000168:	00400193          	li	gp,4
+    8000016c:	00002517          	auipc	a0,0x2
+    80000170:	ed450513          	addi	a0,a0,-300 # 80002040 <test_4_data>
+    80000174:	00053007          	fld	ft0,0(a0)
+    80000178:	00853087          	fld	ft1,8(a0)
+    8000017c:	01053107          	fld	ft2,16(a0)
+    80000180:	01853683          	ld	a3,24(a0)
+    80000184:	a2101553          	flt.d	a0,ft0,ft1
+    80000188:	001015f3          	fsflags	a1,zero
+    8000018c:	00000613          	li	a2,0
+    80000190:	24d51663          	bne	a0,a3,800003dc <fail>
+    80000194:	24c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000198 <test_5>:
+    80000198:	00500193          	li	gp,5
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	ec450513          	addi	a0,a0,-316 # 80002060 <test_5_data>
+    800001a4:	00053007          	fld	ft0,0(a0)
+    800001a8:	00853087          	fld	ft1,8(a0)
+    800001ac:	01053107          	fld	ft2,16(a0)
+    800001b0:	01853683          	ld	a3,24(a0)
+    800001b4:	a2102553          	feq.d	a0,ft0,ft1
+    800001b8:	001015f3          	fsflags	a1,zero
+    800001bc:	00000613          	li	a2,0
+    800001c0:	20d51e63          	bne	a0,a3,800003dc <fail>
+    800001c4:	20c59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800001c8 <test_6>:
+    800001c8:	00600193          	li	gp,6
+    800001cc:	00002517          	auipc	a0,0x2
+    800001d0:	eb450513          	addi	a0,a0,-332 # 80002080 <test_6_data>
+    800001d4:	00053007          	fld	ft0,0(a0)
+    800001d8:	00853087          	fld	ft1,8(a0)
+    800001dc:	01053107          	fld	ft2,16(a0)
+    800001e0:	01853683          	ld	a3,24(a0)
+    800001e4:	a2100553          	fle.d	a0,ft0,ft1
+    800001e8:	001015f3          	fsflags	a1,zero
+    800001ec:	00000613          	li	a2,0
+    800001f0:	1ed51663          	bne	a0,a3,800003dc <fail>
+    800001f4:	1ec59463          	bne	a1,a2,800003dc <fail>
+
+00000000800001f8 <test_7>:
+    800001f8:	00700193          	li	gp,7
+    800001fc:	00002517          	auipc	a0,0x2
+    80000200:	ea450513          	addi	a0,a0,-348 # 800020a0 <test_7_data>
+    80000204:	00053007          	fld	ft0,0(a0)
+    80000208:	00853087          	fld	ft1,8(a0)
+    8000020c:	01053107          	fld	ft2,16(a0)
+    80000210:	01853683          	ld	a3,24(a0)
+    80000214:	a2101553          	flt.d	a0,ft0,ft1
+    80000218:	001015f3          	fsflags	a1,zero
+    8000021c:	00000613          	li	a2,0
+    80000220:	1ad51e63          	bne	a0,a3,800003dc <fail>
+    80000224:	1ac59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000228 <test_8>:
+    80000228:	00800193          	li	gp,8
+    8000022c:	00002517          	auipc	a0,0x2
+    80000230:	e9450513          	addi	a0,a0,-364 # 800020c0 <test_8_data>
+    80000234:	00053007          	fld	ft0,0(a0)
+    80000238:	00853087          	fld	ft1,8(a0)
+    8000023c:	01053107          	fld	ft2,16(a0)
+    80000240:	01853683          	ld	a3,24(a0)
+    80000244:	a2102553          	feq.d	a0,ft0,ft1
+    80000248:	001015f3          	fsflags	a1,zero
+    8000024c:	00000613          	li	a2,0
+    80000250:	18d51663          	bne	a0,a3,800003dc <fail>
+    80000254:	18c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000258 <test_9>:
+    80000258:	00900193          	li	gp,9
+    8000025c:	00002517          	auipc	a0,0x2
+    80000260:	e8450513          	addi	a0,a0,-380 # 800020e0 <test_9_data>
+    80000264:	00053007          	fld	ft0,0(a0)
+    80000268:	00853087          	fld	ft1,8(a0)
+    8000026c:	01053107          	fld	ft2,16(a0)
+    80000270:	01853683          	ld	a3,24(a0)
+    80000274:	a2102553          	feq.d	a0,ft0,ft1
+    80000278:	001015f3          	fsflags	a1,zero
+    8000027c:	00000613          	li	a2,0
+    80000280:	14d51e63          	bne	a0,a3,800003dc <fail>
+    80000284:	14c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000288 <test_10>:
+    80000288:	00a00193          	li	gp,10
+    8000028c:	00002517          	auipc	a0,0x2
+    80000290:	e7450513          	addi	a0,a0,-396 # 80002100 <test_10_data>
+    80000294:	00053007          	fld	ft0,0(a0)
+    80000298:	00853087          	fld	ft1,8(a0)
+    8000029c:	01053107          	fld	ft2,16(a0)
+    800002a0:	01853683          	ld	a3,24(a0)
+    800002a4:	a2102553          	feq.d	a0,ft0,ft1
+    800002a8:	001015f3          	fsflags	a1,zero
+    800002ac:	01000613          	li	a2,16
+    800002b0:	12d51663          	bne	a0,a3,800003dc <fail>
+    800002b4:	12c59463          	bne	a1,a2,800003dc <fail>
+
+00000000800002b8 <test_11>:
+    800002b8:	00b00193          	li	gp,11
+    800002bc:	00002517          	auipc	a0,0x2
+    800002c0:	e6450513          	addi	a0,a0,-412 # 80002120 <test_11_data>
+    800002c4:	00053007          	fld	ft0,0(a0)
+    800002c8:	00853087          	fld	ft1,8(a0)
+    800002cc:	01053107          	fld	ft2,16(a0)
+    800002d0:	01853683          	ld	a3,24(a0)
+    800002d4:	a2101553          	flt.d	a0,ft0,ft1
+    800002d8:	001015f3          	fsflags	a1,zero
+    800002dc:	01000613          	li	a2,16
+    800002e0:	0ed51e63          	bne	a0,a3,800003dc <fail>
+    800002e4:	0ec59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800002e8 <test_12>:
+    800002e8:	00c00193          	li	gp,12
+    800002ec:	00002517          	auipc	a0,0x2
+    800002f0:	e5450513          	addi	a0,a0,-428 # 80002140 <test_12_data>
+    800002f4:	00053007          	fld	ft0,0(a0)
+    800002f8:	00853087          	fld	ft1,8(a0)
+    800002fc:	01053107          	fld	ft2,16(a0)
+    80000300:	01853683          	ld	a3,24(a0)
+    80000304:	a2101553          	flt.d	a0,ft0,ft1
+    80000308:	001015f3          	fsflags	a1,zero
+    8000030c:	01000613          	li	a2,16
+    80000310:	0cd51663          	bne	a0,a3,800003dc <fail>
+    80000314:	0cc59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000318 <test_13>:
+    80000318:	00d00193          	li	gp,13
+    8000031c:	00002517          	auipc	a0,0x2
+    80000320:	e4450513          	addi	a0,a0,-444 # 80002160 <test_13_data>
+    80000324:	00053007          	fld	ft0,0(a0)
+    80000328:	00853087          	fld	ft1,8(a0)
+    8000032c:	01053107          	fld	ft2,16(a0)
+    80000330:	01853683          	ld	a3,24(a0)
+    80000334:	a2101553          	flt.d	a0,ft0,ft1
+    80000338:	001015f3          	fsflags	a1,zero
+    8000033c:	01000613          	li	a2,16
+    80000340:	08d51e63          	bne	a0,a3,800003dc <fail>
+    80000344:	08c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000348 <test_14>:
+    80000348:	00e00193          	li	gp,14
+    8000034c:	00002517          	auipc	a0,0x2
+    80000350:	e3450513          	addi	a0,a0,-460 # 80002180 <test_14_data>
+    80000354:	00053007          	fld	ft0,0(a0)
+    80000358:	00853087          	fld	ft1,8(a0)
+    8000035c:	01053107          	fld	ft2,16(a0)
+    80000360:	01853683          	ld	a3,24(a0)
+    80000364:	a2100553          	fle.d	a0,ft0,ft1
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	01000613          	li	a2,16
+    80000370:	06d51663          	bne	a0,a3,800003dc <fail>
+    80000374:	06c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000378 <test_15>:
+    80000378:	00f00193          	li	gp,15
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	e2450513          	addi	a0,a0,-476 # 800021a0 <test_15_data>
+    80000384:	00053007          	fld	ft0,0(a0)
+    80000388:	00853087          	fld	ft1,8(a0)
+    8000038c:	01053107          	fld	ft2,16(a0)
+    80000390:	01853683          	ld	a3,24(a0)
+    80000394:	a2100553          	fle.d	a0,ft0,ft1
+    80000398:	001015f3          	fsflags	a1,zero
+    8000039c:	01000613          	li	a2,16
+    800003a0:	02d51e63          	bne	a0,a3,800003dc <fail>
+    800003a4:	02c59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800003a8 <test_16>:
+    800003a8:	01000193          	li	gp,16
+    800003ac:	00002517          	auipc	a0,0x2
+    800003b0:	e1450513          	addi	a0,a0,-492 # 800021c0 <test_16_data>
+    800003b4:	00053007          	fld	ft0,0(a0)
+    800003b8:	00853087          	fld	ft1,8(a0)
+    800003bc:	01053107          	fld	ft2,16(a0)
+    800003c0:	01853683          	ld	a3,24(a0)
+    800003c4:	a2100553          	fle.d	a0,ft0,ft1
+    800003c8:	001015f3          	fsflags	a1,zero
+    800003cc:	01000613          	li	a2,16
+    800003d0:	00d51663          	bne	a0,a3,800003dc <fail>
+    800003d4:	00c59463          	bne	a1,a2,800003dc <fail>
+    800003d8:	00301c63          	bne	zero,gp,800003f0 <pass>
+
+00000000800003dc <fail>:
+    800003dc:	0ff0000f          	fence
+    800003e0:	00018063          	beqz	gp,800003e0 <fail+0x4>
+    800003e4:	00119193          	slli	gp,gp,0x1
+    800003e8:	0011e193          	ori	gp,gp,1
+    800003ec:	00000073          	ecall
+
+00000000800003f0 <pass>:
+    800003f0:	0ff0000f          	fence
+    800003f4:	00100193          	li	gp,1
+    800003f8:	00000073          	ecall
+    800003fc:	c0001073          	unimp
+    80000400:	0000                	unimp
+    80000402:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	5c28f5c3          	0x5c28f5c3
+    80002004:	bff5c28f          	0xbff5c28f
+    80002008:	5c28f5c3          	0x5c28f5c3
+    8000200c:	bff5c28f          	0xbff5c28f
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	0001                	nop
+    8000201a:	0000                	unimp
+    8000201c:	0000                	unimp
+    8000201e:	0000                	unimp
+
+0000000080002020 <test_3_data>:
+    80002020:	5c28f5c3          	0x5c28f5c3
+    80002024:	bff5c28f          	0xbff5c28f
+    80002028:	5c28f5c3          	0x5c28f5c3
+    8000202c:	bff5c28f          	0xbff5c28f
+    80002030:	0000                	unimp
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	0001                	nop
+    8000203a:	0000                	unimp
+    8000203c:	0000                	unimp
+    8000203e:	0000                	unimp
+
+0000000080002040 <test_4_data>:
+    80002040:	5c28f5c3          	0x5c28f5c3
+    80002044:	bff5c28f          	0xbff5c28f
+    80002048:	5c28f5c3          	0x5c28f5c3
+    8000204c:	bff5c28f          	0xbff5c28f
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	0000                	unimp
+
+0000000080002060 <test_5_data>:
+    80002060:	51ec                	lw	a1,100(a1)
+    80002062:	1eb8                	addi	a4,sp,888
+    80002064:	eb85                	bnez	a5,80002094 <test_6_data+0x14>
+    80002066:	bff5                	j	80002062 <test_5_data+0x2>
+    80002068:	5c28f5c3          	0x5c28f5c3
+    8000206c:	bff5c28f          	0xbff5c28f
+    80002070:	0000                	unimp
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	0000                	unimp
+
+0000000080002080 <test_6_data>:
+    80002080:	51ec                	lw	a1,100(a1)
+    80002082:	1eb8                	addi	a4,sp,888
+    80002084:	eb85                	bnez	a5,800020b4 <test_7_data+0x14>
+    80002086:	bff5                	j	80002082 <test_6_data+0x2>
+    80002088:	5c28f5c3          	0x5c28f5c3
+    8000208c:	bff5c28f          	0xbff5c28f
+    80002090:	0000                	unimp
+    80002092:	0000                	unimp
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0001                	nop
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	0000                	unimp
+
+00000000800020a0 <test_7_data>:
+    800020a0:	51ec                	lw	a1,100(a1)
+    800020a2:	1eb8                	addi	a4,sp,888
+    800020a4:	eb85                	bnez	a5,800020d4 <test_8_data+0x14>
+    800020a6:	bff5                	j	800020a2 <test_7_data+0x2>
+    800020a8:	5c28f5c3          	0x5c28f5c3
+    800020ac:	bff5c28f          	0xbff5c28f
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0001                	nop
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	0000                	unimp
+
+00000000800020c0 <test_8_data>:
+    800020c0:	ffff                	0xffff
+    800020c2:	ffff                	0xffff
+    800020c4:	ffff                	0xffff
+    800020c6:	7fff                	0x7fff
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	0000                	unimp
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	0000                	unimp
+
+00000000800020e0 <test_9_data>:
+    800020e0:	ffff                	0xffff
+    800020e2:	ffff                	0xffff
+    800020e4:	ffff                	0xffff
+    800020e6:	7fff                	0x7fff
+    800020e8:	ffff                	0xffff
+    800020ea:	ffff                	0xffff
+    800020ec:	ffff                	0xffff
+    800020ee:	7fff                	0x7fff
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	0000                	unimp
+    800020fa:	0000                	unimp
+    800020fc:	0000                	unimp
+    800020fe:	0000                	unimp
+
+0000000080002100 <test_10_data>:
+    80002100:	0001                	nop
+    80002102:	0000                	unimp
+    80002104:	0000                	unimp
+    80002106:	7ff0                	ld	a2,248(a5)
+    80002108:	0000                	unimp
+    8000210a:	0000                	unimp
+    8000210c:	0000                	unimp
+    8000210e:	0000                	unimp
+    80002110:	0000                	unimp
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	0000                	unimp
+    80002118:	0000                	unimp
+    8000211a:	0000                	unimp
+    8000211c:	0000                	unimp
+    8000211e:	0000                	unimp
+
+0000000080002120 <test_11_data>:
+    80002120:	ffff                	0xffff
+    80002122:	ffff                	0xffff
+    80002124:	ffff                	0xffff
+    80002126:	7fff                	0x7fff
+    80002128:	0000                	unimp
+    8000212a:	0000                	unimp
+    8000212c:	0000                	unimp
+    8000212e:	0000                	unimp
+    80002130:	0000                	unimp
+    80002132:	0000                	unimp
+    80002134:	0000                	unimp
+    80002136:	0000                	unimp
+    80002138:	0000                	unimp
+    8000213a:	0000                	unimp
+    8000213c:	0000                	unimp
+    8000213e:	0000                	unimp
+
+0000000080002140 <test_12_data>:
+    80002140:	ffff                	0xffff
+    80002142:	ffff                	0xffff
+    80002144:	ffff                	0xffff
+    80002146:	7fff                	0x7fff
+    80002148:	ffff                	0xffff
+    8000214a:	ffff                	0xffff
+    8000214c:	ffff                	0xffff
+    8000214e:	7fff                	0x7fff
+    80002150:	0000                	unimp
+    80002152:	0000                	unimp
+    80002154:	0000                	unimp
+    80002156:	0000                	unimp
+    80002158:	0000                	unimp
+    8000215a:	0000                	unimp
+    8000215c:	0000                	unimp
+    8000215e:	0000                	unimp
+
+0000000080002160 <test_13_data>:
+    80002160:	0001                	nop
+    80002162:	0000                	unimp
+    80002164:	0000                	unimp
+    80002166:	7ff0                	ld	a2,248(a5)
+    80002168:	0000                	unimp
+    8000216a:	0000                	unimp
+    8000216c:	0000                	unimp
+    8000216e:	0000                	unimp
+    80002170:	0000                	unimp
+    80002172:	0000                	unimp
+    80002174:	0000                	unimp
+    80002176:	0000                	unimp
+    80002178:	0000                	unimp
+    8000217a:	0000                	unimp
+    8000217c:	0000                	unimp
+    8000217e:	0000                	unimp
+
+0000000080002180 <test_14_data>:
+    80002180:	ffff                	0xffff
+    80002182:	ffff                	0xffff
+    80002184:	ffff                	0xffff
+    80002186:	7fff                	0x7fff
+    80002188:	0000                	unimp
+    8000218a:	0000                	unimp
+    8000218c:	0000                	unimp
+    8000218e:	0000                	unimp
+    80002190:	0000                	unimp
+    80002192:	0000                	unimp
+    80002194:	0000                	unimp
+    80002196:	0000                	unimp
+    80002198:	0000                	unimp
+    8000219a:	0000                	unimp
+    8000219c:	0000                	unimp
+    8000219e:	0000                	unimp
+
+00000000800021a0 <test_15_data>:
+    800021a0:	ffff                	0xffff
+    800021a2:	ffff                	0xffff
+    800021a4:	ffff                	0xffff
+    800021a6:	7fff                	0x7fff
+    800021a8:	ffff                	0xffff
+    800021aa:	ffff                	0xffff
+    800021ac:	ffff                	0xffff
+    800021ae:	7fff                	0x7fff
+    800021b0:	0000                	unimp
+    800021b2:	0000                	unimp
+    800021b4:	0000                	unimp
+    800021b6:	0000                	unimp
+    800021b8:	0000                	unimp
+    800021ba:	0000                	unimp
+    800021bc:	0000                	unimp
+    800021be:	0000                	unimp
+
+00000000800021c0 <test_16_data>:
+    800021c0:	0001                	nop
+    800021c2:	0000                	unimp
+    800021c4:	0000                	unimp
+    800021c6:	7ff0                	ld	a2,248(a5)
+    800021c8:	0000                	unimp
+    800021ca:	0000                	unimp
+    800021cc:	0000                	unimp
+    800021ce:	0000                	unimp
+    800021d0:	0000                	unimp
+    800021d2:	0000                	unimp
+    800021d4:	0000                	unimp
+    800021d6:	0000                	unimp
+    800021d8:	0000                	unimp
+    800021da:	0000                	unimp
+    800021dc:	0000                	unimp
+    800021de:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-p-fcmp.elf b/test/riscv-tests/rv64ud-p-fcmp.elf
new file mode 100644
index 0000000..4ae6c9b
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcmp.elf
diff --git a/test/riscv-tests/rv64ud-p-fcvt.dump b/test/riscv-tests/rv64ud-p-fcvt.dump
new file mode 100644
index 0000000..54e2a24
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcvt.dump
@@ -0,0 +1,327 @@
+
+rv64ud-p-fcvt:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053683          	ld	a3,0(a0)
+    80000118:	00200513          	li	a0,2
+    8000011c:	d2050053          	fcvt.d.w	ft0,a0
+    80000120:	00101073          	fsflags	zero
+    80000124:	e2000553          	fmv.x.d	a0,ft0
+    80000128:	1ad51263          	bne	a0,a3,800002cc <fail>
+
+000000008000012c <test_3>:
+    8000012c:	00300193          	li	gp,3
+    80000130:	00002517          	auipc	a0,0x2
+    80000134:	ed850513          	addi	a0,a0,-296 # 80002008 <test_3_data>
+    80000138:	00053683          	ld	a3,0(a0)
+    8000013c:	ffe00513          	li	a0,-2
+    80000140:	d2050053          	fcvt.d.w	ft0,a0
+    80000144:	00101073          	fsflags	zero
+    80000148:	e2000553          	fmv.x.d	a0,ft0
+    8000014c:	18d51063          	bne	a0,a3,800002cc <fail>
+
+0000000080000150 <test_4>:
+    80000150:	00400193          	li	gp,4
+    80000154:	00002517          	auipc	a0,0x2
+    80000158:	ebc50513          	addi	a0,a0,-324 # 80002010 <test_4_data>
+    8000015c:	00053683          	ld	a3,0(a0)
+    80000160:	00200513          	li	a0,2
+    80000164:	d2150053          	fcvt.d.wu	ft0,a0
+    80000168:	00101073          	fsflags	zero
+    8000016c:	e2000553          	fmv.x.d	a0,ft0
+    80000170:	14d51e63          	bne	a0,a3,800002cc <fail>
+
+0000000080000174 <test_5>:
+    80000174:	00500193          	li	gp,5
+    80000178:	00002517          	auipc	a0,0x2
+    8000017c:	ea050513          	addi	a0,a0,-352 # 80002018 <test_5_data>
+    80000180:	00053683          	ld	a3,0(a0)
+    80000184:	ffe00513          	li	a0,-2
+    80000188:	d2150053          	fcvt.d.wu	ft0,a0
+    8000018c:	00101073          	fsflags	zero
+    80000190:	e2000553          	fmv.x.d	a0,ft0
+    80000194:	12d51c63          	bne	a0,a3,800002cc <fail>
+
+0000000080000198 <test_6>:
+    80000198:	00600193          	li	gp,6
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	e8450513          	addi	a0,a0,-380 # 80002020 <test_6_data>
+    800001a4:	00053683          	ld	a3,0(a0)
+    800001a8:	00200513          	li	a0,2
+    800001ac:	d2257053          	fcvt.d.l	ft0,a0
+    800001b0:	00101073          	fsflags	zero
+    800001b4:	e2000553          	fmv.x.d	a0,ft0
+    800001b8:	10d51a63          	bne	a0,a3,800002cc <fail>
+
+00000000800001bc <test_7>:
+    800001bc:	00700193          	li	gp,7
+    800001c0:	00002517          	auipc	a0,0x2
+    800001c4:	e6850513          	addi	a0,a0,-408 # 80002028 <test_7_data>
+    800001c8:	00053683          	ld	a3,0(a0)
+    800001cc:	ffe00513          	li	a0,-2
+    800001d0:	d2257053          	fcvt.d.l	ft0,a0
+    800001d4:	00101073          	fsflags	zero
+    800001d8:	e2000553          	fmv.x.d	a0,ft0
+    800001dc:	0ed51863          	bne	a0,a3,800002cc <fail>
+
+00000000800001e0 <test_8>:
+    800001e0:	00800193          	li	gp,8
+    800001e4:	00002517          	auipc	a0,0x2
+    800001e8:	e4c50513          	addi	a0,a0,-436 # 80002030 <test_8_data>
+    800001ec:	00053683          	ld	a3,0(a0)
+    800001f0:	00200513          	li	a0,2
+    800001f4:	d2357053          	fcvt.d.lu	ft0,a0
+    800001f8:	00101073          	fsflags	zero
+    800001fc:	e2000553          	fmv.x.d	a0,ft0
+    80000200:	0cd51663          	bne	a0,a3,800002cc <fail>
+
+0000000080000204 <test_9>:
+    80000204:	00900193          	li	gp,9
+    80000208:	00002517          	auipc	a0,0x2
+    8000020c:	e3050513          	addi	a0,a0,-464 # 80002038 <test_9_data>
+    80000210:	00053683          	ld	a3,0(a0)
+    80000214:	ffe00513          	li	a0,-2
+    80000218:	d2357053          	fcvt.d.lu	ft0,a0
+    8000021c:	00101073          	fsflags	zero
+    80000220:	e2000553          	fmv.x.d	a0,ft0
+    80000224:	0ad51463          	bne	a0,a3,800002cc <fail>
+
+0000000080000228 <test_10>:
+    80000228:	00a00193          	li	gp,10
+    8000022c:	00002517          	auipc	a0,0x2
+    80000230:	e1450513          	addi	a0,a0,-492 # 80002040 <test_10_data>
+    80000234:	00053007          	fld	ft0,0(a0)
+    80000238:	00853087          	fld	ft1,8(a0)
+    8000023c:	01053107          	fld	ft2,16(a0)
+    80000240:	01853683          	ld	a3,24(a0)
+    80000244:	401071d3          	fcvt.s.d	ft3,ft0
+    80000248:	420181d3          	fcvt.d.s	ft3,ft3
+    8000024c:	e2018553          	fmv.x.d	a0,ft3
+    80000250:	001015f3          	fsflags	a1,zero
+    80000254:	00000613          	li	a2,0
+    80000258:	06d51a63          	bne	a0,a3,800002cc <fail>
+    8000025c:	06c59863          	bne	a1,a2,800002cc <fail>
+
+0000000080000260 <test_11>:
+    80000260:	00b00193          	li	gp,11
+    80000264:	00002517          	auipc	a0,0x2
+    80000268:	dfc50513          	addi	a0,a0,-516 # 80002060 <test_11_data>
+    8000026c:	00052007          	flw	ft0,0(a0)
+    80000270:	00452087          	flw	ft1,4(a0)
+    80000274:	00852107          	flw	ft2,8(a0)
+    80000278:	00c52683          	lw	a3,12(a0)
+    8000027c:	420001d3          	fcvt.d.s	ft3,ft0
+    80000280:	4011f1d3          	fcvt.s.d	ft3,ft3
+    80000284:	e0018553          	fmv.x.w	a0,ft3
+    80000288:	001015f3          	fsflags	a1,zero
+    8000028c:	00000613          	li	a2,0
+    80000290:	02d51e63          	bne	a0,a3,800002cc <fail>
+    80000294:	02c59c63          	bne	a1,a2,800002cc <fail>
+
+0000000080000298 <test_12>:
+    80000298:	00002597          	auipc	a1,0x2
+    8000029c:	dd858593          	addi	a1,a1,-552 # 80002070 <begin_signature>
+    800002a0:	0005b603          	ld	a2,0(a1)
+    800002a4:	f2060153          	fmv.d.x	ft2,a2
+    800002a8:	40117153          	fcvt.s.d	ft2,ft2
+    800002ac:	42010153          	fcvt.d.s	ft2,ft2
+    800002b0:	e2010553          	fmv.x.d	a0,ft2
+    800002b4:	00001eb7          	lui	t4,0x1
+    800002b8:	fffe8e9b          	addiw	t4,t4,-1
+    800002bc:	033e9e93          	slli	t4,t4,0x33
+    800002c0:	00c00193          	li	gp,12
+    800002c4:	01d51463          	bne	a0,t4,800002cc <fail>
+    800002c8:	00301c63          	bne	zero,gp,800002e0 <pass>
+
+00000000800002cc <fail>:
+    800002cc:	0ff0000f          	fence
+    800002d0:	00018063          	beqz	gp,800002d0 <fail+0x4>
+    800002d4:	00119193          	slli	gp,gp,0x1
+    800002d8:	0011e193          	ori	gp,gp,1
+    800002dc:	00000073          	ecall
+
+00000000800002e0 <pass>:
+    800002e0:	0ff0000f          	fence
+    800002e4:	00100193          	li	gp,1
+    800002e8:	00000073          	ecall
+    800002ec:	c0001073          	unimp
+    800002f0:	0000                	unimp
+    800002f2:	0000                	unimp
+    800002f4:	0000                	unimp
+    800002f6:	0000                	unimp
+    800002f8:	0000                	unimp
+    800002fa:	0000                	unimp
+    800002fc:	0000                	unimp
+    800002fe:	0000                	unimp
+    80000300:	0000                	unimp
+    80000302:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	0000                	unimp
+    80002004:	0000                	unimp
+    80002006:	4000                	lw	s0,0(s0)
+
+0000000080002008 <test_3_data>:
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	c000                	sw	s0,0(s0)
+
+0000000080002010 <test_4_data>:
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	4000                	lw	s0,0(s0)
+
+0000000080002018 <test_5_data>:
+    80002018:	0000                	unimp
+    8000201a:	ffc0                	sd	s0,184(a5)
+    8000201c:	ffff                	0xffff
+    8000201e:	          	jal	gp,8000601e <_end+0x3f9e>
+
+0000000080002020 <test_6_data>:
+    80002020:	0000                	unimp
+    80002022:	0000                	unimp
+    80002024:	0000                	unimp
+    80002026:	4000                	lw	s0,0(s0)
+
+0000000080002028 <test_7_data>:
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	0000                	unimp
+    8000202e:	c000                	sw	s0,0(s0)
+
+0000000080002030 <test_8_data>:
+    80002030:	0000                	unimp
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	4000                	lw	s0,0(s0)
+
+0000000080002038 <test_9_data>:
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	0000                	unimp
+    8000203e:	43f0                	lw	a2,68(a5)
+
+0000000080002040 <test_10_data>:
+    80002040:	0000                	unimp
+    80002042:	0000                	unimp
+    80002044:	0000                	unimp
+    80002046:	bff8                	fsd	fa4,248(a5)
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0000                	unimp
+    8000204e:	0000                	unimp
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	bff8                	fsd	fa4,248(a5)
+
+0000000080002060 <test_11_data>:
+    80002060:	0000                	unimp
+    80002062:	bfc0                	fsd	fs0,184(a5)
+    80002064:	0000                	unimp
+    80002066:	0000                	unimp
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	bfc0                	fsd	fs0,184(a5)
+
+0000000080002070 <begin_signature>:
+    80002070:	8004                	0x8004
+    80002072:	ffff                	0xffff
+    80002074:	ffff                	0xffff
+    80002076:	7ffc                	ld	a5,248(a5)
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-p-fcvt.elf b/test/riscv-tests/rv64ud-p-fcvt.elf
new file mode 100644
index 0000000..995bc81
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcvt.elf
diff --git a/test/riscv-tests/rv64ud-p-fcvt_w.dump b/test/riscv-tests/rv64ud-p-fcvt_w.dump
new file mode 100644
index 0000000..6094959
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcvt_w.dump
@@ -0,0 +1,1364 @@
+
+rv64ud-p-fcvt_w:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000128:	001015f3          	fsflags	a1,zero
+    8000012c:	00100613          	li	a2,1
+    80000130:	02d512e3          	bne	a0,a3,80000954 <fail>
+    80000134:	02c590e3          	bne	a1,a2,80000954 <fail>
+
+0000000080000138 <test_3>:
+    80000138:	00300193          	li	gp,3
+    8000013c:	00002517          	auipc	a0,0x2
+    80000140:	ee450513          	addi	a0,a0,-284 # 80002020 <test_3_data>
+    80000144:	00053007          	fld	ft0,0(a0)
+    80000148:	00853087          	fld	ft1,8(a0)
+    8000014c:	01053107          	fld	ft2,16(a0)
+    80000150:	01853683          	ld	a3,24(a0)
+    80000154:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000158:	001015f3          	fsflags	a1,zero
+    8000015c:	00000613          	li	a2,0
+    80000160:	7ed51a63          	bne	a0,a3,80000954 <fail>
+    80000164:	7ec59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000168 <test_4>:
+    80000168:	00400193          	li	gp,4
+    8000016c:	00002517          	auipc	a0,0x2
+    80000170:	ed450513          	addi	a0,a0,-300 # 80002040 <test_4_data>
+    80000174:	00053007          	fld	ft0,0(a0)
+    80000178:	00853087          	fld	ft1,8(a0)
+    8000017c:	01053107          	fld	ft2,16(a0)
+    80000180:	01853683          	ld	a3,24(a0)
+    80000184:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000188:	001015f3          	fsflags	a1,zero
+    8000018c:	00100613          	li	a2,1
+    80000190:	7cd51263          	bne	a0,a3,80000954 <fail>
+    80000194:	7cc59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000198 <test_5>:
+    80000198:	00500193          	li	gp,5
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	ec450513          	addi	a0,a0,-316 # 80002060 <test_5_data>
+    800001a4:	00053007          	fld	ft0,0(a0)
+    800001a8:	00853087          	fld	ft1,8(a0)
+    800001ac:	01053107          	fld	ft2,16(a0)
+    800001b0:	01853683          	ld	a3,24(a0)
+    800001b4:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    800001b8:	001015f3          	fsflags	a1,zero
+    800001bc:	00100613          	li	a2,1
+    800001c0:	78d51a63          	bne	a0,a3,80000954 <fail>
+    800001c4:	78c59863          	bne	a1,a2,80000954 <fail>
+
+00000000800001c8 <test_6>:
+    800001c8:	00600193          	li	gp,6
+    800001cc:	00002517          	auipc	a0,0x2
+    800001d0:	eb450513          	addi	a0,a0,-332 # 80002080 <test_6_data>
+    800001d4:	00053007          	fld	ft0,0(a0)
+    800001d8:	00853087          	fld	ft1,8(a0)
+    800001dc:	01053107          	fld	ft2,16(a0)
+    800001e0:	01853683          	ld	a3,24(a0)
+    800001e4:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    800001e8:	001015f3          	fsflags	a1,zero
+    800001ec:	00000613          	li	a2,0
+    800001f0:	76d51263          	bne	a0,a3,80000954 <fail>
+    800001f4:	76c59063          	bne	a1,a2,80000954 <fail>
+
+00000000800001f8 <test_7>:
+    800001f8:	00700193          	li	gp,7
+    800001fc:	00002517          	auipc	a0,0x2
+    80000200:	ea450513          	addi	a0,a0,-348 # 800020a0 <test_7_data>
+    80000204:	00053007          	fld	ft0,0(a0)
+    80000208:	00853087          	fld	ft1,8(a0)
+    8000020c:	01053107          	fld	ft2,16(a0)
+    80000210:	01853683          	ld	a3,24(a0)
+    80000214:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000218:	001015f3          	fsflags	a1,zero
+    8000021c:	00100613          	li	a2,1
+    80000220:	72d51a63          	bne	a0,a3,80000954 <fail>
+    80000224:	72c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000228 <test_8>:
+    80000228:	00800193          	li	gp,8
+    8000022c:	00002517          	auipc	a0,0x2
+    80000230:	e9450513          	addi	a0,a0,-364 # 800020c0 <test_8_data>
+    80000234:	00053007          	fld	ft0,0(a0)
+    80000238:	00853087          	fld	ft1,8(a0)
+    8000023c:	01053107          	fld	ft2,16(a0)
+    80000240:	01853683          	ld	a3,24(a0)
+    80000244:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000248:	001015f3          	fsflags	a1,zero
+    8000024c:	01000613          	li	a2,16
+    80000250:	70d51263          	bne	a0,a3,80000954 <fail>
+    80000254:	70c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000258 <test_9>:
+    80000258:	00900193          	li	gp,9
+    8000025c:	00002517          	auipc	a0,0x2
+    80000260:	e8450513          	addi	a0,a0,-380 # 800020e0 <test_9_data>
+    80000264:	00053007          	fld	ft0,0(a0)
+    80000268:	00853087          	fld	ft1,8(a0)
+    8000026c:	01053107          	fld	ft2,16(a0)
+    80000270:	01853683          	ld	a3,24(a0)
+    80000274:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80000278:	001015f3          	fsflags	a1,zero
+    8000027c:	01000613          	li	a2,16
+    80000280:	6cd51a63          	bne	a0,a3,80000954 <fail>
+    80000284:	6cc59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000288 <test_12>:
+    80000288:	00c00193          	li	gp,12
+    8000028c:	00002517          	auipc	a0,0x2
+    80000290:	e7450513          	addi	a0,a0,-396 # 80002100 <test_12_data>
+    80000294:	00053007          	fld	ft0,0(a0)
+    80000298:	00853087          	fld	ft1,8(a0)
+    8000029c:	01053107          	fld	ft2,16(a0)
+    800002a0:	01853683          	ld	a3,24(a0)
+    800002a4:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    800002a8:	001015f3          	fsflags	a1,zero
+    800002ac:	01000613          	li	a2,16
+    800002b0:	6ad51263          	bne	a0,a3,80000954 <fail>
+    800002b4:	6ac59063          	bne	a1,a2,80000954 <fail>
+
+00000000800002b8 <test_13>:
+    800002b8:	00d00193          	li	gp,13
+    800002bc:	00002517          	auipc	a0,0x2
+    800002c0:	e6450513          	addi	a0,a0,-412 # 80002120 <test_13_data>
+    800002c4:	00053007          	fld	ft0,0(a0)
+    800002c8:	00853087          	fld	ft1,8(a0)
+    800002cc:	01053107          	fld	ft2,16(a0)
+    800002d0:	01853683          	ld	a3,24(a0)
+    800002d4:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    800002d8:	001015f3          	fsflags	a1,zero
+    800002dc:	01000613          	li	a2,16
+    800002e0:	66d51a63          	bne	a0,a3,80000954 <fail>
+    800002e4:	66c59863          	bne	a1,a2,80000954 <fail>
+
+00000000800002e8 <test_14>:
+    800002e8:	00e00193          	li	gp,14
+    800002ec:	00002517          	auipc	a0,0x2
+    800002f0:	e5450513          	addi	a0,a0,-428 # 80002140 <test_14_data>
+    800002f4:	00053007          	fld	ft0,0(a0)
+    800002f8:	00853087          	fld	ft1,8(a0)
+    800002fc:	01053107          	fld	ft2,16(a0)
+    80000300:	01853683          	ld	a3,24(a0)
+    80000304:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80000308:	001015f3          	fsflags	a1,zero
+    8000030c:	00100613          	li	a2,1
+    80000310:	64d51263          	bne	a0,a3,80000954 <fail>
+    80000314:	64c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000318 <test_15>:
+    80000318:	00f00193          	li	gp,15
+    8000031c:	00002517          	auipc	a0,0x2
+    80000320:	e4450513          	addi	a0,a0,-444 # 80002160 <test_15_data>
+    80000324:	00053007          	fld	ft0,0(a0)
+    80000328:	00853087          	fld	ft1,8(a0)
+    8000032c:	01053107          	fld	ft2,16(a0)
+    80000330:	01853683          	ld	a3,24(a0)
+    80000334:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80000338:	001015f3          	fsflags	a1,zero
+    8000033c:	00100613          	li	a2,1
+    80000340:	60d51a63          	bne	a0,a3,80000954 <fail>
+    80000344:	60c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000348 <test_16>:
+    80000348:	01000193          	li	gp,16
+    8000034c:	00002517          	auipc	a0,0x2
+    80000350:	e3450513          	addi	a0,a0,-460 # 80002180 <test_16_data>
+    80000354:	00053007          	fld	ft0,0(a0)
+    80000358:	00853087          	fld	ft1,8(a0)
+    8000035c:	01053107          	fld	ft2,16(a0)
+    80000360:	01853683          	ld	a3,24(a0)
+    80000364:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	5ed51263          	bne	a0,a3,80000954 <fail>
+    80000374:	5ec59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000378 <test_17>:
+    80000378:	01100193          	li	gp,17
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	e2450513          	addi	a0,a0,-476 # 800021a0 <test_17_data>
+    80000384:	00053007          	fld	ft0,0(a0)
+    80000388:	00853087          	fld	ft1,8(a0)
+    8000038c:	01053107          	fld	ft2,16(a0)
+    80000390:	01853683          	ld	a3,24(a0)
+    80000394:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80000398:	001015f3          	fsflags	a1,zero
+    8000039c:	00100613          	li	a2,1
+    800003a0:	5ad51a63          	bne	a0,a3,80000954 <fail>
+    800003a4:	5ac59863          	bne	a1,a2,80000954 <fail>
+
+00000000800003a8 <test_18>:
+    800003a8:	01200193          	li	gp,18
+    800003ac:	00002517          	auipc	a0,0x2
+    800003b0:	e1450513          	addi	a0,a0,-492 # 800021c0 <test_18_data>
+    800003b4:	00053007          	fld	ft0,0(a0)
+    800003b8:	00853087          	fld	ft1,8(a0)
+    800003bc:	01053107          	fld	ft2,16(a0)
+    800003c0:	01853683          	ld	a3,24(a0)
+    800003c4:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    800003c8:	001015f3          	fsflags	a1,zero
+    800003cc:	01000613          	li	a2,16
+    800003d0:	58d51263          	bne	a0,a3,80000954 <fail>
+    800003d4:	58c59063          	bne	a1,a2,80000954 <fail>
+
+00000000800003d8 <test_19>:
+    800003d8:	01300193          	li	gp,19
+    800003dc:	00002517          	auipc	a0,0x2
+    800003e0:	e0450513          	addi	a0,a0,-508 # 800021e0 <test_19_data>
+    800003e4:	00053007          	fld	ft0,0(a0)
+    800003e8:	00853087          	fld	ft1,8(a0)
+    800003ec:	01053107          	fld	ft2,16(a0)
+    800003f0:	01853683          	ld	a3,24(a0)
+    800003f4:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    800003f8:	001015f3          	fsflags	a1,zero
+    800003fc:	00000613          	li	a2,0
+    80000400:	54d51a63          	bne	a0,a3,80000954 <fail>
+    80000404:	54c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000408 <test_22>:
+    80000408:	01600193          	li	gp,22
+    8000040c:	00002517          	auipc	a0,0x2
+    80000410:	df450513          	addi	a0,a0,-524 # 80002200 <test_22_data>
+    80000414:	00053007          	fld	ft0,0(a0)
+    80000418:	00853087          	fld	ft1,8(a0)
+    8000041c:	01053107          	fld	ft2,16(a0)
+    80000420:	01853683          	ld	a3,24(a0)
+    80000424:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000428:	001015f3          	fsflags	a1,zero
+    8000042c:	00100613          	li	a2,1
+    80000430:	52d51263          	bne	a0,a3,80000954 <fail>
+    80000434:	52c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000438 <test_23>:
+    80000438:	01700193          	li	gp,23
+    8000043c:	00002517          	auipc	a0,0x2
+    80000440:	de450513          	addi	a0,a0,-540 # 80002220 <test_23_data>
+    80000444:	00053007          	fld	ft0,0(a0)
+    80000448:	00853087          	fld	ft1,8(a0)
+    8000044c:	01053107          	fld	ft2,16(a0)
+    80000450:	01853683          	ld	a3,24(a0)
+    80000454:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000458:	001015f3          	fsflags	a1,zero
+    8000045c:	00000613          	li	a2,0
+    80000460:	4ed51a63          	bne	a0,a3,80000954 <fail>
+    80000464:	4ec59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000468 <test_24>:
+    80000468:	01800193          	li	gp,24
+    8000046c:	00002517          	auipc	a0,0x2
+    80000470:	dd450513          	addi	a0,a0,-556 # 80002240 <test_24_data>
+    80000474:	00053007          	fld	ft0,0(a0)
+    80000478:	00853087          	fld	ft1,8(a0)
+    8000047c:	01053107          	fld	ft2,16(a0)
+    80000480:	01853683          	ld	a3,24(a0)
+    80000484:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000488:	001015f3          	fsflags	a1,zero
+    8000048c:	00100613          	li	a2,1
+    80000490:	4cd51263          	bne	a0,a3,80000954 <fail>
+    80000494:	4cc59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000498 <test_25>:
+    80000498:	01900193          	li	gp,25
+    8000049c:	00002517          	auipc	a0,0x2
+    800004a0:	dc450513          	addi	a0,a0,-572 # 80002260 <test_25_data>
+    800004a4:	00053007          	fld	ft0,0(a0)
+    800004a8:	00853087          	fld	ft1,8(a0)
+    800004ac:	01053107          	fld	ft2,16(a0)
+    800004b0:	01853683          	ld	a3,24(a0)
+    800004b4:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    800004b8:	001015f3          	fsflags	a1,zero
+    800004bc:	00100613          	li	a2,1
+    800004c0:	48d51a63          	bne	a0,a3,80000954 <fail>
+    800004c4:	48c59863          	bne	a1,a2,80000954 <fail>
+
+00000000800004c8 <test_26>:
+    800004c8:	01a00193          	li	gp,26
+    800004cc:	00002517          	auipc	a0,0x2
+    800004d0:	db450513          	addi	a0,a0,-588 # 80002280 <test_26_data>
+    800004d4:	00053007          	fld	ft0,0(a0)
+    800004d8:	00853087          	fld	ft1,8(a0)
+    800004dc:	01053107          	fld	ft2,16(a0)
+    800004e0:	01853683          	ld	a3,24(a0)
+    800004e4:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    800004e8:	001015f3          	fsflags	a1,zero
+    800004ec:	00000613          	li	a2,0
+    800004f0:	46d51263          	bne	a0,a3,80000954 <fail>
+    800004f4:	46c59063          	bne	a1,a2,80000954 <fail>
+
+00000000800004f8 <test_27>:
+    800004f8:	01b00193          	li	gp,27
+    800004fc:	00002517          	auipc	a0,0x2
+    80000500:	da450513          	addi	a0,a0,-604 # 800022a0 <test_27_data>
+    80000504:	00053007          	fld	ft0,0(a0)
+    80000508:	00853087          	fld	ft1,8(a0)
+    8000050c:	01053107          	fld	ft2,16(a0)
+    80000510:	01853683          	ld	a3,24(a0)
+    80000514:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000518:	001015f3          	fsflags	a1,zero
+    8000051c:	00100613          	li	a2,1
+    80000520:	42d51a63          	bne	a0,a3,80000954 <fail>
+    80000524:	42c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000528 <test_28>:
+    80000528:	01c00193          	li	gp,28
+    8000052c:	00002517          	auipc	a0,0x2
+    80000530:	d9450513          	addi	a0,a0,-620 # 800022c0 <test_28_data>
+    80000534:	00053007          	fld	ft0,0(a0)
+    80000538:	00853087          	fld	ft1,8(a0)
+    8000053c:	01053107          	fld	ft2,16(a0)
+    80000540:	01853683          	ld	a3,24(a0)
+    80000544:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000548:	001015f3          	fsflags	a1,zero
+    8000054c:	00000613          	li	a2,0
+    80000550:	40d51263          	bne	a0,a3,80000954 <fail>
+    80000554:	40c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000558 <test_29>:
+    80000558:	01d00193          	li	gp,29
+    8000055c:	00002517          	auipc	a0,0x2
+    80000560:	d8450513          	addi	a0,a0,-636 # 800022e0 <test_29_data>
+    80000564:	00053007          	fld	ft0,0(a0)
+    80000568:	00853087          	fld	ft1,8(a0)
+    8000056c:	01053107          	fld	ft2,16(a0)
+    80000570:	01853683          	ld	a3,24(a0)
+    80000574:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80000578:	001015f3          	fsflags	a1,zero
+    8000057c:	00000613          	li	a2,0
+    80000580:	3cd51a63          	bne	a0,a3,80000954 <fail>
+    80000584:	3cc59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000588 <test_20>:
+    80000588:	01400193          	li	gp,20
+    8000058c:	00002517          	auipc	a0,0x2
+    80000590:	d7450513          	addi	a0,a0,-652 # 80002300 <test_20_data>
+    80000594:	00053007          	fld	ft0,0(a0)
+    80000598:	00853087          	fld	ft1,8(a0)
+    8000059c:	01053107          	fld	ft2,16(a0)
+    800005a0:	01853683          	ld	a3,24(a0)
+    800005a4:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    800005a8:	001015f3          	fsflags	a1,zero
+    800005ac:	01000613          	li	a2,16
+    800005b0:	3ad51263          	bne	a0,a3,80000954 <fail>
+    800005b4:	3ac59063          	bne	a1,a2,80000954 <fail>
+
+00000000800005b8 <test_21>:
+    800005b8:	01500193          	li	gp,21
+    800005bc:	00002517          	auipc	a0,0x2
+    800005c0:	d6450513          	addi	a0,a0,-668 # 80002320 <test_21_data>
+    800005c4:	00053007          	fld	ft0,0(a0)
+    800005c8:	00853087          	fld	ft1,8(a0)
+    800005cc:	01053107          	fld	ft2,16(a0)
+    800005d0:	01853683          	ld	a3,24(a0)
+    800005d4:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    800005d8:	001015f3          	fsflags	a1,zero
+    800005dc:	01000613          	li	a2,16
+    800005e0:	36d51a63          	bne	a0,a3,80000954 <fail>
+    800005e4:	36c59863          	bne	a1,a2,80000954 <fail>
+
+00000000800005e8 <test_32>:
+    800005e8:	02000193          	li	gp,32
+    800005ec:	00002517          	auipc	a0,0x2
+    800005f0:	d5450513          	addi	a0,a0,-684 # 80002340 <test_32_data>
+    800005f4:	00053007          	fld	ft0,0(a0)
+    800005f8:	00853087          	fld	ft1,8(a0)
+    800005fc:	01053107          	fld	ft2,16(a0)
+    80000600:	01853683          	ld	a3,24(a0)
+    80000604:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000608:	001015f3          	fsflags	a1,zero
+    8000060c:	01000613          	li	a2,16
+    80000610:	34d51263          	bne	a0,a3,80000954 <fail>
+    80000614:	34c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000618 <test_33>:
+    80000618:	02100193          	li	gp,33
+    8000061c:	00002517          	auipc	a0,0x2
+    80000620:	d4450513          	addi	a0,a0,-700 # 80002360 <test_33_data>
+    80000624:	00053007          	fld	ft0,0(a0)
+    80000628:	00853087          	fld	ft1,8(a0)
+    8000062c:	01053107          	fld	ft2,16(a0)
+    80000630:	01853683          	ld	a3,24(a0)
+    80000634:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000638:	001015f3          	fsflags	a1,zero
+    8000063c:	01000613          	li	a2,16
+    80000640:	30d51a63          	bne	a0,a3,80000954 <fail>
+    80000644:	30c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000648 <test_34>:
+    80000648:	02200193          	li	gp,34
+    8000064c:	00002517          	auipc	a0,0x2
+    80000650:	d3450513          	addi	a0,a0,-716 # 80002380 <test_34_data>
+    80000654:	00053007          	fld	ft0,0(a0)
+    80000658:	00853087          	fld	ft1,8(a0)
+    8000065c:	01053107          	fld	ft2,16(a0)
+    80000660:	01853683          	ld	a3,24(a0)
+    80000664:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000668:	001015f3          	fsflags	a1,zero
+    8000066c:	00100613          	li	a2,1
+    80000670:	2ed51263          	bne	a0,a3,80000954 <fail>
+    80000674:	2ec59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000678 <test_35>:
+    80000678:	02300193          	li	gp,35
+    8000067c:	00002517          	auipc	a0,0x2
+    80000680:	d2450513          	addi	a0,a0,-732 # 800023a0 <test_35_data>
+    80000684:	00053007          	fld	ft0,0(a0)
+    80000688:	00853087          	fld	ft1,8(a0)
+    8000068c:	01053107          	fld	ft2,16(a0)
+    80000690:	01853683          	ld	a3,24(a0)
+    80000694:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000698:	001015f3          	fsflags	a1,zero
+    8000069c:	00100613          	li	a2,1
+    800006a0:	2ad51a63          	bne	a0,a3,80000954 <fail>
+    800006a4:	2ac59863          	bne	a1,a2,80000954 <fail>
+
+00000000800006a8 <test_36>:
+    800006a8:	02400193          	li	gp,36
+    800006ac:	00002517          	auipc	a0,0x2
+    800006b0:	d1450513          	addi	a0,a0,-748 # 800023c0 <test_36_data>
+    800006b4:	00053007          	fld	ft0,0(a0)
+    800006b8:	00853087          	fld	ft1,8(a0)
+    800006bc:	01053107          	fld	ft2,16(a0)
+    800006c0:	01853683          	ld	a3,24(a0)
+    800006c4:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    800006c8:	001015f3          	fsflags	a1,zero
+    800006cc:	00000613          	li	a2,0
+    800006d0:	28d51263          	bne	a0,a3,80000954 <fail>
+    800006d4:	28c59063          	bne	a1,a2,80000954 <fail>
+
+00000000800006d8 <test_37>:
+    800006d8:	02500193          	li	gp,37
+    800006dc:	00002517          	auipc	a0,0x2
+    800006e0:	d0450513          	addi	a0,a0,-764 # 800023e0 <test_37_data>
+    800006e4:	00053007          	fld	ft0,0(a0)
+    800006e8:	00853087          	fld	ft1,8(a0)
+    800006ec:	01053107          	fld	ft2,16(a0)
+    800006f0:	01853683          	ld	a3,24(a0)
+    800006f4:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    800006f8:	001015f3          	fsflags	a1,zero
+    800006fc:	00100613          	li	a2,1
+    80000700:	24d51a63          	bne	a0,a3,80000954 <fail>
+    80000704:	24c59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000708 <test_38>:
+    80000708:	02600193          	li	gp,38
+    8000070c:	00002517          	auipc	a0,0x2
+    80000710:	cf450513          	addi	a0,a0,-780 # 80002400 <test_38_data>
+    80000714:	00053007          	fld	ft0,0(a0)
+    80000718:	00853087          	fld	ft1,8(a0)
+    8000071c:	01053107          	fld	ft2,16(a0)
+    80000720:	01853683          	ld	a3,24(a0)
+    80000724:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000728:	001015f3          	fsflags	a1,zero
+    8000072c:	01000613          	li	a2,16
+    80000730:	22d51263          	bne	a0,a3,80000954 <fail>
+    80000734:	22c59063          	bne	a1,a2,80000954 <fail>
+
+0000000080000738 <test_39>:
+    80000738:	02700193          	li	gp,39
+    8000073c:	00002517          	auipc	a0,0x2
+    80000740:	ce450513          	addi	a0,a0,-796 # 80002420 <test_39_data>
+    80000744:	00053007          	fld	ft0,0(a0)
+    80000748:	00853087          	fld	ft1,8(a0)
+    8000074c:	01053107          	fld	ft2,16(a0)
+    80000750:	01853683          	ld	a3,24(a0)
+    80000754:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80000758:	001015f3          	fsflags	a1,zero
+    8000075c:	00000613          	li	a2,0
+    80000760:	1ed51a63          	bne	a0,a3,80000954 <fail>
+    80000764:	1ec59863          	bne	a1,a2,80000954 <fail>
+
+0000000080000768 <test_42>:
+    80000768:	00002097          	auipc	ra,0x2
+    8000076c:	ce808093          	addi	ra,ra,-792 # 80002450 <tdat_d>
+    80000770:	0000b087          	fld	ft1,0(ra)
+    80000774:	c200f0d3          	fcvt.w.d	ra,ft1
+    80000778:	80000eb7          	lui	t4,0x80000
+    8000077c:	fffe8e9b          	addiw	t4,t4,-1
+    80000780:	02a00193          	li	gp,42
+    80000784:	1dd09863          	bne	ra,t4,80000954 <fail>
+
+0000000080000788 <test_43>:
+    80000788:	00002097          	auipc	ra,0x2
+    8000078c:	cc808093          	addi	ra,ra,-824 # 80002450 <tdat_d>
+    80000790:	0000b087          	fld	ft1,0(ra)
+    80000794:	c220f0d3          	fcvt.l.d	ra,ft1
+    80000798:	fff00e9b          	addiw	t4,zero,-1
+    8000079c:	03fe9e93          	slli	t4,t4,0x3f
+    800007a0:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffffdb8f>
+    800007a4:	02b00193          	li	gp,43
+    800007a8:	1bd09663          	bne	ra,t4,80000954 <fail>
+
+00000000800007ac <test_44>:
+    800007ac:	00002097          	auipc	ra,0x2
+    800007b0:	ca408093          	addi	ra,ra,-860 # 80002450 <tdat_d>
+    800007b4:	0100b087          	fld	ft1,16(ra)
+    800007b8:	c200f0d3          	fcvt.w.d	ra,ft1
+    800007bc:	80000eb7          	lui	t4,0x80000
+    800007c0:	02c00193          	li	gp,44
+    800007c4:	19d09863          	bne	ra,t4,80000954 <fail>
+
+00000000800007c8 <test_45>:
+    800007c8:	00002097          	auipc	ra,0x2
+    800007cc:	c8808093          	addi	ra,ra,-888 # 80002450 <tdat_d>
+    800007d0:	0100b087          	fld	ft1,16(ra)
+    800007d4:	c220f0d3          	fcvt.l.d	ra,ft1
+    800007d8:	fff00e9b          	addiw	t4,zero,-1
+    800007dc:	03fe9e93          	slli	t4,t4,0x3f
+    800007e0:	02d00193          	li	gp,45
+    800007e4:	17d09863          	bne	ra,t4,80000954 <fail>
+
+00000000800007e8 <test_52>:
+    800007e8:	00002097          	auipc	ra,0x2
+    800007ec:	c6808093          	addi	ra,ra,-920 # 80002450 <tdat_d>
+    800007f0:	0080b087          	fld	ft1,8(ra)
+    800007f4:	c200f0d3          	fcvt.w.d	ra,ft1
+    800007f8:	80000eb7          	lui	t4,0x80000
+    800007fc:	fffe8e9b          	addiw	t4,t4,-1
+    80000800:	03400193          	li	gp,52
+    80000804:	15d09863          	bne	ra,t4,80000954 <fail>
+
+0000000080000808 <test_53>:
+    80000808:	00002097          	auipc	ra,0x2
+    8000080c:	c4808093          	addi	ra,ra,-952 # 80002450 <tdat_d>
+    80000810:	0080b087          	fld	ft1,8(ra)
+    80000814:	c220f0d3          	fcvt.l.d	ra,ft1
+    80000818:	fff00e9b          	addiw	t4,zero,-1
+    8000081c:	03fe9e93          	slli	t4,t4,0x3f
+    80000820:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffffdb8f>
+    80000824:	03500193          	li	gp,53
+    80000828:	13d09663          	bne	ra,t4,80000954 <fail>
+
+000000008000082c <test_54>:
+    8000082c:	00002097          	auipc	ra,0x2
+    80000830:	c2408093          	addi	ra,ra,-988 # 80002450 <tdat_d>
+    80000834:	0180b087          	fld	ft1,24(ra)
+    80000838:	c200f0d3          	fcvt.w.d	ra,ft1
+    8000083c:	80000eb7          	lui	t4,0x80000
+    80000840:	fffe8e9b          	addiw	t4,t4,-1
+    80000844:	03600193          	li	gp,54
+    80000848:	11d09663          	bne	ra,t4,80000954 <fail>
+
+000000008000084c <test_55>:
+    8000084c:	00002097          	auipc	ra,0x2
+    80000850:	c0408093          	addi	ra,ra,-1020 # 80002450 <tdat_d>
+    80000854:	0180b087          	fld	ft1,24(ra)
+    80000858:	c220f0d3          	fcvt.l.d	ra,ft1
+    8000085c:	fff00e9b          	addiw	t4,zero,-1
+    80000860:	03fe9e93          	slli	t4,t4,0x3f
+    80000864:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffffdb8f>
+    80000868:	03700193          	li	gp,55
+    8000086c:	0fd09463          	bne	ra,t4,80000954 <fail>
+
+0000000080000870 <test_62>:
+    80000870:	00002097          	auipc	ra,0x2
+    80000874:	be008093          	addi	ra,ra,-1056 # 80002450 <tdat_d>
+    80000878:	0000b087          	fld	ft1,0(ra)
+    8000087c:	c210f0d3          	fcvt.wu.d	ra,ft1
+    80000880:	fff00e93          	li	t4,-1
+    80000884:	03e00193          	li	gp,62
+    80000888:	0dd09663          	bne	ra,t4,80000954 <fail>
+
+000000008000088c <test_63>:
+    8000088c:	00002097          	auipc	ra,0x2
+    80000890:	bc408093          	addi	ra,ra,-1084 # 80002450 <tdat_d>
+    80000894:	0080b087          	fld	ft1,8(ra)
+    80000898:	c210f0d3          	fcvt.wu.d	ra,ft1
+    8000089c:	fff00e93          	li	t4,-1
+    800008a0:	03f00193          	li	gp,63
+    800008a4:	0bd09863          	bne	ra,t4,80000954 <fail>
+
+00000000800008a8 <test_64>:
+    800008a8:	00002097          	auipc	ra,0x2
+    800008ac:	ba808093          	addi	ra,ra,-1112 # 80002450 <tdat_d>
+    800008b0:	0100b087          	fld	ft1,16(ra)
+    800008b4:	c210f0d3          	fcvt.wu.d	ra,ft1
+    800008b8:	00000e93          	li	t4,0
+    800008bc:	04000193          	li	gp,64
+    800008c0:	09d09a63          	bne	ra,t4,80000954 <fail>
+
+00000000800008c4 <test_65>:
+    800008c4:	00002097          	auipc	ra,0x2
+    800008c8:	b8c08093          	addi	ra,ra,-1140 # 80002450 <tdat_d>
+    800008cc:	0180b087          	fld	ft1,24(ra)
+    800008d0:	c210f0d3          	fcvt.wu.d	ra,ft1
+    800008d4:	fff00e93          	li	t4,-1
+    800008d8:	04100193          	li	gp,65
+    800008dc:	07d09c63          	bne	ra,t4,80000954 <fail>
+
+00000000800008e0 <test_66>:
+    800008e0:	00002097          	auipc	ra,0x2
+    800008e4:	b7008093          	addi	ra,ra,-1168 # 80002450 <tdat_d>
+    800008e8:	0000b087          	fld	ft1,0(ra)
+    800008ec:	c230f0d3          	fcvt.lu.d	ra,ft1
+    800008f0:	fff00e93          	li	t4,-1
+    800008f4:	04200193          	li	gp,66
+    800008f8:	05d09e63          	bne	ra,t4,80000954 <fail>
+
+00000000800008fc <test_67>:
+    800008fc:	00002097          	auipc	ra,0x2
+    80000900:	b5408093          	addi	ra,ra,-1196 # 80002450 <tdat_d>
+    80000904:	0080b087          	fld	ft1,8(ra)
+    80000908:	c230f0d3          	fcvt.lu.d	ra,ft1
+    8000090c:	fff00e93          	li	t4,-1
+    80000910:	04300193          	li	gp,67
+    80000914:	05d09063          	bne	ra,t4,80000954 <fail>
+
+0000000080000918 <test_68>:
+    80000918:	00002097          	auipc	ra,0x2
+    8000091c:	b3808093          	addi	ra,ra,-1224 # 80002450 <tdat_d>
+    80000920:	0100b087          	fld	ft1,16(ra)
+    80000924:	c230f0d3          	fcvt.lu.d	ra,ft1
+    80000928:	00000e93          	li	t4,0
+    8000092c:	04400193          	li	gp,68
+    80000930:	03d09263          	bne	ra,t4,80000954 <fail>
+
+0000000080000934 <test_69>:
+    80000934:	00002097          	auipc	ra,0x2
+    80000938:	b1c08093          	addi	ra,ra,-1252 # 80002450 <tdat_d>
+    8000093c:	0180b087          	fld	ft1,24(ra)
+    80000940:	c230f0d3          	fcvt.lu.d	ra,ft1
+    80000944:	fff00e93          	li	t4,-1
+    80000948:	04500193          	li	gp,69
+    8000094c:	01d09463          	bne	ra,t4,80000954 <fail>
+    80000950:	00301c63          	bne	zero,gp,80000968 <pass>
+
+0000000080000954 <fail>:
+    80000954:	0ff0000f          	fence
+    80000958:	00018063          	beqz	gp,80000958 <fail+0x4>
+    8000095c:	00119193          	slli	gp,gp,0x1
+    80000960:	0011e193          	ori	gp,gp,1
+    80000964:	00000073          	ecall
+
+0000000080000968 <pass>:
+    80000968:	0ff0000f          	fence
+    8000096c:	00100193          	li	gp,1
+    80000970:	00000073          	ecall
+    80000974:	c0001073          	unimp
+    80000978:	0000                	unimp
+    8000097a:	0000                	unimp
+    8000097c:	0000                	unimp
+    8000097e:	0000                	unimp
+    80000980:	0000                	unimp
+    80000982:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	999a                	add	s3,s3,t1
+    80002002:	9999                	andi	a1,a1,-26
+    80002004:	9999                	andi	a1,a1,-26
+    80002006:	bff1                	j	80001fe2 <fromhost+0xfa2>
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	0000                	unimp
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	ffff                	0xffff
+    8000201a:	ffff                	0xffff
+    8000201c:	ffff                	0xffff
+    8000201e:	ffff                	0xffff
+
+0000000080002020 <test_3_data>:
+    80002020:	0000                	unimp
+    80002022:	0000                	unimp
+    80002024:	0000                	unimp
+    80002026:	bff0                	fsd	fa2,248(a5)
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	0000                	unimp
+    8000202e:	0000                	unimp
+    80002030:	0000                	unimp
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	ffff                	0xffff
+    8000203a:	ffff                	0xffff
+    8000203c:	ffff                	0xffff
+    8000203e:	ffff                	0xffff
+
+0000000080002040 <test_4_data>:
+    80002040:	cccd                	beqz	s1,800020fa <test_9_data+0x1a>
+    80002042:	cccc                	sw	a1,28(s1)
+    80002044:	cccc                	sw	a1,28(s1)
+    80002046:	bfec                	fsd	fa1,248(a5)
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0000                	unimp
+    8000204e:	0000                	unimp
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	0000                	unimp
+
+0000000080002060 <test_5_data>:
+    80002060:	cccd                	beqz	s1,8000211a <test_12_data+0x1a>
+    80002062:	cccc                	sw	a1,28(s1)
+    80002064:	cccc                	sw	a1,28(s1)
+    80002066:	3fec                	fld	fa1,248(a5)
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	0000                	unimp
+    80002070:	0000                	unimp
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	0000                	unimp
+
+0000000080002080 <test_6_data>:
+    80002080:	0000                	unimp
+    80002082:	0000                	unimp
+    80002084:	0000                	unimp
+    80002086:	3ff0                	fld	fa2,248(a5)
+    80002088:	0000                	unimp
+    8000208a:	0000                	unimp
+    8000208c:	0000                	unimp
+    8000208e:	0000                	unimp
+    80002090:	0000                	unimp
+    80002092:	0000                	unimp
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0001                	nop
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	0000                	unimp
+
+00000000800020a0 <test_7_data>:
+    800020a0:	999a                	add	s3,s3,t1
+    800020a2:	9999                	andi	a1,a1,-26
+    800020a4:	9999                	andi	a1,a1,-26
+    800020a6:	3ff1                	addiw	t6,t6,-4
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	0000                	unimp
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0001                	nop
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	0000                	unimp
+
+00000000800020c0 <test_8_data>:
+    800020c0:	0000                	unimp
+    800020c2:	c000                	sw	s0,0(s0)
+    800020c4:	c1e65a0b          	0xc1e65a0b
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	0000                	unimp
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	0000                	unimp
+    800020da:	8000                	0x8000
+    800020dc:	ffff                	0xffff
+    800020de:	ffff                	0xffff
+
+00000000800020e0 <test_9_data>:
+    800020e0:	0000                	unimp
+    800020e2:	c000                	sw	s0,0(s0)
+    800020e4:	41e65a0b          	0x41e65a0b
+    800020e8:	0000                	unimp
+    800020ea:	0000                	unimp
+    800020ec:	0000                	unimp
+    800020ee:	0000                	unimp
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	ffff                	0xffff
+    800020fa:	7fff                	0x7fff
+    800020fc:	0000                	unimp
+    800020fe:	0000                	unimp
+
+0000000080002100 <test_12_data>:
+    80002100:	0000                	unimp
+    80002102:	0000                	unimp
+    80002104:	0000                	unimp
+    80002106:	c008                	sw	a0,0(s0)
+    80002108:	0000                	unimp
+    8000210a:	0000                	unimp
+    8000210c:	0000                	unimp
+    8000210e:	0000                	unimp
+    80002110:	0000                	unimp
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	0000                	unimp
+    80002118:	0000                	unimp
+    8000211a:	0000                	unimp
+    8000211c:	0000                	unimp
+    8000211e:	0000                	unimp
+
+0000000080002120 <test_13_data>:
+    80002120:	0000                	unimp
+    80002122:	0000                	unimp
+    80002124:	0000                	unimp
+    80002126:	bff0                	fsd	fa2,248(a5)
+    80002128:	0000                	unimp
+    8000212a:	0000                	unimp
+    8000212c:	0000                	unimp
+    8000212e:	0000                	unimp
+    80002130:	0000                	unimp
+    80002132:	0000                	unimp
+    80002134:	0000                	unimp
+    80002136:	0000                	unimp
+    80002138:	0000                	unimp
+    8000213a:	0000                	unimp
+    8000213c:	0000                	unimp
+    8000213e:	0000                	unimp
+
+0000000080002140 <test_14_data>:
+    80002140:	cccd                	beqz	s1,800021fa <test_19_data+0x1a>
+    80002142:	cccc                	sw	a1,28(s1)
+    80002144:	cccc                	sw	a1,28(s1)
+    80002146:	bfec                	fsd	fa1,248(a5)
+    80002148:	0000                	unimp
+    8000214a:	0000                	unimp
+    8000214c:	0000                	unimp
+    8000214e:	0000                	unimp
+    80002150:	0000                	unimp
+    80002152:	0000                	unimp
+    80002154:	0000                	unimp
+    80002156:	0000                	unimp
+    80002158:	0000                	unimp
+    8000215a:	0000                	unimp
+    8000215c:	0000                	unimp
+    8000215e:	0000                	unimp
+
+0000000080002160 <test_15_data>:
+    80002160:	cccd                	beqz	s1,8000221a <test_22_data+0x1a>
+    80002162:	cccc                	sw	a1,28(s1)
+    80002164:	cccc                	sw	a1,28(s1)
+    80002166:	3fec                	fld	fa1,248(a5)
+    80002168:	0000                	unimp
+    8000216a:	0000                	unimp
+    8000216c:	0000                	unimp
+    8000216e:	0000                	unimp
+    80002170:	0000                	unimp
+    80002172:	0000                	unimp
+    80002174:	0000                	unimp
+    80002176:	0000                	unimp
+    80002178:	0000                	unimp
+    8000217a:	0000                	unimp
+    8000217c:	0000                	unimp
+    8000217e:	0000                	unimp
+
+0000000080002180 <test_16_data>:
+    80002180:	0000                	unimp
+    80002182:	0000                	unimp
+    80002184:	0000                	unimp
+    80002186:	3ff0                	fld	fa2,248(a5)
+    80002188:	0000                	unimp
+    8000218a:	0000                	unimp
+    8000218c:	0000                	unimp
+    8000218e:	0000                	unimp
+    80002190:	0000                	unimp
+    80002192:	0000                	unimp
+    80002194:	0000                	unimp
+    80002196:	0000                	unimp
+    80002198:	0001                	nop
+    8000219a:	0000                	unimp
+    8000219c:	0000                	unimp
+    8000219e:	0000                	unimp
+
+00000000800021a0 <test_17_data>:
+    800021a0:	999a                	add	s3,s3,t1
+    800021a2:	9999                	andi	a1,a1,-26
+    800021a4:	9999                	andi	a1,a1,-26
+    800021a6:	3ff1                	addiw	t6,t6,-4
+    800021a8:	0000                	unimp
+    800021aa:	0000                	unimp
+    800021ac:	0000                	unimp
+    800021ae:	0000                	unimp
+    800021b0:	0000                	unimp
+    800021b2:	0000                	unimp
+    800021b4:	0000                	unimp
+    800021b6:	0000                	unimp
+    800021b8:	0001                	nop
+    800021ba:	0000                	unimp
+    800021bc:	0000                	unimp
+    800021be:	0000                	unimp
+
+00000000800021c0 <test_18_data>:
+    800021c0:	0000                	unimp
+    800021c2:	c000                	sw	s0,0(s0)
+    800021c4:	c1e65a0b          	0xc1e65a0b
+    800021c8:	0000                	unimp
+    800021ca:	0000                	unimp
+    800021cc:	0000                	unimp
+    800021ce:	0000                	unimp
+    800021d0:	0000                	unimp
+    800021d2:	0000                	unimp
+    800021d4:	0000                	unimp
+    800021d6:	0000                	unimp
+    800021d8:	0000                	unimp
+    800021da:	0000                	unimp
+    800021dc:	0000                	unimp
+    800021de:	0000                	unimp
+
+00000000800021e0 <test_19_data>:
+    800021e0:	0000                	unimp
+    800021e2:	c000                	sw	s0,0(s0)
+    800021e4:	41e65a0b          	0x41e65a0b
+    800021e8:	0000                	unimp
+    800021ea:	0000                	unimp
+    800021ec:	0000                	unimp
+    800021ee:	0000                	unimp
+    800021f0:	0000                	unimp
+    800021f2:	0000                	unimp
+    800021f4:	0000                	unimp
+    800021f6:	0000                	unimp
+    800021f8:	5e00                	lw	s0,56(a2)
+    800021fa:	b2d0                	fsd	fa2,160(a3)
+    800021fc:	ffff                	0xffff
+    800021fe:	ffff                	0xffff
+
+0000000080002200 <test_22_data>:
+    80002200:	999a                	add	s3,s3,t1
+    80002202:	9999                	andi	a1,a1,-26
+    80002204:	9999                	andi	a1,a1,-26
+    80002206:	bff1                	j	800021e2 <test_19_data+0x2>
+    80002208:	0000                	unimp
+    8000220a:	0000                	unimp
+    8000220c:	0000                	unimp
+    8000220e:	0000                	unimp
+    80002210:	0000                	unimp
+    80002212:	0000                	unimp
+    80002214:	0000                	unimp
+    80002216:	0000                	unimp
+    80002218:	ffff                	0xffff
+    8000221a:	ffff                	0xffff
+    8000221c:	ffff                	0xffff
+    8000221e:	ffff                	0xffff
+
+0000000080002220 <test_23_data>:
+    80002220:	0000                	unimp
+    80002222:	0000                	unimp
+    80002224:	0000                	unimp
+    80002226:	bff0                	fsd	fa2,248(a5)
+    80002228:	0000                	unimp
+    8000222a:	0000                	unimp
+    8000222c:	0000                	unimp
+    8000222e:	0000                	unimp
+    80002230:	0000                	unimp
+    80002232:	0000                	unimp
+    80002234:	0000                	unimp
+    80002236:	0000                	unimp
+    80002238:	ffff                	0xffff
+    8000223a:	ffff                	0xffff
+    8000223c:	ffff                	0xffff
+    8000223e:	ffff                	0xffff
+
+0000000080002240 <test_24_data>:
+    80002240:	cccd                	beqz	s1,800022fa <test_29_data+0x1a>
+    80002242:	cccc                	sw	a1,28(s1)
+    80002244:	cccc                	sw	a1,28(s1)
+    80002246:	bfec                	fsd	fa1,248(a5)
+    80002248:	0000                	unimp
+    8000224a:	0000                	unimp
+    8000224c:	0000                	unimp
+    8000224e:	0000                	unimp
+    80002250:	0000                	unimp
+    80002252:	0000                	unimp
+    80002254:	0000                	unimp
+    80002256:	0000                	unimp
+    80002258:	0000                	unimp
+    8000225a:	0000                	unimp
+    8000225c:	0000                	unimp
+    8000225e:	0000                	unimp
+
+0000000080002260 <test_25_data>:
+    80002260:	cccd                	beqz	s1,8000231a <test_20_data+0x1a>
+    80002262:	cccc                	sw	a1,28(s1)
+    80002264:	cccc                	sw	a1,28(s1)
+    80002266:	3fec                	fld	fa1,248(a5)
+    80002268:	0000                	unimp
+    8000226a:	0000                	unimp
+    8000226c:	0000                	unimp
+    8000226e:	0000                	unimp
+    80002270:	0000                	unimp
+    80002272:	0000                	unimp
+    80002274:	0000                	unimp
+    80002276:	0000                	unimp
+    80002278:	0000                	unimp
+    8000227a:	0000                	unimp
+    8000227c:	0000                	unimp
+    8000227e:	0000                	unimp
+
+0000000080002280 <test_26_data>:
+    80002280:	0000                	unimp
+    80002282:	0000                	unimp
+    80002284:	0000                	unimp
+    80002286:	3ff0                	fld	fa2,248(a5)
+    80002288:	0000                	unimp
+    8000228a:	0000                	unimp
+    8000228c:	0000                	unimp
+    8000228e:	0000                	unimp
+    80002290:	0000                	unimp
+    80002292:	0000                	unimp
+    80002294:	0000                	unimp
+    80002296:	0000                	unimp
+    80002298:	0001                	nop
+    8000229a:	0000                	unimp
+    8000229c:	0000                	unimp
+    8000229e:	0000                	unimp
+
+00000000800022a0 <test_27_data>:
+    800022a0:	999a                	add	s3,s3,t1
+    800022a2:	9999                	andi	a1,a1,-26
+    800022a4:	9999                	andi	a1,a1,-26
+    800022a6:	3ff1                	addiw	t6,t6,-4
+    800022a8:	0000                	unimp
+    800022aa:	0000                	unimp
+    800022ac:	0000                	unimp
+    800022ae:	0000                	unimp
+    800022b0:	0000                	unimp
+    800022b2:	0000                	unimp
+    800022b4:	0000                	unimp
+    800022b6:	0000                	unimp
+    800022b8:	0001                	nop
+    800022ba:	0000                	unimp
+    800022bc:	0000                	unimp
+    800022be:	0000                	unimp
+
+00000000800022c0 <test_28_data>:
+    800022c0:	0000                	unimp
+    800022c2:	c000                	sw	s0,0(s0)
+    800022c4:	c1e65a0b          	0xc1e65a0b
+    800022c8:	0000                	unimp
+    800022ca:	0000                	unimp
+    800022cc:	0000                	unimp
+    800022ce:	0000                	unimp
+    800022d0:	0000                	unimp
+    800022d2:	0000                	unimp
+    800022d4:	0000                	unimp
+    800022d6:	0000                	unimp
+    800022d8:	a200                	fsd	fs0,0(a2)
+    800022da:	ffff4d2f          	0xffff4d2f
+    800022de:	ffff                	0xffff
+
+00000000800022e0 <test_29_data>:
+    800022e0:	0000                	unimp
+    800022e2:	c000                	sw	s0,0(s0)
+    800022e4:	41e65a0b          	0x41e65a0b
+    800022e8:	0000                	unimp
+    800022ea:	0000                	unimp
+    800022ec:	0000                	unimp
+    800022ee:	0000                	unimp
+    800022f0:	0000                	unimp
+    800022f2:	0000                	unimp
+    800022f4:	0000                	unimp
+    800022f6:	0000                	unimp
+    800022f8:	5e00                	lw	s0,56(a2)
+    800022fa:	b2d0                	fsd	fa2,160(a3)
+    800022fc:	0000                	unimp
+    800022fe:	0000                	unimp
+
+0000000080002300 <test_20_data>:
+    80002300:	db80                	sw	s0,48(a5)
+    80002302:	90d9                	srli	s1,s1,0x36
+    80002304:	0556                	slli	a0,a0,0x15
+    80002306:	c3fa                	sw	t5,196(sp)
+    80002308:	0000                	unimp
+    8000230a:	0000                	unimp
+    8000230c:	0000                	unimp
+    8000230e:	0000                	unimp
+    80002310:	0000                	unimp
+    80002312:	0000                	unimp
+    80002314:	0000                	unimp
+    80002316:	0000                	unimp
+    80002318:	0000                	unimp
+    8000231a:	0000                	unimp
+    8000231c:	0000                	unimp
+    8000231e:	8000                	0x8000
+
+0000000080002320 <test_21_data>:
+    80002320:	db80                	sw	s0,48(a5)
+    80002322:	90d9                	srli	s1,s1,0x36
+    80002324:	0556                	slli	a0,a0,0x15
+    80002326:	43fa                	lw	t2,156(sp)
+    80002328:	0000                	unimp
+    8000232a:	0000                	unimp
+    8000232c:	0000                	unimp
+    8000232e:	0000                	unimp
+    80002330:	0000                	unimp
+    80002332:	0000                	unimp
+    80002334:	0000                	unimp
+    80002336:	0000                	unimp
+    80002338:	ffff                	0xffff
+    8000233a:	ffff                	0xffff
+    8000233c:	ffff                	0xffff
+    8000233e:	7fff                	0x7fff
+
+0000000080002340 <test_32_data>:
+    80002340:	0000                	unimp
+    80002342:	0000                	unimp
+    80002344:	0000                	unimp
+    80002346:	c008                	sw	a0,0(s0)
+    80002348:	0000                	unimp
+    8000234a:	0000                	unimp
+    8000234c:	0000                	unimp
+    8000234e:	0000                	unimp
+    80002350:	0000                	unimp
+    80002352:	0000                	unimp
+    80002354:	0000                	unimp
+    80002356:	0000                	unimp
+    80002358:	0000                	unimp
+    8000235a:	0000                	unimp
+    8000235c:	0000                	unimp
+    8000235e:	0000                	unimp
+
+0000000080002360 <test_33_data>:
+    80002360:	0000                	unimp
+    80002362:	0000                	unimp
+    80002364:	0000                	unimp
+    80002366:	bff0                	fsd	fa2,248(a5)
+    80002368:	0000                	unimp
+    8000236a:	0000                	unimp
+    8000236c:	0000                	unimp
+    8000236e:	0000                	unimp
+    80002370:	0000                	unimp
+    80002372:	0000                	unimp
+    80002374:	0000                	unimp
+    80002376:	0000                	unimp
+    80002378:	0000                	unimp
+    8000237a:	0000                	unimp
+    8000237c:	0000                	unimp
+    8000237e:	0000                	unimp
+
+0000000080002380 <test_34_data>:
+    80002380:	cccd                	beqz	s1,8000243a <test_39_data+0x1a>
+    80002382:	cccc                	sw	a1,28(s1)
+    80002384:	cccc                	sw	a1,28(s1)
+    80002386:	bfec                	fsd	fa1,248(a5)
+    80002388:	0000                	unimp
+    8000238a:	0000                	unimp
+    8000238c:	0000                	unimp
+    8000238e:	0000                	unimp
+    80002390:	0000                	unimp
+    80002392:	0000                	unimp
+    80002394:	0000                	unimp
+    80002396:	0000                	unimp
+    80002398:	0000                	unimp
+    8000239a:	0000                	unimp
+    8000239c:	0000                	unimp
+    8000239e:	0000                	unimp
+
+00000000800023a0 <test_35_data>:
+    800023a0:	cccd                	beqz	s1,8000245a <tdat_d+0xa>
+    800023a2:	cccc                	sw	a1,28(s1)
+    800023a4:	cccc                	sw	a1,28(s1)
+    800023a6:	3fec                	fld	fa1,248(a5)
+    800023a8:	0000                	unimp
+    800023aa:	0000                	unimp
+    800023ac:	0000                	unimp
+    800023ae:	0000                	unimp
+    800023b0:	0000                	unimp
+    800023b2:	0000                	unimp
+    800023b4:	0000                	unimp
+    800023b6:	0000                	unimp
+    800023b8:	0000                	unimp
+    800023ba:	0000                	unimp
+    800023bc:	0000                	unimp
+    800023be:	0000                	unimp
+
+00000000800023c0 <test_36_data>:
+    800023c0:	0000                	unimp
+    800023c2:	0000                	unimp
+    800023c4:	0000                	unimp
+    800023c6:	3ff0                	fld	fa2,248(a5)
+    800023c8:	0000                	unimp
+    800023ca:	0000                	unimp
+    800023cc:	0000                	unimp
+    800023ce:	0000                	unimp
+    800023d0:	0000                	unimp
+    800023d2:	0000                	unimp
+    800023d4:	0000                	unimp
+    800023d6:	0000                	unimp
+    800023d8:	0001                	nop
+    800023da:	0000                	unimp
+    800023dc:	0000                	unimp
+    800023de:	0000                	unimp
+
+00000000800023e0 <test_37_data>:
+    800023e0:	999a                	add	s3,s3,t1
+    800023e2:	9999                	andi	a1,a1,-26
+    800023e4:	9999                	andi	a1,a1,-26
+    800023e6:	3ff1                	addiw	t6,t6,-4
+    800023e8:	0000                	unimp
+    800023ea:	0000                	unimp
+    800023ec:	0000                	unimp
+    800023ee:	0000                	unimp
+    800023f0:	0000                	unimp
+    800023f2:	0000                	unimp
+    800023f4:	0000                	unimp
+    800023f6:	0000                	unimp
+    800023f8:	0001                	nop
+    800023fa:	0000                	unimp
+    800023fc:	0000                	unimp
+    800023fe:	0000                	unimp
+
+0000000080002400 <test_38_data>:
+    80002400:	0000                	unimp
+    80002402:	c000                	sw	s0,0(s0)
+    80002404:	c1e65a0b          	0xc1e65a0b
+    80002408:	0000                	unimp
+    8000240a:	0000                	unimp
+    8000240c:	0000                	unimp
+    8000240e:	0000                	unimp
+    80002410:	0000                	unimp
+    80002412:	0000                	unimp
+    80002414:	0000                	unimp
+    80002416:	0000                	unimp
+    80002418:	0000                	unimp
+    8000241a:	0000                	unimp
+    8000241c:	0000                	unimp
+    8000241e:	0000                	unimp
+
+0000000080002420 <test_39_data>:
+    80002420:	0000                	unimp
+    80002422:	c000                	sw	s0,0(s0)
+    80002424:	41e65a0b          	0x41e65a0b
+    80002428:	0000                	unimp
+    8000242a:	0000                	unimp
+    8000242c:	0000                	unimp
+    8000242e:	0000                	unimp
+    80002430:	0000                	unimp
+    80002432:	0000                	unimp
+    80002434:	0000                	unimp
+    80002436:	0000                	unimp
+    80002438:	5e00                	lw	s0,56(a2)
+    8000243a:	b2d0                	fsd	fa2,160(a3)
+    8000243c:	0000                	unimp
+    8000243e:	0000                	unimp
+
+0000000080002440 <begin_signature>:
+    80002440:	ffff                	0xffff
+    80002442:	ffff                	0xffff
+    80002444:	ffff                	0xffff
+    80002446:	7fff                	0x7fff
+    80002448:	0000                	unimp
+    8000244a:	ff80                	sd	s0,56(a5)
+    8000244c:	0000                	unimp
+    8000244e:	7f80                	ld	s0,56(a5)
+
+0000000080002450 <tdat_d>:
+    80002450:	ffff                	0xffff
+    80002452:	ffff                	0xffff
+    80002454:	ffff                	0xffff
+    80002456:	ffff                	0xffff
+    80002458:	ffff                	0xffff
+    8000245a:	ffff                	0xffff
+    8000245c:	ffff                	0xffff
+    8000245e:	7fff                	0x7fff
+    80002460:	0000                	unimp
+    80002462:	0000                	unimp
+    80002464:	0000                	unimp
+    80002466:	fff0                	sd	a2,248(a5)
+    80002468:	0000                	unimp
+    8000246a:	0000                	unimp
+    8000246c:	0000                	unimp
+    8000246e:	7ff0                	ld	a2,248(a5)
diff --git a/test/riscv-tests/rv64ud-p-fcvt_w.elf b/test/riscv-tests/rv64ud-p-fcvt_w.elf
new file mode 100644
index 0000000..4db28d5
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fcvt_w.elf
diff --git a/test/riscv-tests/rv64ud-p-fdiv.dump b/test/riscv-tests/rv64ud-p-fdiv.dump
new file mode 100644
index 0000000..ee1330c
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fdiv.dump
@@ -0,0 +1,375 @@
+
+rv64ud-p-fdiv:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    80000128:	e2018553          	fmv.x.d	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00100613          	li	a2,1
+    80000134:	16d51c63          	bne	a0,a3,800002ac <fail>
+    80000138:	16c59a63          	bne	a1,a2,800002ac <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ee050513          	addi	a0,a0,-288 # 80002020 <test_3_data>
+    80000148:	00053007          	fld	ft0,0(a0)
+    8000014c:	00853087          	fld	ft1,8(a0)
+    80000150:	01053107          	fld	ft2,16(a0)
+    80000154:	01853683          	ld	a3,24(a0)
+    80000158:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    8000015c:	e2018553          	fmv.x.d	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	14d51263          	bne	a0,a3,800002ac <fail>
+    8000016c:	14c59063          	bne	a1,a2,800002ac <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	ecc50513          	addi	a0,a0,-308 # 80002040 <test_4_data>
+    8000017c:	00053007          	fld	ft0,0(a0)
+    80000180:	00853087          	fld	ft1,8(a0)
+    80000184:	01053107          	fld	ft2,16(a0)
+    80000188:	01853683          	ld	a3,24(a0)
+    8000018c:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    80000190:	e2018553          	fmv.x.d	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	10d51863          	bne	a0,a3,800002ac <fail>
+    800001a0:	10c59663          	bne	a1,a2,800002ac <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	eb850513          	addi	a0,a0,-328 # 80002060 <test_5_data>
+    800001b0:	00053007          	fld	ft0,0(a0)
+    800001b4:	00853087          	fld	ft1,8(a0)
+    800001b8:	01053107          	fld	ft2,16(a0)
+    800001bc:	01853683          	ld	a3,24(a0)
+    800001c0:	5a0071d3          	fsqrt.d	ft3,ft0
+    800001c4:	e2018553          	fmv.x.d	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00100613          	li	a2,1
+    800001d0:	0cd51e63          	bne	a0,a3,800002ac <fail>
+    800001d4:	0cc59c63          	bne	a1,a2,800002ac <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	ea450513          	addi	a0,a0,-348 # 80002080 <test_6_data>
+    800001e4:	00053007          	fld	ft0,0(a0)
+    800001e8:	00853087          	fld	ft1,8(a0)
+    800001ec:	01053107          	fld	ft2,16(a0)
+    800001f0:	01853683          	ld	a3,24(a0)
+    800001f4:	5a0071d3          	fsqrt.d	ft3,ft0
+    800001f8:	e2018553          	fmv.x.d	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00000613          	li	a2,0
+    80000204:	0ad51463          	bne	a0,a3,800002ac <fail>
+    80000208:	0ac59263          	bne	a1,a2,800002ac <fail>
+
+000000008000020c <test_16>:
+    8000020c:	01000193          	li	gp,16
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e9050513          	addi	a0,a0,-368 # 800020a0 <test_16_data>
+    80000218:	00053007          	fld	ft0,0(a0)
+    8000021c:	00853087          	fld	ft1,8(a0)
+    80000220:	01053107          	fld	ft2,16(a0)
+    80000224:	01853683          	ld	a3,24(a0)
+    80000228:	5a0071d3          	fsqrt.d	ft3,ft0
+    8000022c:	e2018553          	fmv.x.d	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	01000613          	li	a2,16
+    80000238:	06d51a63          	bne	a0,a3,800002ac <fail>
+    8000023c:	06c59863          	bne	a1,a2,800002ac <fail>
+
+0000000080000240 <test_7>:
+    80000240:	00700193          	li	gp,7
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e7c50513          	addi	a0,a0,-388 # 800020c0 <test_7_data>
+    8000024c:	00053007          	fld	ft0,0(a0)
+    80000250:	00853087          	fld	ft1,8(a0)
+    80000254:	01053107          	fld	ft2,16(a0)
+    80000258:	01853683          	ld	a3,24(a0)
+    8000025c:	5a0071d3          	fsqrt.d	ft3,ft0
+    80000260:	e2018553          	fmv.x.d	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00100613          	li	a2,1
+    8000026c:	04d51063          	bne	a0,a3,800002ac <fail>
+    80000270:	02c59e63          	bne	a1,a2,800002ac <fail>
+
+0000000080000274 <test_8>:
+    80000274:	00800193          	li	gp,8
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	e6850513          	addi	a0,a0,-408 # 800020e0 <test_8_data>
+    80000280:	00053007          	fld	ft0,0(a0)
+    80000284:	00853087          	fld	ft1,8(a0)
+    80000288:	01053107          	fld	ft2,16(a0)
+    8000028c:	01853683          	ld	a3,24(a0)
+    80000290:	5a0071d3          	fsqrt.d	ft3,ft0
+    80000294:	e2018553          	fmv.x.d	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00100613          	li	a2,1
+    800002a0:	00d51663          	bne	a0,a3,800002ac <fail>
+    800002a4:	00c59463          	bne	a1,a2,800002ac <fail>
+    800002a8:	00301c63          	bne	zero,gp,800002c0 <pass>
+
+00000000800002ac <fail>:
+    800002ac:	0ff0000f          	fence
+    800002b0:	00018063          	beqz	gp,800002b0 <fail+0x4>
+    800002b4:	00119193          	slli	gp,gp,0x1
+    800002b8:	0011e193          	ori	gp,gp,1
+    800002bc:	00000073          	ecall
+
+00000000800002c0 <pass>:
+    800002c0:	0ff0000f          	fence
+    800002c4:	00100193          	li	gp,1
+    800002c8:	00000073          	ecall
+    800002cc:	c0001073          	unimp
+    800002d0:	0000                	unimp
+    800002d2:	0000                	unimp
+    800002d4:	0000                	unimp
+    800002d6:	0000                	unimp
+    800002d8:	0000                	unimp
+    800002da:	0000                	unimp
+    800002dc:	0000                	unimp
+    800002de:	0000                	unimp
+    800002e0:	0000                	unimp
+    800002e2:	0000                	unimp
+    800002e4:	0000                	unimp
+    800002e6:	0000                	unimp
+    800002e8:	0000                	unimp
+    800002ea:	0000                	unimp
+    800002ec:	0000                	unimp
+    800002ee:	0000                	unimp
+    800002f0:	0000                	unimp
+    800002f2:	0000                	unimp
+    800002f4:	0000                	unimp
+    800002f6:	0000                	unimp
+    800002f8:	0000                	unimp
+    800002fa:	0000                	unimp
+    800002fc:	0000                	unimp
+    800002fe:	0000                	unimp
+    80000300:	0000                	unimp
+    80000302:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	d4f1                	beqz	s1,80001fcc <fromhost+0xf8c>
+    80002002:	53c8                	lw	a0,36(a5)
+    80002004:	400921fb          	0x400921fb
+    80002008:	b0dd                	j	800018ee <fromhost+0x8ae>
+    8000200a:	89f1                	andi	a1,a1,28
+    8000200c:	bf0a                	fsd	ft2,440(sp)
+    8000200e:	4005                	c.li	zero,1
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	83ec                	0x83ec
+    8000201a:	7ddbf6c3          	0x7ddbf6c3
+    8000201e:	3ff2                	fld	ft11,312(sp)
+
+0000000080002020 <test_3_data>:
+    80002020:	0000                	unimp
+    80002022:	0000                	unimp
+    80002024:	4800                	lw	s0,16(s0)
+    80002026:	6666c093          	xori	ra,a3,1638
+    8000202a:	6666                	ld	a2,88(sp)
+    8000202c:	4c66                	lw	s8,88(sp)
+    8000202e:	00004093          	xori	ra,zero,0
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	29a5                	addiw	s3,s3,9
+    8000203a:	3e19                	addiw	t3,t3,-26
+    8000203c:	f8b4                	sd	a3,112(s1)
+    8000203e:	          	jal	t6,7ff1dd8c <_start-0xe2274>
+
+0000000080002040 <test_4_data>:
+    80002040:	d4f1                	beqz	s1,8000200c <test_2_data+0xc>
+    80002042:	53c8                	lw	a0,36(a5)
+    80002044:	400921fb          	0x400921fb
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0000                	unimp
+    8000204e:	3ff0                	fld	fa2,248(a5)
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	d4f1                	beqz	s1,80002024 <test_3_data+0x4>
+    8000205a:	53c8                	lw	a0,36(a5)
+    8000205c:	400921fb          	0x400921fb
+
+0000000080002060 <test_5_data>:
+    80002060:	d4f1                	beqz	s1,8000202c <test_3_data+0xc>
+    80002062:	53c8                	lw	a0,36(a5)
+    80002064:	400921fb          	0x400921fb
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	0000                	unimp
+    80002070:	0000                	unimp
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	916f587b          	0x916f587b
+    8000207c:	5bf8                	lw	a4,116(a5)
+    8000207e:	3ffc                	fld	fa5,248(a5)
+
+0000000080002080 <test_6_data>:
+    80002080:	0000                	unimp
+    80002082:	0000                	unimp
+    80002084:	8800                	0x8800
+    80002086:	000040c3          	fmadd.s	ft1,ft0,ft0,ft0,rmm
+    8000208a:	0000                	unimp
+    8000208c:	0000                	unimp
+    8000208e:	0000                	unimp
+    80002090:	0000                	unimp
+    80002092:	0000                	unimp
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	4059                	c.li	zero,22
+
+00000000800020a0 <test_16_data>:
+    800020a0:	0000                	unimp
+    800020a2:	0000                	unimp
+    800020a4:	0000                	unimp
+    800020a6:	bff0                	fsd	fa2,248(a5)
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	0000                	unimp
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	7ff8                	ld	a4,248(a5)
+
+00000000800020c0 <test_7_data>:
+    800020c0:	0000                	unimp
+    800020c2:	0000                	unimp
+    800020c4:	6000                	ld	s0,0(s0)
+    800020c6:	4065                	c.li	zero,25
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	0000                	unimp
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	74f5                	lui	s1,0xffffd
+    800020da:	ce96                	sw	t0,92(sp)
+    800020dc:	2744                	fld	fs1,136(a4)
+    800020de:	402a                	0x402a
+
+00000000800020e0 <test_8_data>:
+    800020e0:	a105                	j	80002500 <_end+0x400>
+    800020e2:	c70a                	sw	sp,140(sp)
+    800020e4:	94df 3e85 0000      	0x3e8594df
+    800020ea:	0000                	unimp
+    800020ec:	0000                	unimp
+    800020ee:	0000                	unimp
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	7f99                	lui	t6,0xfffe6
+    800020fa:	4789c0e3          	blt	s3,s8,80002d5a <_end+0xc5a>
+    800020fe:	3f3a                	fld	ft10,424(sp)
diff --git a/test/riscv-tests/rv64ud-p-fdiv.elf b/test/riscv-tests/rv64ud-p-fdiv.elf
new file mode 100644
index 0000000..d62c776
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fdiv.elf
diff --git a/test/riscv-tests/rv64ud-p-fmadd.dump b/test/riscv-tests/rv64ud-p-fmadd.dump
new file mode 100644
index 0000000..c04db2d
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fmadd.dump
@@ -0,0 +1,507 @@
+
+rv64ud-p-fmadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    80000128:	e2018553          	fmv.x.d	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	24d51463          	bne	a0,a3,8000037c <fail>
+    80000138:	24c59263          	bne	a1,a2,8000037c <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ee050513          	addi	a0,a0,-288 # 80002020 <test_3_data>
+    80000148:	00053007          	fld	ft0,0(a0)
+    8000014c:	00853087          	fld	ft1,8(a0)
+    80000150:	01053107          	fld	ft2,16(a0)
+    80000154:	01853683          	ld	a3,24(a0)
+    80000158:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    8000015c:	e2018553          	fmv.x.d	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	20d51a63          	bne	a0,a3,8000037c <fail>
+    8000016c:	20c59863          	bne	a1,a2,8000037c <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	ecc50513          	addi	a0,a0,-308 # 80002040 <test_4_data>
+    8000017c:	00053007          	fld	ft0,0(a0)
+    80000180:	00853087          	fld	ft1,8(a0)
+    80000184:	01053107          	fld	ft2,16(a0)
+    80000188:	01853683          	ld	a3,24(a0)
+    8000018c:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    80000190:	e2018553          	fmv.x.d	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	1ed51063          	bne	a0,a3,8000037c <fail>
+    800001a0:	1cc59e63          	bne	a1,a2,8000037c <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	eb850513          	addi	a0,a0,-328 # 80002060 <test_5_data>
+    800001b0:	00053007          	fld	ft0,0(a0)
+    800001b4:	00853087          	fld	ft1,8(a0)
+    800001b8:	01053107          	fld	ft2,16(a0)
+    800001bc:	01853683          	ld	a3,24(a0)
+    800001c0:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    800001c4:	e2018553          	fmv.x.d	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	1ad51663          	bne	a0,a3,8000037c <fail>
+    800001d4:	1ac59463          	bne	a1,a2,8000037c <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	ea450513          	addi	a0,a0,-348 # 80002080 <test_6_data>
+    800001e4:	00053007          	fld	ft0,0(a0)
+    800001e8:	00853087          	fld	ft1,8(a0)
+    800001ec:	01053107          	fld	ft2,16(a0)
+    800001f0:	01853683          	ld	a3,24(a0)
+    800001f4:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    800001f8:	e2018553          	fmv.x.d	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00100613          	li	a2,1
+    80000204:	16d51c63          	bne	a0,a3,8000037c <fail>
+    80000208:	16c59a63          	bne	a1,a2,8000037c <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e9050513          	addi	a0,a0,-368 # 800020a0 <test_7_data>
+    80000218:	00053007          	fld	ft0,0(a0)
+    8000021c:	00853087          	fld	ft1,8(a0)
+    80000220:	01053107          	fld	ft2,16(a0)
+    80000224:	01853683          	ld	a3,24(a0)
+    80000228:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    8000022c:	e2018553          	fmv.x.d	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00000613          	li	a2,0
+    80000238:	14d51263          	bne	a0,a3,8000037c <fail>
+    8000023c:	14c59063          	bne	a1,a2,8000037c <fail>
+
+0000000080000240 <test_8>:
+    80000240:	00800193          	li	gp,8
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e7c50513          	addi	a0,a0,-388 # 800020c0 <test_8_data>
+    8000024c:	00053007          	fld	ft0,0(a0)
+    80000250:	00853087          	fld	ft1,8(a0)
+    80000254:	01053107          	fld	ft2,16(a0)
+    80000258:	01853683          	ld	a3,24(a0)
+    8000025c:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    80000260:	e2018553          	fmv.x.d	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	10d51863          	bne	a0,a3,8000037c <fail>
+    80000270:	10c59663          	bne	a1,a2,8000037c <fail>
+
+0000000080000274 <test_9>:
+    80000274:	00900193          	li	gp,9
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	e6850513          	addi	a0,a0,-408 # 800020e0 <test_9_data>
+    80000280:	00053007          	fld	ft0,0(a0)
+    80000284:	00853087          	fld	ft1,8(a0)
+    80000288:	01053107          	fld	ft2,16(a0)
+    8000028c:	01853683          	ld	a3,24(a0)
+    80000290:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    80000294:	e2018553          	fmv.x.d	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00100613          	li	a2,1
+    800002a0:	0cd51e63          	bne	a0,a3,8000037c <fail>
+    800002a4:	0cc59c63          	bne	a1,a2,8000037c <fail>
+
+00000000800002a8 <test_10>:
+    800002a8:	00a00193          	li	gp,10
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	e5450513          	addi	a0,a0,-428 # 80002100 <test_10_data>
+    800002b4:	00053007          	fld	ft0,0(a0)
+    800002b8:	00853087          	fld	ft1,8(a0)
+    800002bc:	01053107          	fld	ft2,16(a0)
+    800002c0:	01853683          	ld	a3,24(a0)
+    800002c4:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    800002c8:	e2018553          	fmv.x.d	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00000613          	li	a2,0
+    800002d4:	0ad51463          	bne	a0,a3,8000037c <fail>
+    800002d8:	0ac59263          	bne	a1,a2,8000037c <fail>
+
+00000000800002dc <test_11>:
+    800002dc:	00b00193          	li	gp,11
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	e4050513          	addi	a0,a0,-448 # 80002120 <test_11_data>
+    800002e8:	00053007          	fld	ft0,0(a0)
+    800002ec:	00853087          	fld	ft1,8(a0)
+    800002f0:	01053107          	fld	ft2,16(a0)
+    800002f4:	01853683          	ld	a3,24(a0)
+    800002f8:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    800002fc:	e2018553          	fmv.x.d	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	00000613          	li	a2,0
+    80000308:	06d51a63          	bne	a0,a3,8000037c <fail>
+    8000030c:	06c59863          	bne	a1,a2,8000037c <fail>
+
+0000000080000310 <test_12>:
+    80000310:	00c00193          	li	gp,12
+    80000314:	00002517          	auipc	a0,0x2
+    80000318:	e2c50513          	addi	a0,a0,-468 # 80002140 <test_12_data>
+    8000031c:	00053007          	fld	ft0,0(a0)
+    80000320:	00853087          	fld	ft1,8(a0)
+    80000324:	01053107          	fld	ft2,16(a0)
+    80000328:	01853683          	ld	a3,24(a0)
+    8000032c:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    80000330:	e2018553          	fmv.x.d	a0,ft3
+    80000334:	001015f3          	fsflags	a1,zero
+    80000338:	00100613          	li	a2,1
+    8000033c:	04d51063          	bne	a0,a3,8000037c <fail>
+    80000340:	02c59e63          	bne	a1,a2,8000037c <fail>
+
+0000000080000344 <test_13>:
+    80000344:	00d00193          	li	gp,13
+    80000348:	00002517          	auipc	a0,0x2
+    8000034c:	e1850513          	addi	a0,a0,-488 # 80002160 <test_13_data>
+    80000350:	00053007          	fld	ft0,0(a0)
+    80000354:	00853087          	fld	ft1,8(a0)
+    80000358:	01053107          	fld	ft2,16(a0)
+    8000035c:	01853683          	ld	a3,24(a0)
+    80000360:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    80000364:	e2018553          	fmv.x.d	a0,ft3
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	00d51663          	bne	a0,a3,8000037c <fail>
+    80000374:	00c59463          	bne	a1,a2,8000037c <fail>
+    80000378:	00301c63          	bne	zero,gp,80000390 <pass>
+
+000000008000037c <fail>:
+    8000037c:	0ff0000f          	fence
+    80000380:	00018063          	beqz	gp,80000380 <fail+0x4>
+    80000384:	00119193          	slli	gp,gp,0x1
+    80000388:	0011e193          	ori	gp,gp,1
+    8000038c:	00000073          	ecall
+
+0000000080000390 <pass>:
+    80000390:	0ff0000f          	fence
+    80000394:	00100193          	li	gp,1
+    80000398:	00000073          	ecall
+    8000039c:	c0001073          	unimp
+    800003a0:	0000                	unimp
+    800003a2:	0000                	unimp
+    800003a4:	0000                	unimp
+    800003a6:	0000                	unimp
+    800003a8:	0000                	unimp
+    800003aa:	0000                	unimp
+    800003ac:	0000                	unimp
+    800003ae:	0000                	unimp
+    800003b0:	0000                	unimp
+    800003b2:	0000                	unimp
+    800003b4:	0000                	unimp
+    800003b6:	0000                	unimp
+    800003b8:	0000                	unimp
+    800003ba:	0000                	unimp
+    800003bc:	0000                	unimp
+    800003be:	0000                	unimp
+    800003c0:	0000                	unimp
+    800003c2:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	0000                	unimp
+    80002004:	0000                	unimp
+    80002006:	3ff0                	fld	fa2,248(a5)
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	4004                	lw	s1,0(s0)
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	3ff0                	fld	fa2,248(a5)
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	0000                	unimp
+    8000201e:	400c                	lw	a1,0(s0)
+
+0000000080002020 <test_3_data>:
+    80002020:	0000                	unimp
+    80002022:	0000                	unimp
+    80002024:	0000                	unimp
+    80002026:	bff0                	fsd	fa2,248(a5)
+    80002028:	6666                	ld	a2,88(sp)
+    8000202a:	6666                	ld	a2,88(sp)
+    8000202c:	4c66                	lw	s8,88(sp)
+    8000202e:	999ac093          	xori	ra,s5,-1639
+    80002032:	9999                	andi	a1,a1,-26
+    80002034:	9999                	andi	a1,a1,-26
+    80002036:	3ff1                	addiw	t6,t6,-4
+    80002038:	cccc                	sw	a1,28(s1)
+    8000203a:	cccc                	sw	a1,28(s1)
+    8000203c:	50cc                	lw	a1,36(s1)
+    8000203e:	          	xori	ra,zero,0
+
+0000000080002040 <test_4_data>:
+    80002040:	0000                	unimp
+    80002042:	0000                	unimp
+    80002044:	0000                	unimp
+    80002046:	4000                	lw	s0,0(s0)
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0000                	unimp
+    8000204e:	c014                	sw	a3,0(s0)
+    80002050:	0000                	unimp
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	c000                	sw	s0,0(s0)
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	c028                	sw	a0,64(s0)
+
+0000000080002060 <test_5_data>:
+    80002060:	0000                	unimp
+    80002062:	0000                	unimp
+    80002064:	0000                	unimp
+    80002066:	3ff0                	fld	fa2,248(a5)
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	4004                	lw	s1,0(s0)
+    80002070:	0000                	unimp
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	3ff0                	fld	fa2,248(a5)
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	c00c                	sw	a1,0(s0)
+
+0000000080002080 <test_6_data>:
+    80002080:	0000                	unimp
+    80002082:	0000                	unimp
+    80002084:	0000                	unimp
+    80002086:	bff0                	fsd	fa2,248(a5)
+    80002088:	6666                	ld	a2,88(sp)
+    8000208a:	6666                	ld	a2,88(sp)
+    8000208c:	4c66                	lw	s8,88(sp)
+    8000208e:	999ac093          	xori	ra,s5,-1639
+    80002092:	9999                	andi	a1,a1,-26
+    80002094:	9999                	andi	a1,a1,-26
+    80002096:	3ff1                	addiw	t6,t6,-4
+    80002098:	cccc                	sw	a1,28(s1)
+    8000209a:	cccc                	sw	a1,28(s1)
+    8000209c:	50cc                	lw	a1,36(s1)
+    8000209e:	          	xori	ra,ra,0
+
+00000000800020a0 <test_7_data>:
+    800020a0:	0000                	unimp
+    800020a2:	0000                	unimp
+    800020a4:	0000                	unimp
+    800020a6:	4000                	lw	s0,0(s0)
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	c014                	sw	a3,0(s0)
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	c000                	sw	s0,0(s0)
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	4028                	lw	a0,64(s0)
+
+00000000800020c0 <test_8_data>:
+    800020c0:	0000                	unimp
+    800020c2:	0000                	unimp
+    800020c4:	0000                	unimp
+    800020c6:	3ff0                	fld	fa2,248(a5)
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	4004                	lw	s1,0(s0)
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	3ff0                	fld	fa2,248(a5)
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	3ff8                	fld	fa4,248(a5)
+
+00000000800020e0 <test_9_data>:
+    800020e0:	0000                	unimp
+    800020e2:	0000                	unimp
+    800020e4:	0000                	unimp
+    800020e6:	bff0                	fsd	fa2,248(a5)
+    800020e8:	6666                	ld	a2,88(sp)
+    800020ea:	6666                	ld	a2,88(sp)
+    800020ec:	4c66                	lw	s8,88(sp)
+    800020ee:	999ac093          	xori	ra,s5,-1639
+    800020f2:	9999                	andi	a1,a1,-26
+    800020f4:	9999                	andi	a1,a1,-26
+    800020f6:	3ff1                	addiw	t6,t6,-4
+    800020f8:	0000                	unimp
+    800020fa:	0000                	unimp
+    800020fc:	4800                	lw	s0,16(s0)
+    800020fe:	          	xori	ra,zero,0
+
+0000000080002100 <test_10_data>:
+    80002100:	0000                	unimp
+    80002102:	0000                	unimp
+    80002104:	0000                	unimp
+    80002106:	4000                	lw	s0,0(s0)
+    80002108:	0000                	unimp
+    8000210a:	0000                	unimp
+    8000210c:	0000                	unimp
+    8000210e:	c014                	sw	a3,0(s0)
+    80002110:	0000                	unimp
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	c000                	sw	s0,0(s0)
+    80002118:	0000                	unimp
+    8000211a:	0000                	unimp
+    8000211c:	0000                	unimp
+    8000211e:	c020                	sw	s0,64(s0)
+
+0000000080002120 <test_11_data>:
+    80002120:	0000                	unimp
+    80002122:	0000                	unimp
+    80002124:	0000                	unimp
+    80002126:	3ff0                	fld	fa2,248(a5)
+    80002128:	0000                	unimp
+    8000212a:	0000                	unimp
+    8000212c:	0000                	unimp
+    8000212e:	4004                	lw	s1,0(s0)
+    80002130:	0000                	unimp
+    80002132:	0000                	unimp
+    80002134:	0000                	unimp
+    80002136:	3ff0                	fld	fa2,248(a5)
+    80002138:	0000                	unimp
+    8000213a:	0000                	unimp
+    8000213c:	0000                	unimp
+    8000213e:	bff8                	fsd	fa4,248(a5)
+
+0000000080002140 <test_12_data>:
+    80002140:	0000                	unimp
+    80002142:	0000                	unimp
+    80002144:	0000                	unimp
+    80002146:	bff0                	fsd	fa2,248(a5)
+    80002148:	6666                	ld	a2,88(sp)
+    8000214a:	6666                	ld	a2,88(sp)
+    8000214c:	4c66                	lw	s8,88(sp)
+    8000214e:	999ac093          	xori	ra,s5,-1639
+    80002152:	9999                	andi	a1,a1,-26
+    80002154:	9999                	andi	a1,a1,-26
+    80002156:	3ff1                	addiw	t6,t6,-4
+    80002158:	0000                	unimp
+    8000215a:	0000                	unimp
+    8000215c:	4800                	lw	s0,16(s0)
+    8000215e:	          	xori	ra,ra,0
+
+0000000080002160 <test_13_data>:
+    80002160:	0000                	unimp
+    80002162:	0000                	unimp
+    80002164:	0000                	unimp
+    80002166:	4000                	lw	s0,0(s0)
+    80002168:	0000                	unimp
+    8000216a:	0000                	unimp
+    8000216c:	0000                	unimp
+    8000216e:	c014                	sw	a3,0(s0)
+    80002170:	0000                	unimp
+    80002172:	0000                	unimp
+    80002174:	0000                	unimp
+    80002176:	c000                	sw	s0,0(s0)
+    80002178:	0000                	unimp
+    8000217a:	0000                	unimp
+    8000217c:	0000                	unimp
+    8000217e:	4020                	lw	s0,64(s0)
diff --git a/test/riscv-tests/rv64ud-p-fmadd.elf b/test/riscv-tests/rv64ud-p-fmadd.elf
new file mode 100644
index 0000000..e1b977b
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fmadd.elf
diff --git a/test/riscv-tests/rv64ud-p-fmin.dump b/test/riscv-tests/rv64ud-p-fmin.dump
new file mode 100644
index 0000000..1024cdd
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fmin.dump
@@ -0,0 +1,704 @@
+
+rv64ud-p-fmin:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00053007          	fld	ft0,0(a0)
+    80000118:	00853087          	fld	ft1,8(a0)
+    8000011c:	01053107          	fld	ft2,16(a0)
+    80000120:	01853683          	ld	a3,24(a0)
+    80000124:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80000128:	e2018553          	fmv.x.d	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	38d51063          	bne	a0,a3,800004b4 <fail>
+    80000138:	36c59e63          	bne	a1,a2,800004b4 <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ee050513          	addi	a0,a0,-288 # 80002020 <test_3_data>
+    80000148:	00053007          	fld	ft0,0(a0)
+    8000014c:	00853087          	fld	ft1,8(a0)
+    80000150:	01053107          	fld	ft2,16(a0)
+    80000154:	01853683          	ld	a3,24(a0)
+    80000158:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    8000015c:	e2018553          	fmv.x.d	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00000613          	li	a2,0
+    80000168:	34d51663          	bne	a0,a3,800004b4 <fail>
+    8000016c:	34c59463          	bne	a1,a2,800004b4 <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	ecc50513          	addi	a0,a0,-308 # 80002040 <test_4_data>
+    8000017c:	00053007          	fld	ft0,0(a0)
+    80000180:	00853087          	fld	ft1,8(a0)
+    80000184:	01053107          	fld	ft2,16(a0)
+    80000188:	01853683          	ld	a3,24(a0)
+    8000018c:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80000190:	e2018553          	fmv.x.d	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	30d51c63          	bne	a0,a3,800004b4 <fail>
+    800001a0:	30c59a63          	bne	a1,a2,800004b4 <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	eb850513          	addi	a0,a0,-328 # 80002060 <test_5_data>
+    800001b0:	00053007          	fld	ft0,0(a0)
+    800001b4:	00853087          	fld	ft1,8(a0)
+    800001b8:	01053107          	fld	ft2,16(a0)
+    800001bc:	01853683          	ld	a3,24(a0)
+    800001c0:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    800001c4:	e2018553          	fmv.x.d	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	2ed51263          	bne	a0,a3,800004b4 <fail>
+    800001d4:	2ec59063          	bne	a1,a2,800004b4 <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	ea450513          	addi	a0,a0,-348 # 80002080 <test_6_data>
+    800001e4:	00053007          	fld	ft0,0(a0)
+    800001e8:	00853087          	fld	ft1,8(a0)
+    800001ec:	01053107          	fld	ft2,16(a0)
+    800001f0:	01853683          	ld	a3,24(a0)
+    800001f4:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    800001f8:	e2018553          	fmv.x.d	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00000613          	li	a2,0
+    80000204:	2ad51863          	bne	a0,a3,800004b4 <fail>
+    80000208:	2ac59663          	bne	a1,a2,800004b4 <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e9050513          	addi	a0,a0,-368 # 800020a0 <test_7_data>
+    80000218:	00053007          	fld	ft0,0(a0)
+    8000021c:	00853087          	fld	ft1,8(a0)
+    80000220:	01053107          	fld	ft2,16(a0)
+    80000224:	01853683          	ld	a3,24(a0)
+    80000228:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    8000022c:	e2018553          	fmv.x.d	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00000613          	li	a2,0
+    80000238:	26d51e63          	bne	a0,a3,800004b4 <fail>
+    8000023c:	26c59c63          	bne	a1,a2,800004b4 <fail>
+
+0000000080000240 <test_12>:
+    80000240:	00c00193          	li	gp,12
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e7c50513          	addi	a0,a0,-388 # 800020c0 <test_12_data>
+    8000024c:	00053007          	fld	ft0,0(a0)
+    80000250:	00853087          	fld	ft1,8(a0)
+    80000254:	01053107          	fld	ft2,16(a0)
+    80000258:	01853683          	ld	a3,24(a0)
+    8000025c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000260:	e2018553          	fmv.x.d	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	24d51463          	bne	a0,a3,800004b4 <fail>
+    80000270:	24c59263          	bne	a1,a2,800004b4 <fail>
+
+0000000080000274 <test_13>:
+    80000274:	00d00193          	li	gp,13
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	e6850513          	addi	a0,a0,-408 # 800020e0 <test_13_data>
+    80000280:	00053007          	fld	ft0,0(a0)
+    80000284:	00853087          	fld	ft1,8(a0)
+    80000288:	01053107          	fld	ft2,16(a0)
+    8000028c:	01853683          	ld	a3,24(a0)
+    80000290:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000294:	e2018553          	fmv.x.d	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00000613          	li	a2,0
+    800002a0:	20d51a63          	bne	a0,a3,800004b4 <fail>
+    800002a4:	20c59863          	bne	a1,a2,800004b4 <fail>
+
+00000000800002a8 <test_14>:
+    800002a8:	00e00193          	li	gp,14
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	e5450513          	addi	a0,a0,-428 # 80002100 <test_14_data>
+    800002b4:	00053007          	fld	ft0,0(a0)
+    800002b8:	00853087          	fld	ft1,8(a0)
+    800002bc:	01053107          	fld	ft2,16(a0)
+    800002c0:	01853683          	ld	a3,24(a0)
+    800002c4:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    800002c8:	e2018553          	fmv.x.d	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00000613          	li	a2,0
+    800002d4:	1ed51063          	bne	a0,a3,800004b4 <fail>
+    800002d8:	1cc59e63          	bne	a1,a2,800004b4 <fail>
+
+00000000800002dc <test_15>:
+    800002dc:	00f00193          	li	gp,15
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	e4050513          	addi	a0,a0,-448 # 80002120 <test_15_data>
+    800002e8:	00053007          	fld	ft0,0(a0)
+    800002ec:	00853087          	fld	ft1,8(a0)
+    800002f0:	01053107          	fld	ft2,16(a0)
+    800002f4:	01853683          	ld	a3,24(a0)
+    800002f8:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    800002fc:	e2018553          	fmv.x.d	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	00000613          	li	a2,0
+    80000308:	1ad51663          	bne	a0,a3,800004b4 <fail>
+    8000030c:	1ac59463          	bne	a1,a2,800004b4 <fail>
+
+0000000080000310 <test_16>:
+    80000310:	01000193          	li	gp,16
+    80000314:	00002517          	auipc	a0,0x2
+    80000318:	e2c50513          	addi	a0,a0,-468 # 80002140 <test_16_data>
+    8000031c:	00053007          	fld	ft0,0(a0)
+    80000320:	00853087          	fld	ft1,8(a0)
+    80000324:	01053107          	fld	ft2,16(a0)
+    80000328:	01853683          	ld	a3,24(a0)
+    8000032c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000330:	e2018553          	fmv.x.d	a0,ft3
+    80000334:	001015f3          	fsflags	a1,zero
+    80000338:	00000613          	li	a2,0
+    8000033c:	16d51c63          	bne	a0,a3,800004b4 <fail>
+    80000340:	16c59a63          	bne	a1,a2,800004b4 <fail>
+
+0000000080000344 <test_17>:
+    80000344:	01100193          	li	gp,17
+    80000348:	00002517          	auipc	a0,0x2
+    8000034c:	e1850513          	addi	a0,a0,-488 # 80002160 <test_17_data>
+    80000350:	00053007          	fld	ft0,0(a0)
+    80000354:	00853087          	fld	ft1,8(a0)
+    80000358:	01053107          	fld	ft2,16(a0)
+    8000035c:	01853683          	ld	a3,24(a0)
+    80000360:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000364:	e2018553          	fmv.x.d	a0,ft3
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	14d51263          	bne	a0,a3,800004b4 <fail>
+    80000374:	14c59063          	bne	a1,a2,800004b4 <fail>
+
+0000000080000378 <test_20>:
+    80000378:	01400193          	li	gp,20
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	e0450513          	addi	a0,a0,-508 # 80002180 <test_20_data>
+    80000384:	00053007          	fld	ft0,0(a0)
+    80000388:	00853087          	fld	ft1,8(a0)
+    8000038c:	01053107          	fld	ft2,16(a0)
+    80000390:	01853683          	ld	a3,24(a0)
+    80000394:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000398:	e2018553          	fmv.x.d	a0,ft3
+    8000039c:	001015f3          	fsflags	a1,zero
+    800003a0:	01000613          	li	a2,16
+    800003a4:	10d51863          	bne	a0,a3,800004b4 <fail>
+    800003a8:	10c59663          	bne	a1,a2,800004b4 <fail>
+
+00000000800003ac <test_21>:
+    800003ac:	01500193          	li	gp,21
+    800003b0:	00002517          	auipc	a0,0x2
+    800003b4:	df050513          	addi	a0,a0,-528 # 800021a0 <test_21_data>
+    800003b8:	00053007          	fld	ft0,0(a0)
+    800003bc:	00853087          	fld	ft1,8(a0)
+    800003c0:	01053107          	fld	ft2,16(a0)
+    800003c4:	01853683          	ld	a3,24(a0)
+    800003c8:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    800003cc:	e2018553          	fmv.x.d	a0,ft3
+    800003d0:	001015f3          	fsflags	a1,zero
+    800003d4:	00000613          	li	a2,0
+    800003d8:	0cd51e63          	bne	a0,a3,800004b4 <fail>
+    800003dc:	0cc59c63          	bne	a1,a2,800004b4 <fail>
+
+00000000800003e0 <test_30>:
+    800003e0:	01e00193          	li	gp,30
+    800003e4:	00002517          	auipc	a0,0x2
+    800003e8:	ddc50513          	addi	a0,a0,-548 # 800021c0 <test_30_data>
+    800003ec:	00053007          	fld	ft0,0(a0)
+    800003f0:	00853087          	fld	ft1,8(a0)
+    800003f4:	01053107          	fld	ft2,16(a0)
+    800003f8:	01853683          	ld	a3,24(a0)
+    800003fc:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80000400:	e2018553          	fmv.x.d	a0,ft3
+    80000404:	001015f3          	fsflags	a1,zero
+    80000408:	00000613          	li	a2,0
+    8000040c:	0ad51463          	bne	a0,a3,800004b4 <fail>
+    80000410:	0ac59263          	bne	a1,a2,800004b4 <fail>
+
+0000000080000414 <test_31>:
+    80000414:	01f00193          	li	gp,31
+    80000418:	00002517          	auipc	a0,0x2
+    8000041c:	dc850513          	addi	a0,a0,-568 # 800021e0 <test_31_data>
+    80000420:	00053007          	fld	ft0,0(a0)
+    80000424:	00853087          	fld	ft1,8(a0)
+    80000428:	01053107          	fld	ft2,16(a0)
+    8000042c:	01853683          	ld	a3,24(a0)
+    80000430:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80000434:	e2018553          	fmv.x.d	a0,ft3
+    80000438:	001015f3          	fsflags	a1,zero
+    8000043c:	00000613          	li	a2,0
+    80000440:	06d51a63          	bne	a0,a3,800004b4 <fail>
+    80000444:	06c59863          	bne	a1,a2,800004b4 <fail>
+
+0000000080000448 <test_32>:
+    80000448:	02000193          	li	gp,32
+    8000044c:	00002517          	auipc	a0,0x2
+    80000450:	db450513          	addi	a0,a0,-588 # 80002200 <test_32_data>
+    80000454:	00053007          	fld	ft0,0(a0)
+    80000458:	00853087          	fld	ft1,8(a0)
+    8000045c:	01053107          	fld	ft2,16(a0)
+    80000460:	01853683          	ld	a3,24(a0)
+    80000464:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80000468:	e2018553          	fmv.x.d	a0,ft3
+    8000046c:	001015f3          	fsflags	a1,zero
+    80000470:	00000613          	li	a2,0
+    80000474:	04d51063          	bne	a0,a3,800004b4 <fail>
+    80000478:	02c59e63          	bne	a1,a2,800004b4 <fail>
+
+000000008000047c <test_33>:
+    8000047c:	02100193          	li	gp,33
+    80000480:	00002517          	auipc	a0,0x2
+    80000484:	da050513          	addi	a0,a0,-608 # 80002220 <test_33_data>
+    80000488:	00053007          	fld	ft0,0(a0)
+    8000048c:	00853087          	fld	ft1,8(a0)
+    80000490:	01053107          	fld	ft2,16(a0)
+    80000494:	01853683          	ld	a3,24(a0)
+    80000498:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    8000049c:	e2018553          	fmv.x.d	a0,ft3
+    800004a0:	001015f3          	fsflags	a1,zero
+    800004a4:	00000613          	li	a2,0
+    800004a8:	00d51663          	bne	a0,a3,800004b4 <fail>
+    800004ac:	00c59463          	bne	a1,a2,800004b4 <fail>
+    800004b0:	00301c63          	bne	zero,gp,800004c8 <pass>
+
+00000000800004b4 <fail>:
+    800004b4:	0ff0000f          	fence
+    800004b8:	00018063          	beqz	gp,800004b8 <fail+0x4>
+    800004bc:	00119193          	slli	gp,gp,0x1
+    800004c0:	0011e193          	ori	gp,gp,1
+    800004c4:	00000073          	ecall
+
+00000000800004c8 <pass>:
+    800004c8:	0ff0000f          	fence
+    800004cc:	00100193          	li	gp,1
+    800004d0:	00000073          	ecall
+    800004d4:	c0001073          	unimp
+    800004d8:	0000                	unimp
+    800004da:	0000                	unimp
+    800004dc:	0000                	unimp
+    800004de:	0000                	unimp
+    800004e0:	0000                	unimp
+    800004e2:	0000                	unimp
+    800004e4:	0000                	unimp
+    800004e6:	0000                	unimp
+    800004e8:	0000                	unimp
+    800004ea:	0000                	unimp
+    800004ec:	0000                	unimp
+    800004ee:	0000                	unimp
+    800004f0:	0000                	unimp
+    800004f2:	0000                	unimp
+    800004f4:	0000                	unimp
+    800004f6:	0000                	unimp
+    800004f8:	0000                	unimp
+    800004fa:	0000                	unimp
+    800004fc:	0000                	unimp
+    800004fe:	0000                	unimp
+    80000500:	0000                	unimp
+    80000502:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	0000                	unimp
+    80002004:	0000                	unimp
+    80002006:	4004                	lw	s1,0(s0)
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	3ff0                	fld	fa2,248(a5)
+    80002010:	0000                	unimp
+    80002012:	0000                	unimp
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	0000                	unimp
+    8000201e:	3ff0                	fld	fa2,248(a5)
+
+0000000080002020 <test_3_data>:
+    80002020:	6666                	ld	a2,88(sp)
+    80002022:	6666                	ld	a2,88(sp)
+    80002024:	4c66                	lw	s8,88(sp)
+    80002026:	999ac093          	xori	ra,s5,-1639
+    8000202a:	9999                	andi	a1,a1,-26
+    8000202c:	9999                	andi	a1,a1,-26
+    8000202e:	3ff1                	addiw	t6,t6,-4
+    80002030:	0000                	unimp
+    80002032:	0000                	unimp
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	6666                	ld	a2,88(sp)
+    8000203a:	6666                	ld	a2,88(sp)
+    8000203c:	4c66                	lw	s8,88(sp)
+    8000203e:	          	xori	ra,s5,-1639
+
+0000000080002040 <test_4_data>:
+    80002040:	999a                	add	s3,s3,t1
+    80002042:	9999                	andi	a1,a1,-26
+    80002044:	9999                	andi	a1,a1,-26
+    80002046:	3ff1                	addiw	t6,t6,-4
+    80002048:	6666                	ld	a2,88(sp)
+    8000204a:	6666                	ld	a2,88(sp)
+    8000204c:	4c66                	lw	s8,88(sp)
+    8000204e:	0000c093          	xori	ra,ra,0
+    80002052:	0000                	unimp
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	6666                	ld	a2,88(sp)
+    8000205a:	6666                	ld	a2,88(sp)
+    8000205c:	4c66                	lw	s8,88(sp)
+    8000205e:	          	not	ra,t6
+
+0000000080002060 <test_5_data>:
+    80002060:	ffff                	0xffff
+    80002062:	ffff                	0xffff
+    80002064:	ffff                	0xffff
+    80002066:	7fff                	0x7fff
+    80002068:	6666                	ld	a2,88(sp)
+    8000206a:	6666                	ld	a2,88(sp)
+    8000206c:	4c66                	lw	s8,88(sp)
+    8000206e:	0000c093          	xori	ra,ra,0
+    80002072:	0000                	unimp
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	6666                	ld	a2,88(sp)
+    8000207a:	6666                	ld	a2,88(sp)
+    8000207c:	4c66                	lw	s8,88(sp)
+    8000207e:	          	xori	ra,gp,-689
+
+0000000080002080 <test_6_data>:
+    80002080:	d4f1                	beqz	s1,8000204c <test_4_data+0xc>
+    80002082:	53c8                	lw	a0,36(a5)
+    80002084:	400921fb          	0x400921fb
+    80002088:	8c3a                	mv	s8,a4
+    8000208a:	e230                	sd	a2,64(a2)
+    8000208c:	798e                	ld	s3,224(sp)
+    8000208e:	3e45                	addiw	t3,t3,-15
+    80002090:	0000                	unimp
+    80002092:	0000                	unimp
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	8c3a                	mv	s8,a4
+    8000209a:	e230                	sd	a2,64(a2)
+    8000209c:	798e                	ld	s3,224(sp)
+    8000209e:	3e45                	addiw	t3,t3,-15
+
+00000000800020a0 <test_7_data>:
+    800020a0:	0000                	unimp
+    800020a2:	0000                	unimp
+    800020a4:	0000                	unimp
+    800020a6:	bff0                	fsd	fa2,248(a5)
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	c000                	sw	s0,0(s0)
+    800020b0:	0000                	unimp
+    800020b2:	0000                	unimp
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	c000                	sw	s0,0(s0)
+
+00000000800020c0 <test_12_data>:
+    800020c0:	0000                	unimp
+    800020c2:	0000                	unimp
+    800020c4:	0000                	unimp
+    800020c6:	4004                	lw	s1,0(s0)
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	3ff0                	fld	fa2,248(a5)
+    800020d0:	0000                	unimp
+    800020d2:	0000                	unimp
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	4004                	lw	s1,0(s0)
+
+00000000800020e0 <test_13_data>:
+    800020e0:	6666                	ld	a2,88(sp)
+    800020e2:	6666                	ld	a2,88(sp)
+    800020e4:	4c66                	lw	s8,88(sp)
+    800020e6:	999ac093          	xori	ra,s5,-1639
+    800020ea:	9999                	andi	a1,a1,-26
+    800020ec:	9999                	andi	a1,a1,-26
+    800020ee:	3ff1                	addiw	t6,t6,-4
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	999a                	add	s3,s3,t1
+    800020fa:	9999                	andi	a1,a1,-26
+    800020fc:	9999                	andi	a1,a1,-26
+    800020fe:	3ff1                	addiw	t6,t6,-4
+
+0000000080002100 <test_14_data>:
+    80002100:	999a                	add	s3,s3,t1
+    80002102:	9999                	andi	a1,a1,-26
+    80002104:	9999                	andi	a1,a1,-26
+    80002106:	3ff1                	addiw	t6,t6,-4
+    80002108:	6666                	ld	a2,88(sp)
+    8000210a:	6666                	ld	a2,88(sp)
+    8000210c:	4c66                	lw	s8,88(sp)
+    8000210e:	0000c093          	xori	ra,ra,0
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	0000                	unimp
+    80002118:	999a                	add	s3,s3,t1
+    8000211a:	9999                	andi	a1,a1,-26
+    8000211c:	9999                	andi	a1,a1,-26
+    8000211e:	3ff1                	addiw	t6,t6,-4
+
+0000000080002120 <test_15_data>:
+    80002120:	ffff                	0xffff
+    80002122:	ffff                	0xffff
+    80002124:	ffff                	0xffff
+    80002126:	7fff                	0x7fff
+    80002128:	6666                	ld	a2,88(sp)
+    8000212a:	6666                	ld	a2,88(sp)
+    8000212c:	4c66                	lw	s8,88(sp)
+    8000212e:	0000c093          	xori	ra,ra,0
+    80002132:	0000                	unimp
+    80002134:	0000                	unimp
+    80002136:	0000                	unimp
+    80002138:	6666                	ld	a2,88(sp)
+    8000213a:	6666                	ld	a2,88(sp)
+    8000213c:	4c66                	lw	s8,88(sp)
+    8000213e:	          	xori	ra,gp,-689
+
+0000000080002140 <test_16_data>:
+    80002140:	d4f1                	beqz	s1,8000210c <test_14_data+0xc>
+    80002142:	53c8                	lw	a0,36(a5)
+    80002144:	400921fb          	0x400921fb
+    80002148:	8c3a                	mv	s8,a4
+    8000214a:	e230                	sd	a2,64(a2)
+    8000214c:	798e                	ld	s3,224(sp)
+    8000214e:	3e45                	addiw	t3,t3,-15
+    80002150:	0000                	unimp
+    80002152:	0000                	unimp
+    80002154:	0000                	unimp
+    80002156:	0000                	unimp
+    80002158:	d4f1                	beqz	s1,80002124 <test_15_data+0x4>
+    8000215a:	53c8                	lw	a0,36(a5)
+    8000215c:	400921fb          	0x400921fb
+
+0000000080002160 <test_17_data>:
+    80002160:	0000                	unimp
+    80002162:	0000                	unimp
+    80002164:	0000                	unimp
+    80002166:	bff0                	fsd	fa2,248(a5)
+    80002168:	0000                	unimp
+    8000216a:	0000                	unimp
+    8000216c:	0000                	unimp
+    8000216e:	c000                	sw	s0,0(s0)
+    80002170:	0000                	unimp
+    80002172:	0000                	unimp
+    80002174:	0000                	unimp
+    80002176:	0000                	unimp
+    80002178:	0000                	unimp
+    8000217a:	0000                	unimp
+    8000217c:	0000                	unimp
+    8000217e:	bff0                	fsd	fa2,248(a5)
+
+0000000080002180 <test_20_data>:
+    80002180:	0001                	nop
+    80002182:	0000                	unimp
+    80002184:	0000                	unimp
+    80002186:	7ff0                	ld	a2,248(a5)
+    80002188:	0000                	unimp
+    8000218a:	0000                	unimp
+    8000218c:	0000                	unimp
+    8000218e:	3ff0                	fld	fa2,248(a5)
+    80002190:	0000                	unimp
+    80002192:	0000                	unimp
+    80002194:	0000                	unimp
+    80002196:	0000                	unimp
+    80002198:	0000                	unimp
+    8000219a:	0000                	unimp
+    8000219c:	0000                	unimp
+    8000219e:	3ff0                	fld	fa2,248(a5)
+
+00000000800021a0 <test_21_data>:
+    800021a0:	ffff                	0xffff
+    800021a2:	ffff                	0xffff
+    800021a4:	ffff                	0xffff
+    800021a6:	7fff                	0x7fff
+    800021a8:	ffff                	0xffff
+    800021aa:	ffff                	0xffff
+    800021ac:	ffff                	0xffff
+    800021ae:	7fff                	0x7fff
+    800021b0:	0000                	unimp
+    800021b2:	0000                	unimp
+    800021b4:	0000                	unimp
+    800021b6:	0000                	unimp
+    800021b8:	0000                	unimp
+    800021ba:	0000                	unimp
+    800021bc:	0000                	unimp
+    800021be:	7ff8                	ld	a4,248(a5)
+
+00000000800021c0 <test_30_data>:
+    800021c0:	0000                	unimp
+    800021c2:	0000                	unimp
+    800021c4:	0000                	unimp
+    800021c6:	8000                	0x8000
+    800021c8:	0000                	unimp
+    800021ca:	0000                	unimp
+    800021cc:	0000                	unimp
+    800021ce:	0000                	unimp
+    800021d0:	0000                	unimp
+    800021d2:	0000                	unimp
+    800021d4:	0000                	unimp
+    800021d6:	0000                	unimp
+    800021d8:	0000                	unimp
+    800021da:	0000                	unimp
+    800021dc:	0000                	unimp
+    800021de:	8000                	0x8000
+
+00000000800021e0 <test_31_data>:
+    800021e0:	0000                	unimp
+    800021e2:	0000                	unimp
+    800021e4:	0000                	unimp
+    800021e6:	0000                	unimp
+    800021e8:	0000                	unimp
+    800021ea:	0000                	unimp
+    800021ec:	0000                	unimp
+    800021ee:	8000                	0x8000
+    800021f0:	0000                	unimp
+    800021f2:	0000                	unimp
+    800021f4:	0000                	unimp
+    800021f6:	0000                	unimp
+    800021f8:	0000                	unimp
+    800021fa:	0000                	unimp
+    800021fc:	0000                	unimp
+    800021fe:	8000                	0x8000
+
+0000000080002200 <test_32_data>:
+    80002200:	0000                	unimp
+    80002202:	0000                	unimp
+    80002204:	0000                	unimp
+    80002206:	8000                	0x8000
+    80002208:	0000                	unimp
+    8000220a:	0000                	unimp
+    8000220c:	0000                	unimp
+    8000220e:	0000                	unimp
+    80002210:	0000                	unimp
+    80002212:	0000                	unimp
+    80002214:	0000                	unimp
+    80002216:	0000                	unimp
+    80002218:	0000                	unimp
+    8000221a:	0000                	unimp
+    8000221c:	0000                	unimp
+    8000221e:	0000                	unimp
+
+0000000080002220 <test_33_data>:
+    80002220:	0000                	unimp
+    80002222:	0000                	unimp
+    80002224:	0000                	unimp
+    80002226:	0000                	unimp
+    80002228:	0000                	unimp
+    8000222a:	0000                	unimp
+    8000222c:	0000                	unimp
+    8000222e:	8000                	0x8000
+    80002230:	0000                	unimp
+    80002232:	0000                	unimp
+    80002234:	0000                	unimp
+    80002236:	0000                	unimp
+    80002238:	0000                	unimp
+    8000223a:	0000                	unimp
+    8000223c:	0000                	unimp
+    8000223e:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-p-fmin.elf b/test/riscv-tests/rv64ud-p-fmin.elf
new file mode 100644
index 0000000..34c1ccb
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-fmin.elf
diff --git a/test/riscv-tests/rv64ud-p-ldst.elf b/test/riscv-tests/rv64ud-p-ldst.elf
new file mode 100755
index 0000000..42e5330
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-ldst.elf
diff --git a/test/riscv-tests/rv64ud-p-move.elf b/test/riscv-tests/rv64ud-p-move.elf
new file mode 100755
index 0000000..2f32db9
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-move.elf
diff --git a/test/riscv-tests/rv64ud-p-recoding.elf b/test/riscv-tests/rv64ud-p-recoding.elf
new file mode 100755
index 0000000..3fb62d7
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-recoding.elf
diff --git a/test/riscv-tests/rv64ud-p-structural.elf b/test/riscv-tests/rv64ud-p-structural.elf
new file mode 100755
index 0000000..0331e2b
--- /dev/null
+++ b/test/riscv-tests/rv64ud-p-structural.elf
diff --git a/test/riscv-tests/rv64ud-v-fadd.dump b/test/riscv-tests/rv64ud-v-fadd.dump
new file mode 100644
index 0000000..fef4675
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fadd.dump
@@ -0,0 +1,1163 @@
+
+rv64ud-v-fadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	8a068693          	addi	a3,a3,-1888 # 80002cf8 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	8d460613          	addi	a2,a2,-1836 # 80002d88 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	89c60613          	addi	a2,a2,-1892 # 80002da0 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	7ec68693          	addi	a3,a3,2028 # 80002d40 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	80868693          	addi	a3,a3,-2040 # 80002e78 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	78860613          	addi	a2,a2,1928 # 80002e50 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	6bc68693          	addi	a3,a3,1724 # 80002ea8 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	5dc68693          	addi	a3,a3,1500 # 80002e18 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	56c68693          	addi	a3,a3,1388 # 80002de0 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	02d00793          	li	a5,45
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0d28d7b7          	lui	a5,0xd28d
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	47678793          	addi	a5,a5,1142 # d28d476 <_start-0x72d72b8a>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	021071d3          	fadd.d	ft3,ft0,ft1
+    80002aec:	e2018553          	fmv.x.d	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	1ed51063          	bne	a0,a3,80002cd8 <fail>
+    80002afc:	1cc59e63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	51c50513          	addi	a0,a0,1308 # 80003020 <test_3_data>
+    80002b0c:	00053007          	fld	ft0,0(a0)
+    80002b10:	00853087          	fld	ft1,8(a0)
+    80002b14:	01053107          	fld	ft2,16(a0)
+    80002b18:	01853683          	ld	a3,24(a0)
+    80002b1c:	021071d3          	fadd.d	ft3,ft0,ft1
+    80002b20:	e2018553          	fmv.x.d	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	1ad51663          	bne	a0,a3,80002cd8 <fail>
+    80002b30:	1ac59463          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	50850513          	addi	a0,a0,1288 # 80003040 <test_4_data>
+    80002b40:	00053007          	fld	ft0,0(a0)
+    80002b44:	00853087          	fld	ft1,8(a0)
+    80002b48:	01053107          	fld	ft2,16(a0)
+    80002b4c:	01853683          	ld	a3,24(a0)
+    80002b50:	021071d3          	fadd.d	ft3,ft0,ft1
+    80002b54:	e2018553          	fmv.x.d	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00100613          	li	a2,1
+    80002b60:	16d51c63          	bne	a0,a3,80002cd8 <fail>
+    80002b64:	16c59a63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4f450513          	addi	a0,a0,1268 # 80003060 <test_5_data>
+    80002b74:	00053007          	fld	ft0,0(a0)
+    80002b78:	00853087          	fld	ft1,8(a0)
+    80002b7c:	01053107          	fld	ft2,16(a0)
+    80002b80:	01853683          	ld	a3,24(a0)
+    80002b84:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    80002b88:	e2018553          	fmv.x.d	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	14d51263          	bne	a0,a3,80002cd8 <fail>
+    80002b98:	14c59063          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4e050513          	addi	a0,a0,1248 # 80003080 <test_6_data>
+    80002ba8:	00053007          	fld	ft0,0(a0)
+    80002bac:	00853087          	fld	ft1,8(a0)
+    80002bb0:	01053107          	fld	ft2,16(a0)
+    80002bb4:	01853683          	ld	a3,24(a0)
+    80002bb8:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    80002bbc:	e2018553          	fmv.x.d	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00100613          	li	a2,1
+    80002bc8:	10d51863          	bne	a0,a3,80002cd8 <fail>
+    80002bcc:	10c59663          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	4cc50513          	addi	a0,a0,1228 # 800030a0 <test_7_data>
+    80002bdc:	00053007          	fld	ft0,0(a0)
+    80002be0:	00853087          	fld	ft1,8(a0)
+    80002be4:	01053107          	fld	ft2,16(a0)
+    80002be8:	01853683          	ld	a3,24(a0)
+    80002bec:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    80002bf0:	e2018553          	fmv.x.d	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00100613          	li	a2,1
+    80002bfc:	0cd51e63          	bne	a0,a3,80002cd8 <fail>
+    80002c00:	0cc59c63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c04 <test_8>:
+    80002c04:	00800193          	li	gp,8
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	4b850513          	addi	a0,a0,1208 # 800030c0 <test_8_data>
+    80002c10:	00053007          	fld	ft0,0(a0)
+    80002c14:	00853087          	fld	ft1,8(a0)
+    80002c18:	01053107          	fld	ft2,16(a0)
+    80002c1c:	01853683          	ld	a3,24(a0)
+    80002c20:	121071d3          	fmul.d	ft3,ft0,ft1
+    80002c24:	e2018553          	fmv.x.d	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	0ad51463          	bne	a0,a3,80002cd8 <fail>
+    80002c34:	0ac59263          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c38 <test_9>:
+    80002c38:	00900193          	li	gp,9
+    80002c3c:	00000517          	auipc	a0,0x0
+    80002c40:	4a450513          	addi	a0,a0,1188 # 800030e0 <test_9_data>
+    80002c44:	00053007          	fld	ft0,0(a0)
+    80002c48:	00853087          	fld	ft1,8(a0)
+    80002c4c:	01053107          	fld	ft2,16(a0)
+    80002c50:	01853683          	ld	a3,24(a0)
+    80002c54:	121071d3          	fmul.d	ft3,ft0,ft1
+    80002c58:	e2018553          	fmv.x.d	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00100613          	li	a2,1
+    80002c64:	06d51a63          	bne	a0,a3,80002cd8 <fail>
+    80002c68:	06c59863          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c6c <test_10>:
+    80002c6c:	00a00193          	li	gp,10
+    80002c70:	00000517          	auipc	a0,0x0
+    80002c74:	49050513          	addi	a0,a0,1168 # 80003100 <test_10_data>
+    80002c78:	00053007          	fld	ft0,0(a0)
+    80002c7c:	00853087          	fld	ft1,8(a0)
+    80002c80:	01053107          	fld	ft2,16(a0)
+    80002c84:	01853683          	ld	a3,24(a0)
+    80002c88:	121071d3          	fmul.d	ft3,ft0,ft1
+    80002c8c:	e2018553          	fmv.x.d	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00100613          	li	a2,1
+    80002c98:	04d51063          	bne	a0,a3,80002cd8 <fail>
+    80002c9c:	02c59e63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002ca0 <test_11>:
+    80002ca0:	00b00193          	li	gp,11
+    80002ca4:	00000517          	auipc	a0,0x0
+    80002ca8:	47c50513          	addi	a0,a0,1148 # 80003120 <test_11_data>
+    80002cac:	00053007          	fld	ft0,0(a0)
+    80002cb0:	00853087          	fld	ft1,8(a0)
+    80002cb4:	01053107          	fld	ft2,16(a0)
+    80002cb8:	01853683          	ld	a3,24(a0)
+    80002cbc:	0a1071d3          	fsub.d	ft3,ft0,ft1
+    80002cc0:	e2018553          	fmv.x.d	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	01000613          	li	a2,16
+    80002ccc:	00d51663          	bne	a0,a3,80002cd8 <fail>
+    80002cd0:	00c59463          	bne	a1,a2,80002cd8 <fail>
+    80002cd4:	00301a63          	bne	zero,gp,80002ce8 <pass>
+
+0000000080002cd8 <fail>:
+    80002cd8:	00119513          	slli	a0,gp,0x1
+    80002cdc:	00050063          	beqz	a0,80002cdc <fail+0x4>
+    80002ce0:	00156513          	ori	a0,a0,1
+    80002ce4:	00000073          	ecall
+
+0000000080002ce8 <pass>:
+    80002ce8:	00100513          	li	a0,1
+    80002cec:	00000073          	ecall
+    80002cf0:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	0000                	unimp
+    80003004:	0000                	unimp
+    80003006:	4004                	lw	s1,0(s0)
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	0000                	unimp
+    8000300e:	3ff0                	fld	fa2,248(a5)
+    80003010:	0000                	unimp
+    80003012:	0000                	unimp
+    80003014:	0000                	unimp
+    80003016:	0000                	unimp
+    80003018:	0000                	unimp
+    8000301a:	0000                	unimp
+    8000301c:	0000                	unimp
+    8000301e:	400c                	lw	a1,0(s0)
+
+0000000080003020 <test_3_data>:
+    80003020:	6666                	ld	a2,88(sp)
+    80003022:	6666                	ld	a2,88(sp)
+    80003024:	4c66                	lw	s8,88(sp)
+    80003026:	999ac093          	xori	ra,s5,-1639
+    8000302a:	9999                	andi	a1,a1,-26
+    8000302c:	9999                	andi	a1,a1,-26
+    8000302e:	3ff1                	addiw	t6,t6,-4
+    80003030:	0000                	unimp
+    80003032:	0000                	unimp
+    80003034:	0000                	unimp
+    80003036:	0000                	unimp
+    80003038:	0000                	unimp
+    8000303a:	0000                	unimp
+    8000303c:	4800                	lw	s0,16(s0)
+    8000303e:	          	xori	ra,gp,-689
+
+0000000080003040 <test_4_data>:
+    80003040:	d4f1                	beqz	s1,8000300c <test_2_data+0xc>
+    80003042:	53c8                	lw	a0,36(a5)
+    80003044:	400921fb          	0x400921fb
+    80003048:	8c3a                	mv	s8,a4
+    8000304a:	e230                	sd	a2,64(a2)
+    8000304c:	798e                	ld	s3,224(sp)
+    8000304e:	3e45                	addiw	t3,t3,-15
+    80003050:	0000                	unimp
+    80003052:	0000                	unimp
+    80003054:	0000                	unimp
+    80003056:	0000                	unimp
+    80003058:	6ddf 5520 21fb      	0x21fb55206ddf
+    8000305e:	4009                	c.li	zero,2
+
+0000000080003060 <test_5_data>:
+    80003060:	0000                	unimp
+    80003062:	0000                	unimp
+    80003064:	0000                	unimp
+    80003066:	4004                	lw	s1,0(s0)
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	3ff0                	fld	fa2,248(a5)
+    80003070:	0000                	unimp
+    80003072:	0000                	unimp
+    80003074:	0000                	unimp
+    80003076:	0000                	unimp
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	0000                	unimp
+    8000307e:	3ff8                	fld	fa4,248(a5)
+
+0000000080003080 <test_6_data>:
+    80003080:	6666                	ld	a2,88(sp)
+    80003082:	6666                	ld	a2,88(sp)
+    80003084:	4c66                	lw	s8,88(sp)
+    80003086:	999ac093          	xori	ra,s5,-1639
+    8000308a:	9999                	andi	a1,a1,-26
+    8000308c:	9999                	andi	a1,a1,-26
+    8000308e:	bff1                	j	8000306a <test_5_data+0xa>
+    80003090:	0000                	unimp
+    80003092:	0000                	unimp
+    80003094:	0000                	unimp
+    80003096:	0000                	unimp
+    80003098:	0000                	unimp
+    8000309a:	0000                	unimp
+    8000309c:	4800                	lw	s0,16(s0)
+    8000309e:	          	xori	ra,gp,-689
+
+00000000800030a0 <test_7_data>:
+    800030a0:	d4f1                	beqz	s1,8000306c <test_5_data+0xc>
+    800030a2:	53c8                	lw	a0,36(a5)
+    800030a4:	400921fb          	0x400921fb
+    800030a8:	8c3a                	mv	s8,a4
+    800030aa:	e230                	sd	a2,64(a2)
+    800030ac:	798e                	ld	s3,224(sp)
+    800030ae:	3e45                	addiw	t3,t3,-15
+    800030b0:	0000                	unimp
+    800030b2:	0000                	unimp
+    800030b4:	0000                	unimp
+    800030b6:	0000                	unimp
+    800030b8:	52713c03          	ld	s8,1319(sp)
+    800030bc:	400921fb          	0x400921fb
+
+00000000800030c0 <test_8_data>:
+    800030c0:	0000                	unimp
+    800030c2:	0000                	unimp
+    800030c4:	0000                	unimp
+    800030c6:	4004                	lw	s1,0(s0)
+    800030c8:	0000                	unimp
+    800030ca:	0000                	unimp
+    800030cc:	0000                	unimp
+    800030ce:	3ff0                	fld	fa2,248(a5)
+    800030d0:	0000                	unimp
+    800030d2:	0000                	unimp
+    800030d4:	0000                	unimp
+    800030d6:	0000                	unimp
+    800030d8:	0000                	unimp
+    800030da:	0000                	unimp
+    800030dc:	0000                	unimp
+    800030de:	4004                	lw	s1,0(s0)
+
+00000000800030e0 <test_9_data>:
+    800030e0:	6666                	ld	a2,88(sp)
+    800030e2:	6666                	ld	a2,88(sp)
+    800030e4:	4c66                	lw	s8,88(sp)
+    800030e6:	999ac093          	xori	ra,s5,-1639
+    800030ea:	9999                	andi	a1,a1,-26
+    800030ec:	9999                	andi	a1,a1,-26
+    800030ee:	bff1                	j	800030ca <test_8_data+0xa>
+    800030f0:	0000                	unimp
+    800030f2:	0000                	unimp
+    800030f4:	0000                	unimp
+    800030f6:	0000                	unimp
+    800030f8:	0a3d                	addi	s4,s4,15
+    800030fa:	3a70a3d7          	0x3a70a3d7
+    800030fe:	4095                	li	ra,5
+
+0000000080003100 <test_10_data>:
+    80003100:	d4f1                	beqz	s1,800030cc <test_8_data+0xc>
+    80003102:	53c8                	lw	a0,36(a5)
+    80003104:	400921fb          	0x400921fb
+    80003108:	8c3a                	mv	s8,a4
+    8000310a:	e230                	sd	a2,64(a2)
+    8000310c:	798e                	ld	s3,224(sp)
+    8000310e:	3e45                	addiw	t3,t3,-15
+    80003110:	0000                	unimp
+    80003112:	0000                	unimp
+    80003114:	0000                	unimp
+    80003116:	0000                	unimp
+    80003118:	ff09                	bnez	a4,80003032 <test_3_data+0x12>
+    8000311a:	a5c1                	j	800037da <begin_signature+0x69a>
+    8000311c:	ddc5                	beqz	a1,800030d4 <test_8_data+0x14>
+    8000311e:	3e60                	fld	fs0,248(a2)
+
+0000000080003120 <test_11_data>:
+    80003120:	0000                	unimp
+    80003122:	0000                	unimp
+    80003124:	0000                	unimp
+    80003126:	7ff0                	ld	a2,248(a5)
+    80003128:	0000                	unimp
+    8000312a:	0000                	unimp
+    8000312c:	0000                	unimp
+    8000312e:	7ff0                	ld	a2,248(a5)
+    80003130:	0000                	unimp
+    80003132:	0000                	unimp
+    80003134:	0000                	unimp
+    80003136:	0000                	unimp
+    80003138:	0000                	unimp
+    8000313a:	0000                	unimp
+    8000313c:	0000                	unimp
+    8000313e:	7ff8                	ld	a4,248(a5)
diff --git a/test/riscv-tests/rv64ud-v-fadd.elf b/test/riscv-tests/rv64ud-v-fadd.elf
new file mode 100644
index 0000000..e54ed05
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fadd.elf
diff --git a/test/riscv-tests/rv64ud-v-fclass.dump b/test/riscv-tests/rv64ud-v-fclass.dump
new file mode 100644
index 0000000..e374913
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fclass.dump
@@ -0,0 +1,935 @@
+
+rv64ud-v-fclass:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00008117          	auipc	sp,0x8
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800086d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00001617          	auipc	a2,0x1
+    80002318:	cec60613          	addi	a2,a2,-788 # 80003000 <begin_signature>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00005797          	auipc	a5,0x5
+    80002334:	4b878793          	addi	a5,a5,1208 # 800077e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00005717          	auipc	a4,0x5
+    80002348:	49c70713          	addi	a4,a4,1180 # 800077e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00005897          	auipc	a7,0x5
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800077e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00005797          	auipc	a5,0x5
+    80002384:	07078793          	addi	a5,a5,112 # 800073f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf8810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00005797          	auipc	a5,0x5
+    80002448:	3807be23          	sd	zero,924(a5) # 800077e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00000697          	auipc	a3,0x0
+    8000245c:	7b868693          	addi	a3,a3,1976 # 80002c10 <pass+0xc>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00000617          	auipc	a2,0x0
+    800024b8:	7ec60613          	addi	a2,a2,2028 # 80002ca0 <pass+0x9c>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00000617          	auipc	a2,0x0
+    80002508:	7b460613          	addi	a2,a2,1972 # 80002cb8 <pass+0xb4>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	70468693          	addi	a3,a3,1796 # 80002c58 <pass+0x54>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	72068693          	addi	a3,a3,1824 # 80002d90 <pass+0x18c>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	6a060613          	addi	a2,a2,1696 # 80002d68 <pass+0x164>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00005d17          	auipc	s10,0x5
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800073f0 <user_mapping>
+    80002724:	00001b97          	auipc	s7,0x1
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80003000 <begin_signature>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00005a17          	auipc	s4,0x5
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800077e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00005717          	auipc	a4,0x5
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800077e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00005717          	auipc	a4,0x5
+    800027d4:	00f73823          	sd	a5,16(a4) # 800077e0 <freelist_tail>
+    800027d8:	00005717          	auipc	a4,0x5
+    800027dc:	00f73823          	sd	a5,16(a4) # 800077e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	5d468693          	addi	a3,a3,1492 # 80002dc0 <pass+0x1bc>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	4f468693          	addi	a3,a3,1268 # 80002d30 <pass+0x12c>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	48468693          	addi	a3,a3,1156 # 80002cf8 <pass+0xf4>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00001697          	auipc	a3,0x1
+    800028e0:	72468693          	addi	a3,a3,1828 # 80004000 <begin_signature+0x1000>
+    800028e4:	00002717          	auipc	a4,0x2
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80005000 <begin_signature+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00003797          	auipc	a5,0x3
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80006000 <begin_signature+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00000897          	auipc	a7,0x0
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80003000 <begin_signature>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00001697          	auipc	a3,0x1
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80003ff8 <begin_signature+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00000617          	auipc	a2,0x0
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80003000 <begin_signature>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00003697          	auipc	a3,0x3
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80005ff8 <begin_signature+0x2ff8>
+    8000294c:	00001717          	auipc	a4,0x1
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80004000 <begin_signature+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00004697          	auipc	a3,0x4
+    800029c0:	64468693          	addi	a3,a3,1604 # 80007000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00005617          	auipc	a2,0x5
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800077e8 <freelist_head>
+    800029d4:	00005797          	auipc	a5,0x5
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800077e0 <freelist_tail>
+    800029dc:	00005317          	auipc	t1,0x5
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800073f0 <user_mapping>
+    800029e4:	02e00793          	li	a5,46
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00005797          	auipc	a5,0x5
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800073e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	00cd57b7          	lui	a5,0xcd5
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	eaa78793          	addi	a5,a5,-342 # cd4eaa <_start-0x7f32b156>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	fff0051b          	addiw	a0,zero,-1
+    80002ad0:	03451513          	slli	a0,a0,0x34
+    80002ad4:	f2050553          	fmv.d.x	fa0,a0
+    80002ad8:	e2051553          	fclass.d	a0,fa0
+    80002adc:	00100e93          	li	t4,1
+    80002ae0:	00200193          	li	gp,2
+    80002ae4:	11d51863          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002ae8 <test_3>:
+    80002ae8:	bff0051b          	addiw	a0,zero,-1025
+    80002aec:	03451513          	slli	a0,a0,0x34
+    80002af0:	f2050553          	fmv.d.x	fa0,a0
+    80002af4:	e2051553          	fclass.d	a0,fa0
+    80002af8:	00200e93          	li	t4,2
+    80002afc:	00300193          	li	gp,3
+    80002b00:	0fd51a63          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b04 <test_4>:
+    80002b04:	8010051b          	addiw	a0,zero,-2047
+    80002b08:	03451513          	slli	a0,a0,0x34
+    80002b0c:	fff50513          	addi	a0,a0,-1
+    80002b10:	f2050553          	fmv.d.x	fa0,a0
+    80002b14:	e2051553          	fclass.d	a0,fa0
+    80002b18:	00400e93          	li	t4,4
+    80002b1c:	00400193          	li	gp,4
+    80002b20:	0dd51a63          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b24 <test_5>:
+    80002b24:	fff0051b          	addiw	a0,zero,-1
+    80002b28:	03f51513          	slli	a0,a0,0x3f
+    80002b2c:	f2050553          	fmv.d.x	fa0,a0
+    80002b30:	e2051553          	fclass.d	a0,fa0
+    80002b34:	00800e93          	li	t4,8
+    80002b38:	00500193          	li	gp,5
+    80002b3c:	0bd51c63          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b40 <test_6>:
+    80002b40:	00000513          	li	a0,0
+    80002b44:	f2050553          	fmv.d.x	fa0,a0
+    80002b48:	e2051553          	fclass.d	a0,fa0
+    80002b4c:	01000e93          	li	t4,16
+    80002b50:	00600193          	li	gp,6
+    80002b54:	0bd51063          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b58 <test_7>:
+    80002b58:	0010051b          	addiw	a0,zero,1
+    80002b5c:	03451513          	slli	a0,a0,0x34
+    80002b60:	fff50513          	addi	a0,a0,-1
+    80002b64:	f2050553          	fmv.d.x	fa0,a0
+    80002b68:	e2051553          	fclass.d	a0,fa0
+    80002b6c:	02000e93          	li	t4,32
+    80002b70:	00700193          	li	gp,7
+    80002b74:	09d51063          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b78 <test_8>:
+    80002b78:	3ff0051b          	addiw	a0,zero,1023
+    80002b7c:	03451513          	slli	a0,a0,0x34
+    80002b80:	f2050553          	fmv.d.x	fa0,a0
+    80002b84:	e2051553          	fclass.d	a0,fa0
+    80002b88:	04000e93          	li	t4,64
+    80002b8c:	00800193          	li	gp,8
+    80002b90:	07d51263          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002b94 <test_9>:
+    80002b94:	7ff0051b          	addiw	a0,zero,2047
+    80002b98:	03451513          	slli	a0,a0,0x34
+    80002b9c:	f2050553          	fmv.d.x	fa0,a0
+    80002ba0:	e2051553          	fclass.d	a0,fa0
+    80002ba4:	08000e93          	li	t4,128
+    80002ba8:	00900193          	li	gp,9
+    80002bac:	05d51463          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002bb0 <test_10>:
+    80002bb0:	7ff0051b          	addiw	a0,zero,2047
+    80002bb4:	03451513          	slli	a0,a0,0x34
+    80002bb8:	00150513          	addi	a0,a0,1
+    80002bbc:	f2050553          	fmv.d.x	fa0,a0
+    80002bc0:	e2051553          	fclass.d	a0,fa0
+    80002bc4:	10000e93          	li	t4,256
+    80002bc8:	00a00193          	li	gp,10
+    80002bcc:	03d51463          	bne	a0,t4,80002bf4 <fail>
+
+0000000080002bd0 <test_11>:
+    80002bd0:	00001537          	lui	a0,0x1
+    80002bd4:	fff5051b          	addiw	a0,a0,-1
+    80002bd8:	03351513          	slli	a0,a0,0x33
+    80002bdc:	f2050553          	fmv.d.x	fa0,a0
+    80002be0:	e2051553          	fclass.d	a0,fa0
+    80002be4:	20000e93          	li	t4,512
+    80002be8:	00b00193          	li	gp,11
+    80002bec:	01d51463          	bne	a0,t4,80002bf4 <fail>
+    80002bf0:	00301a63          	bne	zero,gp,80002c04 <pass>
+
+0000000080002bf4 <fail>:
+    80002bf4:	00119513          	slli	a0,gp,0x1
+    80002bf8:	00050063          	beqz	a0,80002bf8 <fail+0x4>
+    80002bfc:	00156513          	ori	a0,a0,1
+    80002c00:	00000073          	ecall
+
+0000000080002c04 <pass>:
+    80002c04:	00100513          	li	a0,1
+    80002c08:	00000073          	ecall
+    80002c0c:	c0001073          	unimp
diff --git a/test/riscv-tests/rv64ud-v-fclass.elf b/test/riscv-tests/rv64ud-v-fclass.elf
new file mode 100644
index 0000000..5db32bb
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fclass.elf
diff --git a/test/riscv-tests/rv64ud-v-fcmp.dump b/test/riscv-tests/rv64ud-v-fcmp.dump
new file mode 100644
index 0000000..c6b8946
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcmp.dump
@@ -0,0 +1,1306 @@
+
+rv64ud-v-fcmp:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	96868693          	addi	a3,a3,-1688 # 80002dc0 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	99c60613          	addi	a2,a2,-1636 # 80002e50 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	96460613          	addi	a2,a2,-1692 # 80002e68 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	8b468693          	addi	a3,a3,-1868 # 80002e08 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	8d068693          	addi	a3,a3,-1840 # 80002f40 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	85060613          	addi	a2,a2,-1968 # 80002f18 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	78468693          	addi	a3,a3,1924 # 80002f70 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	6a468693          	addi	a3,a3,1700 # 80002ee0 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	63468693          	addi	a3,a3,1588 # 80002ea8 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	01300793          	li	a5,19
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0e6157b7          	lui	a5,0xe615
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	11278793          	addi	a5,a5,274 # e615112 <_start-0x719eaeee>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	a2102553          	feq.d	a0,ft0,ft1
+    80002aec:	001015f3          	fsflags	a1,zero
+    80002af0:	00000613          	li	a2,0
+    80002af4:	2ad51663          	bne	a0,a3,80002da0 <fail>
+    80002af8:	2ac59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002afc <test_3>:
+    80002afc:	00300193          	li	gp,3
+    80002b00:	00000517          	auipc	a0,0x0
+    80002b04:	52050513          	addi	a0,a0,1312 # 80003020 <test_3_data>
+    80002b08:	00053007          	fld	ft0,0(a0)
+    80002b0c:	00853087          	fld	ft1,8(a0)
+    80002b10:	01053107          	fld	ft2,16(a0)
+    80002b14:	01853683          	ld	a3,24(a0)
+    80002b18:	a2100553          	fle.d	a0,ft0,ft1
+    80002b1c:	001015f3          	fsflags	a1,zero
+    80002b20:	00000613          	li	a2,0
+    80002b24:	26d51e63          	bne	a0,a3,80002da0 <fail>
+    80002b28:	26c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b2c <test_4>:
+    80002b2c:	00400193          	li	gp,4
+    80002b30:	00000517          	auipc	a0,0x0
+    80002b34:	51050513          	addi	a0,a0,1296 # 80003040 <test_4_data>
+    80002b38:	00053007          	fld	ft0,0(a0)
+    80002b3c:	00853087          	fld	ft1,8(a0)
+    80002b40:	01053107          	fld	ft2,16(a0)
+    80002b44:	01853683          	ld	a3,24(a0)
+    80002b48:	a2101553          	flt.d	a0,ft0,ft1
+    80002b4c:	001015f3          	fsflags	a1,zero
+    80002b50:	00000613          	li	a2,0
+    80002b54:	24d51663          	bne	a0,a3,80002da0 <fail>
+    80002b58:	24c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b5c <test_5>:
+    80002b5c:	00500193          	li	gp,5
+    80002b60:	00000517          	auipc	a0,0x0
+    80002b64:	50050513          	addi	a0,a0,1280 # 80003060 <test_5_data>
+    80002b68:	00053007          	fld	ft0,0(a0)
+    80002b6c:	00853087          	fld	ft1,8(a0)
+    80002b70:	01053107          	fld	ft2,16(a0)
+    80002b74:	01853683          	ld	a3,24(a0)
+    80002b78:	a2102553          	feq.d	a0,ft0,ft1
+    80002b7c:	001015f3          	fsflags	a1,zero
+    80002b80:	00000613          	li	a2,0
+    80002b84:	20d51e63          	bne	a0,a3,80002da0 <fail>
+    80002b88:	20c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b8c <test_6>:
+    80002b8c:	00600193          	li	gp,6
+    80002b90:	00000517          	auipc	a0,0x0
+    80002b94:	4f050513          	addi	a0,a0,1264 # 80003080 <test_6_data>
+    80002b98:	00053007          	fld	ft0,0(a0)
+    80002b9c:	00853087          	fld	ft1,8(a0)
+    80002ba0:	01053107          	fld	ft2,16(a0)
+    80002ba4:	01853683          	ld	a3,24(a0)
+    80002ba8:	a2100553          	fle.d	a0,ft0,ft1
+    80002bac:	001015f3          	fsflags	a1,zero
+    80002bb0:	00000613          	li	a2,0
+    80002bb4:	1ed51663          	bne	a0,a3,80002da0 <fail>
+    80002bb8:	1ec59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002bbc <test_7>:
+    80002bbc:	00700193          	li	gp,7
+    80002bc0:	00000517          	auipc	a0,0x0
+    80002bc4:	4e050513          	addi	a0,a0,1248 # 800030a0 <test_7_data>
+    80002bc8:	00053007          	fld	ft0,0(a0)
+    80002bcc:	00853087          	fld	ft1,8(a0)
+    80002bd0:	01053107          	fld	ft2,16(a0)
+    80002bd4:	01853683          	ld	a3,24(a0)
+    80002bd8:	a2101553          	flt.d	a0,ft0,ft1
+    80002bdc:	001015f3          	fsflags	a1,zero
+    80002be0:	00000613          	li	a2,0
+    80002be4:	1ad51e63          	bne	a0,a3,80002da0 <fail>
+    80002be8:	1ac59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002bec <test_8>:
+    80002bec:	00800193          	li	gp,8
+    80002bf0:	00000517          	auipc	a0,0x0
+    80002bf4:	4d050513          	addi	a0,a0,1232 # 800030c0 <test_8_data>
+    80002bf8:	00053007          	fld	ft0,0(a0)
+    80002bfc:	00853087          	fld	ft1,8(a0)
+    80002c00:	01053107          	fld	ft2,16(a0)
+    80002c04:	01853683          	ld	a3,24(a0)
+    80002c08:	a2102553          	feq.d	a0,ft0,ft1
+    80002c0c:	001015f3          	fsflags	a1,zero
+    80002c10:	00000613          	li	a2,0
+    80002c14:	18d51663          	bne	a0,a3,80002da0 <fail>
+    80002c18:	18c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c1c <test_9>:
+    80002c1c:	00900193          	li	gp,9
+    80002c20:	00000517          	auipc	a0,0x0
+    80002c24:	4c050513          	addi	a0,a0,1216 # 800030e0 <test_9_data>
+    80002c28:	00053007          	fld	ft0,0(a0)
+    80002c2c:	00853087          	fld	ft1,8(a0)
+    80002c30:	01053107          	fld	ft2,16(a0)
+    80002c34:	01853683          	ld	a3,24(a0)
+    80002c38:	a2102553          	feq.d	a0,ft0,ft1
+    80002c3c:	001015f3          	fsflags	a1,zero
+    80002c40:	00000613          	li	a2,0
+    80002c44:	14d51e63          	bne	a0,a3,80002da0 <fail>
+    80002c48:	14c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c4c <test_10>:
+    80002c4c:	00a00193          	li	gp,10
+    80002c50:	00000517          	auipc	a0,0x0
+    80002c54:	4b050513          	addi	a0,a0,1200 # 80003100 <test_10_data>
+    80002c58:	00053007          	fld	ft0,0(a0)
+    80002c5c:	00853087          	fld	ft1,8(a0)
+    80002c60:	01053107          	fld	ft2,16(a0)
+    80002c64:	01853683          	ld	a3,24(a0)
+    80002c68:	a2102553          	feq.d	a0,ft0,ft1
+    80002c6c:	001015f3          	fsflags	a1,zero
+    80002c70:	01000613          	li	a2,16
+    80002c74:	12d51663          	bne	a0,a3,80002da0 <fail>
+    80002c78:	12c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c7c <test_11>:
+    80002c7c:	00b00193          	li	gp,11
+    80002c80:	00000517          	auipc	a0,0x0
+    80002c84:	4a050513          	addi	a0,a0,1184 # 80003120 <test_11_data>
+    80002c88:	00053007          	fld	ft0,0(a0)
+    80002c8c:	00853087          	fld	ft1,8(a0)
+    80002c90:	01053107          	fld	ft2,16(a0)
+    80002c94:	01853683          	ld	a3,24(a0)
+    80002c98:	a2101553          	flt.d	a0,ft0,ft1
+    80002c9c:	001015f3          	fsflags	a1,zero
+    80002ca0:	01000613          	li	a2,16
+    80002ca4:	0ed51e63          	bne	a0,a3,80002da0 <fail>
+    80002ca8:	0ec59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002cac <test_12>:
+    80002cac:	00c00193          	li	gp,12
+    80002cb0:	00000517          	auipc	a0,0x0
+    80002cb4:	49050513          	addi	a0,a0,1168 # 80003140 <test_12_data>
+    80002cb8:	00053007          	fld	ft0,0(a0)
+    80002cbc:	00853087          	fld	ft1,8(a0)
+    80002cc0:	01053107          	fld	ft2,16(a0)
+    80002cc4:	01853683          	ld	a3,24(a0)
+    80002cc8:	a2101553          	flt.d	a0,ft0,ft1
+    80002ccc:	001015f3          	fsflags	a1,zero
+    80002cd0:	01000613          	li	a2,16
+    80002cd4:	0cd51663          	bne	a0,a3,80002da0 <fail>
+    80002cd8:	0cc59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002cdc <test_13>:
+    80002cdc:	00d00193          	li	gp,13
+    80002ce0:	00000517          	auipc	a0,0x0
+    80002ce4:	48050513          	addi	a0,a0,1152 # 80003160 <test_13_data>
+    80002ce8:	00053007          	fld	ft0,0(a0)
+    80002cec:	00853087          	fld	ft1,8(a0)
+    80002cf0:	01053107          	fld	ft2,16(a0)
+    80002cf4:	01853683          	ld	a3,24(a0)
+    80002cf8:	a2101553          	flt.d	a0,ft0,ft1
+    80002cfc:	001015f3          	fsflags	a1,zero
+    80002d00:	01000613          	li	a2,16
+    80002d04:	08d51e63          	bne	a0,a3,80002da0 <fail>
+    80002d08:	08c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d0c <test_14>:
+    80002d0c:	00e00193          	li	gp,14
+    80002d10:	00000517          	auipc	a0,0x0
+    80002d14:	47050513          	addi	a0,a0,1136 # 80003180 <test_14_data>
+    80002d18:	00053007          	fld	ft0,0(a0)
+    80002d1c:	00853087          	fld	ft1,8(a0)
+    80002d20:	01053107          	fld	ft2,16(a0)
+    80002d24:	01853683          	ld	a3,24(a0)
+    80002d28:	a2100553          	fle.d	a0,ft0,ft1
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	01000613          	li	a2,16
+    80002d34:	06d51663          	bne	a0,a3,80002da0 <fail>
+    80002d38:	06c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d3c <test_15>:
+    80002d3c:	00f00193          	li	gp,15
+    80002d40:	00000517          	auipc	a0,0x0
+    80002d44:	46050513          	addi	a0,a0,1120 # 800031a0 <test_15_data>
+    80002d48:	00053007          	fld	ft0,0(a0)
+    80002d4c:	00853087          	fld	ft1,8(a0)
+    80002d50:	01053107          	fld	ft2,16(a0)
+    80002d54:	01853683          	ld	a3,24(a0)
+    80002d58:	a2100553          	fle.d	a0,ft0,ft1
+    80002d5c:	001015f3          	fsflags	a1,zero
+    80002d60:	01000613          	li	a2,16
+    80002d64:	02d51e63          	bne	a0,a3,80002da0 <fail>
+    80002d68:	02c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d6c <test_16>:
+    80002d6c:	01000193          	li	gp,16
+    80002d70:	00000517          	auipc	a0,0x0
+    80002d74:	45050513          	addi	a0,a0,1104 # 800031c0 <test_16_data>
+    80002d78:	00053007          	fld	ft0,0(a0)
+    80002d7c:	00853087          	fld	ft1,8(a0)
+    80002d80:	01053107          	fld	ft2,16(a0)
+    80002d84:	01853683          	ld	a3,24(a0)
+    80002d88:	a2100553          	fle.d	a0,ft0,ft1
+    80002d8c:	001015f3          	fsflags	a1,zero
+    80002d90:	01000613          	li	a2,16
+    80002d94:	00d51663          	bne	a0,a3,80002da0 <fail>
+    80002d98:	00c59463          	bne	a1,a2,80002da0 <fail>
+    80002d9c:	00301a63          	bne	zero,gp,80002db0 <pass>
+
+0000000080002da0 <fail>:
+    80002da0:	00119513          	slli	a0,gp,0x1
+    80002da4:	00050063          	beqz	a0,80002da4 <fail+0x4>
+    80002da8:	00156513          	ori	a0,a0,1
+    80002dac:	00000073          	ecall
+
+0000000080002db0 <pass>:
+    80002db0:	00100513          	li	a0,1
+    80002db4:	00000073          	ecall
+    80002db8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	5c28f5c3          	0x5c28f5c3
+    80003004:	bff5c28f          	0xbff5c28f
+    80003008:	5c28f5c3          	0x5c28f5c3
+    8000300c:	bff5c28f          	0xbff5c28f
+    80003010:	0000                	unimp
+    80003012:	0000                	unimp
+    80003014:	0000                	unimp
+    80003016:	0000                	unimp
+    80003018:	0001                	nop
+    8000301a:	0000                	unimp
+    8000301c:	0000                	unimp
+    8000301e:	0000                	unimp
+
+0000000080003020 <test_3_data>:
+    80003020:	5c28f5c3          	0x5c28f5c3
+    80003024:	bff5c28f          	0xbff5c28f
+    80003028:	5c28f5c3          	0x5c28f5c3
+    8000302c:	bff5c28f          	0xbff5c28f
+    80003030:	0000                	unimp
+    80003032:	0000                	unimp
+    80003034:	0000                	unimp
+    80003036:	0000                	unimp
+    80003038:	0001                	nop
+    8000303a:	0000                	unimp
+    8000303c:	0000                	unimp
+    8000303e:	0000                	unimp
+
+0000000080003040 <test_4_data>:
+    80003040:	5c28f5c3          	0x5c28f5c3
+    80003044:	bff5c28f          	0xbff5c28f
+    80003048:	5c28f5c3          	0x5c28f5c3
+    8000304c:	bff5c28f          	0xbff5c28f
+    80003050:	0000                	unimp
+    80003052:	0000                	unimp
+    80003054:	0000                	unimp
+    80003056:	0000                	unimp
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	0000                	unimp
+    8000305e:	0000                	unimp
+
+0000000080003060 <test_5_data>:
+    80003060:	51ec                	lw	a1,100(a1)
+    80003062:	1eb8                	addi	a4,sp,888
+    80003064:	eb85                	bnez	a5,80003094 <test_6_data+0x14>
+    80003066:	bff5                	j	80003062 <test_5_data+0x2>
+    80003068:	5c28f5c3          	0x5c28f5c3
+    8000306c:	bff5c28f          	0xbff5c28f
+    80003070:	0000                	unimp
+    80003072:	0000                	unimp
+    80003074:	0000                	unimp
+    80003076:	0000                	unimp
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	0000                	unimp
+    8000307e:	0000                	unimp
+
+0000000080003080 <test_6_data>:
+    80003080:	51ec                	lw	a1,100(a1)
+    80003082:	1eb8                	addi	a4,sp,888
+    80003084:	eb85                	bnez	a5,800030b4 <test_7_data+0x14>
+    80003086:	bff5                	j	80003082 <test_6_data+0x2>
+    80003088:	5c28f5c3          	0x5c28f5c3
+    8000308c:	bff5c28f          	0xbff5c28f
+    80003090:	0000                	unimp
+    80003092:	0000                	unimp
+    80003094:	0000                	unimp
+    80003096:	0000                	unimp
+    80003098:	0001                	nop
+    8000309a:	0000                	unimp
+    8000309c:	0000                	unimp
+    8000309e:	0000                	unimp
+
+00000000800030a0 <test_7_data>:
+    800030a0:	51ec                	lw	a1,100(a1)
+    800030a2:	1eb8                	addi	a4,sp,888
+    800030a4:	eb85                	bnez	a5,800030d4 <test_8_data+0x14>
+    800030a6:	bff5                	j	800030a2 <test_7_data+0x2>
+    800030a8:	5c28f5c3          	0x5c28f5c3
+    800030ac:	bff5c28f          	0xbff5c28f
+    800030b0:	0000                	unimp
+    800030b2:	0000                	unimp
+    800030b4:	0000                	unimp
+    800030b6:	0000                	unimp
+    800030b8:	0001                	nop
+    800030ba:	0000                	unimp
+    800030bc:	0000                	unimp
+    800030be:	0000                	unimp
+
+00000000800030c0 <test_8_data>:
+    800030c0:	ffff                	0xffff
+    800030c2:	ffff                	0xffff
+    800030c4:	ffff                	0xffff
+    800030c6:	7fff                	0x7fff
+    800030c8:	0000                	unimp
+    800030ca:	0000                	unimp
+    800030cc:	0000                	unimp
+    800030ce:	0000                	unimp
+    800030d0:	0000                	unimp
+    800030d2:	0000                	unimp
+    800030d4:	0000                	unimp
+    800030d6:	0000                	unimp
+    800030d8:	0000                	unimp
+    800030da:	0000                	unimp
+    800030dc:	0000                	unimp
+    800030de:	0000                	unimp
+
+00000000800030e0 <test_9_data>:
+    800030e0:	ffff                	0xffff
+    800030e2:	ffff                	0xffff
+    800030e4:	ffff                	0xffff
+    800030e6:	7fff                	0x7fff
+    800030e8:	ffff                	0xffff
+    800030ea:	ffff                	0xffff
+    800030ec:	ffff                	0xffff
+    800030ee:	7fff                	0x7fff
+    800030f0:	0000                	unimp
+    800030f2:	0000                	unimp
+    800030f4:	0000                	unimp
+    800030f6:	0000                	unimp
+    800030f8:	0000                	unimp
+    800030fa:	0000                	unimp
+    800030fc:	0000                	unimp
+    800030fe:	0000                	unimp
+
+0000000080003100 <test_10_data>:
+    80003100:	0001                	nop
+    80003102:	0000                	unimp
+    80003104:	0000                	unimp
+    80003106:	7ff0                	ld	a2,248(a5)
+    80003108:	0000                	unimp
+    8000310a:	0000                	unimp
+    8000310c:	0000                	unimp
+    8000310e:	0000                	unimp
+    80003110:	0000                	unimp
+    80003112:	0000                	unimp
+    80003114:	0000                	unimp
+    80003116:	0000                	unimp
+    80003118:	0000                	unimp
+    8000311a:	0000                	unimp
+    8000311c:	0000                	unimp
+    8000311e:	0000                	unimp
+
+0000000080003120 <test_11_data>:
+    80003120:	ffff                	0xffff
+    80003122:	ffff                	0xffff
+    80003124:	ffff                	0xffff
+    80003126:	7fff                	0x7fff
+    80003128:	0000                	unimp
+    8000312a:	0000                	unimp
+    8000312c:	0000                	unimp
+    8000312e:	0000                	unimp
+    80003130:	0000                	unimp
+    80003132:	0000                	unimp
+    80003134:	0000                	unimp
+    80003136:	0000                	unimp
+    80003138:	0000                	unimp
+    8000313a:	0000                	unimp
+    8000313c:	0000                	unimp
+    8000313e:	0000                	unimp
+
+0000000080003140 <test_12_data>:
+    80003140:	ffff                	0xffff
+    80003142:	ffff                	0xffff
+    80003144:	ffff                	0xffff
+    80003146:	7fff                	0x7fff
+    80003148:	ffff                	0xffff
+    8000314a:	ffff                	0xffff
+    8000314c:	ffff                	0xffff
+    8000314e:	7fff                	0x7fff
+    80003150:	0000                	unimp
+    80003152:	0000                	unimp
+    80003154:	0000                	unimp
+    80003156:	0000                	unimp
+    80003158:	0000                	unimp
+    8000315a:	0000                	unimp
+    8000315c:	0000                	unimp
+    8000315e:	0000                	unimp
+
+0000000080003160 <test_13_data>:
+    80003160:	0001                	nop
+    80003162:	0000                	unimp
+    80003164:	0000                	unimp
+    80003166:	7ff0                	ld	a2,248(a5)
+    80003168:	0000                	unimp
+    8000316a:	0000                	unimp
+    8000316c:	0000                	unimp
+    8000316e:	0000                	unimp
+    80003170:	0000                	unimp
+    80003172:	0000                	unimp
+    80003174:	0000                	unimp
+    80003176:	0000                	unimp
+    80003178:	0000                	unimp
+    8000317a:	0000                	unimp
+    8000317c:	0000                	unimp
+    8000317e:	0000                	unimp
+
+0000000080003180 <test_14_data>:
+    80003180:	ffff                	0xffff
+    80003182:	ffff                	0xffff
+    80003184:	ffff                	0xffff
+    80003186:	7fff                	0x7fff
+    80003188:	0000                	unimp
+    8000318a:	0000                	unimp
+    8000318c:	0000                	unimp
+    8000318e:	0000                	unimp
+    80003190:	0000                	unimp
+    80003192:	0000                	unimp
+    80003194:	0000                	unimp
+    80003196:	0000                	unimp
+    80003198:	0000                	unimp
+    8000319a:	0000                	unimp
+    8000319c:	0000                	unimp
+    8000319e:	0000                	unimp
+
+00000000800031a0 <test_15_data>:
+    800031a0:	ffff                	0xffff
+    800031a2:	ffff                	0xffff
+    800031a4:	ffff                	0xffff
+    800031a6:	7fff                	0x7fff
+    800031a8:	ffff                	0xffff
+    800031aa:	ffff                	0xffff
+    800031ac:	ffff                	0xffff
+    800031ae:	7fff                	0x7fff
+    800031b0:	0000                	unimp
+    800031b2:	0000                	unimp
+    800031b4:	0000                	unimp
+    800031b6:	0000                	unimp
+    800031b8:	0000                	unimp
+    800031ba:	0000                	unimp
+    800031bc:	0000                	unimp
+    800031be:	0000                	unimp
+
+00000000800031c0 <test_16_data>:
+    800031c0:	0001                	nop
+    800031c2:	0000                	unimp
+    800031c4:	0000                	unimp
+    800031c6:	7ff0                	ld	a2,248(a5)
+    800031c8:	0000                	unimp
+    800031ca:	0000                	unimp
+    800031cc:	0000                	unimp
+    800031ce:	0000                	unimp
+    800031d0:	0000                	unimp
+    800031d2:	0000                	unimp
+    800031d4:	0000                	unimp
+    800031d6:	0000                	unimp
+    800031d8:	0000                	unimp
+    800031da:	0000                	unimp
+    800031dc:	0000                	unimp
+    800031de:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-v-fcmp.elf b/test/riscv-tests/rv64ud-v-fcmp.elf
new file mode 100644
index 0000000..5ead5d7
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcmp.elf
diff --git a/test/riscv-tests/rv64ud-v-fcvt.dump b/test/riscv-tests/rv64ud-v-fcvt.dump
new file mode 100644
index 0000000..5191ce0
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcvt.dump
@@ -0,0 +1,1060 @@
+
+rv64ud-v-fcvt:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	85868693          	addi	a3,a3,-1960 # 80002cb0 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	88c60613          	addi	a2,a2,-1908 # 80002d40 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	85460613          	addi	a2,a2,-1964 # 80002d58 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	7a468693          	addi	a3,a3,1956 # 80002cf8 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	7c068693          	addi	a3,a3,1984 # 80002e30 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	74060613          	addi	a2,a2,1856 # 80002e08 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	67468693          	addi	a3,a3,1652 # 80002e60 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	59468693          	addi	a3,a3,1428 # 80002dd0 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	52468693          	addi	a3,a3,1316 # 80002d98 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	02100793          	li	a5,33
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0d3917b7          	lui	a5,0xd391
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	b8678793          	addi	a5,a5,-1146 # d390b86 <_start-0x72c6f47a>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00053683          	ld	a3,0(a0)
+    80002adc:	00200513          	li	a0,2
+    80002ae0:	d2050053          	fcvt.d.w	ft0,a0
+    80002ae4:	00101073          	fsflags	zero
+    80002ae8:	e2000553          	fmv.x.d	a0,ft0
+    80002aec:	1ad51263          	bne	a0,a3,80002c90 <fail>
+
+0000000080002af0 <test_3>:
+    80002af0:	00300193          	li	gp,3
+    80002af4:	00000517          	auipc	a0,0x0
+    80002af8:	51450513          	addi	a0,a0,1300 # 80003008 <test_3_data>
+    80002afc:	00053683          	ld	a3,0(a0)
+    80002b00:	ffe00513          	li	a0,-2
+    80002b04:	d2050053          	fcvt.d.w	ft0,a0
+    80002b08:	00101073          	fsflags	zero
+    80002b0c:	e2000553          	fmv.x.d	a0,ft0
+    80002b10:	18d51063          	bne	a0,a3,80002c90 <fail>
+
+0000000080002b14 <test_4>:
+    80002b14:	00400193          	li	gp,4
+    80002b18:	00000517          	auipc	a0,0x0
+    80002b1c:	4f850513          	addi	a0,a0,1272 # 80003010 <test_4_data>
+    80002b20:	00053683          	ld	a3,0(a0)
+    80002b24:	00200513          	li	a0,2
+    80002b28:	d2150053          	fcvt.d.wu	ft0,a0
+    80002b2c:	00101073          	fsflags	zero
+    80002b30:	e2000553          	fmv.x.d	a0,ft0
+    80002b34:	14d51e63          	bne	a0,a3,80002c90 <fail>
+
+0000000080002b38 <test_5>:
+    80002b38:	00500193          	li	gp,5
+    80002b3c:	00000517          	auipc	a0,0x0
+    80002b40:	4dc50513          	addi	a0,a0,1244 # 80003018 <test_5_data>
+    80002b44:	00053683          	ld	a3,0(a0)
+    80002b48:	ffe00513          	li	a0,-2
+    80002b4c:	d2150053          	fcvt.d.wu	ft0,a0
+    80002b50:	00101073          	fsflags	zero
+    80002b54:	e2000553          	fmv.x.d	a0,ft0
+    80002b58:	12d51c63          	bne	a0,a3,80002c90 <fail>
+
+0000000080002b5c <test_6>:
+    80002b5c:	00600193          	li	gp,6
+    80002b60:	00000517          	auipc	a0,0x0
+    80002b64:	4c050513          	addi	a0,a0,1216 # 80003020 <test_6_data>
+    80002b68:	00053683          	ld	a3,0(a0)
+    80002b6c:	00200513          	li	a0,2
+    80002b70:	d2257053          	fcvt.d.l	ft0,a0
+    80002b74:	00101073          	fsflags	zero
+    80002b78:	e2000553          	fmv.x.d	a0,ft0
+    80002b7c:	10d51a63          	bne	a0,a3,80002c90 <fail>
+
+0000000080002b80 <test_7>:
+    80002b80:	00700193          	li	gp,7
+    80002b84:	00000517          	auipc	a0,0x0
+    80002b88:	4a450513          	addi	a0,a0,1188 # 80003028 <test_7_data>
+    80002b8c:	00053683          	ld	a3,0(a0)
+    80002b90:	ffe00513          	li	a0,-2
+    80002b94:	d2257053          	fcvt.d.l	ft0,a0
+    80002b98:	00101073          	fsflags	zero
+    80002b9c:	e2000553          	fmv.x.d	a0,ft0
+    80002ba0:	0ed51863          	bne	a0,a3,80002c90 <fail>
+
+0000000080002ba4 <test_8>:
+    80002ba4:	00800193          	li	gp,8
+    80002ba8:	00000517          	auipc	a0,0x0
+    80002bac:	48850513          	addi	a0,a0,1160 # 80003030 <test_8_data>
+    80002bb0:	00053683          	ld	a3,0(a0)
+    80002bb4:	00200513          	li	a0,2
+    80002bb8:	d2357053          	fcvt.d.lu	ft0,a0
+    80002bbc:	00101073          	fsflags	zero
+    80002bc0:	e2000553          	fmv.x.d	a0,ft0
+    80002bc4:	0cd51663          	bne	a0,a3,80002c90 <fail>
+
+0000000080002bc8 <test_9>:
+    80002bc8:	00900193          	li	gp,9
+    80002bcc:	00000517          	auipc	a0,0x0
+    80002bd0:	46c50513          	addi	a0,a0,1132 # 80003038 <test_9_data>
+    80002bd4:	00053683          	ld	a3,0(a0)
+    80002bd8:	ffe00513          	li	a0,-2
+    80002bdc:	d2357053          	fcvt.d.lu	ft0,a0
+    80002be0:	00101073          	fsflags	zero
+    80002be4:	e2000553          	fmv.x.d	a0,ft0
+    80002be8:	0ad51463          	bne	a0,a3,80002c90 <fail>
+
+0000000080002bec <test_10>:
+    80002bec:	00a00193          	li	gp,10
+    80002bf0:	00000517          	auipc	a0,0x0
+    80002bf4:	45050513          	addi	a0,a0,1104 # 80003040 <test_10_data>
+    80002bf8:	00053007          	fld	ft0,0(a0)
+    80002bfc:	00853087          	fld	ft1,8(a0)
+    80002c00:	01053107          	fld	ft2,16(a0)
+    80002c04:	01853683          	ld	a3,24(a0)
+    80002c08:	401071d3          	fcvt.s.d	ft3,ft0
+    80002c0c:	420181d3          	fcvt.d.s	ft3,ft3
+    80002c10:	e2018553          	fmv.x.d	a0,ft3
+    80002c14:	001015f3          	fsflags	a1,zero
+    80002c18:	00000613          	li	a2,0
+    80002c1c:	06d51a63          	bne	a0,a3,80002c90 <fail>
+    80002c20:	06c59863          	bne	a1,a2,80002c90 <fail>
+
+0000000080002c24 <test_11>:
+    80002c24:	00b00193          	li	gp,11
+    80002c28:	00000517          	auipc	a0,0x0
+    80002c2c:	43850513          	addi	a0,a0,1080 # 80003060 <test_11_data>
+    80002c30:	00052007          	flw	ft0,0(a0)
+    80002c34:	00452087          	flw	ft1,4(a0)
+    80002c38:	00852107          	flw	ft2,8(a0)
+    80002c3c:	00c52683          	lw	a3,12(a0)
+    80002c40:	420001d3          	fcvt.d.s	ft3,ft0
+    80002c44:	4011f1d3          	fcvt.s.d	ft3,ft3
+    80002c48:	e0018553          	fmv.x.w	a0,ft3
+    80002c4c:	001015f3          	fsflags	a1,zero
+    80002c50:	00000613          	li	a2,0
+    80002c54:	02d51e63          	bne	a0,a3,80002c90 <fail>
+    80002c58:	02c59c63          	bne	a1,a2,80002c90 <fail>
+
+0000000080002c5c <test_12>:
+    80002c5c:	00000597          	auipc	a1,0x0
+    80002c60:	41458593          	addi	a1,a1,1044 # 80003070 <begin_signature>
+    80002c64:	0005b603          	ld	a2,0(a1)
+    80002c68:	f2060153          	fmv.d.x	ft2,a2
+    80002c6c:	40117153          	fcvt.s.d	ft2,ft2
+    80002c70:	42010153          	fcvt.d.s	ft2,ft2
+    80002c74:	e2010553          	fmv.x.d	a0,ft2
+    80002c78:	00001eb7          	lui	t4,0x1
+    80002c7c:	fffe8e9b          	addiw	t4,t4,-1
+    80002c80:	033e9e93          	slli	t4,t4,0x33
+    80002c84:	00c00193          	li	gp,12
+    80002c88:	01d51463          	bne	a0,t4,80002c90 <fail>
+    80002c8c:	00301a63          	bne	zero,gp,80002ca0 <pass>
+
+0000000080002c90 <fail>:
+    80002c90:	00119513          	slli	a0,gp,0x1
+    80002c94:	00050063          	beqz	a0,80002c94 <fail+0x4>
+    80002c98:	00156513          	ori	a0,a0,1
+    80002c9c:	00000073          	ecall
+
+0000000080002ca0 <pass>:
+    80002ca0:	00100513          	li	a0,1
+    80002ca4:	00000073          	ecall
+    80002ca8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	0000                	unimp
+    80003004:	0000                	unimp
+    80003006:	4000                	lw	s0,0(s0)
+
+0000000080003008 <test_3_data>:
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	0000                	unimp
+    8000300e:	c000                	sw	s0,0(s0)
+
+0000000080003010 <test_4_data>:
+    80003010:	0000                	unimp
+    80003012:	0000                	unimp
+    80003014:	0000                	unimp
+    80003016:	4000                	lw	s0,0(s0)
+
+0000000080003018 <test_5_data>:
+    80003018:	0000                	unimp
+    8000301a:	ffc0                	sd	s0,184(a5)
+    8000301c:	ffff                	0xffff
+    8000301e:	          	jal	gp,8000701e <pt+0x301e>
+
+0000000080003020 <test_6_data>:
+    80003020:	0000                	unimp
+    80003022:	0000                	unimp
+    80003024:	0000                	unimp
+    80003026:	4000                	lw	s0,0(s0)
+
+0000000080003028 <test_7_data>:
+    80003028:	0000                	unimp
+    8000302a:	0000                	unimp
+    8000302c:	0000                	unimp
+    8000302e:	c000                	sw	s0,0(s0)
+
+0000000080003030 <test_8_data>:
+    80003030:	0000                	unimp
+    80003032:	0000                	unimp
+    80003034:	0000                	unimp
+    80003036:	4000                	lw	s0,0(s0)
+
+0000000080003038 <test_9_data>:
+    80003038:	0000                	unimp
+    8000303a:	0000                	unimp
+    8000303c:	0000                	unimp
+    8000303e:	43f0                	lw	a2,68(a5)
+
+0000000080003040 <test_10_data>:
+    80003040:	0000                	unimp
+    80003042:	0000                	unimp
+    80003044:	0000                	unimp
+    80003046:	bff8                	fsd	fa4,248(a5)
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	0000                	unimp
+    8000304e:	0000                	unimp
+    80003050:	0000                	unimp
+    80003052:	0000                	unimp
+    80003054:	0000                	unimp
+    80003056:	0000                	unimp
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	0000                	unimp
+    8000305e:	bff8                	fsd	fa4,248(a5)
+
+0000000080003060 <test_11_data>:
+    80003060:	0000                	unimp
+    80003062:	bfc0                	fsd	fs0,184(a5)
+    80003064:	0000                	unimp
+    80003066:	0000                	unimp
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	bfc0                	fsd	fs0,184(a5)
+
+0000000080003070 <begin_signature>:
+    80003070:	8004                	0x8004
+    80003072:	ffff                	0xffff
+    80003074:	ffff                	0xffff
+    80003076:	7ffc                	ld	a5,248(a5)
diff --git a/test/riscv-tests/rv64ud-v-fcvt.elf b/test/riscv-tests/rv64ud-v-fcvt.elf
new file mode 100644
index 0000000..13cd934
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcvt.elf
diff --git a/test/riscv-tests/rv64ud-v-fcvt_w.dump b/test/riscv-tests/rv64ud-v-fcvt_w.dump
new file mode 100644
index 0000000..a7e35f2
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcvt_w.dump
@@ -0,0 +1,2105 @@
+
+rv64ud-v-fcvt_w:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	0000a117          	auipc	sp,0xa
+    8000001c:	6b810113          	addi	sp,sp,1720 # 8000a6d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00003617          	auipc	a2,0x3
+    80002318:	cec60613          	addi	a2,a2,-788 # 80005000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00007797          	auipc	a5,0x7
+    80002334:	4b878793          	addi	a5,a5,1208 # 800097e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00007717          	auipc	a4,0x7
+    80002348:	49c70713          	addi	a4,a4,1180 # 800097e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00007897          	auipc	a7,0x7
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800097e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00007797          	auipc	a5,0x7
+    80002384:	07078793          	addi	a5,a5,112 # 800093f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf6810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00007797          	auipc	a5,0x7
+    80002448:	3807be23          	sd	zero,924(a5) # 800097e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	ee068693          	addi	a3,a3,-288 # 80003338 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	f1460613          	addi	a2,a2,-236 # 800033c8 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	edc60613          	addi	a2,a2,-292 # 800033e0 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	e2c68693          	addi	a3,a3,-468 # 80003380 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	e4868693          	addi	a3,a3,-440 # 800034b8 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	dc860613          	addi	a2,a2,-568 # 80003490 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00007d17          	auipc	s10,0x7
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800093f0 <user_mapping>
+    80002724:	00003b97          	auipc	s7,0x3
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80005000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00007a17          	auipc	s4,0x7
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800097e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00007717          	auipc	a4,0x7
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800097e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00007717          	auipc	a4,0x7
+    800027d4:	00f73823          	sd	a5,16(a4) # 800097e0 <freelist_tail>
+    800027d8:	00007717          	auipc	a4,0x7
+    800027dc:	00f73823          	sd	a5,16(a4) # 800097e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00001697          	auipc	a3,0x1
+    800027f0:	cfc68693          	addi	a3,a3,-772 # 800034e8 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00001697          	auipc	a3,0x1
+    80002840:	c1c68693          	addi	a3,a3,-996 # 80003458 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00001697          	auipc	a3,0x1
+    80002878:	bac68693          	addi	a3,a3,-1108 # 80003420 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00003697          	auipc	a3,0x3
+    800028e0:	72468693          	addi	a3,a3,1828 # 80006000 <pt+0x1000>
+    800028e4:	00004717          	auipc	a4,0x4
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80007000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00005797          	auipc	a5,0x5
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80008000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00002897          	auipc	a7,0x2
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80005000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00003697          	auipc	a3,0x3
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80005ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00002617          	auipc	a2,0x2
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80005000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00005697          	auipc	a3,0x5
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80007ff8 <pt+0x2ff8>
+    8000294c:	00003717          	auipc	a4,0x3
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80006000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00006697          	auipc	a3,0x6
+    800029c0:	64468693          	addi	a3,a3,1604 # 80009000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00007617          	auipc	a2,0x7
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800097e8 <freelist_head>
+    800029d4:	00007797          	auipc	a5,0x7
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800097e0 <freelist_tail>
+    800029dc:	00007317          	auipc	t1,0x7
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800093f0 <user_mapping>
+    800029e4:	00a00793          	li	a5,10
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00007797          	auipc	a5,0x7
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800093e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0c1627b7          	lui	a5,0xc162
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	6ba78793          	addi	a5,a5,1722 # c1626ba <_start-0x73e9d946>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00001517          	auipc	a0,0x1
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80004000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002aec:	001015f3          	fsflags	a1,zero
+    80002af0:	00100613          	li	a2,1
+    80002af4:	02d512e3          	bne	a0,a3,80003318 <fail>
+    80002af8:	02c590e3          	bne	a1,a2,80003318 <fail>
+
+0000000080002afc <test_3>:
+    80002afc:	00300193          	li	gp,3
+    80002b00:	00001517          	auipc	a0,0x1
+    80002b04:	52050513          	addi	a0,a0,1312 # 80004020 <test_3_data>
+    80002b08:	00053007          	fld	ft0,0(a0)
+    80002b0c:	00853087          	fld	ft1,8(a0)
+    80002b10:	01053107          	fld	ft2,16(a0)
+    80002b14:	01853683          	ld	a3,24(a0)
+    80002b18:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002b1c:	001015f3          	fsflags	a1,zero
+    80002b20:	00000613          	li	a2,0
+    80002b24:	7ed51a63          	bne	a0,a3,80003318 <fail>
+    80002b28:	7ec59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002b2c <test_4>:
+    80002b2c:	00400193          	li	gp,4
+    80002b30:	00001517          	auipc	a0,0x1
+    80002b34:	51050513          	addi	a0,a0,1296 # 80004040 <test_4_data>
+    80002b38:	00053007          	fld	ft0,0(a0)
+    80002b3c:	00853087          	fld	ft1,8(a0)
+    80002b40:	01053107          	fld	ft2,16(a0)
+    80002b44:	01853683          	ld	a3,24(a0)
+    80002b48:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002b4c:	001015f3          	fsflags	a1,zero
+    80002b50:	00100613          	li	a2,1
+    80002b54:	7cd51263          	bne	a0,a3,80003318 <fail>
+    80002b58:	7cc59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002b5c <test_5>:
+    80002b5c:	00500193          	li	gp,5
+    80002b60:	00001517          	auipc	a0,0x1
+    80002b64:	50050513          	addi	a0,a0,1280 # 80004060 <test_5_data>
+    80002b68:	00053007          	fld	ft0,0(a0)
+    80002b6c:	00853087          	fld	ft1,8(a0)
+    80002b70:	01053107          	fld	ft2,16(a0)
+    80002b74:	01853683          	ld	a3,24(a0)
+    80002b78:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002b7c:	001015f3          	fsflags	a1,zero
+    80002b80:	00100613          	li	a2,1
+    80002b84:	78d51a63          	bne	a0,a3,80003318 <fail>
+    80002b88:	78c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002b8c <test_6>:
+    80002b8c:	00600193          	li	gp,6
+    80002b90:	00001517          	auipc	a0,0x1
+    80002b94:	4f050513          	addi	a0,a0,1264 # 80004080 <test_6_data>
+    80002b98:	00053007          	fld	ft0,0(a0)
+    80002b9c:	00853087          	fld	ft1,8(a0)
+    80002ba0:	01053107          	fld	ft2,16(a0)
+    80002ba4:	01853683          	ld	a3,24(a0)
+    80002ba8:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002bac:	001015f3          	fsflags	a1,zero
+    80002bb0:	00000613          	li	a2,0
+    80002bb4:	76d51263          	bne	a0,a3,80003318 <fail>
+    80002bb8:	76c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002bbc <test_7>:
+    80002bbc:	00700193          	li	gp,7
+    80002bc0:	00001517          	auipc	a0,0x1
+    80002bc4:	4e050513          	addi	a0,a0,1248 # 800040a0 <test_7_data>
+    80002bc8:	00053007          	fld	ft0,0(a0)
+    80002bcc:	00853087          	fld	ft1,8(a0)
+    80002bd0:	01053107          	fld	ft2,16(a0)
+    80002bd4:	01853683          	ld	a3,24(a0)
+    80002bd8:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002bdc:	001015f3          	fsflags	a1,zero
+    80002be0:	00100613          	li	a2,1
+    80002be4:	72d51a63          	bne	a0,a3,80003318 <fail>
+    80002be8:	72c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002bec <test_8>:
+    80002bec:	00800193          	li	gp,8
+    80002bf0:	00001517          	auipc	a0,0x1
+    80002bf4:	4d050513          	addi	a0,a0,1232 # 800040c0 <test_8_data>
+    80002bf8:	00053007          	fld	ft0,0(a0)
+    80002bfc:	00853087          	fld	ft1,8(a0)
+    80002c00:	01053107          	fld	ft2,16(a0)
+    80002c04:	01853683          	ld	a3,24(a0)
+    80002c08:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002c0c:	001015f3          	fsflags	a1,zero
+    80002c10:	01000613          	li	a2,16
+    80002c14:	70d51263          	bne	a0,a3,80003318 <fail>
+    80002c18:	70c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002c1c <test_9>:
+    80002c1c:	00900193          	li	gp,9
+    80002c20:	00001517          	auipc	a0,0x1
+    80002c24:	4c050513          	addi	a0,a0,1216 # 800040e0 <test_9_data>
+    80002c28:	00053007          	fld	ft0,0(a0)
+    80002c2c:	00853087          	fld	ft1,8(a0)
+    80002c30:	01053107          	fld	ft2,16(a0)
+    80002c34:	01853683          	ld	a3,24(a0)
+    80002c38:	c2001553          	fcvt.w.d	a0,ft0,rtz
+    80002c3c:	001015f3          	fsflags	a1,zero
+    80002c40:	01000613          	li	a2,16
+    80002c44:	6cd51a63          	bne	a0,a3,80003318 <fail>
+    80002c48:	6cc59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002c4c <test_12>:
+    80002c4c:	00c00193          	li	gp,12
+    80002c50:	00001517          	auipc	a0,0x1
+    80002c54:	4b050513          	addi	a0,a0,1200 # 80004100 <test_12_data>
+    80002c58:	00053007          	fld	ft0,0(a0)
+    80002c5c:	00853087          	fld	ft1,8(a0)
+    80002c60:	01053107          	fld	ft2,16(a0)
+    80002c64:	01853683          	ld	a3,24(a0)
+    80002c68:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002c6c:	001015f3          	fsflags	a1,zero
+    80002c70:	01000613          	li	a2,16
+    80002c74:	6ad51263          	bne	a0,a3,80003318 <fail>
+    80002c78:	6ac59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002c7c <test_13>:
+    80002c7c:	00d00193          	li	gp,13
+    80002c80:	00001517          	auipc	a0,0x1
+    80002c84:	4a050513          	addi	a0,a0,1184 # 80004120 <test_13_data>
+    80002c88:	00053007          	fld	ft0,0(a0)
+    80002c8c:	00853087          	fld	ft1,8(a0)
+    80002c90:	01053107          	fld	ft2,16(a0)
+    80002c94:	01853683          	ld	a3,24(a0)
+    80002c98:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002c9c:	001015f3          	fsflags	a1,zero
+    80002ca0:	01000613          	li	a2,16
+    80002ca4:	66d51a63          	bne	a0,a3,80003318 <fail>
+    80002ca8:	66c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002cac <test_14>:
+    80002cac:	00e00193          	li	gp,14
+    80002cb0:	00001517          	auipc	a0,0x1
+    80002cb4:	49050513          	addi	a0,a0,1168 # 80004140 <test_14_data>
+    80002cb8:	00053007          	fld	ft0,0(a0)
+    80002cbc:	00853087          	fld	ft1,8(a0)
+    80002cc0:	01053107          	fld	ft2,16(a0)
+    80002cc4:	01853683          	ld	a3,24(a0)
+    80002cc8:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002ccc:	001015f3          	fsflags	a1,zero
+    80002cd0:	00100613          	li	a2,1
+    80002cd4:	64d51263          	bne	a0,a3,80003318 <fail>
+    80002cd8:	64c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002cdc <test_15>:
+    80002cdc:	00f00193          	li	gp,15
+    80002ce0:	00001517          	auipc	a0,0x1
+    80002ce4:	48050513          	addi	a0,a0,1152 # 80004160 <test_15_data>
+    80002ce8:	00053007          	fld	ft0,0(a0)
+    80002cec:	00853087          	fld	ft1,8(a0)
+    80002cf0:	01053107          	fld	ft2,16(a0)
+    80002cf4:	01853683          	ld	a3,24(a0)
+    80002cf8:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002cfc:	001015f3          	fsflags	a1,zero
+    80002d00:	00100613          	li	a2,1
+    80002d04:	60d51a63          	bne	a0,a3,80003318 <fail>
+    80002d08:	60c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002d0c <test_16>:
+    80002d0c:	01000193          	li	gp,16
+    80002d10:	00001517          	auipc	a0,0x1
+    80002d14:	47050513          	addi	a0,a0,1136 # 80004180 <test_16_data>
+    80002d18:	00053007          	fld	ft0,0(a0)
+    80002d1c:	00853087          	fld	ft1,8(a0)
+    80002d20:	01053107          	fld	ft2,16(a0)
+    80002d24:	01853683          	ld	a3,24(a0)
+    80002d28:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	5ed51263          	bne	a0,a3,80003318 <fail>
+    80002d38:	5ec59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002d3c <test_17>:
+    80002d3c:	01100193          	li	gp,17
+    80002d40:	00001517          	auipc	a0,0x1
+    80002d44:	46050513          	addi	a0,a0,1120 # 800041a0 <test_17_data>
+    80002d48:	00053007          	fld	ft0,0(a0)
+    80002d4c:	00853087          	fld	ft1,8(a0)
+    80002d50:	01053107          	fld	ft2,16(a0)
+    80002d54:	01853683          	ld	a3,24(a0)
+    80002d58:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002d5c:	001015f3          	fsflags	a1,zero
+    80002d60:	00100613          	li	a2,1
+    80002d64:	5ad51a63          	bne	a0,a3,80003318 <fail>
+    80002d68:	5ac59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002d6c <test_18>:
+    80002d6c:	01200193          	li	gp,18
+    80002d70:	00001517          	auipc	a0,0x1
+    80002d74:	45050513          	addi	a0,a0,1104 # 800041c0 <test_18_data>
+    80002d78:	00053007          	fld	ft0,0(a0)
+    80002d7c:	00853087          	fld	ft1,8(a0)
+    80002d80:	01053107          	fld	ft2,16(a0)
+    80002d84:	01853683          	ld	a3,24(a0)
+    80002d88:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002d8c:	001015f3          	fsflags	a1,zero
+    80002d90:	01000613          	li	a2,16
+    80002d94:	58d51263          	bne	a0,a3,80003318 <fail>
+    80002d98:	58c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002d9c <test_19>:
+    80002d9c:	01300193          	li	gp,19
+    80002da0:	00001517          	auipc	a0,0x1
+    80002da4:	44050513          	addi	a0,a0,1088 # 800041e0 <test_19_data>
+    80002da8:	00053007          	fld	ft0,0(a0)
+    80002dac:	00853087          	fld	ft1,8(a0)
+    80002db0:	01053107          	fld	ft2,16(a0)
+    80002db4:	01853683          	ld	a3,24(a0)
+    80002db8:	c2101553          	fcvt.wu.d	a0,ft0,rtz
+    80002dbc:	001015f3          	fsflags	a1,zero
+    80002dc0:	00000613          	li	a2,0
+    80002dc4:	54d51a63          	bne	a0,a3,80003318 <fail>
+    80002dc8:	54c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002dcc <test_22>:
+    80002dcc:	01600193          	li	gp,22
+    80002dd0:	00001517          	auipc	a0,0x1
+    80002dd4:	43050513          	addi	a0,a0,1072 # 80004200 <test_22_data>
+    80002dd8:	00053007          	fld	ft0,0(a0)
+    80002ddc:	00853087          	fld	ft1,8(a0)
+    80002de0:	01053107          	fld	ft2,16(a0)
+    80002de4:	01853683          	ld	a3,24(a0)
+    80002de8:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002dec:	001015f3          	fsflags	a1,zero
+    80002df0:	00100613          	li	a2,1
+    80002df4:	52d51263          	bne	a0,a3,80003318 <fail>
+    80002df8:	52c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002dfc <test_23>:
+    80002dfc:	01700193          	li	gp,23
+    80002e00:	00001517          	auipc	a0,0x1
+    80002e04:	42050513          	addi	a0,a0,1056 # 80004220 <test_23_data>
+    80002e08:	00053007          	fld	ft0,0(a0)
+    80002e0c:	00853087          	fld	ft1,8(a0)
+    80002e10:	01053107          	fld	ft2,16(a0)
+    80002e14:	01853683          	ld	a3,24(a0)
+    80002e18:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002e1c:	001015f3          	fsflags	a1,zero
+    80002e20:	00000613          	li	a2,0
+    80002e24:	4ed51a63          	bne	a0,a3,80003318 <fail>
+    80002e28:	4ec59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002e2c <test_24>:
+    80002e2c:	01800193          	li	gp,24
+    80002e30:	00001517          	auipc	a0,0x1
+    80002e34:	41050513          	addi	a0,a0,1040 # 80004240 <test_24_data>
+    80002e38:	00053007          	fld	ft0,0(a0)
+    80002e3c:	00853087          	fld	ft1,8(a0)
+    80002e40:	01053107          	fld	ft2,16(a0)
+    80002e44:	01853683          	ld	a3,24(a0)
+    80002e48:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002e4c:	001015f3          	fsflags	a1,zero
+    80002e50:	00100613          	li	a2,1
+    80002e54:	4cd51263          	bne	a0,a3,80003318 <fail>
+    80002e58:	4cc59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002e5c <test_25>:
+    80002e5c:	01900193          	li	gp,25
+    80002e60:	00001517          	auipc	a0,0x1
+    80002e64:	40050513          	addi	a0,a0,1024 # 80004260 <test_25_data>
+    80002e68:	00053007          	fld	ft0,0(a0)
+    80002e6c:	00853087          	fld	ft1,8(a0)
+    80002e70:	01053107          	fld	ft2,16(a0)
+    80002e74:	01853683          	ld	a3,24(a0)
+    80002e78:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002e7c:	001015f3          	fsflags	a1,zero
+    80002e80:	00100613          	li	a2,1
+    80002e84:	48d51a63          	bne	a0,a3,80003318 <fail>
+    80002e88:	48c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002e8c <test_26>:
+    80002e8c:	01a00193          	li	gp,26
+    80002e90:	00001517          	auipc	a0,0x1
+    80002e94:	3f050513          	addi	a0,a0,1008 # 80004280 <test_26_data>
+    80002e98:	00053007          	fld	ft0,0(a0)
+    80002e9c:	00853087          	fld	ft1,8(a0)
+    80002ea0:	01053107          	fld	ft2,16(a0)
+    80002ea4:	01853683          	ld	a3,24(a0)
+    80002ea8:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002eac:	001015f3          	fsflags	a1,zero
+    80002eb0:	00000613          	li	a2,0
+    80002eb4:	46d51263          	bne	a0,a3,80003318 <fail>
+    80002eb8:	46c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002ebc <test_27>:
+    80002ebc:	01b00193          	li	gp,27
+    80002ec0:	00001517          	auipc	a0,0x1
+    80002ec4:	3e050513          	addi	a0,a0,992 # 800042a0 <test_27_data>
+    80002ec8:	00053007          	fld	ft0,0(a0)
+    80002ecc:	00853087          	fld	ft1,8(a0)
+    80002ed0:	01053107          	fld	ft2,16(a0)
+    80002ed4:	01853683          	ld	a3,24(a0)
+    80002ed8:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002edc:	001015f3          	fsflags	a1,zero
+    80002ee0:	00100613          	li	a2,1
+    80002ee4:	42d51a63          	bne	a0,a3,80003318 <fail>
+    80002ee8:	42c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002eec <test_28>:
+    80002eec:	01c00193          	li	gp,28
+    80002ef0:	00001517          	auipc	a0,0x1
+    80002ef4:	3d050513          	addi	a0,a0,976 # 800042c0 <test_28_data>
+    80002ef8:	00053007          	fld	ft0,0(a0)
+    80002efc:	00853087          	fld	ft1,8(a0)
+    80002f00:	01053107          	fld	ft2,16(a0)
+    80002f04:	01853683          	ld	a3,24(a0)
+    80002f08:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002f0c:	001015f3          	fsflags	a1,zero
+    80002f10:	00000613          	li	a2,0
+    80002f14:	40d51263          	bne	a0,a3,80003318 <fail>
+    80002f18:	40c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002f1c <test_29>:
+    80002f1c:	01d00193          	li	gp,29
+    80002f20:	00001517          	auipc	a0,0x1
+    80002f24:	3c050513          	addi	a0,a0,960 # 800042e0 <test_29_data>
+    80002f28:	00053007          	fld	ft0,0(a0)
+    80002f2c:	00853087          	fld	ft1,8(a0)
+    80002f30:	01053107          	fld	ft2,16(a0)
+    80002f34:	01853683          	ld	a3,24(a0)
+    80002f38:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002f3c:	001015f3          	fsflags	a1,zero
+    80002f40:	00000613          	li	a2,0
+    80002f44:	3cd51a63          	bne	a0,a3,80003318 <fail>
+    80002f48:	3cc59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002f4c <test_20>:
+    80002f4c:	01400193          	li	gp,20
+    80002f50:	00001517          	auipc	a0,0x1
+    80002f54:	3b050513          	addi	a0,a0,944 # 80004300 <test_20_data>
+    80002f58:	00053007          	fld	ft0,0(a0)
+    80002f5c:	00853087          	fld	ft1,8(a0)
+    80002f60:	01053107          	fld	ft2,16(a0)
+    80002f64:	01853683          	ld	a3,24(a0)
+    80002f68:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002f6c:	001015f3          	fsflags	a1,zero
+    80002f70:	01000613          	li	a2,16
+    80002f74:	3ad51263          	bne	a0,a3,80003318 <fail>
+    80002f78:	3ac59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002f7c <test_21>:
+    80002f7c:	01500193          	li	gp,21
+    80002f80:	00001517          	auipc	a0,0x1
+    80002f84:	3a050513          	addi	a0,a0,928 # 80004320 <test_21_data>
+    80002f88:	00053007          	fld	ft0,0(a0)
+    80002f8c:	00853087          	fld	ft1,8(a0)
+    80002f90:	01053107          	fld	ft2,16(a0)
+    80002f94:	01853683          	ld	a3,24(a0)
+    80002f98:	c2201553          	fcvt.l.d	a0,ft0,rtz
+    80002f9c:	001015f3          	fsflags	a1,zero
+    80002fa0:	01000613          	li	a2,16
+    80002fa4:	36d51a63          	bne	a0,a3,80003318 <fail>
+    80002fa8:	36c59863          	bne	a1,a2,80003318 <fail>
+
+0000000080002fac <test_32>:
+    80002fac:	02000193          	li	gp,32
+    80002fb0:	00001517          	auipc	a0,0x1
+    80002fb4:	39050513          	addi	a0,a0,912 # 80004340 <test_32_data>
+    80002fb8:	00053007          	fld	ft0,0(a0)
+    80002fbc:	00853087          	fld	ft1,8(a0)
+    80002fc0:	01053107          	fld	ft2,16(a0)
+    80002fc4:	01853683          	ld	a3,24(a0)
+    80002fc8:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80002fcc:	001015f3          	fsflags	a1,zero
+    80002fd0:	01000613          	li	a2,16
+    80002fd4:	34d51263          	bne	a0,a3,80003318 <fail>
+    80002fd8:	34c59063          	bne	a1,a2,80003318 <fail>
+
+0000000080002fdc <test_33>:
+    80002fdc:	02100193          	li	gp,33
+    80002fe0:	00001517          	auipc	a0,0x1
+    80002fe4:	38050513          	addi	a0,a0,896 # 80004360 <test_33_data>
+    80002fe8:	00053007          	fld	ft0,0(a0)
+    80002fec:	00853087          	fld	ft1,8(a0)
+    80002ff0:	01053107          	fld	ft2,16(a0)
+    80002ff4:	01853683          	ld	a3,24(a0)
+    80002ff8:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    80002ffc:	001015f3          	fsflags	a1,zero
+    80003000:	01000613          	li	a2,16
+    80003004:	30d51a63          	bne	a0,a3,80003318 <fail>
+    80003008:	30c59863          	bne	a1,a2,80003318 <fail>
+
+000000008000300c <test_34>:
+    8000300c:	02200193          	li	gp,34
+    80003010:	00001517          	auipc	a0,0x1
+    80003014:	37050513          	addi	a0,a0,880 # 80004380 <test_34_data>
+    80003018:	00053007          	fld	ft0,0(a0)
+    8000301c:	00853087          	fld	ft1,8(a0)
+    80003020:	01053107          	fld	ft2,16(a0)
+    80003024:	01853683          	ld	a3,24(a0)
+    80003028:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    8000302c:	001015f3          	fsflags	a1,zero
+    80003030:	00100613          	li	a2,1
+    80003034:	2ed51263          	bne	a0,a3,80003318 <fail>
+    80003038:	2ec59063          	bne	a1,a2,80003318 <fail>
+
+000000008000303c <test_35>:
+    8000303c:	02300193          	li	gp,35
+    80003040:	00001517          	auipc	a0,0x1
+    80003044:	36050513          	addi	a0,a0,864 # 800043a0 <test_35_data>
+    80003048:	00053007          	fld	ft0,0(a0)
+    8000304c:	00853087          	fld	ft1,8(a0)
+    80003050:	01053107          	fld	ft2,16(a0)
+    80003054:	01853683          	ld	a3,24(a0)
+    80003058:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    8000305c:	001015f3          	fsflags	a1,zero
+    80003060:	00100613          	li	a2,1
+    80003064:	2ad51a63          	bne	a0,a3,80003318 <fail>
+    80003068:	2ac59863          	bne	a1,a2,80003318 <fail>
+
+000000008000306c <test_36>:
+    8000306c:	02400193          	li	gp,36
+    80003070:	00001517          	auipc	a0,0x1
+    80003074:	35050513          	addi	a0,a0,848 # 800043c0 <test_36_data>
+    80003078:	00053007          	fld	ft0,0(a0)
+    8000307c:	00853087          	fld	ft1,8(a0)
+    80003080:	01053107          	fld	ft2,16(a0)
+    80003084:	01853683          	ld	a3,24(a0)
+    80003088:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    8000308c:	001015f3          	fsflags	a1,zero
+    80003090:	00000613          	li	a2,0
+    80003094:	28d51263          	bne	a0,a3,80003318 <fail>
+    80003098:	28c59063          	bne	a1,a2,80003318 <fail>
+
+000000008000309c <test_37>:
+    8000309c:	02500193          	li	gp,37
+    800030a0:	00001517          	auipc	a0,0x1
+    800030a4:	34050513          	addi	a0,a0,832 # 800043e0 <test_37_data>
+    800030a8:	00053007          	fld	ft0,0(a0)
+    800030ac:	00853087          	fld	ft1,8(a0)
+    800030b0:	01053107          	fld	ft2,16(a0)
+    800030b4:	01853683          	ld	a3,24(a0)
+    800030b8:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    800030bc:	001015f3          	fsflags	a1,zero
+    800030c0:	00100613          	li	a2,1
+    800030c4:	24d51a63          	bne	a0,a3,80003318 <fail>
+    800030c8:	24c59863          	bne	a1,a2,80003318 <fail>
+
+00000000800030cc <test_38>:
+    800030cc:	02600193          	li	gp,38
+    800030d0:	00001517          	auipc	a0,0x1
+    800030d4:	33050513          	addi	a0,a0,816 # 80004400 <test_38_data>
+    800030d8:	00053007          	fld	ft0,0(a0)
+    800030dc:	00853087          	fld	ft1,8(a0)
+    800030e0:	01053107          	fld	ft2,16(a0)
+    800030e4:	01853683          	ld	a3,24(a0)
+    800030e8:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    800030ec:	001015f3          	fsflags	a1,zero
+    800030f0:	01000613          	li	a2,16
+    800030f4:	22d51263          	bne	a0,a3,80003318 <fail>
+    800030f8:	22c59063          	bne	a1,a2,80003318 <fail>
+
+00000000800030fc <test_39>:
+    800030fc:	02700193          	li	gp,39
+    80003100:	00001517          	auipc	a0,0x1
+    80003104:	32050513          	addi	a0,a0,800 # 80004420 <test_39_data>
+    80003108:	00053007          	fld	ft0,0(a0)
+    8000310c:	00853087          	fld	ft1,8(a0)
+    80003110:	01053107          	fld	ft2,16(a0)
+    80003114:	01853683          	ld	a3,24(a0)
+    80003118:	c2301553          	fcvt.lu.d	a0,ft0,rtz
+    8000311c:	001015f3          	fsflags	a1,zero
+    80003120:	00000613          	li	a2,0
+    80003124:	1ed51a63          	bne	a0,a3,80003318 <fail>
+    80003128:	1ec59863          	bne	a1,a2,80003318 <fail>
+
+000000008000312c <test_42>:
+    8000312c:	00001097          	auipc	ra,0x1
+    80003130:	32408093          	addi	ra,ra,804 # 80004450 <tdat_d>
+    80003134:	0000b087          	fld	ft1,0(ra)
+    80003138:	c200f0d3          	fcvt.w.d	ra,ft1
+    8000313c:	80000eb7          	lui	t4,0x80000
+    80003140:	fffe8e9b          	addiw	t4,t4,-1
+    80003144:	02a00193          	li	gp,42
+    80003148:	1dd09863          	bne	ra,t4,80003318 <fail>
+
+000000008000314c <test_43>:
+    8000314c:	00001097          	auipc	ra,0x1
+    80003150:	30408093          	addi	ra,ra,772 # 80004450 <tdat_d>
+    80003154:	0000b087          	fld	ft1,0(ra)
+    80003158:	c220f0d3          	fcvt.l.d	ra,ft1
+    8000315c:	fff00e9b          	addiw	t4,zero,-1
+    80003160:	03fe9e93          	slli	t4,t4,0x3f
+    80003164:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffff680f>
+    80003168:	02b00193          	li	gp,43
+    8000316c:	1bd09663          	bne	ra,t4,80003318 <fail>
+
+0000000080003170 <test_44>:
+    80003170:	00001097          	auipc	ra,0x1
+    80003174:	2e008093          	addi	ra,ra,736 # 80004450 <tdat_d>
+    80003178:	0100b087          	fld	ft1,16(ra)
+    8000317c:	c200f0d3          	fcvt.w.d	ra,ft1
+    80003180:	80000eb7          	lui	t4,0x80000
+    80003184:	02c00193          	li	gp,44
+    80003188:	19d09863          	bne	ra,t4,80003318 <fail>
+
+000000008000318c <test_45>:
+    8000318c:	00001097          	auipc	ra,0x1
+    80003190:	2c408093          	addi	ra,ra,708 # 80004450 <tdat_d>
+    80003194:	0100b087          	fld	ft1,16(ra)
+    80003198:	c220f0d3          	fcvt.l.d	ra,ft1
+    8000319c:	fff00e9b          	addiw	t4,zero,-1
+    800031a0:	03fe9e93          	slli	t4,t4,0x3f
+    800031a4:	02d00193          	li	gp,45
+    800031a8:	17d09863          	bne	ra,t4,80003318 <fail>
+
+00000000800031ac <test_52>:
+    800031ac:	00001097          	auipc	ra,0x1
+    800031b0:	2a408093          	addi	ra,ra,676 # 80004450 <tdat_d>
+    800031b4:	0080b087          	fld	ft1,8(ra)
+    800031b8:	c200f0d3          	fcvt.w.d	ra,ft1
+    800031bc:	80000eb7          	lui	t4,0x80000
+    800031c0:	fffe8e9b          	addiw	t4,t4,-1
+    800031c4:	03400193          	li	gp,52
+    800031c8:	15d09863          	bne	ra,t4,80003318 <fail>
+
+00000000800031cc <test_53>:
+    800031cc:	00001097          	auipc	ra,0x1
+    800031d0:	28408093          	addi	ra,ra,644 # 80004450 <tdat_d>
+    800031d4:	0080b087          	fld	ft1,8(ra)
+    800031d8:	c220f0d3          	fcvt.l.d	ra,ft1
+    800031dc:	fff00e9b          	addiw	t4,zero,-1
+    800031e0:	03fe9e93          	slli	t4,t4,0x3f
+    800031e4:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffff680f>
+    800031e8:	03500193          	li	gp,53
+    800031ec:	13d09663          	bne	ra,t4,80003318 <fail>
+
+00000000800031f0 <test_54>:
+    800031f0:	00001097          	auipc	ra,0x1
+    800031f4:	26008093          	addi	ra,ra,608 # 80004450 <tdat_d>
+    800031f8:	0180b087          	fld	ft1,24(ra)
+    800031fc:	c200f0d3          	fcvt.w.d	ra,ft1
+    80003200:	80000eb7          	lui	t4,0x80000
+    80003204:	fffe8e9b          	addiw	t4,t4,-1
+    80003208:	03600193          	li	gp,54
+    8000320c:	11d09663          	bne	ra,t4,80003318 <fail>
+
+0000000080003210 <test_55>:
+    80003210:	00001097          	auipc	ra,0x1
+    80003214:	24008093          	addi	ra,ra,576 # 80004450 <tdat_d>
+    80003218:	0180b087          	fld	ft1,24(ra)
+    8000321c:	c220f0d3          	fcvt.l.d	ra,ft1
+    80003220:	fff00e9b          	addiw	t4,zero,-1
+    80003224:	03fe9e93          	slli	t4,t4,0x3f
+    80003228:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffff680f>
+    8000322c:	03700193          	li	gp,55
+    80003230:	0fd09463          	bne	ra,t4,80003318 <fail>
+
+0000000080003234 <test_62>:
+    80003234:	00001097          	auipc	ra,0x1
+    80003238:	21c08093          	addi	ra,ra,540 # 80004450 <tdat_d>
+    8000323c:	0000b087          	fld	ft1,0(ra)
+    80003240:	c210f0d3          	fcvt.wu.d	ra,ft1
+    80003244:	fff00e93          	li	t4,-1
+    80003248:	03e00193          	li	gp,62
+    8000324c:	0dd09663          	bne	ra,t4,80003318 <fail>
+
+0000000080003250 <test_63>:
+    80003250:	00001097          	auipc	ra,0x1
+    80003254:	20008093          	addi	ra,ra,512 # 80004450 <tdat_d>
+    80003258:	0080b087          	fld	ft1,8(ra)
+    8000325c:	c210f0d3          	fcvt.wu.d	ra,ft1
+    80003260:	fff00e93          	li	t4,-1
+    80003264:	03f00193          	li	gp,63
+    80003268:	0bd09863          	bne	ra,t4,80003318 <fail>
+
+000000008000326c <test_64>:
+    8000326c:	00001097          	auipc	ra,0x1
+    80003270:	1e408093          	addi	ra,ra,484 # 80004450 <tdat_d>
+    80003274:	0100b087          	fld	ft1,16(ra)
+    80003278:	c210f0d3          	fcvt.wu.d	ra,ft1
+    8000327c:	00000e93          	li	t4,0
+    80003280:	04000193          	li	gp,64
+    80003284:	09d09a63          	bne	ra,t4,80003318 <fail>
+
+0000000080003288 <test_65>:
+    80003288:	00001097          	auipc	ra,0x1
+    8000328c:	1c808093          	addi	ra,ra,456 # 80004450 <tdat_d>
+    80003290:	0180b087          	fld	ft1,24(ra)
+    80003294:	c210f0d3          	fcvt.wu.d	ra,ft1
+    80003298:	fff00e93          	li	t4,-1
+    8000329c:	04100193          	li	gp,65
+    800032a0:	07d09c63          	bne	ra,t4,80003318 <fail>
+
+00000000800032a4 <test_66>:
+    800032a4:	00001097          	auipc	ra,0x1
+    800032a8:	1ac08093          	addi	ra,ra,428 # 80004450 <tdat_d>
+    800032ac:	0000b087          	fld	ft1,0(ra)
+    800032b0:	c230f0d3          	fcvt.lu.d	ra,ft1
+    800032b4:	fff00e93          	li	t4,-1
+    800032b8:	04200193          	li	gp,66
+    800032bc:	05d09e63          	bne	ra,t4,80003318 <fail>
+
+00000000800032c0 <test_67>:
+    800032c0:	00001097          	auipc	ra,0x1
+    800032c4:	19008093          	addi	ra,ra,400 # 80004450 <tdat_d>
+    800032c8:	0080b087          	fld	ft1,8(ra)
+    800032cc:	c230f0d3          	fcvt.lu.d	ra,ft1
+    800032d0:	fff00e93          	li	t4,-1
+    800032d4:	04300193          	li	gp,67
+    800032d8:	05d09063          	bne	ra,t4,80003318 <fail>
+
+00000000800032dc <test_68>:
+    800032dc:	00001097          	auipc	ra,0x1
+    800032e0:	17408093          	addi	ra,ra,372 # 80004450 <tdat_d>
+    800032e4:	0100b087          	fld	ft1,16(ra)
+    800032e8:	c230f0d3          	fcvt.lu.d	ra,ft1
+    800032ec:	00000e93          	li	t4,0
+    800032f0:	04400193          	li	gp,68
+    800032f4:	03d09263          	bne	ra,t4,80003318 <fail>
+
+00000000800032f8 <test_69>:
+    800032f8:	00001097          	auipc	ra,0x1
+    800032fc:	15808093          	addi	ra,ra,344 # 80004450 <tdat_d>
+    80003300:	0180b087          	fld	ft1,24(ra)
+    80003304:	c230f0d3          	fcvt.lu.d	ra,ft1
+    80003308:	fff00e93          	li	t4,-1
+    8000330c:	04500193          	li	gp,69
+    80003310:	01d09463          	bne	ra,t4,80003318 <fail>
+    80003314:	00301a63          	bne	zero,gp,80003328 <pass>
+
+0000000080003318 <fail>:
+    80003318:	00119513          	slli	a0,gp,0x1
+    8000331c:	00050063          	beqz	a0,8000331c <fail+0x4>
+    80003320:	00156513          	ori	a0,a0,1
+    80003324:	00000073          	ecall
+
+0000000080003328 <pass>:
+    80003328:	00100513          	li	a0,1
+    8000332c:	00000073          	ecall
+    80003330:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080004000 <test_2_data>:
+    80004000:	999a                	add	s3,s3,t1
+    80004002:	9999                	andi	a1,a1,-26
+    80004004:	9999                	andi	a1,a1,-26
+    80004006:	bff1                	j	80003fe2 <pass+0xcba>
+    80004008:	0000                	unimp
+    8000400a:	0000                	unimp
+    8000400c:	0000                	unimp
+    8000400e:	0000                	unimp
+    80004010:	0000                	unimp
+    80004012:	0000                	unimp
+    80004014:	0000                	unimp
+    80004016:	0000                	unimp
+    80004018:	ffff                	0xffff
+    8000401a:	ffff                	0xffff
+    8000401c:	ffff                	0xffff
+    8000401e:	ffff                	0xffff
+
+0000000080004020 <test_3_data>:
+    80004020:	0000                	unimp
+    80004022:	0000                	unimp
+    80004024:	0000                	unimp
+    80004026:	bff0                	fsd	fa2,248(a5)
+    80004028:	0000                	unimp
+    8000402a:	0000                	unimp
+    8000402c:	0000                	unimp
+    8000402e:	0000                	unimp
+    80004030:	0000                	unimp
+    80004032:	0000                	unimp
+    80004034:	0000                	unimp
+    80004036:	0000                	unimp
+    80004038:	ffff                	0xffff
+    8000403a:	ffff                	0xffff
+    8000403c:	ffff                	0xffff
+    8000403e:	ffff                	0xffff
+
+0000000080004040 <test_4_data>:
+    80004040:	cccd                	beqz	s1,800040fa <test_9_data+0x1a>
+    80004042:	cccc                	sw	a1,28(s1)
+    80004044:	cccc                	sw	a1,28(s1)
+    80004046:	bfec                	fsd	fa1,248(a5)
+    80004048:	0000                	unimp
+    8000404a:	0000                	unimp
+    8000404c:	0000                	unimp
+    8000404e:	0000                	unimp
+    80004050:	0000                	unimp
+    80004052:	0000                	unimp
+    80004054:	0000                	unimp
+    80004056:	0000                	unimp
+    80004058:	0000                	unimp
+    8000405a:	0000                	unimp
+    8000405c:	0000                	unimp
+    8000405e:	0000                	unimp
+
+0000000080004060 <test_5_data>:
+    80004060:	cccd                	beqz	s1,8000411a <test_12_data+0x1a>
+    80004062:	cccc                	sw	a1,28(s1)
+    80004064:	cccc                	sw	a1,28(s1)
+    80004066:	3fec                	fld	fa1,248(a5)
+    80004068:	0000                	unimp
+    8000406a:	0000                	unimp
+    8000406c:	0000                	unimp
+    8000406e:	0000                	unimp
+    80004070:	0000                	unimp
+    80004072:	0000                	unimp
+    80004074:	0000                	unimp
+    80004076:	0000                	unimp
+    80004078:	0000                	unimp
+    8000407a:	0000                	unimp
+    8000407c:	0000                	unimp
+    8000407e:	0000                	unimp
+
+0000000080004080 <test_6_data>:
+    80004080:	0000                	unimp
+    80004082:	0000                	unimp
+    80004084:	0000                	unimp
+    80004086:	3ff0                	fld	fa2,248(a5)
+    80004088:	0000                	unimp
+    8000408a:	0000                	unimp
+    8000408c:	0000                	unimp
+    8000408e:	0000                	unimp
+    80004090:	0000                	unimp
+    80004092:	0000                	unimp
+    80004094:	0000                	unimp
+    80004096:	0000                	unimp
+    80004098:	0001                	nop
+    8000409a:	0000                	unimp
+    8000409c:	0000                	unimp
+    8000409e:	0000                	unimp
+
+00000000800040a0 <test_7_data>:
+    800040a0:	999a                	add	s3,s3,t1
+    800040a2:	9999                	andi	a1,a1,-26
+    800040a4:	9999                	andi	a1,a1,-26
+    800040a6:	3ff1                	addiw	t6,t6,-4
+    800040a8:	0000                	unimp
+    800040aa:	0000                	unimp
+    800040ac:	0000                	unimp
+    800040ae:	0000                	unimp
+    800040b0:	0000                	unimp
+    800040b2:	0000                	unimp
+    800040b4:	0000                	unimp
+    800040b6:	0000                	unimp
+    800040b8:	0001                	nop
+    800040ba:	0000                	unimp
+    800040bc:	0000                	unimp
+    800040be:	0000                	unimp
+
+00000000800040c0 <test_8_data>:
+    800040c0:	0000                	unimp
+    800040c2:	c000                	sw	s0,0(s0)
+    800040c4:	c1e65a0b          	0xc1e65a0b
+    800040c8:	0000                	unimp
+    800040ca:	0000                	unimp
+    800040cc:	0000                	unimp
+    800040ce:	0000                	unimp
+    800040d0:	0000                	unimp
+    800040d2:	0000                	unimp
+    800040d4:	0000                	unimp
+    800040d6:	0000                	unimp
+    800040d8:	0000                	unimp
+    800040da:	8000                	0x8000
+    800040dc:	ffff                	0xffff
+    800040de:	ffff                	0xffff
+
+00000000800040e0 <test_9_data>:
+    800040e0:	0000                	unimp
+    800040e2:	c000                	sw	s0,0(s0)
+    800040e4:	41e65a0b          	0x41e65a0b
+    800040e8:	0000                	unimp
+    800040ea:	0000                	unimp
+    800040ec:	0000                	unimp
+    800040ee:	0000                	unimp
+    800040f0:	0000                	unimp
+    800040f2:	0000                	unimp
+    800040f4:	0000                	unimp
+    800040f6:	0000                	unimp
+    800040f8:	ffff                	0xffff
+    800040fa:	7fff                	0x7fff
+    800040fc:	0000                	unimp
+    800040fe:	0000                	unimp
+
+0000000080004100 <test_12_data>:
+    80004100:	0000                	unimp
+    80004102:	0000                	unimp
+    80004104:	0000                	unimp
+    80004106:	c008                	sw	a0,0(s0)
+    80004108:	0000                	unimp
+    8000410a:	0000                	unimp
+    8000410c:	0000                	unimp
+    8000410e:	0000                	unimp
+    80004110:	0000                	unimp
+    80004112:	0000                	unimp
+    80004114:	0000                	unimp
+    80004116:	0000                	unimp
+    80004118:	0000                	unimp
+    8000411a:	0000                	unimp
+    8000411c:	0000                	unimp
+    8000411e:	0000                	unimp
+
+0000000080004120 <test_13_data>:
+    80004120:	0000                	unimp
+    80004122:	0000                	unimp
+    80004124:	0000                	unimp
+    80004126:	bff0                	fsd	fa2,248(a5)
+    80004128:	0000                	unimp
+    8000412a:	0000                	unimp
+    8000412c:	0000                	unimp
+    8000412e:	0000                	unimp
+    80004130:	0000                	unimp
+    80004132:	0000                	unimp
+    80004134:	0000                	unimp
+    80004136:	0000                	unimp
+    80004138:	0000                	unimp
+    8000413a:	0000                	unimp
+    8000413c:	0000                	unimp
+    8000413e:	0000                	unimp
+
+0000000080004140 <test_14_data>:
+    80004140:	cccd                	beqz	s1,800041fa <test_19_data+0x1a>
+    80004142:	cccc                	sw	a1,28(s1)
+    80004144:	cccc                	sw	a1,28(s1)
+    80004146:	bfec                	fsd	fa1,248(a5)
+    80004148:	0000                	unimp
+    8000414a:	0000                	unimp
+    8000414c:	0000                	unimp
+    8000414e:	0000                	unimp
+    80004150:	0000                	unimp
+    80004152:	0000                	unimp
+    80004154:	0000                	unimp
+    80004156:	0000                	unimp
+    80004158:	0000                	unimp
+    8000415a:	0000                	unimp
+    8000415c:	0000                	unimp
+    8000415e:	0000                	unimp
+
+0000000080004160 <test_15_data>:
+    80004160:	cccd                	beqz	s1,8000421a <test_22_data+0x1a>
+    80004162:	cccc                	sw	a1,28(s1)
+    80004164:	cccc                	sw	a1,28(s1)
+    80004166:	3fec                	fld	fa1,248(a5)
+    80004168:	0000                	unimp
+    8000416a:	0000                	unimp
+    8000416c:	0000                	unimp
+    8000416e:	0000                	unimp
+    80004170:	0000                	unimp
+    80004172:	0000                	unimp
+    80004174:	0000                	unimp
+    80004176:	0000                	unimp
+    80004178:	0000                	unimp
+    8000417a:	0000                	unimp
+    8000417c:	0000                	unimp
+    8000417e:	0000                	unimp
+
+0000000080004180 <test_16_data>:
+    80004180:	0000                	unimp
+    80004182:	0000                	unimp
+    80004184:	0000                	unimp
+    80004186:	3ff0                	fld	fa2,248(a5)
+    80004188:	0000                	unimp
+    8000418a:	0000                	unimp
+    8000418c:	0000                	unimp
+    8000418e:	0000                	unimp
+    80004190:	0000                	unimp
+    80004192:	0000                	unimp
+    80004194:	0000                	unimp
+    80004196:	0000                	unimp
+    80004198:	0001                	nop
+    8000419a:	0000                	unimp
+    8000419c:	0000                	unimp
+    8000419e:	0000                	unimp
+
+00000000800041a0 <test_17_data>:
+    800041a0:	999a                	add	s3,s3,t1
+    800041a2:	9999                	andi	a1,a1,-26
+    800041a4:	9999                	andi	a1,a1,-26
+    800041a6:	3ff1                	addiw	t6,t6,-4
+    800041a8:	0000                	unimp
+    800041aa:	0000                	unimp
+    800041ac:	0000                	unimp
+    800041ae:	0000                	unimp
+    800041b0:	0000                	unimp
+    800041b2:	0000                	unimp
+    800041b4:	0000                	unimp
+    800041b6:	0000                	unimp
+    800041b8:	0001                	nop
+    800041ba:	0000                	unimp
+    800041bc:	0000                	unimp
+    800041be:	0000                	unimp
+
+00000000800041c0 <test_18_data>:
+    800041c0:	0000                	unimp
+    800041c2:	c000                	sw	s0,0(s0)
+    800041c4:	c1e65a0b          	0xc1e65a0b
+    800041c8:	0000                	unimp
+    800041ca:	0000                	unimp
+    800041cc:	0000                	unimp
+    800041ce:	0000                	unimp
+    800041d0:	0000                	unimp
+    800041d2:	0000                	unimp
+    800041d4:	0000                	unimp
+    800041d6:	0000                	unimp
+    800041d8:	0000                	unimp
+    800041da:	0000                	unimp
+    800041dc:	0000                	unimp
+    800041de:	0000                	unimp
+
+00000000800041e0 <test_19_data>:
+    800041e0:	0000                	unimp
+    800041e2:	c000                	sw	s0,0(s0)
+    800041e4:	41e65a0b          	0x41e65a0b
+    800041e8:	0000                	unimp
+    800041ea:	0000                	unimp
+    800041ec:	0000                	unimp
+    800041ee:	0000                	unimp
+    800041f0:	0000                	unimp
+    800041f2:	0000                	unimp
+    800041f4:	0000                	unimp
+    800041f6:	0000                	unimp
+    800041f8:	5e00                	lw	s0,56(a2)
+    800041fa:	b2d0                	fsd	fa2,160(a3)
+    800041fc:	ffff                	0xffff
+    800041fe:	ffff                	0xffff
+
+0000000080004200 <test_22_data>:
+    80004200:	999a                	add	s3,s3,t1
+    80004202:	9999                	andi	a1,a1,-26
+    80004204:	9999                	andi	a1,a1,-26
+    80004206:	bff1                	j	800041e2 <test_19_data+0x2>
+    80004208:	0000                	unimp
+    8000420a:	0000                	unimp
+    8000420c:	0000                	unimp
+    8000420e:	0000                	unimp
+    80004210:	0000                	unimp
+    80004212:	0000                	unimp
+    80004214:	0000                	unimp
+    80004216:	0000                	unimp
+    80004218:	ffff                	0xffff
+    8000421a:	ffff                	0xffff
+    8000421c:	ffff                	0xffff
+    8000421e:	ffff                	0xffff
+
+0000000080004220 <test_23_data>:
+    80004220:	0000                	unimp
+    80004222:	0000                	unimp
+    80004224:	0000                	unimp
+    80004226:	bff0                	fsd	fa2,248(a5)
+    80004228:	0000                	unimp
+    8000422a:	0000                	unimp
+    8000422c:	0000                	unimp
+    8000422e:	0000                	unimp
+    80004230:	0000                	unimp
+    80004232:	0000                	unimp
+    80004234:	0000                	unimp
+    80004236:	0000                	unimp
+    80004238:	ffff                	0xffff
+    8000423a:	ffff                	0xffff
+    8000423c:	ffff                	0xffff
+    8000423e:	ffff                	0xffff
+
+0000000080004240 <test_24_data>:
+    80004240:	cccd                	beqz	s1,800042fa <test_29_data+0x1a>
+    80004242:	cccc                	sw	a1,28(s1)
+    80004244:	cccc                	sw	a1,28(s1)
+    80004246:	bfec                	fsd	fa1,248(a5)
+    80004248:	0000                	unimp
+    8000424a:	0000                	unimp
+    8000424c:	0000                	unimp
+    8000424e:	0000                	unimp
+    80004250:	0000                	unimp
+    80004252:	0000                	unimp
+    80004254:	0000                	unimp
+    80004256:	0000                	unimp
+    80004258:	0000                	unimp
+    8000425a:	0000                	unimp
+    8000425c:	0000                	unimp
+    8000425e:	0000                	unimp
+
+0000000080004260 <test_25_data>:
+    80004260:	cccd                	beqz	s1,8000431a <test_20_data+0x1a>
+    80004262:	cccc                	sw	a1,28(s1)
+    80004264:	cccc                	sw	a1,28(s1)
+    80004266:	3fec                	fld	fa1,248(a5)
+    80004268:	0000                	unimp
+    8000426a:	0000                	unimp
+    8000426c:	0000                	unimp
+    8000426e:	0000                	unimp
+    80004270:	0000                	unimp
+    80004272:	0000                	unimp
+    80004274:	0000                	unimp
+    80004276:	0000                	unimp
+    80004278:	0000                	unimp
+    8000427a:	0000                	unimp
+    8000427c:	0000                	unimp
+    8000427e:	0000                	unimp
+
+0000000080004280 <test_26_data>:
+    80004280:	0000                	unimp
+    80004282:	0000                	unimp
+    80004284:	0000                	unimp
+    80004286:	3ff0                	fld	fa2,248(a5)
+    80004288:	0000                	unimp
+    8000428a:	0000                	unimp
+    8000428c:	0000                	unimp
+    8000428e:	0000                	unimp
+    80004290:	0000                	unimp
+    80004292:	0000                	unimp
+    80004294:	0000                	unimp
+    80004296:	0000                	unimp
+    80004298:	0001                	nop
+    8000429a:	0000                	unimp
+    8000429c:	0000                	unimp
+    8000429e:	0000                	unimp
+
+00000000800042a0 <test_27_data>:
+    800042a0:	999a                	add	s3,s3,t1
+    800042a2:	9999                	andi	a1,a1,-26
+    800042a4:	9999                	andi	a1,a1,-26
+    800042a6:	3ff1                	addiw	t6,t6,-4
+    800042a8:	0000                	unimp
+    800042aa:	0000                	unimp
+    800042ac:	0000                	unimp
+    800042ae:	0000                	unimp
+    800042b0:	0000                	unimp
+    800042b2:	0000                	unimp
+    800042b4:	0000                	unimp
+    800042b6:	0000                	unimp
+    800042b8:	0001                	nop
+    800042ba:	0000                	unimp
+    800042bc:	0000                	unimp
+    800042be:	0000                	unimp
+
+00000000800042c0 <test_28_data>:
+    800042c0:	0000                	unimp
+    800042c2:	c000                	sw	s0,0(s0)
+    800042c4:	c1e65a0b          	0xc1e65a0b
+    800042c8:	0000                	unimp
+    800042ca:	0000                	unimp
+    800042cc:	0000                	unimp
+    800042ce:	0000                	unimp
+    800042d0:	0000                	unimp
+    800042d2:	0000                	unimp
+    800042d4:	0000                	unimp
+    800042d6:	0000                	unimp
+    800042d8:	a200                	fsd	fs0,0(a2)
+    800042da:	ffff4d2f          	0xffff4d2f
+    800042de:	ffff                	0xffff
+
+00000000800042e0 <test_29_data>:
+    800042e0:	0000                	unimp
+    800042e2:	c000                	sw	s0,0(s0)
+    800042e4:	41e65a0b          	0x41e65a0b
+    800042e8:	0000                	unimp
+    800042ea:	0000                	unimp
+    800042ec:	0000                	unimp
+    800042ee:	0000                	unimp
+    800042f0:	0000                	unimp
+    800042f2:	0000                	unimp
+    800042f4:	0000                	unimp
+    800042f6:	0000                	unimp
+    800042f8:	5e00                	lw	s0,56(a2)
+    800042fa:	b2d0                	fsd	fa2,160(a3)
+    800042fc:	0000                	unimp
+    800042fe:	0000                	unimp
+
+0000000080004300 <test_20_data>:
+    80004300:	db80                	sw	s0,48(a5)
+    80004302:	90d9                	srli	s1,s1,0x36
+    80004304:	0556                	slli	a0,a0,0x15
+    80004306:	c3fa                	sw	t5,196(sp)
+    80004308:	0000                	unimp
+    8000430a:	0000                	unimp
+    8000430c:	0000                	unimp
+    8000430e:	0000                	unimp
+    80004310:	0000                	unimp
+    80004312:	0000                	unimp
+    80004314:	0000                	unimp
+    80004316:	0000                	unimp
+    80004318:	0000                	unimp
+    8000431a:	0000                	unimp
+    8000431c:	0000                	unimp
+    8000431e:	8000                	0x8000
+
+0000000080004320 <test_21_data>:
+    80004320:	db80                	sw	s0,48(a5)
+    80004322:	90d9                	srli	s1,s1,0x36
+    80004324:	0556                	slli	a0,a0,0x15
+    80004326:	43fa                	lw	t2,156(sp)
+    80004328:	0000                	unimp
+    8000432a:	0000                	unimp
+    8000432c:	0000                	unimp
+    8000432e:	0000                	unimp
+    80004330:	0000                	unimp
+    80004332:	0000                	unimp
+    80004334:	0000                	unimp
+    80004336:	0000                	unimp
+    80004338:	ffff                	0xffff
+    8000433a:	ffff                	0xffff
+    8000433c:	ffff                	0xffff
+    8000433e:	7fff                	0x7fff
+
+0000000080004340 <test_32_data>:
+    80004340:	0000                	unimp
+    80004342:	0000                	unimp
+    80004344:	0000                	unimp
+    80004346:	c008                	sw	a0,0(s0)
+    80004348:	0000                	unimp
+    8000434a:	0000                	unimp
+    8000434c:	0000                	unimp
+    8000434e:	0000                	unimp
+    80004350:	0000                	unimp
+    80004352:	0000                	unimp
+    80004354:	0000                	unimp
+    80004356:	0000                	unimp
+    80004358:	0000                	unimp
+    8000435a:	0000                	unimp
+    8000435c:	0000                	unimp
+    8000435e:	0000                	unimp
+
+0000000080004360 <test_33_data>:
+    80004360:	0000                	unimp
+    80004362:	0000                	unimp
+    80004364:	0000                	unimp
+    80004366:	bff0                	fsd	fa2,248(a5)
+    80004368:	0000                	unimp
+    8000436a:	0000                	unimp
+    8000436c:	0000                	unimp
+    8000436e:	0000                	unimp
+    80004370:	0000                	unimp
+    80004372:	0000                	unimp
+    80004374:	0000                	unimp
+    80004376:	0000                	unimp
+    80004378:	0000                	unimp
+    8000437a:	0000                	unimp
+    8000437c:	0000                	unimp
+    8000437e:	0000                	unimp
+
+0000000080004380 <test_34_data>:
+    80004380:	cccd                	beqz	s1,8000443a <test_39_data+0x1a>
+    80004382:	cccc                	sw	a1,28(s1)
+    80004384:	cccc                	sw	a1,28(s1)
+    80004386:	bfec                	fsd	fa1,248(a5)
+    80004388:	0000                	unimp
+    8000438a:	0000                	unimp
+    8000438c:	0000                	unimp
+    8000438e:	0000                	unimp
+    80004390:	0000                	unimp
+    80004392:	0000                	unimp
+    80004394:	0000                	unimp
+    80004396:	0000                	unimp
+    80004398:	0000                	unimp
+    8000439a:	0000                	unimp
+    8000439c:	0000                	unimp
+    8000439e:	0000                	unimp
+
+00000000800043a0 <test_35_data>:
+    800043a0:	cccd                	beqz	s1,8000445a <tdat_d+0xa>
+    800043a2:	cccc                	sw	a1,28(s1)
+    800043a4:	cccc                	sw	a1,28(s1)
+    800043a6:	3fec                	fld	fa1,248(a5)
+    800043a8:	0000                	unimp
+    800043aa:	0000                	unimp
+    800043ac:	0000                	unimp
+    800043ae:	0000                	unimp
+    800043b0:	0000                	unimp
+    800043b2:	0000                	unimp
+    800043b4:	0000                	unimp
+    800043b6:	0000                	unimp
+    800043b8:	0000                	unimp
+    800043ba:	0000                	unimp
+    800043bc:	0000                	unimp
+    800043be:	0000                	unimp
+
+00000000800043c0 <test_36_data>:
+    800043c0:	0000                	unimp
+    800043c2:	0000                	unimp
+    800043c4:	0000                	unimp
+    800043c6:	3ff0                	fld	fa2,248(a5)
+    800043c8:	0000                	unimp
+    800043ca:	0000                	unimp
+    800043cc:	0000                	unimp
+    800043ce:	0000                	unimp
+    800043d0:	0000                	unimp
+    800043d2:	0000                	unimp
+    800043d4:	0000                	unimp
+    800043d6:	0000                	unimp
+    800043d8:	0001                	nop
+    800043da:	0000                	unimp
+    800043dc:	0000                	unimp
+    800043de:	0000                	unimp
+
+00000000800043e0 <test_37_data>:
+    800043e0:	999a                	add	s3,s3,t1
+    800043e2:	9999                	andi	a1,a1,-26
+    800043e4:	9999                	andi	a1,a1,-26
+    800043e6:	3ff1                	addiw	t6,t6,-4
+    800043e8:	0000                	unimp
+    800043ea:	0000                	unimp
+    800043ec:	0000                	unimp
+    800043ee:	0000                	unimp
+    800043f0:	0000                	unimp
+    800043f2:	0000                	unimp
+    800043f4:	0000                	unimp
+    800043f6:	0000                	unimp
+    800043f8:	0001                	nop
+    800043fa:	0000                	unimp
+    800043fc:	0000                	unimp
+    800043fe:	0000                	unimp
+
+0000000080004400 <test_38_data>:
+    80004400:	0000                	unimp
+    80004402:	c000                	sw	s0,0(s0)
+    80004404:	c1e65a0b          	0xc1e65a0b
+    80004408:	0000                	unimp
+    8000440a:	0000                	unimp
+    8000440c:	0000                	unimp
+    8000440e:	0000                	unimp
+    80004410:	0000                	unimp
+    80004412:	0000                	unimp
+    80004414:	0000                	unimp
+    80004416:	0000                	unimp
+    80004418:	0000                	unimp
+    8000441a:	0000                	unimp
+    8000441c:	0000                	unimp
+    8000441e:	0000                	unimp
+
+0000000080004420 <test_39_data>:
+    80004420:	0000                	unimp
+    80004422:	c000                	sw	s0,0(s0)
+    80004424:	41e65a0b          	0x41e65a0b
+    80004428:	0000                	unimp
+    8000442a:	0000                	unimp
+    8000442c:	0000                	unimp
+    8000442e:	0000                	unimp
+    80004430:	0000                	unimp
+    80004432:	0000                	unimp
+    80004434:	0000                	unimp
+    80004436:	0000                	unimp
+    80004438:	5e00                	lw	s0,56(a2)
+    8000443a:	b2d0                	fsd	fa2,160(a3)
+    8000443c:	0000                	unimp
+    8000443e:	0000                	unimp
+
+0000000080004440 <begin_signature>:
+    80004440:	ffff                	0xffff
+    80004442:	ffff                	0xffff
+    80004444:	ffff                	0xffff
+    80004446:	7fff                	0x7fff
+    80004448:	0000                	unimp
+    8000444a:	ff80                	sd	s0,56(a5)
+    8000444c:	0000                	unimp
+    8000444e:	7f80                	ld	s0,56(a5)
+
+0000000080004450 <tdat_d>:
+    80004450:	ffff                	0xffff
+    80004452:	ffff                	0xffff
+    80004454:	ffff                	0xffff
+    80004456:	ffff                	0xffff
+    80004458:	ffff                	0xffff
+    8000445a:	ffff                	0xffff
+    8000445c:	ffff                	0xffff
+    8000445e:	7fff                	0x7fff
+    80004460:	0000                	unimp
+    80004462:	0000                	unimp
+    80004464:	0000                	unimp
+    80004466:	fff0                	sd	a2,248(a5)
+    80004468:	0000                	unimp
+    8000446a:	0000                	unimp
+    8000446c:	0000                	unimp
+    8000446e:	7ff0                	ld	a2,248(a5)
diff --git a/test/riscv-tests/rv64ud-v-fcvt_w.elf b/test/riscv-tests/rv64ud-v-fcvt_w.elf
new file mode 100644
index 0000000..ccda038
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fcvt_w.elf
diff --git a/test/riscv-tests/rv64ud-v-fdiv.dump b/test/riscv-tests/rv64ud-v-fdiv.dump
new file mode 100644
index 0000000..d5227c0
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fdiv.dump
@@ -0,0 +1,1096 @@
+
+rv64ud-v-fdiv:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	83868693          	addi	a3,a3,-1992 # 80002c90 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	86c60613          	addi	a2,a2,-1940 # 80002d20 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	83460613          	addi	a2,a2,-1996 # 80002d38 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	78468693          	addi	a3,a3,1924 # 80002cd8 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	7a068693          	addi	a3,a3,1952 # 80002e10 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	72060613          	addi	a2,a2,1824 # 80002de8 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	65468693          	addi	a3,a3,1620 # 80002e40 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	57468693          	addi	a3,a3,1396 # 80002db0 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	50468693          	addi	a3,a3,1284 # 80002d78 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	03c00793          	li	a5,60
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0f8327b7          	lui	a5,0xf832
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	e2178793          	addi	a5,a5,-479 # f831e21 <_start-0x707ce1df>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    80002aec:	e2018553          	fmv.x.d	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00100613          	li	a2,1
+    80002af8:	16d51c63          	bne	a0,a3,80002c70 <fail>
+    80002afc:	16c59a63          	bne	a1,a2,80002c70 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	51c50513          	addi	a0,a0,1308 # 80003020 <test_3_data>
+    80002b0c:	00053007          	fld	ft0,0(a0)
+    80002b10:	00853087          	fld	ft1,8(a0)
+    80002b14:	01053107          	fld	ft2,16(a0)
+    80002b18:	01853683          	ld	a3,24(a0)
+    80002b1c:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    80002b20:	e2018553          	fmv.x.d	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	14d51263          	bne	a0,a3,80002c70 <fail>
+    80002b30:	14c59063          	bne	a1,a2,80002c70 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	50850513          	addi	a0,a0,1288 # 80003040 <test_4_data>
+    80002b40:	00053007          	fld	ft0,0(a0)
+    80002b44:	00853087          	fld	ft1,8(a0)
+    80002b48:	01053107          	fld	ft2,16(a0)
+    80002b4c:	01853683          	ld	a3,24(a0)
+    80002b50:	1a1071d3          	fdiv.d	ft3,ft0,ft1
+    80002b54:	e2018553          	fmv.x.d	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	10d51863          	bne	a0,a3,80002c70 <fail>
+    80002b64:	10c59663          	bne	a1,a2,80002c70 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4f450513          	addi	a0,a0,1268 # 80003060 <test_5_data>
+    80002b74:	00053007          	fld	ft0,0(a0)
+    80002b78:	00853087          	fld	ft1,8(a0)
+    80002b7c:	01053107          	fld	ft2,16(a0)
+    80002b80:	01853683          	ld	a3,24(a0)
+    80002b84:	5a0071d3          	fsqrt.d	ft3,ft0
+    80002b88:	e2018553          	fmv.x.d	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00100613          	li	a2,1
+    80002b94:	0cd51e63          	bne	a0,a3,80002c70 <fail>
+    80002b98:	0cc59c63          	bne	a1,a2,80002c70 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4e050513          	addi	a0,a0,1248 # 80003080 <test_6_data>
+    80002ba8:	00053007          	fld	ft0,0(a0)
+    80002bac:	00853087          	fld	ft1,8(a0)
+    80002bb0:	01053107          	fld	ft2,16(a0)
+    80002bb4:	01853683          	ld	a3,24(a0)
+    80002bb8:	5a0071d3          	fsqrt.d	ft3,ft0
+    80002bbc:	e2018553          	fmv.x.d	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00000613          	li	a2,0
+    80002bc8:	0ad51463          	bne	a0,a3,80002c70 <fail>
+    80002bcc:	0ac59263          	bne	a1,a2,80002c70 <fail>
+
+0000000080002bd0 <test_16>:
+    80002bd0:	01000193          	li	gp,16
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	4cc50513          	addi	a0,a0,1228 # 800030a0 <test_16_data>
+    80002bdc:	00053007          	fld	ft0,0(a0)
+    80002be0:	00853087          	fld	ft1,8(a0)
+    80002be4:	01053107          	fld	ft2,16(a0)
+    80002be8:	01853683          	ld	a3,24(a0)
+    80002bec:	5a0071d3          	fsqrt.d	ft3,ft0
+    80002bf0:	e2018553          	fmv.x.d	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	01000613          	li	a2,16
+    80002bfc:	06d51a63          	bne	a0,a3,80002c70 <fail>
+    80002c00:	06c59863          	bne	a1,a2,80002c70 <fail>
+
+0000000080002c04 <test_7>:
+    80002c04:	00700193          	li	gp,7
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	4b850513          	addi	a0,a0,1208 # 800030c0 <test_7_data>
+    80002c10:	00053007          	fld	ft0,0(a0)
+    80002c14:	00853087          	fld	ft1,8(a0)
+    80002c18:	01053107          	fld	ft2,16(a0)
+    80002c1c:	01853683          	ld	a3,24(a0)
+    80002c20:	5a0071d3          	fsqrt.d	ft3,ft0
+    80002c24:	e2018553          	fmv.x.d	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00100613          	li	a2,1
+    80002c30:	04d51063          	bne	a0,a3,80002c70 <fail>
+    80002c34:	02c59e63          	bne	a1,a2,80002c70 <fail>
+
+0000000080002c38 <test_8>:
+    80002c38:	00800193          	li	gp,8
+    80002c3c:	00000517          	auipc	a0,0x0
+    80002c40:	4a450513          	addi	a0,a0,1188 # 800030e0 <test_8_data>
+    80002c44:	00053007          	fld	ft0,0(a0)
+    80002c48:	00853087          	fld	ft1,8(a0)
+    80002c4c:	01053107          	fld	ft2,16(a0)
+    80002c50:	01853683          	ld	a3,24(a0)
+    80002c54:	5a0071d3          	fsqrt.d	ft3,ft0
+    80002c58:	e2018553          	fmv.x.d	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00100613          	li	a2,1
+    80002c64:	00d51663          	bne	a0,a3,80002c70 <fail>
+    80002c68:	00c59463          	bne	a1,a2,80002c70 <fail>
+    80002c6c:	00301a63          	bne	zero,gp,80002c80 <pass>
+
+0000000080002c70 <fail>:
+    80002c70:	00119513          	slli	a0,gp,0x1
+    80002c74:	00050063          	beqz	a0,80002c74 <fail+0x4>
+    80002c78:	00156513          	ori	a0,a0,1
+    80002c7c:	00000073          	ecall
+
+0000000080002c80 <pass>:
+    80002c80:	00100513          	li	a0,1
+    80002c84:	00000073          	ecall
+    80002c88:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	d4f1                	beqz	s1,80002fcc <pass+0x34c>
+    80003002:	53c8                	lw	a0,36(a5)
+    80003004:	400921fb          	0x400921fb
+    80003008:	b0dd                	j	800028ee <vm_boot+0x1a>
+    8000300a:	89f1                	andi	a1,a1,28
+    8000300c:	bf0a                	fsd	ft2,440(sp)
+    8000300e:	4005                	c.li	zero,1
+    80003010:	0000                	unimp
+    80003012:	0000                	unimp
+    80003014:	0000                	unimp
+    80003016:	0000                	unimp
+    80003018:	83ec                	0x83ec
+    8000301a:	7ddbf6c3          	0x7ddbf6c3
+    8000301e:	3ff2                	fld	ft11,312(sp)
+
+0000000080003020 <test_3_data>:
+    80003020:	0000                	unimp
+    80003022:	0000                	unimp
+    80003024:	4800                	lw	s0,16(s0)
+    80003026:	6666c093          	xori	ra,a3,1638
+    8000302a:	6666                	ld	a2,88(sp)
+    8000302c:	4c66                	lw	s8,88(sp)
+    8000302e:	00004093          	xori	ra,zero,0
+    80003032:	0000                	unimp
+    80003034:	0000                	unimp
+    80003036:	0000                	unimp
+    80003038:	29a5                	addiw	s3,s3,9
+    8000303a:	3e19                	addiw	t3,t3,-26
+    8000303c:	f8b4                	sd	a3,112(s1)
+    8000303e:	          	jal	t6,7ff1ed8c <_start-0xe1274>
+
+0000000080003040 <test_4_data>:
+    80003040:	d4f1                	beqz	s1,8000300c <test_2_data+0xc>
+    80003042:	53c8                	lw	a0,36(a5)
+    80003044:	400921fb          	0x400921fb
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	0000                	unimp
+    8000304e:	3ff0                	fld	fa2,248(a5)
+    80003050:	0000                	unimp
+    80003052:	0000                	unimp
+    80003054:	0000                	unimp
+    80003056:	0000                	unimp
+    80003058:	d4f1                	beqz	s1,80003024 <test_3_data+0x4>
+    8000305a:	53c8                	lw	a0,36(a5)
+    8000305c:	400921fb          	0x400921fb
+
+0000000080003060 <test_5_data>:
+    80003060:	d4f1                	beqz	s1,8000302c <test_3_data+0xc>
+    80003062:	53c8                	lw	a0,36(a5)
+    80003064:	400921fb          	0x400921fb
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	0000                	unimp
+    80003070:	0000                	unimp
+    80003072:	0000                	unimp
+    80003074:	0000                	unimp
+    80003076:	0000                	unimp
+    80003078:	916f587b          	0x916f587b
+    8000307c:	5bf8                	lw	a4,116(a5)
+    8000307e:	3ffc                	fld	fa5,248(a5)
+
+0000000080003080 <test_6_data>:
+    80003080:	0000                	unimp
+    80003082:	0000                	unimp
+    80003084:	8800                	0x8800
+    80003086:	000040c3          	fmadd.s	ft1,ft0,ft0,ft0,rmm
+    8000308a:	0000                	unimp
+    8000308c:	0000                	unimp
+    8000308e:	0000                	unimp
+    80003090:	0000                	unimp
+    80003092:	0000                	unimp
+    80003094:	0000                	unimp
+    80003096:	0000                	unimp
+    80003098:	0000                	unimp
+    8000309a:	0000                	unimp
+    8000309c:	0000                	unimp
+    8000309e:	4059                	c.li	zero,22
+
+00000000800030a0 <test_16_data>:
+    800030a0:	0000                	unimp
+    800030a2:	0000                	unimp
+    800030a4:	0000                	unimp
+    800030a6:	bff0                	fsd	fa2,248(a5)
+    800030a8:	0000                	unimp
+    800030aa:	0000                	unimp
+    800030ac:	0000                	unimp
+    800030ae:	0000                	unimp
+    800030b0:	0000                	unimp
+    800030b2:	0000                	unimp
+    800030b4:	0000                	unimp
+    800030b6:	0000                	unimp
+    800030b8:	0000                	unimp
+    800030ba:	0000                	unimp
+    800030bc:	0000                	unimp
+    800030be:	7ff8                	ld	a4,248(a5)
+
+00000000800030c0 <test_7_data>:
+    800030c0:	0000                	unimp
+    800030c2:	0000                	unimp
+    800030c4:	6000                	ld	s0,0(s0)
+    800030c6:	4065                	c.li	zero,25
+    800030c8:	0000                	unimp
+    800030ca:	0000                	unimp
+    800030cc:	0000                	unimp
+    800030ce:	0000                	unimp
+    800030d0:	0000                	unimp
+    800030d2:	0000                	unimp
+    800030d4:	0000                	unimp
+    800030d6:	0000                	unimp
+    800030d8:	74f5                	lui	s1,0xffffd
+    800030da:	ce96                	sw	t0,92(sp)
+    800030dc:	2744                	fld	fs1,136(a4)
+    800030de:	402a                	0x402a
+
+00000000800030e0 <test_8_data>:
+    800030e0:	a105                	j	80003500 <begin_signature+0x400>
+    800030e2:	c70a                	sw	sp,140(sp)
+    800030e4:	94df 3e85 0000      	0x3e8594df
+    800030ea:	0000                	unimp
+    800030ec:	0000                	unimp
+    800030ee:	0000                	unimp
+    800030f0:	0000                	unimp
+    800030f2:	0000                	unimp
+    800030f4:	0000                	unimp
+    800030f6:	0000                	unimp
+    800030f8:	7f99                	lui	t6,0xfffe6
+    800030fa:	4789c0e3          	blt	s3,s8,80003d5a <begin_signature+0xc5a>
+    800030fe:	3f3a                	fld	ft10,424(sp)
diff --git a/test/riscv-tests/rv64ud-v-fdiv.elf b/test/riscv-tests/rv64ud-v-fdiv.elf
new file mode 100644
index 0000000..cc37abf
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fdiv.elf
diff --git a/test/riscv-tests/rv64ud-v-fmadd.dump b/test/riscv-tests/rv64ud-v-fmadd.dump
new file mode 100644
index 0000000..dd5409f
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fmadd.dump
@@ -0,0 +1,1236 @@
+
+rv64ud-v-fmadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	90868693          	addi	a3,a3,-1784 # 80002d60 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	93c60613          	addi	a2,a2,-1732 # 80002df0 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	90460613          	addi	a2,a2,-1788 # 80002e08 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	85468693          	addi	a3,a3,-1964 # 80002da8 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	87068693          	addi	a3,a3,-1936 # 80002ee0 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	7f060613          	addi	a2,a2,2032 # 80002eb8 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	72468693          	addi	a3,a3,1828 # 80002f10 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	64468693          	addi	a3,a3,1604 # 80002e80 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	5d468693          	addi	a3,a3,1492 # 80002e48 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	02600793          	li	a5,38
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	08dc47b7          	lui	a5,0x8dc4
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	2d678793          	addi	a5,a5,726 # 8dc42d6 <_start-0x7723bd2a>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    80002aec:	e2018553          	fmv.x.d	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	24d51463          	bne	a0,a3,80002d40 <fail>
+    80002afc:	24c59263          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	51c50513          	addi	a0,a0,1308 # 80003020 <test_3_data>
+    80002b0c:	00053007          	fld	ft0,0(a0)
+    80002b10:	00853087          	fld	ft1,8(a0)
+    80002b14:	01053107          	fld	ft2,16(a0)
+    80002b18:	01853683          	ld	a3,24(a0)
+    80002b1c:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    80002b20:	e2018553          	fmv.x.d	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	20d51a63          	bne	a0,a3,80002d40 <fail>
+    80002b30:	20c59863          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	50850513          	addi	a0,a0,1288 # 80003040 <test_4_data>
+    80002b40:	00053007          	fld	ft0,0(a0)
+    80002b44:	00853087          	fld	ft1,8(a0)
+    80002b48:	01053107          	fld	ft2,16(a0)
+    80002b4c:	01853683          	ld	a3,24(a0)
+    80002b50:	121071c3          	fmadd.d	ft3,ft0,ft1,ft2
+    80002b54:	e2018553          	fmv.x.d	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	1ed51063          	bne	a0,a3,80002d40 <fail>
+    80002b64:	1cc59e63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4f450513          	addi	a0,a0,1268 # 80003060 <test_5_data>
+    80002b74:	00053007          	fld	ft0,0(a0)
+    80002b78:	00853087          	fld	ft1,8(a0)
+    80002b7c:	01053107          	fld	ft2,16(a0)
+    80002b80:	01853683          	ld	a3,24(a0)
+    80002b84:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    80002b88:	e2018553          	fmv.x.d	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	1ad51663          	bne	a0,a3,80002d40 <fail>
+    80002b98:	1ac59463          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4e050513          	addi	a0,a0,1248 # 80003080 <test_6_data>
+    80002ba8:	00053007          	fld	ft0,0(a0)
+    80002bac:	00853087          	fld	ft1,8(a0)
+    80002bb0:	01053107          	fld	ft2,16(a0)
+    80002bb4:	01853683          	ld	a3,24(a0)
+    80002bb8:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    80002bbc:	e2018553          	fmv.x.d	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00100613          	li	a2,1
+    80002bc8:	16d51c63          	bne	a0,a3,80002d40 <fail>
+    80002bcc:	16c59a63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	4cc50513          	addi	a0,a0,1228 # 800030a0 <test_7_data>
+    80002bdc:	00053007          	fld	ft0,0(a0)
+    80002be0:	00853087          	fld	ft1,8(a0)
+    80002be4:	01053107          	fld	ft2,16(a0)
+    80002be8:	01853683          	ld	a3,24(a0)
+    80002bec:	121071cf          	fnmadd.d	ft3,ft0,ft1,ft2
+    80002bf0:	e2018553          	fmv.x.d	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00000613          	li	a2,0
+    80002bfc:	14d51263          	bne	a0,a3,80002d40 <fail>
+    80002c00:	14c59063          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c04 <test_8>:
+    80002c04:	00800193          	li	gp,8
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	4b850513          	addi	a0,a0,1208 # 800030c0 <test_8_data>
+    80002c10:	00053007          	fld	ft0,0(a0)
+    80002c14:	00853087          	fld	ft1,8(a0)
+    80002c18:	01053107          	fld	ft2,16(a0)
+    80002c1c:	01853683          	ld	a3,24(a0)
+    80002c20:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    80002c24:	e2018553          	fmv.x.d	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	10d51863          	bne	a0,a3,80002d40 <fail>
+    80002c34:	10c59663          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c38 <test_9>:
+    80002c38:	00900193          	li	gp,9
+    80002c3c:	00000517          	auipc	a0,0x0
+    80002c40:	4a450513          	addi	a0,a0,1188 # 800030e0 <test_9_data>
+    80002c44:	00053007          	fld	ft0,0(a0)
+    80002c48:	00853087          	fld	ft1,8(a0)
+    80002c4c:	01053107          	fld	ft2,16(a0)
+    80002c50:	01853683          	ld	a3,24(a0)
+    80002c54:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    80002c58:	e2018553          	fmv.x.d	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00100613          	li	a2,1
+    80002c64:	0cd51e63          	bne	a0,a3,80002d40 <fail>
+    80002c68:	0cc59c63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c6c <test_10>:
+    80002c6c:	00a00193          	li	gp,10
+    80002c70:	00000517          	auipc	a0,0x0
+    80002c74:	49050513          	addi	a0,a0,1168 # 80003100 <test_10_data>
+    80002c78:	00053007          	fld	ft0,0(a0)
+    80002c7c:	00853087          	fld	ft1,8(a0)
+    80002c80:	01053107          	fld	ft2,16(a0)
+    80002c84:	01853683          	ld	a3,24(a0)
+    80002c88:	121071c7          	fmsub.d	ft3,ft0,ft1,ft2
+    80002c8c:	e2018553          	fmv.x.d	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00000613          	li	a2,0
+    80002c98:	0ad51463          	bne	a0,a3,80002d40 <fail>
+    80002c9c:	0ac59263          	bne	a1,a2,80002d40 <fail>
+
+0000000080002ca0 <test_11>:
+    80002ca0:	00b00193          	li	gp,11
+    80002ca4:	00000517          	auipc	a0,0x0
+    80002ca8:	47c50513          	addi	a0,a0,1148 # 80003120 <test_11_data>
+    80002cac:	00053007          	fld	ft0,0(a0)
+    80002cb0:	00853087          	fld	ft1,8(a0)
+    80002cb4:	01053107          	fld	ft2,16(a0)
+    80002cb8:	01853683          	ld	a3,24(a0)
+    80002cbc:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    80002cc0:	e2018553          	fmv.x.d	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	00000613          	li	a2,0
+    80002ccc:	06d51a63          	bne	a0,a3,80002d40 <fail>
+    80002cd0:	06c59863          	bne	a1,a2,80002d40 <fail>
+
+0000000080002cd4 <test_12>:
+    80002cd4:	00c00193          	li	gp,12
+    80002cd8:	00000517          	auipc	a0,0x0
+    80002cdc:	46850513          	addi	a0,a0,1128 # 80003140 <test_12_data>
+    80002ce0:	00053007          	fld	ft0,0(a0)
+    80002ce4:	00853087          	fld	ft1,8(a0)
+    80002ce8:	01053107          	fld	ft2,16(a0)
+    80002cec:	01853683          	ld	a3,24(a0)
+    80002cf0:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    80002cf4:	e2018553          	fmv.x.d	a0,ft3
+    80002cf8:	001015f3          	fsflags	a1,zero
+    80002cfc:	00100613          	li	a2,1
+    80002d00:	04d51063          	bne	a0,a3,80002d40 <fail>
+    80002d04:	02c59e63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002d08 <test_13>:
+    80002d08:	00d00193          	li	gp,13
+    80002d0c:	00000517          	auipc	a0,0x0
+    80002d10:	45450513          	addi	a0,a0,1108 # 80003160 <test_13_data>
+    80002d14:	00053007          	fld	ft0,0(a0)
+    80002d18:	00853087          	fld	ft1,8(a0)
+    80002d1c:	01053107          	fld	ft2,16(a0)
+    80002d20:	01853683          	ld	a3,24(a0)
+    80002d24:	121071cb          	fnmsub.d	ft3,ft0,ft1,ft2
+    80002d28:	e2018553          	fmv.x.d	a0,ft3
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	00d51663          	bne	a0,a3,80002d40 <fail>
+    80002d38:	00c59463          	bne	a1,a2,80002d40 <fail>
+    80002d3c:	00301a63          	bne	zero,gp,80002d50 <pass>
+
+0000000080002d40 <fail>:
+    80002d40:	00119513          	slli	a0,gp,0x1
+    80002d44:	00050063          	beqz	a0,80002d44 <fail+0x4>
+    80002d48:	00156513          	ori	a0,a0,1
+    80002d4c:	00000073          	ecall
+
+0000000080002d50 <pass>:
+    80002d50:	00100513          	li	a0,1
+    80002d54:	00000073          	ecall
+    80002d58:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	0000                	unimp
+    80003004:	0000                	unimp
+    80003006:	3ff0                	fld	fa2,248(a5)
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	0000                	unimp
+    8000300e:	4004                	lw	s1,0(s0)
+    80003010:	0000                	unimp
+    80003012:	0000                	unimp
+    80003014:	0000                	unimp
+    80003016:	3ff0                	fld	fa2,248(a5)
+    80003018:	0000                	unimp
+    8000301a:	0000                	unimp
+    8000301c:	0000                	unimp
+    8000301e:	400c                	lw	a1,0(s0)
+
+0000000080003020 <test_3_data>:
+    80003020:	0000                	unimp
+    80003022:	0000                	unimp
+    80003024:	0000                	unimp
+    80003026:	bff0                	fsd	fa2,248(a5)
+    80003028:	6666                	ld	a2,88(sp)
+    8000302a:	6666                	ld	a2,88(sp)
+    8000302c:	4c66                	lw	s8,88(sp)
+    8000302e:	999ac093          	xori	ra,s5,-1639
+    80003032:	9999                	andi	a1,a1,-26
+    80003034:	9999                	andi	a1,a1,-26
+    80003036:	3ff1                	addiw	t6,t6,-4
+    80003038:	cccc                	sw	a1,28(s1)
+    8000303a:	cccc                	sw	a1,28(s1)
+    8000303c:	50cc                	lw	a1,36(s1)
+    8000303e:	          	xori	ra,zero,0
+
+0000000080003040 <test_4_data>:
+    80003040:	0000                	unimp
+    80003042:	0000                	unimp
+    80003044:	0000                	unimp
+    80003046:	4000                	lw	s0,0(s0)
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	0000                	unimp
+    8000304e:	c014                	sw	a3,0(s0)
+    80003050:	0000                	unimp
+    80003052:	0000                	unimp
+    80003054:	0000                	unimp
+    80003056:	c000                	sw	s0,0(s0)
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	0000                	unimp
+    8000305e:	c028                	sw	a0,64(s0)
+
+0000000080003060 <test_5_data>:
+    80003060:	0000                	unimp
+    80003062:	0000                	unimp
+    80003064:	0000                	unimp
+    80003066:	3ff0                	fld	fa2,248(a5)
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	4004                	lw	s1,0(s0)
+    80003070:	0000                	unimp
+    80003072:	0000                	unimp
+    80003074:	0000                	unimp
+    80003076:	3ff0                	fld	fa2,248(a5)
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	0000                	unimp
+    8000307e:	c00c                	sw	a1,0(s0)
+
+0000000080003080 <test_6_data>:
+    80003080:	0000                	unimp
+    80003082:	0000                	unimp
+    80003084:	0000                	unimp
+    80003086:	bff0                	fsd	fa2,248(a5)
+    80003088:	6666                	ld	a2,88(sp)
+    8000308a:	6666                	ld	a2,88(sp)
+    8000308c:	4c66                	lw	s8,88(sp)
+    8000308e:	999ac093          	xori	ra,s5,-1639
+    80003092:	9999                	andi	a1,a1,-26
+    80003094:	9999                	andi	a1,a1,-26
+    80003096:	3ff1                	addiw	t6,t6,-4
+    80003098:	cccc                	sw	a1,28(s1)
+    8000309a:	cccc                	sw	a1,28(s1)
+    8000309c:	50cc                	lw	a1,36(s1)
+    8000309e:	          	xori	ra,ra,0
+
+00000000800030a0 <test_7_data>:
+    800030a0:	0000                	unimp
+    800030a2:	0000                	unimp
+    800030a4:	0000                	unimp
+    800030a6:	4000                	lw	s0,0(s0)
+    800030a8:	0000                	unimp
+    800030aa:	0000                	unimp
+    800030ac:	0000                	unimp
+    800030ae:	c014                	sw	a3,0(s0)
+    800030b0:	0000                	unimp
+    800030b2:	0000                	unimp
+    800030b4:	0000                	unimp
+    800030b6:	c000                	sw	s0,0(s0)
+    800030b8:	0000                	unimp
+    800030ba:	0000                	unimp
+    800030bc:	0000                	unimp
+    800030be:	4028                	lw	a0,64(s0)
+
+00000000800030c0 <test_8_data>:
+    800030c0:	0000                	unimp
+    800030c2:	0000                	unimp
+    800030c4:	0000                	unimp
+    800030c6:	3ff0                	fld	fa2,248(a5)
+    800030c8:	0000                	unimp
+    800030ca:	0000                	unimp
+    800030cc:	0000                	unimp
+    800030ce:	4004                	lw	s1,0(s0)
+    800030d0:	0000                	unimp
+    800030d2:	0000                	unimp
+    800030d4:	0000                	unimp
+    800030d6:	3ff0                	fld	fa2,248(a5)
+    800030d8:	0000                	unimp
+    800030da:	0000                	unimp
+    800030dc:	0000                	unimp
+    800030de:	3ff8                	fld	fa4,248(a5)
+
+00000000800030e0 <test_9_data>:
+    800030e0:	0000                	unimp
+    800030e2:	0000                	unimp
+    800030e4:	0000                	unimp
+    800030e6:	bff0                	fsd	fa2,248(a5)
+    800030e8:	6666                	ld	a2,88(sp)
+    800030ea:	6666                	ld	a2,88(sp)
+    800030ec:	4c66                	lw	s8,88(sp)
+    800030ee:	999ac093          	xori	ra,s5,-1639
+    800030f2:	9999                	andi	a1,a1,-26
+    800030f4:	9999                	andi	a1,a1,-26
+    800030f6:	3ff1                	addiw	t6,t6,-4
+    800030f8:	0000                	unimp
+    800030fa:	0000                	unimp
+    800030fc:	4800                	lw	s0,16(s0)
+    800030fe:	          	xori	ra,zero,0
+
+0000000080003100 <test_10_data>:
+    80003100:	0000                	unimp
+    80003102:	0000                	unimp
+    80003104:	0000                	unimp
+    80003106:	4000                	lw	s0,0(s0)
+    80003108:	0000                	unimp
+    8000310a:	0000                	unimp
+    8000310c:	0000                	unimp
+    8000310e:	c014                	sw	a3,0(s0)
+    80003110:	0000                	unimp
+    80003112:	0000                	unimp
+    80003114:	0000                	unimp
+    80003116:	c000                	sw	s0,0(s0)
+    80003118:	0000                	unimp
+    8000311a:	0000                	unimp
+    8000311c:	0000                	unimp
+    8000311e:	c020                	sw	s0,64(s0)
+
+0000000080003120 <test_11_data>:
+    80003120:	0000                	unimp
+    80003122:	0000                	unimp
+    80003124:	0000                	unimp
+    80003126:	3ff0                	fld	fa2,248(a5)
+    80003128:	0000                	unimp
+    8000312a:	0000                	unimp
+    8000312c:	0000                	unimp
+    8000312e:	4004                	lw	s1,0(s0)
+    80003130:	0000                	unimp
+    80003132:	0000                	unimp
+    80003134:	0000                	unimp
+    80003136:	3ff0                	fld	fa2,248(a5)
+    80003138:	0000                	unimp
+    8000313a:	0000                	unimp
+    8000313c:	0000                	unimp
+    8000313e:	bff8                	fsd	fa4,248(a5)
+
+0000000080003140 <test_12_data>:
+    80003140:	0000                	unimp
+    80003142:	0000                	unimp
+    80003144:	0000                	unimp
+    80003146:	bff0                	fsd	fa2,248(a5)
+    80003148:	6666                	ld	a2,88(sp)
+    8000314a:	6666                	ld	a2,88(sp)
+    8000314c:	4c66                	lw	s8,88(sp)
+    8000314e:	999ac093          	xori	ra,s5,-1639
+    80003152:	9999                	andi	a1,a1,-26
+    80003154:	9999                	andi	a1,a1,-26
+    80003156:	3ff1                	addiw	t6,t6,-4
+    80003158:	0000                	unimp
+    8000315a:	0000                	unimp
+    8000315c:	4800                	lw	s0,16(s0)
+    8000315e:	          	xori	ra,ra,0
+
+0000000080003160 <test_13_data>:
+    80003160:	0000                	unimp
+    80003162:	0000                	unimp
+    80003164:	0000                	unimp
+    80003166:	4000                	lw	s0,0(s0)
+    80003168:	0000                	unimp
+    8000316a:	0000                	unimp
+    8000316c:	0000                	unimp
+    8000316e:	c014                	sw	a3,0(s0)
+    80003170:	0000                	unimp
+    80003172:	0000                	unimp
+    80003174:	0000                	unimp
+    80003176:	c000                	sw	s0,0(s0)
+    80003178:	0000                	unimp
+    8000317a:	0000                	unimp
+    8000317c:	0000                	unimp
+    8000317e:	4020                	lw	s0,64(s0)
diff --git a/test/riscv-tests/rv64ud-v-fmadd.elf b/test/riscv-tests/rv64ud-v-fmadd.elf
new file mode 100644
index 0000000..4394e02
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fmadd.elf
diff --git a/test/riscv-tests/rv64ud-v-fmin.dump b/test/riscv-tests/rv64ud-v-fmin.dump
new file mode 100644
index 0000000..1884f2f
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fmin.dump
@@ -0,0 +1,1429 @@
+
+rv64ud-v-fmin:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	0000a117          	auipc	sp,0xa
+    8000001c:	6b810113          	addi	sp,sp,1720 # 8000a6d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00003617          	auipc	a2,0x3
+    80002318:	cec60613          	addi	a2,a2,-788 # 80005000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00007797          	auipc	a5,0x7
+    80002334:	4b878793          	addi	a5,a5,1208 # 800097e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00007717          	auipc	a4,0x7
+    80002348:	49c70713          	addi	a4,a4,1180 # 800097e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00007897          	auipc	a7,0x7
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800097e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00007797          	auipc	a5,0x7
+    80002384:	07078793          	addi	a5,a5,112 # 800093f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf6810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00007797          	auipc	a5,0x7
+    80002448:	3807be23          	sd	zero,924(a5) # 800097e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	a4068693          	addi	a3,a3,-1472 # 80002e98 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	a7460613          	addi	a2,a2,-1420 # 80002f28 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	a3c60613          	addi	a2,a2,-1476 # 80002f40 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	98c68693          	addi	a3,a3,-1652 # 80002ee0 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	9a868693          	addi	a3,a3,-1624 # 80003018 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	92860613          	addi	a2,a2,-1752 # 80002ff0 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00007d17          	auipc	s10,0x7
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800093f0 <user_mapping>
+    80002724:	00003b97          	auipc	s7,0x3
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80005000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00007a17          	auipc	s4,0x7
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800097e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00007717          	auipc	a4,0x7
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800097e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00007717          	auipc	a4,0x7
+    800027d4:	00f73823          	sd	a5,16(a4) # 800097e0 <freelist_tail>
+    800027d8:	00007717          	auipc	a4,0x7
+    800027dc:	00f73823          	sd	a5,16(a4) # 800097e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00001697          	auipc	a3,0x1
+    800027f0:	85c68693          	addi	a3,a3,-1956 # 80003048 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	77c68693          	addi	a3,a3,1916 # 80002fb8 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	70c68693          	addi	a3,a3,1804 # 80002f80 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00003697          	auipc	a3,0x3
+    800028e0:	72468693          	addi	a3,a3,1828 # 80006000 <pt+0x1000>
+    800028e4:	00004717          	auipc	a4,0x4
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80007000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00005797          	auipc	a5,0x5
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80008000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00002897          	auipc	a7,0x2
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80005000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00003697          	auipc	a3,0x3
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80005ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00002617          	auipc	a2,0x2
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80005000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00005697          	auipc	a3,0x5
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80007ff8 <pt+0x2ff8>
+    8000294c:	00003717          	auipc	a4,0x3
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80006000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00006697          	auipc	a3,0x6
+    800029c0:	64468693          	addi	a3,a3,1604 # 80009000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00007617          	auipc	a2,0x7
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800097e8 <freelist_head>
+    800029d4:	00007797          	auipc	a5,0x7
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800097e0 <freelist_tail>
+    800029dc:	00007317          	auipc	t1,0x7
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800093f0 <user_mapping>
+    800029e4:	01d00793          	li	a5,29
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00007797          	auipc	a5,0x7
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800093e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0df727b7          	lui	a5,0xdf72
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	c6d78793          	addi	a5,a5,-915 # df71c6d <_start-0x7208e393>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00001517          	auipc	a0,0x1
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80004000 <test_2_data>
+    80002ad8:	00053007          	fld	ft0,0(a0)
+    80002adc:	00853087          	fld	ft1,8(a0)
+    80002ae0:	01053107          	fld	ft2,16(a0)
+    80002ae4:	01853683          	ld	a3,24(a0)
+    80002ae8:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002aec:	e2018553          	fmv.x.d	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	38d51063          	bne	a0,a3,80002e78 <fail>
+    80002afc:	36c59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00001517          	auipc	a0,0x1
+    80002b08:	51c50513          	addi	a0,a0,1308 # 80004020 <test_3_data>
+    80002b0c:	00053007          	fld	ft0,0(a0)
+    80002b10:	00853087          	fld	ft1,8(a0)
+    80002b14:	01053107          	fld	ft2,16(a0)
+    80002b18:	01853683          	ld	a3,24(a0)
+    80002b1c:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002b20:	e2018553          	fmv.x.d	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00000613          	li	a2,0
+    80002b2c:	34d51663          	bne	a0,a3,80002e78 <fail>
+    80002b30:	34c59463          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00001517          	auipc	a0,0x1
+    80002b3c:	50850513          	addi	a0,a0,1288 # 80004040 <test_4_data>
+    80002b40:	00053007          	fld	ft0,0(a0)
+    80002b44:	00853087          	fld	ft1,8(a0)
+    80002b48:	01053107          	fld	ft2,16(a0)
+    80002b4c:	01853683          	ld	a3,24(a0)
+    80002b50:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002b54:	e2018553          	fmv.x.d	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	30d51c63          	bne	a0,a3,80002e78 <fail>
+    80002b64:	30c59a63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00001517          	auipc	a0,0x1
+    80002b70:	4f450513          	addi	a0,a0,1268 # 80004060 <test_5_data>
+    80002b74:	00053007          	fld	ft0,0(a0)
+    80002b78:	00853087          	fld	ft1,8(a0)
+    80002b7c:	01053107          	fld	ft2,16(a0)
+    80002b80:	01853683          	ld	a3,24(a0)
+    80002b84:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002b88:	e2018553          	fmv.x.d	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	2ed51263          	bne	a0,a3,80002e78 <fail>
+    80002b98:	2ec59063          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00001517          	auipc	a0,0x1
+    80002ba4:	4e050513          	addi	a0,a0,1248 # 80004080 <test_6_data>
+    80002ba8:	00053007          	fld	ft0,0(a0)
+    80002bac:	00853087          	fld	ft1,8(a0)
+    80002bb0:	01053107          	fld	ft2,16(a0)
+    80002bb4:	01853683          	ld	a3,24(a0)
+    80002bb8:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002bbc:	e2018553          	fmv.x.d	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00000613          	li	a2,0
+    80002bc8:	2ad51863          	bne	a0,a3,80002e78 <fail>
+    80002bcc:	2ac59663          	bne	a1,a2,80002e78 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00001517          	auipc	a0,0x1
+    80002bd8:	4cc50513          	addi	a0,a0,1228 # 800040a0 <test_7_data>
+    80002bdc:	00053007          	fld	ft0,0(a0)
+    80002be0:	00853087          	fld	ft1,8(a0)
+    80002be4:	01053107          	fld	ft2,16(a0)
+    80002be8:	01853683          	ld	a3,24(a0)
+    80002bec:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002bf0:	e2018553          	fmv.x.d	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00000613          	li	a2,0
+    80002bfc:	26d51e63          	bne	a0,a3,80002e78 <fail>
+    80002c00:	26c59c63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c04 <test_12>:
+    80002c04:	00c00193          	li	gp,12
+    80002c08:	00001517          	auipc	a0,0x1
+    80002c0c:	4b850513          	addi	a0,a0,1208 # 800040c0 <test_12_data>
+    80002c10:	00053007          	fld	ft0,0(a0)
+    80002c14:	00853087          	fld	ft1,8(a0)
+    80002c18:	01053107          	fld	ft2,16(a0)
+    80002c1c:	01853683          	ld	a3,24(a0)
+    80002c20:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002c24:	e2018553          	fmv.x.d	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	24d51463          	bne	a0,a3,80002e78 <fail>
+    80002c34:	24c59263          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c38 <test_13>:
+    80002c38:	00d00193          	li	gp,13
+    80002c3c:	00001517          	auipc	a0,0x1
+    80002c40:	4a450513          	addi	a0,a0,1188 # 800040e0 <test_13_data>
+    80002c44:	00053007          	fld	ft0,0(a0)
+    80002c48:	00853087          	fld	ft1,8(a0)
+    80002c4c:	01053107          	fld	ft2,16(a0)
+    80002c50:	01853683          	ld	a3,24(a0)
+    80002c54:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002c58:	e2018553          	fmv.x.d	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00000613          	li	a2,0
+    80002c64:	20d51a63          	bne	a0,a3,80002e78 <fail>
+    80002c68:	20c59863          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c6c <test_14>:
+    80002c6c:	00e00193          	li	gp,14
+    80002c70:	00001517          	auipc	a0,0x1
+    80002c74:	49050513          	addi	a0,a0,1168 # 80004100 <test_14_data>
+    80002c78:	00053007          	fld	ft0,0(a0)
+    80002c7c:	00853087          	fld	ft1,8(a0)
+    80002c80:	01053107          	fld	ft2,16(a0)
+    80002c84:	01853683          	ld	a3,24(a0)
+    80002c88:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002c8c:	e2018553          	fmv.x.d	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00000613          	li	a2,0
+    80002c98:	1ed51063          	bne	a0,a3,80002e78 <fail>
+    80002c9c:	1cc59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002ca0 <test_15>:
+    80002ca0:	00f00193          	li	gp,15
+    80002ca4:	00001517          	auipc	a0,0x1
+    80002ca8:	47c50513          	addi	a0,a0,1148 # 80004120 <test_15_data>
+    80002cac:	00053007          	fld	ft0,0(a0)
+    80002cb0:	00853087          	fld	ft1,8(a0)
+    80002cb4:	01053107          	fld	ft2,16(a0)
+    80002cb8:	01853683          	ld	a3,24(a0)
+    80002cbc:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002cc0:	e2018553          	fmv.x.d	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	00000613          	li	a2,0
+    80002ccc:	1ad51663          	bne	a0,a3,80002e78 <fail>
+    80002cd0:	1ac59463          	bne	a1,a2,80002e78 <fail>
+
+0000000080002cd4 <test_16>:
+    80002cd4:	01000193          	li	gp,16
+    80002cd8:	00001517          	auipc	a0,0x1
+    80002cdc:	46850513          	addi	a0,a0,1128 # 80004140 <test_16_data>
+    80002ce0:	00053007          	fld	ft0,0(a0)
+    80002ce4:	00853087          	fld	ft1,8(a0)
+    80002ce8:	01053107          	fld	ft2,16(a0)
+    80002cec:	01853683          	ld	a3,24(a0)
+    80002cf0:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002cf4:	e2018553          	fmv.x.d	a0,ft3
+    80002cf8:	001015f3          	fsflags	a1,zero
+    80002cfc:	00000613          	li	a2,0
+    80002d00:	16d51c63          	bne	a0,a3,80002e78 <fail>
+    80002d04:	16c59a63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d08 <test_17>:
+    80002d08:	01100193          	li	gp,17
+    80002d0c:	00001517          	auipc	a0,0x1
+    80002d10:	45450513          	addi	a0,a0,1108 # 80004160 <test_17_data>
+    80002d14:	00053007          	fld	ft0,0(a0)
+    80002d18:	00853087          	fld	ft1,8(a0)
+    80002d1c:	01053107          	fld	ft2,16(a0)
+    80002d20:	01853683          	ld	a3,24(a0)
+    80002d24:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002d28:	e2018553          	fmv.x.d	a0,ft3
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	14d51263          	bne	a0,a3,80002e78 <fail>
+    80002d38:	14c59063          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d3c <test_20>:
+    80002d3c:	01400193          	li	gp,20
+    80002d40:	00001517          	auipc	a0,0x1
+    80002d44:	44050513          	addi	a0,a0,1088 # 80004180 <test_20_data>
+    80002d48:	00053007          	fld	ft0,0(a0)
+    80002d4c:	00853087          	fld	ft1,8(a0)
+    80002d50:	01053107          	fld	ft2,16(a0)
+    80002d54:	01853683          	ld	a3,24(a0)
+    80002d58:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002d5c:	e2018553          	fmv.x.d	a0,ft3
+    80002d60:	001015f3          	fsflags	a1,zero
+    80002d64:	01000613          	li	a2,16
+    80002d68:	10d51863          	bne	a0,a3,80002e78 <fail>
+    80002d6c:	10c59663          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d70 <test_21>:
+    80002d70:	01500193          	li	gp,21
+    80002d74:	00001517          	auipc	a0,0x1
+    80002d78:	42c50513          	addi	a0,a0,1068 # 800041a0 <test_21_data>
+    80002d7c:	00053007          	fld	ft0,0(a0)
+    80002d80:	00853087          	fld	ft1,8(a0)
+    80002d84:	01053107          	fld	ft2,16(a0)
+    80002d88:	01853683          	ld	a3,24(a0)
+    80002d8c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002d90:	e2018553          	fmv.x.d	a0,ft3
+    80002d94:	001015f3          	fsflags	a1,zero
+    80002d98:	00000613          	li	a2,0
+    80002d9c:	0cd51e63          	bne	a0,a3,80002e78 <fail>
+    80002da0:	0cc59c63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002da4 <test_30>:
+    80002da4:	01e00193          	li	gp,30
+    80002da8:	00001517          	auipc	a0,0x1
+    80002dac:	41850513          	addi	a0,a0,1048 # 800041c0 <test_30_data>
+    80002db0:	00053007          	fld	ft0,0(a0)
+    80002db4:	00853087          	fld	ft1,8(a0)
+    80002db8:	01053107          	fld	ft2,16(a0)
+    80002dbc:	01853683          	ld	a3,24(a0)
+    80002dc0:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002dc4:	e2018553          	fmv.x.d	a0,ft3
+    80002dc8:	001015f3          	fsflags	a1,zero
+    80002dcc:	00000613          	li	a2,0
+    80002dd0:	0ad51463          	bne	a0,a3,80002e78 <fail>
+    80002dd4:	0ac59263          	bne	a1,a2,80002e78 <fail>
+
+0000000080002dd8 <test_31>:
+    80002dd8:	01f00193          	li	gp,31
+    80002ddc:	00001517          	auipc	a0,0x1
+    80002de0:	40450513          	addi	a0,a0,1028 # 800041e0 <test_31_data>
+    80002de4:	00053007          	fld	ft0,0(a0)
+    80002de8:	00853087          	fld	ft1,8(a0)
+    80002dec:	01053107          	fld	ft2,16(a0)
+    80002df0:	01853683          	ld	a3,24(a0)
+    80002df4:	2a1001d3          	fmin.d	ft3,ft0,ft1
+    80002df8:	e2018553          	fmv.x.d	a0,ft3
+    80002dfc:	001015f3          	fsflags	a1,zero
+    80002e00:	00000613          	li	a2,0
+    80002e04:	06d51a63          	bne	a0,a3,80002e78 <fail>
+    80002e08:	06c59863          	bne	a1,a2,80002e78 <fail>
+
+0000000080002e0c <test_32>:
+    80002e0c:	02000193          	li	gp,32
+    80002e10:	00001517          	auipc	a0,0x1
+    80002e14:	3f050513          	addi	a0,a0,1008 # 80004200 <test_32_data>
+    80002e18:	00053007          	fld	ft0,0(a0)
+    80002e1c:	00853087          	fld	ft1,8(a0)
+    80002e20:	01053107          	fld	ft2,16(a0)
+    80002e24:	01853683          	ld	a3,24(a0)
+    80002e28:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002e2c:	e2018553          	fmv.x.d	a0,ft3
+    80002e30:	001015f3          	fsflags	a1,zero
+    80002e34:	00000613          	li	a2,0
+    80002e38:	04d51063          	bne	a0,a3,80002e78 <fail>
+    80002e3c:	02c59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002e40 <test_33>:
+    80002e40:	02100193          	li	gp,33
+    80002e44:	00001517          	auipc	a0,0x1
+    80002e48:	3dc50513          	addi	a0,a0,988 # 80004220 <test_33_data>
+    80002e4c:	00053007          	fld	ft0,0(a0)
+    80002e50:	00853087          	fld	ft1,8(a0)
+    80002e54:	01053107          	fld	ft2,16(a0)
+    80002e58:	01853683          	ld	a3,24(a0)
+    80002e5c:	2a1011d3          	fmax.d	ft3,ft0,ft1
+    80002e60:	e2018553          	fmv.x.d	a0,ft3
+    80002e64:	001015f3          	fsflags	a1,zero
+    80002e68:	00000613          	li	a2,0
+    80002e6c:	00d51663          	bne	a0,a3,80002e78 <fail>
+    80002e70:	00c59463          	bne	a1,a2,80002e78 <fail>
+    80002e74:	00301a63          	bne	zero,gp,80002e88 <pass>
+
+0000000080002e78 <fail>:
+    80002e78:	00119513          	slli	a0,gp,0x1
+    80002e7c:	00050063          	beqz	a0,80002e7c <fail+0x4>
+    80002e80:	00156513          	ori	a0,a0,1
+    80002e84:	00000073          	ecall
+
+0000000080002e88 <pass>:
+    80002e88:	00100513          	li	a0,1
+    80002e8c:	00000073          	ecall
+    80002e90:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080004000 <test_2_data>:
+    80004000:	0000                	unimp
+    80004002:	0000                	unimp
+    80004004:	0000                	unimp
+    80004006:	4004                	lw	s1,0(s0)
+    80004008:	0000                	unimp
+    8000400a:	0000                	unimp
+    8000400c:	0000                	unimp
+    8000400e:	3ff0                	fld	fa2,248(a5)
+    80004010:	0000                	unimp
+    80004012:	0000                	unimp
+    80004014:	0000                	unimp
+    80004016:	0000                	unimp
+    80004018:	0000                	unimp
+    8000401a:	0000                	unimp
+    8000401c:	0000                	unimp
+    8000401e:	3ff0                	fld	fa2,248(a5)
+
+0000000080004020 <test_3_data>:
+    80004020:	6666                	ld	a2,88(sp)
+    80004022:	6666                	ld	a2,88(sp)
+    80004024:	4c66                	lw	s8,88(sp)
+    80004026:	999ac093          	xori	ra,s5,-1639
+    8000402a:	9999                	andi	a1,a1,-26
+    8000402c:	9999                	andi	a1,a1,-26
+    8000402e:	3ff1                	addiw	t6,t6,-4
+    80004030:	0000                	unimp
+    80004032:	0000                	unimp
+    80004034:	0000                	unimp
+    80004036:	0000                	unimp
+    80004038:	6666                	ld	a2,88(sp)
+    8000403a:	6666                	ld	a2,88(sp)
+    8000403c:	4c66                	lw	s8,88(sp)
+    8000403e:	          	xori	ra,s5,-1639
+
+0000000080004040 <test_4_data>:
+    80004040:	999a                	add	s3,s3,t1
+    80004042:	9999                	andi	a1,a1,-26
+    80004044:	9999                	andi	a1,a1,-26
+    80004046:	3ff1                	addiw	t6,t6,-4
+    80004048:	6666                	ld	a2,88(sp)
+    8000404a:	6666                	ld	a2,88(sp)
+    8000404c:	4c66                	lw	s8,88(sp)
+    8000404e:	0000c093          	xori	ra,ra,0
+    80004052:	0000                	unimp
+    80004054:	0000                	unimp
+    80004056:	0000                	unimp
+    80004058:	6666                	ld	a2,88(sp)
+    8000405a:	6666                	ld	a2,88(sp)
+    8000405c:	4c66                	lw	s8,88(sp)
+    8000405e:	          	not	ra,t6
+
+0000000080004060 <test_5_data>:
+    80004060:	ffff                	0xffff
+    80004062:	ffff                	0xffff
+    80004064:	ffff                	0xffff
+    80004066:	7fff                	0x7fff
+    80004068:	6666                	ld	a2,88(sp)
+    8000406a:	6666                	ld	a2,88(sp)
+    8000406c:	4c66                	lw	s8,88(sp)
+    8000406e:	0000c093          	xori	ra,ra,0
+    80004072:	0000                	unimp
+    80004074:	0000                	unimp
+    80004076:	0000                	unimp
+    80004078:	6666                	ld	a2,88(sp)
+    8000407a:	6666                	ld	a2,88(sp)
+    8000407c:	4c66                	lw	s8,88(sp)
+    8000407e:	          	xori	ra,gp,-689
+
+0000000080004080 <test_6_data>:
+    80004080:	d4f1                	beqz	s1,8000404c <test_4_data+0xc>
+    80004082:	53c8                	lw	a0,36(a5)
+    80004084:	400921fb          	0x400921fb
+    80004088:	8c3a                	mv	s8,a4
+    8000408a:	e230                	sd	a2,64(a2)
+    8000408c:	798e                	ld	s3,224(sp)
+    8000408e:	3e45                	addiw	t3,t3,-15
+    80004090:	0000                	unimp
+    80004092:	0000                	unimp
+    80004094:	0000                	unimp
+    80004096:	0000                	unimp
+    80004098:	8c3a                	mv	s8,a4
+    8000409a:	e230                	sd	a2,64(a2)
+    8000409c:	798e                	ld	s3,224(sp)
+    8000409e:	3e45                	addiw	t3,t3,-15
+
+00000000800040a0 <test_7_data>:
+    800040a0:	0000                	unimp
+    800040a2:	0000                	unimp
+    800040a4:	0000                	unimp
+    800040a6:	bff0                	fsd	fa2,248(a5)
+    800040a8:	0000                	unimp
+    800040aa:	0000                	unimp
+    800040ac:	0000                	unimp
+    800040ae:	c000                	sw	s0,0(s0)
+    800040b0:	0000                	unimp
+    800040b2:	0000                	unimp
+    800040b4:	0000                	unimp
+    800040b6:	0000                	unimp
+    800040b8:	0000                	unimp
+    800040ba:	0000                	unimp
+    800040bc:	0000                	unimp
+    800040be:	c000                	sw	s0,0(s0)
+
+00000000800040c0 <test_12_data>:
+    800040c0:	0000                	unimp
+    800040c2:	0000                	unimp
+    800040c4:	0000                	unimp
+    800040c6:	4004                	lw	s1,0(s0)
+    800040c8:	0000                	unimp
+    800040ca:	0000                	unimp
+    800040cc:	0000                	unimp
+    800040ce:	3ff0                	fld	fa2,248(a5)
+    800040d0:	0000                	unimp
+    800040d2:	0000                	unimp
+    800040d4:	0000                	unimp
+    800040d6:	0000                	unimp
+    800040d8:	0000                	unimp
+    800040da:	0000                	unimp
+    800040dc:	0000                	unimp
+    800040de:	4004                	lw	s1,0(s0)
+
+00000000800040e0 <test_13_data>:
+    800040e0:	6666                	ld	a2,88(sp)
+    800040e2:	6666                	ld	a2,88(sp)
+    800040e4:	4c66                	lw	s8,88(sp)
+    800040e6:	999ac093          	xori	ra,s5,-1639
+    800040ea:	9999                	andi	a1,a1,-26
+    800040ec:	9999                	andi	a1,a1,-26
+    800040ee:	3ff1                	addiw	t6,t6,-4
+    800040f0:	0000                	unimp
+    800040f2:	0000                	unimp
+    800040f4:	0000                	unimp
+    800040f6:	0000                	unimp
+    800040f8:	999a                	add	s3,s3,t1
+    800040fa:	9999                	andi	a1,a1,-26
+    800040fc:	9999                	andi	a1,a1,-26
+    800040fe:	3ff1                	addiw	t6,t6,-4
+
+0000000080004100 <test_14_data>:
+    80004100:	999a                	add	s3,s3,t1
+    80004102:	9999                	andi	a1,a1,-26
+    80004104:	9999                	andi	a1,a1,-26
+    80004106:	3ff1                	addiw	t6,t6,-4
+    80004108:	6666                	ld	a2,88(sp)
+    8000410a:	6666                	ld	a2,88(sp)
+    8000410c:	4c66                	lw	s8,88(sp)
+    8000410e:	0000c093          	xori	ra,ra,0
+    80004112:	0000                	unimp
+    80004114:	0000                	unimp
+    80004116:	0000                	unimp
+    80004118:	999a                	add	s3,s3,t1
+    8000411a:	9999                	andi	a1,a1,-26
+    8000411c:	9999                	andi	a1,a1,-26
+    8000411e:	3ff1                	addiw	t6,t6,-4
+
+0000000080004120 <test_15_data>:
+    80004120:	ffff                	0xffff
+    80004122:	ffff                	0xffff
+    80004124:	ffff                	0xffff
+    80004126:	7fff                	0x7fff
+    80004128:	6666                	ld	a2,88(sp)
+    8000412a:	6666                	ld	a2,88(sp)
+    8000412c:	4c66                	lw	s8,88(sp)
+    8000412e:	0000c093          	xori	ra,ra,0
+    80004132:	0000                	unimp
+    80004134:	0000                	unimp
+    80004136:	0000                	unimp
+    80004138:	6666                	ld	a2,88(sp)
+    8000413a:	6666                	ld	a2,88(sp)
+    8000413c:	4c66                	lw	s8,88(sp)
+    8000413e:	          	xori	ra,gp,-689
+
+0000000080004140 <test_16_data>:
+    80004140:	d4f1                	beqz	s1,8000410c <test_14_data+0xc>
+    80004142:	53c8                	lw	a0,36(a5)
+    80004144:	400921fb          	0x400921fb
+    80004148:	8c3a                	mv	s8,a4
+    8000414a:	e230                	sd	a2,64(a2)
+    8000414c:	798e                	ld	s3,224(sp)
+    8000414e:	3e45                	addiw	t3,t3,-15
+    80004150:	0000                	unimp
+    80004152:	0000                	unimp
+    80004154:	0000                	unimp
+    80004156:	0000                	unimp
+    80004158:	d4f1                	beqz	s1,80004124 <test_15_data+0x4>
+    8000415a:	53c8                	lw	a0,36(a5)
+    8000415c:	400921fb          	0x400921fb
+
+0000000080004160 <test_17_data>:
+    80004160:	0000                	unimp
+    80004162:	0000                	unimp
+    80004164:	0000                	unimp
+    80004166:	bff0                	fsd	fa2,248(a5)
+    80004168:	0000                	unimp
+    8000416a:	0000                	unimp
+    8000416c:	0000                	unimp
+    8000416e:	c000                	sw	s0,0(s0)
+    80004170:	0000                	unimp
+    80004172:	0000                	unimp
+    80004174:	0000                	unimp
+    80004176:	0000                	unimp
+    80004178:	0000                	unimp
+    8000417a:	0000                	unimp
+    8000417c:	0000                	unimp
+    8000417e:	bff0                	fsd	fa2,248(a5)
+
+0000000080004180 <test_20_data>:
+    80004180:	0001                	nop
+    80004182:	0000                	unimp
+    80004184:	0000                	unimp
+    80004186:	7ff0                	ld	a2,248(a5)
+    80004188:	0000                	unimp
+    8000418a:	0000                	unimp
+    8000418c:	0000                	unimp
+    8000418e:	3ff0                	fld	fa2,248(a5)
+    80004190:	0000                	unimp
+    80004192:	0000                	unimp
+    80004194:	0000                	unimp
+    80004196:	0000                	unimp
+    80004198:	0000                	unimp
+    8000419a:	0000                	unimp
+    8000419c:	0000                	unimp
+    8000419e:	3ff0                	fld	fa2,248(a5)
+
+00000000800041a0 <test_21_data>:
+    800041a0:	ffff                	0xffff
+    800041a2:	ffff                	0xffff
+    800041a4:	ffff                	0xffff
+    800041a6:	7fff                	0x7fff
+    800041a8:	ffff                	0xffff
+    800041aa:	ffff                	0xffff
+    800041ac:	ffff                	0xffff
+    800041ae:	7fff                	0x7fff
+    800041b0:	0000                	unimp
+    800041b2:	0000                	unimp
+    800041b4:	0000                	unimp
+    800041b6:	0000                	unimp
+    800041b8:	0000                	unimp
+    800041ba:	0000                	unimp
+    800041bc:	0000                	unimp
+    800041be:	7ff8                	ld	a4,248(a5)
+
+00000000800041c0 <test_30_data>:
+    800041c0:	0000                	unimp
+    800041c2:	0000                	unimp
+    800041c4:	0000                	unimp
+    800041c6:	8000                	0x8000
+    800041c8:	0000                	unimp
+    800041ca:	0000                	unimp
+    800041cc:	0000                	unimp
+    800041ce:	0000                	unimp
+    800041d0:	0000                	unimp
+    800041d2:	0000                	unimp
+    800041d4:	0000                	unimp
+    800041d6:	0000                	unimp
+    800041d8:	0000                	unimp
+    800041da:	0000                	unimp
+    800041dc:	0000                	unimp
+    800041de:	8000                	0x8000
+
+00000000800041e0 <test_31_data>:
+    800041e0:	0000                	unimp
+    800041e2:	0000                	unimp
+    800041e4:	0000                	unimp
+    800041e6:	0000                	unimp
+    800041e8:	0000                	unimp
+    800041ea:	0000                	unimp
+    800041ec:	0000                	unimp
+    800041ee:	8000                	0x8000
+    800041f0:	0000                	unimp
+    800041f2:	0000                	unimp
+    800041f4:	0000                	unimp
+    800041f6:	0000                	unimp
+    800041f8:	0000                	unimp
+    800041fa:	0000                	unimp
+    800041fc:	0000                	unimp
+    800041fe:	8000                	0x8000
+
+0000000080004200 <test_32_data>:
+    80004200:	0000                	unimp
+    80004202:	0000                	unimp
+    80004204:	0000                	unimp
+    80004206:	8000                	0x8000
+    80004208:	0000                	unimp
+    8000420a:	0000                	unimp
+    8000420c:	0000                	unimp
+    8000420e:	0000                	unimp
+    80004210:	0000                	unimp
+    80004212:	0000                	unimp
+    80004214:	0000                	unimp
+    80004216:	0000                	unimp
+    80004218:	0000                	unimp
+    8000421a:	0000                	unimp
+    8000421c:	0000                	unimp
+    8000421e:	0000                	unimp
+
+0000000080004220 <test_33_data>:
+    80004220:	0000                	unimp
+    80004222:	0000                	unimp
+    80004224:	0000                	unimp
+    80004226:	0000                	unimp
+    80004228:	0000                	unimp
+    8000422a:	0000                	unimp
+    8000422c:	0000                	unimp
+    8000422e:	8000                	0x8000
+    80004230:	0000                	unimp
+    80004232:	0000                	unimp
+    80004234:	0000                	unimp
+    80004236:	0000                	unimp
+    80004238:	0000                	unimp
+    8000423a:	0000                	unimp
+    8000423c:	0000                	unimp
+    8000423e:	0000                	unimp
diff --git a/test/riscv-tests/rv64ud-v-fmin.elf b/test/riscv-tests/rv64ud-v-fmin.elf
new file mode 100644
index 0000000..d8db4de
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-fmin.elf
diff --git a/test/riscv-tests/rv64ud-v-ldst.elf b/test/riscv-tests/rv64ud-v-ldst.elf
new file mode 100755
index 0000000..9185e60
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-ldst.elf
diff --git a/test/riscv-tests/rv64ud-v-move.elf b/test/riscv-tests/rv64ud-v-move.elf
new file mode 100755
index 0000000..7a53093
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-move.elf
diff --git a/test/riscv-tests/rv64ud-v-recoding.elf b/test/riscv-tests/rv64ud-v-recoding.elf
new file mode 100755
index 0000000..17f3b68
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-recoding.elf
diff --git a/test/riscv-tests/rv64ud-v-structural.elf b/test/riscv-tests/rv64ud-v-structural.elf
new file mode 100755
index 0000000..0efcc4a
--- /dev/null
+++ b/test/riscv-tests/rv64ud-v-structural.elf
diff --git a/test/riscv-tests/rv64uf-p-fadd.dump b/test/riscv-tests/rv64uf-p-fadd.dump
new file mode 100644
index 0000000..e8270cc
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fadd.dump
@@ -0,0 +1,342 @@
+
+rv64uf-p-fadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	001071d3          	fadd.s	ft3,ft0,ft1
+    80000128:	e0018553          	fmv.x.w	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	1ed51063          	bne	a0,a3,80000314 <fail>
+    80000138:	1cc59e63          	bne	a1,a2,80000314 <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+    80000148:	00052007          	flw	ft0,0(a0)
+    8000014c:	00452087          	flw	ft1,4(a0)
+    80000150:	00852107          	flw	ft2,8(a0)
+    80000154:	00c52683          	lw	a3,12(a0)
+    80000158:	001071d3          	fadd.s	ft3,ft0,ft1
+    8000015c:	e0018553          	fmv.x.w	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	1ad51663          	bne	a0,a3,80000314 <fail>
+    8000016c:	1ac59463          	bne	a1,a2,80000314 <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+    8000017c:	00052007          	flw	ft0,0(a0)
+    80000180:	00452087          	flw	ft1,4(a0)
+    80000184:	00852107          	flw	ft2,8(a0)
+    80000188:	00c52683          	lw	a3,12(a0)
+    8000018c:	001071d3          	fadd.s	ft3,ft0,ft1
+    80000190:	e0018553          	fmv.x.w	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00100613          	li	a2,1
+    8000019c:	16d51c63          	bne	a0,a3,80000314 <fail>
+    800001a0:	16c59a63          	bne	a1,a2,80000314 <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+    800001b0:	00052007          	flw	ft0,0(a0)
+    800001b4:	00452087          	flw	ft1,4(a0)
+    800001b8:	00852107          	flw	ft2,8(a0)
+    800001bc:	00c52683          	lw	a3,12(a0)
+    800001c0:	081071d3          	fsub.s	ft3,ft0,ft1
+    800001c4:	e0018553          	fmv.x.w	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	14d51263          	bne	a0,a3,80000314 <fail>
+    800001d4:	14c59063          	bne	a1,a2,80000314 <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+    800001e4:	00052007          	flw	ft0,0(a0)
+    800001e8:	00452087          	flw	ft1,4(a0)
+    800001ec:	00852107          	flw	ft2,8(a0)
+    800001f0:	00c52683          	lw	a3,12(a0)
+    800001f4:	081071d3          	fsub.s	ft3,ft0,ft1
+    800001f8:	e0018553          	fmv.x.w	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00100613          	li	a2,1
+    80000204:	10d51863          	bne	a0,a3,80000314 <fail>
+    80000208:	10c59663          	bne	a1,a2,80000314 <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+    80000218:	00052007          	flw	ft0,0(a0)
+    8000021c:	00452087          	flw	ft1,4(a0)
+    80000220:	00852107          	flw	ft2,8(a0)
+    80000224:	00c52683          	lw	a3,12(a0)
+    80000228:	081071d3          	fsub.s	ft3,ft0,ft1
+    8000022c:	e0018553          	fmv.x.w	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00100613          	li	a2,1
+    80000238:	0cd51e63          	bne	a0,a3,80000314 <fail>
+    8000023c:	0cc59c63          	bne	a1,a2,80000314 <fail>
+
+0000000080000240 <test_8>:
+    80000240:	00800193          	li	gp,8
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_8_data>
+    8000024c:	00052007          	flw	ft0,0(a0)
+    80000250:	00452087          	flw	ft1,4(a0)
+    80000254:	00852107          	flw	ft2,8(a0)
+    80000258:	00c52683          	lw	a3,12(a0)
+    8000025c:	101071d3          	fmul.s	ft3,ft0,ft1
+    80000260:	e0018553          	fmv.x.w	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	0ad51463          	bne	a0,a3,80000314 <fail>
+    80000270:	0ac59263          	bne	a1,a2,80000314 <fail>
+
+0000000080000274 <test_9>:
+    80000274:	00900193          	li	gp,9
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_9_data>
+    80000280:	00052007          	flw	ft0,0(a0)
+    80000284:	00452087          	flw	ft1,4(a0)
+    80000288:	00852107          	flw	ft2,8(a0)
+    8000028c:	00c52683          	lw	a3,12(a0)
+    80000290:	101071d3          	fmul.s	ft3,ft0,ft1
+    80000294:	e0018553          	fmv.x.w	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00100613          	li	a2,1
+    800002a0:	06d51a63          	bne	a0,a3,80000314 <fail>
+    800002a4:	06c59863          	bne	a1,a2,80000314 <fail>
+
+00000000800002a8 <test_10>:
+    800002a8:	00a00193          	li	gp,10
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_10_data>
+    800002b4:	00052007          	flw	ft0,0(a0)
+    800002b8:	00452087          	flw	ft1,4(a0)
+    800002bc:	00852107          	flw	ft2,8(a0)
+    800002c0:	00c52683          	lw	a3,12(a0)
+    800002c4:	101071d3          	fmul.s	ft3,ft0,ft1
+    800002c8:	e0018553          	fmv.x.w	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00100613          	li	a2,1
+    800002d4:	04d51063          	bne	a0,a3,80000314 <fail>
+    800002d8:	02c59e63          	bne	a1,a2,80000314 <fail>
+
+00000000800002dc <test_11>:
+    800002dc:	00b00193          	li	gp,11
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_11_data>
+    800002e8:	00052007          	flw	ft0,0(a0)
+    800002ec:	00452087          	flw	ft1,4(a0)
+    800002f0:	00852107          	flw	ft2,8(a0)
+    800002f4:	00c52683          	lw	a3,12(a0)
+    800002f8:	081071d3          	fsub.s	ft3,ft0,ft1
+    800002fc:	e0018553          	fmv.x.w	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	01000613          	li	a2,16
+    80000308:	00d51663          	bne	a0,a3,80000314 <fail>
+    8000030c:	00c59463          	bne	a1,a2,80000314 <fail>
+    80000310:	00301c63          	bne	zero,gp,80000328 <pass>
+
+0000000080000314 <fail>:
+    80000314:	0ff0000f          	fence
+    80000318:	00018063          	beqz	gp,80000318 <fail+0x4>
+    8000031c:	00119193          	slli	gp,gp,0x1
+    80000320:	0011e193          	ori	gp,gp,1
+    80000324:	00000073          	ecall
+
+0000000080000328 <pass>:
+    80000328:	0ff0000f          	fence
+    8000032c:	00100193          	li	gp,1
+    80000330:	00000073          	ecall
+    80000334:	c0001073          	unimp
+    80000338:	0000                	unimp
+    8000033a:	0000                	unimp
+    8000033c:	0000                	unimp
+    8000033e:	0000                	unimp
+    80000340:	0000                	unimp
+    80000342:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	4020                	lw	s0,64(s0)
+    80002004:	0000                	unimp
+    80002006:	3f80                	fld	fs0,56(a5)
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	4060                	lw	s0,68(s0)
+
+0000000080002010 <test_3_data>:
+    80002010:	c49a6333          	0xc49a6333
+    80002014:	cccd                	beqz	s1,800020ce <_end+0x2e>
+    80002016:	3f8c                	fld	fa1,56(a5)
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	4000                	lw	s0,0(s0)
+    8000201e:	c49a                	sw	t1,72(sp)
+
+0000000080002020 <test_4_data>:
+    80002020:	40490fdb          	0x40490fdb
+    80002024:	322bcc77          	0x322bcc77
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	40490fdb          	0x40490fdb
+
+0000000080002030 <test_5_data>:
+    80002030:	0000                	unimp
+    80002032:	4020                	lw	s0,64(s0)
+    80002034:	0000                	unimp
+    80002036:	3f80                	fld	fs0,56(a5)
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	0000                	unimp
+    8000203e:	3fc0                	fld	fs0,184(a5)
+
+0000000080002040 <test_6_data>:
+    80002040:	c49a6333          	0xc49a6333
+    80002044:	cccd                	beqz	s1,800020fe <_end+0x5e>
+    80002046:	bf8c                	fsd	fa1,56(a5)
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	4000                	lw	s0,0(s0)
+    8000204e:	c49a                	sw	t1,72(sp)
+
+0000000080002050 <test_7_data>:
+    80002050:	40490fdb          	0x40490fdb
+    80002054:	322bcc77          	0x322bcc77
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	40490fdb          	0x40490fdb
+
+0000000080002060 <test_8_data>:
+    80002060:	0000                	unimp
+    80002062:	4020                	lw	s0,64(s0)
+    80002064:	0000                	unimp
+    80002066:	3f80                	fld	fs0,56(a5)
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	4020                	lw	s0,64(s0)
+
+0000000080002070 <test_9_data>:
+    80002070:	c49a6333          	0xc49a6333
+    80002074:	cccd                	beqz	s1,8000212e <_end+0x8e>
+    80002076:	bf8c                	fsd	fa1,56(a5)
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	d385                	beqz	a5,80001f9c <fromhost+0xf5c>
+    8000207e:	44a9                	li	s1,10
+
+0000000080002080 <test_10_data>:
+    80002080:	40490fdb          	0x40490fdb
+    80002084:	322bcc77          	0x322bcc77
+    80002088:	0000                	unimp
+    8000208a:	0000                	unimp
+    8000208c:	ee2d                	bnez	a2,80002106 <_end+0x66>
+    8000208e:	3306                	fld	ft6,96(sp)
+
+0000000080002090 <test_11_data>:
+    80002090:	0000                	unimp
+    80002092:	7f80                	ld	s0,56(a5)
+    80002094:	0000                	unimp
+    80002096:	7f80                	ld	s0,56(a5)
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	7fc0                	ld	s0,184(a5)
diff --git a/test/riscv-tests/rv64uf-p-fadd.elf b/test/riscv-tests/rv64uf-p-fadd.elf
new file mode 100644
index 0000000..e4c4a5b
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fadd.elf
diff --git a/test/riscv-tests/rv64uf-p-fclass.dump b/test/riscv-tests/rv64uf-p-fclass.dump
new file mode 100644
index 0000000..79c4968
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fclass.dump
@@ -0,0 +1,186 @@
+
+rv64uf-p-fclass:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	1ff0051b          	addiw	a0,zero,511
+    8000010c:	01751513          	slli	a0,a0,0x17
+    80000110:	f0050553          	fmv.w.x	fa0,a0
+    80000114:	e0051553          	fclass.s	a0,fa0
+    80000118:	00100e93          	li	t4,1
+    8000011c:	00200193          	li	gp,2
+    80000120:	0fd51c63          	bne	a0,t4,80000218 <fail>
+
+0000000080000124 <test_3>:
+    80000124:	17f0051b          	addiw	a0,zero,383
+    80000128:	01751513          	slli	a0,a0,0x17
+    8000012c:	f0050553          	fmv.w.x	fa0,a0
+    80000130:	e0051553          	fclass.s	a0,fa0
+    80000134:	00200e93          	li	t4,2
+    80000138:	00300193          	li	gp,3
+    8000013c:	0dd51e63          	bne	a0,t4,80000218 <fail>
+
+0000000080000140 <test_4>:
+    80000140:	1010051b          	addiw	a0,zero,257
+    80000144:	01751513          	slli	a0,a0,0x17
+    80000148:	fff50513          	addi	a0,a0,-1 # 1fff <_start-0x7fffe001>
+    8000014c:	f0050553          	fmv.w.x	fa0,a0
+    80000150:	e0051553          	fclass.s	a0,fa0
+    80000154:	00400e93          	li	t4,4
+    80000158:	00400193          	li	gp,4
+    8000015c:	0bd51e63          	bne	a0,t4,80000218 <fail>
+
+0000000080000160 <test_5>:
+    80000160:	0010051b          	addiw	a0,zero,1
+    80000164:	01f51513          	slli	a0,a0,0x1f
+    80000168:	f0050553          	fmv.w.x	fa0,a0
+    8000016c:	e0051553          	fclass.s	a0,fa0
+    80000170:	00800e93          	li	t4,8
+    80000174:	00500193          	li	gp,5
+    80000178:	0bd51063          	bne	a0,t4,80000218 <fail>
+
+000000008000017c <test_6>:
+    8000017c:	00000513          	li	a0,0
+    80000180:	f0050553          	fmv.w.x	fa0,a0
+    80000184:	e0051553          	fclass.s	a0,fa0
+    80000188:	01000e93          	li	t4,16
+    8000018c:	00600193          	li	gp,6
+    80000190:	09d51463          	bne	a0,t4,80000218 <fail>
+
+0000000080000194 <test_7>:
+    80000194:	00800537          	lui	a0,0x800
+    80000198:	fff5051b          	addiw	a0,a0,-1
+    8000019c:	f0050553          	fmv.w.x	fa0,a0
+    800001a0:	e0051553          	fclass.s	a0,fa0
+    800001a4:	02000e93          	li	t4,32
+    800001a8:	00700193          	li	gp,7
+    800001ac:	07d51663          	bne	a0,t4,80000218 <fail>
+
+00000000800001b0 <test_8>:
+    800001b0:	3f800537          	lui	a0,0x3f800
+    800001b4:	f0050553          	fmv.w.x	fa0,a0
+    800001b8:	e0051553          	fclass.s	a0,fa0
+    800001bc:	04000e93          	li	t4,64
+    800001c0:	00800193          	li	gp,8
+    800001c4:	05d51a63          	bne	a0,t4,80000218 <fail>
+
+00000000800001c8 <test_9>:
+    800001c8:	7f800537          	lui	a0,0x7f800
+    800001cc:	f0050553          	fmv.w.x	fa0,a0
+    800001d0:	e0051553          	fclass.s	a0,fa0
+    800001d4:	08000e93          	li	t4,128
+    800001d8:	00900193          	li	gp,9
+    800001dc:	03d51e63          	bne	a0,t4,80000218 <fail>
+
+00000000800001e0 <test_10>:
+    800001e0:	7f800537          	lui	a0,0x7f800
+    800001e4:	0015051b          	addiw	a0,a0,1
+    800001e8:	f0050553          	fmv.w.x	fa0,a0
+    800001ec:	e0051553          	fclass.s	a0,fa0
+    800001f0:	10000e93          	li	t4,256
+    800001f4:	00a00193          	li	gp,10
+    800001f8:	03d51063          	bne	a0,t4,80000218 <fail>
+
+00000000800001fc <test_11>:
+    800001fc:	7fc00537          	lui	a0,0x7fc00
+    80000200:	f0050553          	fmv.w.x	fa0,a0
+    80000204:	e0051553          	fclass.s	a0,fa0
+    80000208:	20000e93          	li	t4,512
+    8000020c:	00b00193          	li	gp,11
+    80000210:	01d51463          	bne	a0,t4,80000218 <fail>
+    80000214:	00301c63          	bne	zero,gp,8000022c <pass>
+
+0000000080000218 <fail>:
+    80000218:	0ff0000f          	fence
+    8000021c:	00018063          	beqz	gp,8000021c <fail+0x4>
+    80000220:	00119193          	slli	gp,gp,0x1
+    80000224:	0011e193          	ori	gp,gp,1
+    80000228:	00000073          	ecall
+
+000000008000022c <pass>:
+    8000022c:	0ff0000f          	fence
+    80000230:	00100193          	li	gp,1
+    80000234:	00000073          	ecall
+    80000238:	c0001073          	unimp
+    8000023c:	0000                	unimp
+    8000023e:	0000                	unimp
+    80000240:	0000                	unimp
+    80000242:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-p-fclass.elf b/test/riscv-tests/rv64uf-p-fclass.elf
new file mode 100644
index 0000000..eae8b27
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fclass.elf
diff --git a/test/riscv-tests/rv64uf-p-fcmp.dump b/test/riscv-tests/rv64uf-p-fcmp.dump
new file mode 100644
index 0000000..0fb4cb8
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcmp.dump
@@ -0,0 +1,450 @@
+
+rv64uf-p-fcmp:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	a0102553          	feq.s	a0,ft0,ft1
+    80000128:	001015f3          	fsflags	a1,zero
+    8000012c:	00000613          	li	a2,0
+    80000130:	2ad51663          	bne	a0,a3,800003dc <fail>
+    80000134:	2ac59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000138 <test_3>:
+    80000138:	00300193          	li	gp,3
+    8000013c:	00002517          	auipc	a0,0x2
+    80000140:	ed450513          	addi	a0,a0,-300 # 80002010 <test_3_data>
+    80000144:	00052007          	flw	ft0,0(a0)
+    80000148:	00452087          	flw	ft1,4(a0)
+    8000014c:	00852107          	flw	ft2,8(a0)
+    80000150:	00c52683          	lw	a3,12(a0)
+    80000154:	a0100553          	fle.s	a0,ft0,ft1
+    80000158:	001015f3          	fsflags	a1,zero
+    8000015c:	00000613          	li	a2,0
+    80000160:	26d51e63          	bne	a0,a3,800003dc <fail>
+    80000164:	26c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000168 <test_4>:
+    80000168:	00400193          	li	gp,4
+    8000016c:	00002517          	auipc	a0,0x2
+    80000170:	eb450513          	addi	a0,a0,-332 # 80002020 <test_4_data>
+    80000174:	00052007          	flw	ft0,0(a0)
+    80000178:	00452087          	flw	ft1,4(a0)
+    8000017c:	00852107          	flw	ft2,8(a0)
+    80000180:	00c52683          	lw	a3,12(a0)
+    80000184:	a0101553          	flt.s	a0,ft0,ft1
+    80000188:	001015f3          	fsflags	a1,zero
+    8000018c:	00000613          	li	a2,0
+    80000190:	24d51663          	bne	a0,a3,800003dc <fail>
+    80000194:	24c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000198 <test_5>:
+    80000198:	00500193          	li	gp,5
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	e9450513          	addi	a0,a0,-364 # 80002030 <test_5_data>
+    800001a4:	00052007          	flw	ft0,0(a0)
+    800001a8:	00452087          	flw	ft1,4(a0)
+    800001ac:	00852107          	flw	ft2,8(a0)
+    800001b0:	00c52683          	lw	a3,12(a0)
+    800001b4:	a0102553          	feq.s	a0,ft0,ft1
+    800001b8:	001015f3          	fsflags	a1,zero
+    800001bc:	00000613          	li	a2,0
+    800001c0:	20d51e63          	bne	a0,a3,800003dc <fail>
+    800001c4:	20c59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800001c8 <test_6>:
+    800001c8:	00600193          	li	gp,6
+    800001cc:	00002517          	auipc	a0,0x2
+    800001d0:	e7450513          	addi	a0,a0,-396 # 80002040 <test_6_data>
+    800001d4:	00052007          	flw	ft0,0(a0)
+    800001d8:	00452087          	flw	ft1,4(a0)
+    800001dc:	00852107          	flw	ft2,8(a0)
+    800001e0:	00c52683          	lw	a3,12(a0)
+    800001e4:	a0100553          	fle.s	a0,ft0,ft1
+    800001e8:	001015f3          	fsflags	a1,zero
+    800001ec:	00000613          	li	a2,0
+    800001f0:	1ed51663          	bne	a0,a3,800003dc <fail>
+    800001f4:	1ec59463          	bne	a1,a2,800003dc <fail>
+
+00000000800001f8 <test_7>:
+    800001f8:	00700193          	li	gp,7
+    800001fc:	00002517          	auipc	a0,0x2
+    80000200:	e5450513          	addi	a0,a0,-428 # 80002050 <test_7_data>
+    80000204:	00052007          	flw	ft0,0(a0)
+    80000208:	00452087          	flw	ft1,4(a0)
+    8000020c:	00852107          	flw	ft2,8(a0)
+    80000210:	00c52683          	lw	a3,12(a0)
+    80000214:	a0101553          	flt.s	a0,ft0,ft1
+    80000218:	001015f3          	fsflags	a1,zero
+    8000021c:	00000613          	li	a2,0
+    80000220:	1ad51e63          	bne	a0,a3,800003dc <fail>
+    80000224:	1ac59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000228 <test_8>:
+    80000228:	00800193          	li	gp,8
+    8000022c:	00002517          	auipc	a0,0x2
+    80000230:	e3450513          	addi	a0,a0,-460 # 80002060 <test_8_data>
+    80000234:	00052007          	flw	ft0,0(a0)
+    80000238:	00452087          	flw	ft1,4(a0)
+    8000023c:	00852107          	flw	ft2,8(a0)
+    80000240:	00c52683          	lw	a3,12(a0)
+    80000244:	a0102553          	feq.s	a0,ft0,ft1
+    80000248:	001015f3          	fsflags	a1,zero
+    8000024c:	00000613          	li	a2,0
+    80000250:	18d51663          	bne	a0,a3,800003dc <fail>
+    80000254:	18c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000258 <test_9>:
+    80000258:	00900193          	li	gp,9
+    8000025c:	00002517          	auipc	a0,0x2
+    80000260:	e1450513          	addi	a0,a0,-492 # 80002070 <test_9_data>
+    80000264:	00052007          	flw	ft0,0(a0)
+    80000268:	00452087          	flw	ft1,4(a0)
+    8000026c:	00852107          	flw	ft2,8(a0)
+    80000270:	00c52683          	lw	a3,12(a0)
+    80000274:	a0102553          	feq.s	a0,ft0,ft1
+    80000278:	001015f3          	fsflags	a1,zero
+    8000027c:	00000613          	li	a2,0
+    80000280:	14d51e63          	bne	a0,a3,800003dc <fail>
+    80000284:	14c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000288 <test_10>:
+    80000288:	00a00193          	li	gp,10
+    8000028c:	00002517          	auipc	a0,0x2
+    80000290:	df450513          	addi	a0,a0,-524 # 80002080 <test_10_data>
+    80000294:	00052007          	flw	ft0,0(a0)
+    80000298:	00452087          	flw	ft1,4(a0)
+    8000029c:	00852107          	flw	ft2,8(a0)
+    800002a0:	00c52683          	lw	a3,12(a0)
+    800002a4:	a0102553          	feq.s	a0,ft0,ft1
+    800002a8:	001015f3          	fsflags	a1,zero
+    800002ac:	01000613          	li	a2,16
+    800002b0:	12d51663          	bne	a0,a3,800003dc <fail>
+    800002b4:	12c59463          	bne	a1,a2,800003dc <fail>
+
+00000000800002b8 <test_11>:
+    800002b8:	00b00193          	li	gp,11
+    800002bc:	00002517          	auipc	a0,0x2
+    800002c0:	dd450513          	addi	a0,a0,-556 # 80002090 <test_11_data>
+    800002c4:	00052007          	flw	ft0,0(a0)
+    800002c8:	00452087          	flw	ft1,4(a0)
+    800002cc:	00852107          	flw	ft2,8(a0)
+    800002d0:	00c52683          	lw	a3,12(a0)
+    800002d4:	a0101553          	flt.s	a0,ft0,ft1
+    800002d8:	001015f3          	fsflags	a1,zero
+    800002dc:	01000613          	li	a2,16
+    800002e0:	0ed51e63          	bne	a0,a3,800003dc <fail>
+    800002e4:	0ec59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800002e8 <test_12>:
+    800002e8:	00c00193          	li	gp,12
+    800002ec:	00002517          	auipc	a0,0x2
+    800002f0:	db450513          	addi	a0,a0,-588 # 800020a0 <test_12_data>
+    800002f4:	00052007          	flw	ft0,0(a0)
+    800002f8:	00452087          	flw	ft1,4(a0)
+    800002fc:	00852107          	flw	ft2,8(a0)
+    80000300:	00c52683          	lw	a3,12(a0)
+    80000304:	a0101553          	flt.s	a0,ft0,ft1
+    80000308:	001015f3          	fsflags	a1,zero
+    8000030c:	01000613          	li	a2,16
+    80000310:	0cd51663          	bne	a0,a3,800003dc <fail>
+    80000314:	0cc59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000318 <test_13>:
+    80000318:	00d00193          	li	gp,13
+    8000031c:	00002517          	auipc	a0,0x2
+    80000320:	d9450513          	addi	a0,a0,-620 # 800020b0 <test_13_data>
+    80000324:	00052007          	flw	ft0,0(a0)
+    80000328:	00452087          	flw	ft1,4(a0)
+    8000032c:	00852107          	flw	ft2,8(a0)
+    80000330:	00c52683          	lw	a3,12(a0)
+    80000334:	a0101553          	flt.s	a0,ft0,ft1
+    80000338:	001015f3          	fsflags	a1,zero
+    8000033c:	01000613          	li	a2,16
+    80000340:	08d51e63          	bne	a0,a3,800003dc <fail>
+    80000344:	08c59c63          	bne	a1,a2,800003dc <fail>
+
+0000000080000348 <test_14>:
+    80000348:	00e00193          	li	gp,14
+    8000034c:	00002517          	auipc	a0,0x2
+    80000350:	d7450513          	addi	a0,a0,-652 # 800020c0 <test_14_data>
+    80000354:	00052007          	flw	ft0,0(a0)
+    80000358:	00452087          	flw	ft1,4(a0)
+    8000035c:	00852107          	flw	ft2,8(a0)
+    80000360:	00c52683          	lw	a3,12(a0)
+    80000364:	a0100553          	fle.s	a0,ft0,ft1
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	01000613          	li	a2,16
+    80000370:	06d51663          	bne	a0,a3,800003dc <fail>
+    80000374:	06c59463          	bne	a1,a2,800003dc <fail>
+
+0000000080000378 <test_15>:
+    80000378:	00f00193          	li	gp,15
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	d5450513          	addi	a0,a0,-684 # 800020d0 <test_15_data>
+    80000384:	00052007          	flw	ft0,0(a0)
+    80000388:	00452087          	flw	ft1,4(a0)
+    8000038c:	00852107          	flw	ft2,8(a0)
+    80000390:	00c52683          	lw	a3,12(a0)
+    80000394:	a0100553          	fle.s	a0,ft0,ft1
+    80000398:	001015f3          	fsflags	a1,zero
+    8000039c:	01000613          	li	a2,16
+    800003a0:	02d51e63          	bne	a0,a3,800003dc <fail>
+    800003a4:	02c59c63          	bne	a1,a2,800003dc <fail>
+
+00000000800003a8 <test_16>:
+    800003a8:	01000193          	li	gp,16
+    800003ac:	00002517          	auipc	a0,0x2
+    800003b0:	d3450513          	addi	a0,a0,-716 # 800020e0 <test_16_data>
+    800003b4:	00052007          	flw	ft0,0(a0)
+    800003b8:	00452087          	flw	ft1,4(a0)
+    800003bc:	00852107          	flw	ft2,8(a0)
+    800003c0:	00c52683          	lw	a3,12(a0)
+    800003c4:	a0100553          	fle.s	a0,ft0,ft1
+    800003c8:	001015f3          	fsflags	a1,zero
+    800003cc:	01000613          	li	a2,16
+    800003d0:	00d51663          	bne	a0,a3,800003dc <fail>
+    800003d4:	00c59463          	bne	a1,a2,800003dc <fail>
+    800003d8:	00301c63          	bne	zero,gp,800003f0 <pass>
+
+00000000800003dc <fail>:
+    800003dc:	0ff0000f          	fence
+    800003e0:	00018063          	beqz	gp,800003e0 <fail+0x4>
+    800003e4:	00119193          	slli	gp,gp,0x1
+    800003e8:	0011e193          	ori	gp,gp,1
+    800003ec:	00000073          	ecall
+
+00000000800003f0 <pass>:
+    800003f0:	0ff0000f          	fence
+    800003f4:	00100193          	li	gp,1
+    800003f8:	00000073          	ecall
+    800003fc:	c0001073          	unimp
+    80000400:	0000                	unimp
+    80000402:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	bfae147b          	0xbfae147b
+    80002004:	bfae147b          	0xbfae147b
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0001                	nop
+    8000200e:	0000                	unimp
+
+0000000080002010 <test_3_data>:
+    80002010:	bfae147b          	0xbfae147b
+    80002014:	bfae147b          	0xbfae147b
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	0001                	nop
+    8000201e:	0000                	unimp
+
+0000000080002020 <test_4_data>:
+    80002020:	bfae147b          	0xbfae147b
+    80002024:	bfae147b          	0xbfae147b
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	0000                	unimp
+    8000202e:	0000                	unimp
+
+0000000080002030 <test_5_data>:
+    80002030:	5c29                	li	s8,-22
+    80002032:	147bbfaf          	0x147bbfaf
+    80002036:	bfae                	fsd	fa1,504(sp)
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	0000                	unimp
+    8000203e:	0000                	unimp
+
+0000000080002040 <test_6_data>:
+    80002040:	5c29                	li	s8,-22
+    80002042:	147bbfaf          	0x147bbfaf
+    80002046:	bfae                	fsd	fa1,504(sp)
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0001                	nop
+    8000204e:	0000                	unimp
+
+0000000080002050 <test_7_data>:
+    80002050:	5c29                	li	s8,-22
+    80002052:	147bbfaf          	0x147bbfaf
+    80002056:	bfae                	fsd	fa1,504(sp)
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0001                	nop
+    8000205e:	0000                	unimp
+
+0000000080002060 <test_8_data>:
+    80002060:	ffff                	0xffff
+    80002062:	7fff                	0x7fff
+    80002064:	0000                	unimp
+    80002066:	0000                	unimp
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	0000                	unimp
+
+0000000080002070 <test_9_data>:
+    80002070:	ffff                	0xffff
+    80002072:	7fff                	0x7fff
+    80002074:	ffff                	0xffff
+    80002076:	7fff                	0x7fff
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	0000                	unimp
+
+0000000080002080 <test_10_data>:
+    80002080:	0001                	nop
+    80002082:	7f80                	ld	s0,56(a5)
+    80002084:	0000                	unimp
+    80002086:	0000                	unimp
+    80002088:	0000                	unimp
+    8000208a:	0000                	unimp
+    8000208c:	0000                	unimp
+    8000208e:	0000                	unimp
+
+0000000080002090 <test_11_data>:
+    80002090:	ffff                	0xffff
+    80002092:	7fff                	0x7fff
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	0000                	unimp
+
+00000000800020a0 <test_12_data>:
+    800020a0:	ffff                	0xffff
+    800020a2:	7fff                	0x7fff
+    800020a4:	ffff                	0xffff
+    800020a6:	7fff                	0x7fff
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	0000                	unimp
+
+00000000800020b0 <test_13_data>:
+    800020b0:	0001                	nop
+    800020b2:	7f80                	ld	s0,56(a5)
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	0000                	unimp
+
+00000000800020c0 <test_14_data>:
+    800020c0:	ffff                	0xffff
+    800020c2:	7fff                	0x7fff
+    800020c4:	0000                	unimp
+    800020c6:	0000                	unimp
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	0000                	unimp
+
+00000000800020d0 <test_15_data>:
+    800020d0:	ffff                	0xffff
+    800020d2:	7fff                	0x7fff
+    800020d4:	ffff                	0xffff
+    800020d6:	7fff                	0x7fff
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	0000                	unimp
+
+00000000800020e0 <test_16_data>:
+    800020e0:	0001                	nop
+    800020e2:	7f80                	ld	s0,56(a5)
+    800020e4:	0000                	unimp
+    800020e6:	0000                	unimp
+    800020e8:	0000                	unimp
+    800020ea:	0000                	unimp
+    800020ec:	0000                	unimp
+    800020ee:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-p-fcmp.elf b/test/riscv-tests/rv64uf-p-fcmp.elf
new file mode 100644
index 0000000..42039b2
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcmp.elf
diff --git a/test/riscv-tests/rv64uf-p-fcvt.dump b/test/riscv-tests/rv64uf-p-fcvt.dump
new file mode 100644
index 0000000..f46a881
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcvt.dump
@@ -0,0 +1,243 @@
+
+rv64uf-p-fcvt:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052683          	lw	a3,0(a0)
+    80000118:	00200513          	li	a0,2
+    8000011c:	d0057053          	fcvt.s.w	ft0,a0
+    80000120:	00101073          	fsflags	zero
+    80000124:	e0000553          	fmv.x.w	a0,ft0
+    80000128:	10d51263          	bne	a0,a3,8000022c <fail>
+
+000000008000012c <test_3>:
+    8000012c:	00300193          	li	gp,3
+    80000130:	00002517          	auipc	a0,0x2
+    80000134:	ed450513          	addi	a0,a0,-300 # 80002004 <test_3_data>
+    80000138:	00052683          	lw	a3,0(a0)
+    8000013c:	ffe00513          	li	a0,-2
+    80000140:	d0057053          	fcvt.s.w	ft0,a0
+    80000144:	00101073          	fsflags	zero
+    80000148:	e0000553          	fmv.x.w	a0,ft0
+    8000014c:	0ed51063          	bne	a0,a3,8000022c <fail>
+
+0000000080000150 <test_4>:
+    80000150:	00400193          	li	gp,4
+    80000154:	00002517          	auipc	a0,0x2
+    80000158:	eb450513          	addi	a0,a0,-332 # 80002008 <test_4_data>
+    8000015c:	00052683          	lw	a3,0(a0)
+    80000160:	00200513          	li	a0,2
+    80000164:	d0157053          	fcvt.s.wu	ft0,a0
+    80000168:	00101073          	fsflags	zero
+    8000016c:	e0000553          	fmv.x.w	a0,ft0
+    80000170:	0ad51e63          	bne	a0,a3,8000022c <fail>
+
+0000000080000174 <test_5>:
+    80000174:	00500193          	li	gp,5
+    80000178:	00002517          	auipc	a0,0x2
+    8000017c:	e9450513          	addi	a0,a0,-364 # 8000200c <test_5_data>
+    80000180:	00052683          	lw	a3,0(a0)
+    80000184:	ffe00513          	li	a0,-2
+    80000188:	d0157053          	fcvt.s.wu	ft0,a0
+    8000018c:	00101073          	fsflags	zero
+    80000190:	e0000553          	fmv.x.w	a0,ft0
+    80000194:	08d51c63          	bne	a0,a3,8000022c <fail>
+
+0000000080000198 <test_6>:
+    80000198:	00600193          	li	gp,6
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	e7450513          	addi	a0,a0,-396 # 80002010 <test_6_data>
+    800001a4:	00052683          	lw	a3,0(a0)
+    800001a8:	00200513          	li	a0,2
+    800001ac:	d0257053          	fcvt.s.l	ft0,a0
+    800001b0:	00101073          	fsflags	zero
+    800001b4:	e0000553          	fmv.x.w	a0,ft0
+    800001b8:	06d51a63          	bne	a0,a3,8000022c <fail>
+
+00000000800001bc <test_7>:
+    800001bc:	00700193          	li	gp,7
+    800001c0:	00002517          	auipc	a0,0x2
+    800001c4:	e5450513          	addi	a0,a0,-428 # 80002014 <test_7_data>
+    800001c8:	00052683          	lw	a3,0(a0)
+    800001cc:	ffe00513          	li	a0,-2
+    800001d0:	d0257053          	fcvt.s.l	ft0,a0
+    800001d4:	00101073          	fsflags	zero
+    800001d8:	e0000553          	fmv.x.w	a0,ft0
+    800001dc:	04d51863          	bne	a0,a3,8000022c <fail>
+
+00000000800001e0 <test_8>:
+    800001e0:	00800193          	li	gp,8
+    800001e4:	00002517          	auipc	a0,0x2
+    800001e8:	e3450513          	addi	a0,a0,-460 # 80002018 <test_8_data>
+    800001ec:	00052683          	lw	a3,0(a0)
+    800001f0:	00200513          	li	a0,2
+    800001f4:	d0357053          	fcvt.s.lu	ft0,a0
+    800001f8:	00101073          	fsflags	zero
+    800001fc:	e0000553          	fmv.x.w	a0,ft0
+    80000200:	02d51663          	bne	a0,a3,8000022c <fail>
+
+0000000080000204 <test_9>:
+    80000204:	00900193          	li	gp,9
+    80000208:	00002517          	auipc	a0,0x2
+    8000020c:	e1450513          	addi	a0,a0,-492 # 8000201c <test_9_data>
+    80000210:	00052683          	lw	a3,0(a0)
+    80000214:	ffe00513          	li	a0,-2
+    80000218:	d0357053          	fcvt.s.lu	ft0,a0
+    8000021c:	00101073          	fsflags	zero
+    80000220:	e0000553          	fmv.x.w	a0,ft0
+    80000224:	00d51463          	bne	a0,a3,8000022c <fail>
+    80000228:	00301c63          	bne	zero,gp,80000240 <pass>
+
+000000008000022c <fail>:
+    8000022c:	0ff0000f          	fence
+    80000230:	00018063          	beqz	gp,80000230 <fail+0x4>
+    80000234:	00119193          	slli	gp,gp,0x1
+    80000238:	0011e193          	ori	gp,gp,1
+    8000023c:	00000073          	ecall
+
+0000000080000240 <pass>:
+    80000240:	0ff0000f          	fence
+    80000244:	00100193          	li	gp,1
+    80000248:	00000073          	ecall
+    8000024c:	c0001073          	unimp
+    80000250:	0000                	unimp
+    80000252:	0000                	unimp
+    80000254:	0000                	unimp
+    80000256:	0000                	unimp
+    80000258:	0000                	unimp
+    8000025a:	0000                	unimp
+    8000025c:	0000                	unimp
+    8000025e:	0000                	unimp
+    80000260:	0000                	unimp
+    80000262:	0000                	unimp
+    80000264:	0000                	unimp
+    80000266:	0000                	unimp
+    80000268:	0000                	unimp
+    8000026a:	0000                	unimp
+    8000026c:	0000                	unimp
+    8000026e:	0000                	unimp
+    80000270:	0000                	unimp
+    80000272:	0000                	unimp
+    80000274:	0000                	unimp
+    80000276:	0000                	unimp
+    80000278:	0000                	unimp
+    8000027a:	0000                	unimp
+    8000027c:	0000                	unimp
+    8000027e:	0000                	unimp
+    80000280:	0000                	unimp
+    80000282:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	4000                	lw	s0,0(s0)
+
+0000000080002004 <test_3_data>:
+    80002004:	0000                	unimp
+    80002006:	c000                	sw	s0,0(s0)
+
+0000000080002008 <test_4_data>:
+    80002008:	0000                	unimp
+    8000200a:	4000                	lw	s0,0(s0)
+
+000000008000200c <test_5_data>:
+    8000200c:	0000                	unimp
+    8000200e:	4f80                	lw	s0,24(a5)
+
+0000000080002010 <test_6_data>:
+    80002010:	0000                	unimp
+    80002012:	4000                	lw	s0,0(s0)
+
+0000000080002014 <test_7_data>:
+    80002014:	0000                	unimp
+    80002016:	c000                	sw	s0,0(s0)
+
+0000000080002018 <test_8_data>:
+    80002018:	0000                	unimp
+    8000201a:	4000                	lw	s0,0(s0)
+
+000000008000201c <test_9_data>:
+    8000201c:	0000                	unimp
+    8000201e:	5f80                	lw	s0,56(a5)
diff --git a/test/riscv-tests/rv64uf-p-fcvt.elf b/test/riscv-tests/rv64uf-p-fcvt.elf
new file mode 100644
index 0000000..bfcbcf0
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcvt.elf
diff --git a/test/riscv-tests/rv64uf-p-fcvt_w.dump b/test/riscv-tests/rv64uf-p-fcvt_w.dump
new file mode 100644
index 0000000..26df961
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcvt_w.dump
@@ -0,0 +1,1005 @@
+
+rv64uf-p-fcvt_w:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000128:	001015f3          	fsflags	a1,zero
+    8000012c:	00100613          	li	a2,1
+    80000130:	72d51a63          	bne	a0,a3,80000864 <fail>
+    80000134:	72c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000138 <test_3>:
+    80000138:	00300193          	li	gp,3
+    8000013c:	00002517          	auipc	a0,0x2
+    80000140:	ed450513          	addi	a0,a0,-300 # 80002010 <test_3_data>
+    80000144:	00052007          	flw	ft0,0(a0)
+    80000148:	00452087          	flw	ft1,4(a0)
+    8000014c:	00852107          	flw	ft2,8(a0)
+    80000150:	00c52683          	lw	a3,12(a0)
+    80000154:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000158:	001015f3          	fsflags	a1,zero
+    8000015c:	00000613          	li	a2,0
+    80000160:	70d51263          	bne	a0,a3,80000864 <fail>
+    80000164:	70c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000168 <test_4>:
+    80000168:	00400193          	li	gp,4
+    8000016c:	00002517          	auipc	a0,0x2
+    80000170:	eb450513          	addi	a0,a0,-332 # 80002020 <test_4_data>
+    80000174:	00052007          	flw	ft0,0(a0)
+    80000178:	00452087          	flw	ft1,4(a0)
+    8000017c:	00852107          	flw	ft2,8(a0)
+    80000180:	00c52683          	lw	a3,12(a0)
+    80000184:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000188:	001015f3          	fsflags	a1,zero
+    8000018c:	00100613          	li	a2,1
+    80000190:	6cd51a63          	bne	a0,a3,80000864 <fail>
+    80000194:	6cc59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000198 <test_5>:
+    80000198:	00500193          	li	gp,5
+    8000019c:	00002517          	auipc	a0,0x2
+    800001a0:	e9450513          	addi	a0,a0,-364 # 80002030 <test_5_data>
+    800001a4:	00052007          	flw	ft0,0(a0)
+    800001a8:	00452087          	flw	ft1,4(a0)
+    800001ac:	00852107          	flw	ft2,8(a0)
+    800001b0:	00c52683          	lw	a3,12(a0)
+    800001b4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    800001b8:	001015f3          	fsflags	a1,zero
+    800001bc:	00100613          	li	a2,1
+    800001c0:	6ad51263          	bne	a0,a3,80000864 <fail>
+    800001c4:	6ac59063          	bne	a1,a2,80000864 <fail>
+
+00000000800001c8 <test_6>:
+    800001c8:	00600193          	li	gp,6
+    800001cc:	00002517          	auipc	a0,0x2
+    800001d0:	e7450513          	addi	a0,a0,-396 # 80002040 <test_6_data>
+    800001d4:	00052007          	flw	ft0,0(a0)
+    800001d8:	00452087          	flw	ft1,4(a0)
+    800001dc:	00852107          	flw	ft2,8(a0)
+    800001e0:	00c52683          	lw	a3,12(a0)
+    800001e4:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    800001e8:	001015f3          	fsflags	a1,zero
+    800001ec:	00000613          	li	a2,0
+    800001f0:	66d51a63          	bne	a0,a3,80000864 <fail>
+    800001f4:	66c59863          	bne	a1,a2,80000864 <fail>
+
+00000000800001f8 <test_7>:
+    800001f8:	00700193          	li	gp,7
+    800001fc:	00002517          	auipc	a0,0x2
+    80000200:	e5450513          	addi	a0,a0,-428 # 80002050 <test_7_data>
+    80000204:	00052007          	flw	ft0,0(a0)
+    80000208:	00452087          	flw	ft1,4(a0)
+    8000020c:	00852107          	flw	ft2,8(a0)
+    80000210:	00c52683          	lw	a3,12(a0)
+    80000214:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000218:	001015f3          	fsflags	a1,zero
+    8000021c:	00100613          	li	a2,1
+    80000220:	64d51263          	bne	a0,a3,80000864 <fail>
+    80000224:	64c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000228 <test_8>:
+    80000228:	00800193          	li	gp,8
+    8000022c:	00002517          	auipc	a0,0x2
+    80000230:	e3450513          	addi	a0,a0,-460 # 80002060 <test_8_data>
+    80000234:	00052007          	flw	ft0,0(a0)
+    80000238:	00452087          	flw	ft1,4(a0)
+    8000023c:	00852107          	flw	ft2,8(a0)
+    80000240:	00c52683          	lw	a3,12(a0)
+    80000244:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000248:	001015f3          	fsflags	a1,zero
+    8000024c:	01000613          	li	a2,16
+    80000250:	60d51a63          	bne	a0,a3,80000864 <fail>
+    80000254:	60c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000258 <test_9>:
+    80000258:	00900193          	li	gp,9
+    8000025c:	00002517          	auipc	a0,0x2
+    80000260:	e1450513          	addi	a0,a0,-492 # 80002070 <test_9_data>
+    80000264:	00052007          	flw	ft0,0(a0)
+    80000268:	00452087          	flw	ft1,4(a0)
+    8000026c:	00852107          	flw	ft2,8(a0)
+    80000270:	00c52683          	lw	a3,12(a0)
+    80000274:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80000278:	001015f3          	fsflags	a1,zero
+    8000027c:	01000613          	li	a2,16
+    80000280:	5ed51263          	bne	a0,a3,80000864 <fail>
+    80000284:	5ec59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000288 <test_12>:
+    80000288:	00c00193          	li	gp,12
+    8000028c:	00002517          	auipc	a0,0x2
+    80000290:	df450513          	addi	a0,a0,-524 # 80002080 <test_12_data>
+    80000294:	00052007          	flw	ft0,0(a0)
+    80000298:	00452087          	flw	ft1,4(a0)
+    8000029c:	00852107          	flw	ft2,8(a0)
+    800002a0:	00c52683          	lw	a3,12(a0)
+    800002a4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    800002a8:	001015f3          	fsflags	a1,zero
+    800002ac:	01000613          	li	a2,16
+    800002b0:	5ad51a63          	bne	a0,a3,80000864 <fail>
+    800002b4:	5ac59863          	bne	a1,a2,80000864 <fail>
+
+00000000800002b8 <test_13>:
+    800002b8:	00d00193          	li	gp,13
+    800002bc:	00002517          	auipc	a0,0x2
+    800002c0:	dd450513          	addi	a0,a0,-556 # 80002090 <test_13_data>
+    800002c4:	00052007          	flw	ft0,0(a0)
+    800002c8:	00452087          	flw	ft1,4(a0)
+    800002cc:	00852107          	flw	ft2,8(a0)
+    800002d0:	00c52683          	lw	a3,12(a0)
+    800002d4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    800002d8:	001015f3          	fsflags	a1,zero
+    800002dc:	01000613          	li	a2,16
+    800002e0:	58d51263          	bne	a0,a3,80000864 <fail>
+    800002e4:	58c59063          	bne	a1,a2,80000864 <fail>
+
+00000000800002e8 <test_14>:
+    800002e8:	00e00193          	li	gp,14
+    800002ec:	00002517          	auipc	a0,0x2
+    800002f0:	db450513          	addi	a0,a0,-588 # 800020a0 <test_14_data>
+    800002f4:	00052007          	flw	ft0,0(a0)
+    800002f8:	00452087          	flw	ft1,4(a0)
+    800002fc:	00852107          	flw	ft2,8(a0)
+    80000300:	00c52683          	lw	a3,12(a0)
+    80000304:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80000308:	001015f3          	fsflags	a1,zero
+    8000030c:	00100613          	li	a2,1
+    80000310:	54d51a63          	bne	a0,a3,80000864 <fail>
+    80000314:	54c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000318 <test_15>:
+    80000318:	00f00193          	li	gp,15
+    8000031c:	00002517          	auipc	a0,0x2
+    80000320:	d9450513          	addi	a0,a0,-620 # 800020b0 <test_15_data>
+    80000324:	00052007          	flw	ft0,0(a0)
+    80000328:	00452087          	flw	ft1,4(a0)
+    8000032c:	00852107          	flw	ft2,8(a0)
+    80000330:	00c52683          	lw	a3,12(a0)
+    80000334:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80000338:	001015f3          	fsflags	a1,zero
+    8000033c:	00100613          	li	a2,1
+    80000340:	52d51263          	bne	a0,a3,80000864 <fail>
+    80000344:	52c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000348 <test_16>:
+    80000348:	01000193          	li	gp,16
+    8000034c:	00002517          	auipc	a0,0x2
+    80000350:	d7450513          	addi	a0,a0,-652 # 800020c0 <test_16_data>
+    80000354:	00052007          	flw	ft0,0(a0)
+    80000358:	00452087          	flw	ft1,4(a0)
+    8000035c:	00852107          	flw	ft2,8(a0)
+    80000360:	00c52683          	lw	a3,12(a0)
+    80000364:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	4ed51a63          	bne	a0,a3,80000864 <fail>
+    80000374:	4ec59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000378 <test_17>:
+    80000378:	01100193          	li	gp,17
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	d5450513          	addi	a0,a0,-684 # 800020d0 <test_17_data>
+    80000384:	00052007          	flw	ft0,0(a0)
+    80000388:	00452087          	flw	ft1,4(a0)
+    8000038c:	00852107          	flw	ft2,8(a0)
+    80000390:	00c52683          	lw	a3,12(a0)
+    80000394:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80000398:	001015f3          	fsflags	a1,zero
+    8000039c:	00100613          	li	a2,1
+    800003a0:	4cd51263          	bne	a0,a3,80000864 <fail>
+    800003a4:	4cc59063          	bne	a1,a2,80000864 <fail>
+
+00000000800003a8 <test_18>:
+    800003a8:	01200193          	li	gp,18
+    800003ac:	00002517          	auipc	a0,0x2
+    800003b0:	d3450513          	addi	a0,a0,-716 # 800020e0 <test_18_data>
+    800003b4:	00052007          	flw	ft0,0(a0)
+    800003b8:	00452087          	flw	ft1,4(a0)
+    800003bc:	00852107          	flw	ft2,8(a0)
+    800003c0:	00c52683          	lw	a3,12(a0)
+    800003c4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    800003c8:	001015f3          	fsflags	a1,zero
+    800003cc:	01000613          	li	a2,16
+    800003d0:	48d51a63          	bne	a0,a3,80000864 <fail>
+    800003d4:	48c59863          	bne	a1,a2,80000864 <fail>
+
+00000000800003d8 <test_19>:
+    800003d8:	01300193          	li	gp,19
+    800003dc:	00002517          	auipc	a0,0x2
+    800003e0:	d1450513          	addi	a0,a0,-748 # 800020f0 <test_19_data>
+    800003e4:	00052007          	flw	ft0,0(a0)
+    800003e8:	00452087          	flw	ft1,4(a0)
+    800003ec:	00852107          	flw	ft2,8(a0)
+    800003f0:	00c52683          	lw	a3,12(a0)
+    800003f4:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    800003f8:	001015f3          	fsflags	a1,zero
+    800003fc:	00000613          	li	a2,0
+    80000400:	46d51263          	bne	a0,a3,80000864 <fail>
+    80000404:	46c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000408 <test_22>:
+    80000408:	01600193          	li	gp,22
+    8000040c:	00002517          	auipc	a0,0x2
+    80000410:	cf450513          	addi	a0,a0,-780 # 80002100 <test_22_data>
+    80000414:	00052007          	flw	ft0,0(a0)
+    80000418:	00452087          	flw	ft1,4(a0)
+    8000041c:	00852107          	flw	ft2,8(a0)
+    80000420:	00c52683          	lw	a3,12(a0)
+    80000424:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80000428:	001015f3          	fsflags	a1,zero
+    8000042c:	00100613          	li	a2,1
+    80000430:	42d51a63          	bne	a0,a3,80000864 <fail>
+    80000434:	42c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000438 <test_23>:
+    80000438:	01700193          	li	gp,23
+    8000043c:	00002517          	auipc	a0,0x2
+    80000440:	cd450513          	addi	a0,a0,-812 # 80002110 <test_23_data>
+    80000444:	00052007          	flw	ft0,0(a0)
+    80000448:	00452087          	flw	ft1,4(a0)
+    8000044c:	00852107          	flw	ft2,8(a0)
+    80000450:	00c52683          	lw	a3,12(a0)
+    80000454:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80000458:	001015f3          	fsflags	a1,zero
+    8000045c:	00000613          	li	a2,0
+    80000460:	40d51263          	bne	a0,a3,80000864 <fail>
+    80000464:	40c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000468 <test_24>:
+    80000468:	01800193          	li	gp,24
+    8000046c:	00002517          	auipc	a0,0x2
+    80000470:	cb450513          	addi	a0,a0,-844 # 80002120 <test_24_data>
+    80000474:	00052007          	flw	ft0,0(a0)
+    80000478:	00452087          	flw	ft1,4(a0)
+    8000047c:	00852107          	flw	ft2,8(a0)
+    80000480:	00c52683          	lw	a3,12(a0)
+    80000484:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80000488:	001015f3          	fsflags	a1,zero
+    8000048c:	00100613          	li	a2,1
+    80000490:	3cd51a63          	bne	a0,a3,80000864 <fail>
+    80000494:	3cc59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000498 <test_25>:
+    80000498:	01900193          	li	gp,25
+    8000049c:	00002517          	auipc	a0,0x2
+    800004a0:	c9450513          	addi	a0,a0,-876 # 80002130 <test_25_data>
+    800004a4:	00052007          	flw	ft0,0(a0)
+    800004a8:	00452087          	flw	ft1,4(a0)
+    800004ac:	00852107          	flw	ft2,8(a0)
+    800004b0:	00c52683          	lw	a3,12(a0)
+    800004b4:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    800004b8:	001015f3          	fsflags	a1,zero
+    800004bc:	00100613          	li	a2,1
+    800004c0:	3ad51263          	bne	a0,a3,80000864 <fail>
+    800004c4:	3ac59063          	bne	a1,a2,80000864 <fail>
+
+00000000800004c8 <test_26>:
+    800004c8:	01a00193          	li	gp,26
+    800004cc:	00002517          	auipc	a0,0x2
+    800004d0:	c7450513          	addi	a0,a0,-908 # 80002140 <test_26_data>
+    800004d4:	00052007          	flw	ft0,0(a0)
+    800004d8:	00452087          	flw	ft1,4(a0)
+    800004dc:	00852107          	flw	ft2,8(a0)
+    800004e0:	00c52683          	lw	a3,12(a0)
+    800004e4:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    800004e8:	001015f3          	fsflags	a1,zero
+    800004ec:	00000613          	li	a2,0
+    800004f0:	36d51a63          	bne	a0,a3,80000864 <fail>
+    800004f4:	36c59863          	bne	a1,a2,80000864 <fail>
+
+00000000800004f8 <test_27>:
+    800004f8:	01b00193          	li	gp,27
+    800004fc:	00002517          	auipc	a0,0x2
+    80000500:	c5450513          	addi	a0,a0,-940 # 80002150 <test_27_data>
+    80000504:	00052007          	flw	ft0,0(a0)
+    80000508:	00452087          	flw	ft1,4(a0)
+    8000050c:	00852107          	flw	ft2,8(a0)
+    80000510:	00c52683          	lw	a3,12(a0)
+    80000514:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80000518:	001015f3          	fsflags	a1,zero
+    8000051c:	00100613          	li	a2,1
+    80000520:	34d51263          	bne	a0,a3,80000864 <fail>
+    80000524:	34c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000528 <test_32>:
+    80000528:	02000193          	li	gp,32
+    8000052c:	00002517          	auipc	a0,0x2
+    80000530:	c3450513          	addi	a0,a0,-972 # 80002160 <test_32_data>
+    80000534:	00052007          	flw	ft0,0(a0)
+    80000538:	00452087          	flw	ft1,4(a0)
+    8000053c:	00852107          	flw	ft2,8(a0)
+    80000540:	00c52683          	lw	a3,12(a0)
+    80000544:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80000548:	001015f3          	fsflags	a1,zero
+    8000054c:	01000613          	li	a2,16
+    80000550:	30d51a63          	bne	a0,a3,80000864 <fail>
+    80000554:	30c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000558 <test_33>:
+    80000558:	02100193          	li	gp,33
+    8000055c:	00002517          	auipc	a0,0x2
+    80000560:	c1450513          	addi	a0,a0,-1004 # 80002170 <test_33_data>
+    80000564:	00052007          	flw	ft0,0(a0)
+    80000568:	00452087          	flw	ft1,4(a0)
+    8000056c:	00852107          	flw	ft2,8(a0)
+    80000570:	00c52683          	lw	a3,12(a0)
+    80000574:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80000578:	001015f3          	fsflags	a1,zero
+    8000057c:	01000613          	li	a2,16
+    80000580:	2ed51263          	bne	a0,a3,80000864 <fail>
+    80000584:	2ec59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000588 <test_34>:
+    80000588:	02200193          	li	gp,34
+    8000058c:	00002517          	auipc	a0,0x2
+    80000590:	bf450513          	addi	a0,a0,-1036 # 80002180 <test_34_data>
+    80000594:	00052007          	flw	ft0,0(a0)
+    80000598:	00452087          	flw	ft1,4(a0)
+    8000059c:	00852107          	flw	ft2,8(a0)
+    800005a0:	00c52683          	lw	a3,12(a0)
+    800005a4:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    800005a8:	001015f3          	fsflags	a1,zero
+    800005ac:	00100613          	li	a2,1
+    800005b0:	2ad51a63          	bne	a0,a3,80000864 <fail>
+    800005b4:	2ac59863          	bne	a1,a2,80000864 <fail>
+
+00000000800005b8 <test_35>:
+    800005b8:	02300193          	li	gp,35
+    800005bc:	00002517          	auipc	a0,0x2
+    800005c0:	bd450513          	addi	a0,a0,-1068 # 80002190 <test_35_data>
+    800005c4:	00052007          	flw	ft0,0(a0)
+    800005c8:	00452087          	flw	ft1,4(a0)
+    800005cc:	00852107          	flw	ft2,8(a0)
+    800005d0:	00c52683          	lw	a3,12(a0)
+    800005d4:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    800005d8:	001015f3          	fsflags	a1,zero
+    800005dc:	00100613          	li	a2,1
+    800005e0:	28d51263          	bne	a0,a3,80000864 <fail>
+    800005e4:	28c59063          	bne	a1,a2,80000864 <fail>
+
+00000000800005e8 <test_36>:
+    800005e8:	02400193          	li	gp,36
+    800005ec:	00002517          	auipc	a0,0x2
+    800005f0:	bb450513          	addi	a0,a0,-1100 # 800021a0 <test_36_data>
+    800005f4:	00052007          	flw	ft0,0(a0)
+    800005f8:	00452087          	flw	ft1,4(a0)
+    800005fc:	00852107          	flw	ft2,8(a0)
+    80000600:	00c52683          	lw	a3,12(a0)
+    80000604:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80000608:	001015f3          	fsflags	a1,zero
+    8000060c:	00000613          	li	a2,0
+    80000610:	24d51a63          	bne	a0,a3,80000864 <fail>
+    80000614:	24c59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000618 <test_37>:
+    80000618:	02500193          	li	gp,37
+    8000061c:	00002517          	auipc	a0,0x2
+    80000620:	b9450513          	addi	a0,a0,-1132 # 800021b0 <test_37_data>
+    80000624:	00052007          	flw	ft0,0(a0)
+    80000628:	00452087          	flw	ft1,4(a0)
+    8000062c:	00852107          	flw	ft2,8(a0)
+    80000630:	00c52683          	lw	a3,12(a0)
+    80000634:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80000638:	001015f3          	fsflags	a1,zero
+    8000063c:	00100613          	li	a2,1
+    80000640:	22d51263          	bne	a0,a3,80000864 <fail>
+    80000644:	22c59063          	bne	a1,a2,80000864 <fail>
+
+0000000080000648 <test_38>:
+    80000648:	02600193          	li	gp,38
+    8000064c:	00002517          	auipc	a0,0x2
+    80000650:	b7450513          	addi	a0,a0,-1164 # 800021c0 <test_38_data>
+    80000654:	00052007          	flw	ft0,0(a0)
+    80000658:	00452087          	flw	ft1,4(a0)
+    8000065c:	00852107          	flw	ft2,8(a0)
+    80000660:	00c52683          	lw	a3,12(a0)
+    80000664:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80000668:	001015f3          	fsflags	a1,zero
+    8000066c:	01000613          	li	a2,16
+    80000670:	1ed51a63          	bne	a0,a3,80000864 <fail>
+    80000674:	1ec59863          	bne	a1,a2,80000864 <fail>
+
+0000000080000678 <test_42>:
+    80000678:	00002097          	auipc	ra,0x2
+    8000067c:	b5808093          	addi	ra,ra,-1192 # 800021d0 <begin_signature>
+    80000680:	0000a087          	flw	ft1,0(ra)
+    80000684:	c000f0d3          	fcvt.w.s	ra,ft1
+    80000688:	80000eb7          	lui	t4,0x80000
+    8000068c:	fffe8e9b          	addiw	t4,t4,-1
+    80000690:	02a00193          	li	gp,42
+    80000694:	1dd09863          	bne	ra,t4,80000864 <fail>
+
+0000000080000698 <test_44>:
+    80000698:	00002097          	auipc	ra,0x2
+    8000069c:	b3808093          	addi	ra,ra,-1224 # 800021d0 <begin_signature>
+    800006a0:	0080a087          	flw	ft1,8(ra)
+    800006a4:	c000f0d3          	fcvt.w.s	ra,ft1
+    800006a8:	80000eb7          	lui	t4,0x80000
+    800006ac:	02c00193          	li	gp,44
+    800006b0:	1bd09a63          	bne	ra,t4,80000864 <fail>
+
+00000000800006b4 <test_43>:
+    800006b4:	00002097          	auipc	ra,0x2
+    800006b8:	b1c08093          	addi	ra,ra,-1252 # 800021d0 <begin_signature>
+    800006bc:	0000a087          	flw	ft1,0(ra)
+    800006c0:	c020f0d3          	fcvt.l.s	ra,ft1
+    800006c4:	fff00e9b          	addiw	t4,zero,-1
+    800006c8:	03fe9e93          	slli	t4,t4,0x3f
+    800006cc:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffffddff>
+    800006d0:	02b00193          	li	gp,43
+    800006d4:	19d09863          	bne	ra,t4,80000864 <fail>
+
+00000000800006d8 <test_45>:
+    800006d8:	00002097          	auipc	ra,0x2
+    800006dc:	af808093          	addi	ra,ra,-1288 # 800021d0 <begin_signature>
+    800006e0:	0080a087          	flw	ft1,8(ra)
+    800006e4:	c020f0d3          	fcvt.l.s	ra,ft1
+    800006e8:	fff00e9b          	addiw	t4,zero,-1
+    800006ec:	03fe9e93          	slli	t4,t4,0x3f
+    800006f0:	02d00193          	li	gp,45
+    800006f4:	17d09863          	bne	ra,t4,80000864 <fail>
+
+00000000800006f8 <test_52>:
+    800006f8:	00002097          	auipc	ra,0x2
+    800006fc:	ad808093          	addi	ra,ra,-1320 # 800021d0 <begin_signature>
+    80000700:	0040a087          	flw	ft1,4(ra)
+    80000704:	c000f0d3          	fcvt.w.s	ra,ft1
+    80000708:	80000eb7          	lui	t4,0x80000
+    8000070c:	fffe8e9b          	addiw	t4,t4,-1
+    80000710:	03400193          	li	gp,52
+    80000714:	15d09863          	bne	ra,t4,80000864 <fail>
+
+0000000080000718 <test_54>:
+    80000718:	00002097          	auipc	ra,0x2
+    8000071c:	ab808093          	addi	ra,ra,-1352 # 800021d0 <begin_signature>
+    80000720:	00c0a087          	flw	ft1,12(ra)
+    80000724:	c000f0d3          	fcvt.w.s	ra,ft1
+    80000728:	80000eb7          	lui	t4,0x80000
+    8000072c:	fffe8e9b          	addiw	t4,t4,-1
+    80000730:	03600193          	li	gp,54
+    80000734:	13d09863          	bne	ra,t4,80000864 <fail>
+
+0000000080000738 <test_53>:
+    80000738:	00002097          	auipc	ra,0x2
+    8000073c:	a9808093          	addi	ra,ra,-1384 # 800021d0 <begin_signature>
+    80000740:	0040a087          	flw	ft1,4(ra)
+    80000744:	c020f0d3          	fcvt.l.s	ra,ft1
+    80000748:	fff00e9b          	addiw	t4,zero,-1
+    8000074c:	03fe9e93          	slli	t4,t4,0x3f
+    80000750:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffffddff>
+    80000754:	03500193          	li	gp,53
+    80000758:	11d09663          	bne	ra,t4,80000864 <fail>
+
+000000008000075c <test_55>:
+    8000075c:	00002097          	auipc	ra,0x2
+    80000760:	a7408093          	addi	ra,ra,-1420 # 800021d0 <begin_signature>
+    80000764:	00c0a087          	flw	ft1,12(ra)
+    80000768:	c020f0d3          	fcvt.l.s	ra,ft1
+    8000076c:	fff00e9b          	addiw	t4,zero,-1
+    80000770:	03fe9e93          	slli	t4,t4,0x3f
+    80000774:	fffe8e93          	addi	t4,t4,-1
+    80000778:	03700193          	li	gp,55
+    8000077c:	0fd09463          	bne	ra,t4,80000864 <fail>
+
+0000000080000780 <test_62>:
+    80000780:	00002097          	auipc	ra,0x2
+    80000784:	a5008093          	addi	ra,ra,-1456 # 800021d0 <begin_signature>
+    80000788:	0000a087          	flw	ft1,0(ra)
+    8000078c:	c010f0d3          	fcvt.wu.s	ra,ft1
+    80000790:	fff00e93          	li	t4,-1
+    80000794:	03e00193          	li	gp,62
+    80000798:	0dd09663          	bne	ra,t4,80000864 <fail>
+
+000000008000079c <test_63>:
+    8000079c:	00002097          	auipc	ra,0x2
+    800007a0:	a3408093          	addi	ra,ra,-1484 # 800021d0 <begin_signature>
+    800007a4:	0040a087          	flw	ft1,4(ra)
+    800007a8:	c010f0d3          	fcvt.wu.s	ra,ft1
+    800007ac:	fff00e93          	li	t4,-1
+    800007b0:	03f00193          	li	gp,63
+    800007b4:	0bd09863          	bne	ra,t4,80000864 <fail>
+
+00000000800007b8 <test_64>:
+    800007b8:	00002097          	auipc	ra,0x2
+    800007bc:	a1808093          	addi	ra,ra,-1512 # 800021d0 <begin_signature>
+    800007c0:	0080a087          	flw	ft1,8(ra)
+    800007c4:	c010f0d3          	fcvt.wu.s	ra,ft1
+    800007c8:	00000e93          	li	t4,0
+    800007cc:	04000193          	li	gp,64
+    800007d0:	09d09a63          	bne	ra,t4,80000864 <fail>
+
+00000000800007d4 <test_65>:
+    800007d4:	00002097          	auipc	ra,0x2
+    800007d8:	9fc08093          	addi	ra,ra,-1540 # 800021d0 <begin_signature>
+    800007dc:	00c0a087          	flw	ft1,12(ra)
+    800007e0:	c010f0d3          	fcvt.wu.s	ra,ft1
+    800007e4:	fff00e93          	li	t4,-1
+    800007e8:	04100193          	li	gp,65
+    800007ec:	07d09c63          	bne	ra,t4,80000864 <fail>
+
+00000000800007f0 <test_66>:
+    800007f0:	00002097          	auipc	ra,0x2
+    800007f4:	9e008093          	addi	ra,ra,-1568 # 800021d0 <begin_signature>
+    800007f8:	0000a087          	flw	ft1,0(ra)
+    800007fc:	c030f0d3          	fcvt.lu.s	ra,ft1
+    80000800:	fff00e93          	li	t4,-1
+    80000804:	04200193          	li	gp,66
+    80000808:	05d09e63          	bne	ra,t4,80000864 <fail>
+
+000000008000080c <test_67>:
+    8000080c:	00002097          	auipc	ra,0x2
+    80000810:	9c408093          	addi	ra,ra,-1596 # 800021d0 <begin_signature>
+    80000814:	0040a087          	flw	ft1,4(ra)
+    80000818:	c030f0d3          	fcvt.lu.s	ra,ft1
+    8000081c:	fff00e93          	li	t4,-1
+    80000820:	04300193          	li	gp,67
+    80000824:	05d09063          	bne	ra,t4,80000864 <fail>
+
+0000000080000828 <test_68>:
+    80000828:	00002097          	auipc	ra,0x2
+    8000082c:	9a808093          	addi	ra,ra,-1624 # 800021d0 <begin_signature>
+    80000830:	0080a087          	flw	ft1,8(ra)
+    80000834:	c030f0d3          	fcvt.lu.s	ra,ft1
+    80000838:	00000e93          	li	t4,0
+    8000083c:	04400193          	li	gp,68
+    80000840:	03d09263          	bne	ra,t4,80000864 <fail>
+
+0000000080000844 <test_69>:
+    80000844:	00002097          	auipc	ra,0x2
+    80000848:	98c08093          	addi	ra,ra,-1652 # 800021d0 <begin_signature>
+    8000084c:	00c0a087          	flw	ft1,12(ra)
+    80000850:	c030f0d3          	fcvt.lu.s	ra,ft1
+    80000854:	fff00e93          	li	t4,-1
+    80000858:	04500193          	li	gp,69
+    8000085c:	01d09463          	bne	ra,t4,80000864 <fail>
+    80000860:	00301c63          	bne	zero,gp,80000878 <pass>
+
+0000000080000864 <fail>:
+    80000864:	0ff0000f          	fence
+    80000868:	00018063          	beqz	gp,80000868 <fail+0x4>
+    8000086c:	00119193          	slli	gp,gp,0x1
+    80000870:	0011e193          	ori	gp,gp,1
+    80000874:	00000073          	ecall
+
+0000000080000878 <pass>:
+    80000878:	0ff0000f          	fence
+    8000087c:	00100193          	li	gp,1
+    80000880:	00000073          	ecall
+    80000884:	c0001073          	unimp
+    80000888:	0000                	unimp
+    8000088a:	0000                	unimp
+    8000088c:	0000                	unimp
+    8000088e:	0000                	unimp
+    80000890:	0000                	unimp
+    80000892:	0000                	unimp
+    80000894:	0000                	unimp
+    80000896:	0000                	unimp
+    80000898:	0000                	unimp
+    8000089a:	0000                	unimp
+    8000089c:	0000                	unimp
+    8000089e:	0000                	unimp
+    800008a0:	0000                	unimp
+    800008a2:	0000                	unimp
+    800008a4:	0000                	unimp
+    800008a6:	0000                	unimp
+    800008a8:	0000                	unimp
+    800008aa:	0000                	unimp
+    800008ac:	0000                	unimp
+    800008ae:	0000                	unimp
+    800008b0:	0000                	unimp
+    800008b2:	0000                	unimp
+    800008b4:	0000                	unimp
+    800008b6:	0000                	unimp
+    800008b8:	0000                	unimp
+    800008ba:	0000                	unimp
+    800008bc:	0000                	unimp
+    800008be:	0000                	unimp
+    800008c0:	0000                	unimp
+    800008c2:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	cccd                	beqz	s1,800020ba <test_15_data+0xa>
+    80002002:	bf8c                	fsd	fa1,56(a5)
+    80002004:	0000                	unimp
+    80002006:	0000                	unimp
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	ffff                	0xffff
+    8000200e:	ffff                	0xffff
+
+0000000080002010 <test_3_data>:
+    80002010:	0000                	unimp
+    80002012:	bf80                	fsd	fs0,56(a5)
+    80002014:	0000                	unimp
+    80002016:	0000                	unimp
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	ffff                	0xffff
+    8000201e:	ffff                	0xffff
+
+0000000080002020 <test_4_data>:
+    80002020:	6666                	ld	a2,88(sp)
+    80002022:	bf66                	fsd	fs9,440(sp)
+    80002024:	0000                	unimp
+    80002026:	0000                	unimp
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	0000                	unimp
+    8000202e:	0000                	unimp
+
+0000000080002030 <test_5_data>:
+    80002030:	6666                	ld	a2,88(sp)
+    80002032:	3f66                	fld	ft10,120(sp)
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	0000                	unimp
+    8000203e:	0000                	unimp
+
+0000000080002040 <test_6_data>:
+    80002040:	0000                	unimp
+    80002042:	3f80                	fld	fs0,56(a5)
+    80002044:	0000                	unimp
+    80002046:	0000                	unimp
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0001                	nop
+    8000204e:	0000                	unimp
+
+0000000080002050 <test_7_data>:
+    80002050:	cccd                	beqz	s1,8000210a <test_22_data+0xa>
+    80002052:	3f8c                	fld	fa1,56(a5)
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0001                	nop
+    8000205e:	0000                	unimp
+
+0000000080002060 <test_8_data>:
+    80002060:	d05e                	sw	s7,32(sp)
+    80002062:	cf32                	sw	a2,156(sp)
+    80002064:	0000                	unimp
+    80002066:	0000                	unimp
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	8000                	0x8000
+
+0000000080002070 <test_9_data>:
+    80002070:	d05e                	sw	s7,32(sp)
+    80002072:	4f32                	lw	t5,12(sp)
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	ffff                	0xffff
+    8000207e:	7fff                	0x7fff
+
+0000000080002080 <test_12_data>:
+    80002080:	0000                	unimp
+    80002082:	c040                	sw	s0,4(s0)
+    80002084:	0000                	unimp
+    80002086:	0000                	unimp
+    80002088:	0000                	unimp
+    8000208a:	0000                	unimp
+    8000208c:	0000                	unimp
+    8000208e:	0000                	unimp
+
+0000000080002090 <test_13_data>:
+    80002090:	0000                	unimp
+    80002092:	bf80                	fsd	fs0,56(a5)
+    80002094:	0000                	unimp
+    80002096:	0000                	unimp
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	0000                	unimp
+    8000209e:	0000                	unimp
+
+00000000800020a0 <test_14_data>:
+    800020a0:	6666                	ld	a2,88(sp)
+    800020a2:	bf66                	fsd	fs9,440(sp)
+    800020a4:	0000                	unimp
+    800020a6:	0000                	unimp
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	0000                	unimp
+    800020ae:	0000                	unimp
+
+00000000800020b0 <test_15_data>:
+    800020b0:	6666                	ld	a2,88(sp)
+    800020b2:	3f66                	fld	ft10,120(sp)
+    800020b4:	0000                	unimp
+    800020b6:	0000                	unimp
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	0000                	unimp
+
+00000000800020c0 <test_16_data>:
+    800020c0:	0000                	unimp
+    800020c2:	3f80                	fld	fs0,56(a5)
+    800020c4:	0000                	unimp
+    800020c6:	0000                	unimp
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0001                	nop
+    800020ce:	0000                	unimp
+
+00000000800020d0 <test_17_data>:
+    800020d0:	cccd                	beqz	s1,8000218a <test_34_data+0xa>
+    800020d2:	3f8c                	fld	fa1,56(a5)
+    800020d4:	0000                	unimp
+    800020d6:	0000                	unimp
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0001                	nop
+    800020de:	0000                	unimp
+
+00000000800020e0 <test_18_data>:
+    800020e0:	d05e                	sw	s7,32(sp)
+    800020e2:	cf32                	sw	a2,156(sp)
+    800020e4:	0000                	unimp
+    800020e6:	0000                	unimp
+    800020e8:	0000                	unimp
+    800020ea:	0000                	unimp
+    800020ec:	0000                	unimp
+    800020ee:	0000                	unimp
+
+00000000800020f0 <test_19_data>:
+    800020f0:	d05e                	sw	s7,32(sp)
+    800020f2:	4f32                	lw	t5,12(sp)
+    800020f4:	0000                	unimp
+    800020f6:	0000                	unimp
+    800020f8:	0000                	unimp
+    800020fa:	0000                	unimp
+    800020fc:	5e00                	lw	s0,56(a2)
+    800020fe:	b2d0                	fsd	fa2,160(a3)
+
+0000000080002100 <test_22_data>:
+    80002100:	cccd                	beqz	s1,800021ba <test_37_data+0xa>
+    80002102:	bf8c                	fsd	fa1,56(a5)
+    80002104:	0000                	unimp
+    80002106:	0000                	unimp
+    80002108:	0000                	unimp
+    8000210a:	0000                	unimp
+    8000210c:	ffff                	0xffff
+    8000210e:	ffff                	0xffff
+
+0000000080002110 <test_23_data>:
+    80002110:	0000                	unimp
+    80002112:	bf80                	fsd	fs0,56(a5)
+    80002114:	0000                	unimp
+    80002116:	0000                	unimp
+    80002118:	0000                	unimp
+    8000211a:	0000                	unimp
+    8000211c:	ffff                	0xffff
+    8000211e:	ffff                	0xffff
+
+0000000080002120 <test_24_data>:
+    80002120:	6666                	ld	a2,88(sp)
+    80002122:	bf66                	fsd	fs9,440(sp)
+    80002124:	0000                	unimp
+    80002126:	0000                	unimp
+    80002128:	0000                	unimp
+    8000212a:	0000                	unimp
+    8000212c:	0000                	unimp
+    8000212e:	0000                	unimp
+
+0000000080002130 <test_25_data>:
+    80002130:	6666                	ld	a2,88(sp)
+    80002132:	3f66                	fld	ft10,120(sp)
+    80002134:	0000                	unimp
+    80002136:	0000                	unimp
+    80002138:	0000                	unimp
+    8000213a:	0000                	unimp
+    8000213c:	0000                	unimp
+    8000213e:	0000                	unimp
+
+0000000080002140 <test_26_data>:
+    80002140:	0000                	unimp
+    80002142:	3f80                	fld	fs0,56(a5)
+    80002144:	0000                	unimp
+    80002146:	0000                	unimp
+    80002148:	0000                	unimp
+    8000214a:	0000                	unimp
+    8000214c:	0001                	nop
+    8000214e:	0000                	unimp
+
+0000000080002150 <test_27_data>:
+    80002150:	cccd                	beqz	s1,8000220a <_end+0xa>
+    80002152:	3f8c                	fld	fa1,56(a5)
+    80002154:	0000                	unimp
+    80002156:	0000                	unimp
+    80002158:	0000                	unimp
+    8000215a:	0000                	unimp
+    8000215c:	0001                	nop
+    8000215e:	0000                	unimp
+
+0000000080002160 <test_32_data>:
+    80002160:	0000                	unimp
+    80002162:	c040                	sw	s0,4(s0)
+    80002164:	0000                	unimp
+    80002166:	0000                	unimp
+    80002168:	0000                	unimp
+    8000216a:	0000                	unimp
+    8000216c:	0000                	unimp
+    8000216e:	0000                	unimp
+
+0000000080002170 <test_33_data>:
+    80002170:	0000                	unimp
+    80002172:	bf80                	fsd	fs0,56(a5)
+    80002174:	0000                	unimp
+    80002176:	0000                	unimp
+    80002178:	0000                	unimp
+    8000217a:	0000                	unimp
+    8000217c:	0000                	unimp
+    8000217e:	0000                	unimp
+
+0000000080002180 <test_34_data>:
+    80002180:	6666                	ld	a2,88(sp)
+    80002182:	bf66                	fsd	fs9,440(sp)
+    80002184:	0000                	unimp
+    80002186:	0000                	unimp
+    80002188:	0000                	unimp
+    8000218a:	0000                	unimp
+    8000218c:	0000                	unimp
+    8000218e:	0000                	unimp
+
+0000000080002190 <test_35_data>:
+    80002190:	6666                	ld	a2,88(sp)
+    80002192:	3f66                	fld	ft10,120(sp)
+    80002194:	0000                	unimp
+    80002196:	0000                	unimp
+    80002198:	0000                	unimp
+    8000219a:	0000                	unimp
+    8000219c:	0000                	unimp
+    8000219e:	0000                	unimp
+
+00000000800021a0 <test_36_data>:
+    800021a0:	0000                	unimp
+    800021a2:	3f80                	fld	fs0,56(a5)
+    800021a4:	0000                	unimp
+    800021a6:	0000                	unimp
+    800021a8:	0000                	unimp
+    800021aa:	0000                	unimp
+    800021ac:	0001                	nop
+    800021ae:	0000                	unimp
+
+00000000800021b0 <test_37_data>:
+    800021b0:	cccd                	beqz	s1,8000226a <_end+0x6a>
+    800021b2:	3f8c                	fld	fa1,56(a5)
+    800021b4:	0000                	unimp
+    800021b6:	0000                	unimp
+    800021b8:	0000                	unimp
+    800021ba:	0000                	unimp
+    800021bc:	0001                	nop
+    800021be:	0000                	unimp
+
+00000000800021c0 <test_38_data>:
+    800021c0:	d05e                	sw	s7,32(sp)
+    800021c2:	cf32                	sw	a2,156(sp)
+    800021c4:	0000                	unimp
+    800021c6:	0000                	unimp
+    800021c8:	0000                	unimp
+    800021ca:	0000                	unimp
+    800021cc:	0000                	unimp
+    800021ce:	0000                	unimp
+
+00000000800021d0 <begin_signature>:
+    800021d0:	ffff                	0xffff
+    800021d2:	ffff                	0xffff
+    800021d4:	ffff                	0xffff
+    800021d6:	7fff                	0x7fff
+    800021d8:	0000                	unimp
+    800021da:	ff80                	sd	s0,56(a5)
+    800021dc:	0000                	unimp
+    800021de:	7f80                	ld	s0,56(a5)
+
+00000000800021e0 <tdat_d>:
+    800021e0:	ffff                	0xffff
+    800021e2:	ffff                	0xffff
+    800021e4:	ffff                	0xffff
+    800021e6:	ffff                	0xffff
+    800021e8:	ffff                	0xffff
+    800021ea:	ffff                	0xffff
+    800021ec:	ffff                	0xffff
+    800021ee:	7fff                	0x7fff
+    800021f0:	0000                	unimp
+    800021f2:	0000                	unimp
+    800021f4:	0000                	unimp
+    800021f6:	fff0                	sd	a2,248(a5)
+    800021f8:	0000                	unimp
+    800021fa:	0000                	unimp
+    800021fc:	0000                	unimp
+    800021fe:	7ff0                	ld	a2,248(a5)
diff --git a/test/riscv-tests/rv64uf-p-fcvt_w.elf b/test/riscv-tests/rv64uf-p-fcvt_w.elf
new file mode 100644
index 0000000..2994eb4
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fcvt_w.elf
diff --git a/test/riscv-tests/rv64uf-p-fdiv.dump b/test/riscv-tests/rv64uf-p-fdiv.dump
new file mode 100644
index 0000000..def2be6
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fdiv.dump
@@ -0,0 +1,294 @@
+
+rv64uf-p-fdiv:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	181071d3          	fdiv.s	ft3,ft0,ft1
+    80000128:	e0018553          	fmv.x.w	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00100613          	li	a2,1
+    80000134:	14d51263          	bne	a0,a3,80000278 <fail>
+    80000138:	14c59063          	bne	a1,a2,80000278 <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+    80000148:	00052007          	flw	ft0,0(a0)
+    8000014c:	00452087          	flw	ft1,4(a0)
+    80000150:	00852107          	flw	ft2,8(a0)
+    80000154:	00c52683          	lw	a3,12(a0)
+    80000158:	181071d3          	fdiv.s	ft3,ft0,ft1
+    8000015c:	e0018553          	fmv.x.w	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	10d51863          	bne	a0,a3,80000278 <fail>
+    8000016c:	10c59663          	bne	a1,a2,80000278 <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+    8000017c:	00052007          	flw	ft0,0(a0)
+    80000180:	00452087          	flw	ft1,4(a0)
+    80000184:	00852107          	flw	ft2,8(a0)
+    80000188:	00c52683          	lw	a3,12(a0)
+    8000018c:	181071d3          	fdiv.s	ft3,ft0,ft1
+    80000190:	e0018553          	fmv.x.w	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	0cd51e63          	bne	a0,a3,80000278 <fail>
+    800001a0:	0cc59c63          	bne	a1,a2,80000278 <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+    800001b0:	00052007          	flw	ft0,0(a0)
+    800001b4:	00452087          	flw	ft1,4(a0)
+    800001b8:	00852107          	flw	ft2,8(a0)
+    800001bc:	00c52683          	lw	a3,12(a0)
+    800001c0:	580071d3          	fsqrt.s	ft3,ft0
+    800001c4:	e0018553          	fmv.x.w	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00100613          	li	a2,1
+    800001d0:	0ad51463          	bne	a0,a3,80000278 <fail>
+    800001d4:	0ac59263          	bne	a1,a2,80000278 <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+    800001e4:	00052007          	flw	ft0,0(a0)
+    800001e8:	00452087          	flw	ft1,4(a0)
+    800001ec:	00852107          	flw	ft2,8(a0)
+    800001f0:	00c52683          	lw	a3,12(a0)
+    800001f4:	580071d3          	fsqrt.s	ft3,ft0
+    800001f8:	e0018553          	fmv.x.w	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00000613          	li	a2,0
+    80000204:	06d51a63          	bne	a0,a3,80000278 <fail>
+    80000208:	06c59863          	bne	a1,a2,80000278 <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+    80000218:	00052007          	flw	ft0,0(a0)
+    8000021c:	00452087          	flw	ft1,4(a0)
+    80000220:	00852107          	flw	ft2,8(a0)
+    80000224:	00c52683          	lw	a3,12(a0)
+    80000228:	580071d3          	fsqrt.s	ft3,ft0
+    8000022c:	e0018553          	fmv.x.w	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	01000613          	li	a2,16
+    80000238:	04d51063          	bne	a0,a3,80000278 <fail>
+    8000023c:	02c59e63          	bne	a1,a2,80000278 <fail>
+
+0000000080000240 <test_8>:
+    80000240:	00800193          	li	gp,8
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e2050513          	addi	a0,a0,-480 # 80002064 <test_8_data>
+    8000024c:	00052007          	flw	ft0,0(a0)
+    80000250:	00452087          	flw	ft1,4(a0)
+    80000254:	00852107          	flw	ft2,8(a0)
+    80000258:	00c52683          	lw	a3,12(a0)
+    8000025c:	580071d3          	fsqrt.s	ft3,ft0
+    80000260:	e0018553          	fmv.x.w	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00100613          	li	a2,1
+    8000026c:	00d51663          	bne	a0,a3,80000278 <fail>
+    80000270:	00c59463          	bne	a1,a2,80000278 <fail>
+    80000274:	00301c63          	bne	zero,gp,8000028c <pass>
+
+0000000080000278 <fail>:
+    80000278:	0ff0000f          	fence
+    8000027c:	00018063          	beqz	gp,8000027c <fail+0x4>
+    80000280:	00119193          	slli	gp,gp,0x1
+    80000284:	0011e193          	ori	gp,gp,1
+    80000288:	00000073          	ecall
+
+000000008000028c <pass>:
+    8000028c:	0ff0000f          	fence
+    80000290:	00100193          	li	gp,1
+    80000294:	00000073          	ecall
+    80000298:	c0001073          	unimp
+    8000029c:	0000                	unimp
+    8000029e:	0000                	unimp
+    800002a0:	0000                	unimp
+    800002a2:	0000                	unimp
+    800002a4:	0000                	unimp
+    800002a6:	0000                	unimp
+    800002a8:	0000                	unimp
+    800002aa:	0000                	unimp
+    800002ac:	0000                	unimp
+    800002ae:	0000                	unimp
+    800002b0:	0000                	unimp
+    800002b2:	0000                	unimp
+    800002b4:	0000                	unimp
+    800002b6:	0000                	unimp
+    800002b8:	0000                	unimp
+    800002ba:	0000                	unimp
+    800002bc:	0000                	unimp
+    800002be:	0000                	unimp
+    800002c0:	0000                	unimp
+    800002c2:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	40490fdb          	0x40490fdb
+    80002004:	f854                	sd	a3,176(s0)
+    80002006:	402d                	c.li	zero,11
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	eee0                	sd	s0,216(a3)
+    8000200e:	          	sltiu	t6,zero,1024
+
+0000000080002010 <test_3_data>:
+    80002010:	4000                	lw	s0,0(s0)
+    80002012:	c49a                	sw	t1,72(sp)
+    80002014:	449a6333          	0x449a6333
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	c5a2                	sw	s0,200(sp)
+    8000201e:	bf7f                	0xbf7f
+
+0000000080002020 <test_4_data>:
+    80002020:	40490fdb          	0x40490fdb
+    80002024:	0000                	unimp
+    80002026:	3f80                	fld	fs0,56(a5)
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	40490fdb          	0x40490fdb
+
+0000000080002030 <test_5_data>:
+    80002030:	40490fdb          	0x40490fdb
+    80002034:	0000                	unimp
+    80002036:	0000                	unimp
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	dfc5                	beqz	a5,80001ff4 <fromhost+0xfb4>
+    8000203e:	3fe2                	fld	ft11,56(sp)
+
+0000000080002040 <test_6_data>:
+    80002040:	4000                	lw	s0,0(s0)
+    80002042:	461c                	lw	a5,8(a2)
+    80002044:	0000                	unimp
+    80002046:	0000                	unimp
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	0000                	unimp
+    8000204e:	42c8                	lw	a0,4(a3)
+
+0000000080002050 <test_7_data>:
+    80002050:	0000                	unimp
+    80002052:	bf80                	fsd	fs0,56(a5)
+    80002054:	0000                	unimp
+    80002056:	0000                	unimp
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	7fc0                	ld	s0,184(a5)
+    80002060:	0000                	unimp
+    80002062:	0000                	unimp
+
+0000000080002064 <test_8_data>:
+    80002064:	0000                	unimp
+    80002066:	0000432b          	0x432b
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	0000                	unimp
+    80002070:	3a26                	fld	fs4,104(sp)
+    80002072:	4151                	li	sp,20
+    80002074:	0000                	unimp
+    80002076:	0000                	unimp
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	0000                	unimp
+    8000207e:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-p-fdiv.elf b/test/riscv-tests/rv64uf-p-fdiv.elf
new file mode 100644
index 0000000..3501db3
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fdiv.elf
diff --git a/test/riscv-tests/rv64uf-p-fmadd.dump b/test/riscv-tests/rv64uf-p-fmadd.dump
new file mode 100644
index 0000000..6257d91
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fmadd.dump
@@ -0,0 +1,411 @@
+
+rv64uf-p-fmadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    80000128:	e0018553          	fmv.x.w	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	24d51463          	bne	a0,a3,8000037c <fail>
+    80000138:	24c59263          	bne	a1,a2,8000037c <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+    80000148:	00052007          	flw	ft0,0(a0)
+    8000014c:	00452087          	flw	ft1,4(a0)
+    80000150:	00852107          	flw	ft2,8(a0)
+    80000154:	00c52683          	lw	a3,12(a0)
+    80000158:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    8000015c:	e0018553          	fmv.x.w	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00100613          	li	a2,1
+    80000168:	20d51a63          	bne	a0,a3,8000037c <fail>
+    8000016c:	20c59863          	bne	a1,a2,8000037c <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+    8000017c:	00052007          	flw	ft0,0(a0)
+    80000180:	00452087          	flw	ft1,4(a0)
+    80000184:	00852107          	flw	ft2,8(a0)
+    80000188:	00c52683          	lw	a3,12(a0)
+    8000018c:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    80000190:	e0018553          	fmv.x.w	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	1ed51063          	bne	a0,a3,8000037c <fail>
+    800001a0:	1cc59e63          	bne	a1,a2,8000037c <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+    800001b0:	00052007          	flw	ft0,0(a0)
+    800001b4:	00452087          	flw	ft1,4(a0)
+    800001b8:	00852107          	flw	ft2,8(a0)
+    800001bc:	00c52683          	lw	a3,12(a0)
+    800001c0:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    800001c4:	e0018553          	fmv.x.w	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	1ad51663          	bne	a0,a3,8000037c <fail>
+    800001d4:	1ac59463          	bne	a1,a2,8000037c <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+    800001e4:	00052007          	flw	ft0,0(a0)
+    800001e8:	00452087          	flw	ft1,4(a0)
+    800001ec:	00852107          	flw	ft2,8(a0)
+    800001f0:	00c52683          	lw	a3,12(a0)
+    800001f4:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    800001f8:	e0018553          	fmv.x.w	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00100613          	li	a2,1
+    80000204:	16d51c63          	bne	a0,a3,8000037c <fail>
+    80000208:	16c59a63          	bne	a1,a2,8000037c <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+    80000218:	00052007          	flw	ft0,0(a0)
+    8000021c:	00452087          	flw	ft1,4(a0)
+    80000220:	00852107          	flw	ft2,8(a0)
+    80000224:	00c52683          	lw	a3,12(a0)
+    80000228:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    8000022c:	e0018553          	fmv.x.w	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00000613          	li	a2,0
+    80000238:	14d51263          	bne	a0,a3,8000037c <fail>
+    8000023c:	14c59063          	bne	a1,a2,8000037c <fail>
+
+0000000080000240 <test_8>:
+    80000240:	00800193          	li	gp,8
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_8_data>
+    8000024c:	00052007          	flw	ft0,0(a0)
+    80000250:	00452087          	flw	ft1,4(a0)
+    80000254:	00852107          	flw	ft2,8(a0)
+    80000258:	00c52683          	lw	a3,12(a0)
+    8000025c:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    80000260:	e0018553          	fmv.x.w	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	10d51863          	bne	a0,a3,8000037c <fail>
+    80000270:	10c59663          	bne	a1,a2,8000037c <fail>
+
+0000000080000274 <test_9>:
+    80000274:	00900193          	li	gp,9
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_9_data>
+    80000280:	00052007          	flw	ft0,0(a0)
+    80000284:	00452087          	flw	ft1,4(a0)
+    80000288:	00852107          	flw	ft2,8(a0)
+    8000028c:	00c52683          	lw	a3,12(a0)
+    80000290:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    80000294:	e0018553          	fmv.x.w	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00100613          	li	a2,1
+    800002a0:	0cd51e63          	bne	a0,a3,8000037c <fail>
+    800002a4:	0cc59c63          	bne	a1,a2,8000037c <fail>
+
+00000000800002a8 <test_10>:
+    800002a8:	00a00193          	li	gp,10
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_10_data>
+    800002b4:	00052007          	flw	ft0,0(a0)
+    800002b8:	00452087          	flw	ft1,4(a0)
+    800002bc:	00852107          	flw	ft2,8(a0)
+    800002c0:	00c52683          	lw	a3,12(a0)
+    800002c4:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    800002c8:	e0018553          	fmv.x.w	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00000613          	li	a2,0
+    800002d4:	0ad51463          	bne	a0,a3,8000037c <fail>
+    800002d8:	0ac59263          	bne	a1,a2,8000037c <fail>
+
+00000000800002dc <test_11>:
+    800002dc:	00b00193          	li	gp,11
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_11_data>
+    800002e8:	00052007          	flw	ft0,0(a0)
+    800002ec:	00452087          	flw	ft1,4(a0)
+    800002f0:	00852107          	flw	ft2,8(a0)
+    800002f4:	00c52683          	lw	a3,12(a0)
+    800002f8:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    800002fc:	e0018553          	fmv.x.w	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	00000613          	li	a2,0
+    80000308:	06d51a63          	bne	a0,a3,8000037c <fail>
+    8000030c:	06c59863          	bne	a1,a2,8000037c <fail>
+
+0000000080000310 <test_12>:
+    80000310:	00c00193          	li	gp,12
+    80000314:	00002517          	auipc	a0,0x2
+    80000318:	d8c50513          	addi	a0,a0,-628 # 800020a0 <test_12_data>
+    8000031c:	00052007          	flw	ft0,0(a0)
+    80000320:	00452087          	flw	ft1,4(a0)
+    80000324:	00852107          	flw	ft2,8(a0)
+    80000328:	00c52683          	lw	a3,12(a0)
+    8000032c:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    80000330:	e0018553          	fmv.x.w	a0,ft3
+    80000334:	001015f3          	fsflags	a1,zero
+    80000338:	00100613          	li	a2,1
+    8000033c:	04d51063          	bne	a0,a3,8000037c <fail>
+    80000340:	02c59e63          	bne	a1,a2,8000037c <fail>
+
+0000000080000344 <test_13>:
+    80000344:	00d00193          	li	gp,13
+    80000348:	00002517          	auipc	a0,0x2
+    8000034c:	d6850513          	addi	a0,a0,-664 # 800020b0 <test_13_data>
+    80000350:	00052007          	flw	ft0,0(a0)
+    80000354:	00452087          	flw	ft1,4(a0)
+    80000358:	00852107          	flw	ft2,8(a0)
+    8000035c:	00c52683          	lw	a3,12(a0)
+    80000360:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    80000364:	e0018553          	fmv.x.w	a0,ft3
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	00d51663          	bne	a0,a3,8000037c <fail>
+    80000374:	00c59463          	bne	a1,a2,8000037c <fail>
+    80000378:	00301c63          	bne	zero,gp,80000390 <pass>
+
+000000008000037c <fail>:
+    8000037c:	0ff0000f          	fence
+    80000380:	00018063          	beqz	gp,80000380 <fail+0x4>
+    80000384:	00119193          	slli	gp,gp,0x1
+    80000388:	0011e193          	ori	gp,gp,1
+    8000038c:	00000073          	ecall
+
+0000000080000390 <pass>:
+    80000390:	0ff0000f          	fence
+    80000394:	00100193          	li	gp,1
+    80000398:	00000073          	ecall
+    8000039c:	c0001073          	unimp
+    800003a0:	0000                	unimp
+    800003a2:	0000                	unimp
+    800003a4:	0000                	unimp
+    800003a6:	0000                	unimp
+    800003a8:	0000                	unimp
+    800003aa:	0000                	unimp
+    800003ac:	0000                	unimp
+    800003ae:	0000                	unimp
+    800003b0:	0000                	unimp
+    800003b2:	0000                	unimp
+    800003b4:	0000                	unimp
+    800003b6:	0000                	unimp
+    800003b8:	0000                	unimp
+    800003ba:	0000                	unimp
+    800003bc:	0000                	unimp
+    800003be:	0000                	unimp
+    800003c0:	0000                	unimp
+    800003c2:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	3f80                	fld	fs0,56(a5)
+    80002004:	0000                	unimp
+    80002006:	4020                	lw	s0,64(s0)
+    80002008:	0000                	unimp
+    8000200a:	3f80                	fld	fs0,56(a5)
+    8000200c:	0000                	unimp
+    8000200e:	4060                	lw	s0,68(s0)
+
+0000000080002010 <test_3_data>:
+    80002010:	0000                	unimp
+    80002012:	bf80                	fsd	fs0,56(a5)
+    80002014:	c49a6333          	0xc49a6333
+    80002018:	cccd                	beqz	s1,800020d2 <_end+0x12>
+    8000201a:	3f8c                	fld	fa1,56(a5)
+    8000201c:	8666                	mv	a2,s9
+    8000201e:	449a                	lw	s1,132(sp)
+
+0000000080002020 <test_4_data>:
+    80002020:	0000                	unimp
+    80002022:	4000                	lw	s0,0(s0)
+    80002024:	0000                	unimp
+    80002026:	c0a0                	sw	s0,64(s1)
+    80002028:	0000                	unimp
+    8000202a:	c000                	sw	s0,0(s0)
+    8000202c:	0000                	unimp
+    8000202e:	c140                	sw	s0,4(a0)
+
+0000000080002030 <test_5_data>:
+    80002030:	0000                	unimp
+    80002032:	3f80                	fld	fs0,56(a5)
+    80002034:	0000                	unimp
+    80002036:	4020                	lw	s0,64(s0)
+    80002038:	0000                	unimp
+    8000203a:	3f80                	fld	fs0,56(a5)
+    8000203c:	0000                	unimp
+    8000203e:	c060                	sw	s0,68(s0)
+
+0000000080002040 <test_6_data>:
+    80002040:	0000                	unimp
+    80002042:	bf80                	fsd	fs0,56(a5)
+    80002044:	c49a6333          	0xc49a6333
+    80002048:	cccd                	beqz	s1,80002102 <_end+0x42>
+    8000204a:	3f8c                	fld	fa1,56(a5)
+    8000204c:	8666                	mv	a2,s9
+    8000204e:	c49a                	sw	t1,72(sp)
+
+0000000080002050 <test_7_data>:
+    80002050:	0000                	unimp
+    80002052:	4000                	lw	s0,0(s0)
+    80002054:	0000                	unimp
+    80002056:	c0a0                	sw	s0,64(s1)
+    80002058:	0000                	unimp
+    8000205a:	c000                	sw	s0,0(s0)
+    8000205c:	0000                	unimp
+    8000205e:	4140                	lw	s0,4(a0)
+
+0000000080002060 <test_8_data>:
+    80002060:	0000                	unimp
+    80002062:	3f80                	fld	fs0,56(a5)
+    80002064:	0000                	unimp
+    80002066:	4020                	lw	s0,64(s0)
+    80002068:	0000                	unimp
+    8000206a:	3f80                	fld	fs0,56(a5)
+    8000206c:	0000                	unimp
+    8000206e:	3fc0                	fld	fs0,184(a5)
+
+0000000080002070 <test_9_data>:
+    80002070:	0000                	unimp
+    80002072:	bf80                	fsd	fs0,56(a5)
+    80002074:	c49a6333          	0xc49a6333
+    80002078:	cccd                	beqz	s1,80002132 <_end+0x72>
+    8000207a:	3f8c                	fld	fa1,56(a5)
+    8000207c:	4000                	lw	s0,0(s0)
+    8000207e:	449a                	lw	s1,132(sp)
+
+0000000080002080 <test_10_data>:
+    80002080:	0000                	unimp
+    80002082:	4000                	lw	s0,0(s0)
+    80002084:	0000                	unimp
+    80002086:	c0a0                	sw	s0,64(s1)
+    80002088:	0000                	unimp
+    8000208a:	c000                	sw	s0,0(s0)
+    8000208c:	0000                	unimp
+    8000208e:	c100                	sw	s0,0(a0)
+
+0000000080002090 <test_11_data>:
+    80002090:	0000                	unimp
+    80002092:	3f80                	fld	fs0,56(a5)
+    80002094:	0000                	unimp
+    80002096:	4020                	lw	s0,64(s0)
+    80002098:	0000                	unimp
+    8000209a:	3f80                	fld	fs0,56(a5)
+    8000209c:	0000                	unimp
+    8000209e:	bfc0                	fsd	fs0,184(a5)
+
+00000000800020a0 <test_12_data>:
+    800020a0:	0000                	unimp
+    800020a2:	bf80                	fsd	fs0,56(a5)
+    800020a4:	c49a6333          	0xc49a6333
+    800020a8:	cccd                	beqz	s1,80002162 <_end+0xa2>
+    800020aa:	3f8c                	fld	fa1,56(a5)
+    800020ac:	4000                	lw	s0,0(s0)
+    800020ae:	c49a                	sw	t1,72(sp)
+
+00000000800020b0 <test_13_data>:
+    800020b0:	0000                	unimp
+    800020b2:	4000                	lw	s0,0(s0)
+    800020b4:	0000                	unimp
+    800020b6:	c0a0                	sw	s0,64(s1)
+    800020b8:	0000                	unimp
+    800020ba:	c000                	sw	s0,0(s0)
+    800020bc:	0000                	unimp
+    800020be:	4100                	lw	s0,0(a0)
diff --git a/test/riscv-tests/rv64uf-p-fmadd.elf b/test/riscv-tests/rv64uf-p-fmadd.elf
new file mode 100644
index 0000000..bc5121e
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fmadd.elf
diff --git a/test/riscv-tests/rv64uf-p-fmin.dump b/test/riscv-tests/rv64uf-p-fmin.dump
new file mode 100644
index 0000000..7c47a6f
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fmin.dump
@@ -0,0 +1,553 @@
+
+rv64uf-p-fmin:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	04c0006f          	j	8000004c <reset_vector>
+
+0000000080000004 <trap_vector>:
+    80000004:	34202f73          	csrr	t5,mcause
+    80000008:	00800f93          	li	t6,8
+    8000000c:	03ff0a63          	beq	t5,t6,80000040 <write_tohost>
+    80000010:	00900f93          	li	t6,9
+    80000014:	03ff0663          	beq	t5,t6,80000040 <write_tohost>
+    80000018:	00b00f93          	li	t6,11
+    8000001c:	03ff0263          	beq	t5,t6,80000040 <write_tohost>
+    80000020:	80000f17          	auipc	t5,0x80000
+    80000024:	fe0f0f13          	addi	t5,t5,-32 # 0 <_start-0x80000000>
+    80000028:	000f0463          	beqz	t5,80000030 <trap_vector+0x2c>
+    8000002c:	000f0067          	jr	t5
+    80000030:	34202f73          	csrr	t5,mcause
+    80000034:	000f5463          	bgez	t5,8000003c <handle_exception>
+    80000038:	0040006f          	j	8000003c <handle_exception>
+
+000000008000003c <handle_exception>:
+    8000003c:	5391e193          	ori	gp,gp,1337
+
+0000000080000040 <write_tohost>:
+    80000040:	00001f17          	auipc	t5,0x1
+    80000044:	fc3f2023          	sw	gp,-64(t5) # 80001000 <tohost>
+    80000048:	ff9ff06f          	j	80000040 <write_tohost>
+
+000000008000004c <reset_vector>:
+    8000004c:	f1402573          	csrr	a0,mhartid
+    80000050:	00051063          	bnez	a0,80000050 <reset_vector+0x4>
+    80000054:	00000297          	auipc	t0,0x0
+    80000058:	01028293          	addi	t0,t0,16 # 80000064 <reset_vector+0x18>
+    8000005c:	30529073          	csrw	mtvec,t0
+    80000060:	18005073          	csrwi	satp,0
+    80000064:	00000297          	auipc	t0,0x0
+    80000068:	01c28293          	addi	t0,t0,28 # 80000080 <reset_vector+0x34>
+    8000006c:	30529073          	csrw	mtvec,t0
+    80000070:	fff00293          	li	t0,-1
+    80000074:	3b029073          	csrw	pmpaddr0,t0
+    80000078:	01f00293          	li	t0,31
+    8000007c:	3a029073          	csrw	pmpcfg0,t0
+    80000080:	00000297          	auipc	t0,0x0
+    80000084:	01828293          	addi	t0,t0,24 # 80000098 <reset_vector+0x4c>
+    80000088:	30529073          	csrw	mtvec,t0
+    8000008c:	30205073          	csrwi	medeleg,0
+    80000090:	30305073          	csrwi	mideleg,0
+    80000094:	30405073          	csrwi	mie,0
+    80000098:	00000193          	li	gp,0
+    8000009c:	00000297          	auipc	t0,0x0
+    800000a0:	f6828293          	addi	t0,t0,-152 # 80000004 <trap_vector>
+    800000a4:	30529073          	csrw	mtvec,t0
+    800000a8:	00100513          	li	a0,1
+    800000ac:	01f51513          	slli	a0,a0,0x1f
+    800000b0:	00055863          	bgez	a0,800000c0 <reset_vector+0x74>
+    800000b4:	0ff0000f          	fence
+    800000b8:	00100193          	li	gp,1
+    800000bc:	00000073          	ecall
+    800000c0:	80000297          	auipc	t0,0x80000
+    800000c4:	f4028293          	addi	t0,t0,-192 # 0 <_start-0x80000000>
+    800000c8:	00028e63          	beqz	t0,800000e4 <reset_vector+0x98>
+    800000cc:	10529073          	csrw	stvec,t0
+    800000d0:	0000b2b7          	lui	t0,0xb
+    800000d4:	1092829b          	addiw	t0,t0,265
+    800000d8:	30229073          	csrw	medeleg,t0
+    800000dc:	30202373          	csrr	t1,medeleg
+    800000e0:	f4629ee3          	bne	t0,t1,8000003c <handle_exception>
+    800000e4:	30005073          	csrwi	mstatus,0
+    800000e8:	00002537          	lui	a0,0x2
+    800000ec:	30052073          	csrs	mstatus,a0
+    800000f0:	00305073          	csrwi	fcsr,0
+    800000f4:	00000297          	auipc	t0,0x0
+    800000f8:	01428293          	addi	t0,t0,20 # 80000108 <test_2>
+    800000fc:	34129073          	csrw	mepc,t0
+    80000100:	f1402573          	csrr	a0,mhartid
+    80000104:	30200073          	mret
+
+0000000080000108 <test_2>:
+    80000108:	00200193          	li	gp,2
+    8000010c:	00002517          	auipc	a0,0x2
+    80000110:	ef450513          	addi	a0,a0,-268 # 80002000 <test_2_data>
+    80000114:	00052007          	flw	ft0,0(a0)
+    80000118:	00452087          	flw	ft1,4(a0)
+    8000011c:	00852107          	flw	ft2,8(a0)
+    80000120:	00c52683          	lw	a3,12(a0)
+    80000124:	281001d3          	fmin.s	ft3,ft0,ft1
+    80000128:	e0018553          	fmv.x.w	a0,ft3
+    8000012c:	001015f3          	fsflags	a1,zero
+    80000130:	00000613          	li	a2,0
+    80000134:	38d51063          	bne	a0,a3,800004b4 <fail>
+    80000138:	36c59e63          	bne	a1,a2,800004b4 <fail>
+
+000000008000013c <test_3>:
+    8000013c:	00300193          	li	gp,3
+    80000140:	00002517          	auipc	a0,0x2
+    80000144:	ed050513          	addi	a0,a0,-304 # 80002010 <test_3_data>
+    80000148:	00052007          	flw	ft0,0(a0)
+    8000014c:	00452087          	flw	ft1,4(a0)
+    80000150:	00852107          	flw	ft2,8(a0)
+    80000154:	00c52683          	lw	a3,12(a0)
+    80000158:	281001d3          	fmin.s	ft3,ft0,ft1
+    8000015c:	e0018553          	fmv.x.w	a0,ft3
+    80000160:	001015f3          	fsflags	a1,zero
+    80000164:	00000613          	li	a2,0
+    80000168:	34d51663          	bne	a0,a3,800004b4 <fail>
+    8000016c:	34c59463          	bne	a1,a2,800004b4 <fail>
+
+0000000080000170 <test_4>:
+    80000170:	00400193          	li	gp,4
+    80000174:	00002517          	auipc	a0,0x2
+    80000178:	eac50513          	addi	a0,a0,-340 # 80002020 <test_4_data>
+    8000017c:	00052007          	flw	ft0,0(a0)
+    80000180:	00452087          	flw	ft1,4(a0)
+    80000184:	00852107          	flw	ft2,8(a0)
+    80000188:	00c52683          	lw	a3,12(a0)
+    8000018c:	281001d3          	fmin.s	ft3,ft0,ft1
+    80000190:	e0018553          	fmv.x.w	a0,ft3
+    80000194:	001015f3          	fsflags	a1,zero
+    80000198:	00000613          	li	a2,0
+    8000019c:	30d51c63          	bne	a0,a3,800004b4 <fail>
+    800001a0:	30c59a63          	bne	a1,a2,800004b4 <fail>
+
+00000000800001a4 <test_5>:
+    800001a4:	00500193          	li	gp,5
+    800001a8:	00002517          	auipc	a0,0x2
+    800001ac:	e8850513          	addi	a0,a0,-376 # 80002030 <test_5_data>
+    800001b0:	00052007          	flw	ft0,0(a0)
+    800001b4:	00452087          	flw	ft1,4(a0)
+    800001b8:	00852107          	flw	ft2,8(a0)
+    800001bc:	00c52683          	lw	a3,12(a0)
+    800001c0:	281001d3          	fmin.s	ft3,ft0,ft1
+    800001c4:	e0018553          	fmv.x.w	a0,ft3
+    800001c8:	001015f3          	fsflags	a1,zero
+    800001cc:	00000613          	li	a2,0
+    800001d0:	2ed51263          	bne	a0,a3,800004b4 <fail>
+    800001d4:	2ec59063          	bne	a1,a2,800004b4 <fail>
+
+00000000800001d8 <test_6>:
+    800001d8:	00600193          	li	gp,6
+    800001dc:	00002517          	auipc	a0,0x2
+    800001e0:	e6450513          	addi	a0,a0,-412 # 80002040 <test_6_data>
+    800001e4:	00052007          	flw	ft0,0(a0)
+    800001e8:	00452087          	flw	ft1,4(a0)
+    800001ec:	00852107          	flw	ft2,8(a0)
+    800001f0:	00c52683          	lw	a3,12(a0)
+    800001f4:	281001d3          	fmin.s	ft3,ft0,ft1
+    800001f8:	e0018553          	fmv.x.w	a0,ft3
+    800001fc:	001015f3          	fsflags	a1,zero
+    80000200:	00000613          	li	a2,0
+    80000204:	2ad51863          	bne	a0,a3,800004b4 <fail>
+    80000208:	2ac59663          	bne	a1,a2,800004b4 <fail>
+
+000000008000020c <test_7>:
+    8000020c:	00700193          	li	gp,7
+    80000210:	00002517          	auipc	a0,0x2
+    80000214:	e4050513          	addi	a0,a0,-448 # 80002050 <test_7_data>
+    80000218:	00052007          	flw	ft0,0(a0)
+    8000021c:	00452087          	flw	ft1,4(a0)
+    80000220:	00852107          	flw	ft2,8(a0)
+    80000224:	00c52683          	lw	a3,12(a0)
+    80000228:	281001d3          	fmin.s	ft3,ft0,ft1
+    8000022c:	e0018553          	fmv.x.w	a0,ft3
+    80000230:	001015f3          	fsflags	a1,zero
+    80000234:	00000613          	li	a2,0
+    80000238:	26d51e63          	bne	a0,a3,800004b4 <fail>
+    8000023c:	26c59c63          	bne	a1,a2,800004b4 <fail>
+
+0000000080000240 <test_12>:
+    80000240:	00c00193          	li	gp,12
+    80000244:	00002517          	auipc	a0,0x2
+    80000248:	e1c50513          	addi	a0,a0,-484 # 80002060 <test_12_data>
+    8000024c:	00052007          	flw	ft0,0(a0)
+    80000250:	00452087          	flw	ft1,4(a0)
+    80000254:	00852107          	flw	ft2,8(a0)
+    80000258:	00c52683          	lw	a3,12(a0)
+    8000025c:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000260:	e0018553          	fmv.x.w	a0,ft3
+    80000264:	001015f3          	fsflags	a1,zero
+    80000268:	00000613          	li	a2,0
+    8000026c:	24d51463          	bne	a0,a3,800004b4 <fail>
+    80000270:	24c59263          	bne	a1,a2,800004b4 <fail>
+
+0000000080000274 <test_13>:
+    80000274:	00d00193          	li	gp,13
+    80000278:	00002517          	auipc	a0,0x2
+    8000027c:	df850513          	addi	a0,a0,-520 # 80002070 <test_13_data>
+    80000280:	00052007          	flw	ft0,0(a0)
+    80000284:	00452087          	flw	ft1,4(a0)
+    80000288:	00852107          	flw	ft2,8(a0)
+    8000028c:	00c52683          	lw	a3,12(a0)
+    80000290:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000294:	e0018553          	fmv.x.w	a0,ft3
+    80000298:	001015f3          	fsflags	a1,zero
+    8000029c:	00000613          	li	a2,0
+    800002a0:	20d51a63          	bne	a0,a3,800004b4 <fail>
+    800002a4:	20c59863          	bne	a1,a2,800004b4 <fail>
+
+00000000800002a8 <test_14>:
+    800002a8:	00e00193          	li	gp,14
+    800002ac:	00002517          	auipc	a0,0x2
+    800002b0:	dd450513          	addi	a0,a0,-556 # 80002080 <test_14_data>
+    800002b4:	00052007          	flw	ft0,0(a0)
+    800002b8:	00452087          	flw	ft1,4(a0)
+    800002bc:	00852107          	flw	ft2,8(a0)
+    800002c0:	00c52683          	lw	a3,12(a0)
+    800002c4:	281011d3          	fmax.s	ft3,ft0,ft1
+    800002c8:	e0018553          	fmv.x.w	a0,ft3
+    800002cc:	001015f3          	fsflags	a1,zero
+    800002d0:	00000613          	li	a2,0
+    800002d4:	1ed51063          	bne	a0,a3,800004b4 <fail>
+    800002d8:	1cc59e63          	bne	a1,a2,800004b4 <fail>
+
+00000000800002dc <test_15>:
+    800002dc:	00f00193          	li	gp,15
+    800002e0:	00002517          	auipc	a0,0x2
+    800002e4:	db050513          	addi	a0,a0,-592 # 80002090 <test_15_data>
+    800002e8:	00052007          	flw	ft0,0(a0)
+    800002ec:	00452087          	flw	ft1,4(a0)
+    800002f0:	00852107          	flw	ft2,8(a0)
+    800002f4:	00c52683          	lw	a3,12(a0)
+    800002f8:	281011d3          	fmax.s	ft3,ft0,ft1
+    800002fc:	e0018553          	fmv.x.w	a0,ft3
+    80000300:	001015f3          	fsflags	a1,zero
+    80000304:	00000613          	li	a2,0
+    80000308:	1ad51663          	bne	a0,a3,800004b4 <fail>
+    8000030c:	1ac59463          	bne	a1,a2,800004b4 <fail>
+
+0000000080000310 <test_16>:
+    80000310:	01000193          	li	gp,16
+    80000314:	00002517          	auipc	a0,0x2
+    80000318:	d8c50513          	addi	a0,a0,-628 # 800020a0 <test_16_data>
+    8000031c:	00052007          	flw	ft0,0(a0)
+    80000320:	00452087          	flw	ft1,4(a0)
+    80000324:	00852107          	flw	ft2,8(a0)
+    80000328:	00c52683          	lw	a3,12(a0)
+    8000032c:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000330:	e0018553          	fmv.x.w	a0,ft3
+    80000334:	001015f3          	fsflags	a1,zero
+    80000338:	00000613          	li	a2,0
+    8000033c:	16d51c63          	bne	a0,a3,800004b4 <fail>
+    80000340:	16c59a63          	bne	a1,a2,800004b4 <fail>
+
+0000000080000344 <test_17>:
+    80000344:	01100193          	li	gp,17
+    80000348:	00002517          	auipc	a0,0x2
+    8000034c:	d6850513          	addi	a0,a0,-664 # 800020b0 <test_17_data>
+    80000350:	00052007          	flw	ft0,0(a0)
+    80000354:	00452087          	flw	ft1,4(a0)
+    80000358:	00852107          	flw	ft2,8(a0)
+    8000035c:	00c52683          	lw	a3,12(a0)
+    80000360:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000364:	e0018553          	fmv.x.w	a0,ft3
+    80000368:	001015f3          	fsflags	a1,zero
+    8000036c:	00000613          	li	a2,0
+    80000370:	14d51263          	bne	a0,a3,800004b4 <fail>
+    80000374:	14c59063          	bne	a1,a2,800004b4 <fail>
+
+0000000080000378 <test_20>:
+    80000378:	01400193          	li	gp,20
+    8000037c:	00002517          	auipc	a0,0x2
+    80000380:	d4450513          	addi	a0,a0,-700 # 800020c0 <test_20_data>
+    80000384:	00052007          	flw	ft0,0(a0)
+    80000388:	00452087          	flw	ft1,4(a0)
+    8000038c:	00852107          	flw	ft2,8(a0)
+    80000390:	00c52683          	lw	a3,12(a0)
+    80000394:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000398:	e0018553          	fmv.x.w	a0,ft3
+    8000039c:	001015f3          	fsflags	a1,zero
+    800003a0:	01000613          	li	a2,16
+    800003a4:	10d51863          	bne	a0,a3,800004b4 <fail>
+    800003a8:	10c59663          	bne	a1,a2,800004b4 <fail>
+
+00000000800003ac <test_21>:
+    800003ac:	01500193          	li	gp,21
+    800003b0:	00002517          	auipc	a0,0x2
+    800003b4:	d2050513          	addi	a0,a0,-736 # 800020d0 <test_21_data>
+    800003b8:	00052007          	flw	ft0,0(a0)
+    800003bc:	00452087          	flw	ft1,4(a0)
+    800003c0:	00852107          	flw	ft2,8(a0)
+    800003c4:	00c52683          	lw	a3,12(a0)
+    800003c8:	281011d3          	fmax.s	ft3,ft0,ft1
+    800003cc:	e0018553          	fmv.x.w	a0,ft3
+    800003d0:	001015f3          	fsflags	a1,zero
+    800003d4:	00000613          	li	a2,0
+    800003d8:	0cd51e63          	bne	a0,a3,800004b4 <fail>
+    800003dc:	0cc59c63          	bne	a1,a2,800004b4 <fail>
+
+00000000800003e0 <test_30>:
+    800003e0:	01e00193          	li	gp,30
+    800003e4:	00002517          	auipc	a0,0x2
+    800003e8:	cfc50513          	addi	a0,a0,-772 # 800020e0 <test_30_data>
+    800003ec:	00052007          	flw	ft0,0(a0)
+    800003f0:	00452087          	flw	ft1,4(a0)
+    800003f4:	00852107          	flw	ft2,8(a0)
+    800003f8:	00c52683          	lw	a3,12(a0)
+    800003fc:	281001d3          	fmin.s	ft3,ft0,ft1
+    80000400:	e0018553          	fmv.x.w	a0,ft3
+    80000404:	001015f3          	fsflags	a1,zero
+    80000408:	00000613          	li	a2,0
+    8000040c:	0ad51463          	bne	a0,a3,800004b4 <fail>
+    80000410:	0ac59263          	bne	a1,a2,800004b4 <fail>
+
+0000000080000414 <test_31>:
+    80000414:	01f00193          	li	gp,31
+    80000418:	00002517          	auipc	a0,0x2
+    8000041c:	cd850513          	addi	a0,a0,-808 # 800020f0 <test_31_data>
+    80000420:	00052007          	flw	ft0,0(a0)
+    80000424:	00452087          	flw	ft1,4(a0)
+    80000428:	00852107          	flw	ft2,8(a0)
+    8000042c:	00c52683          	lw	a3,12(a0)
+    80000430:	281001d3          	fmin.s	ft3,ft0,ft1
+    80000434:	e0018553          	fmv.x.w	a0,ft3
+    80000438:	001015f3          	fsflags	a1,zero
+    8000043c:	00000613          	li	a2,0
+    80000440:	06d51a63          	bne	a0,a3,800004b4 <fail>
+    80000444:	06c59863          	bne	a1,a2,800004b4 <fail>
+
+0000000080000448 <test_32>:
+    80000448:	02000193          	li	gp,32
+    8000044c:	00002517          	auipc	a0,0x2
+    80000450:	cb450513          	addi	a0,a0,-844 # 80002100 <test_32_data>
+    80000454:	00052007          	flw	ft0,0(a0)
+    80000458:	00452087          	flw	ft1,4(a0)
+    8000045c:	00852107          	flw	ft2,8(a0)
+    80000460:	00c52683          	lw	a3,12(a0)
+    80000464:	281011d3          	fmax.s	ft3,ft0,ft1
+    80000468:	e0018553          	fmv.x.w	a0,ft3
+    8000046c:	001015f3          	fsflags	a1,zero
+    80000470:	00000613          	li	a2,0
+    80000474:	04d51063          	bne	a0,a3,800004b4 <fail>
+    80000478:	02c59e63          	bne	a1,a2,800004b4 <fail>
+
+000000008000047c <test_33>:
+    8000047c:	02100193          	li	gp,33
+    80000480:	00002517          	auipc	a0,0x2
+    80000484:	c9050513          	addi	a0,a0,-880 # 80002110 <test_33_data>
+    80000488:	00052007          	flw	ft0,0(a0)
+    8000048c:	00452087          	flw	ft1,4(a0)
+    80000490:	00852107          	flw	ft2,8(a0)
+    80000494:	00c52683          	lw	a3,12(a0)
+    80000498:	281011d3          	fmax.s	ft3,ft0,ft1
+    8000049c:	e0018553          	fmv.x.w	a0,ft3
+    800004a0:	001015f3          	fsflags	a1,zero
+    800004a4:	00000613          	li	a2,0
+    800004a8:	00d51663          	bne	a0,a3,800004b4 <fail>
+    800004ac:	00c59463          	bne	a1,a2,800004b4 <fail>
+    800004b0:	00301c63          	bne	zero,gp,800004c8 <pass>
+
+00000000800004b4 <fail>:
+    800004b4:	0ff0000f          	fence
+    800004b8:	00018063          	beqz	gp,800004b8 <fail+0x4>
+    800004bc:	00119193          	slli	gp,gp,0x1
+    800004c0:	0011e193          	ori	gp,gp,1
+    800004c4:	00000073          	ecall
+
+00000000800004c8 <pass>:
+    800004c8:	0ff0000f          	fence
+    800004cc:	00100193          	li	gp,1
+    800004d0:	00000073          	ecall
+    800004d4:	c0001073          	unimp
+    800004d8:	0000                	unimp
+    800004da:	0000                	unimp
+    800004dc:	0000                	unimp
+    800004de:	0000                	unimp
+    800004e0:	0000                	unimp
+    800004e2:	0000                	unimp
+    800004e4:	0000                	unimp
+    800004e6:	0000                	unimp
+    800004e8:	0000                	unimp
+    800004ea:	0000                	unimp
+    800004ec:	0000                	unimp
+    800004ee:	0000                	unimp
+    800004f0:	0000                	unimp
+    800004f2:	0000                	unimp
+    800004f4:	0000                	unimp
+    800004f6:	0000                	unimp
+    800004f8:	0000                	unimp
+    800004fa:	0000                	unimp
+    800004fc:	0000                	unimp
+    800004fe:	0000                	unimp
+    80000500:	0000                	unimp
+    80000502:	0000                	unimp
+
+Disassembly of section .data:
+
+0000000080002000 <test_2_data>:
+    80002000:	0000                	unimp
+    80002002:	4020                	lw	s0,64(s0)
+    80002004:	0000                	unimp
+    80002006:	3f80                	fld	fs0,56(a5)
+    80002008:	0000                	unimp
+    8000200a:	0000                	unimp
+    8000200c:	0000                	unimp
+    8000200e:	3f80                	fld	fs0,56(a5)
+
+0000000080002010 <test_3_data>:
+    80002010:	c49a6333          	0xc49a6333
+    80002014:	cccd                	beqz	s1,800020ce <test_20_data+0xe>
+    80002016:	3f8c                	fld	fa1,56(a5)
+    80002018:	0000                	unimp
+    8000201a:	0000                	unimp
+    8000201c:	c49a6333          	0xc49a6333
+
+0000000080002020 <test_4_data>:
+    80002020:	cccd                	beqz	s1,800020da <test_21_data+0xa>
+    80002022:	3f8c                	fld	fa1,56(a5)
+    80002024:	c49a6333          	0xc49a6333
+    80002028:	0000                	unimp
+    8000202a:	0000                	unimp
+    8000202c:	c49a6333          	0xc49a6333
+
+0000000080002030 <test_5_data>:
+    80002030:	ffff                	0xffff
+    80002032:	7fff                	0x7fff
+    80002034:	c49a6333          	0xc49a6333
+    80002038:	0000                	unimp
+    8000203a:	0000                	unimp
+    8000203c:	c49a6333          	0xc49a6333
+
+0000000080002040 <test_6_data>:
+    80002040:	40490fdb          	0x40490fdb
+    80002044:	322bcc77          	0x322bcc77
+    80002048:	0000                	unimp
+    8000204a:	0000                	unimp
+    8000204c:	322bcc77          	0x322bcc77
+
+0000000080002050 <test_7_data>:
+    80002050:	0000                	unimp
+    80002052:	bf80                	fsd	fs0,56(a5)
+    80002054:	0000                	unimp
+    80002056:	c000                	sw	s0,0(s0)
+    80002058:	0000                	unimp
+    8000205a:	0000                	unimp
+    8000205c:	0000                	unimp
+    8000205e:	c000                	sw	s0,0(s0)
+
+0000000080002060 <test_12_data>:
+    80002060:	0000                	unimp
+    80002062:	4020                	lw	s0,64(s0)
+    80002064:	0000                	unimp
+    80002066:	3f80                	fld	fs0,56(a5)
+    80002068:	0000                	unimp
+    8000206a:	0000                	unimp
+    8000206c:	0000                	unimp
+    8000206e:	4020                	lw	s0,64(s0)
+
+0000000080002070 <test_13_data>:
+    80002070:	c49a6333          	0xc49a6333
+    80002074:	cccd                	beqz	s1,8000212e <_end+0xe>
+    80002076:	3f8c                	fld	fa1,56(a5)
+    80002078:	0000                	unimp
+    8000207a:	0000                	unimp
+    8000207c:	cccd                	beqz	s1,80002136 <_end+0x16>
+    8000207e:	3f8c                	fld	fa1,56(a5)
+
+0000000080002080 <test_14_data>:
+    80002080:	cccd                	beqz	s1,8000213a <_end+0x1a>
+    80002082:	3f8c                	fld	fa1,56(a5)
+    80002084:	c49a6333          	0xc49a6333
+    80002088:	0000                	unimp
+    8000208a:	0000                	unimp
+    8000208c:	cccd                	beqz	s1,80002146 <_end+0x26>
+    8000208e:	3f8c                	fld	fa1,56(a5)
+
+0000000080002090 <test_15_data>:
+    80002090:	ffff                	0xffff
+    80002092:	7fff                	0x7fff
+    80002094:	c49a6333          	0xc49a6333
+    80002098:	0000                	unimp
+    8000209a:	0000                	unimp
+    8000209c:	c49a6333          	0xc49a6333
+
+00000000800020a0 <test_16_data>:
+    800020a0:	40490fdb          	0x40490fdb
+    800020a4:	322bcc77          	0x322bcc77
+    800020a8:	0000                	unimp
+    800020aa:	0000                	unimp
+    800020ac:	40490fdb          	0x40490fdb
+
+00000000800020b0 <test_17_data>:
+    800020b0:	0000                	unimp
+    800020b2:	bf80                	fsd	fs0,56(a5)
+    800020b4:	0000                	unimp
+    800020b6:	c000                	sw	s0,0(s0)
+    800020b8:	0000                	unimp
+    800020ba:	0000                	unimp
+    800020bc:	0000                	unimp
+    800020be:	bf80                	fsd	fs0,56(a5)
+
+00000000800020c0 <test_20_data>:
+    800020c0:	0001                	nop
+    800020c2:	7f80                	ld	s0,56(a5)
+    800020c4:	0000                	unimp
+    800020c6:	3f80                	fld	fs0,56(a5)
+    800020c8:	0000                	unimp
+    800020ca:	0000                	unimp
+    800020cc:	0000                	unimp
+    800020ce:	3f80                	fld	fs0,56(a5)
+
+00000000800020d0 <test_21_data>:
+    800020d0:	ffff                	0xffff
+    800020d2:	7fff                	0x7fff
+    800020d4:	ffff                	0xffff
+    800020d6:	7fff                	0x7fff
+    800020d8:	0000                	unimp
+    800020da:	0000                	unimp
+    800020dc:	0000                	unimp
+    800020de:	7fc0                	ld	s0,184(a5)
+
+00000000800020e0 <test_30_data>:
+    800020e0:	0000                	unimp
+    800020e2:	8000                	0x8000
+    800020e4:	0000                	unimp
+    800020e6:	0000                	unimp
+    800020e8:	0000                	unimp
+    800020ea:	0000                	unimp
+    800020ec:	0000                	unimp
+    800020ee:	8000                	0x8000
+
+00000000800020f0 <test_31_data>:
+    800020f0:	0000                	unimp
+    800020f2:	0000                	unimp
+    800020f4:	0000                	unimp
+    800020f6:	8000                	0x8000
+    800020f8:	0000                	unimp
+    800020fa:	0000                	unimp
+    800020fc:	0000                	unimp
+    800020fe:	8000                	0x8000
+
+0000000080002100 <test_32_data>:
+    80002100:	0000                	unimp
+    80002102:	8000                	0x8000
+    80002104:	0000                	unimp
+    80002106:	0000                	unimp
+    80002108:	0000                	unimp
+    8000210a:	0000                	unimp
+    8000210c:	0000                	unimp
+    8000210e:	0000                	unimp
+
+0000000080002110 <test_33_data>:
+    80002110:	0000                	unimp
+    80002112:	0000                	unimp
+    80002114:	0000                	unimp
+    80002116:	8000                	0x8000
+    80002118:	0000                	unimp
+    8000211a:	0000                	unimp
+    8000211c:	0000                	unimp
+    8000211e:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-p-fmin.elf b/test/riscv-tests/rv64uf-p-fmin.elf
new file mode 100644
index 0000000..b5548fb
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-fmin.elf
diff --git a/test/riscv-tests/rv64uf-p-ldst.elf b/test/riscv-tests/rv64uf-p-ldst.elf
new file mode 100755
index 0000000..d080023
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-ldst.elf
diff --git a/test/riscv-tests/rv64uf-p-move.elf b/test/riscv-tests/rv64uf-p-move.elf
new file mode 100755
index 0000000..5a16f63
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-move.elf
diff --git a/test/riscv-tests/rv64uf-p-recoding.elf b/test/riscv-tests/rv64uf-p-recoding.elf
new file mode 100755
index 0000000..b8f54ed
--- /dev/null
+++ b/test/riscv-tests/rv64uf-p-recoding.elf
diff --git a/test/riscv-tests/rv64uf-v-fadd.dump b/test/riscv-tests/rv64uf-v-fadd.dump
new file mode 100644
index 0000000..57f29d2
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fadd.dump
@@ -0,0 +1,1083 @@
+
+rv64uf-v-fadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	8a068693          	addi	a3,a3,-1888 # 80002cf8 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	8d460613          	addi	a2,a2,-1836 # 80002d88 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	89c60613          	addi	a2,a2,-1892 # 80002da0 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	7ec68693          	addi	a3,a3,2028 # 80002d40 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	80868693          	addi	a3,a3,-2040 # 80002e78 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	78860613          	addi	a2,a2,1928 # 80002e50 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	6bc68693          	addi	a3,a3,1724 # 80002ea8 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	5dc68693          	addi	a3,a3,1500 # 80002e18 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	56c68693          	addi	a3,a3,1388 # 80002de0 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	03600793          	li	a5,54
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	086e87b7          	lui	a5,0x86e8
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	a8078793          	addi	a5,a5,-1408 # 86e7a80 <_start-0x77918580>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	001071d3          	fadd.s	ft3,ft0,ft1
+    80002aec:	e0018553          	fmv.x.w	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	1ed51063          	bne	a0,a3,80002cd8 <fail>
+    80002afc:	1cc59e63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	50c50513          	addi	a0,a0,1292 # 80003010 <test_3_data>
+    80002b0c:	00052007          	flw	ft0,0(a0)
+    80002b10:	00452087          	flw	ft1,4(a0)
+    80002b14:	00852107          	flw	ft2,8(a0)
+    80002b18:	00c52683          	lw	a3,12(a0)
+    80002b1c:	001071d3          	fadd.s	ft3,ft0,ft1
+    80002b20:	e0018553          	fmv.x.w	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	1ad51663          	bne	a0,a3,80002cd8 <fail>
+    80002b30:	1ac59463          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	4e850513          	addi	a0,a0,1256 # 80003020 <test_4_data>
+    80002b40:	00052007          	flw	ft0,0(a0)
+    80002b44:	00452087          	flw	ft1,4(a0)
+    80002b48:	00852107          	flw	ft2,8(a0)
+    80002b4c:	00c52683          	lw	a3,12(a0)
+    80002b50:	001071d3          	fadd.s	ft3,ft0,ft1
+    80002b54:	e0018553          	fmv.x.w	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00100613          	li	a2,1
+    80002b60:	16d51c63          	bne	a0,a3,80002cd8 <fail>
+    80002b64:	16c59a63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4c450513          	addi	a0,a0,1220 # 80003030 <test_5_data>
+    80002b74:	00052007          	flw	ft0,0(a0)
+    80002b78:	00452087          	flw	ft1,4(a0)
+    80002b7c:	00852107          	flw	ft2,8(a0)
+    80002b80:	00c52683          	lw	a3,12(a0)
+    80002b84:	081071d3          	fsub.s	ft3,ft0,ft1
+    80002b88:	e0018553          	fmv.x.w	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	14d51263          	bne	a0,a3,80002cd8 <fail>
+    80002b98:	14c59063          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4a050513          	addi	a0,a0,1184 # 80003040 <test_6_data>
+    80002ba8:	00052007          	flw	ft0,0(a0)
+    80002bac:	00452087          	flw	ft1,4(a0)
+    80002bb0:	00852107          	flw	ft2,8(a0)
+    80002bb4:	00c52683          	lw	a3,12(a0)
+    80002bb8:	081071d3          	fsub.s	ft3,ft0,ft1
+    80002bbc:	e0018553          	fmv.x.w	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00100613          	li	a2,1
+    80002bc8:	10d51863          	bne	a0,a3,80002cd8 <fail>
+    80002bcc:	10c59663          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	47c50513          	addi	a0,a0,1148 # 80003050 <test_7_data>
+    80002bdc:	00052007          	flw	ft0,0(a0)
+    80002be0:	00452087          	flw	ft1,4(a0)
+    80002be4:	00852107          	flw	ft2,8(a0)
+    80002be8:	00c52683          	lw	a3,12(a0)
+    80002bec:	081071d3          	fsub.s	ft3,ft0,ft1
+    80002bf0:	e0018553          	fmv.x.w	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00100613          	li	a2,1
+    80002bfc:	0cd51e63          	bne	a0,a3,80002cd8 <fail>
+    80002c00:	0cc59c63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c04 <test_8>:
+    80002c04:	00800193          	li	gp,8
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	45850513          	addi	a0,a0,1112 # 80003060 <test_8_data>
+    80002c10:	00052007          	flw	ft0,0(a0)
+    80002c14:	00452087          	flw	ft1,4(a0)
+    80002c18:	00852107          	flw	ft2,8(a0)
+    80002c1c:	00c52683          	lw	a3,12(a0)
+    80002c20:	101071d3          	fmul.s	ft3,ft0,ft1
+    80002c24:	e0018553          	fmv.x.w	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	0ad51463          	bne	a0,a3,80002cd8 <fail>
+    80002c34:	0ac59263          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c38 <test_9>:
+    80002c38:	00900193          	li	gp,9
+    80002c3c:	00000517          	auipc	a0,0x0
+    80002c40:	43450513          	addi	a0,a0,1076 # 80003070 <test_9_data>
+    80002c44:	00052007          	flw	ft0,0(a0)
+    80002c48:	00452087          	flw	ft1,4(a0)
+    80002c4c:	00852107          	flw	ft2,8(a0)
+    80002c50:	00c52683          	lw	a3,12(a0)
+    80002c54:	101071d3          	fmul.s	ft3,ft0,ft1
+    80002c58:	e0018553          	fmv.x.w	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00100613          	li	a2,1
+    80002c64:	06d51a63          	bne	a0,a3,80002cd8 <fail>
+    80002c68:	06c59863          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002c6c <test_10>:
+    80002c6c:	00a00193          	li	gp,10
+    80002c70:	00000517          	auipc	a0,0x0
+    80002c74:	41050513          	addi	a0,a0,1040 # 80003080 <test_10_data>
+    80002c78:	00052007          	flw	ft0,0(a0)
+    80002c7c:	00452087          	flw	ft1,4(a0)
+    80002c80:	00852107          	flw	ft2,8(a0)
+    80002c84:	00c52683          	lw	a3,12(a0)
+    80002c88:	101071d3          	fmul.s	ft3,ft0,ft1
+    80002c8c:	e0018553          	fmv.x.w	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00100613          	li	a2,1
+    80002c98:	04d51063          	bne	a0,a3,80002cd8 <fail>
+    80002c9c:	02c59e63          	bne	a1,a2,80002cd8 <fail>
+
+0000000080002ca0 <test_11>:
+    80002ca0:	00b00193          	li	gp,11
+    80002ca4:	00000517          	auipc	a0,0x0
+    80002ca8:	3ec50513          	addi	a0,a0,1004 # 80003090 <test_11_data>
+    80002cac:	00052007          	flw	ft0,0(a0)
+    80002cb0:	00452087          	flw	ft1,4(a0)
+    80002cb4:	00852107          	flw	ft2,8(a0)
+    80002cb8:	00c52683          	lw	a3,12(a0)
+    80002cbc:	081071d3          	fsub.s	ft3,ft0,ft1
+    80002cc0:	e0018553          	fmv.x.w	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	01000613          	li	a2,16
+    80002ccc:	00d51663          	bne	a0,a3,80002cd8 <fail>
+    80002cd0:	00c59463          	bne	a1,a2,80002cd8 <fail>
+    80002cd4:	00301a63          	bne	zero,gp,80002ce8 <pass>
+
+0000000080002cd8 <fail>:
+    80002cd8:	00119513          	slli	a0,gp,0x1
+    80002cdc:	00050063          	beqz	a0,80002cdc <fail+0x4>
+    80002ce0:	00156513          	ori	a0,a0,1
+    80002ce4:	00000073          	ecall
+
+0000000080002ce8 <pass>:
+    80002ce8:	00100513          	li	a0,1
+    80002cec:	00000073          	ecall
+    80002cf0:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	4020                	lw	s0,64(s0)
+    80003004:	0000                	unimp
+    80003006:	3f80                	fld	fs0,56(a5)
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	0000                	unimp
+    8000300e:	4060                	lw	s0,68(s0)
+
+0000000080003010 <test_3_data>:
+    80003010:	c49a6333          	0xc49a6333
+    80003014:	cccd                	beqz	s1,800030ce <begin_signature+0x2e>
+    80003016:	3f8c                	fld	fa1,56(a5)
+    80003018:	0000                	unimp
+    8000301a:	0000                	unimp
+    8000301c:	4000                	lw	s0,0(s0)
+    8000301e:	c49a                	sw	t1,72(sp)
+
+0000000080003020 <test_4_data>:
+    80003020:	40490fdb          	0x40490fdb
+    80003024:	322bcc77          	0x322bcc77
+    80003028:	0000                	unimp
+    8000302a:	0000                	unimp
+    8000302c:	40490fdb          	0x40490fdb
+
+0000000080003030 <test_5_data>:
+    80003030:	0000                	unimp
+    80003032:	4020                	lw	s0,64(s0)
+    80003034:	0000                	unimp
+    80003036:	3f80                	fld	fs0,56(a5)
+    80003038:	0000                	unimp
+    8000303a:	0000                	unimp
+    8000303c:	0000                	unimp
+    8000303e:	3fc0                	fld	fs0,184(a5)
+
+0000000080003040 <test_6_data>:
+    80003040:	c49a6333          	0xc49a6333
+    80003044:	cccd                	beqz	s1,800030fe <begin_signature+0x5e>
+    80003046:	bf8c                	fsd	fa1,56(a5)
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	4000                	lw	s0,0(s0)
+    8000304e:	c49a                	sw	t1,72(sp)
+
+0000000080003050 <test_7_data>:
+    80003050:	40490fdb          	0x40490fdb
+    80003054:	322bcc77          	0x322bcc77
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	40490fdb          	0x40490fdb
+
+0000000080003060 <test_8_data>:
+    80003060:	0000                	unimp
+    80003062:	4020                	lw	s0,64(s0)
+    80003064:	0000                	unimp
+    80003066:	3f80                	fld	fs0,56(a5)
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	4020                	lw	s0,64(s0)
+
+0000000080003070 <test_9_data>:
+    80003070:	c49a6333          	0xc49a6333
+    80003074:	cccd                	beqz	s1,8000312e <begin_signature+0x8e>
+    80003076:	bf8c                	fsd	fa1,56(a5)
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	d385                	beqz	a5,80002f9c <pass+0x2b4>
+    8000307e:	44a9                	li	s1,10
+
+0000000080003080 <test_10_data>:
+    80003080:	40490fdb          	0x40490fdb
+    80003084:	322bcc77          	0x322bcc77
+    80003088:	0000                	unimp
+    8000308a:	0000                	unimp
+    8000308c:	ee2d                	bnez	a2,80003106 <begin_signature+0x66>
+    8000308e:	3306                	fld	ft6,96(sp)
+
+0000000080003090 <test_11_data>:
+    80003090:	0000                	unimp
+    80003092:	7f80                	ld	s0,56(a5)
+    80003094:	0000                	unimp
+    80003096:	7f80                	ld	s0,56(a5)
+    80003098:	0000                	unimp
+    8000309a:	0000                	unimp
+    8000309c:	0000                	unimp
+    8000309e:	7fc0                	ld	s0,184(a5)
diff --git a/test/riscv-tests/rv64uf-v-fadd.elf b/test/riscv-tests/rv64uf-v-fadd.elf
new file mode 100644
index 0000000..29212bf
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fadd.elf
diff --git a/test/riscv-tests/rv64uf-v-fclass.dump b/test/riscv-tests/rv64uf-v-fclass.dump
new file mode 100644
index 0000000..d472913
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fclass.dump
@@ -0,0 +1,929 @@
+
+rv64uf-v-fclass:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00008117          	auipc	sp,0x8
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800086d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00001617          	auipc	a2,0x1
+    80002318:	cec60613          	addi	a2,a2,-788 # 80003000 <begin_signature>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00005797          	auipc	a5,0x5
+    80002334:	4b878793          	addi	a5,a5,1208 # 800077e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00005717          	auipc	a4,0x5
+    80002348:	49c70713          	addi	a4,a4,1180 # 800077e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00005897          	auipc	a7,0x5
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800077e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00005797          	auipc	a5,0x5
+    80002384:	07078793          	addi	a5,a5,112 # 800073f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf8810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00005797          	auipc	a5,0x5
+    80002448:	3807be23          	sd	zero,924(a5) # 800077e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00000697          	auipc	a3,0x0
+    8000245c:	7a068693          	addi	a3,a3,1952 # 80002bf8 <pass+0xc>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00000617          	auipc	a2,0x0
+    800024b8:	7d460613          	addi	a2,a2,2004 # 80002c88 <pass+0x9c>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00000617          	auipc	a2,0x0
+    80002508:	79c60613          	addi	a2,a2,1948 # 80002ca0 <pass+0xb4>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	6ec68693          	addi	a3,a3,1772 # 80002c40 <pass+0x54>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	70868693          	addi	a3,a3,1800 # 80002d78 <pass+0x18c>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	68860613          	addi	a2,a2,1672 # 80002d50 <pass+0x164>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00005d17          	auipc	s10,0x5
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800073f0 <user_mapping>
+    80002724:	00001b97          	auipc	s7,0x1
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80003000 <begin_signature>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00005a17          	auipc	s4,0x5
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800077e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00005717          	auipc	a4,0x5
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800077e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00005717          	auipc	a4,0x5
+    800027d4:	00f73823          	sd	a5,16(a4) # 800077e0 <freelist_tail>
+    800027d8:	00005717          	auipc	a4,0x5
+    800027dc:	00f73823          	sd	a5,16(a4) # 800077e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	5bc68693          	addi	a3,a3,1468 # 80002da8 <pass+0x1bc>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	4dc68693          	addi	a3,a3,1244 # 80002d18 <pass+0x12c>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	46c68693          	addi	a3,a3,1132 # 80002ce0 <pass+0xf4>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00001697          	auipc	a3,0x1
+    800028e0:	72468693          	addi	a3,a3,1828 # 80004000 <begin_signature+0x1000>
+    800028e4:	00002717          	auipc	a4,0x2
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80005000 <begin_signature+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00003797          	auipc	a5,0x3
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80006000 <begin_signature+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00000897          	auipc	a7,0x0
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80003000 <begin_signature>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00001697          	auipc	a3,0x1
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80003ff8 <begin_signature+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00000617          	auipc	a2,0x0
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80003000 <begin_signature>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00003697          	auipc	a3,0x3
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80005ff8 <begin_signature+0x2ff8>
+    8000294c:	00001717          	auipc	a4,0x1
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80004000 <begin_signature+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00004697          	auipc	a3,0x4
+    800029c0:	64468693          	addi	a3,a3,1604 # 80007000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00005617          	auipc	a2,0x5
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800077e8 <freelist_head>
+    800029d4:	00005797          	auipc	a5,0x5
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800077e0 <freelist_tail>
+    800029dc:	00005317          	auipc	t1,0x5
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800073f0 <user_mapping>
+    800029e4:	02b00793          	li	a5,43
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00005797          	auipc	a5,0x5
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800073e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	032207b7          	lui	a5,0x3220
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	33278793          	addi	a5,a5,818 # 3220332 <_start-0x7cddfcce>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	1ff0051b          	addiw	a0,zero,511
+    80002ad0:	01751513          	slli	a0,a0,0x17
+    80002ad4:	f0050553          	fmv.w.x	fa0,a0
+    80002ad8:	e0051553          	fclass.s	a0,fa0
+    80002adc:	00100e93          	li	t4,1
+    80002ae0:	00200193          	li	gp,2
+    80002ae4:	0fd51c63          	bne	a0,t4,80002bdc <fail>
+
+0000000080002ae8 <test_3>:
+    80002ae8:	17f0051b          	addiw	a0,zero,383
+    80002aec:	01751513          	slli	a0,a0,0x17
+    80002af0:	f0050553          	fmv.w.x	fa0,a0
+    80002af4:	e0051553          	fclass.s	a0,fa0
+    80002af8:	00200e93          	li	t4,2
+    80002afc:	00300193          	li	gp,3
+    80002b00:	0dd51e63          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b04 <test_4>:
+    80002b04:	1010051b          	addiw	a0,zero,257
+    80002b08:	01751513          	slli	a0,a0,0x17
+    80002b0c:	fff50513          	addi	a0,a0,-1
+    80002b10:	f0050553          	fmv.w.x	fa0,a0
+    80002b14:	e0051553          	fclass.s	a0,fa0
+    80002b18:	00400e93          	li	t4,4
+    80002b1c:	00400193          	li	gp,4
+    80002b20:	0bd51e63          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b24 <test_5>:
+    80002b24:	0010051b          	addiw	a0,zero,1
+    80002b28:	01f51513          	slli	a0,a0,0x1f
+    80002b2c:	f0050553          	fmv.w.x	fa0,a0
+    80002b30:	e0051553          	fclass.s	a0,fa0
+    80002b34:	00800e93          	li	t4,8
+    80002b38:	00500193          	li	gp,5
+    80002b3c:	0bd51063          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b40 <test_6>:
+    80002b40:	00000513          	li	a0,0
+    80002b44:	f0050553          	fmv.w.x	fa0,a0
+    80002b48:	e0051553          	fclass.s	a0,fa0
+    80002b4c:	01000e93          	li	t4,16
+    80002b50:	00600193          	li	gp,6
+    80002b54:	09d51463          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b58 <test_7>:
+    80002b58:	00800537          	lui	a0,0x800
+    80002b5c:	fff5051b          	addiw	a0,a0,-1
+    80002b60:	f0050553          	fmv.w.x	fa0,a0
+    80002b64:	e0051553          	fclass.s	a0,fa0
+    80002b68:	02000e93          	li	t4,32
+    80002b6c:	00700193          	li	gp,7
+    80002b70:	07d51663          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b74 <test_8>:
+    80002b74:	3f800537          	lui	a0,0x3f800
+    80002b78:	f0050553          	fmv.w.x	fa0,a0
+    80002b7c:	e0051553          	fclass.s	a0,fa0
+    80002b80:	04000e93          	li	t4,64
+    80002b84:	00800193          	li	gp,8
+    80002b88:	05d51a63          	bne	a0,t4,80002bdc <fail>
+
+0000000080002b8c <test_9>:
+    80002b8c:	7f800537          	lui	a0,0x7f800
+    80002b90:	f0050553          	fmv.w.x	fa0,a0
+    80002b94:	e0051553          	fclass.s	a0,fa0
+    80002b98:	08000e93          	li	t4,128
+    80002b9c:	00900193          	li	gp,9
+    80002ba0:	03d51e63          	bne	a0,t4,80002bdc <fail>
+
+0000000080002ba4 <test_10>:
+    80002ba4:	7f800537          	lui	a0,0x7f800
+    80002ba8:	0015051b          	addiw	a0,a0,1
+    80002bac:	f0050553          	fmv.w.x	fa0,a0
+    80002bb0:	e0051553          	fclass.s	a0,fa0
+    80002bb4:	10000e93          	li	t4,256
+    80002bb8:	00a00193          	li	gp,10
+    80002bbc:	03d51063          	bne	a0,t4,80002bdc <fail>
+
+0000000080002bc0 <test_11>:
+    80002bc0:	7fc00537          	lui	a0,0x7fc00
+    80002bc4:	f0050553          	fmv.w.x	fa0,a0
+    80002bc8:	e0051553          	fclass.s	a0,fa0
+    80002bcc:	20000e93          	li	t4,512
+    80002bd0:	00b00193          	li	gp,11
+    80002bd4:	01d51463          	bne	a0,t4,80002bdc <fail>
+    80002bd8:	00301a63          	bne	zero,gp,80002bec <pass>
+
+0000000080002bdc <fail>:
+    80002bdc:	00119513          	slli	a0,gp,0x1
+    80002be0:	00050063          	beqz	a0,80002be0 <fail+0x4>
+    80002be4:	00156513          	ori	a0,a0,1
+    80002be8:	00000073          	ecall
+
+0000000080002bec <pass>:
+    80002bec:	00100513          	li	a0,1
+    80002bf0:	00000073          	ecall
+    80002bf4:	c0001073          	unimp
diff --git a/test/riscv-tests/rv64uf-v-fclass.elf b/test/riscv-tests/rv64uf-v-fclass.elf
new file mode 100644
index 0000000..dca789e
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fclass.elf
diff --git a/test/riscv-tests/rv64uf-v-fcmp.dump b/test/riscv-tests/rv64uf-v-fcmp.dump
new file mode 100644
index 0000000..2cce5a1
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcmp.dump
@@ -0,0 +1,1195 @@
+
+rv64uf-v-fcmp:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	96868693          	addi	a3,a3,-1688 # 80002dc0 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	99c60613          	addi	a2,a2,-1636 # 80002e50 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	96460613          	addi	a2,a2,-1692 # 80002e68 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	8b468693          	addi	a3,a3,-1868 # 80002e08 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	8d068693          	addi	a3,a3,-1840 # 80002f40 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	85060613          	addi	a2,a2,-1968 # 80002f18 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	78468693          	addi	a3,a3,1924 # 80002f70 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	6a468693          	addi	a3,a3,1700 # 80002ee0 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	63468693          	addi	a3,a3,1588 # 80002ea8 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	01d00793          	li	a5,29
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	029377b7          	lui	a5,0x2937
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	46c78793          	addi	a5,a5,1132 # 293746c <_start-0x7d6c8b94>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	a0102553          	feq.s	a0,ft0,ft1
+    80002aec:	001015f3          	fsflags	a1,zero
+    80002af0:	00000613          	li	a2,0
+    80002af4:	2ad51663          	bne	a0,a3,80002da0 <fail>
+    80002af8:	2ac59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002afc <test_3>:
+    80002afc:	00300193          	li	gp,3
+    80002b00:	00000517          	auipc	a0,0x0
+    80002b04:	51050513          	addi	a0,a0,1296 # 80003010 <test_3_data>
+    80002b08:	00052007          	flw	ft0,0(a0)
+    80002b0c:	00452087          	flw	ft1,4(a0)
+    80002b10:	00852107          	flw	ft2,8(a0)
+    80002b14:	00c52683          	lw	a3,12(a0)
+    80002b18:	a0100553          	fle.s	a0,ft0,ft1
+    80002b1c:	001015f3          	fsflags	a1,zero
+    80002b20:	00000613          	li	a2,0
+    80002b24:	26d51e63          	bne	a0,a3,80002da0 <fail>
+    80002b28:	26c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b2c <test_4>:
+    80002b2c:	00400193          	li	gp,4
+    80002b30:	00000517          	auipc	a0,0x0
+    80002b34:	4f050513          	addi	a0,a0,1264 # 80003020 <test_4_data>
+    80002b38:	00052007          	flw	ft0,0(a0)
+    80002b3c:	00452087          	flw	ft1,4(a0)
+    80002b40:	00852107          	flw	ft2,8(a0)
+    80002b44:	00c52683          	lw	a3,12(a0)
+    80002b48:	a0101553          	flt.s	a0,ft0,ft1
+    80002b4c:	001015f3          	fsflags	a1,zero
+    80002b50:	00000613          	li	a2,0
+    80002b54:	24d51663          	bne	a0,a3,80002da0 <fail>
+    80002b58:	24c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b5c <test_5>:
+    80002b5c:	00500193          	li	gp,5
+    80002b60:	00000517          	auipc	a0,0x0
+    80002b64:	4d050513          	addi	a0,a0,1232 # 80003030 <test_5_data>
+    80002b68:	00052007          	flw	ft0,0(a0)
+    80002b6c:	00452087          	flw	ft1,4(a0)
+    80002b70:	00852107          	flw	ft2,8(a0)
+    80002b74:	00c52683          	lw	a3,12(a0)
+    80002b78:	a0102553          	feq.s	a0,ft0,ft1
+    80002b7c:	001015f3          	fsflags	a1,zero
+    80002b80:	00000613          	li	a2,0
+    80002b84:	20d51e63          	bne	a0,a3,80002da0 <fail>
+    80002b88:	20c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002b8c <test_6>:
+    80002b8c:	00600193          	li	gp,6
+    80002b90:	00000517          	auipc	a0,0x0
+    80002b94:	4b050513          	addi	a0,a0,1200 # 80003040 <test_6_data>
+    80002b98:	00052007          	flw	ft0,0(a0)
+    80002b9c:	00452087          	flw	ft1,4(a0)
+    80002ba0:	00852107          	flw	ft2,8(a0)
+    80002ba4:	00c52683          	lw	a3,12(a0)
+    80002ba8:	a0100553          	fle.s	a0,ft0,ft1
+    80002bac:	001015f3          	fsflags	a1,zero
+    80002bb0:	00000613          	li	a2,0
+    80002bb4:	1ed51663          	bne	a0,a3,80002da0 <fail>
+    80002bb8:	1ec59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002bbc <test_7>:
+    80002bbc:	00700193          	li	gp,7
+    80002bc0:	00000517          	auipc	a0,0x0
+    80002bc4:	49050513          	addi	a0,a0,1168 # 80003050 <test_7_data>
+    80002bc8:	00052007          	flw	ft0,0(a0)
+    80002bcc:	00452087          	flw	ft1,4(a0)
+    80002bd0:	00852107          	flw	ft2,8(a0)
+    80002bd4:	00c52683          	lw	a3,12(a0)
+    80002bd8:	a0101553          	flt.s	a0,ft0,ft1
+    80002bdc:	001015f3          	fsflags	a1,zero
+    80002be0:	00000613          	li	a2,0
+    80002be4:	1ad51e63          	bne	a0,a3,80002da0 <fail>
+    80002be8:	1ac59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002bec <test_8>:
+    80002bec:	00800193          	li	gp,8
+    80002bf0:	00000517          	auipc	a0,0x0
+    80002bf4:	47050513          	addi	a0,a0,1136 # 80003060 <test_8_data>
+    80002bf8:	00052007          	flw	ft0,0(a0)
+    80002bfc:	00452087          	flw	ft1,4(a0)
+    80002c00:	00852107          	flw	ft2,8(a0)
+    80002c04:	00c52683          	lw	a3,12(a0)
+    80002c08:	a0102553          	feq.s	a0,ft0,ft1
+    80002c0c:	001015f3          	fsflags	a1,zero
+    80002c10:	00000613          	li	a2,0
+    80002c14:	18d51663          	bne	a0,a3,80002da0 <fail>
+    80002c18:	18c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c1c <test_9>:
+    80002c1c:	00900193          	li	gp,9
+    80002c20:	00000517          	auipc	a0,0x0
+    80002c24:	45050513          	addi	a0,a0,1104 # 80003070 <test_9_data>
+    80002c28:	00052007          	flw	ft0,0(a0)
+    80002c2c:	00452087          	flw	ft1,4(a0)
+    80002c30:	00852107          	flw	ft2,8(a0)
+    80002c34:	00c52683          	lw	a3,12(a0)
+    80002c38:	a0102553          	feq.s	a0,ft0,ft1
+    80002c3c:	001015f3          	fsflags	a1,zero
+    80002c40:	00000613          	li	a2,0
+    80002c44:	14d51e63          	bne	a0,a3,80002da0 <fail>
+    80002c48:	14c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c4c <test_10>:
+    80002c4c:	00a00193          	li	gp,10
+    80002c50:	00000517          	auipc	a0,0x0
+    80002c54:	43050513          	addi	a0,a0,1072 # 80003080 <test_10_data>
+    80002c58:	00052007          	flw	ft0,0(a0)
+    80002c5c:	00452087          	flw	ft1,4(a0)
+    80002c60:	00852107          	flw	ft2,8(a0)
+    80002c64:	00c52683          	lw	a3,12(a0)
+    80002c68:	a0102553          	feq.s	a0,ft0,ft1
+    80002c6c:	001015f3          	fsflags	a1,zero
+    80002c70:	01000613          	li	a2,16
+    80002c74:	12d51663          	bne	a0,a3,80002da0 <fail>
+    80002c78:	12c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002c7c <test_11>:
+    80002c7c:	00b00193          	li	gp,11
+    80002c80:	00000517          	auipc	a0,0x0
+    80002c84:	41050513          	addi	a0,a0,1040 # 80003090 <test_11_data>
+    80002c88:	00052007          	flw	ft0,0(a0)
+    80002c8c:	00452087          	flw	ft1,4(a0)
+    80002c90:	00852107          	flw	ft2,8(a0)
+    80002c94:	00c52683          	lw	a3,12(a0)
+    80002c98:	a0101553          	flt.s	a0,ft0,ft1
+    80002c9c:	001015f3          	fsflags	a1,zero
+    80002ca0:	01000613          	li	a2,16
+    80002ca4:	0ed51e63          	bne	a0,a3,80002da0 <fail>
+    80002ca8:	0ec59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002cac <test_12>:
+    80002cac:	00c00193          	li	gp,12
+    80002cb0:	00000517          	auipc	a0,0x0
+    80002cb4:	3f050513          	addi	a0,a0,1008 # 800030a0 <test_12_data>
+    80002cb8:	00052007          	flw	ft0,0(a0)
+    80002cbc:	00452087          	flw	ft1,4(a0)
+    80002cc0:	00852107          	flw	ft2,8(a0)
+    80002cc4:	00c52683          	lw	a3,12(a0)
+    80002cc8:	a0101553          	flt.s	a0,ft0,ft1
+    80002ccc:	001015f3          	fsflags	a1,zero
+    80002cd0:	01000613          	li	a2,16
+    80002cd4:	0cd51663          	bne	a0,a3,80002da0 <fail>
+    80002cd8:	0cc59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002cdc <test_13>:
+    80002cdc:	00d00193          	li	gp,13
+    80002ce0:	00000517          	auipc	a0,0x0
+    80002ce4:	3d050513          	addi	a0,a0,976 # 800030b0 <test_13_data>
+    80002ce8:	00052007          	flw	ft0,0(a0)
+    80002cec:	00452087          	flw	ft1,4(a0)
+    80002cf0:	00852107          	flw	ft2,8(a0)
+    80002cf4:	00c52683          	lw	a3,12(a0)
+    80002cf8:	a0101553          	flt.s	a0,ft0,ft1
+    80002cfc:	001015f3          	fsflags	a1,zero
+    80002d00:	01000613          	li	a2,16
+    80002d04:	08d51e63          	bne	a0,a3,80002da0 <fail>
+    80002d08:	08c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d0c <test_14>:
+    80002d0c:	00e00193          	li	gp,14
+    80002d10:	00000517          	auipc	a0,0x0
+    80002d14:	3b050513          	addi	a0,a0,944 # 800030c0 <test_14_data>
+    80002d18:	00052007          	flw	ft0,0(a0)
+    80002d1c:	00452087          	flw	ft1,4(a0)
+    80002d20:	00852107          	flw	ft2,8(a0)
+    80002d24:	00c52683          	lw	a3,12(a0)
+    80002d28:	a0100553          	fle.s	a0,ft0,ft1
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	01000613          	li	a2,16
+    80002d34:	06d51663          	bne	a0,a3,80002da0 <fail>
+    80002d38:	06c59463          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d3c <test_15>:
+    80002d3c:	00f00193          	li	gp,15
+    80002d40:	00000517          	auipc	a0,0x0
+    80002d44:	39050513          	addi	a0,a0,912 # 800030d0 <test_15_data>
+    80002d48:	00052007          	flw	ft0,0(a0)
+    80002d4c:	00452087          	flw	ft1,4(a0)
+    80002d50:	00852107          	flw	ft2,8(a0)
+    80002d54:	00c52683          	lw	a3,12(a0)
+    80002d58:	a0100553          	fle.s	a0,ft0,ft1
+    80002d5c:	001015f3          	fsflags	a1,zero
+    80002d60:	01000613          	li	a2,16
+    80002d64:	02d51e63          	bne	a0,a3,80002da0 <fail>
+    80002d68:	02c59c63          	bne	a1,a2,80002da0 <fail>
+
+0000000080002d6c <test_16>:
+    80002d6c:	01000193          	li	gp,16
+    80002d70:	00000517          	auipc	a0,0x0
+    80002d74:	37050513          	addi	a0,a0,880 # 800030e0 <test_16_data>
+    80002d78:	00052007          	flw	ft0,0(a0)
+    80002d7c:	00452087          	flw	ft1,4(a0)
+    80002d80:	00852107          	flw	ft2,8(a0)
+    80002d84:	00c52683          	lw	a3,12(a0)
+    80002d88:	a0100553          	fle.s	a0,ft0,ft1
+    80002d8c:	001015f3          	fsflags	a1,zero
+    80002d90:	01000613          	li	a2,16
+    80002d94:	00d51663          	bne	a0,a3,80002da0 <fail>
+    80002d98:	00c59463          	bne	a1,a2,80002da0 <fail>
+    80002d9c:	00301a63          	bne	zero,gp,80002db0 <pass>
+
+0000000080002da0 <fail>:
+    80002da0:	00119513          	slli	a0,gp,0x1
+    80002da4:	00050063          	beqz	a0,80002da4 <fail+0x4>
+    80002da8:	00156513          	ori	a0,a0,1
+    80002dac:	00000073          	ecall
+
+0000000080002db0 <pass>:
+    80002db0:	00100513          	li	a0,1
+    80002db4:	00000073          	ecall
+    80002db8:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	bfae147b          	0xbfae147b
+    80003004:	bfae147b          	0xbfae147b
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	0001                	nop
+    8000300e:	0000                	unimp
+
+0000000080003010 <test_3_data>:
+    80003010:	bfae147b          	0xbfae147b
+    80003014:	bfae147b          	0xbfae147b
+    80003018:	0000                	unimp
+    8000301a:	0000                	unimp
+    8000301c:	0001                	nop
+    8000301e:	0000                	unimp
+
+0000000080003020 <test_4_data>:
+    80003020:	bfae147b          	0xbfae147b
+    80003024:	bfae147b          	0xbfae147b
+    80003028:	0000                	unimp
+    8000302a:	0000                	unimp
+    8000302c:	0000                	unimp
+    8000302e:	0000                	unimp
+
+0000000080003030 <test_5_data>:
+    80003030:	5c29                	li	s8,-22
+    80003032:	147bbfaf          	0x147bbfaf
+    80003036:	bfae                	fsd	fa1,504(sp)
+    80003038:	0000                	unimp
+    8000303a:	0000                	unimp
+    8000303c:	0000                	unimp
+    8000303e:	0000                	unimp
+
+0000000080003040 <test_6_data>:
+    80003040:	5c29                	li	s8,-22
+    80003042:	147bbfaf          	0x147bbfaf
+    80003046:	bfae                	fsd	fa1,504(sp)
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	0001                	nop
+    8000304e:	0000                	unimp
+
+0000000080003050 <test_7_data>:
+    80003050:	5c29                	li	s8,-22
+    80003052:	147bbfaf          	0x147bbfaf
+    80003056:	bfae                	fsd	fa1,504(sp)
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	0001                	nop
+    8000305e:	0000                	unimp
+
+0000000080003060 <test_8_data>:
+    80003060:	ffff                	0xffff
+    80003062:	7fff                	0x7fff
+    80003064:	0000                	unimp
+    80003066:	0000                	unimp
+    80003068:	0000                	unimp
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	0000                	unimp
+
+0000000080003070 <test_9_data>:
+    80003070:	ffff                	0xffff
+    80003072:	7fff                	0x7fff
+    80003074:	ffff                	0xffff
+    80003076:	7fff                	0x7fff
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	0000                	unimp
+    8000307e:	0000                	unimp
+
+0000000080003080 <test_10_data>:
+    80003080:	0001                	nop
+    80003082:	7f80                	ld	s0,56(a5)
+    80003084:	0000                	unimp
+    80003086:	0000                	unimp
+    80003088:	0000                	unimp
+    8000308a:	0000                	unimp
+    8000308c:	0000                	unimp
+    8000308e:	0000                	unimp
+
+0000000080003090 <test_11_data>:
+    80003090:	ffff                	0xffff
+    80003092:	7fff                	0x7fff
+    80003094:	0000                	unimp
+    80003096:	0000                	unimp
+    80003098:	0000                	unimp
+    8000309a:	0000                	unimp
+    8000309c:	0000                	unimp
+    8000309e:	0000                	unimp
+
+00000000800030a0 <test_12_data>:
+    800030a0:	ffff                	0xffff
+    800030a2:	7fff                	0x7fff
+    800030a4:	ffff                	0xffff
+    800030a6:	7fff                	0x7fff
+    800030a8:	0000                	unimp
+    800030aa:	0000                	unimp
+    800030ac:	0000                	unimp
+    800030ae:	0000                	unimp
+
+00000000800030b0 <test_13_data>:
+    800030b0:	0001                	nop
+    800030b2:	7f80                	ld	s0,56(a5)
+    800030b4:	0000                	unimp
+    800030b6:	0000                	unimp
+    800030b8:	0000                	unimp
+    800030ba:	0000                	unimp
+    800030bc:	0000                	unimp
+    800030be:	0000                	unimp
+
+00000000800030c0 <test_14_data>:
+    800030c0:	ffff                	0xffff
+    800030c2:	7fff                	0x7fff
+    800030c4:	0000                	unimp
+    800030c6:	0000                	unimp
+    800030c8:	0000                	unimp
+    800030ca:	0000                	unimp
+    800030cc:	0000                	unimp
+    800030ce:	0000                	unimp
+
+00000000800030d0 <test_15_data>:
+    800030d0:	ffff                	0xffff
+    800030d2:	7fff                	0x7fff
+    800030d4:	ffff                	0xffff
+    800030d6:	7fff                	0x7fff
+    800030d8:	0000                	unimp
+    800030da:	0000                	unimp
+    800030dc:	0000                	unimp
+    800030de:	0000                	unimp
+
+00000000800030e0 <test_16_data>:
+    800030e0:	0001                	nop
+    800030e2:	7f80                	ld	s0,56(a5)
+    800030e4:	0000                	unimp
+    800030e6:	0000                	unimp
+    800030e8:	0000                	unimp
+    800030ea:	0000                	unimp
+    800030ec:	0000                	unimp
+    800030ee:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-v-fcmp.elf b/test/riscv-tests/rv64uf-v-fcmp.elf
new file mode 100644
index 0000000..8e733f3
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcmp.elf
diff --git a/test/riscv-tests/rv64uf-v-fcvt.dump b/test/riscv-tests/rv64uf-v-fcvt.dump
new file mode 100644
index 0000000..779c069
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcvt.dump
@@ -0,0 +1,964 @@
+
+rv64uf-v-fcvt:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00000697          	auipc	a3,0x0
+    8000245c:	7b868693          	addi	a3,a3,1976 # 80002c10 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00000617          	auipc	a2,0x0
+    800024b8:	7ec60613          	addi	a2,a2,2028 # 80002ca0 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00000617          	auipc	a2,0x0
+    80002508:	7b460613          	addi	a2,a2,1972 # 80002cb8 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	70468693          	addi	a3,a3,1796 # 80002c58 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	72068693          	addi	a3,a3,1824 # 80002d90 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	6a060613          	addi	a2,a2,1696 # 80002d68 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	5d468693          	addi	a3,a3,1492 # 80002dc0 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	4f468693          	addi	a3,a3,1268 # 80002d30 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	48468693          	addi	a3,a3,1156 # 80002cf8 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	02c00793          	li	a5,44
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	046787b7          	lui	a5,0x4678
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	34878793          	addi	a5,a5,840 # 4678348 <_start-0x7b987cb8>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00052683          	lw	a3,0(a0)
+    80002adc:	00200513          	li	a0,2
+    80002ae0:	d0057053          	fcvt.s.w	ft0,a0
+    80002ae4:	00101073          	fsflags	zero
+    80002ae8:	e0000553          	fmv.x.w	a0,ft0
+    80002aec:	10d51263          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002af0 <test_3>:
+    80002af0:	00300193          	li	gp,3
+    80002af4:	00000517          	auipc	a0,0x0
+    80002af8:	51050513          	addi	a0,a0,1296 # 80003004 <test_3_data>
+    80002afc:	00052683          	lw	a3,0(a0)
+    80002b00:	ffe00513          	li	a0,-2
+    80002b04:	d0057053          	fcvt.s.w	ft0,a0
+    80002b08:	00101073          	fsflags	zero
+    80002b0c:	e0000553          	fmv.x.w	a0,ft0
+    80002b10:	0ed51063          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002b14 <test_4>:
+    80002b14:	00400193          	li	gp,4
+    80002b18:	00000517          	auipc	a0,0x0
+    80002b1c:	4f050513          	addi	a0,a0,1264 # 80003008 <test_4_data>
+    80002b20:	00052683          	lw	a3,0(a0)
+    80002b24:	00200513          	li	a0,2
+    80002b28:	d0157053          	fcvt.s.wu	ft0,a0
+    80002b2c:	00101073          	fsflags	zero
+    80002b30:	e0000553          	fmv.x.w	a0,ft0
+    80002b34:	0ad51e63          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002b38 <test_5>:
+    80002b38:	00500193          	li	gp,5
+    80002b3c:	00000517          	auipc	a0,0x0
+    80002b40:	4d050513          	addi	a0,a0,1232 # 8000300c <test_5_data>
+    80002b44:	00052683          	lw	a3,0(a0)
+    80002b48:	ffe00513          	li	a0,-2
+    80002b4c:	d0157053          	fcvt.s.wu	ft0,a0
+    80002b50:	00101073          	fsflags	zero
+    80002b54:	e0000553          	fmv.x.w	a0,ft0
+    80002b58:	08d51c63          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002b5c <test_6>:
+    80002b5c:	00600193          	li	gp,6
+    80002b60:	00000517          	auipc	a0,0x0
+    80002b64:	4b050513          	addi	a0,a0,1200 # 80003010 <test_6_data>
+    80002b68:	00052683          	lw	a3,0(a0)
+    80002b6c:	00200513          	li	a0,2
+    80002b70:	d0257053          	fcvt.s.l	ft0,a0
+    80002b74:	00101073          	fsflags	zero
+    80002b78:	e0000553          	fmv.x.w	a0,ft0
+    80002b7c:	06d51a63          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002b80 <test_7>:
+    80002b80:	00700193          	li	gp,7
+    80002b84:	00000517          	auipc	a0,0x0
+    80002b88:	49050513          	addi	a0,a0,1168 # 80003014 <test_7_data>
+    80002b8c:	00052683          	lw	a3,0(a0)
+    80002b90:	ffe00513          	li	a0,-2
+    80002b94:	d0257053          	fcvt.s.l	ft0,a0
+    80002b98:	00101073          	fsflags	zero
+    80002b9c:	e0000553          	fmv.x.w	a0,ft0
+    80002ba0:	04d51863          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002ba4 <test_8>:
+    80002ba4:	00800193          	li	gp,8
+    80002ba8:	00000517          	auipc	a0,0x0
+    80002bac:	47050513          	addi	a0,a0,1136 # 80003018 <test_8_data>
+    80002bb0:	00052683          	lw	a3,0(a0)
+    80002bb4:	00200513          	li	a0,2
+    80002bb8:	d0357053          	fcvt.s.lu	ft0,a0
+    80002bbc:	00101073          	fsflags	zero
+    80002bc0:	e0000553          	fmv.x.w	a0,ft0
+    80002bc4:	02d51663          	bne	a0,a3,80002bf0 <fail>
+
+0000000080002bc8 <test_9>:
+    80002bc8:	00900193          	li	gp,9
+    80002bcc:	00000517          	auipc	a0,0x0
+    80002bd0:	45050513          	addi	a0,a0,1104 # 8000301c <test_9_data>
+    80002bd4:	00052683          	lw	a3,0(a0)
+    80002bd8:	ffe00513          	li	a0,-2
+    80002bdc:	d0357053          	fcvt.s.lu	ft0,a0
+    80002be0:	00101073          	fsflags	zero
+    80002be4:	e0000553          	fmv.x.w	a0,ft0
+    80002be8:	00d51463          	bne	a0,a3,80002bf0 <fail>
+    80002bec:	00301a63          	bne	zero,gp,80002c00 <pass>
+
+0000000080002bf0 <fail>:
+    80002bf0:	00119513          	slli	a0,gp,0x1
+    80002bf4:	00050063          	beqz	a0,80002bf4 <fail+0x4>
+    80002bf8:	00156513          	ori	a0,a0,1
+    80002bfc:	00000073          	ecall
+
+0000000080002c00 <pass>:
+    80002c00:	00100513          	li	a0,1
+    80002c04:	00000073          	ecall
+    80002c08:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	4000                	lw	s0,0(s0)
+
+0000000080003004 <test_3_data>:
+    80003004:	0000                	unimp
+    80003006:	c000                	sw	s0,0(s0)
+
+0000000080003008 <test_4_data>:
+    80003008:	0000                	unimp
+    8000300a:	4000                	lw	s0,0(s0)
+
+000000008000300c <test_5_data>:
+    8000300c:	0000                	unimp
+    8000300e:	4f80                	lw	s0,24(a5)
+
+0000000080003010 <test_6_data>:
+    80003010:	0000                	unimp
+    80003012:	4000                	lw	s0,0(s0)
+
+0000000080003014 <test_7_data>:
+    80003014:	0000                	unimp
+    80003016:	c000                	sw	s0,0(s0)
+
+0000000080003018 <test_8_data>:
+    80003018:	0000                	unimp
+    8000301a:	4000                	lw	s0,0(s0)
+
+000000008000301c <test_9_data>:
+    8000301c:	0000                	unimp
+    8000301e:	5f80                	lw	s0,56(a5)
diff --git a/test/riscv-tests/rv64uf-v-fcvt.elf b/test/riscv-tests/rv64uf-v-fcvt.elf
new file mode 100644
index 0000000..f5a8193
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcvt.elf
diff --git a/test/riscv-tests/rv64uf-v-fcvt_w.dump b/test/riscv-tests/rv64uf-v-fcvt_w.dump
new file mode 100644
index 0000000..7c95fce
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcvt_w.dump
@@ -0,0 +1,1722 @@
+
+rv64uf-v-fcvt_w:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	0000a117          	auipc	sp,0xa
+    8000001c:	6b810113          	addi	sp,sp,1720 # 8000a6d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00003617          	auipc	a2,0x3
+    80002318:	cec60613          	addi	a2,a2,-788 # 80005000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00007797          	auipc	a5,0x7
+    80002334:	4b878793          	addi	a5,a5,1208 # 800097e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00007717          	auipc	a4,0x7
+    80002348:	49c70713          	addi	a4,a4,1180 # 800097e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00007897          	auipc	a7,0x7
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800097e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00007797          	auipc	a5,0x7
+    80002384:	07078793          	addi	a5,a5,112 # 800093f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf6810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00007797          	auipc	a5,0x7
+    80002448:	3807be23          	sd	zero,924(a5) # 800097e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	df068693          	addi	a3,a3,-528 # 80003248 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	e2460613          	addi	a2,a2,-476 # 800032d8 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	dec60613          	addi	a2,a2,-532 # 800032f0 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	d3c68693          	addi	a3,a3,-708 # 80003290 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	d5868693          	addi	a3,a3,-680 # 800033c8 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	cd860613          	addi	a2,a2,-808 # 800033a0 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00007d17          	auipc	s10,0x7
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800093f0 <user_mapping>
+    80002724:	00003b97          	auipc	s7,0x3
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80005000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00007a17          	auipc	s4,0x7
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800097e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00007717          	auipc	a4,0x7
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800097e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00007717          	auipc	a4,0x7
+    800027d4:	00f73823          	sd	a5,16(a4) # 800097e0 <freelist_tail>
+    800027d8:	00007717          	auipc	a4,0x7
+    800027dc:	00f73823          	sd	a5,16(a4) # 800097e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00001697          	auipc	a3,0x1
+    800027f0:	c0c68693          	addi	a3,a3,-1012 # 800033f8 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00001697          	auipc	a3,0x1
+    80002840:	b2c68693          	addi	a3,a3,-1236 # 80003368 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00001697          	auipc	a3,0x1
+    80002878:	abc68693          	addi	a3,a3,-1348 # 80003330 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00003697          	auipc	a3,0x3
+    800028e0:	72468693          	addi	a3,a3,1828 # 80006000 <pt+0x1000>
+    800028e4:	00004717          	auipc	a4,0x4
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80007000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00005797          	auipc	a5,0x5
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80008000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00002897          	auipc	a7,0x2
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80005000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00003697          	auipc	a3,0x3
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80005ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00002617          	auipc	a2,0x2
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80005000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00005697          	auipc	a3,0x5
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80007ff8 <pt+0x2ff8>
+    8000294c:	00003717          	auipc	a4,0x3
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80006000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00006697          	auipc	a3,0x6
+    800029c0:	64468693          	addi	a3,a3,1604 # 80009000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00007617          	auipc	a2,0x7
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800097e8 <freelist_head>
+    800029d4:	00007797          	auipc	a5,0x7
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800097e0 <freelist_tail>
+    800029dc:	00007317          	auipc	t1,0x7
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800093f0 <user_mapping>
+    800029e4:	03e00793          	li	a5,62
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00007797          	auipc	a5,0x7
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800093e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	048057b7          	lui	a5,0x4805
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	f9678793          	addi	a5,a5,-106 # 4804f96 <_start-0x7b7fb06a>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00001517          	auipc	a0,0x1
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80004000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002aec:	001015f3          	fsflags	a1,zero
+    80002af0:	00100613          	li	a2,1
+    80002af4:	72d51a63          	bne	a0,a3,80003228 <fail>
+    80002af8:	72c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002afc <test_3>:
+    80002afc:	00300193          	li	gp,3
+    80002b00:	00001517          	auipc	a0,0x1
+    80002b04:	51050513          	addi	a0,a0,1296 # 80004010 <test_3_data>
+    80002b08:	00052007          	flw	ft0,0(a0)
+    80002b0c:	00452087          	flw	ft1,4(a0)
+    80002b10:	00852107          	flw	ft2,8(a0)
+    80002b14:	00c52683          	lw	a3,12(a0)
+    80002b18:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002b1c:	001015f3          	fsflags	a1,zero
+    80002b20:	00000613          	li	a2,0
+    80002b24:	70d51263          	bne	a0,a3,80003228 <fail>
+    80002b28:	70c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002b2c <test_4>:
+    80002b2c:	00400193          	li	gp,4
+    80002b30:	00001517          	auipc	a0,0x1
+    80002b34:	4f050513          	addi	a0,a0,1264 # 80004020 <test_4_data>
+    80002b38:	00052007          	flw	ft0,0(a0)
+    80002b3c:	00452087          	flw	ft1,4(a0)
+    80002b40:	00852107          	flw	ft2,8(a0)
+    80002b44:	00c52683          	lw	a3,12(a0)
+    80002b48:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002b4c:	001015f3          	fsflags	a1,zero
+    80002b50:	00100613          	li	a2,1
+    80002b54:	6cd51a63          	bne	a0,a3,80003228 <fail>
+    80002b58:	6cc59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002b5c <test_5>:
+    80002b5c:	00500193          	li	gp,5
+    80002b60:	00001517          	auipc	a0,0x1
+    80002b64:	4d050513          	addi	a0,a0,1232 # 80004030 <test_5_data>
+    80002b68:	00052007          	flw	ft0,0(a0)
+    80002b6c:	00452087          	flw	ft1,4(a0)
+    80002b70:	00852107          	flw	ft2,8(a0)
+    80002b74:	00c52683          	lw	a3,12(a0)
+    80002b78:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002b7c:	001015f3          	fsflags	a1,zero
+    80002b80:	00100613          	li	a2,1
+    80002b84:	6ad51263          	bne	a0,a3,80003228 <fail>
+    80002b88:	6ac59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002b8c <test_6>:
+    80002b8c:	00600193          	li	gp,6
+    80002b90:	00001517          	auipc	a0,0x1
+    80002b94:	4b050513          	addi	a0,a0,1200 # 80004040 <test_6_data>
+    80002b98:	00052007          	flw	ft0,0(a0)
+    80002b9c:	00452087          	flw	ft1,4(a0)
+    80002ba0:	00852107          	flw	ft2,8(a0)
+    80002ba4:	00c52683          	lw	a3,12(a0)
+    80002ba8:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002bac:	001015f3          	fsflags	a1,zero
+    80002bb0:	00000613          	li	a2,0
+    80002bb4:	66d51a63          	bne	a0,a3,80003228 <fail>
+    80002bb8:	66c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002bbc <test_7>:
+    80002bbc:	00700193          	li	gp,7
+    80002bc0:	00001517          	auipc	a0,0x1
+    80002bc4:	49050513          	addi	a0,a0,1168 # 80004050 <test_7_data>
+    80002bc8:	00052007          	flw	ft0,0(a0)
+    80002bcc:	00452087          	flw	ft1,4(a0)
+    80002bd0:	00852107          	flw	ft2,8(a0)
+    80002bd4:	00c52683          	lw	a3,12(a0)
+    80002bd8:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002bdc:	001015f3          	fsflags	a1,zero
+    80002be0:	00100613          	li	a2,1
+    80002be4:	64d51263          	bne	a0,a3,80003228 <fail>
+    80002be8:	64c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002bec <test_8>:
+    80002bec:	00800193          	li	gp,8
+    80002bf0:	00001517          	auipc	a0,0x1
+    80002bf4:	47050513          	addi	a0,a0,1136 # 80004060 <test_8_data>
+    80002bf8:	00052007          	flw	ft0,0(a0)
+    80002bfc:	00452087          	flw	ft1,4(a0)
+    80002c00:	00852107          	flw	ft2,8(a0)
+    80002c04:	00c52683          	lw	a3,12(a0)
+    80002c08:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002c0c:	001015f3          	fsflags	a1,zero
+    80002c10:	01000613          	li	a2,16
+    80002c14:	60d51a63          	bne	a0,a3,80003228 <fail>
+    80002c18:	60c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002c1c <test_9>:
+    80002c1c:	00900193          	li	gp,9
+    80002c20:	00001517          	auipc	a0,0x1
+    80002c24:	45050513          	addi	a0,a0,1104 # 80004070 <test_9_data>
+    80002c28:	00052007          	flw	ft0,0(a0)
+    80002c2c:	00452087          	flw	ft1,4(a0)
+    80002c30:	00852107          	flw	ft2,8(a0)
+    80002c34:	00c52683          	lw	a3,12(a0)
+    80002c38:	c0001553          	fcvt.w.s	a0,ft0,rtz
+    80002c3c:	001015f3          	fsflags	a1,zero
+    80002c40:	01000613          	li	a2,16
+    80002c44:	5ed51263          	bne	a0,a3,80003228 <fail>
+    80002c48:	5ec59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002c4c <test_12>:
+    80002c4c:	00c00193          	li	gp,12
+    80002c50:	00001517          	auipc	a0,0x1
+    80002c54:	43050513          	addi	a0,a0,1072 # 80004080 <test_12_data>
+    80002c58:	00052007          	flw	ft0,0(a0)
+    80002c5c:	00452087          	flw	ft1,4(a0)
+    80002c60:	00852107          	flw	ft2,8(a0)
+    80002c64:	00c52683          	lw	a3,12(a0)
+    80002c68:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002c6c:	001015f3          	fsflags	a1,zero
+    80002c70:	01000613          	li	a2,16
+    80002c74:	5ad51a63          	bne	a0,a3,80003228 <fail>
+    80002c78:	5ac59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002c7c <test_13>:
+    80002c7c:	00d00193          	li	gp,13
+    80002c80:	00001517          	auipc	a0,0x1
+    80002c84:	41050513          	addi	a0,a0,1040 # 80004090 <test_13_data>
+    80002c88:	00052007          	flw	ft0,0(a0)
+    80002c8c:	00452087          	flw	ft1,4(a0)
+    80002c90:	00852107          	flw	ft2,8(a0)
+    80002c94:	00c52683          	lw	a3,12(a0)
+    80002c98:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002c9c:	001015f3          	fsflags	a1,zero
+    80002ca0:	01000613          	li	a2,16
+    80002ca4:	58d51263          	bne	a0,a3,80003228 <fail>
+    80002ca8:	58c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002cac <test_14>:
+    80002cac:	00e00193          	li	gp,14
+    80002cb0:	00001517          	auipc	a0,0x1
+    80002cb4:	3f050513          	addi	a0,a0,1008 # 800040a0 <test_14_data>
+    80002cb8:	00052007          	flw	ft0,0(a0)
+    80002cbc:	00452087          	flw	ft1,4(a0)
+    80002cc0:	00852107          	flw	ft2,8(a0)
+    80002cc4:	00c52683          	lw	a3,12(a0)
+    80002cc8:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002ccc:	001015f3          	fsflags	a1,zero
+    80002cd0:	00100613          	li	a2,1
+    80002cd4:	54d51a63          	bne	a0,a3,80003228 <fail>
+    80002cd8:	54c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002cdc <test_15>:
+    80002cdc:	00f00193          	li	gp,15
+    80002ce0:	00001517          	auipc	a0,0x1
+    80002ce4:	3d050513          	addi	a0,a0,976 # 800040b0 <test_15_data>
+    80002ce8:	00052007          	flw	ft0,0(a0)
+    80002cec:	00452087          	flw	ft1,4(a0)
+    80002cf0:	00852107          	flw	ft2,8(a0)
+    80002cf4:	00c52683          	lw	a3,12(a0)
+    80002cf8:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002cfc:	001015f3          	fsflags	a1,zero
+    80002d00:	00100613          	li	a2,1
+    80002d04:	52d51263          	bne	a0,a3,80003228 <fail>
+    80002d08:	52c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002d0c <test_16>:
+    80002d0c:	01000193          	li	gp,16
+    80002d10:	00001517          	auipc	a0,0x1
+    80002d14:	3b050513          	addi	a0,a0,944 # 800040c0 <test_16_data>
+    80002d18:	00052007          	flw	ft0,0(a0)
+    80002d1c:	00452087          	flw	ft1,4(a0)
+    80002d20:	00852107          	flw	ft2,8(a0)
+    80002d24:	00c52683          	lw	a3,12(a0)
+    80002d28:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	4ed51a63          	bne	a0,a3,80003228 <fail>
+    80002d38:	4ec59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002d3c <test_17>:
+    80002d3c:	01100193          	li	gp,17
+    80002d40:	00001517          	auipc	a0,0x1
+    80002d44:	39050513          	addi	a0,a0,912 # 800040d0 <test_17_data>
+    80002d48:	00052007          	flw	ft0,0(a0)
+    80002d4c:	00452087          	flw	ft1,4(a0)
+    80002d50:	00852107          	flw	ft2,8(a0)
+    80002d54:	00c52683          	lw	a3,12(a0)
+    80002d58:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002d5c:	001015f3          	fsflags	a1,zero
+    80002d60:	00100613          	li	a2,1
+    80002d64:	4cd51263          	bne	a0,a3,80003228 <fail>
+    80002d68:	4cc59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002d6c <test_18>:
+    80002d6c:	01200193          	li	gp,18
+    80002d70:	00001517          	auipc	a0,0x1
+    80002d74:	37050513          	addi	a0,a0,880 # 800040e0 <test_18_data>
+    80002d78:	00052007          	flw	ft0,0(a0)
+    80002d7c:	00452087          	flw	ft1,4(a0)
+    80002d80:	00852107          	flw	ft2,8(a0)
+    80002d84:	00c52683          	lw	a3,12(a0)
+    80002d88:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002d8c:	001015f3          	fsflags	a1,zero
+    80002d90:	01000613          	li	a2,16
+    80002d94:	48d51a63          	bne	a0,a3,80003228 <fail>
+    80002d98:	48c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002d9c <test_19>:
+    80002d9c:	01300193          	li	gp,19
+    80002da0:	00001517          	auipc	a0,0x1
+    80002da4:	35050513          	addi	a0,a0,848 # 800040f0 <test_19_data>
+    80002da8:	00052007          	flw	ft0,0(a0)
+    80002dac:	00452087          	flw	ft1,4(a0)
+    80002db0:	00852107          	flw	ft2,8(a0)
+    80002db4:	00c52683          	lw	a3,12(a0)
+    80002db8:	c0101553          	fcvt.wu.s	a0,ft0,rtz
+    80002dbc:	001015f3          	fsflags	a1,zero
+    80002dc0:	00000613          	li	a2,0
+    80002dc4:	46d51263          	bne	a0,a3,80003228 <fail>
+    80002dc8:	46c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002dcc <test_22>:
+    80002dcc:	01600193          	li	gp,22
+    80002dd0:	00001517          	auipc	a0,0x1
+    80002dd4:	33050513          	addi	a0,a0,816 # 80004100 <test_22_data>
+    80002dd8:	00052007          	flw	ft0,0(a0)
+    80002ddc:	00452087          	flw	ft1,4(a0)
+    80002de0:	00852107          	flw	ft2,8(a0)
+    80002de4:	00c52683          	lw	a3,12(a0)
+    80002de8:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002dec:	001015f3          	fsflags	a1,zero
+    80002df0:	00100613          	li	a2,1
+    80002df4:	42d51a63          	bne	a0,a3,80003228 <fail>
+    80002df8:	42c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002dfc <test_23>:
+    80002dfc:	01700193          	li	gp,23
+    80002e00:	00001517          	auipc	a0,0x1
+    80002e04:	31050513          	addi	a0,a0,784 # 80004110 <test_23_data>
+    80002e08:	00052007          	flw	ft0,0(a0)
+    80002e0c:	00452087          	flw	ft1,4(a0)
+    80002e10:	00852107          	flw	ft2,8(a0)
+    80002e14:	00c52683          	lw	a3,12(a0)
+    80002e18:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002e1c:	001015f3          	fsflags	a1,zero
+    80002e20:	00000613          	li	a2,0
+    80002e24:	40d51263          	bne	a0,a3,80003228 <fail>
+    80002e28:	40c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002e2c <test_24>:
+    80002e2c:	01800193          	li	gp,24
+    80002e30:	00001517          	auipc	a0,0x1
+    80002e34:	2f050513          	addi	a0,a0,752 # 80004120 <test_24_data>
+    80002e38:	00052007          	flw	ft0,0(a0)
+    80002e3c:	00452087          	flw	ft1,4(a0)
+    80002e40:	00852107          	flw	ft2,8(a0)
+    80002e44:	00c52683          	lw	a3,12(a0)
+    80002e48:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002e4c:	001015f3          	fsflags	a1,zero
+    80002e50:	00100613          	li	a2,1
+    80002e54:	3cd51a63          	bne	a0,a3,80003228 <fail>
+    80002e58:	3cc59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002e5c <test_25>:
+    80002e5c:	01900193          	li	gp,25
+    80002e60:	00001517          	auipc	a0,0x1
+    80002e64:	2d050513          	addi	a0,a0,720 # 80004130 <test_25_data>
+    80002e68:	00052007          	flw	ft0,0(a0)
+    80002e6c:	00452087          	flw	ft1,4(a0)
+    80002e70:	00852107          	flw	ft2,8(a0)
+    80002e74:	00c52683          	lw	a3,12(a0)
+    80002e78:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002e7c:	001015f3          	fsflags	a1,zero
+    80002e80:	00100613          	li	a2,1
+    80002e84:	3ad51263          	bne	a0,a3,80003228 <fail>
+    80002e88:	3ac59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002e8c <test_26>:
+    80002e8c:	01a00193          	li	gp,26
+    80002e90:	00001517          	auipc	a0,0x1
+    80002e94:	2b050513          	addi	a0,a0,688 # 80004140 <test_26_data>
+    80002e98:	00052007          	flw	ft0,0(a0)
+    80002e9c:	00452087          	flw	ft1,4(a0)
+    80002ea0:	00852107          	flw	ft2,8(a0)
+    80002ea4:	00c52683          	lw	a3,12(a0)
+    80002ea8:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002eac:	001015f3          	fsflags	a1,zero
+    80002eb0:	00000613          	li	a2,0
+    80002eb4:	36d51a63          	bne	a0,a3,80003228 <fail>
+    80002eb8:	36c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002ebc <test_27>:
+    80002ebc:	01b00193          	li	gp,27
+    80002ec0:	00001517          	auipc	a0,0x1
+    80002ec4:	29050513          	addi	a0,a0,656 # 80004150 <test_27_data>
+    80002ec8:	00052007          	flw	ft0,0(a0)
+    80002ecc:	00452087          	flw	ft1,4(a0)
+    80002ed0:	00852107          	flw	ft2,8(a0)
+    80002ed4:	00c52683          	lw	a3,12(a0)
+    80002ed8:	c0201553          	fcvt.l.s	a0,ft0,rtz
+    80002edc:	001015f3          	fsflags	a1,zero
+    80002ee0:	00100613          	li	a2,1
+    80002ee4:	34d51263          	bne	a0,a3,80003228 <fail>
+    80002ee8:	34c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002eec <test_32>:
+    80002eec:	02000193          	li	gp,32
+    80002ef0:	00001517          	auipc	a0,0x1
+    80002ef4:	27050513          	addi	a0,a0,624 # 80004160 <test_32_data>
+    80002ef8:	00052007          	flw	ft0,0(a0)
+    80002efc:	00452087          	flw	ft1,4(a0)
+    80002f00:	00852107          	flw	ft2,8(a0)
+    80002f04:	00c52683          	lw	a3,12(a0)
+    80002f08:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002f0c:	001015f3          	fsflags	a1,zero
+    80002f10:	01000613          	li	a2,16
+    80002f14:	30d51a63          	bne	a0,a3,80003228 <fail>
+    80002f18:	30c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002f1c <test_33>:
+    80002f1c:	02100193          	li	gp,33
+    80002f20:	00001517          	auipc	a0,0x1
+    80002f24:	25050513          	addi	a0,a0,592 # 80004170 <test_33_data>
+    80002f28:	00052007          	flw	ft0,0(a0)
+    80002f2c:	00452087          	flw	ft1,4(a0)
+    80002f30:	00852107          	flw	ft2,8(a0)
+    80002f34:	00c52683          	lw	a3,12(a0)
+    80002f38:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002f3c:	001015f3          	fsflags	a1,zero
+    80002f40:	01000613          	li	a2,16
+    80002f44:	2ed51263          	bne	a0,a3,80003228 <fail>
+    80002f48:	2ec59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002f4c <test_34>:
+    80002f4c:	02200193          	li	gp,34
+    80002f50:	00001517          	auipc	a0,0x1
+    80002f54:	23050513          	addi	a0,a0,560 # 80004180 <test_34_data>
+    80002f58:	00052007          	flw	ft0,0(a0)
+    80002f5c:	00452087          	flw	ft1,4(a0)
+    80002f60:	00852107          	flw	ft2,8(a0)
+    80002f64:	00c52683          	lw	a3,12(a0)
+    80002f68:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002f6c:	001015f3          	fsflags	a1,zero
+    80002f70:	00100613          	li	a2,1
+    80002f74:	2ad51a63          	bne	a0,a3,80003228 <fail>
+    80002f78:	2ac59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002f7c <test_35>:
+    80002f7c:	02300193          	li	gp,35
+    80002f80:	00001517          	auipc	a0,0x1
+    80002f84:	21050513          	addi	a0,a0,528 # 80004190 <test_35_data>
+    80002f88:	00052007          	flw	ft0,0(a0)
+    80002f8c:	00452087          	flw	ft1,4(a0)
+    80002f90:	00852107          	flw	ft2,8(a0)
+    80002f94:	00c52683          	lw	a3,12(a0)
+    80002f98:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002f9c:	001015f3          	fsflags	a1,zero
+    80002fa0:	00100613          	li	a2,1
+    80002fa4:	28d51263          	bne	a0,a3,80003228 <fail>
+    80002fa8:	28c59063          	bne	a1,a2,80003228 <fail>
+
+0000000080002fac <test_36>:
+    80002fac:	02400193          	li	gp,36
+    80002fb0:	00001517          	auipc	a0,0x1
+    80002fb4:	1f050513          	addi	a0,a0,496 # 800041a0 <test_36_data>
+    80002fb8:	00052007          	flw	ft0,0(a0)
+    80002fbc:	00452087          	flw	ft1,4(a0)
+    80002fc0:	00852107          	flw	ft2,8(a0)
+    80002fc4:	00c52683          	lw	a3,12(a0)
+    80002fc8:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002fcc:	001015f3          	fsflags	a1,zero
+    80002fd0:	00000613          	li	a2,0
+    80002fd4:	24d51a63          	bne	a0,a3,80003228 <fail>
+    80002fd8:	24c59863          	bne	a1,a2,80003228 <fail>
+
+0000000080002fdc <test_37>:
+    80002fdc:	02500193          	li	gp,37
+    80002fe0:	00001517          	auipc	a0,0x1
+    80002fe4:	1d050513          	addi	a0,a0,464 # 800041b0 <test_37_data>
+    80002fe8:	00052007          	flw	ft0,0(a0)
+    80002fec:	00452087          	flw	ft1,4(a0)
+    80002ff0:	00852107          	flw	ft2,8(a0)
+    80002ff4:	00c52683          	lw	a3,12(a0)
+    80002ff8:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    80002ffc:	001015f3          	fsflags	a1,zero
+    80003000:	00100613          	li	a2,1
+    80003004:	22d51263          	bne	a0,a3,80003228 <fail>
+    80003008:	22c59063          	bne	a1,a2,80003228 <fail>
+
+000000008000300c <test_38>:
+    8000300c:	02600193          	li	gp,38
+    80003010:	00001517          	auipc	a0,0x1
+    80003014:	1b050513          	addi	a0,a0,432 # 800041c0 <test_38_data>
+    80003018:	00052007          	flw	ft0,0(a0)
+    8000301c:	00452087          	flw	ft1,4(a0)
+    80003020:	00852107          	flw	ft2,8(a0)
+    80003024:	00c52683          	lw	a3,12(a0)
+    80003028:	c0301553          	fcvt.lu.s	a0,ft0,rtz
+    8000302c:	001015f3          	fsflags	a1,zero
+    80003030:	01000613          	li	a2,16
+    80003034:	1ed51a63          	bne	a0,a3,80003228 <fail>
+    80003038:	1ec59863          	bne	a1,a2,80003228 <fail>
+
+000000008000303c <test_42>:
+    8000303c:	00001097          	auipc	ra,0x1
+    80003040:	19408093          	addi	ra,ra,404 # 800041d0 <begin_signature>
+    80003044:	0000a087          	flw	ft1,0(ra)
+    80003048:	c000f0d3          	fcvt.w.s	ra,ft1
+    8000304c:	80000eb7          	lui	t4,0x80000
+    80003050:	fffe8e9b          	addiw	t4,t4,-1
+    80003054:	02a00193          	li	gp,42
+    80003058:	1dd09863          	bne	ra,t4,80003228 <fail>
+
+000000008000305c <test_44>:
+    8000305c:	00001097          	auipc	ra,0x1
+    80003060:	17408093          	addi	ra,ra,372 # 800041d0 <begin_signature>
+    80003064:	0080a087          	flw	ft1,8(ra)
+    80003068:	c000f0d3          	fcvt.w.s	ra,ft1
+    8000306c:	80000eb7          	lui	t4,0x80000
+    80003070:	02c00193          	li	gp,44
+    80003074:	1bd09a63          	bne	ra,t4,80003228 <fail>
+
+0000000080003078 <test_43>:
+    80003078:	00001097          	auipc	ra,0x1
+    8000307c:	15808093          	addi	ra,ra,344 # 800041d0 <begin_signature>
+    80003080:	0000a087          	flw	ft1,0(ra)
+    80003084:	c020f0d3          	fcvt.l.s	ra,ft1
+    80003088:	fff00e9b          	addiw	t4,zero,-1
+    8000308c:	03fe9e93          	slli	t4,t4,0x3f
+    80003090:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffff680f>
+    80003094:	02b00193          	li	gp,43
+    80003098:	19d09863          	bne	ra,t4,80003228 <fail>
+
+000000008000309c <test_45>:
+    8000309c:	00001097          	auipc	ra,0x1
+    800030a0:	13408093          	addi	ra,ra,308 # 800041d0 <begin_signature>
+    800030a4:	0080a087          	flw	ft1,8(ra)
+    800030a8:	c020f0d3          	fcvt.l.s	ra,ft1
+    800030ac:	fff00e9b          	addiw	t4,zero,-1
+    800030b0:	03fe9e93          	slli	t4,t4,0x3f
+    800030b4:	02d00193          	li	gp,45
+    800030b8:	17d09863          	bne	ra,t4,80003228 <fail>
+
+00000000800030bc <test_52>:
+    800030bc:	00001097          	auipc	ra,0x1
+    800030c0:	11408093          	addi	ra,ra,276 # 800041d0 <begin_signature>
+    800030c4:	0040a087          	flw	ft1,4(ra)
+    800030c8:	c000f0d3          	fcvt.w.s	ra,ft1
+    800030cc:	80000eb7          	lui	t4,0x80000
+    800030d0:	fffe8e9b          	addiw	t4,t4,-1
+    800030d4:	03400193          	li	gp,52
+    800030d8:	15d09863          	bne	ra,t4,80003228 <fail>
+
+00000000800030dc <test_54>:
+    800030dc:	00001097          	auipc	ra,0x1
+    800030e0:	0f408093          	addi	ra,ra,244 # 800041d0 <begin_signature>
+    800030e4:	00c0a087          	flw	ft1,12(ra)
+    800030e8:	c000f0d3          	fcvt.w.s	ra,ft1
+    800030ec:	80000eb7          	lui	t4,0x80000
+    800030f0:	fffe8e9b          	addiw	t4,t4,-1
+    800030f4:	03600193          	li	gp,54
+    800030f8:	13d09863          	bne	ra,t4,80003228 <fail>
+
+00000000800030fc <test_53>:
+    800030fc:	00001097          	auipc	ra,0x1
+    80003100:	0d408093          	addi	ra,ra,212 # 800041d0 <begin_signature>
+    80003104:	0040a087          	flw	ft1,4(ra)
+    80003108:	c020f0d3          	fcvt.l.s	ra,ft1
+    8000310c:	fff00e9b          	addiw	t4,zero,-1
+    80003110:	03fe9e93          	slli	t4,t4,0x3f
+    80003114:	fffe8e93          	addi	t4,t4,-1 # ffffffff7fffffff <_end+0xfffffffeffff680f>
+    80003118:	03500193          	li	gp,53
+    8000311c:	11d09663          	bne	ra,t4,80003228 <fail>
+
+0000000080003120 <test_55>:
+    80003120:	00001097          	auipc	ra,0x1
+    80003124:	0b008093          	addi	ra,ra,176 # 800041d0 <begin_signature>
+    80003128:	00c0a087          	flw	ft1,12(ra)
+    8000312c:	c020f0d3          	fcvt.l.s	ra,ft1
+    80003130:	fff00e9b          	addiw	t4,zero,-1
+    80003134:	03fe9e93          	slli	t4,t4,0x3f
+    80003138:	fffe8e93          	addi	t4,t4,-1
+    8000313c:	03700193          	li	gp,55
+    80003140:	0fd09463          	bne	ra,t4,80003228 <fail>
+
+0000000080003144 <test_62>:
+    80003144:	00001097          	auipc	ra,0x1
+    80003148:	08c08093          	addi	ra,ra,140 # 800041d0 <begin_signature>
+    8000314c:	0000a087          	flw	ft1,0(ra)
+    80003150:	c010f0d3          	fcvt.wu.s	ra,ft1
+    80003154:	fff00e93          	li	t4,-1
+    80003158:	03e00193          	li	gp,62
+    8000315c:	0dd09663          	bne	ra,t4,80003228 <fail>
+
+0000000080003160 <test_63>:
+    80003160:	00001097          	auipc	ra,0x1
+    80003164:	07008093          	addi	ra,ra,112 # 800041d0 <begin_signature>
+    80003168:	0040a087          	flw	ft1,4(ra)
+    8000316c:	c010f0d3          	fcvt.wu.s	ra,ft1
+    80003170:	fff00e93          	li	t4,-1
+    80003174:	03f00193          	li	gp,63
+    80003178:	0bd09863          	bne	ra,t4,80003228 <fail>
+
+000000008000317c <test_64>:
+    8000317c:	00001097          	auipc	ra,0x1
+    80003180:	05408093          	addi	ra,ra,84 # 800041d0 <begin_signature>
+    80003184:	0080a087          	flw	ft1,8(ra)
+    80003188:	c010f0d3          	fcvt.wu.s	ra,ft1
+    8000318c:	00000e93          	li	t4,0
+    80003190:	04000193          	li	gp,64
+    80003194:	09d09a63          	bne	ra,t4,80003228 <fail>
+
+0000000080003198 <test_65>:
+    80003198:	00001097          	auipc	ra,0x1
+    8000319c:	03808093          	addi	ra,ra,56 # 800041d0 <begin_signature>
+    800031a0:	00c0a087          	flw	ft1,12(ra)
+    800031a4:	c010f0d3          	fcvt.wu.s	ra,ft1
+    800031a8:	fff00e93          	li	t4,-1
+    800031ac:	04100193          	li	gp,65
+    800031b0:	07d09c63          	bne	ra,t4,80003228 <fail>
+
+00000000800031b4 <test_66>:
+    800031b4:	00001097          	auipc	ra,0x1
+    800031b8:	01c08093          	addi	ra,ra,28 # 800041d0 <begin_signature>
+    800031bc:	0000a087          	flw	ft1,0(ra)
+    800031c0:	c030f0d3          	fcvt.lu.s	ra,ft1
+    800031c4:	fff00e93          	li	t4,-1
+    800031c8:	04200193          	li	gp,66
+    800031cc:	05d09e63          	bne	ra,t4,80003228 <fail>
+
+00000000800031d0 <test_67>:
+    800031d0:	00001097          	auipc	ra,0x1
+    800031d4:	00008093          	mv	ra,ra
+    800031d8:	0040a087          	flw	ft1,4(ra) # 800041d4 <begin_signature+0x4>
+    800031dc:	c030f0d3          	fcvt.lu.s	ra,ft1
+    800031e0:	fff00e93          	li	t4,-1
+    800031e4:	04300193          	li	gp,67
+    800031e8:	05d09063          	bne	ra,t4,80003228 <fail>
+
+00000000800031ec <test_68>:
+    800031ec:	00001097          	auipc	ra,0x1
+    800031f0:	fe408093          	addi	ra,ra,-28 # 800041d0 <begin_signature>
+    800031f4:	0080a087          	flw	ft1,8(ra)
+    800031f8:	c030f0d3          	fcvt.lu.s	ra,ft1
+    800031fc:	00000e93          	li	t4,0
+    80003200:	04400193          	li	gp,68
+    80003204:	03d09263          	bne	ra,t4,80003228 <fail>
+
+0000000080003208 <test_69>:
+    80003208:	00001097          	auipc	ra,0x1
+    8000320c:	fc808093          	addi	ra,ra,-56 # 800041d0 <begin_signature>
+    80003210:	00c0a087          	flw	ft1,12(ra)
+    80003214:	c030f0d3          	fcvt.lu.s	ra,ft1
+    80003218:	fff00e93          	li	t4,-1
+    8000321c:	04500193          	li	gp,69
+    80003220:	01d09463          	bne	ra,t4,80003228 <fail>
+    80003224:	00301a63          	bne	zero,gp,80003238 <pass>
+
+0000000080003228 <fail>:
+    80003228:	00119513          	slli	a0,gp,0x1
+    8000322c:	00050063          	beqz	a0,8000322c <fail+0x4>
+    80003230:	00156513          	ori	a0,a0,1
+    80003234:	00000073          	ecall
+
+0000000080003238 <pass>:
+    80003238:	00100513          	li	a0,1
+    8000323c:	00000073          	ecall
+    80003240:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080004000 <test_2_data>:
+    80004000:	cccd                	beqz	s1,800040ba <test_15_data+0xa>
+    80004002:	bf8c                	fsd	fa1,56(a5)
+    80004004:	0000                	unimp
+    80004006:	0000                	unimp
+    80004008:	0000                	unimp
+    8000400a:	0000                	unimp
+    8000400c:	ffff                	0xffff
+    8000400e:	ffff                	0xffff
+
+0000000080004010 <test_3_data>:
+    80004010:	0000                	unimp
+    80004012:	bf80                	fsd	fs0,56(a5)
+    80004014:	0000                	unimp
+    80004016:	0000                	unimp
+    80004018:	0000                	unimp
+    8000401a:	0000                	unimp
+    8000401c:	ffff                	0xffff
+    8000401e:	ffff                	0xffff
+
+0000000080004020 <test_4_data>:
+    80004020:	6666                	ld	a2,88(sp)
+    80004022:	bf66                	fsd	fs9,440(sp)
+    80004024:	0000                	unimp
+    80004026:	0000                	unimp
+    80004028:	0000                	unimp
+    8000402a:	0000                	unimp
+    8000402c:	0000                	unimp
+    8000402e:	0000                	unimp
+
+0000000080004030 <test_5_data>:
+    80004030:	6666                	ld	a2,88(sp)
+    80004032:	3f66                	fld	ft10,120(sp)
+    80004034:	0000                	unimp
+    80004036:	0000                	unimp
+    80004038:	0000                	unimp
+    8000403a:	0000                	unimp
+    8000403c:	0000                	unimp
+    8000403e:	0000                	unimp
+
+0000000080004040 <test_6_data>:
+    80004040:	0000                	unimp
+    80004042:	3f80                	fld	fs0,56(a5)
+    80004044:	0000                	unimp
+    80004046:	0000                	unimp
+    80004048:	0000                	unimp
+    8000404a:	0000                	unimp
+    8000404c:	0001                	nop
+    8000404e:	0000                	unimp
+
+0000000080004050 <test_7_data>:
+    80004050:	cccd                	beqz	s1,8000410a <test_22_data+0xa>
+    80004052:	3f8c                	fld	fa1,56(a5)
+    80004054:	0000                	unimp
+    80004056:	0000                	unimp
+    80004058:	0000                	unimp
+    8000405a:	0000                	unimp
+    8000405c:	0001                	nop
+    8000405e:	0000                	unimp
+
+0000000080004060 <test_8_data>:
+    80004060:	d05e                	sw	s7,32(sp)
+    80004062:	cf32                	sw	a2,156(sp)
+    80004064:	0000                	unimp
+    80004066:	0000                	unimp
+    80004068:	0000                	unimp
+    8000406a:	0000                	unimp
+    8000406c:	0000                	unimp
+    8000406e:	8000                	0x8000
+
+0000000080004070 <test_9_data>:
+    80004070:	d05e                	sw	s7,32(sp)
+    80004072:	4f32                	lw	t5,12(sp)
+    80004074:	0000                	unimp
+    80004076:	0000                	unimp
+    80004078:	0000                	unimp
+    8000407a:	0000                	unimp
+    8000407c:	ffff                	0xffff
+    8000407e:	7fff                	0x7fff
+
+0000000080004080 <test_12_data>:
+    80004080:	0000                	unimp
+    80004082:	c040                	sw	s0,4(s0)
+    80004084:	0000                	unimp
+    80004086:	0000                	unimp
+    80004088:	0000                	unimp
+    8000408a:	0000                	unimp
+    8000408c:	0000                	unimp
+    8000408e:	0000                	unimp
+
+0000000080004090 <test_13_data>:
+    80004090:	0000                	unimp
+    80004092:	bf80                	fsd	fs0,56(a5)
+    80004094:	0000                	unimp
+    80004096:	0000                	unimp
+    80004098:	0000                	unimp
+    8000409a:	0000                	unimp
+    8000409c:	0000                	unimp
+    8000409e:	0000                	unimp
+
+00000000800040a0 <test_14_data>:
+    800040a0:	6666                	ld	a2,88(sp)
+    800040a2:	bf66                	fsd	fs9,440(sp)
+    800040a4:	0000                	unimp
+    800040a6:	0000                	unimp
+    800040a8:	0000                	unimp
+    800040aa:	0000                	unimp
+    800040ac:	0000                	unimp
+    800040ae:	0000                	unimp
+
+00000000800040b0 <test_15_data>:
+    800040b0:	6666                	ld	a2,88(sp)
+    800040b2:	3f66                	fld	ft10,120(sp)
+    800040b4:	0000                	unimp
+    800040b6:	0000                	unimp
+    800040b8:	0000                	unimp
+    800040ba:	0000                	unimp
+    800040bc:	0000                	unimp
+    800040be:	0000                	unimp
+
+00000000800040c0 <test_16_data>:
+    800040c0:	0000                	unimp
+    800040c2:	3f80                	fld	fs0,56(a5)
+    800040c4:	0000                	unimp
+    800040c6:	0000                	unimp
+    800040c8:	0000                	unimp
+    800040ca:	0000                	unimp
+    800040cc:	0001                	nop
+    800040ce:	0000                	unimp
+
+00000000800040d0 <test_17_data>:
+    800040d0:	cccd                	beqz	s1,8000418a <test_34_data+0xa>
+    800040d2:	3f8c                	fld	fa1,56(a5)
+    800040d4:	0000                	unimp
+    800040d6:	0000                	unimp
+    800040d8:	0000                	unimp
+    800040da:	0000                	unimp
+    800040dc:	0001                	nop
+    800040de:	0000                	unimp
+
+00000000800040e0 <test_18_data>:
+    800040e0:	d05e                	sw	s7,32(sp)
+    800040e2:	cf32                	sw	a2,156(sp)
+    800040e4:	0000                	unimp
+    800040e6:	0000                	unimp
+    800040e8:	0000                	unimp
+    800040ea:	0000                	unimp
+    800040ec:	0000                	unimp
+    800040ee:	0000                	unimp
+
+00000000800040f0 <test_19_data>:
+    800040f0:	d05e                	sw	s7,32(sp)
+    800040f2:	4f32                	lw	t5,12(sp)
+    800040f4:	0000                	unimp
+    800040f6:	0000                	unimp
+    800040f8:	0000                	unimp
+    800040fa:	0000                	unimp
+    800040fc:	5e00                	lw	s0,56(a2)
+    800040fe:	b2d0                	fsd	fa2,160(a3)
+
+0000000080004100 <test_22_data>:
+    80004100:	cccd                	beqz	s1,800041ba <test_37_data+0xa>
+    80004102:	bf8c                	fsd	fa1,56(a5)
+    80004104:	0000                	unimp
+    80004106:	0000                	unimp
+    80004108:	0000                	unimp
+    8000410a:	0000                	unimp
+    8000410c:	ffff                	0xffff
+    8000410e:	ffff                	0xffff
+
+0000000080004110 <test_23_data>:
+    80004110:	0000                	unimp
+    80004112:	bf80                	fsd	fs0,56(a5)
+    80004114:	0000                	unimp
+    80004116:	0000                	unimp
+    80004118:	0000                	unimp
+    8000411a:	0000                	unimp
+    8000411c:	ffff                	0xffff
+    8000411e:	ffff                	0xffff
+
+0000000080004120 <test_24_data>:
+    80004120:	6666                	ld	a2,88(sp)
+    80004122:	bf66                	fsd	fs9,440(sp)
+    80004124:	0000                	unimp
+    80004126:	0000                	unimp
+    80004128:	0000                	unimp
+    8000412a:	0000                	unimp
+    8000412c:	0000                	unimp
+    8000412e:	0000                	unimp
+
+0000000080004130 <test_25_data>:
+    80004130:	6666                	ld	a2,88(sp)
+    80004132:	3f66                	fld	ft10,120(sp)
+    80004134:	0000                	unimp
+    80004136:	0000                	unimp
+    80004138:	0000                	unimp
+    8000413a:	0000                	unimp
+    8000413c:	0000                	unimp
+    8000413e:	0000                	unimp
+
+0000000080004140 <test_26_data>:
+    80004140:	0000                	unimp
+    80004142:	3f80                	fld	fs0,56(a5)
+    80004144:	0000                	unimp
+    80004146:	0000                	unimp
+    80004148:	0000                	unimp
+    8000414a:	0000                	unimp
+    8000414c:	0001                	nop
+    8000414e:	0000                	unimp
+
+0000000080004150 <test_27_data>:
+    80004150:	cccd                	beqz	s1,8000420a <tdat_d+0x2a>
+    80004152:	3f8c                	fld	fa1,56(a5)
+    80004154:	0000                	unimp
+    80004156:	0000                	unimp
+    80004158:	0000                	unimp
+    8000415a:	0000                	unimp
+    8000415c:	0001                	nop
+    8000415e:	0000                	unimp
+
+0000000080004160 <test_32_data>:
+    80004160:	0000                	unimp
+    80004162:	c040                	sw	s0,4(s0)
+    80004164:	0000                	unimp
+    80004166:	0000                	unimp
+    80004168:	0000                	unimp
+    8000416a:	0000                	unimp
+    8000416c:	0000                	unimp
+    8000416e:	0000                	unimp
+
+0000000080004170 <test_33_data>:
+    80004170:	0000                	unimp
+    80004172:	bf80                	fsd	fs0,56(a5)
+    80004174:	0000                	unimp
+    80004176:	0000                	unimp
+    80004178:	0000                	unimp
+    8000417a:	0000                	unimp
+    8000417c:	0000                	unimp
+    8000417e:	0000                	unimp
+
+0000000080004180 <test_34_data>:
+    80004180:	6666                	ld	a2,88(sp)
+    80004182:	bf66                	fsd	fs9,440(sp)
+    80004184:	0000                	unimp
+    80004186:	0000                	unimp
+    80004188:	0000                	unimp
+    8000418a:	0000                	unimp
+    8000418c:	0000                	unimp
+    8000418e:	0000                	unimp
+
+0000000080004190 <test_35_data>:
+    80004190:	6666                	ld	a2,88(sp)
+    80004192:	3f66                	fld	ft10,120(sp)
+    80004194:	0000                	unimp
+    80004196:	0000                	unimp
+    80004198:	0000                	unimp
+    8000419a:	0000                	unimp
+    8000419c:	0000                	unimp
+    8000419e:	0000                	unimp
+
+00000000800041a0 <test_36_data>:
+    800041a0:	0000                	unimp
+    800041a2:	3f80                	fld	fs0,56(a5)
+    800041a4:	0000                	unimp
+    800041a6:	0000                	unimp
+    800041a8:	0000                	unimp
+    800041aa:	0000                	unimp
+    800041ac:	0001                	nop
+    800041ae:	0000                	unimp
+
+00000000800041b0 <test_37_data>:
+    800041b0:	cccd                	beqz	s1,8000426a <tdat_d+0x8a>
+    800041b2:	3f8c                	fld	fa1,56(a5)
+    800041b4:	0000                	unimp
+    800041b6:	0000                	unimp
+    800041b8:	0000                	unimp
+    800041ba:	0000                	unimp
+    800041bc:	0001                	nop
+    800041be:	0000                	unimp
+
+00000000800041c0 <test_38_data>:
+    800041c0:	d05e                	sw	s7,32(sp)
+    800041c2:	cf32                	sw	a2,156(sp)
+    800041c4:	0000                	unimp
+    800041c6:	0000                	unimp
+    800041c8:	0000                	unimp
+    800041ca:	0000                	unimp
+    800041cc:	0000                	unimp
+    800041ce:	0000                	unimp
+
+00000000800041d0 <begin_signature>:
+    800041d0:	ffff                	0xffff
+    800041d2:	ffff                	0xffff
+    800041d4:	ffff                	0xffff
+    800041d6:	7fff                	0x7fff
+    800041d8:	0000                	unimp
+    800041da:	ff80                	sd	s0,56(a5)
+    800041dc:	0000                	unimp
+    800041de:	7f80                	ld	s0,56(a5)
+
+00000000800041e0 <tdat_d>:
+    800041e0:	ffff                	0xffff
+    800041e2:	ffff                	0xffff
+    800041e4:	ffff                	0xffff
+    800041e6:	ffff                	0xffff
+    800041e8:	ffff                	0xffff
+    800041ea:	ffff                	0xffff
+    800041ec:	ffff                	0xffff
+    800041ee:	7fff                	0x7fff
+    800041f0:	0000                	unimp
+    800041f2:	0000                	unimp
+    800041f4:	0000                	unimp
+    800041f6:	fff0                	sd	a2,248(a5)
+    800041f8:	0000                	unimp
+    800041fa:	0000                	unimp
+    800041fc:	0000                	unimp
+    800041fe:	7ff0                	ld	a2,248(a5)
diff --git a/test/riscv-tests/rv64uf-v-fcvt_w.elf b/test/riscv-tests/rv64uf-v-fcvt_w.elf
new file mode 100644
index 0000000..194ac5c
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fcvt_w.elf
diff --git a/test/riscv-tests/rv64uf-v-fdiv.dump b/test/riscv-tests/rv64uf-v-fdiv.dump
new file mode 100644
index 0000000..0678b02
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fdiv.dump
@@ -0,0 +1,1021 @@
+
+rv64uf-v-fdiv:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	80068693          	addi	a3,a3,-2048 # 80002c58 <pass+0xc>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	83460613          	addi	a2,a2,-1996 # 80002ce8 <pass+0x9c>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00000617          	auipc	a2,0x0
+    80002508:	7fc60613          	addi	a2,a2,2044 # 80002d00 <pass+0xb4>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00000697          	auipc	a3,0x0
+    80002558:	74c68693          	addi	a3,a3,1868 # 80002ca0 <pass+0x54>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00000697          	auipc	a3,0x0
+    80002674:	76868693          	addi	a3,a3,1896 # 80002dd8 <pass+0x18c>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	6e860613          	addi	a2,a2,1768 # 80002db0 <pass+0x164>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	61c68693          	addi	a3,a3,1564 # 80002e08 <pass+0x1bc>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	53c68693          	addi	a3,a3,1340 # 80002d78 <pass+0x12c>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	4cc68693          	addi	a3,a3,1228 # 80002d40 <pass+0xf4>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	03100793          	li	a5,49
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0fd527b7          	lui	a5,0xfd52
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	05878793          	addi	a5,a5,88 # fd52058 <_start-0x702adfa8>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	181071d3          	fdiv.s	ft3,ft0,ft1
+    80002aec:	e0018553          	fmv.x.w	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00100613          	li	a2,1
+    80002af8:	14d51263          	bne	a0,a3,80002c3c <fail>
+    80002afc:	14c59063          	bne	a1,a2,80002c3c <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	50c50513          	addi	a0,a0,1292 # 80003010 <test_3_data>
+    80002b0c:	00052007          	flw	ft0,0(a0)
+    80002b10:	00452087          	flw	ft1,4(a0)
+    80002b14:	00852107          	flw	ft2,8(a0)
+    80002b18:	00c52683          	lw	a3,12(a0)
+    80002b1c:	181071d3          	fdiv.s	ft3,ft0,ft1
+    80002b20:	e0018553          	fmv.x.w	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	10d51863          	bne	a0,a3,80002c3c <fail>
+    80002b30:	10c59663          	bne	a1,a2,80002c3c <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	4e850513          	addi	a0,a0,1256 # 80003020 <test_4_data>
+    80002b40:	00052007          	flw	ft0,0(a0)
+    80002b44:	00452087          	flw	ft1,4(a0)
+    80002b48:	00852107          	flw	ft2,8(a0)
+    80002b4c:	00c52683          	lw	a3,12(a0)
+    80002b50:	181071d3          	fdiv.s	ft3,ft0,ft1
+    80002b54:	e0018553          	fmv.x.w	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	0cd51e63          	bne	a0,a3,80002c3c <fail>
+    80002b64:	0cc59c63          	bne	a1,a2,80002c3c <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4c450513          	addi	a0,a0,1220 # 80003030 <test_5_data>
+    80002b74:	00052007          	flw	ft0,0(a0)
+    80002b78:	00452087          	flw	ft1,4(a0)
+    80002b7c:	00852107          	flw	ft2,8(a0)
+    80002b80:	00c52683          	lw	a3,12(a0)
+    80002b84:	580071d3          	fsqrt.s	ft3,ft0
+    80002b88:	e0018553          	fmv.x.w	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00100613          	li	a2,1
+    80002b94:	0ad51463          	bne	a0,a3,80002c3c <fail>
+    80002b98:	0ac59263          	bne	a1,a2,80002c3c <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4a050513          	addi	a0,a0,1184 # 80003040 <test_6_data>
+    80002ba8:	00052007          	flw	ft0,0(a0)
+    80002bac:	00452087          	flw	ft1,4(a0)
+    80002bb0:	00852107          	flw	ft2,8(a0)
+    80002bb4:	00c52683          	lw	a3,12(a0)
+    80002bb8:	580071d3          	fsqrt.s	ft3,ft0
+    80002bbc:	e0018553          	fmv.x.w	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00000613          	li	a2,0
+    80002bc8:	06d51a63          	bne	a0,a3,80002c3c <fail>
+    80002bcc:	06c59863          	bne	a1,a2,80002c3c <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	47c50513          	addi	a0,a0,1148 # 80003050 <test_7_data>
+    80002bdc:	00052007          	flw	ft0,0(a0)
+    80002be0:	00452087          	flw	ft1,4(a0)
+    80002be4:	00852107          	flw	ft2,8(a0)
+    80002be8:	00c52683          	lw	a3,12(a0)
+    80002bec:	580071d3          	fsqrt.s	ft3,ft0
+    80002bf0:	e0018553          	fmv.x.w	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	01000613          	li	a2,16
+    80002bfc:	04d51063          	bne	a0,a3,80002c3c <fail>
+    80002c00:	02c59e63          	bne	a1,a2,80002c3c <fail>
+
+0000000080002c04 <test_8>:
+    80002c04:	00800193          	li	gp,8
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	45c50513          	addi	a0,a0,1116 # 80003064 <test_8_data>
+    80002c10:	00052007          	flw	ft0,0(a0)
+    80002c14:	00452087          	flw	ft1,4(a0)
+    80002c18:	00852107          	flw	ft2,8(a0)
+    80002c1c:	00c52683          	lw	a3,12(a0)
+    80002c20:	580071d3          	fsqrt.s	ft3,ft0
+    80002c24:	e0018553          	fmv.x.w	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00100613          	li	a2,1
+    80002c30:	00d51663          	bne	a0,a3,80002c3c <fail>
+    80002c34:	00c59463          	bne	a1,a2,80002c3c <fail>
+    80002c38:	00301a63          	bne	zero,gp,80002c4c <pass>
+
+0000000080002c3c <fail>:
+    80002c3c:	00119513          	slli	a0,gp,0x1
+    80002c40:	00050063          	beqz	a0,80002c40 <fail+0x4>
+    80002c44:	00156513          	ori	a0,a0,1
+    80002c48:	00000073          	ecall
+
+0000000080002c4c <pass>:
+    80002c4c:	00100513          	li	a0,1
+    80002c50:	00000073          	ecall
+    80002c54:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	40490fdb          	0x40490fdb
+    80003004:	f854                	sd	a3,176(s0)
+    80003006:	402d                	c.li	zero,11
+    80003008:	0000                	unimp
+    8000300a:	0000                	unimp
+    8000300c:	eee0                	sd	s0,216(a3)
+    8000300e:	          	sltiu	t6,zero,1024
+
+0000000080003010 <test_3_data>:
+    80003010:	4000                	lw	s0,0(s0)
+    80003012:	c49a                	sw	t1,72(sp)
+    80003014:	449a6333          	0x449a6333
+    80003018:	0000                	unimp
+    8000301a:	0000                	unimp
+    8000301c:	c5a2                	sw	s0,200(sp)
+    8000301e:	bf7f                	0xbf7f
+
+0000000080003020 <test_4_data>:
+    80003020:	40490fdb          	0x40490fdb
+    80003024:	0000                	unimp
+    80003026:	3f80                	fld	fs0,56(a5)
+    80003028:	0000                	unimp
+    8000302a:	0000                	unimp
+    8000302c:	40490fdb          	0x40490fdb
+
+0000000080003030 <test_5_data>:
+    80003030:	40490fdb          	0x40490fdb
+    80003034:	0000                	unimp
+    80003036:	0000                	unimp
+    80003038:	0000                	unimp
+    8000303a:	0000                	unimp
+    8000303c:	dfc5                	beqz	a5,80002ff4 <pass+0x3a8>
+    8000303e:	3fe2                	fld	ft11,56(sp)
+
+0000000080003040 <test_6_data>:
+    80003040:	4000                	lw	s0,0(s0)
+    80003042:	461c                	lw	a5,8(a2)
+    80003044:	0000                	unimp
+    80003046:	0000                	unimp
+    80003048:	0000                	unimp
+    8000304a:	0000                	unimp
+    8000304c:	0000                	unimp
+    8000304e:	42c8                	lw	a0,4(a3)
+
+0000000080003050 <test_7_data>:
+    80003050:	0000                	unimp
+    80003052:	bf80                	fsd	fs0,56(a5)
+    80003054:	0000                	unimp
+    80003056:	0000                	unimp
+    80003058:	0000                	unimp
+    8000305a:	0000                	unimp
+    8000305c:	0000                	unimp
+    8000305e:	7fc0                	ld	s0,184(a5)
+    80003060:	0000                	unimp
+    80003062:	0000                	unimp
+
+0000000080003064 <test_8_data>:
+    80003064:	0000                	unimp
+    80003066:	0000432b          	0x432b
+    8000306a:	0000                	unimp
+    8000306c:	0000                	unimp
+    8000306e:	0000                	unimp
+    80003070:	3a26                	fld	fs4,104(sp)
+    80003072:	4151                	li	sp,20
+    80003074:	0000                	unimp
+    80003076:	0000                	unimp
+    80003078:	0000                	unimp
+    8000307a:	0000                	unimp
+    8000307c:	0000                	unimp
+    8000307e:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-v-fdiv.elf b/test/riscv-tests/rv64uf-v-fdiv.elf
new file mode 100644
index 0000000..5e4c30d
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fdiv.elf
diff --git a/test/riscv-tests/rv64uf-v-fmadd.dump b/test/riscv-tests/rv64uf-v-fmadd.dump
new file mode 100644
index 0000000..f99b7b2
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fmadd.dump
@@ -0,0 +1,1140 @@
+
+rv64uf-v-fmadd:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	00009117          	auipc	sp,0x9
+    8000001c:	6b810113          	addi	sp,sp,1720 # 800096d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00002617          	auipc	a2,0x2
+    80002318:	cec60613          	addi	a2,a2,-788 # 80004000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00006797          	auipc	a5,0x6
+    80002334:	4b878793          	addi	a5,a5,1208 # 800087e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00006717          	auipc	a4,0x6
+    80002348:	49c70713          	addi	a4,a4,1180 # 800087e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00006897          	auipc	a7,0x6
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800087e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00006797          	auipc	a5,0x6
+    80002384:	07078793          	addi	a5,a5,112 # 800083f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf7810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00006797          	auipc	a5,0x6
+    80002448:	3807be23          	sd	zero,924(a5) # 800087e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	90868693          	addi	a3,a3,-1784 # 80002d60 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	93c60613          	addi	a2,a2,-1732 # 80002df0 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	90460613          	addi	a2,a2,-1788 # 80002e08 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	85468693          	addi	a3,a3,-1964 # 80002da8 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	87068693          	addi	a3,a3,-1936 # 80002ee0 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00000617          	auipc	a2,0x0
+    800026cc:	7f060613          	addi	a2,a2,2032 # 80002eb8 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00006d17          	auipc	s10,0x6
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800083f0 <user_mapping>
+    80002724:	00002b97          	auipc	s7,0x2
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80004000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00006a17          	auipc	s4,0x6
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800087e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00006717          	auipc	a4,0x6
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800087e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00006717          	auipc	a4,0x6
+    800027d4:	00f73823          	sd	a5,16(a4) # 800087e0 <freelist_tail>
+    800027d8:	00006717          	auipc	a4,0x6
+    800027dc:	00f73823          	sd	a5,16(a4) # 800087e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00000697          	auipc	a3,0x0
+    800027f0:	72468693          	addi	a3,a3,1828 # 80002f10 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	64468693          	addi	a3,a3,1604 # 80002e80 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	5d468693          	addi	a3,a3,1492 # 80002e48 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00002697          	auipc	a3,0x2
+    800028e0:	72468693          	addi	a3,a3,1828 # 80005000 <pt+0x1000>
+    800028e4:	00003717          	auipc	a4,0x3
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80006000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00004797          	auipc	a5,0x4
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80007000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00001897          	auipc	a7,0x1
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80004000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00002697          	auipc	a3,0x2
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80004ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00001617          	auipc	a2,0x1
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80004000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00004697          	auipc	a3,0x4
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80006ff8 <pt+0x2ff8>
+    8000294c:	00002717          	auipc	a4,0x2
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80005000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00005697          	auipc	a3,0x5
+    800029c0:	64468693          	addi	a3,a3,1604 # 80008000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00006617          	auipc	a2,0x6
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800087e8 <freelist_head>
+    800029d4:	00006797          	auipc	a5,0x6
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800087e0 <freelist_tail>
+    800029dc:	00006317          	auipc	t1,0x6
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800083f0 <user_mapping>
+    800029e4:	01a00793          	li	a5,26
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00006797          	auipc	a5,0x6
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800083e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	094647b7          	lui	a5,0x9464
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	ca878793          	addi	a5,a5,-856 # 9463ca8 <_start-0x76b9c358>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00000517          	auipc	a0,0x0
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80003000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    80002aec:	e0018553          	fmv.x.w	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	24d51463          	bne	a0,a3,80002d40 <fail>
+    80002afc:	24c59263          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00000517          	auipc	a0,0x0
+    80002b08:	50c50513          	addi	a0,a0,1292 # 80003010 <test_3_data>
+    80002b0c:	00052007          	flw	ft0,0(a0)
+    80002b10:	00452087          	flw	ft1,4(a0)
+    80002b14:	00852107          	flw	ft2,8(a0)
+    80002b18:	00c52683          	lw	a3,12(a0)
+    80002b1c:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    80002b20:	e0018553          	fmv.x.w	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00100613          	li	a2,1
+    80002b2c:	20d51a63          	bne	a0,a3,80002d40 <fail>
+    80002b30:	20c59863          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00000517          	auipc	a0,0x0
+    80002b3c:	4e850513          	addi	a0,a0,1256 # 80003020 <test_4_data>
+    80002b40:	00052007          	flw	ft0,0(a0)
+    80002b44:	00452087          	flw	ft1,4(a0)
+    80002b48:	00852107          	flw	ft2,8(a0)
+    80002b4c:	00c52683          	lw	a3,12(a0)
+    80002b50:	101071c3          	fmadd.s	ft3,ft0,ft1,ft2
+    80002b54:	e0018553          	fmv.x.w	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	1ed51063          	bne	a0,a3,80002d40 <fail>
+    80002b64:	1cc59e63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00000517          	auipc	a0,0x0
+    80002b70:	4c450513          	addi	a0,a0,1220 # 80003030 <test_5_data>
+    80002b74:	00052007          	flw	ft0,0(a0)
+    80002b78:	00452087          	flw	ft1,4(a0)
+    80002b7c:	00852107          	flw	ft2,8(a0)
+    80002b80:	00c52683          	lw	a3,12(a0)
+    80002b84:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    80002b88:	e0018553          	fmv.x.w	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	1ad51663          	bne	a0,a3,80002d40 <fail>
+    80002b98:	1ac59463          	bne	a1,a2,80002d40 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00000517          	auipc	a0,0x0
+    80002ba4:	4a050513          	addi	a0,a0,1184 # 80003040 <test_6_data>
+    80002ba8:	00052007          	flw	ft0,0(a0)
+    80002bac:	00452087          	flw	ft1,4(a0)
+    80002bb0:	00852107          	flw	ft2,8(a0)
+    80002bb4:	00c52683          	lw	a3,12(a0)
+    80002bb8:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    80002bbc:	e0018553          	fmv.x.w	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00100613          	li	a2,1
+    80002bc8:	16d51c63          	bne	a0,a3,80002d40 <fail>
+    80002bcc:	16c59a63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00000517          	auipc	a0,0x0
+    80002bd8:	47c50513          	addi	a0,a0,1148 # 80003050 <test_7_data>
+    80002bdc:	00052007          	flw	ft0,0(a0)
+    80002be0:	00452087          	flw	ft1,4(a0)
+    80002be4:	00852107          	flw	ft2,8(a0)
+    80002be8:	00c52683          	lw	a3,12(a0)
+    80002bec:	101071cf          	fnmadd.s	ft3,ft0,ft1,ft2
+    80002bf0:	e0018553          	fmv.x.w	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00000613          	li	a2,0
+    80002bfc:	14d51263          	bne	a0,a3,80002d40 <fail>
+    80002c00:	14c59063          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c04 <test_8>:
+    80002c04:	00800193          	li	gp,8
+    80002c08:	00000517          	auipc	a0,0x0
+    80002c0c:	45850513          	addi	a0,a0,1112 # 80003060 <test_8_data>
+    80002c10:	00052007          	flw	ft0,0(a0)
+    80002c14:	00452087          	flw	ft1,4(a0)
+    80002c18:	00852107          	flw	ft2,8(a0)
+    80002c1c:	00c52683          	lw	a3,12(a0)
+    80002c20:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    80002c24:	e0018553          	fmv.x.w	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	10d51863          	bne	a0,a3,80002d40 <fail>
+    80002c34:	10c59663          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c38 <test_9>:
+    80002c38:	00900193          	li	gp,9
+    80002c3c:	00000517          	auipc	a0,0x0
+    80002c40:	43450513          	addi	a0,a0,1076 # 80003070 <test_9_data>
+    80002c44:	00052007          	flw	ft0,0(a0)
+    80002c48:	00452087          	flw	ft1,4(a0)
+    80002c4c:	00852107          	flw	ft2,8(a0)
+    80002c50:	00c52683          	lw	a3,12(a0)
+    80002c54:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    80002c58:	e0018553          	fmv.x.w	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00100613          	li	a2,1
+    80002c64:	0cd51e63          	bne	a0,a3,80002d40 <fail>
+    80002c68:	0cc59c63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002c6c <test_10>:
+    80002c6c:	00a00193          	li	gp,10
+    80002c70:	00000517          	auipc	a0,0x0
+    80002c74:	41050513          	addi	a0,a0,1040 # 80003080 <test_10_data>
+    80002c78:	00052007          	flw	ft0,0(a0)
+    80002c7c:	00452087          	flw	ft1,4(a0)
+    80002c80:	00852107          	flw	ft2,8(a0)
+    80002c84:	00c52683          	lw	a3,12(a0)
+    80002c88:	101071c7          	fmsub.s	ft3,ft0,ft1,ft2
+    80002c8c:	e0018553          	fmv.x.w	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00000613          	li	a2,0
+    80002c98:	0ad51463          	bne	a0,a3,80002d40 <fail>
+    80002c9c:	0ac59263          	bne	a1,a2,80002d40 <fail>
+
+0000000080002ca0 <test_11>:
+    80002ca0:	00b00193          	li	gp,11
+    80002ca4:	00000517          	auipc	a0,0x0
+    80002ca8:	3ec50513          	addi	a0,a0,1004 # 80003090 <test_11_data>
+    80002cac:	00052007          	flw	ft0,0(a0)
+    80002cb0:	00452087          	flw	ft1,4(a0)
+    80002cb4:	00852107          	flw	ft2,8(a0)
+    80002cb8:	00c52683          	lw	a3,12(a0)
+    80002cbc:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    80002cc0:	e0018553          	fmv.x.w	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	00000613          	li	a2,0
+    80002ccc:	06d51a63          	bne	a0,a3,80002d40 <fail>
+    80002cd0:	06c59863          	bne	a1,a2,80002d40 <fail>
+
+0000000080002cd4 <test_12>:
+    80002cd4:	00c00193          	li	gp,12
+    80002cd8:	00000517          	auipc	a0,0x0
+    80002cdc:	3c850513          	addi	a0,a0,968 # 800030a0 <test_12_data>
+    80002ce0:	00052007          	flw	ft0,0(a0)
+    80002ce4:	00452087          	flw	ft1,4(a0)
+    80002ce8:	00852107          	flw	ft2,8(a0)
+    80002cec:	00c52683          	lw	a3,12(a0)
+    80002cf0:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    80002cf4:	e0018553          	fmv.x.w	a0,ft3
+    80002cf8:	001015f3          	fsflags	a1,zero
+    80002cfc:	00100613          	li	a2,1
+    80002d00:	04d51063          	bne	a0,a3,80002d40 <fail>
+    80002d04:	02c59e63          	bne	a1,a2,80002d40 <fail>
+
+0000000080002d08 <test_13>:
+    80002d08:	00d00193          	li	gp,13
+    80002d0c:	00000517          	auipc	a0,0x0
+    80002d10:	3a450513          	addi	a0,a0,932 # 800030b0 <test_13_data>
+    80002d14:	00052007          	flw	ft0,0(a0)
+    80002d18:	00452087          	flw	ft1,4(a0)
+    80002d1c:	00852107          	flw	ft2,8(a0)
+    80002d20:	00c52683          	lw	a3,12(a0)
+    80002d24:	101071cb          	fnmsub.s	ft3,ft0,ft1,ft2
+    80002d28:	e0018553          	fmv.x.w	a0,ft3
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	00d51663          	bne	a0,a3,80002d40 <fail>
+    80002d38:	00c59463          	bne	a1,a2,80002d40 <fail>
+    80002d3c:	00301a63          	bne	zero,gp,80002d50 <pass>
+
+0000000080002d40 <fail>:
+    80002d40:	00119513          	slli	a0,gp,0x1
+    80002d44:	00050063          	beqz	a0,80002d44 <fail+0x4>
+    80002d48:	00156513          	ori	a0,a0,1
+    80002d4c:	00000073          	ecall
+
+0000000080002d50 <pass>:
+    80002d50:	00100513          	li	a0,1
+    80002d54:	00000073          	ecall
+    80002d58:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080003000 <test_2_data>:
+    80003000:	0000                	unimp
+    80003002:	3f80                	fld	fs0,56(a5)
+    80003004:	0000                	unimp
+    80003006:	4020                	lw	s0,64(s0)
+    80003008:	0000                	unimp
+    8000300a:	3f80                	fld	fs0,56(a5)
+    8000300c:	0000                	unimp
+    8000300e:	4060                	lw	s0,68(s0)
+
+0000000080003010 <test_3_data>:
+    80003010:	0000                	unimp
+    80003012:	bf80                	fsd	fs0,56(a5)
+    80003014:	c49a6333          	0xc49a6333
+    80003018:	cccd                	beqz	s1,800030d2 <begin_signature+0x12>
+    8000301a:	3f8c                	fld	fa1,56(a5)
+    8000301c:	8666                	mv	a2,s9
+    8000301e:	449a                	lw	s1,132(sp)
+
+0000000080003020 <test_4_data>:
+    80003020:	0000                	unimp
+    80003022:	4000                	lw	s0,0(s0)
+    80003024:	0000                	unimp
+    80003026:	c0a0                	sw	s0,64(s1)
+    80003028:	0000                	unimp
+    8000302a:	c000                	sw	s0,0(s0)
+    8000302c:	0000                	unimp
+    8000302e:	c140                	sw	s0,4(a0)
+
+0000000080003030 <test_5_data>:
+    80003030:	0000                	unimp
+    80003032:	3f80                	fld	fs0,56(a5)
+    80003034:	0000                	unimp
+    80003036:	4020                	lw	s0,64(s0)
+    80003038:	0000                	unimp
+    8000303a:	3f80                	fld	fs0,56(a5)
+    8000303c:	0000                	unimp
+    8000303e:	c060                	sw	s0,68(s0)
+
+0000000080003040 <test_6_data>:
+    80003040:	0000                	unimp
+    80003042:	bf80                	fsd	fs0,56(a5)
+    80003044:	c49a6333          	0xc49a6333
+    80003048:	cccd                	beqz	s1,80003102 <begin_signature+0x42>
+    8000304a:	3f8c                	fld	fa1,56(a5)
+    8000304c:	8666                	mv	a2,s9
+    8000304e:	c49a                	sw	t1,72(sp)
+
+0000000080003050 <test_7_data>:
+    80003050:	0000                	unimp
+    80003052:	4000                	lw	s0,0(s0)
+    80003054:	0000                	unimp
+    80003056:	c0a0                	sw	s0,64(s1)
+    80003058:	0000                	unimp
+    8000305a:	c000                	sw	s0,0(s0)
+    8000305c:	0000                	unimp
+    8000305e:	4140                	lw	s0,4(a0)
+
+0000000080003060 <test_8_data>:
+    80003060:	0000                	unimp
+    80003062:	3f80                	fld	fs0,56(a5)
+    80003064:	0000                	unimp
+    80003066:	4020                	lw	s0,64(s0)
+    80003068:	0000                	unimp
+    8000306a:	3f80                	fld	fs0,56(a5)
+    8000306c:	0000                	unimp
+    8000306e:	3fc0                	fld	fs0,184(a5)
+
+0000000080003070 <test_9_data>:
+    80003070:	0000                	unimp
+    80003072:	bf80                	fsd	fs0,56(a5)
+    80003074:	c49a6333          	0xc49a6333
+    80003078:	cccd                	beqz	s1,80003132 <begin_signature+0x72>
+    8000307a:	3f8c                	fld	fa1,56(a5)
+    8000307c:	4000                	lw	s0,0(s0)
+    8000307e:	449a                	lw	s1,132(sp)
+
+0000000080003080 <test_10_data>:
+    80003080:	0000                	unimp
+    80003082:	4000                	lw	s0,0(s0)
+    80003084:	0000                	unimp
+    80003086:	c0a0                	sw	s0,64(s1)
+    80003088:	0000                	unimp
+    8000308a:	c000                	sw	s0,0(s0)
+    8000308c:	0000                	unimp
+    8000308e:	c100                	sw	s0,0(a0)
+
+0000000080003090 <test_11_data>:
+    80003090:	0000                	unimp
+    80003092:	3f80                	fld	fs0,56(a5)
+    80003094:	0000                	unimp
+    80003096:	4020                	lw	s0,64(s0)
+    80003098:	0000                	unimp
+    8000309a:	3f80                	fld	fs0,56(a5)
+    8000309c:	0000                	unimp
+    8000309e:	bfc0                	fsd	fs0,184(a5)
+
+00000000800030a0 <test_12_data>:
+    800030a0:	0000                	unimp
+    800030a2:	bf80                	fsd	fs0,56(a5)
+    800030a4:	c49a6333          	0xc49a6333
+    800030a8:	cccd                	beqz	s1,80003162 <begin_signature+0xa2>
+    800030aa:	3f8c                	fld	fa1,56(a5)
+    800030ac:	4000                	lw	s0,0(s0)
+    800030ae:	c49a                	sw	t1,72(sp)
+
+00000000800030b0 <test_13_data>:
+    800030b0:	0000                	unimp
+    800030b2:	4000                	lw	s0,0(s0)
+    800030b4:	0000                	unimp
+    800030b6:	c0a0                	sw	s0,64(s1)
+    800030b8:	0000                	unimp
+    800030ba:	c000                	sw	s0,0(s0)
+    800030bc:	0000                	unimp
+    800030be:	4100                	lw	s0,0(a0)
diff --git a/test/riscv-tests/rv64uf-v-fmadd.elf b/test/riscv-tests/rv64uf-v-fmadd.elf
new file mode 100644
index 0000000..84186ba
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fmadd.elf
diff --git a/test/riscv-tests/rv64uf-v-fmin.dump b/test/riscv-tests/rv64uf-v-fmin.dump
new file mode 100644
index 0000000..43a7f9d
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fmin.dump
@@ -0,0 +1,1278 @@
+
+rv64uf-v-fmin:     file format elf64-littleriscv
+
+
+Disassembly of section .text.init:
+
+0000000080000000 <_start>:
+    80000000:	00c0006f          	j	8000000c <handle_reset>
+
+0000000080000004 <nmi_vector>:
+    80000004:	2580206f          	j	8000225c <wtf>
+
+0000000080000008 <trap_vector>:
+    80000008:	2540206f          	j	8000225c <wtf>
+
+000000008000000c <handle_reset>:
+    8000000c:	00000297          	auipc	t0,0x0
+    80000010:	ffc28293          	addi	t0,t0,-4 # 80000008 <trap_vector>
+    80000014:	30529073          	csrw	mtvec,t0
+    80000018:	0000a117          	auipc	sp,0xa
+    8000001c:	6b810113          	addi	sp,sp,1720 # 8000a6d0 <_end+0xee0>
+    80000020:	f14022f3          	csrr	t0,mhartid
+    80000024:	00c29293          	slli	t0,t0,0xc
+    80000028:	00510133          	add	sp,sp,t0
+    8000002c:	34011073          	csrw	mscratch,sp
+    80000030:	00003517          	auipc	a0,0x3
+    80000034:	a9850513          	addi	a0,a0,-1384 # 80002ac8 <userstart>
+    80000038:	09d0206f          	j	800028d4 <vm_boot>
+
+000000008000003c <pop_tf>:
+    8000003c:	10853283          	ld	t0,264(a0)
+    80000040:	14129073          	csrw	sepc,t0
+    80000044:	00853083          	ld	ra,8(a0)
+    80000048:	01053103          	ld	sp,16(a0)
+    8000004c:	01853183          	ld	gp,24(a0)
+    80000050:	02053203          	ld	tp,32(a0)
+    80000054:	02853283          	ld	t0,40(a0)
+    80000058:	03053303          	ld	t1,48(a0)
+    8000005c:	03853383          	ld	t2,56(a0)
+    80000060:	04053403          	ld	s0,64(a0)
+    80000064:	04853483          	ld	s1,72(a0)
+    80000068:	05853583          	ld	a1,88(a0)
+    8000006c:	06053603          	ld	a2,96(a0)
+    80000070:	06853683          	ld	a3,104(a0)
+    80000074:	07053703          	ld	a4,112(a0)
+    80000078:	07853783          	ld	a5,120(a0)
+    8000007c:	08053803          	ld	a6,128(a0)
+    80000080:	08853883          	ld	a7,136(a0)
+    80000084:	09053903          	ld	s2,144(a0)
+    80000088:	09853983          	ld	s3,152(a0)
+    8000008c:	0a053a03          	ld	s4,160(a0)
+    80000090:	0a853a83          	ld	s5,168(a0)
+    80000094:	0b053b03          	ld	s6,176(a0)
+    80000098:	0b853b83          	ld	s7,184(a0)
+    8000009c:	0c053c03          	ld	s8,192(a0)
+    800000a0:	0c853c83          	ld	s9,200(a0)
+    800000a4:	0d053d03          	ld	s10,208(a0)
+    800000a8:	0d853d83          	ld	s11,216(a0)
+    800000ac:	0e053e03          	ld	t3,224(a0)
+    800000b0:	0e853e83          	ld	t4,232(a0)
+    800000b4:	0f053f03          	ld	t5,240(a0)
+    800000b8:	0f853f83          	ld	t6,248(a0)
+    800000bc:	05053503          	ld	a0,80(a0)
+    800000c0:	10200073          	sret
+
+00000000800000c4 <trap_entry>:
+    800000c4:	14011173          	csrrw	sp,sscratch,sp
+    800000c8:	00113423          	sd	ra,8(sp)
+    800000cc:	00313c23          	sd	gp,24(sp)
+    800000d0:	02413023          	sd	tp,32(sp)
+    800000d4:	02513423          	sd	t0,40(sp)
+    800000d8:	02613823          	sd	t1,48(sp)
+    800000dc:	02713c23          	sd	t2,56(sp)
+    800000e0:	04813023          	sd	s0,64(sp)
+    800000e4:	04913423          	sd	s1,72(sp)
+    800000e8:	04a13823          	sd	a0,80(sp)
+    800000ec:	04b13c23          	sd	a1,88(sp)
+    800000f0:	06c13023          	sd	a2,96(sp)
+    800000f4:	06d13423          	sd	a3,104(sp)
+    800000f8:	06e13823          	sd	a4,112(sp)
+    800000fc:	06f13c23          	sd	a5,120(sp)
+    80000100:	09013023          	sd	a6,128(sp)
+    80000104:	09113423          	sd	a7,136(sp)
+    80000108:	09213823          	sd	s2,144(sp)
+    8000010c:	09313c23          	sd	s3,152(sp)
+    80000110:	0b413023          	sd	s4,160(sp)
+    80000114:	0b513423          	sd	s5,168(sp)
+    80000118:	0b613823          	sd	s6,176(sp)
+    8000011c:	0b713c23          	sd	s7,184(sp)
+    80000120:	0d813023          	sd	s8,192(sp)
+    80000124:	0d913423          	sd	s9,200(sp)
+    80000128:	0da13823          	sd	s10,208(sp)
+    8000012c:	0db13c23          	sd	s11,216(sp)
+    80000130:	0fc13023          	sd	t3,224(sp)
+    80000134:	0fd13423          	sd	t4,232(sp)
+    80000138:	0fe13823          	sd	t5,240(sp)
+    8000013c:	0ff13c23          	sd	t6,248(sp)
+    80000140:	140112f3          	csrrw	t0,sscratch,sp
+    80000144:	00513823          	sd	t0,16(sp)
+    80000148:	100022f3          	csrr	t0,sstatus
+    8000014c:	10513023          	sd	t0,256(sp)
+    80000150:	141022f3          	csrr	t0,sepc
+    80000154:	10513423          	sd	t0,264(sp)
+    80000158:	143022f3          	csrr	t0,stval
+    8000015c:	10513823          	sd	t0,272(sp)
+    80000160:	142022f3          	csrr	t0,scause
+    80000164:	10513c23          	sd	t0,280(sp)
+    80000168:	00010513          	mv	a0,sp
+    8000016c:	4300206f          	j	8000259c <handle_trap>
+
+Disassembly of section .text:
+
+0000000080002000 <memcpy>:
+    80002000:	00c5e7b3          	or	a5,a1,a2
+    80002004:	00f567b3          	or	a5,a0,a5
+    80002008:	0077f793          	andi	a5,a5,7
+    8000200c:	00c506b3          	add	a3,a0,a2
+    80002010:	02078463          	beqz	a5,80002038 <memcpy+0x38>
+    80002014:	00c58633          	add	a2,a1,a2
+    80002018:	00050793          	mv	a5,a0
+    8000201c:	02d57e63          	bleu	a3,a0,80002058 <memcpy+0x58>
+    80002020:	00158593          	addi	a1,a1,1
+    80002024:	fff5c703          	lbu	a4,-1(a1)
+    80002028:	00178793          	addi	a5,a5,1
+    8000202c:	fee78fa3          	sb	a4,-1(a5)
+    80002030:	feb618e3          	bne	a2,a1,80002020 <memcpy+0x20>
+    80002034:	00008067          	ret
+    80002038:	fed57ee3          	bleu	a3,a0,80002034 <memcpy+0x34>
+    8000203c:	00050793          	mv	a5,a0
+    80002040:	00858593          	addi	a1,a1,8
+    80002044:	ff85b703          	ld	a4,-8(a1)
+    80002048:	00878793          	addi	a5,a5,8
+    8000204c:	fee7bc23          	sd	a4,-8(a5)
+    80002050:	fed7e8e3          	bltu	a5,a3,80002040 <memcpy+0x40>
+    80002054:	00008067          	ret
+    80002058:	00008067          	ret
+
+000000008000205c <memset>:
+    8000205c:	00c567b3          	or	a5,a0,a2
+    80002060:	0077f793          	andi	a5,a5,7
+    80002064:	00c50633          	add	a2,a0,a2
+    80002068:	0ff5f593          	andi	a1,a1,255
+    8000206c:	00078e63          	beqz	a5,80002088 <memset+0x2c>
+    80002070:	00050793          	mv	a5,a0
+    80002074:	04c57263          	bleu	a2,a0,800020b8 <memset+0x5c>
+    80002078:	00178793          	addi	a5,a5,1
+    8000207c:	feb78fa3          	sb	a1,-1(a5)
+    80002080:	fef61ce3          	bne	a2,a5,80002078 <memset+0x1c>
+    80002084:	00008067          	ret
+    80002088:	00859793          	slli	a5,a1,0x8
+    8000208c:	00b7e5b3          	or	a1,a5,a1
+    80002090:	01059793          	slli	a5,a1,0x10
+    80002094:	00b7e7b3          	or	a5,a5,a1
+    80002098:	02079593          	slli	a1,a5,0x20
+    8000209c:	00f5e5b3          	or	a1,a1,a5
+    800020a0:	fec572e3          	bleu	a2,a0,80002084 <memset+0x28>
+    800020a4:	00050793          	mv	a5,a0
+    800020a8:	00878793          	addi	a5,a5,8
+    800020ac:	feb7bc23          	sd	a1,-8(a5)
+    800020b0:	fec7ece3          	bltu	a5,a2,800020a8 <memset+0x4c>
+    800020b4:	00008067          	ret
+    800020b8:	00008067          	ret
+
+00000000800020bc <strlen>:
+    800020bc:	00054783          	lbu	a5,0(a0)
+    800020c0:	00050713          	mv	a4,a0
+    800020c4:	00078c63          	beqz	a5,800020dc <strlen+0x20>
+    800020c8:	00150513          	addi	a0,a0,1
+    800020cc:	00054783          	lbu	a5,0(a0)
+    800020d0:	fe079ce3          	bnez	a5,800020c8 <strlen+0xc>
+    800020d4:	40e50533          	sub	a0,a0,a4
+    800020d8:	00008067          	ret
+    800020dc:	00000513          	li	a0,0
+    800020e0:	00008067          	ret
+
+00000000800020e4 <strcmp>:
+    800020e4:	00150513          	addi	a0,a0,1
+    800020e8:	fff54783          	lbu	a5,-1(a0)
+    800020ec:	00158593          	addi	a1,a1,1
+    800020f0:	fff5c703          	lbu	a4,-1(a1)
+    800020f4:	00078a63          	beqz	a5,80002108 <strcmp+0x24>
+    800020f8:	fee786e3          	beq	a5,a4,800020e4 <strcmp>
+    800020fc:	0007851b          	sext.w	a0,a5
+    80002100:	40e5053b          	subw	a0,a0,a4
+    80002104:	00008067          	ret
+    80002108:	00000513          	li	a0,0
+    8000210c:	ff5ff06f          	j	80002100 <strcmp+0x1c>
+
+0000000080002110 <memcmp>:
+    80002110:	00b567b3          	or	a5,a0,a1
+    80002114:	0077f793          	andi	a5,a5,7
+    80002118:	04079263          	bnez	a5,8000215c <memcmp+0x4c>
+    8000211c:	ff867693          	andi	a3,a2,-8
+    80002120:	00d506b3          	add	a3,a0,a3
+    80002124:	00050813          	mv	a6,a0
+    80002128:	02d57a63          	bleu	a3,a0,8000215c <memcmp+0x4c>
+    8000212c:	00053703          	ld	a4,0(a0)
+    80002130:	0005b783          	ld	a5,0(a1)
+    80002134:	00f70a63          	beq	a4,a5,80002148 <memcmp+0x38>
+    80002138:	0240006f          	j	8000215c <memcmp+0x4c>
+    8000213c:	00053703          	ld	a4,0(a0)
+    80002140:	0005b783          	ld	a5,0(a1)
+    80002144:	00f71863          	bne	a4,a5,80002154 <memcmp+0x44>
+    80002148:	00850513          	addi	a0,a0,8
+    8000214c:	00858593          	addi	a1,a1,8
+    80002150:	fed566e3          	bltu	a0,a3,8000213c <memcmp+0x2c>
+    80002154:	41050833          	sub	a6,a0,a6
+    80002158:	41060633          	sub	a2,a2,a6
+    8000215c:	00c58633          	add	a2,a1,a2
+    80002160:	0140006f          	j	80002174 <memcmp+0x64>
+    80002164:	00158593          	addi	a1,a1,1
+    80002168:	fff54783          	lbu	a5,-1(a0)
+    8000216c:	fff5c703          	lbu	a4,-1(a1)
+    80002170:	00e79a63          	bne	a5,a4,80002184 <memcmp+0x74>
+    80002174:	00150513          	addi	a0,a0,1
+    80002178:	fec596e3          	bne	a1,a2,80002164 <memcmp+0x54>
+    8000217c:	00000513          	li	a0,0
+    80002180:	00008067          	ret
+    80002184:	40e7853b          	subw	a0,a5,a4
+    80002188:	00008067          	ret
+
+000000008000218c <strcpy>:
+    8000218c:	00050793          	mv	a5,a0
+    80002190:	00158593          	addi	a1,a1,1
+    80002194:	fff5c703          	lbu	a4,-1(a1)
+    80002198:	00178793          	addi	a5,a5,1
+    8000219c:	fee78fa3          	sb	a4,-1(a5)
+    800021a0:	fe0718e3          	bnez	a4,80002190 <strcpy+0x4>
+    800021a4:	00008067          	ret
+
+00000000800021a8 <atol>:
+    800021a8:	00054783          	lbu	a5,0(a0)
+    800021ac:	02000713          	li	a4,32
+    800021b0:	00e79863          	bne	a5,a4,800021c0 <atol+0x18>
+    800021b4:	00150513          	addi	a0,a0,1
+    800021b8:	00054783          	lbu	a5,0(a0)
+    800021bc:	fee78ce3          	beq	a5,a4,800021b4 <atol+0xc>
+    800021c0:	fd57871b          	addiw	a4,a5,-43
+    800021c4:	0fd77713          	andi	a4,a4,253
+    800021c8:	04070263          	beqz	a4,8000220c <atol+0x64>
+    800021cc:	00054683          	lbu	a3,0(a0)
+    800021d0:	00050793          	mv	a5,a0
+    800021d4:	00000613          	li	a2,0
+    800021d8:	04068863          	beqz	a3,80002228 <atol+0x80>
+    800021dc:	00000513          	li	a0,0
+    800021e0:	00178793          	addi	a5,a5,1
+    800021e4:	fd06859b          	addiw	a1,a3,-48
+    800021e8:	00251713          	slli	a4,a0,0x2
+    800021ec:	0007c683          	lbu	a3,0(a5)
+    800021f0:	00a70533          	add	a0,a4,a0
+    800021f4:	00151513          	slli	a0,a0,0x1
+    800021f8:	00a58533          	add	a0,a1,a0
+    800021fc:	fe0692e3          	bnez	a3,800021e0 <atol+0x38>
+    80002200:	00060463          	beqz	a2,80002208 <atol+0x60>
+    80002204:	40a00533          	neg	a0,a0
+    80002208:	00008067          	ret
+    8000220c:	00154683          	lbu	a3,1(a0)
+    80002210:	fd378793          	addi	a5,a5,-45
+    80002214:	0017b613          	seqz	a2,a5
+    80002218:	00150793          	addi	a5,a0,1
+    8000221c:	fc0690e3          	bnez	a3,800021dc <atol+0x34>
+    80002220:	00000513          	li	a0,0
+    80002224:	fddff06f          	j	80002200 <atol+0x58>
+    80002228:	00000513          	li	a0,0
+    8000222c:	00008067          	ret
+
+0000000080002230 <terminate>:
+    80002230:	fffff797          	auipc	a5,0xfffff
+    80002234:	dd078793          	addi	a5,a5,-560 # 80001000 <tohost>
+    80002238:	0007b703          	ld	a4,0(a5)
+    8000223c:	00070a63          	beqz	a4,80002250 <terminate+0x20>
+    80002240:	fffff717          	auipc	a4,0xfffff
+    80002244:	e0073023          	sd	zero,-512(a4) # 80001040 <fromhost>
+    80002248:	0007b703          	ld	a4,0(a5)
+    8000224c:	fe071ae3          	bnez	a4,80002240 <terminate+0x10>
+    80002250:	fffff797          	auipc	a5,0xfffff
+    80002254:	daa7b823          	sd	a0,-592(a5) # 80001000 <tohost>
+    80002258:	0000006f          	j	80002258 <terminate+0x28>
+
+000000008000225c <wtf>:
+    8000225c:	ff010113          	addi	sp,sp,-16
+    80002260:	34900513          	li	a0,841
+    80002264:	00113423          	sd	ra,8(sp)
+    80002268:	fc9ff0ef          	jal	ra,80002230 <terminate>
+
+000000008000226c <printhex>:
+    8000226c:	fe010113          	addi	sp,sp,-32
+    80002270:	01710713          	addi	a4,sp,23
+    80002274:	00710813          	addi	a6,sp,7
+    80002278:	00900593          	li	a1,9
+    8000227c:	00f57793          	andi	a5,a0,15
+    80002280:	03000613          	li	a2,48
+    80002284:	0ff7f693          	andi	a3,a5,255
+    80002288:	00f5f463          	bleu	a5,a1,80002290 <printhex+0x24>
+    8000228c:	05700613          	li	a2,87
+    80002290:	00c687bb          	addw	a5,a3,a2
+    80002294:	00f70023          	sb	a5,0(a4)
+    80002298:	fff70713          	addi	a4,a4,-1
+    8000229c:	00455513          	srli	a0,a0,0x4
+    800022a0:	fd071ee3          	bne	a4,a6,8000227c <printhex+0x10>
+    800022a4:	00814783          	lbu	a5,8(sp)
+    800022a8:	00010c23          	sb	zero,24(sp)
+    800022ac:	04078463          	beqz	a5,800022f4 <printhex+0x88>
+    800022b0:	10100513          	li	a0,257
+    800022b4:	00810693          	addi	a3,sp,8
+    800022b8:	fffff717          	auipc	a4,0xfffff
+    800022bc:	d4870713          	addi	a4,a4,-696 # 80001000 <tohost>
+    800022c0:	03051513          	slli	a0,a0,0x30
+    800022c4:	00073583          	ld	a1,0(a4)
+    800022c8:	00168693          	addi	a3,a3,1
+    800022cc:	00a7e633          	or	a2,a5,a0
+    800022d0:	00058a63          	beqz	a1,800022e4 <printhex+0x78>
+    800022d4:	fffff797          	auipc	a5,0xfffff
+    800022d8:	d607b623          	sd	zero,-660(a5) # 80001040 <fromhost>
+    800022dc:	00073783          	ld	a5,0(a4)
+    800022e0:	fe079ae3          	bnez	a5,800022d4 <printhex+0x68>
+    800022e4:	0006c783          	lbu	a5,0(a3)
+    800022e8:	fffff597          	auipc	a1,0xfffff
+    800022ec:	d0c5bc23          	sd	a2,-744(a1) # 80001000 <tohost>
+    800022f0:	fc079ae3          	bnez	a5,800022c4 <printhex+0x58>
+    800022f4:	02010113          	addi	sp,sp,32
+    800022f8:	00008067          	ret
+
+00000000800022fc <handle_fault>:
+    800022fc:	fffff8b7          	lui	a7,0xfffff
+    80002300:	01150733          	add	a4,a0,a7
+    80002304:	0003e7b7          	lui	a5,0x3e
+    80002308:	14f77463          	bleu	a5,a4,80002450 <handle_fault+0x154>
+    8000230c:	00c55693          	srli	a3,a0,0xc
+    80002310:	60068813          	addi	a6,a3,1536
+    80002314:	00003617          	auipc	a2,0x3
+    80002318:	cec60613          	addi	a2,a2,-788 # 80005000 <pt>
+    8000231c:	00381793          	slli	a5,a6,0x3
+    80002320:	00f607b3          	add	a5,a2,a5
+    80002324:	0007b703          	ld	a4,0(a5) # 3e000 <_start-0x7ffc2000>
+    80002328:	01157533          	and	a0,a0,a7
+    8000232c:	0e071063          	bnez	a4,8000240c <handle_fault+0x110>
+    80002330:	00007797          	auipc	a5,0x7
+    80002334:	4b878793          	addi	a5,a5,1208 # 800097e8 <freelist_head>
+    80002338:	0007b583          	ld	a1,0(a5)
+    8000233c:	16058863          	beqz	a1,800024ac <handle_fault+0x1b0>
+    80002340:	0085b783          	ld	a5,8(a1)
+    80002344:	00007717          	auipc	a4,0x7
+    80002348:	49c70713          	addi	a4,a4,1180 # 800097e0 <freelist_tail>
+    8000234c:	00073703          	ld	a4,0(a4)
+    80002350:	00007897          	auipc	a7,0x7
+    80002354:	48f8bc23          	sd	a5,1176(a7) # 800097e8 <freelist_head>
+    80002358:	0ee78663          	beq	a5,a4,80002444 <handle_fault+0x148>
+    8000235c:	0005b783          	ld	a5,0(a1)
+    80002360:	00381893          	slli	a7,a6,0x3
+    80002364:	011608b3          	add	a7,a2,a7
+    80002368:	00c7d793          	srli	a5,a5,0xc
+    8000236c:	00a79793          	slli	a5,a5,0xa
+    80002370:	0df7e313          	ori	t1,a5,223
+    80002374:	01f7e713          	ori	a4,a5,31
+    80002378:	0068b023          	sd	t1,0(a7)
+    8000237c:	12050073          	sfence.vma	a0
+    80002380:	00007797          	auipc	a5,0x7
+    80002384:	07078793          	addi	a5,a5,112 # 800093f0 <user_mapping>
+    80002388:	00469693          	slli	a3,a3,0x4
+    8000238c:	00d786b3          	add	a3,a5,a3
+    80002390:	0006b783          	ld	a5,0(a3)
+    80002394:	16079463          	bnez	a5,800024fc <handle_fault+0x200>
+    80002398:	0005b783          	ld	a5,0(a1)
+    8000239c:	00f6b023          	sd	a5,0(a3)
+    800023a0:	0085b783          	ld	a5,8(a1)
+    800023a4:	00f6b423          	sd	a5,8(a3)
+    800023a8:	000407b7          	lui	a5,0x40
+    800023ac:	1007a8f3          	csrrs	a7,sstatus,a5
+    800023b0:	ffe007b7          	lui	a5,0xffe00
+    800023b4:	00f507b3          	add	a5,a0,a5
+    800023b8:	000015b7          	lui	a1,0x1
+    800023bc:	00050693          	mv	a3,a0
+    800023c0:	00b785b3          	add	a1,a5,a1
+    800023c4:	0007bf03          	ld	t5,0(a5) # ffffffffffe00000 <_end+0xffffffff7fdf6810>
+    800023c8:	0087be83          	ld	t4,8(a5)
+    800023cc:	0107be03          	ld	t3,16(a5)
+    800023d0:	0187b303          	ld	t1,24(a5)
+    800023d4:	01e6b023          	sd	t5,0(a3)
+    800023d8:	01d6b423          	sd	t4,8(a3)
+    800023dc:	01c6b823          	sd	t3,16(a3)
+    800023e0:	0066bc23          	sd	t1,24(a3)
+    800023e4:	02078793          	addi	a5,a5,32
+    800023e8:	02068693          	addi	a3,a3,32
+    800023ec:	fcb79ce3          	bne	a5,a1,800023c4 <handle_fault+0xc8>
+    800023f0:	10089073          	csrw	sstatus,a7
+    800023f4:	00381813          	slli	a6,a6,0x3
+    800023f8:	01060633          	add	a2,a2,a6
+    800023fc:	00e63023          	sd	a4,0(a2)
+    80002400:	12050073          	sfence.vma	a0
+    80002404:	0000100f          	fence.i
+    80002408:	00008067          	ret
+    8000240c:	04077693          	andi	a3,a4,64
+    80002410:	00069a63          	bnez	a3,80002424 <handle_fault+0x128>
+    80002414:	04076713          	ori	a4,a4,64
+    80002418:	00e7b023          	sd	a4,0(a5)
+    8000241c:	12050073          	sfence.vma	a0
+    80002420:	00008067          	ret
+    80002424:	08077693          	andi	a3,a4,128
+    80002428:	12069263          	bnez	a3,8000254c <handle_fault+0x250>
+    8000242c:	00f00693          	li	a3,15
+    80002430:	10d59e63          	bne	a1,a3,8000254c <handle_fault+0x250>
+    80002434:	08076713          	ori	a4,a4,128
+    80002438:	00e7b023          	sd	a4,0(a5)
+    8000243c:	12050073          	sfence.vma	a0
+    80002440:	00008067          	ret
+    80002444:	00007797          	auipc	a5,0x7
+    80002448:	3807be23          	sd	zero,924(a5) # 800097e0 <freelist_tail>
+    8000244c:	f11ff06f          	j	8000235c <handle_fault+0x60>
+    80002450:	10100613          	li	a2,257
+    80002454:	04100713          	li	a4,65
+    80002458:	00001697          	auipc	a3,0x1
+    8000245c:	a4068693          	addi	a3,a3,-1472 # 80002e98 <pass+0x10>
+    80002460:	fffff797          	auipc	a5,0xfffff
+    80002464:	ba078793          	addi	a5,a5,-1120 # 80001000 <tohost>
+    80002468:	03061613          	slli	a2,a2,0x30
+    8000246c:	0007b503          	ld	a0,0(a5)
+    80002470:	00168693          	addi	a3,a3,1
+    80002474:	00c765b3          	or	a1,a4,a2
+    80002478:	00050a63          	beqz	a0,8000248c <handle_fault+0x190>
+    8000247c:	fffff717          	auipc	a4,0xfffff
+    80002480:	bc073223          	sd	zero,-1084(a4) # 80001040 <fromhost>
+    80002484:	0007b703          	ld	a4,0(a5)
+    80002488:	fe071ae3          	bnez	a4,8000247c <handle_fault+0x180>
+    8000248c:	0006c703          	lbu	a4,0(a3)
+    80002490:	fffff517          	auipc	a0,0xfffff
+    80002494:	b6b53823          	sd	a1,-1168(a0) # 80001000 <tohost>
+    80002498:	fc071ae3          	bnez	a4,8000246c <handle_fault+0x170>
+    8000249c:	ff010113          	addi	sp,sp,-16
+    800024a0:	00300513          	li	a0,3
+    800024a4:	00113423          	sd	ra,8(sp)
+    800024a8:	d89ff0ef          	jal	ra,80002230 <terminate>
+    800024ac:	10100693          	li	a3,257
+    800024b0:	04100713          	li	a4,65
+    800024b4:	00001617          	auipc	a2,0x1
+    800024b8:	a7460613          	addi	a2,a2,-1420 # 80002f28 <pass+0xa0>
+    800024bc:	fffff797          	auipc	a5,0xfffff
+    800024c0:	b4478793          	addi	a5,a5,-1212 # 80001000 <tohost>
+    800024c4:	03069693          	slli	a3,a3,0x30
+    800024c8:	0007b503          	ld	a0,0(a5)
+    800024cc:	00160613          	addi	a2,a2,1
+    800024d0:	00d765b3          	or	a1,a4,a3
+    800024d4:	00050a63          	beqz	a0,800024e8 <handle_fault+0x1ec>
+    800024d8:	fffff717          	auipc	a4,0xfffff
+    800024dc:	b6073423          	sd	zero,-1176(a4) # 80001040 <fromhost>
+    800024e0:	0007b703          	ld	a4,0(a5)
+    800024e4:	fe071ae3          	bnez	a4,800024d8 <handle_fault+0x1dc>
+    800024e8:	00064703          	lbu	a4,0(a2)
+    800024ec:	fffff517          	auipc	a0,0xfffff
+    800024f0:	b0b53a23          	sd	a1,-1260(a0) # 80001000 <tohost>
+    800024f4:	fc071ae3          	bnez	a4,800024c8 <handle_fault+0x1cc>
+    800024f8:	fa5ff06f          	j	8000249c <handle_fault+0x1a0>
+    800024fc:	10100693          	li	a3,257
+    80002500:	04100713          	li	a4,65
+    80002504:	00001617          	auipc	a2,0x1
+    80002508:	a3c60613          	addi	a2,a2,-1476 # 80002f40 <pass+0xb8>
+    8000250c:	fffff797          	auipc	a5,0xfffff
+    80002510:	af478793          	addi	a5,a5,-1292 # 80001000 <tohost>
+    80002514:	03069693          	slli	a3,a3,0x30
+    80002518:	0007b503          	ld	a0,0(a5)
+    8000251c:	00160613          	addi	a2,a2,1
+    80002520:	00d765b3          	or	a1,a4,a3
+    80002524:	00050a63          	beqz	a0,80002538 <handle_fault+0x23c>
+    80002528:	fffff717          	auipc	a4,0xfffff
+    8000252c:	b0073c23          	sd	zero,-1256(a4) # 80001040 <fromhost>
+    80002530:	0007b703          	ld	a4,0(a5)
+    80002534:	fe071ae3          	bnez	a4,80002528 <handle_fault+0x22c>
+    80002538:	00064703          	lbu	a4,0(a2)
+    8000253c:	fffff517          	auipc	a0,0xfffff
+    80002540:	acb53223          	sd	a1,-1340(a0) # 80001000 <tohost>
+    80002544:	fc071ae3          	bnez	a4,80002518 <handle_fault+0x21c>
+    80002548:	f55ff06f          	j	8000249c <handle_fault+0x1a0>
+    8000254c:	10100613          	li	a2,257
+    80002550:	04100713          	li	a4,65
+    80002554:	00001697          	auipc	a3,0x1
+    80002558:	98c68693          	addi	a3,a3,-1652 # 80002ee0 <pass+0x58>
+    8000255c:	fffff797          	auipc	a5,0xfffff
+    80002560:	aa478793          	addi	a5,a5,-1372 # 80001000 <tohost>
+    80002564:	03061613          	slli	a2,a2,0x30
+    80002568:	0007b503          	ld	a0,0(a5)
+    8000256c:	00168693          	addi	a3,a3,1
+    80002570:	00c765b3          	or	a1,a4,a2
+    80002574:	00050a63          	beqz	a0,80002588 <handle_fault+0x28c>
+    80002578:	fffff717          	auipc	a4,0xfffff
+    8000257c:	ac073423          	sd	zero,-1336(a4) # 80001040 <fromhost>
+    80002580:	0007b703          	ld	a4,0(a5)
+    80002584:	fe071ae3          	bnez	a4,80002578 <handle_fault+0x27c>
+    80002588:	0006c703          	lbu	a4,0(a3)
+    8000258c:	fffff517          	auipc	a0,0xfffff
+    80002590:	a6b53a23          	sd	a1,-1420(a0) # 80001000 <tohost>
+    80002594:	fc071ae3          	bnez	a4,80002568 <handle_fault+0x26c>
+    80002598:	f05ff06f          	j	8000249c <handle_fault+0x1a0>
+
+000000008000259c <handle_trap>:
+    8000259c:	11853583          	ld	a1,280(a0)
+    800025a0:	f9010113          	addi	sp,sp,-112
+    800025a4:	06813023          	sd	s0,96(sp)
+    800025a8:	06113423          	sd	ra,104(sp)
+    800025ac:	04913c23          	sd	s1,88(sp)
+    800025b0:	05213823          	sd	s2,80(sp)
+    800025b4:	05313423          	sd	s3,72(sp)
+    800025b8:	05413023          	sd	s4,64(sp)
+    800025bc:	03513c23          	sd	s5,56(sp)
+    800025c0:	03613823          	sd	s6,48(sp)
+    800025c4:	03713423          	sd	s7,40(sp)
+    800025c8:	03813023          	sd	s8,32(sp)
+    800025cc:	01913c23          	sd	s9,24(sp)
+    800025d0:	01a13823          	sd	s10,16(sp)
+    800025d4:	01b13423          	sd	s11,8(sp)
+    800025d8:	00800793          	li	a5,8
+    800025dc:	00050413          	mv	s0,a0
+    800025e0:	12f58a63          	beq	a1,a5,80002714 <handle_trap+0x178>
+    800025e4:	00200793          	li	a5,2
+    800025e8:	06f58063          	beq	a1,a5,80002648 <handle_trap+0xac>
+    800025ec:	ff458793          	addi	a5,a1,-12 # ff4 <_start-0x7ffff00c>
+    800025f0:	00100713          	li	a4,1
+    800025f4:	00f77663          	bleu	a5,a4,80002600 <handle_trap+0x64>
+    800025f8:	00f00793          	li	a5,15
+    800025fc:	1ef59463          	bne	a1,a5,800027e4 <handle_trap+0x248>
+    80002600:	11043503          	ld	a0,272(s0)
+    80002604:	cf9ff0ef          	jal	ra,800022fc <handle_fault>
+    80002608:	00040513          	mv	a0,s0
+    8000260c:	06013403          	ld	s0,96(sp)
+    80002610:	06813083          	ld	ra,104(sp)
+    80002614:	05813483          	ld	s1,88(sp)
+    80002618:	05013903          	ld	s2,80(sp)
+    8000261c:	04813983          	ld	s3,72(sp)
+    80002620:	04013a03          	ld	s4,64(sp)
+    80002624:	03813a83          	ld	s5,56(sp)
+    80002628:	03013b03          	ld	s6,48(sp)
+    8000262c:	02813b83          	ld	s7,40(sp)
+    80002630:	02013c03          	ld	s8,32(sp)
+    80002634:	01813c83          	ld	s9,24(sp)
+    80002638:	01013d03          	ld	s10,16(sp)
+    8000263c:	00813d83          	ld	s11,8(sp)
+    80002640:	07010113          	addi	sp,sp,112
+    80002644:	9f9fd06f          	j	8000003c <pop_tf>
+    80002648:	10853703          	ld	a4,264(a0)
+    8000264c:	00377793          	andi	a5,a4,3
+    80002650:	06079a63          	bnez	a5,800026c4 <handle_trap+0x128>
+    80002654:	008007ef          	jal	a5,8000265c <handle_trap+0xc0>
+    80002658:	00301073          	fssr	zero
+    8000265c:	00072703          	lw	a4,0(a4)
+    80002660:	0007a783          	lw	a5,0(a5)
+    80002664:	04f70c63          	beq	a4,a5,800026bc <handle_trap+0x120>
+    80002668:	10100513          	li	a0,257
+    8000266c:	04100793          	li	a5,65
+    80002670:	00001697          	auipc	a3,0x1
+    80002674:	9a868693          	addi	a3,a3,-1624 # 80003018 <pass+0x190>
+    80002678:	fffff717          	auipc	a4,0xfffff
+    8000267c:	98870713          	addi	a4,a4,-1656 # 80001000 <tohost>
+    80002680:	03051513          	slli	a0,a0,0x30
+    80002684:	00073583          	ld	a1,0(a4)
+    80002688:	00168693          	addi	a3,a3,1
+    8000268c:	00a7e633          	or	a2,a5,a0
+    80002690:	00058a63          	beqz	a1,800026a4 <handle_trap+0x108>
+    80002694:	fffff797          	auipc	a5,0xfffff
+    80002698:	9a07b623          	sd	zero,-1620(a5) # 80001040 <fromhost>
+    8000269c:	00073783          	ld	a5,0(a4)
+    800026a0:	fe079ae3          	bnez	a5,80002694 <handle_trap+0xf8>
+    800026a4:	0006c783          	lbu	a5,0(a3)
+    800026a8:	fffff597          	auipc	a1,0xfffff
+    800026ac:	94c5bc23          	sd	a2,-1704(a1) # 80001000 <tohost>
+    800026b0:	fc079ae3          	bnez	a5,80002684 <handle_trap+0xe8>
+    800026b4:	00300513          	li	a0,3
+    800026b8:	b79ff0ef          	jal	ra,80002230 <terminate>
+    800026bc:	00100513          	li	a0,1
+    800026c0:	b71ff0ef          	jal	ra,80002230 <terminate>
+    800026c4:	10100793          	li	a5,257
+    800026c8:	00001617          	auipc	a2,0x1
+    800026cc:	92860613          	addi	a2,a2,-1752 # 80002ff0 <pass+0x168>
+    800026d0:	04100693          	li	a3,65
+    800026d4:	fffff717          	auipc	a4,0xfffff
+    800026d8:	92c70713          	addi	a4,a4,-1748 # 80001000 <tohost>
+    800026dc:	03079793          	slli	a5,a5,0x30
+    800026e0:	00073503          	ld	a0,0(a4)
+    800026e4:	00160613          	addi	a2,a2,1
+    800026e8:	00f6e5b3          	or	a1,a3,a5
+    800026ec:	00050a63          	beqz	a0,80002700 <handle_trap+0x164>
+    800026f0:	fffff697          	auipc	a3,0xfffff
+    800026f4:	9406b823          	sd	zero,-1712(a3) # 80001040 <fromhost>
+    800026f8:	00073683          	ld	a3,0(a4)
+    800026fc:	fe069ae3          	bnez	a3,800026f0 <handle_trap+0x154>
+    80002700:	00064683          	lbu	a3,0(a2)
+    80002704:	fffff517          	auipc	a0,0xfffff
+    80002708:	8eb53e23          	sd	a1,-1796(a0) # 80001000 <tohost>
+    8000270c:	fc069ae3          	bnez	a3,800026e0 <handle_trap+0x144>
+    80002710:	fa5ff06f          	j	800026b4 <handle_trap+0x118>
+    80002714:	05052983          	lw	s3,80(a0)
+    80002718:	00001437          	lui	s0,0x1
+    8000271c:	00007d17          	auipc	s10,0x7
+    80002720:	cd4d0d13          	addi	s10,s10,-812 # 800093f0 <user_mapping>
+    80002724:	00003b97          	auipc	s7,0x3
+    80002728:	8dcb8b93          	addi	s7,s7,-1828 # 80005000 <pt>
+    8000272c:	00040b37          	lui	s6,0x40
+    80002730:	ffe00ab7          	lui	s5,0xffe00
+    80002734:	00007a17          	auipc	s4,0x7
+    80002738:	0aca0a13          	addi	s4,s4,172 # 800097e0 <freelist_tail>
+    8000273c:	0003f937          	lui	s2,0x3f
+    80002740:	01c0006f          	j	8000275c <handle_trap+0x1c0>
+    80002744:	00f73423          	sd	a5,8(a4)
+    80002748:	00007717          	auipc	a4,0x7
+    8000274c:	08f73c23          	sd	a5,152(a4) # 800097e0 <freelist_tail>
+    80002750:	000017b7          	lui	a5,0x1
+    80002754:	00f40433          	add	s0,s0,a5
+    80002758:	15240663          	beq	s0,s2,800028a4 <handle_trap+0x308>
+    8000275c:	00c45793          	srli	a5,s0,0xc
+    80002760:	00479493          	slli	s1,a5,0x4
+    80002764:	009d0733          	add	a4,s10,s1
+    80002768:	00073703          	ld	a4,0(a4)
+    8000276c:	fe0702e3          	beqz	a4,80002750 <handle_trap+0x1b4>
+    80002770:	60078793          	addi	a5,a5,1536 # 1600 <_start-0x7fffea00>
+    80002774:	00379793          	slli	a5,a5,0x3
+    80002778:	00fb87b3          	add	a5,s7,a5
+    8000277c:	0007bc03          	ld	s8,0(a5)
+    80002780:	040c7793          	andi	a5,s8,64
+    80002784:	0e078463          	beqz	a5,8000286c <handle_trap+0x2d0>
+    80002788:	100b2cf3          	csrrs	s9,sstatus,s6
+    8000278c:	01540db3          	add	s11,s0,s5
+    80002790:	00001637          	lui	a2,0x1
+    80002794:	000d8593          	mv	a1,s11
+    80002798:	00040513          	mv	a0,s0
+    8000279c:	975ff0ef          	jal	ra,80002110 <memcmp>
+    800027a0:	00050e63          	beqz	a0,800027bc <handle_trap+0x220>
+    800027a4:	080c7c13          	andi	s8,s8,128
+    800027a8:	080c0663          	beqz	s8,80002834 <handle_trap+0x298>
+    800027ac:	00001637          	lui	a2,0x1
+    800027b0:	000d8593          	mv	a1,s11
+    800027b4:	00040513          	mv	a0,s0
+    800027b8:	849ff0ef          	jal	ra,80002000 <memcpy>
+    800027bc:	009d07b3          	add	a5,s10,s1
+    800027c0:	100c9073          	csrw	sstatus,s9
+    800027c4:	000a3703          	ld	a4,0(s4)
+    800027c8:	0007b023          	sd	zero,0(a5)
+    800027cc:	f6071ce3          	bnez	a4,80002744 <handle_trap+0x1a8>
+    800027d0:	00007717          	auipc	a4,0x7
+    800027d4:	00f73823          	sd	a5,16(a4) # 800097e0 <freelist_tail>
+    800027d8:	00007717          	auipc	a4,0x7
+    800027dc:	00f73823          	sd	a5,16(a4) # 800097e8 <freelist_head>
+    800027e0:	f71ff06f          	j	80002750 <handle_trap+0x1b4>
+    800027e4:	10100793          	li	a5,257
+    800027e8:	04100613          	li	a2,65
+    800027ec:	00001697          	auipc	a3,0x1
+    800027f0:	85c68693          	addi	a3,a3,-1956 # 80003048 <pass+0x1c0>
+    800027f4:	fffff717          	auipc	a4,0xfffff
+    800027f8:	80c70713          	addi	a4,a4,-2036 # 80001000 <tohost>
+    800027fc:	03079793          	slli	a5,a5,0x30
+    80002800:	00073503          	ld	a0,0(a4)
+    80002804:	00168693          	addi	a3,a3,1
+    80002808:	00f665b3          	or	a1,a2,a5
+    8000280c:	00050a63          	beqz	a0,80002820 <handle_trap+0x284>
+    80002810:	fffff617          	auipc	a2,0xfffff
+    80002814:	82063823          	sd	zero,-2000(a2) # 80001040 <fromhost>
+    80002818:	00073603          	ld	a2,0(a4)
+    8000281c:	fe061ae3          	bnez	a2,80002810 <handle_trap+0x274>
+    80002820:	0006c603          	lbu	a2,0(a3)
+    80002824:	ffffe517          	auipc	a0,0xffffe
+    80002828:	7cb53e23          	sd	a1,2012(a0) # 80001000 <tohost>
+    8000282c:	fc061ae3          	bnez	a2,80002800 <handle_trap+0x264>
+    80002830:	e85ff06f          	j	800026b4 <handle_trap+0x118>
+    80002834:	10100793          	li	a5,257
+    80002838:	04100613          	li	a2,65
+    8000283c:	00000697          	auipc	a3,0x0
+    80002840:	77c68693          	addi	a3,a3,1916 # 80002fb8 <pass+0x130>
+    80002844:	ffffe717          	auipc	a4,0xffffe
+    80002848:	7bc70713          	addi	a4,a4,1980 # 80001000 <tohost>
+    8000284c:	03079793          	slli	a5,a5,0x30
+    80002850:	00168693          	addi	a3,a3,1
+    80002854:	00f665b3          	or	a1,a2,a5
+    80002858:	00073603          	ld	a2,0(a4)
+    8000285c:	04060863          	beqz	a2,800028ac <handle_trap+0x310>
+    80002860:	ffffe617          	auipc	a2,0xffffe
+    80002864:	7e063023          	sd	zero,2016(a2) # 80001040 <fromhost>
+    80002868:	ff1ff06f          	j	80002858 <handle_trap+0x2bc>
+    8000286c:	10100793          	li	a5,257
+    80002870:	04100613          	li	a2,65
+    80002874:	00000697          	auipc	a3,0x0
+    80002878:	70c68693          	addi	a3,a3,1804 # 80002f80 <pass+0xf8>
+    8000287c:	ffffe717          	auipc	a4,0xffffe
+    80002880:	78470713          	addi	a4,a4,1924 # 80001000 <tohost>
+    80002884:	03079793          	slli	a5,a5,0x30
+    80002888:	00168693          	addi	a3,a3,1
+    8000288c:	00f665b3          	or	a1,a2,a5
+    80002890:	00073603          	ld	a2,0(a4)
+    80002894:	02060663          	beqz	a2,800028c0 <handle_trap+0x324>
+    80002898:	ffffe617          	auipc	a2,0xffffe
+    8000289c:	7a063423          	sd	zero,1960(a2) # 80001040 <fromhost>
+    800028a0:	ff1ff06f          	j	80002890 <handle_trap+0x2f4>
+    800028a4:	00098513          	mv	a0,s3
+    800028a8:	989ff0ef          	jal	ra,80002230 <terminate>
+    800028ac:	0006c603          	lbu	a2,0(a3)
+    800028b0:	ffffe517          	auipc	a0,0xffffe
+    800028b4:	74b53823          	sd	a1,1872(a0) # 80001000 <tohost>
+    800028b8:	f8061ce3          	bnez	a2,80002850 <handle_trap+0x2b4>
+    800028bc:	df9ff06f          	j	800026b4 <handle_trap+0x118>
+    800028c0:	0006c603          	lbu	a2,0(a3)
+    800028c4:	ffffe517          	auipc	a0,0xffffe
+    800028c8:	72b53e23          	sd	a1,1852(a0) # 80001000 <tohost>
+    800028cc:	fa061ee3          	bnez	a2,80002888 <handle_trap+0x2ec>
+    800028d0:	de5ff06f          	j	800026b4 <handle_trap+0x118>
+
+00000000800028d4 <vm_boot>:
+    800028d4:	f14027f3          	csrr	a5,mhartid
+    800028d8:	18079a63          	bnez	a5,80002a6c <vm_boot+0x198>
+    800028dc:	00003697          	auipc	a3,0x3
+    800028e0:	72468693          	addi	a3,a3,1828 # 80006000 <pt+0x1000>
+    800028e4:	00004717          	auipc	a4,0x4
+    800028e8:	71c70713          	addi	a4,a4,1820 # 80007000 <pt+0x2000>
+    800028ec:	00c6d693          	srli	a3,a3,0xc
+    800028f0:	00c75713          	srli	a4,a4,0xc
+    800028f4:	00005797          	auipc	a5,0x5
+    800028f8:	70c78793          	addi	a5,a5,1804 # 80008000 <pt+0x3000>
+    800028fc:	00a69693          	slli	a3,a3,0xa
+    80002900:	00a71713          	slli	a4,a4,0xa
+    80002904:	0016e693          	ori	a3,a3,1
+    80002908:	00176713          	ori	a4,a4,1
+    8000290c:	00c7d793          	srli	a5,a5,0xc
+    80002910:	00002897          	auipc	a7,0x2
+    80002914:	6ed8b823          	sd	a3,1776(a7) # 80005000 <pt>
+    80002918:	00a79793          	slli	a5,a5,0xa
+    8000291c:	00003697          	auipc	a3,0x3
+    80002920:	6ce6be23          	sd	a4,1756(a3) # 80005ff8 <pt+0xff8>
+    80002924:	20000737          	lui	a4,0x20000
+    80002928:	0cf70713          	addi	a4,a4,207 # 200000cf <_start-0x5fffff31>
+    8000292c:	fff00593          	li	a1,-1
+    80002930:	0017e793          	ori	a5,a5,1
+    80002934:	00002617          	auipc	a2,0x2
+    80002938:	6cc60613          	addi	a2,a2,1740 # 80005000 <pt>
+    8000293c:	ed010113          	addi	sp,sp,-304
+    80002940:	03f59813          	slli	a6,a1,0x3f
+    80002944:	00005697          	auipc	a3,0x5
+    80002948:	6ae6ba23          	sd	a4,1716(a3) # 80007ff8 <pt+0x2ff8>
+    8000294c:	00003717          	auipc	a4,0x3
+    80002950:	6af73a23          	sd	a5,1716(a4) # 80006000 <pt+0x1000>
+    80002954:	00c65793          	srli	a5,a2,0xc
+    80002958:	12113423          	sd	ra,296(sp)
+    8000295c:	12813023          	sd	s0,288(sp)
+    80002960:	0107e7b3          	or	a5,a5,a6
+    80002964:	18079073          	csrw	satp,a5
+    80002968:	01f00793          	li	a5,31
+    8000296c:	00000297          	auipc	t0,0x0
+    80002970:	01428293          	addi	t0,t0,20 # 80002980 <vm_boot+0xac>
+    80002974:	305292f3          	csrrw	t0,mtvec,t0
+    80002978:	3b059073          	csrw	pmpaddr0,a1
+    8000297c:	3a079073          	csrw	pmpcfg0,a5
+    80002980:	bff00813          	li	a6,-1025
+    80002984:	01581813          	slli	a6,a6,0x15
+    80002988:	ffffd797          	auipc	a5,0xffffd
+    8000298c:	73c78793          	addi	a5,a5,1852 # 800000c4 <trap_entry>
+    80002990:	010787b3          	add	a5,a5,a6
+    80002994:	10579073          	csrw	stvec,a5
+    80002998:	340027f3          	csrr	a5,mscratch
+    8000299c:	010787b3          	add	a5,a5,a6
+    800029a0:	14079073          	csrw	sscratch,a5
+    800029a4:	0000b7b7          	lui	a5,0xb
+    800029a8:	1007879b          	addiw	a5,a5,256
+    800029ac:	30279073          	csrw	medeleg,a5
+    800029b0:	0001e7b7          	lui	a5,0x1e
+    800029b4:	30079073          	csrw	mstatus,a5
+    800029b8:	30405073          	csrwi	mie,0
+    800029bc:	00006697          	auipc	a3,0x6
+    800029c0:	64468693          	addi	a3,a3,1604 # 80009000 <freelist_nodes>
+    800029c4:	010687b3          	add	a5,a3,a6
+    800029c8:	3e078713          	addi	a4,a5,992 # 1e3e0 <_start-0x7ffe1c20>
+    800029cc:	00007617          	auipc	a2,0x7
+    800029d0:	e0f63e23          	sd	a5,-484(a2) # 800097e8 <freelist_head>
+    800029d4:	00007797          	auipc	a5,0x7
+    800029d8:	e0e7b623          	sd	a4,-500(a5) # 800097e0 <freelist_tail>
+    800029dc:	00007317          	auipc	t1,0x7
+    800029e0:	a1430313          	addi	t1,t1,-1516 # 800093f0 <user_mapping>
+    800029e4:	01100793          	li	a5,17
+    800029e8:	000808b7          	lui	a7,0x80
+    800029ec:	01080813          	addi	a6,a6,16
+    800029f0:	03f7871b          	addiw	a4,a5,63
+    800029f4:	02071713          	slli	a4,a4,0x20
+    800029f8:	0017d61b          	srliw	a2,a5,0x1
+    800029fc:	02075713          	srli	a4,a4,0x20
+    80002a00:	00c7c7b3          	xor	a5,a5,a2
+    80002a04:	01170733          	add	a4,a4,a7
+    80002a08:	010685b3          	add	a1,a3,a6
+    80002a0c:	00c71713          	slli	a4,a4,0xc
+    80002a10:	0057979b          	slliw	a5,a5,0x5
+    80002a14:	00e6b023          	sd	a4,0(a3)
+    80002a18:	00b6b423          	sd	a1,8(a3)
+    80002a1c:	0207f793          	andi	a5,a5,32
+    80002a20:	01068693          	addi	a3,a3,16
+    80002a24:	00c7e7b3          	or	a5,a5,a2
+    80002a28:	fcd314e3          	bne	t1,a3,800029f0 <vm_boot+0x11c>
+    80002a2c:	00050413          	mv	s0,a0
+    80002a30:	12000613          	li	a2,288
+    80002a34:	00000593          	li	a1,0
+    80002a38:	00010513          	mv	a0,sp
+    80002a3c:	00007797          	auipc	a5,0x7
+    80002a40:	9a07b623          	sd	zero,-1620(a5) # 800093e8 <freelist_nodes+0x3e8>
+    80002a44:	e18ff0ef          	jal	ra,8000205c <memset>
+    80002a48:	800007b7          	lui	a5,0x80000
+    80002a4c:	00f40433          	add	s0,s0,a5
+    80002a50:	00010513          	mv	a0,sp
+    80002a54:	10813423          	sd	s0,264(sp)
+    80002a58:	de4fd0ef          	jal	ra,8000003c <pop_tf>
+    80002a5c:	12813083          	ld	ra,296(sp)
+    80002a60:	12013403          	ld	s0,288(sp)
+    80002a64:	13010113          	addi	sp,sp,304
+    80002a68:	00008067          	ret
+    80002a6c:	0a65b7b7          	lui	a5,0xa65b
+    80002a70:	000805b7          	lui	a1,0x80
+    80002a74:	96c78793          	addi	a5,a5,-1684 # a65a96c <_start-0x759a5694>
+    80002a78:	ffc58593          	addi	a1,a1,-4 # 7fffc <_start-0x7ff80004>
+    80002a7c:	00100613          	li	a2,1
+    80002a80:	00b7f733          	and	a4,a5,a1
+    80002a84:	01f61613          	slli	a2,a2,0x1f
+    80002a88:	0017f693          	andi	a3,a5,1
+    80002a8c:	02079793          	slli	a5,a5,0x20
+    80002a90:	0207d793          	srli	a5,a5,0x20
+    80002a94:	00c70733          	add	a4,a4,a2
+    80002a98:	02068263          	beqz	a3,80002abc <vm_boot+0x1e8>
+    80002a9c:	0007202f          	amoadd.w	zero,zero,(a4)
+    80002aa0:	0017d793          	srli	a5,a5,0x1
+    80002aa4:	00b7f733          	and	a4,a5,a1
+    80002aa8:	0017f693          	andi	a3,a5,1
+    80002aac:	02079793          	slli	a5,a5,0x20
+    80002ab0:	0207d793          	srli	a5,a5,0x20
+    80002ab4:	00c70733          	add	a4,a4,a2
+    80002ab8:	fe0692e3          	bnez	a3,80002a9c <vm_boot+0x1c8>
+    80002abc:	00072003          	lw	zero,0(a4)
+    80002ac0:	0017d793          	srli	a5,a5,0x1
+    80002ac4:	fe1ff06f          	j	80002aa4 <vm_boot+0x1d0>
+
+0000000080002ac8 <userstart>:
+    80002ac8:	00301073          	fssr	zero
+
+0000000080002acc <test_2>:
+    80002acc:	00200193          	li	gp,2
+    80002ad0:	00001517          	auipc	a0,0x1
+    80002ad4:	53050513          	addi	a0,a0,1328 # 80004000 <test_2_data>
+    80002ad8:	00052007          	flw	ft0,0(a0)
+    80002adc:	00452087          	flw	ft1,4(a0)
+    80002ae0:	00852107          	flw	ft2,8(a0)
+    80002ae4:	00c52683          	lw	a3,12(a0)
+    80002ae8:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002aec:	e0018553          	fmv.x.w	a0,ft3
+    80002af0:	001015f3          	fsflags	a1,zero
+    80002af4:	00000613          	li	a2,0
+    80002af8:	38d51063          	bne	a0,a3,80002e78 <fail>
+    80002afc:	36c59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b00 <test_3>:
+    80002b00:	00300193          	li	gp,3
+    80002b04:	00001517          	auipc	a0,0x1
+    80002b08:	50c50513          	addi	a0,a0,1292 # 80004010 <test_3_data>
+    80002b0c:	00052007          	flw	ft0,0(a0)
+    80002b10:	00452087          	flw	ft1,4(a0)
+    80002b14:	00852107          	flw	ft2,8(a0)
+    80002b18:	00c52683          	lw	a3,12(a0)
+    80002b1c:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002b20:	e0018553          	fmv.x.w	a0,ft3
+    80002b24:	001015f3          	fsflags	a1,zero
+    80002b28:	00000613          	li	a2,0
+    80002b2c:	34d51663          	bne	a0,a3,80002e78 <fail>
+    80002b30:	34c59463          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b34 <test_4>:
+    80002b34:	00400193          	li	gp,4
+    80002b38:	00001517          	auipc	a0,0x1
+    80002b3c:	4e850513          	addi	a0,a0,1256 # 80004020 <test_4_data>
+    80002b40:	00052007          	flw	ft0,0(a0)
+    80002b44:	00452087          	flw	ft1,4(a0)
+    80002b48:	00852107          	flw	ft2,8(a0)
+    80002b4c:	00c52683          	lw	a3,12(a0)
+    80002b50:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002b54:	e0018553          	fmv.x.w	a0,ft3
+    80002b58:	001015f3          	fsflags	a1,zero
+    80002b5c:	00000613          	li	a2,0
+    80002b60:	30d51c63          	bne	a0,a3,80002e78 <fail>
+    80002b64:	30c59a63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b68 <test_5>:
+    80002b68:	00500193          	li	gp,5
+    80002b6c:	00001517          	auipc	a0,0x1
+    80002b70:	4c450513          	addi	a0,a0,1220 # 80004030 <test_5_data>
+    80002b74:	00052007          	flw	ft0,0(a0)
+    80002b78:	00452087          	flw	ft1,4(a0)
+    80002b7c:	00852107          	flw	ft2,8(a0)
+    80002b80:	00c52683          	lw	a3,12(a0)
+    80002b84:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002b88:	e0018553          	fmv.x.w	a0,ft3
+    80002b8c:	001015f3          	fsflags	a1,zero
+    80002b90:	00000613          	li	a2,0
+    80002b94:	2ed51263          	bne	a0,a3,80002e78 <fail>
+    80002b98:	2ec59063          	bne	a1,a2,80002e78 <fail>
+
+0000000080002b9c <test_6>:
+    80002b9c:	00600193          	li	gp,6
+    80002ba0:	00001517          	auipc	a0,0x1
+    80002ba4:	4a050513          	addi	a0,a0,1184 # 80004040 <test_6_data>
+    80002ba8:	00052007          	flw	ft0,0(a0)
+    80002bac:	00452087          	flw	ft1,4(a0)
+    80002bb0:	00852107          	flw	ft2,8(a0)
+    80002bb4:	00c52683          	lw	a3,12(a0)
+    80002bb8:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002bbc:	e0018553          	fmv.x.w	a0,ft3
+    80002bc0:	001015f3          	fsflags	a1,zero
+    80002bc4:	00000613          	li	a2,0
+    80002bc8:	2ad51863          	bne	a0,a3,80002e78 <fail>
+    80002bcc:	2ac59663          	bne	a1,a2,80002e78 <fail>
+
+0000000080002bd0 <test_7>:
+    80002bd0:	00700193          	li	gp,7
+    80002bd4:	00001517          	auipc	a0,0x1
+    80002bd8:	47c50513          	addi	a0,a0,1148 # 80004050 <test_7_data>
+    80002bdc:	00052007          	flw	ft0,0(a0)
+    80002be0:	00452087          	flw	ft1,4(a0)
+    80002be4:	00852107          	flw	ft2,8(a0)
+    80002be8:	00c52683          	lw	a3,12(a0)
+    80002bec:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002bf0:	e0018553          	fmv.x.w	a0,ft3
+    80002bf4:	001015f3          	fsflags	a1,zero
+    80002bf8:	00000613          	li	a2,0
+    80002bfc:	26d51e63          	bne	a0,a3,80002e78 <fail>
+    80002c00:	26c59c63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c04 <test_12>:
+    80002c04:	00c00193          	li	gp,12
+    80002c08:	00001517          	auipc	a0,0x1
+    80002c0c:	45850513          	addi	a0,a0,1112 # 80004060 <test_12_data>
+    80002c10:	00052007          	flw	ft0,0(a0)
+    80002c14:	00452087          	flw	ft1,4(a0)
+    80002c18:	00852107          	flw	ft2,8(a0)
+    80002c1c:	00c52683          	lw	a3,12(a0)
+    80002c20:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002c24:	e0018553          	fmv.x.w	a0,ft3
+    80002c28:	001015f3          	fsflags	a1,zero
+    80002c2c:	00000613          	li	a2,0
+    80002c30:	24d51463          	bne	a0,a3,80002e78 <fail>
+    80002c34:	24c59263          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c38 <test_13>:
+    80002c38:	00d00193          	li	gp,13
+    80002c3c:	00001517          	auipc	a0,0x1
+    80002c40:	43450513          	addi	a0,a0,1076 # 80004070 <test_13_data>
+    80002c44:	00052007          	flw	ft0,0(a0)
+    80002c48:	00452087          	flw	ft1,4(a0)
+    80002c4c:	00852107          	flw	ft2,8(a0)
+    80002c50:	00c52683          	lw	a3,12(a0)
+    80002c54:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002c58:	e0018553          	fmv.x.w	a0,ft3
+    80002c5c:	001015f3          	fsflags	a1,zero
+    80002c60:	00000613          	li	a2,0
+    80002c64:	20d51a63          	bne	a0,a3,80002e78 <fail>
+    80002c68:	20c59863          	bne	a1,a2,80002e78 <fail>
+
+0000000080002c6c <test_14>:
+    80002c6c:	00e00193          	li	gp,14
+    80002c70:	00001517          	auipc	a0,0x1
+    80002c74:	41050513          	addi	a0,a0,1040 # 80004080 <test_14_data>
+    80002c78:	00052007          	flw	ft0,0(a0)
+    80002c7c:	00452087          	flw	ft1,4(a0)
+    80002c80:	00852107          	flw	ft2,8(a0)
+    80002c84:	00c52683          	lw	a3,12(a0)
+    80002c88:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002c8c:	e0018553          	fmv.x.w	a0,ft3
+    80002c90:	001015f3          	fsflags	a1,zero
+    80002c94:	00000613          	li	a2,0
+    80002c98:	1ed51063          	bne	a0,a3,80002e78 <fail>
+    80002c9c:	1cc59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002ca0 <test_15>:
+    80002ca0:	00f00193          	li	gp,15
+    80002ca4:	00001517          	auipc	a0,0x1
+    80002ca8:	3ec50513          	addi	a0,a0,1004 # 80004090 <test_15_data>
+    80002cac:	00052007          	flw	ft0,0(a0)
+    80002cb0:	00452087          	flw	ft1,4(a0)
+    80002cb4:	00852107          	flw	ft2,8(a0)
+    80002cb8:	00c52683          	lw	a3,12(a0)
+    80002cbc:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002cc0:	e0018553          	fmv.x.w	a0,ft3
+    80002cc4:	001015f3          	fsflags	a1,zero
+    80002cc8:	00000613          	li	a2,0
+    80002ccc:	1ad51663          	bne	a0,a3,80002e78 <fail>
+    80002cd0:	1ac59463          	bne	a1,a2,80002e78 <fail>
+
+0000000080002cd4 <test_16>:
+    80002cd4:	01000193          	li	gp,16
+    80002cd8:	00001517          	auipc	a0,0x1
+    80002cdc:	3c850513          	addi	a0,a0,968 # 800040a0 <test_16_data>
+    80002ce0:	00052007          	flw	ft0,0(a0)
+    80002ce4:	00452087          	flw	ft1,4(a0)
+    80002ce8:	00852107          	flw	ft2,8(a0)
+    80002cec:	00c52683          	lw	a3,12(a0)
+    80002cf0:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002cf4:	e0018553          	fmv.x.w	a0,ft3
+    80002cf8:	001015f3          	fsflags	a1,zero
+    80002cfc:	00000613          	li	a2,0
+    80002d00:	16d51c63          	bne	a0,a3,80002e78 <fail>
+    80002d04:	16c59a63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d08 <test_17>:
+    80002d08:	01100193          	li	gp,17
+    80002d0c:	00001517          	auipc	a0,0x1
+    80002d10:	3a450513          	addi	a0,a0,932 # 800040b0 <test_17_data>
+    80002d14:	00052007          	flw	ft0,0(a0)
+    80002d18:	00452087          	flw	ft1,4(a0)
+    80002d1c:	00852107          	flw	ft2,8(a0)
+    80002d20:	00c52683          	lw	a3,12(a0)
+    80002d24:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002d28:	e0018553          	fmv.x.w	a0,ft3
+    80002d2c:	001015f3          	fsflags	a1,zero
+    80002d30:	00000613          	li	a2,0
+    80002d34:	14d51263          	bne	a0,a3,80002e78 <fail>
+    80002d38:	14c59063          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d3c <test_20>:
+    80002d3c:	01400193          	li	gp,20
+    80002d40:	00001517          	auipc	a0,0x1
+    80002d44:	38050513          	addi	a0,a0,896 # 800040c0 <test_20_data>
+    80002d48:	00052007          	flw	ft0,0(a0)
+    80002d4c:	00452087          	flw	ft1,4(a0)
+    80002d50:	00852107          	flw	ft2,8(a0)
+    80002d54:	00c52683          	lw	a3,12(a0)
+    80002d58:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002d5c:	e0018553          	fmv.x.w	a0,ft3
+    80002d60:	001015f3          	fsflags	a1,zero
+    80002d64:	01000613          	li	a2,16
+    80002d68:	10d51863          	bne	a0,a3,80002e78 <fail>
+    80002d6c:	10c59663          	bne	a1,a2,80002e78 <fail>
+
+0000000080002d70 <test_21>:
+    80002d70:	01500193          	li	gp,21
+    80002d74:	00001517          	auipc	a0,0x1
+    80002d78:	35c50513          	addi	a0,a0,860 # 800040d0 <test_21_data>
+    80002d7c:	00052007          	flw	ft0,0(a0)
+    80002d80:	00452087          	flw	ft1,4(a0)
+    80002d84:	00852107          	flw	ft2,8(a0)
+    80002d88:	00c52683          	lw	a3,12(a0)
+    80002d8c:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002d90:	e0018553          	fmv.x.w	a0,ft3
+    80002d94:	001015f3          	fsflags	a1,zero
+    80002d98:	00000613          	li	a2,0
+    80002d9c:	0cd51e63          	bne	a0,a3,80002e78 <fail>
+    80002da0:	0cc59c63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002da4 <test_30>:
+    80002da4:	01e00193          	li	gp,30
+    80002da8:	00001517          	auipc	a0,0x1
+    80002dac:	33850513          	addi	a0,a0,824 # 800040e0 <test_30_data>
+    80002db0:	00052007          	flw	ft0,0(a0)
+    80002db4:	00452087          	flw	ft1,4(a0)
+    80002db8:	00852107          	flw	ft2,8(a0)
+    80002dbc:	00c52683          	lw	a3,12(a0)
+    80002dc0:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002dc4:	e0018553          	fmv.x.w	a0,ft3
+    80002dc8:	001015f3          	fsflags	a1,zero
+    80002dcc:	00000613          	li	a2,0
+    80002dd0:	0ad51463          	bne	a0,a3,80002e78 <fail>
+    80002dd4:	0ac59263          	bne	a1,a2,80002e78 <fail>
+
+0000000080002dd8 <test_31>:
+    80002dd8:	01f00193          	li	gp,31
+    80002ddc:	00001517          	auipc	a0,0x1
+    80002de0:	31450513          	addi	a0,a0,788 # 800040f0 <test_31_data>
+    80002de4:	00052007          	flw	ft0,0(a0)
+    80002de8:	00452087          	flw	ft1,4(a0)
+    80002dec:	00852107          	flw	ft2,8(a0)
+    80002df0:	00c52683          	lw	a3,12(a0)
+    80002df4:	281001d3          	fmin.s	ft3,ft0,ft1
+    80002df8:	e0018553          	fmv.x.w	a0,ft3
+    80002dfc:	001015f3          	fsflags	a1,zero
+    80002e00:	00000613          	li	a2,0
+    80002e04:	06d51a63          	bne	a0,a3,80002e78 <fail>
+    80002e08:	06c59863          	bne	a1,a2,80002e78 <fail>
+
+0000000080002e0c <test_32>:
+    80002e0c:	02000193          	li	gp,32
+    80002e10:	00001517          	auipc	a0,0x1
+    80002e14:	2f050513          	addi	a0,a0,752 # 80004100 <test_32_data>
+    80002e18:	00052007          	flw	ft0,0(a0)
+    80002e1c:	00452087          	flw	ft1,4(a0)
+    80002e20:	00852107          	flw	ft2,8(a0)
+    80002e24:	00c52683          	lw	a3,12(a0)
+    80002e28:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002e2c:	e0018553          	fmv.x.w	a0,ft3
+    80002e30:	001015f3          	fsflags	a1,zero
+    80002e34:	00000613          	li	a2,0
+    80002e38:	04d51063          	bne	a0,a3,80002e78 <fail>
+    80002e3c:	02c59e63          	bne	a1,a2,80002e78 <fail>
+
+0000000080002e40 <test_33>:
+    80002e40:	02100193          	li	gp,33
+    80002e44:	00001517          	auipc	a0,0x1
+    80002e48:	2cc50513          	addi	a0,a0,716 # 80004110 <test_33_data>
+    80002e4c:	00052007          	flw	ft0,0(a0)
+    80002e50:	00452087          	flw	ft1,4(a0)
+    80002e54:	00852107          	flw	ft2,8(a0)
+    80002e58:	00c52683          	lw	a3,12(a0)
+    80002e5c:	281011d3          	fmax.s	ft3,ft0,ft1
+    80002e60:	e0018553          	fmv.x.w	a0,ft3
+    80002e64:	001015f3          	fsflags	a1,zero
+    80002e68:	00000613          	li	a2,0
+    80002e6c:	00d51663          	bne	a0,a3,80002e78 <fail>
+    80002e70:	00c59463          	bne	a1,a2,80002e78 <fail>
+    80002e74:	00301a63          	bne	zero,gp,80002e88 <pass>
+
+0000000080002e78 <fail>:
+    80002e78:	00119513          	slli	a0,gp,0x1
+    80002e7c:	00050063          	beqz	a0,80002e7c <fail+0x4>
+    80002e80:	00156513          	ori	a0,a0,1
+    80002e84:	00000073          	ecall
+
+0000000080002e88 <pass>:
+    80002e88:	00100513          	li	a0,1
+    80002e8c:	00000073          	ecall
+    80002e90:	c0001073          	unimp
+
+Disassembly of section .data:
+
+0000000080004000 <test_2_data>:
+    80004000:	0000                	unimp
+    80004002:	4020                	lw	s0,64(s0)
+    80004004:	0000                	unimp
+    80004006:	3f80                	fld	fs0,56(a5)
+    80004008:	0000                	unimp
+    8000400a:	0000                	unimp
+    8000400c:	0000                	unimp
+    8000400e:	3f80                	fld	fs0,56(a5)
+
+0000000080004010 <test_3_data>:
+    80004010:	c49a6333          	0xc49a6333
+    80004014:	cccd                	beqz	s1,800040ce <test_20_data+0xe>
+    80004016:	3f8c                	fld	fa1,56(a5)
+    80004018:	0000                	unimp
+    8000401a:	0000                	unimp
+    8000401c:	c49a6333          	0xc49a6333
+
+0000000080004020 <test_4_data>:
+    80004020:	cccd                	beqz	s1,800040da <test_21_data+0xa>
+    80004022:	3f8c                	fld	fa1,56(a5)
+    80004024:	c49a6333          	0xc49a6333
+    80004028:	0000                	unimp
+    8000402a:	0000                	unimp
+    8000402c:	c49a6333          	0xc49a6333
+
+0000000080004030 <test_5_data>:
+    80004030:	ffff                	0xffff
+    80004032:	7fff                	0x7fff
+    80004034:	c49a6333          	0xc49a6333
+    80004038:	0000                	unimp
+    8000403a:	0000                	unimp
+    8000403c:	c49a6333          	0xc49a6333
+
+0000000080004040 <test_6_data>:
+    80004040:	40490fdb          	0x40490fdb
+    80004044:	322bcc77          	0x322bcc77
+    80004048:	0000                	unimp
+    8000404a:	0000                	unimp
+    8000404c:	322bcc77          	0x322bcc77
+
+0000000080004050 <test_7_data>:
+    80004050:	0000                	unimp
+    80004052:	bf80                	fsd	fs0,56(a5)
+    80004054:	0000                	unimp
+    80004056:	c000                	sw	s0,0(s0)
+    80004058:	0000                	unimp
+    8000405a:	0000                	unimp
+    8000405c:	0000                	unimp
+    8000405e:	c000                	sw	s0,0(s0)
+
+0000000080004060 <test_12_data>:
+    80004060:	0000                	unimp
+    80004062:	4020                	lw	s0,64(s0)
+    80004064:	0000                	unimp
+    80004066:	3f80                	fld	fs0,56(a5)
+    80004068:	0000                	unimp
+    8000406a:	0000                	unimp
+    8000406c:	0000                	unimp
+    8000406e:	4020                	lw	s0,64(s0)
+
+0000000080004070 <test_13_data>:
+    80004070:	c49a6333          	0xc49a6333
+    80004074:	cccd                	beqz	s1,8000412e <begin_signature+0xe>
+    80004076:	3f8c                	fld	fa1,56(a5)
+    80004078:	0000                	unimp
+    8000407a:	0000                	unimp
+    8000407c:	cccd                	beqz	s1,80004136 <begin_signature+0x16>
+    8000407e:	3f8c                	fld	fa1,56(a5)
+
+0000000080004080 <test_14_data>:
+    80004080:	cccd                	beqz	s1,8000413a <begin_signature+0x1a>
+    80004082:	3f8c                	fld	fa1,56(a5)
+    80004084:	c49a6333          	0xc49a6333
+    80004088:	0000                	unimp
+    8000408a:	0000                	unimp
+    8000408c:	cccd                	beqz	s1,80004146 <begin_signature+0x26>
+    8000408e:	3f8c                	fld	fa1,56(a5)
+
+0000000080004090 <test_15_data>:
+    80004090:	ffff                	0xffff
+    80004092:	7fff                	0x7fff
+    80004094:	c49a6333          	0xc49a6333
+    80004098:	0000                	unimp
+    8000409a:	0000                	unimp
+    8000409c:	c49a6333          	0xc49a6333
+
+00000000800040a0 <test_16_data>:
+    800040a0:	40490fdb          	0x40490fdb
+    800040a4:	322bcc77          	0x322bcc77
+    800040a8:	0000                	unimp
+    800040aa:	0000                	unimp
+    800040ac:	40490fdb          	0x40490fdb
+
+00000000800040b0 <test_17_data>:
+    800040b0:	0000                	unimp
+    800040b2:	bf80                	fsd	fs0,56(a5)
+    800040b4:	0000                	unimp
+    800040b6:	c000                	sw	s0,0(s0)
+    800040b8:	0000                	unimp
+    800040ba:	0000                	unimp
+    800040bc:	0000                	unimp
+    800040be:	bf80                	fsd	fs0,56(a5)
+
+00000000800040c0 <test_20_data>:
+    800040c0:	0001                	nop
+    800040c2:	7f80                	ld	s0,56(a5)
+    800040c4:	0000                	unimp
+    800040c6:	3f80                	fld	fs0,56(a5)
+    800040c8:	0000                	unimp
+    800040ca:	0000                	unimp
+    800040cc:	0000                	unimp
+    800040ce:	3f80                	fld	fs0,56(a5)
+
+00000000800040d0 <test_21_data>:
+    800040d0:	ffff                	0xffff
+    800040d2:	7fff                	0x7fff
+    800040d4:	ffff                	0xffff
+    800040d6:	7fff                	0x7fff
+    800040d8:	0000                	unimp
+    800040da:	0000                	unimp
+    800040dc:	0000                	unimp
+    800040de:	7fc0                	ld	s0,184(a5)
+
+00000000800040e0 <test_30_data>:
+    800040e0:	0000                	unimp
+    800040e2:	8000                	0x8000
+    800040e4:	0000                	unimp
+    800040e6:	0000                	unimp
+    800040e8:	0000                	unimp
+    800040ea:	0000                	unimp
+    800040ec:	0000                	unimp
+    800040ee:	8000                	0x8000
+
+00000000800040f0 <test_31_data>:
+    800040f0:	0000                	unimp
+    800040f2:	0000                	unimp
+    800040f4:	0000                	unimp
+    800040f6:	8000                	0x8000
+    800040f8:	0000                	unimp
+    800040fa:	0000                	unimp
+    800040fc:	0000                	unimp
+    800040fe:	8000                	0x8000
+
+0000000080004100 <test_32_data>:
+    80004100:	0000                	unimp
+    80004102:	8000                	0x8000
+    80004104:	0000                	unimp
+    80004106:	0000                	unimp
+    80004108:	0000                	unimp
+    8000410a:	0000                	unimp
+    8000410c:	0000                	unimp
+    8000410e:	0000                	unimp
+
+0000000080004110 <test_33_data>:
+    80004110:	0000                	unimp
+    80004112:	0000                	unimp
+    80004114:	0000                	unimp
+    80004116:	8000                	0x8000
+    80004118:	0000                	unimp
+    8000411a:	0000                	unimp
+    8000411c:	0000                	unimp
+    8000411e:	0000                	unimp
diff --git a/test/riscv-tests/rv64uf-v-fmin.elf b/test/riscv-tests/rv64uf-v-fmin.elf
new file mode 100644
index 0000000..7938b3a
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-fmin.elf
diff --git a/test/riscv-tests/rv64uf-v-ldst.elf b/test/riscv-tests/rv64uf-v-ldst.elf
new file mode 100755
index 0000000..ffebd49
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-ldst.elf
diff --git a/test/riscv-tests/rv64uf-v-move.elf b/test/riscv-tests/rv64uf-v-move.elf
new file mode 100755
index 0000000..ea97cd0
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-move.elf
diff --git a/test/riscv-tests/rv64uf-v-recoding.elf b/test/riscv-tests/rv64uf-v-recoding.elf
new file mode 100755
index 0000000..0a2ceba
--- /dev/null
+++ b/test/riscv-tests/rv64uf-v-recoding.elf
diff --git a/test/run_fp_tests.sh b/test/run_fp_tests.sh
new file mode 100755
index 0000000..70ae00f
--- /dev/null
+++ b/test/run_fp_tests.sh
@@ -0,0 +1,88 @@
+#!/usr/bin/env bash
+set -e
+
+DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )"
+cd $DIR
+RISCVDIR="$DIR/.."
+
+RED='\033[0;91m'
+GREEN='\033[0;92m'
+YELLOW='\033[0;93m'
+NC='\033[0m'
+
+rm -f $DIR/tests.xml
+
+pass=0
+fail=0
+XML=""
+
+function green {
+    (( pass += 1 ))
+    printf "$1: ${GREEN}$2${NC}\n"
+    XML+="    <testcase name=\"$1\"/>\n"
+}
+
+function yellow {
+    (( fail += 1 ))
+    printf "$1: ${YELLOW}$2${NC}\n"
+    XML+="    <testcase name=\"$1\">\n      <error message=\"$2\">$2</error>\n    </testcase>\n"
+}
+
+function red {
+    (( fail += 1 ))
+    printf "$1: ${RED}$2${NC}\n"
+    XML+="    <testcase name=\"$1\">\n      <error message=\"$2\">$2</error>\n    </testcase>\n"
+}
+
+function finish_suite {
+    printf "$1: Passed ${pass} out of $(( pass + fail ))\n\n"
+    XML="  <testsuite name=\"$1\" tests=\"$(( pass + fail ))\" failures=\"${fail}\" timestamp=\"$(date)\">\n$XML  </testsuite>\n"
+    printf "$XML" >> $DIR/tests.xml
+    XML=""
+    pass=0
+    fail=0
+}
+
+SAILLIBDIR="$DIR/../../lib/"
+
+printf "<testsuites>\n" >> $DIR/tests.xml
+
+cd $RISCVDIR
+
+# Do 'make clean' to avoid cross-arch pollution.
+make clean
+
+if make c_emulator/riscv_sim_RV64;
+then
+    green "Building 64-bit RISCV C emulator" "ok"
+else
+    red "Building 64-bit RISCV C emulator" "fail"
+fi
+for test in $DIR/riscv-tests/rv64u{f,d}*.elf $DIR/riscv-tests/rv64mi-p-csr.elf; do
+    if timeout 5 $RISCVDIR/c_emulator/riscv_sim_RV64 -p $test > ${test%.elf}.cout 2>&1 && grep -q SUCCESS ${test%.elf}.cout
+    then
+	green "C-64 $(basename $test)" "ok"
+    else
+	red "C-64 $(basename $test)" "fail"
+    fi
+done
+finish_suite "64-bit RISCV C tests"
+
+
+if ARCH=RV32 make c_emulator/riscv_sim_RV32;
+then
+    green "Building 32-bit RISCV C emulator" "ok"
+else
+    red "Building 32-bit RISCV C emulator" "fail"
+fi
+for test in $DIR/riscv-tests/rv32uf*.elf $DIR/riscv-tests/rv32mi-p-csr.elf; do
+    if timeout 5 $RISCVDIR/c_emulator/riscv_sim_RV32 -p $test > ${test%.elf}.cout 2>&1 && grep -q SUCCESS ${test%.elf}.cout
+    then
+	green "C-32 $(basename $test)" "ok"
+    else
+	red "C-32 $(basename $test)" "fail"
+    fi
+done
+finish_suite "32-bit RISCV C tests"
+
+printf "</testsuites>\n" >> $DIR/tests.xml
diff --git a/test/run_tests.sh b/test/run_tests.sh
index e0b50ad..dceeae9 100755
--- a/test/run_tests.sh
+++ b/test/run_tests.sh
@@ -60,7 +60,17 @@ else
     red "Building 32-bit RISCV OCaml emulator" "fail"
 fi
 for test in $DIR/riscv-tests/rv32*.elf; do
-    if $RISCVDIR/ocaml_emulator/riscv_ocaml_sim_RV32 "$test" >"${test/.elf/.out}" 2>&1 && grep -q SUCCESS "${test/.elf/.out}"
+    # skip D tests on RV32
+    pat="rv32ud-.+elf"
+    if [[ $(basename $test) =~ $pat ]];
+    then continue
+    fi
+    # skip F tests on RV32 OCaml for now
+    pat="rv32uf-.+elf"
+    if [[ $(basename $test) =~ $pat ]];
+    then continue
+    fi
+    if $RISCVDIR/ocaml_emulator/riscv_ocaml_sim_RV32 "$test" >"${test/.elf/.out}" 2>&1 && grep -q SUCCESS "${test/.elf/.out}" */
     then
        green "OCaml-32 $(basename $test)" "ok"
     else
@@ -77,6 +87,11 @@ else
     red "Building 32-bit RISCV C emulator" "fail"
 fi
 for test in $DIR/riscv-tests/rv32*.elf; do
+    # skip D tests on C RV32
+    pat='rv32ud-.+elf'
+    if [[ $(basename $test) =~ $pat ]];
+    then continue
+    fi
     if timeout 5 $RISCVDIR/c_emulator/riscv_sim_RV32 -p $test > ${test%.elf}.cout 2>&1 && grep -q SUCCESS ${test%.elf}.cout
     then
 	green "C-32 $(basename $test)" "ok"
@@ -98,6 +113,15 @@ else
     red "Building 64-bit RISCV OCaml emulator" "fail"
 fi
 for test in $DIR/riscv-tests/rv64*.elf; do
+    # skip F/D tests on OCaml for now
+    pat='rv64ud-.+elf'
+    if [[ $(basename $test) =~ $pat ]];
+    then continue
+    fi
+    pat='rv64uf-.+elf'
+    if [[ $(basename $test) =~ $pat ]];
+    then continue
+    fi
     if $RISCVDIR/ocaml_emulator/riscv_ocaml_sim_RV64 "$test" >"${test/.elf/.out}" 2>&1 && grep -q SUCCESS "${test/.elf/.out}"
     then
        green "OCaml-64 $(basename $test)" "ok"