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| author | Mete Balci <metebalci@gmail.com> | 2019-03-30 12:27:57 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-10-03 11:21:15 +0100 |
| commit | d7d70c2719e6fe94dc9ca15aeb81cf142d597cdc (patch) | |
| tree | 46fedb18e44c5e6b6aa12425d500961ae7325f8c /doc | |
| parent | a31e579e879cfb3d67583780c4ebb6f1015ed5a5 (diff) | |
| download | riscv-openocd-d7d70c2719e6fe94dc9ca15aeb81cf142d597cdc.zip riscv-openocd-d7d70c2719e6fe94dc9ca15aeb81cf142d597cdc.tar.gz riscv-openocd-d7d70c2719e6fe94dc9ca15aeb81cf142d597cdc.tar.bz2 | |
target/aarch64: a64 disassembler
Add A64 (AArch64) Disassembler using Capstone framework.
Change-Id: Ia92b57001843b11a818af940a468b131e42a03fd
Signed-off-by: Mete Balci <metebalci@gmail.com>
[Antonio Borneo: Rebased on current HEAD]
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5004
Tested-by: jenkins
Diffstat (limited to 'doc')
| -rw-r--r-- | doc/openocd.texi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 8c99228..317f188 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -9349,6 +9349,12 @@ target code relies on. In a configuration file, the command would typically be c However, normally it is not necessary to use the command at all. @end deffn +@deffn Command {aarch64 disassemble} address [count] +@cindex disassemble +Disassembles @var{count} instructions starting at @var{address}. +If @var{count} is not specified, a single instruction is disassembled. +@end deffn + @deffn Command {aarch64 smp} [on|off] Display, enable or disable SMP handling mode. The state of SMP handling influences the way targets in an SMP group are handled by the run control. With SMP handling enabled, issuing halt or resume to one core will trigger |