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AgeCommit message (Expand)AuthorFilesLines
2018-03-21Make misa.C test conform to Hauser proposalAndrew Waterman1-43/+10
2018-02-27Add test for clearing misa.C while PC is misaligned (#117)Andrew Waterman1-1/+79
2017-11-27Rename sbadaddr to satpAndrew Waterman1-1/+1
2017-11-22Check sepc for rv64si/scall test. (#107)Christopher Celio1-0/+4
2017-11-11Make sure that code is 4-byte aligned before disabling rvc (#100)Andrew Waterman1-0/+1
2017-11-09Make rv64mi-p-ecall work when U-mode is not presentAndrew Waterman1-1/+17
2017-11-09Use mstatus.MPP to check existence of U-modeAndrew Waterman1-5/+6
2017-11-01SBREAK test now checks EPC value. (#92)Christopher Celio1-0/+4
2017-10-30Declare trap handlers as global symbols. (#87)Richard Xia5-0/+5
2017-10-26Verify that mtval/stval is written correctly on misaligned fetchAndrew Waterman1-1/+9
2017-10-26Fix rv64mi-csr for the case where U-mode is not available. (#86)Richard Xia1-0/+16
2017-09-01Improve ma_fetch test to cover JAL and branchesAndrew Waterman1-1/+48
2017-08-07rv64[ms]i-csr: Only emit F instructions when compiled for F.Richard Xia1-1/+6
2017-05-05Check UXL in sstatusAndrew Waterman1-0/+5
2017-05-05Test that superpage PTEs trap when PPN LSBs are setAndrew Waterman1-0/+18
2017-05-05Regularize control flow in dirty-bit testAndrew Waterman1-8/+12
2017-03-30Expand dirty-bit test to test MPRV and SUMAndrew Waterman1-27/+30
2017-03-27Separate page faults from physical memory access exceptionsAndrew Waterman1-1/+1
2017-03-21Allow supervisor access to user pages in dirty-bit testAndrew Waterman1-1/+1
2017-03-09Permit flexible dirty-bit behaviorAndrew Waterman1-16/+26
2016-11-01Make sure FP stores don't write memory if mstatus.FS=0.Andrew Waterman1-8/+22
2016-08-26Update to new breakpoint & counter specAndrew Waterman1-6/+6
2016-07-22skip user-mode trap tests in rv32mi/rv64mi-p-csr if no user modeHoward Mao1-0/+9
2016-07-22Move dirty bit test to rv64si directoryAndrew Waterman2-0/+94
2016-07-22Make ma_fetch test robust against code size changesAndrew Waterman1-2/+4
2016-07-11Remove instruction width assumptions to support RVCAndrew Waterman4-6/+6
2016-07-07Update WFI test for priv v1.9Andrew Waterman1-2/+3
2016-05-02Remove incorrect M-mode WFI testAndrew Waterman1-9/+0
2016-04-30ERET -> xRET; new memory mapAndrew Waterman4-17/+13
2016-03-03Make WFI test more strictAndrew Waterman1-3/+1
2016-03-03Some S-mode tests really only belong in M-modeAndrew Waterman4-154/+9
2016-03-03Fix ma_fetch to work with or without RVCAndrew Waterman1-8/+18
2016-03-03WIP on priv spec v1.9Andrew Waterman3-21/+21
2015-07-05New M-mode timersAndrew Waterman2-1127/+0
2015-05-19Add basic WFI testAndrew Waterman2-0/+42
2015-05-09Update to privileged architecture version 1.7Andrew Waterman3-12/+19
2015-03-25split out S-mode tests and M-mode testsYunsup Lee10-186/+96
2015-03-24Don't assume PRV1/2 and IE1/2 are resetAndrew Waterman1-1/+1
2015-03-21Merge rv64si and rv32si testsAndrew Waterman6-0/+309
2015-03-17Merge [shm]call into ecall, [shm]ret into eretAndrew Waterman2-2/+2
2015-03-14Add PTE dirty bit testAndrew Waterman2-0/+85
2015-03-12Update to new privileged specAndrew Waterman5-77/+53
2015-02-19Unify rv32/rv64 timer testsAndrew Waterman1-5/+7
2015-01-09Add LICENSEAndrew Waterman4-0/+8
2015-01-04Avoid deprecated "b" pseudo-op; use "j" insteadAndrew Waterman1-2/+2
2014-12-03Make timer test more thoroughAndrew Waterman1-12/+1043
2014-05-07Add timer interrupt testAndrew Waterman3-4/+66
2014-01-31Add rv32si tests, including illegality of shamt[5]Andrew Waterman1-1/+1
2014-01-31Make CSR test much more robustAndrew Waterman1-0/+52
2014-01-21Add CSRRx/CSRRxI testAndrew Waterman3-1/+35
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