aboutsummaryrefslogtreecommitdiff
BranchCommit messageAuthorAge
ceasetest2Check basic debugging still works in CeaseMultiTim Newsome23 months
debugAdd debug statement.Tim Newsome5 years
debug_disassembledebug: On failure, disassemble close instructions.Tim Newsome2 years
disable_unavailabledebug: Disable Unavailable tests.Tim Newsome11 months
masterMerge pull request #581 from en-sc/en-sc/reserve-trigger-fix-propperEvgeniy Naydanov6 weeks
miscMake newer version of pylint happy.Tim Newsome5 years
python3Move to Python 3.Tim Newsome5 years
riscv-tests-sailremoved the env/ directory, which was a submodule dir. replaced at a higher l...William McSpaddden5 months
tmptmpAndrew Waterman5 years
trigger_priorityRemove ineffective tests.Tim Newsome2 years
[...]
 
 
AgeCommit messageAuthorFilesLines
2016-02-29Separate M, and A from I. Allow disabling of M,A,Ftravis-devColin Schmidt65-21/+159
2016-02-29if atomics are unavailable emulate them ala pk emuColin Schmidt2-12/+24
2016-02-28Fix capitalization of XLEN variableAndrew Waterman1-1/+1
2016-02-28Strip big-endian testsAndrew Waterman4-24/+0
2016-02-27Merge pull request #10 from riscv/travis-devPalmer Dabbelt5-103/+302
2016-02-27only build the rv32 bit tests if xlen is 32Colin Schmidt1-0/+3
2016-02-27remove malloc declaration from dhrystoneColin Schmidt1-1/+0
2016-02-27allow make variables to be overwritten update configureColin Schmidt4-102/+299
2016-02-23make install rule copy the right things to the right placesHoward Mao1-4/+8
2016-02-23fix install ruleHoward Mao1-0/+1
[...]