aboutsummaryrefslogtreecommitdiff
path: root/riscv
AgeCommit message (Expand)AuthorFilesLines
2023-12-11riscv: sim.cc: Parse for "sifive,clint0" if "riscv,clint0" is absentTan En De1-1/+1
2023-12-08Merge pull request #1522 from ucb-bar/device-plugin-apiJerry Zhao6-8/+15
2023-12-08Fix Spike --device option to pass on args to downstream pluginsjoey03206-8/+15
2023-12-07refactor: single statement of declaration and initialization on miselect, sis...YenHaoChen1-6/+3
2023-12-06miselect: support miselect when enabling smcsrindYenHaoChen1-0/+3
2023-12-01Add SBA write delay.Tim Newsome2-8/+28
2023-12-01Add SBA read delay.Tim Newsome2-31/+100
2023-11-29fix: dcsr.ebreak(v)[su] hardwired to 0 if unsupport corresponding privilege m...YenHaoChen1-4/+4
2023-11-28remote_bitbang: make send_buf class memberVolodymyr Fialko2-1/+1
2023-11-24stimecmp: perform menvcfg.STCE permission check when accessing vstimecmp in H...YenHaoChen2-2/+7
2023-11-16Fix FMVP.D.X implementationAndrew Waterman1-1/+1
2023-11-04expose pmp granularity as a cli option.Karthik B K5-4/+9
2023-11-02Add Zabha instructions to makeVed Shanbhogue1-0/+23
2023-11-02Add enum for Zabha extensionVed Shanbhogue1-0/+1
2023-11-02Add encodings for Zabha instructionsVed Shanbhogue1-1/+61
2023-11-02add halfword width amo instructionsVed Shanbhogue20-20/+31
2023-10-30add byte width amo instructionsVed Shanbhogue10-0/+31
2023-10-23Fixing minor typo Gallois -> GaloisNicolas Brunie1-1/+1
2023-10-19Update to Zalasr encodings to require the aq/rl bits be set rather than assum...brs1-17/+17
2023-10-18Spike support for the Zalasr extensionbrs11-110/+56
2023-10-18add zcmop extension instructionsVed Shanbhogue4-3/+168
2023-10-18Revert "tmp"Andrew Waterman1-1/+0
2023-10-18tmpAndrew Waterman1-0/+1
2023-10-16vamo: remove related loop macroChih-Min Chao1-54/+0
2023-10-16vamo: remove instruction implementationChih-Min Chao36-72/+0
2023-10-16vamo: remove from building listChih-Min Chao1-39/+0
2023-09-28debug: Abstract commands fail on unavailable harts.Tim Newsome1-0/+4
2023-09-28debug: Halted harts can also be unavailable.Tim Newsome1-5/+5
2023-09-13triggers: fix: not decrease icount.count on firing other icount with action=d...YenHaoChen1-2/+3
2023-09-13triggers: refactor: icount: breakdown detect_icount_match() into detect_icoun...YenHaoChen2-7/+17
2023-09-01fix condition of executing cbo.inval as a flush operationviktoryou1-3/+3
2023-08-25bf16: handle invalid Nan-boxed accessingChih-Min Chao1-1/+6
2023-08-14rename *envcfg.HADE to *envcfg.ADUEVed Shanbhogue4-14/+14
2023-07-26Merge pull request #1427 from YenHaoChen/pr-textra-sbytemaskAndrew Waterman1-1/+1
2023-07-26Add Smcntrpmf functionalityAtul Khare4-7/+86
2023-07-26Add prv_changed / v_changed fields to stateAtul Khare3-0/+8
2023-07-26Regenerate encoding.hAtul Khare1-17/+40
2023-07-26triggers: fix textra.sbytemaskYenHaoChen1-1/+1
2023-07-25Merge pull request #1383 from rivosinc/sscrind_featureAndrew Waterman5-1/+163
2023-07-25Merge pull request #1416 from YenHaoChen/pr-xenvcfg-cbieScott Johnson3-5/+25
2023-07-25legalize henvcfg.CBIEYenHaoChen2-2/+2
2023-07-25legalize senvcfg.CBIEYenHaoChen2-2/+2
2023-07-25legalize menvcfg.CBIEYenHaoChen3-1/+21
2023-07-20Merge pull request #1422 from mbgg/fix-prefix-warningAndrew Waterman1-1/+1
2023-07-20Merge pull request #1415 from michalt/memt-virtualJerry Zhao5-11/+20
2023-07-20Fix compilation warning in riscv/execute.ccMatthias Brugger1-1/+1
2023-07-20Introduce `abstract_mem_t` to allow custom implementationsMichal Terepeta5-11/+20
2023-07-19Add Smcsrind/Sscsrind supportAtul Khare3-0/+130
2023-07-19Rengenerate encoding.hAtul Khare1-1/+31
2023-07-19Add Smcsrind/Sscsrind extensionsAtul Khare1-0/+2
generated by cgit v1.1 at 2024-11-19 00:46:15 +0000