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BranchCommit messageAuthorAge
device_flagsAllow device flags after --device cmdline argJerry Zhao13 months
dts_parsingSupport parsing procs fully from DTSJerry Zhao6 months
dynamicbuild: Dynamically link installed progsJerry Zhao18 months
force-rttibuild: Include all symbols from extension.o when linking spike's mainJerry Zhao18 months
log-commits-fastertmpAndrew Waterman14 months
masterMerge pull request #1889 from ved-rivos/010925Andrew Waterman2 days
nolibfdtRemove in-tree libfdt, rely on system-installed libfdtJerry Zhao13 months
rivosinc-etrigger_fix_exception_matchCall stash_privilege more selectivelyAndrew Waterman20 months
speed2Split off opcode_cache_entry_tJerry Zhao2 months
whole-archivebuild: Link spike binaries with --whole-archiveJerry Zhao18 months
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TagDownloadAuthorAge
dummy-tag-for-ci-storageriscv-isa-sim-dummy-tag-for-ci-storage.zip  riscv-isa-sim-dummy-tag-for-ci-storage.tar.gz  riscv-isa-sim-dummy-tag-for-ci-storage.tar.bz2  Andrew Waterman2 years
v1.1.0riscv-isa-sim-1.1.0.zip  riscv-isa-sim-1.1.0.tar.gz  riscv-isa-sim-1.1.0.tar.bz2  Andrew Waterman3 years
v1.0.0riscv-isa-sim-1.0.0.zip  riscv-isa-sim-1.0.0.tar.gz  riscv-isa-sim-1.0.0.tar.bz2  Andrew Waterman6 years
 
AgeCommit messageAuthorFilesLines
2019-12-06fesvr: decrease DTM idle cyclessodorkritik bhimani1-1/+1
2019-12-06fesvr: add support for system bus accesskritik bhimani1-2/+42
2019-12-06fesvr: Add --enable-sodor configure optionAlbert Ou3-3/+26
2019-12-06Require VM enabled for SFENCE.VMA and S-mode for mstatus.SUM (#367)Udit Khanna2-1/+3
2019-11-27Initialize mtimeAndrew Waterman1-1/+1
2019-11-27Fix (benign) uninitialized variableAndrew Waterman1-1/+1
2019-11-24Initialize state.misa prior to calls to supports_extensionAndrew Waterman1-0/+2
2019-11-15add vaaddu/vasubu/vfncvt.rod.f.f.v to diassemblerAndrew Waterman1-2/+5
2019-11-15Re-encode vaadd/vasub; remove vaadd.vi; add vaaddu/vasubuAndrew Waterman2-44/+55
2019-11-13Merge pull request #356 from riscv/priv-flagAndrew Waterman13-31/+106
[...]