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author | kritik bhimani <bhimanikritik@gmail.com> | 2017-06-12 16:09:37 +0530 |
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committer | Albert Ou <aou@eecs.berkeley.edu> | 2019-12-06 14:05:26 -0800 |
commit | 90a04da3f9235e17ab456b9263080f2dc32e4f1e (patch) | |
tree | 0d042e96af958d804a7ec01b77954bacbca0813b | |
parent | c39aaf7b23e23ae9a2d44db5a143c7cd31a54139 (diff) | |
download | riscv-isa-sim-sodor.zip riscv-isa-sim-sodor.tar.gz riscv-isa-sim-sodor.tar.bz2 |
fesvr: decrease DTM idle cyclessodor
-rw-r--r-- | fesvr/dtm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fesvr/dtm.h b/fesvr/dtm.h index fbf161e..4cffdbf 100644 --- a/fesvr/dtm.h +++ b/fesvr/dtm.h @@ -95,7 +95,7 @@ class dtm_t : public htif_t uint32_t xlen; - static const int max_idle_cycles = 10000; + static const int max_idle_cycles = 10; size_t ram_words; size_t data_words; |