diff options
| author | Andrew Waterman <andrew@sifive.com> | 2026-04-29 10:58:27 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-04-29 10:58:27 -0700 |
| commit | b21cccdc5f4680d9c13a6bd7d9d00b75aea3cbb5 (patch) | |
| tree | 87c74cdee88663a7d7775799fc0006875a651b4b | |
| parent | 632777d37139298f0af1ee8d2a001f3ab0bde98c (diff) | |
| parent | f2aa295a31f6d0de376e807b2dfab5a62418c8dc (diff) | |
| download | riscv-isa-sim-master.tar.gz riscv-isa-sim-master.tar.bz2 riscv-isa-sim-master.zip | |
rvp for rv32/rv64
617 files changed, 7353 insertions, 18 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index de3e7d2a..bf8b4cda 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -121,6 +121,25 @@ struct : public arg_t { } } xrs3; +// RV32 P-extension register pair arguments (even register number) +struct : public arg_t { + std::string to_string(insn_t insn) const { + return xpr_name[insn.rd_p()]; + } +} xrd_p; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return xpr_name[insn.rs1_p()]; + } +} xrs1_p; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return xpr_name[insn.rs2_p()]; + } +} xrs2_p; + struct : public arg_t { std::string to_string(insn_t insn) const { return frm_name(insn.rm()); @@ -538,33 +557,51 @@ struct : public arg_t { struct : public arg_t { std::string to_string(insn_t insn) const { - return std::to_string((int)insn.p_imm2()); + return std::to_string((int)insn.p_imm8()); + } +} p_imm8; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return std::to_string((int)insn.p_imm10csl()); + } +} p_imm10csl; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return std::to_string((int)insn.p_imm10csr()); } -} p_imm2; +} p_imm10csr; struct : public arg_t { std::string to_string(insn_t insn) const { - return std::to_string((int)insn.p_imm3()); + return std::to_string((int)insn.p_imm10csrw()); } -} p_imm3; +} p_imm10csrw; struct : public arg_t { std::string to_string(insn_t insn) const { - return std::to_string((int)insn.p_imm4()); + return std::to_string((int)insn.shamtd()); } -} p_imm4; +} shamtd; struct : public arg_t { std::string to_string(insn_t insn) const { - return std::to_string((int)insn.p_imm5()); + return std::to_string((int)insn.shamtw()); } -} p_imm5; +} shamtw; struct : public arg_t { std::string to_string(insn_t insn) const { - return std::to_string((int)insn.p_imm6()); + return std::to_string((int)insn.shamth()); } -} p_imm6; +} shamth; + +struct : public arg_t { + std::string to_string(insn_t insn) const { + return std::to_string((int)insn.shamtb()); + } +} shamtb; struct : public arg_t { std::string to_string(insn_t insn) const { @@ -617,6 +654,44 @@ static void NOINLINE add_r3type_insn(disassembler_t* d, const char* name, uint32 d->add_insn(new disasm_insn_t(name, match, mask, {&xrd, &xrs1, &xrs2, &xrs3})); } +// RV32 P-extension register pair instruction types +// Type 1: rdp only (widening: result is pair, sources are normal regs) +static void NOINLINE add_rtype_rdp_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd_p, &xrs1, &xrs2})); +} + +// Type 1 variant: rdp + rs1 only (for unary widening ops) +static void NOINLINE add_r1type_rdp_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd_p, &xrs1})); +} + +// Type 1 variant: rdp + rs1 + imm (for widening immediate ops) +// Type 2: rs1p only (narrowing: source is pair, result is normal reg) +static void NOINLINE add_rtype_rs1p_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd, &xrs1_p, &xrs2})); +} + +// Type 3: rdp + rs1p (both pairs, with scalar rs2) +static void NOINLINE add_rtype_rdp_rs1p_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd_p, &xrs1_p, &xrs2})); +} + +// Type 3 variant: rdp + rs1p only (for unary doubleword ops) +static void NOINLINE add_r1type_rdp_rs1p_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd_p, &xrs1_p})); +} + +// Type 4: rdp + rs1p + rs2p (all three are register pairs) +static void NOINLINE add_rtype_pair_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd_p, &xrs1_p, &xrs2_p})); +} + static void NOINLINE add_itype_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) { d->add_insn(new disasm_insn_t(name, match, mask, {&xrd, &xrs1, &imm})); @@ -859,6 +934,19 @@ void disassembler_t::add_instructions(const isa_parser_t* isa, bool strict) #define DEFINE_R3TYPE(code) add_r3type_insn(this, #code, match_##code, mask_##code); #define DEFINE_ITYPE(code) add_itype_insn(this, #code, match_##code, mask_##code); #define DEFINE_ITYPE_SHIFT(code) add_itype_shift_insn(this, #code, match_##code, mask_##code); + // RV32 P-extension register pair macros + #define DEFINE_RTYPE_RDP(code) add_rtype_rdp_insn(this, #code, match_##code, mask_##code); + #define DEFINE_R1TYPE_RDP(code) add_r1type_rdp_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_RDP(code) add_itype_rdp_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_SHIFT_RDP(code) add_itype_shift_rdp_insn(this, #code, match_##code, mask_##code); + #define DEFINE_RTYPE_RS1P(code) add_rtype_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_RS1P(code) add_itype_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_SHIFT_RS1P(code) add_itype_shift_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_RTYPE_RDP_RS1P(code) add_rtype_rdp_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_R1TYPE_RDP_RS1P(code) add_r1type_rdp_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_RDP_RS1P(code) add_itype_rdp_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_ITYPE_SHIFT_RDP_RS1P(code) add_itype_shift_rdp_rs1p_insn(this, #code, match_##code, mask_##code); + #define DEFINE_RTYPE_PAIR(code) add_rtype_pair_insn(this, #code, match_##code, mask_##code); #define DEFINE_I0TYPE(name, code) DISASM_INSN(name, code, mask_rs1, {&xrd, &imm}) #define DEFINE_I1TYPE(name, code) DISASM_INSN(name, code, mask_imm, {&xrd, &xrs1}) #define DEFINE_I2TYPE(name, code) DISASM_INSN(name, code, mask_rd | mask_imm, {&xrs1}) @@ -2304,6 +2392,689 @@ void disassembler_t::add_instructions(const isa_parser_t* isa, bool strict) DISASM_INSN("c.sspopchk", c_sspopchk_x5, 0, {&rvc_t0}); } } + + // P-extension (Packed SIMD) instructions + if (ext_enabled('P')) { + // R-type instructions (rd, rs1, rs2) - RV32 only (share opcode with RV64 packed-word) + if (xlen_eq(32)) { + DEFINE_RTYPE(aadd); + DEFINE_RTYPE(aaddu); + DEFINE_RTYPE(asub); + DEFINE_RTYPE(asubu); + DEFINE_RTYPE(mseq); + DEFINE_RTYPE(mslt); + DEFINE_RTYPE(msltu); + } + // RV32/RV64 common instructions + DEFINE_RTYPE_PAIR(addd); + DEFINE_RTYPE_PAIR(subd); + DEFINE_RTYPE(merge); + DEFINE_RTYPE(mvm); + DEFINE_RTYPE(mvmn); + // Type 2: rs1p - Narrowing instructions (rd normal, rs1p is pair, rs2 normal/scalar) + DEFINE_RTYPE_RS1P(nclip); + DEFINE_RTYPE_RS1P(nclipr); + DEFINE_RTYPE_RS1P(nclipu); + DEFINE_RTYPE_RS1P(nclipru); + DEFINE_RTYPE_RS1P(nsra); + DEFINE_RTYPE_RS1P(nsrar); + DEFINE_RTYPE_RS1P(nsrl); + // RV32-only instructions (share opcode with RV64 packed-word) + if (xlen_eq(32)) { + DEFINE_RTYPE(sadd); + DEFINE_RTYPE(saddu); + DEFINE_RTYPE(ssub); + DEFINE_RTYPE(ssubu); + DEFINE_RTYPE(ssh1sadd); + DEFINE_RTYPE(ssha); + DEFINE_RTYPE(sshar); + DEFINE_RTYPE(sshl); + DEFINE_RTYPE(sshlr); + } + DEFINE_RTYPE_PAIR(sha); + DEFINE_RTYPE_PAIR(shar); + DEFINE_RTYPE(slx); + DEFINE_RTYPE(srx); + // Type 1: rdp - Widening instructions (rdp is pair, rs1/rs2 normal) + DEFINE_RTYPE_RDP(wadd); + DEFINE_RTYPE_RDP(wadda); + DEFINE_RTYPE_RDP(waddu); + DEFINE_RTYPE_RDP(waddau); + DEFINE_RTYPE_RDP(wsub); + DEFINE_RTYPE_RDP(wsuba); + DEFINE_RTYPE_RDP(wsubu); + DEFINE_RTYPE_RDP(wsubau); + DEFINE_RTYPE_RDP(wsll); + DEFINE_RTYPE_RDP(wsla); + DEFINE_RTYPE_RDP(wmul); + DEFINE_RTYPE_RDP(wmulu); + DEFINE_RTYPE_RDP(wmulsu); + DEFINE_RTYPE_RDP(wmacc); + DEFINE_RTYPE_RDP(wmaccu); + DEFINE_RTYPE_RDP(wmaccsu); + + // R-type mac/mul instructions with element selection (RV32 only - share opcode with RV64 packed-word) + if (xlen_eq(32)) { + DEFINE_RTYPE(macc_h00); + DEFINE_RTYPE(macc_h01); + DEFINE_RTYPE(macc_h11); + DEFINE_RTYPE(maccu_h00); + DEFINE_RTYPE(maccu_h01); + DEFINE_RTYPE(maccu_h11); + DEFINE_RTYPE(maccsu_h00); + DEFINE_RTYPE(maccsu_h11); + DEFINE_RTYPE(mul_h00); + DEFINE_RTYPE(mul_h01); + DEFINE_RTYPE(mul_h11); + DEFINE_RTYPE(mulu_h00); + DEFINE_RTYPE(mulu_h01); + DEFINE_RTYPE(mulu_h11); + DEFINE_RTYPE(mulsu_h00); + DEFINE_RTYPE(mulsu_h11); + DEFINE_RTYPE(mulh_h0); + DEFINE_RTYPE(mulh_h1); + DEFINE_RTYPE(mulhsu_h0); + DEFINE_RTYPE(mulhsu_h1); + DEFINE_RTYPE(mulhr); + DEFINE_RTYPE(mulhru); + DEFINE_RTYPE(mulhrsu); + DEFINE_RTYPE(mulq); + DEFINE_RTYPE(mulqr); + DEFINE_RTYPE(mhacc); + DEFINE_RTYPE(mhaccu); + DEFINE_RTYPE(mhaccsu); + DEFINE_RTYPE(mhacc_h0); + DEFINE_RTYPE(mhacc_h1); + DEFINE_RTYPE(mhaccsu_h0); + DEFINE_RTYPE(mhaccsu_h1); + DEFINE_RTYPE(mhracc); + DEFINE_RTYPE(mhraccu); + DEFINE_RTYPE(mhraccsu); + } + DEFINE_RTYPE(mqacc_h00); + DEFINE_RTYPE(mqacc_h01); + DEFINE_RTYPE(mqacc_h11); + DEFINE_RTYPE(mqracc_h00); + DEFINE_RTYPE(mqracc_h01); + DEFINE_RTYPE(mqracc_h11); + + // R1-type instructions (rd, rs1) - unary ops + DEFINE_R1TYPE(abs); + DEFINE_R1TYPE(cls); + + // I-type shift instructions (rd, rs1, shamt) + DISASM_INSN("nclipi", nclipi, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nclipiu", nclipiu, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nclipri", nclipri, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nclipriu", nclipriu, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nsrai", nsrai, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nsrari", nsrari, 0, {&xrd, &xrs1, &shamtd}); + DISASM_INSN("nsrli", nsrli, 0, {&xrd, &xrs1, &shamtd}); + // sslai shares opcode with psslai_w on RV64 + if (xlen_eq(32)) { + DISASM_INSN("sslai", sslai, 0, {&xrd, &xrs1, &shamt}); + } + DISASM_INSN("wslli", wslli, 0, {&xrd, &xrs1, &shamt}); + DISASM_INSN("wslai", wslai, 0, {&xrd, &xrs1, &shamt}); + if (xlen_eq(64)) { + DISASM_INSN("sati", sati, 0, {&xrd, &xrs1, &shamt}); + DISASM_INSN("usati", usati, 0, {&xrd, &xrs1, &shamt}); + DISASM_INSN("srari", srari, 0, {&xrd, &xrs1, &shamt}); + } else { + DISASM_INSN("sati", sati_rv32, 0, {&xrd, &xrs1, &shamt}); + DISASM_INSN("usati", usati_rv32, 0, {&xrd, &xrs1, &shamt}); + DISASM_INSN("srari", srari_rv32, 0, {&xrd, &xrs1, &shamt}); + } + + // Packed R-type instructions (rd, rs1, rs2) - RV32/RV64 common + DEFINE_RTYPE(paadd_b); + DEFINE_RTYPE(paadd_h); + // Type 4: rdp + rs1p + rs2p - Doubleword pair-to-pair ops + DEFINE_RTYPE_PAIR(paadd_db); + DEFINE_RTYPE_PAIR(paadd_dh); + DEFINE_RTYPE_PAIR(paadd_dw); + DEFINE_RTYPE(paaddu_b); + DEFINE_RTYPE(paaddu_h); + DEFINE_RTYPE_PAIR(paaddu_db); + DEFINE_RTYPE_PAIR(paaddu_dh); + DEFINE_RTYPE_PAIR(paaddu_dw); + DEFINE_RTYPE(paas_hx); + DEFINE_RTYPE_PAIR(paas_dhx); + DEFINE_RTYPE(pabd_b); + DEFINE_RTYPE(pabd_h); + DEFINE_RTYPE_PAIR(pabd_db); + DEFINE_RTYPE_PAIR(pabd_dh); + DEFINE_RTYPE(pabdu_b); + DEFINE_RTYPE(pabdu_h); + DEFINE_RTYPE_PAIR(pabdu_db); + DEFINE_RTYPE_PAIR(pabdu_dh); + DEFINE_RTYPE(pabdsumu_b); + DEFINE_RTYPE(pabdsumau_b); + DEFINE_RTYPE(padd_b); + DEFINE_RTYPE(padd_h); + DEFINE_RTYPE(padd_bs); + DEFINE_RTYPE(padd_hs); + DEFINE_RTYPE_PAIR(padd_db); + DEFINE_RTYPE_PAIR(padd_dh); + DEFINE_RTYPE_PAIR(padd_dw); + // Type 3: rdp + rs1p - Doubleword with scalar rs2 + DEFINE_RTYPE_RDP_RS1P(padd_dbs); + DEFINE_RTYPE_RDP_RS1P(padd_dhs); + DEFINE_RTYPE_RDP_RS1P(padd_dws); + DEFINE_RTYPE(pasub_b); + DEFINE_RTYPE(pasub_h); + DEFINE_RTYPE_PAIR(pasub_db); + DEFINE_RTYPE_PAIR(pasub_dh); + DEFINE_RTYPE_PAIR(pasub_dw); + DEFINE_RTYPE(pasubu_b); + DEFINE_RTYPE(pasubu_h); + DEFINE_RTYPE_PAIR(pasubu_db); + DEFINE_RTYPE_PAIR(pasubu_dh); + DEFINE_RTYPE_PAIR(pasubu_dw); + DEFINE_RTYPE(pasa_hx); + DEFINE_RTYPE_PAIR(pasa_dhx); + DEFINE_RTYPE(pas_hx); + DEFINE_RTYPE_PAIR(pas_dhx); + DEFINE_RTYPE(psadd_b); + DEFINE_RTYPE(psadd_h); + DEFINE_RTYPE_PAIR(psadd_db); + DEFINE_RTYPE_PAIR(psadd_dh); + DEFINE_RTYPE_PAIR(psadd_dw); + DEFINE_RTYPE(psaddu_b); + DEFINE_RTYPE(psaddu_h); + DEFINE_RTYPE_PAIR(psaddu_db); + DEFINE_RTYPE_PAIR(psaddu_dh); + DEFINE_RTYPE_PAIR(psaddu_dw); + DEFINE_RTYPE(psub_b); + DEFINE_RTYPE(psub_h); + DEFINE_RTYPE_PAIR(psub_db); + DEFINE_RTYPE_PAIR(psub_dh); + DEFINE_RTYPE_PAIR(psub_dw); + DEFINE_RTYPE(pssub_b); + DEFINE_RTYPE(pssub_h); + DEFINE_RTYPE_PAIR(pssub_db); + DEFINE_RTYPE_PAIR(pssub_dh); + DEFINE_RTYPE_PAIR(pssub_dw); + DEFINE_RTYPE(pssubu_b); + DEFINE_RTYPE(pssubu_h); + DEFINE_RTYPE_PAIR(pssubu_db); + DEFINE_RTYPE_PAIR(pssubu_dh); + DEFINE_RTYPE_PAIR(pssubu_dw); + DEFINE_RTYPE(psa_hx); + DEFINE_RTYPE_PAIR(psa_dhx); + DEFINE_RTYPE(psas_hx); + DEFINE_RTYPE_PAIR(psas_dhx); + DEFINE_RTYPE(pssa_hx); + DEFINE_RTYPE_PAIR(pssa_dhx); + DEFINE_RTYPE(pmax_b); + DEFINE_RTYPE(pmax_h); + DEFINE_RTYPE_PAIR(pmax_db); + DEFINE_RTYPE_PAIR(pmax_dh); + DEFINE_RTYPE_PAIR(pmax_dw); + DEFINE_RTYPE(pmaxu_b); + DEFINE_RTYPE(pmaxu_h); + DEFINE_RTYPE_PAIR(pmaxu_db); + DEFINE_RTYPE_PAIR(pmaxu_dh); + DEFINE_RTYPE_PAIR(pmaxu_dw); + DEFINE_RTYPE(pmin_b); + DEFINE_RTYPE(pmin_h); + DEFINE_RTYPE_PAIR(pmin_db); + DEFINE_RTYPE_PAIR(pmin_dh); + DEFINE_RTYPE_PAIR(pmin_dw); + DEFINE_RTYPE(pminu_b); + DEFINE_RTYPE(pminu_h); + DEFINE_RTYPE_PAIR(pminu_db); + DEFINE_RTYPE_PAIR(pminu_dh); + DEFINE_RTYPE_PAIR(pminu_dw); + DEFINE_RTYPE(pmseq_b); + DEFINE_RTYPE(pmseq_h); + DEFINE_RTYPE_PAIR(pmseq_db); + DEFINE_RTYPE_PAIR(pmseq_dh); + DEFINE_RTYPE_PAIR(pmseq_dw); + DEFINE_RTYPE(pmslt_b); + DEFINE_RTYPE(pmslt_h); + DEFINE_RTYPE_PAIR(pmslt_db); + DEFINE_RTYPE_PAIR(pmslt_dh); + DEFINE_RTYPE_PAIR(pmslt_dw); + DEFINE_RTYPE(pmsltu_b); + DEFINE_RTYPE(pmsltu_h); + DEFINE_RTYPE_PAIR(pmsltu_db); + DEFINE_RTYPE_PAIR(pmsltu_dh); + DEFINE_RTYPE_PAIR(pmsltu_dw); + DEFINE_RTYPE(psll_bs); + DEFINE_RTYPE(psll_hs); + // Type 3: rdp + rs1p - Doubleword shift with scalar rs2 + DEFINE_RTYPE_RDP_RS1P(psll_dbs); + DEFINE_RTYPE_RDP_RS1P(psll_dhs); + DEFINE_RTYPE_RDP_RS1P(psll_dws); + DEFINE_RTYPE(psra_bs); + DEFINE_RTYPE(psra_hs); + DEFINE_RTYPE_RDP_RS1P(psra_dbs); + DEFINE_RTYPE_RDP_RS1P(psra_dhs); + DEFINE_RTYPE_RDP_RS1P(psra_dws); + DEFINE_RTYPE(psrl_bs); + DEFINE_RTYPE(psrl_hs); + DEFINE_RTYPE_RDP_RS1P(psrl_dbs); + DEFINE_RTYPE_RDP_RS1P(psrl_dhs); + DEFINE_RTYPE_RDP_RS1P(psrl_dws); + DEFINE_RTYPE(pssha_hs); + DEFINE_RTYPE_RDP_RS1P(pssha_dhs); + DEFINE_RTYPE_RDP_RS1P(pssha_dws); + DEFINE_RTYPE(psshar_hs); + DEFINE_RTYPE_RDP_RS1P(psshar_dhs); + DEFINE_RTYPE_RDP_RS1P(psshar_dws); + DEFINE_RTYPE(psshl_hs); + DEFINE_RTYPE_RDP_RS1P(psshl_dhs); + DEFINE_RTYPE_RDP_RS1P(psshl_dws); + DEFINE_RTYPE(psshlr_hs); + DEFINE_RTYPE_RDP_RS1P(psshlr_dhs); + DEFINE_RTYPE_RDP_RS1P(psshlr_dws); + DEFINE_RTYPE(psh1add_h); + DEFINE_RTYPE_PAIR(psh1add_dh); + DEFINE_RTYPE_PAIR(psh1add_dw); + DEFINE_RTYPE(pssh1sadd_h); + DEFINE_RTYPE_PAIR(pssh1sadd_dh); + DEFINE_RTYPE_PAIR(pssh1sadd_dw); + // Type 2: rs1p - Narrowing with scalar rs2 + DEFINE_RTYPE_RS1P(pnclip_bs); + DEFINE_RTYPE_RS1P(pnclip_hs); + DEFINE_RTYPE_RS1P(pnclipr_bs); + DEFINE_RTYPE_RS1P(pnclipr_hs); + DEFINE_RTYPE_RS1P(pnclipu_bs); + DEFINE_RTYPE_RS1P(pnclipu_hs); + DEFINE_RTYPE_RS1P(pnclipru_bs); + DEFINE_RTYPE_RS1P(pnclipru_hs); + DEFINE_RTYPE_RS1P(pnsra_bs); + DEFINE_RTYPE_RS1P(pnsra_hs); + DEFINE_RTYPE_RS1P(pnsrar_bs); + DEFINE_RTYPE_RS1P(pnsrar_hs); + DEFINE_RTYPE_RS1P(pnsrl_bs); + DEFINE_RTYPE_RS1P(pnsrl_hs); + // Type 1: rdp - Widening with scalar rs2 + DEFINE_RTYPE_RDP(pwsll_bs); + DEFINE_RTYPE_RDP(pwsll_hs); + DEFINE_RTYPE_RDP(pwsla_bs); + DEFINE_RTYPE_RDP(pwsla_hs); + DEFINE_RTYPE(ppaire_b); + DEFINE_RTYPE(ppaire_h); + DEFINE_RTYPE_PAIR(ppaire_db); + DEFINE_RTYPE_PAIR(ppaire_dh); + DEFINE_RTYPE(ppaireo_b); + DEFINE_RTYPE(ppaireo_h); + DEFINE_RTYPE_PAIR(ppaireo_db); + DEFINE_RTYPE_PAIR(ppaireo_dh); + DEFINE_RTYPE(ppairo_b); + DEFINE_RTYPE(ppairo_h); + DEFINE_RTYPE_PAIR(ppairo_db); + DEFINE_RTYPE_PAIR(ppairo_dh); + DEFINE_RTYPE(ppairoe_b); + DEFINE_RTYPE(ppairoe_h); + DEFINE_RTYPE_PAIR(ppairoe_db); + DEFINE_RTYPE_PAIR(ppairoe_dh); + DEFINE_RTYPE(predsum_bs); + DEFINE_RTYPE(predsum_hs); + // Type 2: rs1p - Reduction sum (rd normal, rs1p is pair) + DEFINE_RTYPE_RS1P(predsum_dbs); + DEFINE_RTYPE_RS1P(predsum_dhs); + DEFINE_RTYPE(predsumu_bs); + DEFINE_RTYPE(predsumu_hs); + DEFINE_RTYPE_RS1P(predsumu_dbs); + DEFINE_RTYPE_RS1P(predsumu_dhs); + + // Packed R1-type instructions (rd, rs1) - unary + DEFINE_R1TYPE(psabs_b); + DEFINE_R1TYPE(psabs_h); + // Type 3: rdp + rs1p - Doubleword unary ops + DEFINE_R1TYPE_RDP_RS1P(psabs_db); + DEFINE_R1TYPE_RDP_RS1P(psabs_dh); + DEFINE_R1TYPE(psext_h_b); + DEFINE_R1TYPE_RDP_RS1P(psext_dh_b); + DEFINE_R1TYPE_RDP_RS1P(psext_dw_b); + DEFINE_R1TYPE_RDP_RS1P(psext_dw_h); + + // Packed I-type with shamt + DISASM_INSN("pslli.b", pslli_b, 0, {&xrd, &xrs1, &shamtb}); + DISASM_INSN("pslli.h", pslli_h, 0, {&xrd, &xrs1, &shamth}); + // Type 3: rdp + rs1p - Doubleword immediate shift + DISASM_INSN("pslli.db", pslli_db, 0, {&xrd_p, &xrs1_p, &shamtb}); + DISASM_INSN("pslli.dh", pslli_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("pslli.dw", pslli_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("psrai.b", psrai_b, 0, {&xrd, &xrs1, &shamtb}); + DISASM_INSN("psrai.h", psrai_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("psrai.db", psrai_db, 0, {&xrd_p, &xrs1_p, &shamtb}); + DISASM_INSN("psrai.dh", psrai_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("psrai.dw", psrai_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("psrli.b", psrli_b, 0, {&xrd, &xrs1, &shamtb}); + DISASM_INSN("psrli.h", psrli_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("psrli.db", psrli_db, 0, {&xrd_p, &xrs1_p, &shamtb}); + DISASM_INSN("psrli.dh", psrli_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("psrli.dw", psrli_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("psrari.h", psrari_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("psrari.dh", psrari_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("psrari.dw", psrari_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("psati.h", psati_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("psati.dh", psati_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("psati.dw", psati_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("pusati.h", pusati_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("pusati.dh", pusati_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("pusati.dw", pusati_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + DISASM_INSN("psslai.h", psslai_h, 0, {&xrd, &xrs1, &shamth}); + DISASM_INSN("psslai.dh", psslai_dh, 0, {&xrd_p, &xrs1_p, &shamth}); + DISASM_INSN("psslai.dw", psslai_dw, 0, {&xrd_p, &xrs1_p, &shamtw}); + // Type 2: rs1p - Narrowing immediate (rd normal, rs1p is pair) + DISASM_INSN("pnclipi.b", pnclipi_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnclipi.h", pnclipi_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnclipiu.b", pnclipiu_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnclipiu.h", pnclipiu_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnclipri.b", pnclipri_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnclipri.h", pnclipri_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnclipriu.b", pnclipriu_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnclipriu.h", pnclipriu_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnsrai.b", pnsrai_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnsrai.h", pnsrai_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnsrari.b", pnsrari_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnsrari.h", pnsrari_h, 0, {&xrd, &xrs1_p, &shamtw}); + DISASM_INSN("pnsrli.b", pnsrli_b, 0, {&xrd, &xrs1_p, &shamth}); + DISASM_INSN("pnsrli.h", pnsrli_h, 0, {&xrd, &xrs1_p, &shamtw}); + // Type 1: rdp - Widening immediate (rdp is pair, rs1 normal) + DISASM_INSN("pwslli.b", pwslli_b, 0, {&xrd_p, &xrs1, &shamtb}); + DISASM_INSN("pwslli.h", pwslli_h, 0, {&xrd_p, &xrs1, &shamth}); + DISASM_INSN("pwslai.b", pwslai_b, 0, {&xrd_p, &xrs1, &shamtb}); + DISASM_INSN("pwslai.h", pwslai_h, 0, {&xrd_p, &xrs1, &shamth}); + + // Packed load-immediate instructions (rd, imm) - Type 1: rdp for _db, _dh + DISASM_INSN("pli.b", pli_b, 0, {&xrd, &p_imm8}); + DISASM_INSN("pli.h", pli_h, 0, {&xrd, &p_imm10csl}); + DISASM_INSN("pli.db", pli_db, 0, {&xrd_p, &p_imm8}); + DISASM_INSN("pli.dh", pli_dh, 0, {&xrd_p, &p_imm10csl}); + DISASM_INSN("plui.h", plui_h, 0, {&xrd, &p_imm10csr}); + DISASM_INSN("plui.dh", plui_dh, 0, {&xrd_p, &p_imm10csr}); + + // Packed multiply/mac instructions + DEFINE_RTYPE(pmul_h_b00); + DEFINE_RTYPE(pmul_h_b01); + DEFINE_RTYPE(pmul_h_b11); + DEFINE_RTYPE(pmulu_h_b00); + DEFINE_RTYPE(pmulu_h_b01); + DEFINE_RTYPE(pmulu_h_b11); + DEFINE_RTYPE(pmulsu_h_b00); + DEFINE_RTYPE(pmulsu_h_b11); + DEFINE_RTYPE(pmulh_h); + DEFINE_RTYPE(pmulhu_h); + DEFINE_RTYPE(pmulhsu_h); + DEFINE_RTYPE(pmulh_h_b0); + DEFINE_RTYPE(pmulh_h_b1); + DEFINE_RTYPE(pmulhsu_h_b0); + DEFINE_RTYPE(pmulhsu_h_b1); + DEFINE_RTYPE(pmulhr_h); + DEFINE_RTYPE(pmulhru_h); + DEFINE_RTYPE(pmulhrsu_h); + DEFINE_RTYPE(pmulq_h); + DEFINE_RTYPE(pmulqr_h); + DEFINE_RTYPE(pmhacc_h); + DEFINE_RTYPE(pmhaccu_h); + DEFINE_RTYPE(pmhaccsu_h); + DEFINE_RTYPE(pmhacc_h_b0); + DEFINE_RTYPE(pmhacc_h_b1); + DEFINE_RTYPE(pmhaccsu_h_b0); + DEFINE_RTYPE(pmhaccsu_h_b1); + DEFINE_RTYPE(pmhracc_h); + DEFINE_RTYPE(pmhraccu_h); + DEFINE_RTYPE(pmhraccsu_h); + DEFINE_RTYPE(pmq2add_h); + DEFINE_RTYPE(pmq2adda_h); + DEFINE_RTYPE(pmqr2add_h); + DEFINE_RTYPE(pmqr2adda_h); + + // Packed widening instructions - Type 1: rdp (pair result, normal sources) + DEFINE_RTYPE_RDP(pwadd_b); + DEFINE_RTYPE_RDP(pwadd_h); + DEFINE_RTYPE_RDP(pwaddu_b); + DEFINE_RTYPE_RDP(pwaddu_h); + DEFINE_RTYPE_RDP(pwadda_b); + DEFINE_RTYPE_RDP(pwadda_h); + DEFINE_RTYPE_RDP(pwaddau_b); + DEFINE_RTYPE_RDP(pwaddau_h); + DEFINE_RTYPE_RDP(pwsub_b); + DEFINE_RTYPE_RDP(pwsub_h); + DEFINE_RTYPE_RDP(pwsubu_b); + DEFINE_RTYPE_RDP(pwsubu_h); + DEFINE_RTYPE_RDP(pwsuba_b); + DEFINE_RTYPE_RDP(pwsuba_h); + DEFINE_RTYPE_RDP(pwsubau_b); + DEFINE_RTYPE_RDP(pwsubau_h); + DEFINE_RTYPE_RDP(pwmul_b); + DEFINE_RTYPE_RDP(pwmul_h); + DEFINE_RTYPE_RDP(pwmulu_b); + DEFINE_RTYPE_RDP(pwmulu_h); + DEFINE_RTYPE_RDP(pwmulsu_b); + DEFINE_RTYPE_RDP(pwmulsu_h); + DEFINE_RTYPE_RDP(pwmacc_h); + DEFINE_RTYPE_RDP(pwmaccu_h); + DEFINE_RTYPE_RDP(pwmaccsu_h); + + // Packed multi-add instructions + DEFINE_RTYPE(pm2add_h); + DEFINE_RTYPE(pm2add_hx); + DEFINE_RTYPE(pm2addu_h); + DEFINE_RTYPE(pm2addsu_h); + DEFINE_RTYPE(pm2adda_h); + DEFINE_RTYPE(pm2adda_hx); + DEFINE_RTYPE(pm2addau_h); + DEFINE_RTYPE(pm2addasu_h); + DEFINE_RTYPE(pm2sub_h); + DEFINE_RTYPE(pm2sub_hx); + DEFINE_RTYPE(pm2suba_h); + DEFINE_RTYPE(pm2suba_hx); + DEFINE_RTYPE(pm2sadd_h); + DEFINE_RTYPE(pm2sadd_hx); + // pm2wadd produces widened result - Type 1: rdp + DEFINE_RTYPE_RDP(pm2wadd_h); + DEFINE_RTYPE_RDP(pm2wadd_hx); + DEFINE_RTYPE_RDP(pm2waddu_h); + DEFINE_RTYPE_RDP(pm2waddsu_h); + DEFINE_RTYPE_RDP(pm2wadda_h); + DEFINE_RTYPE_RDP(pm2wadda_hx); + DEFINE_RTYPE_RDP(pm2waddau_h); + DEFINE_RTYPE_RDP(pm2waddasu_h); + DEFINE_RTYPE_RDP(pm2wsub_h); + DEFINE_RTYPE_RDP(pm2wsub_hx); + DEFINE_RTYPE_RDP(pm2wsuba_h); + DEFINE_RTYPE_RDP(pm2wsuba_hx); + DEFINE_RTYPE(pm4add_b); + DEFINE_RTYPE(pm4addu_b); + DEFINE_RTYPE(pm4addsu_b); + DEFINE_RTYPE(pm4adda_b); + DEFINE_RTYPE(pm4addau_b); + DEFINE_RTYPE(pm4addasu_b); + + // Zip/Unzip instructions + DEFINE_R1TYPE(zip8p); + DEFINE_R1TYPE(zip8hp); + DEFINE_R1TYPE(unzip8p); + DEFINE_R1TYPE(unzip8hp); + DEFINE_R1TYPE(unzip16p); + DEFINE_R1TYPE(unzip16hp); + // Type 1: rdp - Widening zip (pair result) + DEFINE_R1TYPE_RDP(wzip8p); + DEFINE_R1TYPE_RDP(wzip16p); + + // mqwacc instructions - Type 1: rdp (widened 64-bit result) + DEFINE_RTYPE_RDP(mqwacc); + DEFINE_RTYPE_RDP(mqrwacc); + DEFINE_RTYPE_RDP(pmqwacc_h); + DEFINE_RTYPE_RDP(pmqrwacc_h); + + // RV64 P-extension instructions (word-sized operations) + // These share opcodes with RV32 scalar instructions + if (xlen_eq(64)) { + // R1-type unary instructions + DEFINE_R1TYPE(absw); + DEFINE_R1TYPE(clsw); + + // R-type scalar MAC/MUL instructions (word-sized) + DEFINE_RTYPE(macc_w00); + DEFINE_RTYPE(macc_w01); + DEFINE_RTYPE(macc_w11); + DEFINE_RTYPE(maccu_w00); + DEFINE_RTYPE(maccu_w01); + DEFINE_RTYPE(maccu_w11); + DEFINE_RTYPE(maccsu_w00); + DEFINE_RTYPE(maccsu_w11); + DEFINE_RTYPE(mul_w00); + DEFINE_RTYPE(mul_w01); + DEFINE_RTYPE(mul_w11); + DEFINE_RTYPE(mulu_w00); + DEFINE_RTYPE(mulu_w01); + DEFINE_RTYPE(mulu_w11); + DEFINE_RTYPE(mulsu_w00); + DEFINE_RTYPE(mulsu_w11); + DEFINE_RTYPE(mqacc_w00); + DEFINE_RTYPE(mqacc_w01); + DEFINE_RTYPE(mqacc_w11); + DEFINE_RTYPE(mqracc_w00); + DEFINE_RTYPE(mqracc_w01); + DEFINE_RTYPE(mqracc_w11); + + // R-type packed word-sized instructions (share opcode with RV32 scalar) + DEFINE_RTYPE(paadd_w); + DEFINE_RTYPE(paaddu_w); + DEFINE_RTYPE(paas_wx); + DEFINE_RTYPE(padd_w); + DEFINE_RTYPE(padd_ws); + DEFINE_RTYPE(pasa_wx); + DEFINE_RTYPE(pasub_w); + DEFINE_RTYPE(pasubu_w); + DEFINE_RTYPE(pas_wx); + DEFINE_RTYPE(pmax_w); + DEFINE_RTYPE(pmaxu_w); + DEFINE_RTYPE(pmin_w); + DEFINE_RTYPE(pminu_w); + DEFINE_RTYPE(pmseq_w); + DEFINE_RTYPE(pmslt_w); + DEFINE_RTYPE(pmsltu_w); + DEFINE_RTYPE(psadd_w); + DEFINE_RTYPE(psaddu_w); + DEFINE_RTYPE(psa_wx); + DEFINE_RTYPE(psas_wx); + DEFINE_RTYPE(pssa_wx); + DEFINE_RTYPE(pssub_w); + DEFINE_RTYPE(pssubu_w); + DEFINE_RTYPE(psub_w); + DEFINE_RTYPE(psh1add_w); + DEFINE_RTYPE(pssh1sadd_w); + DEFINE_RTYPE(psll_ws); + DEFINE_RTYPE(psra_ws); + DEFINE_RTYPE(psrl_ws); + DEFINE_RTYPE(pssha_ws); + DEFINE_RTYPE(psshar_ws); + DEFINE_RTYPE(psshl_ws); + DEFINE_RTYPE(psshlr_ws); + DEFINE_RTYPE(shl); + DEFINE_RTYPE(shlr); + DEFINE_RTYPE(pnclipp_b); + DEFINE_RTYPE(pnclipp_h); + DEFINE_RTYPE(pnclipp_w); + DEFINE_RTYPE(pnclipup_b); + DEFINE_RTYPE(pnclipup_h); + DEFINE_RTYPE(pnclipup_w); + DEFINE_RTYPE(ppaireo_w); + DEFINE_RTYPE(ppairoe_w); + DEFINE_RTYPE(ppairo_w); + DEFINE_RTYPE(predsum_ws); + DEFINE_RTYPE(predsumu_ws); + + // Packed multiply/mac word-sized instructions (share opcode with RV32 scalar) + DEFINE_RTYPE(pmul_w_h00); + DEFINE_RTYPE(pmul_w_h01); + DEFINE_RTYPE(pmul_w_h11); + DEFINE_RTYPE(pmulu_w_h00); + DEFINE_RTYPE(pmulu_w_h01); + DEFINE_RTYPE(pmulu_w_h11); + DEFINE_RTYPE(pmulsu_w_h00); + DEFINE_RTYPE(pmulsu_w_h11); + DEFINE_RTYPE(pmulh_w); + DEFINE_RTYPE(pmulhu_w); + DEFINE_RTYPE(pmulhsu_w); + DEFINE_RTYPE(pmulh_w_h0); + DEFINE_RTYPE(pmulh_w_h1); + DEFINE_RTYPE(pmulhsu_w_h0); + DEFINE_RTYPE(pmulhsu_w_h1); + DEFINE_RTYPE(pmulhr_w); + DEFINE_RTYPE(pmulhru_w); + DEFINE_RTYPE(pmulhrsu_w); + DEFINE_RTYPE(pmulq_w); + DEFINE_RTYPE(pmulqr_w); + DEFINE_RTYPE(pmacc_w_h00); + DEFINE_RTYPE(pmacc_w_h01); + DEFINE_RTYPE(pmacc_w_h11); + DEFINE_RTYPE(pmaccu_w_h00); + DEFINE_RTYPE(pmaccu_w_h01); + DEFINE_RTYPE(pmaccu_w_h11); + DEFINE_RTYPE(pmaccsu_w_h00); + DEFINE_RTYPE(pmaccsu_w_h11); + DEFINE_RTYPE(pmhacc_w); + DEFINE_RTYPE(pmhaccu_w); + DEFINE_RTYPE(pmhaccsu_w); + DEFINE_RTYPE(pmhacc_w_h0); + DEFINE_RTYPE(pmhacc_w_h1); + DEFINE_RTYPE(pmhaccsu_w_h0); + DEFINE_RTYPE(pmhaccsu_w_h1); + DEFINE_RTYPE(pmhracc_w); + DEFINE_RTYPE(pmhraccu_w); + DEFINE_RTYPE(pmhraccsu_w); + DEFINE_RTYPE(pmqacc_w_h00); + DEFINE_RTYPE(pmqacc_w_h01); + DEFINE_RTYPE(pmqacc_w_h11); + DEFINE_RTYPE(pmqracc_w_h00); + DEFINE_RTYPE(pmqracc_w_h01); + DEFINE_RTYPE(pmqracc_w_h11); + DEFINE_RTYPE(pmq2add_w); + DEFINE_RTYPE(pmq2adda_w); + DEFINE_RTYPE(pmqr2add_w); + DEFINE_RTYPE(pmqr2adda_w); + + // Packed multi-add word-sized instructions + DEFINE_RTYPE(pm2add_w); + DEFINE_RTYPE(pm2add_wx); + DEFINE_RTYPE(pm2addu_w); + DEFINE_RTYPE(pm2addsu_w); + DEFINE_RTYPE(pm2adda_w); + DEFINE_RTYPE(pm2adda_wx); + DEFINE_RTYPE(pm2addau_w); + DEFINE_RTYPE(pm2addasu_w); + DEFINE_RTYPE(pm2sub_w); + DEFINE_RTYPE(pm2sub_wx); + DEFINE_RTYPE(pm2suba_w); + DEFINE_RTYPE(pm2suba_wx); + DEFINE_RTYPE(pm4add_h); + DEFINE_RTYPE(pm4addu_h); + DEFINE_RTYPE(pm4addsu_h); + DEFINE_RTYPE(pm4adda_h); + DEFINE_RTYPE(pm4addau_h); + DEFINE_RTYPE(pm4addasu_h); + + // R1-type packed word-sized unary instructions + DEFINE_R1TYPE(psext_w_b); + DEFINE_R1TYPE(psext_w_h); + DEFINE_R1TYPE(zip16p); + DEFINE_R1TYPE(zip16hp); + + // Packed I-type with shamt (word-sized) - share opcode with RV32 scalar + DISASM_INSN("pslli.w", pslli_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("psrai.w", psrai_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("psrli.w", psrli_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("psrari.w", psrari_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("psati.w", psati_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("pusati.w", pusati_w, 0, {&xrd, &xrs1, &shamtw}); + DISASM_INSN("psslai.w", psslai_w, 0, {&xrd, &xrs1, &shamtw}); + + // Packed load-immediate word-sized instructions + DISASM_INSN("pli.w", pli_w, 0, {&xrd, &p_imm10csl}); + DISASM_INSN("plui.w", plui_w, 0, {&xrd, &p_imm10csr}); + } + } + } disassembler_t::disassembler_t(const isa_parser_t *isa, bool strict) diff --git a/riscv/decode.h b/riscv/decode.h index 0c13528c..e981edfa 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -98,6 +98,9 @@ public: uint64_t iorw() { return x(20, 8); } uint64_t bs() { return x(30, 2); } // Crypto ISE - SM4/AES32 byte select. uint64_t rcon() { return x(20, 4); } // Crypto ISE - AES64 round const. + uint64_t rd_p() { return x(8, 4) * 2; } + uint64_t rs1_p() { return x(16, 4) * 2; } + uint64_t rs2_p() { return x(21, 4) * 2; } [[maybe_unused]] int64_t rvc_opcode() { return x(0, 2); } int64_t rvc_imm() { return x(2, 5) + (xs(12, 1) << 5); } @@ -148,11 +151,14 @@ public: uint64_t v_mew() { return x(28, 1); } uint64_t v_zimm6() { return x(15, 5) + (x(26, 1) << 5); } - uint64_t p_imm2() { return x(20, 2); } - uint64_t p_imm3() { return x(20, 3); } - uint64_t p_imm4() { return x(20, 4); } - uint64_t p_imm5() { return x(20, 5); } - uint64_t p_imm6() { return x(20, 6); } + uint64_t p_imm8() { return x(16, 8); } + uint64_t p_imm10csl() { return x(16, 9) + (x(15, 1) << 9); } + uint64_t p_imm10csr() { return (x(24, 1) << 6) + (x(15, 9) << 7); } + uint64_t p_imm10csrw() { return (x(24, 1) << 22) + (x(15, 9) << 23); } + uint64_t shamtd() { return x(20, 6); } + uint64_t shamtw() { return x(20, 5); } + uint64_t shamth() { return x(20, 4); } + uint64_t shamtb() { return x(20, 3); } uint64_t b_imm5() { return (x(20, 5) == 0) ? -1ul : x(20, 5); } diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h index b778668b..b8cddb60 100644 --- a/riscv/decode_macros.h +++ b/riscv/decode_macros.h @@ -52,6 +52,23 @@ WRITE_REG((reg) + 1, (sreg_t(val)) >> 32); \ } +// RVP macros +#define WRITE_P_REG_PAIR(reg, value) \ + if(reg != 0) { \ + uint64_t val = (value); \ + WRITE_REG(reg, sext32(val)); \ + WRITE_REG((reg) + 1, (sreg_t(val)) >> 32); \ + } + +#define P_READ_REG_PAIR(reg) ({ \ + (reg) == 0 ? reg_t(0) : \ + (READ_REG((reg) + 1) << 32) + zext32(READ_REG(reg)); }) + +#define P_RS1_PAIR P_READ_REG_PAIR(insn.rs1_p()) +#define P_RS2_PAIR P_READ_REG_PAIR(insn.rs2_p()) +#define P_RD_PAIR P_READ_REG_PAIR(insn.rd_p()) +#define WRITE_P_RD_PAIR(value) WRITE_P_REG_PAIR(insn.rd_p(), value) + // RVC macros #define WRITE_RVC_RS1S(value) WRITE_REG(insn.rvc_rs1s(), value) #define WRITE_RVC_RS2S(value) WRITE_REG(insn.rvc_rs2s(), value) @@ -219,6 +236,8 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) #define zext(x, pos) (((reg_t)(x) << (64 - (pos))) >> (64 - (pos))) #define sext_xlen(x) sext(x, xlen) #define zext_xlen(x) zext(x, xlen) +#define sext_xlen_pair(x) (xlen == 32 ? sext(x, 64) : (sreg_t)(x)) +#define zext_xlen_pair(x) (xlen == 32 ? zext(x, 64) : (reg_t)(x)) #define set_pc(x) \ do { if (unlikely((x) & ~p->pc_alignment_mask())) \ diff --git a/riscv/encoding.h b/riscv/encoding.h index 5203544b..e5969053 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -4,7 +4,7 @@ /* * This file is auto-generated by running 'make' in - * https://github.com/riscv/riscv-opcodes (4644ba3) + * https://github.com/riscv/riscv-opcodes (8bae8f5) */ #ifndef RISCV_CSR_ENCODING_H @@ -575,10 +575,20 @@ /* Automatically generated by parse_opcodes. */ #ifndef RISCV_ENCODING_H #define RISCV_ENCODING_H +#define MATCH_AADD 0x9a00003b +#define MASK_AADD 0xfe00707f +#define MATCH_AADDU 0xba00003b +#define MASK_AADDU 0xfe00707f +#define MATCH_ABS 0x60701013 +#define MASK_ABS 0xfff0707f +#define MATCH_ABSW 0x6070101b +#define MASK_ABSW 0xfff0707f #define MATCH_ADD 0x33 #define MASK_ADD 0xfe00707f #define MATCH_ADD_UW 0x800003b #define MASK_ADD_UW 0xfe00707f +#define MATCH_ADDD 0x8600601b +#define MASK_ADDD 0xfe10f0ff #define MATCH_ADDI 0x13 #define MASK_ADDI 0x707f #define MATCH_ADDIW 0x1b @@ -695,6 +705,10 @@ #define MASK_ANDI 0x707f #define MATCH_ANDN 0x40007033 #define MASK_ANDN 0xfe00707f +#define MATCH_ASUB 0xda00003b +#define MASK_ASUB 0xfe00707f +#define MATCH_ASUBU 0xfa00003b +#define MASK_ASUBU 0xfe00707f #define MATCH_AUIPC 0x17 #define MASK_AUIPC 0x7f #define MATCH_BCLR 0x48001033 @@ -875,6 +889,10 @@ #define MASK_CLMULH 0xfe00707f #define MATCH_CLMULR 0xa002033 #define MASK_CLMULR 0xfe00707f +#define MATCH_CLS 0x60301013 +#define MASK_CLS 0xfff0707f +#define MATCH_CLSW 0x6030101b +#define MASK_CLSW 0xfff0707f #define MATCH_CLZ 0x60001013 #define MASK_CLZ 0xfff0707f #define MATCH_CLZW 0x6000101b @@ -1333,10 +1351,64 @@ #define MASK_LW_AQ 0xfdf0707f #define MATCH_LWU 0x6003 #define MASK_LWU 0x707f +#define MATCH_MACC_H00 0x8a00303b +#define MASK_MACC_H00 0xfe00707f +#define MATCH_MACC_H01 0x9a00103b +#define MASK_MACC_H01 0xfe00707f +#define MATCH_MACC_H11 0x9a00303b +#define MASK_MACC_H11 0xfe00707f +#define MATCH_MACC_W00 0x8e00303b +#define MASK_MACC_W00 0xfe00707f +#define MATCH_MACC_W01 0x9e00103b +#define MASK_MACC_W01 0xfe00707f +#define MATCH_MACC_W11 0x9e00303b +#define MASK_MACC_W11 0xfe00707f +#define MATCH_MACCSU_H00 0xea00303b +#define MASK_MACCSU_H00 0xfe00707f +#define MATCH_MACCSU_H11 0xfa00303b +#define MASK_MACCSU_H11 0xfe00707f +#define MATCH_MACCSU_W00 0xee00303b +#define MASK_MACCSU_W00 0xfe00707f +#define MATCH_MACCSU_W11 0xfe00303b +#define MASK_MACCSU_W11 0xfe00707f +#define MATCH_MACCU_H00 0xaa00303b +#define MASK_MACCU_H00 0xfe00707f +#define MATCH_MACCU_H01 0xba00103b +#define MASK_MACCU_H01 0xfe00707f +#define MATCH_MACCU_H11 0xba00303b +#define MASK_MACCU_H11 0xfe00707f +#define MATCH_MACCU_W00 0xae00303b +#define MASK_MACCU_W00 0xfe00707f +#define MATCH_MACCU_W01 0xbe00103b +#define MASK_MACCU_W01 0xfe00707f +#define MATCH_MACCU_W11 0xbe00303b +#define MASK_MACCU_W11 0xfe00707f #define MATCH_MAX 0xa006033 #define MASK_MAX 0xfe00707f #define MATCH_MAXU 0xa007033 #define MASK_MAXU 0xfe00707f +#define MATCH_MERGE 0xac00103b +#define MASK_MERGE 0xfe00707f +#define MATCH_MHACC 0x8a00703b +#define MASK_MHACC 0xfe00707f +#define MATCH_MHACC_H0 0xaa00703b +#define MASK_MHACC_H0 0xfe00707f +#define MATCH_MHACC_H1 0xba00703b +#define MASK_MHACC_H1 0xfe00707f +#define MATCH_MHACCSU 0xca00703b +#define MASK_MHACCSU 0xfe00707f +#define MATCH_MHACCSU_H0 0xae00703b +#define MASK_MHACCSU_H0 0xfe00707f +#define MATCH_MHACCSU_H1 0xbe00703b +#define MASK_MHACCSU_H1 0xfe00707f +#define MATCH_MHACCU 0x9a00703b +#define MASK_MHACCU 0xfe00707f +#define MATCH_MHRACC 0x8e00703b +#define MASK_MHRACC 0xfe00707f +#define MATCH_MHRACCSU 0xce00703b +#define MASK_MHRACCSU 0xfe00707f +#define MATCH_MHRACCU 0x9e00703b +#define MASK_MHRACCU 0xfe00707f #define MATCH_MIN 0xa004033 #define MASK_MIN 0xfe00707f #define MATCH_MINU 0xa005033 @@ -1427,18 +1499,134 @@ #define MASK_MOP_RR_7 0xfe00707f #define MATCH_MOP_RR_N 0x82004073 #define MASK_MOP_RR_N 0xb200707f +#define MATCH_MQACC_H00 0xe800703b +#define MASK_MQACC_H00 0xfe00707f +#define MATCH_MQACC_H01 0xf800503b +#define MASK_MQACC_H01 0xfe00707f +#define MATCH_MQACC_H11 0xf800703b +#define MASK_MQACC_H11 0xfe00707f +#define MATCH_MQACC_W00 0xea00703b +#define MASK_MQACC_W00 0xfe00707f +#define MATCH_MQACC_W01 0xfa00503b +#define MASK_MQACC_W01 0xfe00707f +#define MATCH_MQACC_W11 0xfa00703b +#define MASK_MQACC_W11 0xfe00707f +#define MATCH_MQRACC_H00 0xec00703b +#define MASK_MQRACC_H00 0xfe00707f +#define MATCH_MQRACC_H01 0xfc00503b +#define MASK_MQRACC_H01 0xfe00707f +#define MATCH_MQRACC_H11 0xfc00703b +#define MASK_MQRACC_H11 0xfe00707f +#define MATCH_MQRACC_W00 0xee00703b +#define MASK_MQRACC_W00 0xfe00707f +#define MATCH_MQRACC_W01 0xfe00503b +#define MASK_MQRACC_W01 0xfe00707f +#define MATCH_MQRACC_W11 0xfe00703b +#define MASK_MQRACC_W11 0xfe00707f +#define MATCH_MQRWACC 0x7e00209b +#define MASK_MQRWACC 0xfe0070ff +#define MATCH_MQWACC 0x7a00209b +#define MASK_MQWACC 0xfe0070ff #define MATCH_MRET 0x30200073 #define MASK_MRET 0xffffffff +#define MATCH_MSEQ 0xc200603b +#define MASK_MSEQ 0xfe00707f +#define MATCH_MSLT 0xd200603b +#define MASK_MSLT 0xfe00707f +#define MATCH_MSLTU 0xda00603b +#define MASK_MSLTU 0xfe00707f #define MATCH_MUL 0x2000033 #define MASK_MUL 0xfe00707f +#define MATCH_MUL_H00 0x8200303b +#define MASK_MUL_H00 0xfe00707f +#define MATCH_MUL_H01 0x9200103b +#define MASK_MUL_H01 0xfe00707f +#define MATCH_MUL_H11 0x9200303b +#define MASK_MUL_H11 0xfe00707f +#define MATCH_MUL_W00 0x8600303b +#define MASK_MUL_W00 0xfe00707f +#define MATCH_MUL_W01 0x9600103b +#define MASK_MUL_W01 0xfe00707f +#define MATCH_MUL_W11 0x9600303b +#define MASK_MUL_W11 0xfe00707f #define MATCH_MULH 0x2001033 #define MASK_MULH 0xfe00707f +#define MATCH_MULH_H0 0xa200703b +#define MASK_MULH_H0 0xfe00707f +#define MATCH_MULH_H1 0xb200703b +#define MASK_MULH_H1 0xfe00707f +#define MATCH_MULHR 0x8600703b +#define MASK_MULHR 0xfe00707f +#define MATCH_MULHRSU 0xc600703b +#define MASK_MULHRSU 0xfe00707f +#define MATCH_MULHRU 0x9600703b +#define MASK_MULHRU 0xfe00707f #define MATCH_MULHSU 0x2002033 #define MASK_MULHSU 0xfe00707f +#define MATCH_MULHSU_H0 0xa600703b +#define MASK_MULHSU_H0 0xfe00707f +#define MATCH_MULHSU_H1 0xb600703b +#define MASK_MULHSU_H1 0xfe00707f #define MATCH_MULHU 0x2003033 #define MASK_MULHU 0xfe00707f +#define MATCH_MULQ 0xd200703b +#define MASK_MULQ 0xfe00707f +#define MATCH_MULQR 0xd600703b +#define MASK_MULQR 0xfe00707f +#define MATCH_MULSU_H00 0xe200303b +#define MASK_MULSU_H00 0xfe00707f +#define MATCH_MULSU_H11 0xf200303b +#define MASK_MULSU_H11 0xfe00707f +#define MATCH_MULSU_W00 0xe600303b +#define MASK_MULSU_W00 0xfe00707f +#define MATCH_MULSU_W11 0xf600303b +#define MASK_MULSU_W11 0xfe00707f +#define MATCH_MULU_H00 0xa200303b +#define MASK_MULU_H00 0xfe00707f +#define MATCH_MULU_H01 0xb200103b +#define MASK_MULU_H01 0xfe00707f +#define MATCH_MULU_H11 0xb200303b +#define MASK_MULU_H11 0xfe00707f +#define MATCH_MULU_W00 0xa600303b +#define MASK_MULU_W00 0xfe00707f +#define MATCH_MULU_W01 0xb600103b +#define MASK_MULU_W01 0xfe00707f +#define MATCH_MULU_W11 0xb600303b +#define MASK_MULU_W11 0xfe00707f #define MATCH_MULW 0x200003b #define MASK_MULW 0xfe00707f +#define MATCH_MVM 0xa800103b +#define MASK_MVM 0xfe00707f +#define MATCH_MVMN 0xaa00103b +#define MASK_MVMN 0xfe00707f +#define MATCH_NCLIP 0x6e00c01b +#define MASK_NCLIP 0xfe00f07f +#define MATCH_NCLIPI 0x6400c01b +#define MASK_NCLIPI 0xfc00f07f +#define MATCH_NCLIPIU 0x2400c01b +#define MASK_NCLIPIU 0xfc00f07f +#define MATCH_NCLIPR 0x7e00c01b +#define MASK_NCLIPR 0xfe00f07f +#define MATCH_NCLIPRI 0x7400c01b +#define MASK_NCLIPRI 0xfc00f07f +#define MATCH_NCLIPRIU 0x3400c01b +#define MASK_NCLIPRIU 0xfc00f07f +#define MATCH_NCLIPRU 0x3e00c01b +#define MASK_NCLIPRU 0xfe00f07f +#define MATCH_NCLIPU 0x2e00c01b +#define MASK_NCLIPU 0xfe00f07f +#define MATCH_NSRA 0x4e00c01b +#define MASK_NSRA 0xfe00f07f +#define MATCH_NSRAI 0x4400c01b +#define MASK_NSRAI 0xfc00f07f +#define MATCH_NSRAR 0x5e00c01b +#define MASK_NSRAR 0xfe00f07f +#define MATCH_NSRARI 0x5400c01b +#define MASK_NSRARI 0xfc00f07f +#define MATCH_NSRL 0xe00c01b +#define MASK_NSRL 0xfe00f07f +#define MATCH_NSRLI 0x400c01b +#define MASK_NSRLI 0xfc00f07f #define MATCH_OR 0x6033 #define MASK_OR 0xfe00707f #define MATCH_ORC_B 0x28705013 @@ -1447,20 +1635,940 @@ #define MASK_ORI 0x707f #define MATCH_ORN 0x40006033 #define MASK_ORN 0xfe00707f +#define MATCH_PAADD_B 0x9c00003b +#define MASK_PAADD_B 0xfe00707f +#define MATCH_PAADD_DB 0x9c00601b +#define MASK_PAADD_DB 0xfe10f0ff +#define MATCH_PAADD_DH 0x9800601b +#define MASK_PAADD_DH 0xfe10f0ff +#define MATCH_PAADD_DW 0x9a00601b +#define MASK_PAADD_DW 0xfe10f0ff +#define MATCH_PAADD_H 0x9800003b +#define MASK_PAADD_H 0xfe00707f +#define MATCH_PAADD_W 0x9a00003b +#define MASK_PAADD_W 0xfe00707f +#define MATCH_PAADDU_B 0xbc00003b +#define MASK_PAADDU_B 0xfe00707f +#define MATCH_PAADDU_DB 0xbc00601b +#define MASK_PAADDU_DB 0xfe10f0ff +#define MATCH_PAADDU_DH 0xb800601b +#define MASK_PAADDU_DH 0xfe10f0ff +#define MATCH_PAADDU_DW 0xba00601b +#define MASK_PAADDU_DW 0xfe10f0ff +#define MATCH_PAADDU_H 0xb800003b +#define MASK_PAADDU_H 0xfe00707f +#define MATCH_PAADDU_W 0xba00003b +#define MASK_PAADDU_W 0xfe00707f +#define MATCH_PAAS_DHX 0x9810e01b +#define MASK_PAAS_DHX 0xfe10f0ff +#define MATCH_PAAS_HX 0x9800603b +#define MASK_PAAS_HX 0xfe00707f +#define MATCH_PAAS_WX 0x9a00603b +#define MASK_PAAS_WX 0xfe00707f +#define MATCH_PABD_B 0xcc00003b +#define MASK_PABD_B 0xfe00707f +#define MATCH_PABD_DB 0xcc00601b +#define MASK_PABD_DB 0xfe10f0ff +#define MATCH_PABD_DH 0xc800601b +#define MASK_PABD_DH 0xfe10f0ff +#define MATCH_PABD_H 0xc800003b +#define MASK_PABD_H 0xfe00707f +#define MATCH_PABDSUMAU_B 0xbc00103b +#define MASK_PABDSUMAU_B 0xfe00707f +#define MATCH_PABDSUMU_B 0xb400103b +#define MASK_PABDSUMU_B 0xfe00707f +#define MATCH_PABDU_B 0xec00003b +#define MASK_PABDU_B 0xfe00707f +#define MATCH_PABDU_DB 0xec00601b +#define MASK_PABDU_DB 0xfe10f0ff +#define MATCH_PABDU_DH 0xe800601b +#define MASK_PABDU_DH 0xfe10f0ff +#define MATCH_PABDU_H 0xe800003b +#define MASK_PABDU_H 0xfe00707f #define MATCH_PACK 0x8004033 #define MASK_PACK 0xfe00707f #define MATCH_PACKH 0x8007033 #define MASK_PACKH 0xfe00707f #define MATCH_PACKW 0x800403b #define MASK_PACKW 0xfe00707f +#define MATCH_PADD_B 0x8400003b +#define MASK_PADD_B 0xfe00707f +#define MATCH_PADD_BS 0x9c00201b +#define MASK_PADD_BS 0xfe00707f +#define MATCH_PADD_DB 0x8400601b +#define MASK_PADD_DB 0xfe10f0ff +#define MATCH_PADD_DBS 0x1c00601b +#define MASK_PADD_DBS 0xfe00f0ff +#define MATCH_PADD_DH 0x8000601b +#define MASK_PADD_DH 0xfe10f0ff +#define MATCH_PADD_DHS 0x1800601b +#define MASK_PADD_DHS 0xfe00f0ff +#define MATCH_PADD_DW 0x8200601b +#define MASK_PADD_DW 0xfe10f0ff +#define MATCH_PADD_DWS 0x1a00601b +#define MASK_PADD_DWS 0xfe00f0ff +#define MATCH_PADD_H 0x8000003b +#define MASK_PADD_H 0xfe00707f +#define MATCH_PADD_HS 0x9800201b +#define MASK_PADD_HS 0xfe00707f +#define MATCH_PADD_W 0x8200003b +#define MASK_PADD_W 0xfe00707f +#define MATCH_PADD_WS 0x9a00201b +#define MASK_PADD_WS 0xfe00707f +#define MATCH_PAS_DHX 0x8010e01b +#define MASK_PAS_DHX 0xfe10f0ff +#define MATCH_PAS_HX 0x8000603b +#define MASK_PAS_HX 0xfe00707f +#define MATCH_PAS_WX 0x8200603b +#define MASK_PAS_WX 0xfe00707f +#define MATCH_PASA_DHX 0x9c10e01b +#define MASK_PASA_DHX 0xfe10f0ff +#define MATCH_PASA_HX 0x9c00603b +#define MASK_PASA_HX 0xfe00707f +#define MATCH_PASA_WX 0x9e00603b +#define MASK_PASA_WX 0xfe00707f +#define MATCH_PASUB_B 0xdc00003b +#define MASK_PASUB_B 0xfe00707f +#define MATCH_PASUB_DB 0xdc00601b +#define MASK_PASUB_DB 0xfe10f0ff +#define MATCH_PASUB_DH 0xd800601b +#define MASK_PASUB_DH 0xfe10f0ff +#define MATCH_PASUB_DW 0xda00601b +#define MASK_PASUB_DW 0xfe10f0ff +#define MATCH_PASUB_H 0xd800003b +#define MASK_PASUB_H 0xfe00707f +#define MATCH_PASUB_W 0xda00003b +#define MASK_PASUB_W 0xfe00707f +#define MATCH_PASUBU_B 0xfc00003b +#define MASK_PASUBU_B 0xfe00707f +#define MATCH_PASUBU_DB 0xfc00601b +#define MASK_PASUBU_DB 0xfe10f0ff +#define MATCH_PASUBU_DH 0xf800601b +#define MASK_PASUBU_DH 0xfe10f0ff +#define MATCH_PASUBU_DW 0xfa00601b +#define MASK_PASUBU_DW 0xfe10f0ff +#define MATCH_PASUBU_H 0xf800003b +#define MASK_PASUBU_H 0xfe00707f +#define MATCH_PASUBU_W 0xfa00003b +#define MASK_PASUBU_W 0xfe00707f #define MATCH_PAUSE 0x100000f #define MASK_PAUSE 0xffffffff +#define MATCH_PLI_B 0xb400201b +#define MASK_PLI_B 0xff00f07f +#define MATCH_PLI_DB 0x3400201b +#define MASK_PLI_DB 0xff00f0ff +#define MATCH_PLI_DH 0x3000201b +#define MASK_PLI_DH 0xfe0070ff +#define MATCH_PLI_H 0xb000201b +#define MASK_PLI_H 0xfe00707f +#define MATCH_PLI_W 0xb200201b +#define MASK_PLI_W 0xfe00707f +#define MATCH_PLUI_DH 0x7000201b +#define MASK_PLUI_DH 0xfe0070ff +#define MATCH_PLUI_H 0xf000201b +#define MASK_PLUI_H 0xfe00707f +#define MATCH_PLUI_W 0xf200201b +#define MASK_PLUI_W 0xfe00707f +#define MATCH_PM2ADD_H 0x8000503b +#define MASK_PM2ADD_H 0xfe00707f +#define MATCH_PM2ADD_HX 0x9000503b +#define MASK_PM2ADD_HX 0xfe00707f +#define MATCH_PM2ADD_W 0x8200503b +#define MASK_PM2ADD_W 0xfe00707f +#define MATCH_PM2ADD_WX 0x9200503b +#define MASK_PM2ADD_WX 0xfe00707f +#define MATCH_PM2ADDA_H 0x8800503b +#define MASK_PM2ADDA_H 0xfe00707f +#define MATCH_PM2ADDA_HX 0x9800503b +#define MASK_PM2ADDA_HX 0xfe00707f +#define MATCH_PM2ADDA_W 0x8a00503b +#define MASK_PM2ADDA_W 0xfe00707f +#define MATCH_PM2ADDA_WX 0x9a00503b +#define MASK_PM2ADDA_WX 0xfe00707f +#define MATCH_PM2ADDASU_H 0xe800503b +#define MASK_PM2ADDASU_H 0xfe00707f +#define MATCH_PM2ADDASU_W 0xea00503b +#define MASK_PM2ADDASU_W 0xfe00707f +#define MATCH_PM2ADDAU_H 0xa800503b +#define MASK_PM2ADDAU_H 0xfe00707f +#define MATCH_PM2ADDAU_W 0xaa00503b +#define MASK_PM2ADDAU_W 0xfe00707f +#define MATCH_PM2ADDSU_H 0xe000503b +#define MASK_PM2ADDSU_H 0xfe00707f +#define MATCH_PM2ADDSU_W 0xe200503b +#define MASK_PM2ADDSU_W 0xfe00707f +#define MATCH_PM2ADDU_H 0xa000503b +#define MASK_PM2ADDU_H 0xfe00707f +#define MATCH_PM2ADDU_W 0xa200503b +#define MASK_PM2ADDU_W 0xfe00707f +#define MATCH_PM2SADD_H 0xc400503b +#define MASK_PM2SADD_H 0xfe00707f +#define MATCH_PM2SADD_HX 0xd400503b +#define MASK_PM2SADD_HX 0xfe00707f +#define MATCH_PM2SUB_H 0xc000503b +#define MASK_PM2SUB_H 0xfe00707f +#define MATCH_PM2SUB_HX 0xd000503b +#define MASK_PM2SUB_HX 0xfe00707f +#define MATCH_PM2SUB_W 0xc200503b +#define MASK_PM2SUB_W 0xfe00707f +#define MATCH_PM2SUB_WX 0xd200503b +#define MASK_PM2SUB_WX 0xfe00707f +#define MATCH_PM2SUBA_H 0xc800503b +#define MASK_PM2SUBA_H 0xfe00707f +#define MATCH_PM2SUBA_HX 0xd800503b +#define MASK_PM2SUBA_HX 0xfe00707f +#define MATCH_PM2SUBA_W 0xca00503b +#define MASK_PM2SUBA_W 0xfe00707f +#define MATCH_PM2SUBA_WX 0xda00503b +#define MASK_PM2SUBA_WX 0xfe00707f +#define MATCH_PM2WADD_H 0x600209b +#define MASK_PM2WADD_H 0xfe0070ff +#define MATCH_PM2WADD_HX 0x1600209b +#define MASK_PM2WADD_HX 0xfe0070ff +#define MATCH_PM2WADDA_H 0xe00209b +#define MASK_PM2WADDA_H 0xfe0070ff +#define MATCH_PM2WADDA_HX 0x1e00209b +#define MASK_PM2WADDA_HX 0xfe0070ff +#define MATCH_PM2WADDASU_H 0x6e00209b +#define MASK_PM2WADDASU_H 0xfe0070ff +#define MATCH_PM2WADDAU_H 0x2e00209b +#define MASK_PM2WADDAU_H 0xfe0070ff +#define MATCH_PM2WADDSU_H 0x6600209b +#define MASK_PM2WADDSU_H 0xfe0070ff +#define MATCH_PM2WADDU_H 0x2600209b +#define MASK_PM2WADDU_H 0xfe0070ff +#define MATCH_PM2WSUB_H 0x4600209b +#define MASK_PM2WSUB_H 0xfe0070ff +#define MATCH_PM2WSUB_HX 0x5600209b +#define MASK_PM2WSUB_HX 0xfe0070ff +#define MATCH_PM2WSUBA_H 0x4e00209b +#define MASK_PM2WSUBA_H 0xfe0070ff +#define MATCH_PM2WSUBA_HX 0x5e00209b +#define MASK_PM2WSUBA_HX 0xfe0070ff +#define MATCH_PM4ADD_B 0x8400503b +#define MASK_PM4ADD_B 0xfe00707f +#define MATCH_PM4ADD_H 0x8600503b +#define MASK_PM4ADD_H 0xfe00707f +#define MATCH_PM4ADDA_B 0x8c00503b +#define MASK_PM4ADDA_B 0xfe00707f +#define MATCH_PM4ADDA_H 0x8e00503b +#define MASK_PM4ADDA_H 0xfe00707f +#define MATCH_PM4ADDASU_B 0xec00503b +#define MASK_PM4ADDASU_B 0xfe00707f +#define MATCH_PM4ADDASU_H 0xee00503b +#define MASK_PM4ADDASU_H 0xfe00707f +#define MATCH_PM4ADDAU_B 0xac00503b +#define MASK_PM4ADDAU_B 0xfe00707f +#define MATCH_PM4ADDAU_H 0xae00503b +#define MASK_PM4ADDAU_H 0xfe00707f +#define MATCH_PM4ADDSU_B 0xe400503b +#define MASK_PM4ADDSU_B 0xfe00707f +#define MATCH_PM4ADDSU_H 0xe600503b +#define MASK_PM4ADDSU_H 0xfe00707f +#define MATCH_PM4ADDU_B 0xa400503b +#define MASK_PM4ADDU_B 0xfe00707f +#define MATCH_PM4ADDU_H 0xa600503b +#define MASK_PM4ADDU_H 0xfe00707f +#define MATCH_PMACC_W_H00 0x8a00303b +#define MASK_PMACC_W_H00 0xfe00707f +#define MATCH_PMACC_W_H01 0x9a00103b +#define MASK_PMACC_W_H01 0xfe00707f +#define MATCH_PMACC_W_H11 0x9a00303b +#define MASK_PMACC_W_H11 0xfe00707f +#define MATCH_PMACCSU_W_H00 0xea00303b +#define MASK_PMACCSU_W_H00 0xfe00707f +#define MATCH_PMACCSU_W_H11 0xfa00303b +#define MASK_PMACCSU_W_H11 0xfe00707f +#define MATCH_PMACCU_W_H00 0xaa00303b +#define MASK_PMACCU_W_H00 0xfe00707f +#define MATCH_PMACCU_W_H01 0xba00103b +#define MASK_PMACCU_W_H01 0xfe00707f +#define MATCH_PMACCU_W_H11 0xba00303b +#define MASK_PMACCU_W_H11 0xfe00707f +#define MATCH_PMAX_B 0xf400603b +#define MASK_PMAX_B 0xfe00707f +#define MATCH_PMAX_DB 0xf410e01b +#define MASK_PMAX_DB 0xfe10f0ff +#define MATCH_PMAX_DH 0xf010e01b +#define MASK_PMAX_DH 0xfe10f0ff +#define MATCH_PMAX_DW 0xf210e01b +#define MASK_PMAX_DW 0xfe10f0ff +#define MATCH_PMAX_H 0xf000603b +#define MASK_PMAX_H 0xfe00707f +#define MATCH_PMAX_W 0xf200603b +#define MASK_PMAX_W 0xfe00707f +#define MATCH_PMAXU_B 0xfc00603b +#define MASK_PMAXU_B 0xfe00707f +#define MATCH_PMAXU_DB 0xfc10e01b +#define MASK_PMAXU_DB 0xfe10f0ff +#define MATCH_PMAXU_DH 0xf810e01b +#define MASK_PMAXU_DH 0xfe10f0ff +#define MATCH_PMAXU_DW 0xfa10e01b +#define MASK_PMAXU_DW 0xfe10f0ff +#define MATCH_PMAXU_H 0xf800603b +#define MASK_PMAXU_H 0xfe00707f +#define MATCH_PMAXU_W 0xfa00603b +#define MASK_PMAXU_W 0xfe00707f +#define MATCH_PMHACC_H 0x8800703b +#define MASK_PMHACC_H 0xfe00707f +#define MATCH_PMHACC_H_B0 0xa800703b +#define MASK_PMHACC_H_B0 0xfe00707f +#define MATCH_PMHACC_H_B1 0xb800703b +#define MASK_PMHACC_H_B1 0xfe00707f +#define MATCH_PMHACC_W 0x8a00703b +#define MASK_PMHACC_W 0xfe00707f +#define MATCH_PMHACC_W_H0 0xaa00703b +#define MASK_PMHACC_W_H0 0xfe00707f +#define MATCH_PMHACC_W_H1 0xba00703b +#define MASK_PMHACC_W_H1 0xfe00707f +#define MATCH_PMHACCSU_H 0xc800703b +#define MASK_PMHACCSU_H 0xfe00707f +#define MATCH_PMHACCSU_H_B0 0xac00703b +#define MASK_PMHACCSU_H_B0 0xfe00707f +#define MATCH_PMHACCSU_H_B1 0xbc00703b +#define MASK_PMHACCSU_H_B1 0xfe00707f +#define MATCH_PMHACCSU_W 0xca00703b +#define MASK_PMHACCSU_W 0xfe00707f +#define MATCH_PMHACCSU_W_H0 0xae00703b +#define MASK_PMHACCSU_W_H0 0xfe00707f +#define MATCH_PMHACCSU_W_H1 0xbe00703b +#define MASK_PMHACCSU_W_H1 0xfe00707f +#define MATCH_PMHACCU_H 0x9800703b +#define MASK_PMHACCU_H 0xfe00707f +#define MATCH_PMHACCU_W 0x9a00703b +#define MASK_PMHACCU_W 0xfe00707f +#define MATCH_PMHRACC_H 0x8c00703b +#define MASK_PMHRACC_H 0xfe00707f +#define MATCH_PMHRACC_W 0x8e00703b +#define MASK_PMHRACC_W 0xfe00707f +#define MATCH_PMHRACCSU_H 0xcc00703b +#define MASK_PMHRACCSU_H 0xfe00707f +#define MATCH_PMHRACCSU_W 0xce00703b +#define MASK_PMHRACCSU_W 0xfe00707f +#define MATCH_PMHRACCU_H 0x9c00703b +#define MASK_PMHRACCU_H 0xfe00707f +#define MATCH_PMHRACCU_W 0x9e00703b +#define MASK_PMHRACCU_W 0xfe00707f +#define MATCH_PMIN_B 0xe400603b +#define MASK_PMIN_B 0xfe00707f +#define MATCH_PMIN_DB 0xe410e01b +#define MASK_PMIN_DB 0xfe10f0ff +#define MATCH_PMIN_DH 0xe010e01b +#define MASK_PMIN_DH 0xfe10f0ff +#define MATCH_PMIN_DW 0xe210e01b +#define MASK_PMIN_DW 0xfe10f0ff +#define MATCH_PMIN_H 0xe000603b +#define MASK_PMIN_H 0xfe00707f +#define MATCH_PMIN_W 0xe200603b +#define MASK_PMIN_W 0xfe00707f +#define MATCH_PMINU_B 0xec00603b +#define MASK_PMINU_B 0xfe00707f +#define MATCH_PMINU_DB 0xec10e01b +#define MASK_PMINU_DB 0xfe10f0ff +#define MATCH_PMINU_DH 0xe810e01b +#define MASK_PMINU_DH 0xfe10f0ff +#define MATCH_PMINU_DW 0xea10e01b +#define MASK_PMINU_DW 0xfe10f0ff +#define MATCH_PMINU_H 0xe800603b +#define MASK_PMINU_H 0xfe00707f +#define MATCH_PMINU_W 0xea00603b +#define MASK_PMINU_W 0xfe00707f +#define MATCH_PMQ2ADD_H 0xb000503b +#define MASK_PMQ2ADD_H 0xfe00707f +#define MATCH_PMQ2ADD_W 0xb200503b +#define MASK_PMQ2ADD_W 0xfe00707f +#define MATCH_PMQ2ADDA_H 0xb800503b +#define MASK_PMQ2ADDA_H 0xfe00707f +#define MATCH_PMQ2ADDA_W 0xba00503b +#define MASK_PMQ2ADDA_W 0xfe00707f +#define MATCH_PMQACC_W_H00 0xe800703b +#define MASK_PMQACC_W_H00 0xfe00707f +#define MATCH_PMQACC_W_H01 0xf800503b +#define MASK_PMQACC_W_H01 0xfe00707f +#define MATCH_PMQACC_W_H11 0xf800703b +#define MASK_PMQACC_W_H11 0xfe00707f +#define MATCH_PMQR2ADD_H 0xb400503b +#define MASK_PMQR2ADD_H 0xfe00707f +#define MATCH_PMQR2ADD_W 0xb600503b +#define MASK_PMQR2ADD_W 0xfe00707f +#define MATCH_PMQR2ADDA_H 0xbc00503b +#define MASK_PMQR2ADDA_H 0xfe00707f +#define MATCH_PMQR2ADDA_W 0xbe00503b +#define MASK_PMQR2ADDA_W 0xfe00707f +#define MATCH_PMQRACC_W_H00 0xec00703b +#define MASK_PMQRACC_W_H00 0xfe00707f +#define MATCH_PMQRACC_W_H01 0xfc00503b +#define MASK_PMQRACC_W_H01 0xfe00707f +#define MATCH_PMQRACC_W_H11 0xfc00703b +#define MASK_PMQRACC_W_H11 0xfe00707f +#define MATCH_PMQRWACC_H 0x7c00209b +#define MASK_PMQRWACC_H 0xfe0070ff +#define MATCH_PMQWACC_H 0x7800209b +#define MASK_PMQWACC_H 0xfe0070ff +#define MATCH_PMSEQ_B 0xc400603b +#define MASK_PMSEQ_B 0xfe00707f +#define MATCH_PMSEQ_DB 0xc410e01b +#define MASK_PMSEQ_DB 0xfe10f0ff +#define MATCH_PMSEQ_DH 0xc010e01b +#define MASK_PMSEQ_DH 0xfe10f0ff +#define MATCH_PMSEQ_DW 0xc210e01b +#define MASK_PMSEQ_DW 0xfe10f0ff +#define MATCH_PMSEQ_H 0xc000603b +#define MASK_PMSEQ_H 0xfe00707f +#define MATCH_PMSEQ_W 0xc200603b +#define MASK_PMSEQ_W 0xfe00707f +#define MATCH_PMSLT_B 0xd400603b +#define MASK_PMSLT_B 0xfe00707f +#define MATCH_PMSLT_DB 0xd410e01b +#define MASK_PMSLT_DB 0xfe10f0ff +#define MATCH_PMSLT_DH 0xd010e01b +#define MASK_PMSLT_DH 0xfe10f0ff +#define MATCH_PMSLT_DW 0xd210e01b +#define MASK_PMSLT_DW 0xfe10f0ff +#define MATCH_PMSLT_H 0xd000603b +#define MASK_PMSLT_H 0xfe00707f +#define MATCH_PMSLT_W 0xd200603b +#define MASK_PMSLT_W 0xfe00707f +#define MATCH_PMSLTU_B 0xdc00603b +#define MASK_PMSLTU_B 0xfe00707f +#define MATCH_PMSLTU_DB 0xdc10e01b +#define MASK_PMSLTU_DB 0xfe10f0ff +#define MATCH_PMSLTU_DH 0xd810e01b +#define MASK_PMSLTU_DH 0xfe10f0ff +#define MATCH_PMSLTU_DW 0xda10e01b +#define MASK_PMSLTU_DW 0xfe10f0ff +#define MATCH_PMSLTU_H 0xd800603b +#define MASK_PMSLTU_H 0xfe00707f +#define MATCH_PMSLTU_W 0xda00603b +#define MASK_PMSLTU_W 0xfe00707f +#define MATCH_PMUL_H_B00 0x8000303b +#define MASK_PMUL_H_B00 0xfe00707f +#define MATCH_PMUL_H_B01 0x9000103b +#define MASK_PMUL_H_B01 0xfe00707f +#define MATCH_PMUL_H_B11 0x9000303b +#define MASK_PMUL_H_B11 0xfe00707f +#define MATCH_PMUL_W_H00 0x8200303b +#define MASK_PMUL_W_H00 0xfe00707f +#define MATCH_PMUL_W_H01 0x9200103b +#define MASK_PMUL_W_H01 0xfe00707f +#define MATCH_PMUL_W_H11 0x9200303b +#define MASK_PMUL_W_H11 0xfe00707f +#define MATCH_PMULH_H 0x8000703b +#define MASK_PMULH_H 0xfe00707f +#define MATCH_PMULH_H_B0 0xa000703b +#define MASK_PMULH_H_B0 0xfe00707f +#define MATCH_PMULH_H_B1 0xb000703b +#define MASK_PMULH_H_B1 0xfe00707f +#define MATCH_PMULH_W 0x8200703b +#define MASK_PMULH_W 0xfe00707f +#define MATCH_PMULH_W_H0 0xa200703b +#define MASK_PMULH_W_H0 0xfe00707f +#define MATCH_PMULH_W_H1 0xb200703b +#define MASK_PMULH_W_H1 0xfe00707f +#define MATCH_PMULHR_H 0x8400703b +#define MASK_PMULHR_H 0xfe00707f +#define MATCH_PMULHR_W 0x8600703b +#define MASK_PMULHR_W 0xfe00707f +#define MATCH_PMULHRSU_H 0xc400703b +#define MASK_PMULHRSU_H 0xfe00707f +#define MATCH_PMULHRSU_W 0xc600703b +#define MASK_PMULHRSU_W 0xfe00707f +#define MATCH_PMULHRU_H 0x9400703b +#define MASK_PMULHRU_H 0xfe00707f +#define MATCH_PMULHRU_W 0x9600703b +#define MASK_PMULHRU_W 0xfe00707f +#define MATCH_PMULHSU_H 0xc000703b +#define MASK_PMULHSU_H 0xfe00707f +#define MATCH_PMULHSU_H_B0 0xa400703b +#define MASK_PMULHSU_H_B0 0xfe00707f +#define MATCH_PMULHSU_H_B1 0xb400703b +#define MASK_PMULHSU_H_B1 0xfe00707f +#define MATCH_PMULHSU_W 0xc200703b +#define MASK_PMULHSU_W 0xfe00707f +#define MATCH_PMULHSU_W_H0 0xa600703b +#define MASK_PMULHSU_W_H0 0xfe00707f +#define MATCH_PMULHSU_W_H1 0xb600703b +#define MASK_PMULHSU_W_H1 0xfe00707f +#define MATCH_PMULHU_H 0x9000703b +#define MASK_PMULHU_H 0xfe00707f +#define MATCH_PMULHU_W 0x9200703b +#define MASK_PMULHU_W 0xfe00707f +#define MATCH_PMULQ_H 0xd000703b +#define MASK_PMULQ_H 0xfe00707f +#define MATCH_PMULQ_W 0xd200703b +#define MASK_PMULQ_W 0xfe00707f +#define MATCH_PMULQR_H 0xd400703b +#define MASK_PMULQR_H 0xfe00707f +#define MATCH_PMULQR_W 0xd600703b +#define MASK_PMULQR_W 0xfe00707f +#define MATCH_PMULSU_H_B00 0xe000303b +#define MASK_PMULSU_H_B00 0xfe00707f +#define MATCH_PMULSU_H_B11 0xf000303b +#define MASK_PMULSU_H_B11 0xfe00707f +#define MATCH_PMULSU_W_H00 0xe200303b +#define MASK_PMULSU_W_H00 0xfe00707f +#define MATCH_PMULSU_W_H11 0xf200303b +#define MASK_PMULSU_W_H11 0xfe00707f +#define MATCH_PMULU_H_B00 0xa000303b +#define MASK_PMULU_H_B00 0xfe00707f +#define MATCH_PMULU_H_B01 0xb000103b +#define MASK_PMULU_H_B01 0xfe00707f +#define MATCH_PMULU_H_B11 0xb000303b +#define MASK_PMULU_H_B11 0xfe00707f +#define MATCH_PMULU_W_H00 0xa200303b +#define MASK_PMULU_W_H00 0xfe00707f +#define MATCH_PMULU_W_H01 0xb200103b +#define MASK_PMULU_W_H01 0xfe00707f +#define MATCH_PMULU_W_H11 0xb200303b +#define MASK_PMULU_W_H11 0xfe00707f +#define MATCH_PNCLIP_BS 0x6800c01b +#define MASK_PNCLIP_BS 0xfe00f07f +#define MATCH_PNCLIP_HS 0x6a00c01b +#define MASK_PNCLIP_HS 0xfe00f07f +#define MATCH_PNCLIPI_B 0x6100c01b +#define MASK_PNCLIPI_B 0xff00f07f +#define MATCH_PNCLIPI_H 0x6200c01b +#define MASK_PNCLIPI_H 0xfe00f07f +#define MATCH_PNCLIPIU_B 0x2100c01b +#define MASK_PNCLIPIU_B 0xff00f07f +#define MATCH_PNCLIPIU_H 0x2200c01b +#define MASK_PNCLIPIU_H 0xfe00f07f +#define MATCH_PNCLIPP_B 0xc000203b +#define MASK_PNCLIPP_B 0xfe00707f +#define MATCH_PNCLIPP_H 0xc200203b +#define MASK_PNCLIPP_H 0xfe00707f +#define MATCH_PNCLIPP_W 0xc600203b +#define MASK_PNCLIPP_W 0xfe00707f +#define MATCH_PNCLIPR_BS 0x7800c01b +#define MASK_PNCLIPR_BS 0xfe00f07f +#define MATCH_PNCLIPR_HS 0x7a00c01b +#define MASK_PNCLIPR_HS 0xfe00f07f +#define MATCH_PNCLIPRI_B 0x7100c01b +#define MASK_PNCLIPRI_B 0xff00f07f +#define MATCH_PNCLIPRI_H 0x7200c01b +#define MASK_PNCLIPRI_H 0xfe00f07f +#define MATCH_PNCLIPRIU_B 0x3100c01b +#define MASK_PNCLIPRIU_B 0xff00f07f +#define MATCH_PNCLIPRIU_H 0x3200c01b +#define MASK_PNCLIPRIU_H 0xfe00f07f +#define MATCH_PNCLIPRU_BS 0x3800c01b +#define MASK_PNCLIPRU_BS 0xfe00f07f +#define MATCH_PNCLIPRU_HS 0x3a00c01b +#define MASK_PNCLIPRU_HS 0xfe00f07f +#define MATCH_PNCLIPU_BS 0x2800c01b +#define MASK_PNCLIPU_BS 0xfe00f07f +#define MATCH_PNCLIPU_HS 0x2a00c01b +#define MASK_PNCLIPU_HS 0xfe00f07f +#define MATCH_PNCLIPUP_B 0x8000203b +#define MASK_PNCLIPUP_B 0xfe00707f +#define MATCH_PNCLIPUP_H 0x8200203b +#define MASK_PNCLIPUP_H 0xfe00707f +#define MATCH_PNCLIPUP_W 0x8600203b +#define MASK_PNCLIPUP_W 0xfe00707f +#define MATCH_PNSRA_BS 0x4800c01b +#define MASK_PNSRA_BS 0xfe00f07f +#define MATCH_PNSRA_HS 0x4a00c01b +#define MASK_PNSRA_HS 0xfe00f07f +#define MATCH_PNSRAI_B 0x4100c01b +#define MASK_PNSRAI_B 0xff00f07f +#define MATCH_PNSRAI_H 0x4200c01b +#define MASK_PNSRAI_H 0xfe00f07f +#define MATCH_PNSRAR_BS 0x5800c01b +#define MASK_PNSRAR_BS 0xfe00f07f +#define MATCH_PNSRAR_HS 0x5a00c01b +#define MASK_PNSRAR_HS 0xfe00f07f +#define MATCH_PNSRARI_B 0x5100c01b +#define MASK_PNSRARI_B 0xff00f07f +#define MATCH_PNSRARI_H 0x5200c01b +#define MASK_PNSRARI_H 0xfe00f07f +#define MATCH_PNSRL_BS 0x800c01b +#define MASK_PNSRL_BS 0xfe00f07f +#define MATCH_PNSRL_HS 0xa00c01b +#define MASK_PNSRL_HS 0xfe00f07f +#define MATCH_PNSRLI_B 0x100c01b +#define MASK_PNSRLI_B 0xff00f07f +#define MATCH_PNSRLI_H 0x200c01b +#define MASK_PNSRLI_H 0xfe00f07f +#define MATCH_PPAIRE_B 0x8000403b +#define MASK_PPAIRE_B 0xfe00707f +#define MATCH_PPAIRE_DB 0x8000e01b +#define MASK_PPAIRE_DB 0xfe10f0ff +#define MATCH_PPAIRE_DH 0x8200e01b +#define MASK_PPAIRE_DH 0xfe10f0ff +#define MATCH_PPAIRE_H 0x8200403b +#define MASK_PPAIRE_H 0xfe00707f +#define MATCH_PPAIREO_B 0x9000403b +#define MASK_PPAIREO_B 0xfe00707f +#define MATCH_PPAIREO_DB 0x9000e01b +#define MASK_PPAIREO_DB 0xfe10f0ff +#define MATCH_PPAIREO_DH 0x9200e01b +#define MASK_PPAIREO_DH 0xfe10f0ff +#define MATCH_PPAIREO_H 0x9200403b +#define MASK_PPAIREO_H 0xfe00707f +#define MATCH_PPAIREO_W 0x9600403b +#define MASK_PPAIREO_W 0xfe00707f +#define MATCH_PPAIRO_B 0xb000403b +#define MASK_PPAIRO_B 0xfe00707f +#define MATCH_PPAIRO_DB 0xb000e01b +#define MASK_PPAIRO_DB 0xfe10f0ff +#define MATCH_PPAIRO_DH 0xb200e01b +#define MASK_PPAIRO_DH 0xfe10f0ff +#define MATCH_PPAIRO_H 0xb200403b +#define MASK_PPAIRO_H 0xfe00707f +#define MATCH_PPAIRO_W 0xb600403b +#define MASK_PPAIRO_W 0xfe00707f +#define MATCH_PPAIROE_B 0xa000403b +#define MASK_PPAIROE_B 0xfe00707f +#define MATCH_PPAIROE_DB 0xa000e01b +#define MASK_PPAIROE_DB 0xfe10f0ff +#define MATCH_PPAIROE_DH 0xa200e01b +#define MASK_PPAIROE_DH 0xfe10f0ff +#define MATCH_PPAIROE_H 0xa200403b +#define MASK_PPAIROE_H 0xfe00707f +#define MATCH_PPAIROE_W 0xa600403b +#define MASK_PPAIROE_W 0xfe00707f +#define MATCH_PREDSUM_BS 0x9c00401b +#define MASK_PREDSUM_BS 0xfe00707f +#define MATCH_PREDSUM_DBS 0x1c00401b +#define MASK_PREDSUM_DBS 0xfe00f07f +#define MATCH_PREDSUM_DHS 0x1800401b +#define MASK_PREDSUM_DHS 0xfe00f07f +#define MATCH_PREDSUM_HS 0x9800401b +#define MASK_PREDSUM_HS 0xfe00707f +#define MATCH_PREDSUM_WS 0x9a00401b +#define MASK_PREDSUM_WS 0xfe00707f +#define MATCH_PREDSUMU_BS 0xbc00401b +#define MASK_PREDSUMU_BS 0xfe00707f +#define MATCH_PREDSUMU_DBS 0x3c00401b +#define MASK_PREDSUMU_DBS 0xfe00f07f +#define MATCH_PREDSUMU_DHS 0x3800401b +#define MASK_PREDSUMU_DHS 0xfe00f07f +#define MATCH_PREDSUMU_HS 0xb800401b +#define MASK_PREDSUMU_HS 0xfe00707f +#define MATCH_PREDSUMU_WS 0xba00401b +#define MASK_PREDSUMU_WS 0xfe00707f #define MATCH_PREFETCH_I 0x6013 #define MASK_PREFETCH_I 0x1f07fff #define MATCH_PREFETCH_R 0x106013 #define MASK_PREFETCH_R 0x1f07fff #define MATCH_PREFETCH_W 0x306013 #define MASK_PREFETCH_W 0x1f07fff +#define MATCH_PSA_DHX 0x8410e01b +#define MASK_PSA_DHX 0xfe10f0ff +#define MATCH_PSA_HX 0x8400603b +#define MASK_PSA_HX 0xfe00707f +#define MATCH_PSA_WX 0x8600603b +#define MASK_PSA_WX 0xfe00707f +#define MATCH_PSABS_B 0xe470201b +#define MASK_PSABS_B 0xfff0707f +#define MATCH_PSABS_DB 0x6470601b +#define MASK_PSABS_DB 0xfff0f0ff +#define MATCH_PSABS_DH 0x6070601b +#define MASK_PSABS_DH 0xfff0f0ff +#define MATCH_PSABS_H 0xe070201b +#define MASK_PSABS_H 0xfff0707f +#define MATCH_PSADD_B 0x9400003b +#define MASK_PSADD_B 0xfe00707f +#define MATCH_PSADD_DB 0x9400601b +#define MASK_PSADD_DB 0xfe10f0ff +#define MATCH_PSADD_DH 0x9000601b +#define MASK_PSADD_DH 0xfe10f0ff +#define MATCH_PSADD_DW 0x9200601b +#define MASK_PSADD_DW 0xfe10f0ff +#define MATCH_PSADD_H 0x9000003b +#define MASK_PSADD_H 0xfe00707f +#define MATCH_PSADD_W 0x9200003b +#define MASK_PSADD_W 0xfe00707f +#define MATCH_PSADDU_B 0xb400003b +#define MASK_PSADDU_B 0xfe00707f +#define MATCH_PSADDU_DB 0xb400601b +#define MASK_PSADDU_DB 0xfe10f0ff +#define MATCH_PSADDU_DH 0xb000601b +#define MASK_PSADDU_DH 0xfe10f0ff +#define MATCH_PSADDU_DW 0xb200601b +#define MASK_PSADDU_DW 0xfe10f0ff +#define MATCH_PSADDU_H 0xb000003b +#define MASK_PSADDU_H 0xfe00707f +#define MATCH_PSADDU_W 0xb200003b +#define MASK_PSADDU_W 0xfe00707f +#define MATCH_PSAS_DHX 0x9010e01b +#define MASK_PSAS_DHX 0xfe10f0ff +#define MATCH_PSAS_HX 0x9000603b +#define MASK_PSAS_HX 0xfe00707f +#define MATCH_PSAS_WX 0x9200603b +#define MASK_PSAS_WX 0xfe00707f +#define MATCH_PSATI_DH 0x6100e01b +#define MASK_PSATI_DH 0xff00f0ff +#define MATCH_PSATI_DW 0x6200e01b +#define MASK_PSATI_DW 0xfe00f0ff +#define MATCH_PSATI_H 0xe100401b +#define MASK_PSATI_H 0xff00707f +#define MATCH_PSATI_W 0xe200401b +#define MASK_PSATI_W 0xfe00707f +#define MATCH_PSEXT_DH_B 0x6040601b +#define MASK_PSEXT_DH_B 0xfff0f0ff +#define MATCH_PSEXT_DW_B 0x6240601b +#define MASK_PSEXT_DW_B 0xfff0f0ff +#define MATCH_PSEXT_DW_H 0x6250601b +#define MASK_PSEXT_DW_H 0xfff0f0ff +#define MATCH_PSEXT_H_B 0xe040201b +#define MASK_PSEXT_H_B 0xfff0707f +#define MATCH_PSEXT_W_B 0xe240201b +#define MASK_PSEXT_W_B 0xfff0707f +#define MATCH_PSEXT_W_H 0xe250201b +#define MASK_PSEXT_W_H 0xfff0707f +#define MATCH_PSH1ADD_DH 0xa010601b +#define MASK_PSH1ADD_DH 0xfe10f0ff +#define MATCH_PSH1ADD_DW 0xa210601b +#define MASK_PSH1ADD_DW 0xfe10f0ff +#define MATCH_PSH1ADD_H 0xa000203b +#define MASK_PSH1ADD_H 0xfe00707f +#define MATCH_PSH1ADD_W 0xa200203b +#define MASK_PSH1ADD_W 0xfe00707f +#define MATCH_PSLL_BS 0x8c00201b +#define MASK_PSLL_BS 0xfe00707f +#define MATCH_PSLL_DBS 0xc00601b +#define MASK_PSLL_DBS 0xfe00f0ff +#define MATCH_PSLL_DHS 0x800601b +#define MASK_PSLL_DHS 0xfe00f0ff +#define MATCH_PSLL_DWS 0xa00601b +#define MASK_PSLL_DWS 0xfe00f0ff +#define MATCH_PSLL_HS 0x8800201b +#define MASK_PSLL_HS 0xfe00707f +#define MATCH_PSLL_WS 0x8a00201b +#define MASK_PSLL_WS 0xfe00707f +#define MATCH_PSLLI_B 0x8080201b +#define MASK_PSLLI_B 0xff80707f +#define MATCH_PSLLI_DB 0x80601b +#define MASK_PSLLI_DB 0xff80f0ff +#define MATCH_PSLLI_DH 0x100601b +#define MASK_PSLLI_DH 0xff00f0ff +#define MATCH_PSLLI_DW 0x200601b +#define MASK_PSLLI_DW 0xfe00f0ff +#define MATCH_PSLLI_H 0x8100201b +#define MASK_PSLLI_H 0xff00707f +#define MATCH_PSLLI_W 0x8200201b +#define MASK_PSLLI_W 0xfe00707f +#define MATCH_PSRA_BS 0xcc00401b +#define MASK_PSRA_BS 0xfe00707f +#define MATCH_PSRA_DBS 0x4c00e01b +#define MASK_PSRA_DBS 0xfe00f0ff +#define MATCH_PSRA_DHS 0x4800e01b +#define MASK_PSRA_DHS 0xfe00f0ff +#define MATCH_PSRA_DWS 0x4a00e01b +#define MASK_PSRA_DWS 0xfe00f0ff +#define MATCH_PSRA_HS 0xc800401b +#define MASK_PSRA_HS 0xfe00707f +#define MATCH_PSRA_WS 0xca00401b +#define MASK_PSRA_WS 0xfe00707f +#define MATCH_PSRAI_B 0xc080401b +#define MASK_PSRAI_B 0xff80707f +#define MATCH_PSRAI_DB 0x4080e01b +#define MASK_PSRAI_DB 0xff80f0ff +#define MATCH_PSRAI_DH 0x4100e01b +#define MASK_PSRAI_DH 0xff00f0ff +#define MATCH_PSRAI_DW 0x4200e01b +#define MASK_PSRAI_DW 0xfe00f0ff +#define MATCH_PSRAI_H 0xc100401b +#define MASK_PSRAI_H 0xff00707f +#define MATCH_PSRAI_W 0xc200401b +#define MASK_PSRAI_W 0xfe00707f +#define MATCH_PSRARI_DH 0x5100e01b +#define MASK_PSRARI_DH 0xff00f0ff +#define MATCH_PSRARI_DW 0x5200e01b +#define MASK_PSRARI_DW 0xfe00f0ff +#define MATCH_PSRARI_H 0xd100401b +#define MASK_PSRARI_H 0xff00707f +#define MATCH_PSRARI_W 0xd200401b +#define MASK_PSRARI_W 0xfe00707f +#define MATCH_PSRL_BS 0x8c00401b +#define MASK_PSRL_BS 0xfe00707f +#define MATCH_PSRL_DBS 0xc00e01b +#define MASK_PSRL_DBS 0xfe00f0ff +#define MATCH_PSRL_DHS 0x800e01b +#define MASK_PSRL_DHS 0xfe00f0ff +#define MATCH_PSRL_DWS 0xa00e01b +#define MASK_PSRL_DWS 0xfe00f0ff +#define MATCH_PSRL_HS 0x8800401b +#define MASK_PSRL_HS 0xfe00707f +#define MATCH_PSRL_WS 0x8a00401b +#define MASK_PSRL_WS 0xfe00707f +#define MATCH_PSRLI_B 0x8080401b +#define MASK_PSRLI_B 0xff80707f +#define MATCH_PSRLI_DB 0x80e01b +#define MASK_PSRLI_DB 0xff80f0ff +#define MATCH_PSRLI_DH 0x100e01b +#define MASK_PSRLI_DH 0xff00f0ff +#define MATCH_PSRLI_DW 0x200e01b +#define MASK_PSRLI_DW 0xfe00f0ff +#define MATCH_PSRLI_H 0x8100401b +#define MASK_PSRLI_H 0xff00707f +#define MATCH_PSRLI_W 0x8200401b +#define MASK_PSRLI_W 0xfe00707f +#define MATCH_PSSA_DHX 0x9410e01b +#define MASK_PSSA_DHX 0xfe10f0ff +#define MATCH_PSSA_HX 0x9400603b +#define MASK_PSSA_HX 0xfe00707f +#define MATCH_PSSA_WX 0x9600603b +#define MASK_PSSA_WX 0xfe00707f +#define MATCH_PSSH1SADD_DH 0xb010601b +#define MASK_PSSH1SADD_DH 0xfe10f0ff +#define MATCH_PSSH1SADD_DW 0xb210601b +#define MASK_PSSH1SADD_DW 0xfe10f0ff +#define MATCH_PSSH1SADD_H 0xb000203b +#define MASK_PSSH1SADD_H 0xfe00707f +#define MATCH_PSSH1SADD_W 0xb200203b +#define MASK_PSSH1SADD_W 0xfe00707f +#define MATCH_PSSHA_DHS 0x6800601b +#define MASK_PSSHA_DHS 0xfe00f0ff +#define MATCH_PSSHA_DWS 0x6a00601b +#define MASK_PSSHA_DWS 0xfe00f0ff +#define MATCH_PSSHA_HS 0xe800201b +#define MASK_PSSHA_HS 0xfe00707f +#define MATCH_PSSHA_WS 0xea00201b +#define MASK_PSSHA_WS 0xfe00707f +#define MATCH_PSSHAR_DHS 0x7800601b +#define MASK_PSSHAR_DHS 0xfe00f0ff +#define MATCH_PSSHAR_DWS 0x7a00601b +#define MASK_PSSHAR_DWS 0xfe00f0ff +#define MATCH_PSSHAR_HS 0xf800201b +#define MASK_PSSHAR_HS 0xfe00707f +#define MATCH_PSSHAR_WS 0xfa00201b +#define MASK_PSSHAR_WS 0xfe00707f +#define MATCH_PSSHL_DHS 0x2800601b +#define MASK_PSSHL_DHS 0xfe00f0ff +#define MATCH_PSSHL_DWS 0x2a00601b +#define MASK_PSSHL_DWS 0xfe00f0ff +#define MATCH_PSSHL_HS 0xa800201b +#define MASK_PSSHL_HS 0xfe00707f +#define MATCH_PSSHL_WS 0xaa00201b +#define MASK_PSSHL_WS 0xfe00707f +#define MATCH_PSSHLR_DHS 0x3800601b +#define MASK_PSSHLR_DHS 0xfe00f0ff +#define MATCH_PSSHLR_DWS 0x3a00601b +#define MASK_PSSHLR_DWS 0xfe00f0ff +#define MATCH_PSSHLR_HS 0xb800201b +#define MASK_PSSHLR_HS 0xfe00707f +#define MATCH_PSSHLR_WS 0xba00201b +#define MASK_PSSHLR_WS 0xfe00707f +#define MATCH_PSSLAI_DH 0x5100601b +#define MASK_PSSLAI_DH 0xff00f0ff +#define MATCH_PSSLAI_DW 0x5200601b +#define MASK_PSSLAI_DW 0xfe00f0ff +#define MATCH_PSSLAI_H 0xd100201b +#define MASK_PSSLAI_H 0xff00707f +#define MATCH_PSSLAI_W 0xd200201b +#define MASK_PSSLAI_W 0xfe00707f +#define MATCH_PSSUB_B 0xd400003b +#define MASK_PSSUB_B 0xfe00707f +#define MATCH_PSSUB_DB 0xd400601b +#define MASK_PSSUB_DB 0xfe10f0ff +#define MATCH_PSSUB_DH 0xd000601b +#define MASK_PSSUB_DH 0xfe10f0ff +#define MATCH_PSSUB_DW 0xd200601b +#define MASK_PSSUB_DW 0xfe10f0ff +#define MATCH_PSSUB_H 0xd000003b +#define MASK_PSSUB_H 0xfe00707f +#define MATCH_PSSUB_W 0xd200003b +#define MASK_PSSUB_W 0xfe00707f +#define MATCH_PSSUBU_B 0xf400003b +#define MASK_PSSUBU_B 0xfe00707f +#define MATCH_PSSUBU_DB 0xf400601b +#define MASK_PSSUBU_DB 0xfe10f0ff +#define MATCH_PSSUBU_DH 0xf000601b +#define MASK_PSSUBU_DH 0xfe10f0ff +#define MATCH_PSSUBU_DW 0xf200601b +#define MASK_PSSUBU_DW 0xfe10f0ff +#define MATCH_PSSUBU_H 0xf000003b +#define MASK_PSSUBU_H 0xfe00707f +#define MATCH_PSSUBU_W 0xf200003b +#define MASK_PSSUBU_W 0xfe00707f +#define MATCH_PSUB_B 0xc400003b +#define MASK_PSUB_B 0xfe00707f +#define MATCH_PSUB_DB 0xc400601b +#define MASK_PSUB_DB 0xfe10f0ff +#define MATCH_PSUB_DH 0xc000601b +#define MASK_PSUB_DH 0xfe10f0ff +#define MATCH_PSUB_DW 0xc200601b +#define MASK_PSUB_DW 0xfe10f0ff +#define MATCH_PSUB_H 0xc000003b +#define MASK_PSUB_H 0xfe00707f +#define MATCH_PSUB_W 0xc200003b +#define MASK_PSUB_W 0xfe00707f +#define MATCH_PUSATI_DH 0x2100e01b +#define MASK_PUSATI_DH 0xff00f0ff +#define MATCH_PUSATI_DW 0x2200e01b +#define MASK_PUSATI_DW 0xfe00f0ff +#define MATCH_PUSATI_H 0xa100401b +#define MASK_PUSATI_H 0xff00707f +#define MATCH_PUSATI_W 0xa200401b +#define MASK_PUSATI_W 0xfe00707f +#define MATCH_PWADD_B 0x400209b +#define MASK_PWADD_B 0xfe0070ff +#define MATCH_PWADD_H 0x209b +#define MASK_PWADD_H 0xfe0070ff +#define MATCH_PWADDA_B 0xc00209b +#define MASK_PWADDA_B 0xfe0070ff +#define MATCH_PWADDA_H 0x800209b +#define MASK_PWADDA_H 0xfe0070ff +#define MATCH_PWADDAU_B 0x1c00209b +#define MASK_PWADDAU_B 0xfe0070ff +#define MATCH_PWADDAU_H 0x1800209b +#define MASK_PWADDAU_H 0xfe0070ff +#define MATCH_PWADDU_B 0x1400209b +#define MASK_PWADDU_B 0xfe0070ff +#define MATCH_PWADDU_H 0x1000209b +#define MASK_PWADDU_H 0xfe0070ff +#define MATCH_PWMACC_H 0x2800209b +#define MASK_PWMACC_H 0xfe0070ff +#define MATCH_PWMACCSU_H 0x6800209b +#define MASK_PWMACCSU_H 0xfe0070ff +#define MATCH_PWMACCU_H 0x3800209b +#define MASK_PWMACCU_H 0xfe0070ff +#define MATCH_PWMUL_B 0x2400209b +#define MASK_PWMUL_B 0xfe0070ff +#define MATCH_PWMUL_H 0x2000209b +#define MASK_PWMUL_H 0xfe0070ff +#define MATCH_PWMULSU_B 0x6400209b +#define MASK_PWMULSU_B 0xfe0070ff +#define MATCH_PWMULSU_H 0x6000209b +#define MASK_PWMULSU_H 0xfe0070ff +#define MATCH_PWMULU_B 0x3400209b +#define MASK_PWMULU_B 0xfe0070ff +#define MATCH_PWMULU_H 0x3000209b +#define MASK_PWMULU_H 0xfe0070ff +#define MATCH_PWSLA_BS 0x4800201b +#define MASK_PWSLA_BS 0xfe0070ff +#define MATCH_PWSLA_HS 0x4a00201b +#define MASK_PWSLA_HS 0xfe0070ff +#define MATCH_PWSLAI_B 0x4100201b +#define MASK_PWSLAI_B 0xff0070ff +#define MATCH_PWSLAI_H 0x4200201b +#define MASK_PWSLAI_H 0xfe0070ff +#define MATCH_PWSLL_BS 0x800201b +#define MASK_PWSLL_BS 0xfe0070ff +#define MATCH_PWSLL_HS 0xa00201b +#define MASK_PWSLL_HS 0xfe0070ff +#define MATCH_PWSLLI_B 0x100201b +#define MASK_PWSLLI_B 0xff0070ff +#define MATCH_PWSLLI_H 0x200201b +#define MASK_PWSLLI_H 0xfe0070ff +#define MATCH_PWSUB_B 0x4400209b +#define MASK_PWSUB_B 0xfe0070ff +#define MATCH_PWSUB_H 0x4000209b +#define MASK_PWSUB_H 0xfe0070ff +#define MATCH_PWSUBA_B 0x4c00209b +#define MASK_PWSUBA_B 0xfe0070ff +#define MATCH_PWSUBA_H 0x4800209b +#define MASK_PWSUBA_H 0xfe0070ff +#define MATCH_PWSUBAU_B 0x5c00209b +#define MASK_PWSUBAU_B 0xfe0070ff +#define MATCH_PWSUBAU_H 0x5800209b +#define MASK_PWSUBAU_H 0xfe0070ff +#define MATCH_PWSUBU_B 0x5400209b +#define MASK_PWSUBU_B 0xfe0070ff +#define MATCH_PWSUBU_H 0x5000209b +#define MASK_PWSUBU_H 0xfe0070ff #define MATCH_REM 0x2006033 #define MASK_REM 0xfe00707f #define MATCH_REMU 0x2007033 @@ -1469,10 +2577,16 @@ #define MASK_REMUW 0xfe00707f #define MATCH_REMW 0x200603b #define MASK_REMW 0xfe00707f +#define MATCH_REV 0x6bf05013 +#define MASK_REV 0xfff0707f +#define MATCH_REV16 0x6b005013 +#define MASK_REV16 0xfff0707f #define MATCH_REV8 0x6b805013 #define MASK_REV8 0xfff0707f #define MATCH_REV8_RV32 0x69805013 #define MASK_REV8_RV32 0xfff0707f +#define MATCH_REV_RV32 0x69f05013 +#define MASK_REV_RV32 0xfff0707f #define MATCH_ROL 0x60001033 #define MASK_ROL 0xfe00707f #define MATCH_ROLW 0x6000103b @@ -1485,6 +2599,14 @@ #define MASK_RORIW 0xfe00707f #define MATCH_RORW 0x6000503b #define MASK_RORW 0xfe00707f +#define MATCH_SADD 0x9200003b +#define MASK_SADD 0xfe00707f +#define MATCH_SADDU 0xb200003b +#define MASK_SADDU 0xfe00707f +#define MATCH_SATI 0xe400401b +#define MASK_SATI 0xfc00707f +#define MATCH_SATI_RV32 0xe200401b +#define MASK_SATI_RV32 0xfe00707f #define MATCH_SB 0x23 #define MASK_SB 0x707f #define MATCH_SB_RL 0x3a00002f @@ -1525,6 +2647,8 @@ #define MASK_SH3ADD_UW 0xfe00707f #define MATCH_SH_RL 0x3a00102f #define MASK_SH_RL 0xfa007fff +#define MATCH_SHA 0xee00201b +#define MASK_SHA 0xfe00707f #define MATCH_SHA256SIG0 0x10201013 #define MASK_SHA256SIG0 0xfff0707f #define MATCH_SHA256SIG1 0x10301013 @@ -1553,6 +2677,12 @@ #define MASK_SHA512SUM1 0xfff0707f #define MATCH_SHA512SUM1R 0x52000033 #define MASK_SHA512SUM1R 0xfe00707f +#define MATCH_SHAR 0xfe00201b +#define MASK_SHAR 0xfe00707f +#define MATCH_SHL 0xae00201b +#define MASK_SHL 0xfe00707f +#define MATCH_SHLR 0xbe00201b +#define MASK_SHLR 0xfe00707f #define MATCH_SINVAL_VMA 0x16000073 #define MASK_SINVAL_VMA 0xfe007fff #define MATCH_SLL 0x1033 @@ -1575,6 +2705,8 @@ #define MASK_SLTIU 0x707f #define MATCH_SLTU 0x3033 #define MASK_SLTU 0xfe00707f +#define MATCH_SLX 0x8e00103b +#define MASK_SLX 0xfe00707f #define MATCH_SM3P0 0x10801013 #define MASK_SM3P0 0xfff0707f #define MATCH_SM3P1 0x10901013 @@ -1591,6 +2723,10 @@ #define MASK_SRAI_RV32 0xfe00707f #define MATCH_SRAIW 0x4000501b #define MASK_SRAIW 0xfe00707f +#define MATCH_SRARI 0xd400401b +#define MASK_SRARI 0xfc00707f +#define MATCH_SRARI_RV32 0xd200401b +#define MASK_SRARI_RV32 0xfe00707f #define MATCH_SRAW 0x4000503b #define MASK_SRAW 0xfe00707f #define MATCH_SRET 0x10200073 @@ -1605,10 +2741,24 @@ #define MASK_SRLIW 0xfe00707f #define MATCH_SRLW 0x503b #define MASK_SRLW 0xfe00707f +#define MATCH_SRX 0xae00103b +#define MASK_SRX 0xfe00707f #define MATCH_SSAMOSWAP_D 0x4800302f #define MASK_SSAMOSWAP_D 0xf800707f #define MATCH_SSAMOSWAP_W 0x4800202f #define MASK_SSAMOSWAP_W 0xf800707f +#define MATCH_SSH1SADD 0xb200203b +#define MASK_SSH1SADD 0xfe00707f +#define MATCH_SSHA 0xea00201b +#define MASK_SSHA 0xfe00707f +#define MATCH_SSHAR 0xfa00201b +#define MASK_SSHAR 0xfe00707f +#define MATCH_SSHL 0xaa00201b +#define MASK_SSHL 0xfe00707f +#define MATCH_SSHLR 0xba00201b +#define MASK_SSHLR 0xfe00707f +#define MATCH_SSLAI 0xd200201b +#define MASK_SSLAI 0xfe00707f #define MATCH_SSPOPCHK_X1 0xcdc0c073 #define MASK_SSPOPCHK_X1 0xffffffff #define MATCH_SSPOPCHK_X5 0xcdc2c073 @@ -1619,8 +2769,14 @@ #define MASK_SSPUSH_X5 0xffffffff #define MATCH_SSRDP 0xcdc04073 #define MASK_SSRDP 0xfffff07f +#define MATCH_SSUB 0xd200003b +#define MASK_SSUB 0xfe00707f +#define MATCH_SSUBU 0xf200003b +#define MASK_SSUBU 0xfe00707f #define MATCH_SUB 0x40000033 #define MASK_SUB 0xfe00707f +#define MATCH_SUBD 0xc600601b +#define MASK_SUBD 0xfe10f0ff #define MATCH_SUBW 0x4000003b #define MASK_SUBW 0xfe00707f #define MATCH_SW 0x2023 @@ -1629,6 +2785,18 @@ #define MASK_SW_RL 0xfa007fff #define MATCH_UNZIP 0x8f05013 #define MASK_UNZIP 0xfff0707f +#define MATCH_UNZIP16HP 0xe600203b +#define MASK_UNZIP16HP 0xfe00707f +#define MATCH_UNZIP16P 0xe200203b +#define MASK_UNZIP16P 0xfe00707f +#define MATCH_UNZIP8HP 0xe400203b +#define MASK_UNZIP8HP 0xfe00707f +#define MATCH_UNZIP8P 0xe000203b +#define MASK_UNZIP8P 0xfe00707f +#define MATCH_USATI 0xa400401b +#define MASK_USATI 0xfc00707f +#define MATCH_USATI_RV32 0xa200401b +#define MASK_USATI_RV32 0xfe00707f #define MATCH_VAADD_VV 0x24002057 #define MASK_VAADD_VV 0xfc00707f #define MATCH_VAADD_VX 0x24006057 @@ -2533,12 +3701,52 @@ #define MASK_VZEXT_VF8 0xfc0ff07f #define MATCH_VZIP_VV 0xf8002057 #define MASK_VZIP_VV 0xfc00707f +#define MATCH_WADD 0x200209b +#define MASK_WADD 0xfe0070ff +#define MATCH_WADDA 0xa00209b +#define MASK_WADDA 0xfe0070ff +#define MATCH_WADDAU 0x1a00209b +#define MASK_WADDAU 0xfe0070ff +#define MATCH_WADDU 0x1200209b +#define MASK_WADDU 0xfe0070ff #define MATCH_WFI 0x10500073 #define MASK_WFI 0xffffffff +#define MATCH_WMACC 0x2a00209b +#define MASK_WMACC 0xfe0070ff +#define MATCH_WMACCSU 0x6a00209b +#define MASK_WMACCSU 0xfe0070ff +#define MATCH_WMACCU 0x3a00209b +#define MASK_WMACCU 0xfe0070ff +#define MATCH_WMUL 0x2200209b +#define MASK_WMUL 0xfe0070ff +#define MATCH_WMULSU 0x6200209b +#define MASK_WMULSU 0xfe0070ff +#define MATCH_WMULU 0x3200209b +#define MASK_WMULU 0xfe0070ff #define MATCH_WRS_NTO 0xd00073 #define MASK_WRS_NTO 0xffffffff #define MATCH_WRS_STO 0x1d00073 #define MASK_WRS_STO 0xffffffff +#define MATCH_WSLA 0x4e00201b +#define MASK_WSLA 0xfe0070ff +#define MATCH_WSLAI 0x4400201b +#define MASK_WSLAI 0xfc0070ff +#define MATCH_WSLL 0xe00201b +#define MASK_WSLL 0xfe0070ff +#define MATCH_WSLLI 0x400201b +#define MASK_WSLLI 0xfc0070ff +#define MATCH_WSUB 0x4200209b +#define MASK_WSUB 0xfe0070ff +#define MATCH_WSUBA 0x4a00209b +#define MASK_WSUBA 0xfe0070ff +#define MATCH_WSUBAU 0x5a00209b +#define MASK_WSUBAU 0xfe0070ff +#define MATCH_WSUBU 0x5200209b +#define MASK_WSUBU 0xfe0070ff +#define MATCH_WZIP16P 0x7a00201b +#define MASK_WZIP16P 0xfe0070ff +#define MATCH_WZIP8P 0x7800201b +#define MASK_WZIP8P 0xfe0070ff #define MATCH_XNOR 0x40004033 #define MASK_XNOR 0xfe00707f #define MATCH_XOR 0x4033 @@ -2555,6 +3763,14 @@ #define MASK_XPERM8 0xfe00707f #define MATCH_ZIP 0x8f01013 #define MASK_ZIP 0xfff0707f +#define MATCH_ZIP16HP 0xf600203b +#define MASK_ZIP16HP 0xfe00707f +#define MATCH_ZIP16P 0xf200203b +#define MASK_ZIP16P 0xfe00707f +#define MATCH_ZIP8HP 0xf400203b +#define MASK_ZIP8HP 0xfe00707f +#define MATCH_ZIP8P 0xf000203b +#define MASK_ZIP8P 0xfe00707f #define CSR_FFLAGS 0x1 #define CSR_FRM 0x2 @@ -3140,6 +4356,16 @@ #define INSN_FIELD_C_RS2_E 0x78 #define INSN_FIELD_RD_E 0xf00 #define INSN_FIELD_RS2_E 0x1e00000 +#define INSN_FIELD_P_IMM10 0x1ff8000 +#define INSN_FIELD_P_IMM8 0xff0000 +#define INSN_FIELD_P_W_UIMM3 0x700000 +#define INSN_FIELD_P_W_UIMM4 0xf00000 +#define INSN_FIELD_P_W_UIMM5 0x1f00000 +#define INSN_FIELD_P_W_UIMM6 0x3f00000 +#define INSN_FIELD_P_W 0x6000000 +#define INSN_FIELD_P_RD_P 0xf00 +#define INSN_FIELD_P_RS1_P 0xf0000 +#define INSN_FIELD_P_RS2_P 0x1e00000 #define INSN_FIELD_MOP_R_T_30 0x40000000 #define INSN_FIELD_MOP_R_T_27_26 0xc000000 #define INSN_FIELD_MOP_R_T_21_20 0x300000 @@ -3149,8 +4375,13 @@ #define INSN_FIELD_RS2_EQ_RS1 0x1f00000 #endif #ifdef DECLARE_INSN +DECLARE_INSN(aadd, MATCH_AADD, MASK_AADD) +DECLARE_INSN(aaddu, MATCH_AADDU, MASK_AADDU) +DECLARE_INSN(abs, MATCH_ABS, MASK_ABS) +DECLARE_INSN(absw, MATCH_ABSW, MASK_ABSW) DECLARE_INSN(add, MATCH_ADD, MASK_ADD) DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW) +DECLARE_INSN(addd, MATCH_ADDD, MASK_ADDD) DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI) DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW) DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW) @@ -3209,6 +4440,8 @@ DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) DECLARE_INSN(and, MATCH_AND, MASK_AND) DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI) DECLARE_INSN(andn, MATCH_ANDN, MASK_ANDN) +DECLARE_INSN(asub, MATCH_ASUB, MASK_ASUB) +DECLARE_INSN(asubu, MATCH_ASUBU, MASK_ASUBU) DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC) DECLARE_INSN(bclr, MATCH_BCLR, MASK_BCLR) DECLARE_INSN(bclri, MATCH_BCLRI, MASK_BCLRI) @@ -3299,6 +4532,8 @@ DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO) DECLARE_INSN(clmul, MATCH_CLMUL, MASK_CLMUL) DECLARE_INSN(clmulh, MATCH_CLMULH, MASK_CLMULH) DECLARE_INSN(clmulr, MATCH_CLMULR, MASK_CLMULR) +DECLARE_INSN(cls, MATCH_CLS, MASK_CLS) +DECLARE_INSN(clsw, MATCH_CLSW, MASK_CLSW) DECLARE_INSN(clz, MATCH_CLZ, MASK_CLZ) DECLARE_INSN(clzw, MATCH_CLZW, MASK_CLZW) DECLARE_INSN(cm_jalt, MATCH_CM_JALT, MASK_CM_JALT) @@ -3528,8 +4763,35 @@ DECLARE_INSN(lui, MATCH_LUI, MASK_LUI) DECLARE_INSN(lw, MATCH_LW, MASK_LW) DECLARE_INSN(lw_aq, MATCH_LW_AQ, MASK_LW_AQ) DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU) +DECLARE_INSN(macc_h00, MATCH_MACC_H00, MASK_MACC_H00) +DECLARE_INSN(macc_h01, MATCH_MACC_H01, MASK_MACC_H01) +DECLARE_INSN(macc_h11, MATCH_MACC_H11, MASK_MACC_H11) +DECLARE_INSN(macc_w00, MATCH_MACC_W00, MASK_MACC_W00) +DECLARE_INSN(macc_w01, MATCH_MACC_W01, MASK_MACC_W01) +DECLARE_INSN(macc_w11, MATCH_MACC_W11, MASK_MACC_W11) +DECLARE_INSN(maccsu_h00, MATCH_MACCSU_H00, MASK_MACCSU_H00) +DECLARE_INSN(maccsu_h11, MATCH_MACCSU_H11, MASK_MACCSU_H11) +DECLARE_INSN(maccsu_w00, MATCH_MACCSU_W00, MASK_MACCSU_W00) +DECLARE_INSN(maccsu_w11, MATCH_MACCSU_W11, MASK_MACCSU_W11) +DECLARE_INSN(maccu_h00, MATCH_MACCU_H00, MASK_MACCU_H00) +DECLARE_INSN(maccu_h01, MATCH_MACCU_H01, MASK_MACCU_H01) +DECLARE_INSN(maccu_h11, MATCH_MACCU_H11, MASK_MACCU_H11) +DECLARE_INSN(maccu_w00, MATCH_MACCU_W00, MASK_MACCU_W00) +DECLARE_INSN(maccu_w01, MATCH_MACCU_W01, MASK_MACCU_W01) +DECLARE_INSN(maccu_w11, MATCH_MACCU_W11, MASK_MACCU_W11) DECLARE_INSN(max, MATCH_MAX, MASK_MAX) DECLARE_INSN(maxu, MATCH_MAXU, MASK_MAXU) +DECLARE_INSN(merge, MATCH_MERGE, MASK_MERGE) +DECLARE_INSN(mhacc, MATCH_MHACC, MASK_MHACC) +DECLARE_INSN(mhacc_h0, MATCH_MHACC_H0, MASK_MHACC_H0) +DECLARE_INSN(mhacc_h1, MATCH_MHACC_H1, MASK_MHACC_H1) +DECLARE_INSN(mhaccsu, MATCH_MHACCSU, MASK_MHACCSU) +DECLARE_INSN(mhaccsu_h0, MATCH_MHACCSU_H0, MASK_MHACCSU_H0) +DECLARE_INSN(mhaccsu_h1, MATCH_MHACCSU_H1, MASK_MHACCSU_H1) +DECLARE_INSN(mhaccu, MATCH_MHACCU, MASK_MHACCU) +DECLARE_INSN(mhracc, MATCH_MHRACC, MASK_MHRACC) +DECLARE_INSN(mhraccsu, MATCH_MHRACCSU, MASK_MHRACCSU) +DECLARE_INSN(mhraccu, MATCH_MHRACCU, MASK_MHRACCU) DECLARE_INSN(min, MATCH_MIN, MASK_MIN) DECLARE_INSN(minu, MATCH_MINU, MASK_MINU) DECLARE_INSN(mnret, MATCH_MNRET, MASK_MNRET) @@ -3575,35 +4837,560 @@ DECLARE_INSN(mop_rr_5, MATCH_MOP_RR_5, MASK_MOP_RR_5) DECLARE_INSN(mop_rr_6, MATCH_MOP_RR_6, MASK_MOP_RR_6) DECLARE_INSN(mop_rr_7, MATCH_MOP_RR_7, MASK_MOP_RR_7) DECLARE_INSN(mop_rr_N, MATCH_MOP_RR_N, MASK_MOP_RR_N) +DECLARE_INSN(mqacc_h00, MATCH_MQACC_H00, MASK_MQACC_H00) +DECLARE_INSN(mqacc_h01, MATCH_MQACC_H01, MASK_MQACC_H01) +DECLARE_INSN(mqacc_h11, MATCH_MQACC_H11, MASK_MQACC_H11) +DECLARE_INSN(mqacc_w00, MATCH_MQACC_W00, MASK_MQACC_W00) +DECLARE_INSN(mqacc_w01, MATCH_MQACC_W01, MASK_MQACC_W01) +DECLARE_INSN(mqacc_w11, MATCH_MQACC_W11, MASK_MQACC_W11) +DECLARE_INSN(mqracc_h00, MATCH_MQRACC_H00, MASK_MQRACC_H00) +DECLARE_INSN(mqracc_h01, MATCH_MQRACC_H01, MASK_MQRACC_H01) +DECLARE_INSN(mqracc_h11, MATCH_MQRACC_H11, MASK_MQRACC_H11) +DECLARE_INSN(mqracc_w00, MATCH_MQRACC_W00, MASK_MQRACC_W00) +DECLARE_INSN(mqracc_w01, MATCH_MQRACC_W01, MASK_MQRACC_W01) +DECLARE_INSN(mqracc_w11, MATCH_MQRACC_W11, MASK_MQRACC_W11) +DECLARE_INSN(mqrwacc, MATCH_MQRWACC, MASK_MQRWACC) +DECLARE_INSN(mqwacc, MATCH_MQWACC, MASK_MQWACC) DECLARE_INSN(mret, MATCH_MRET, MASK_MRET) +DECLARE_INSN(mseq, MATCH_MSEQ, MASK_MSEQ) +DECLARE_INSN(mslt, MATCH_MSLT, MASK_MSLT) +DECLARE_INSN(msltu, MATCH_MSLTU, MASK_MSLTU) DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) +DECLARE_INSN(mul_h00, MATCH_MUL_H00, MASK_MUL_H00) +DECLARE_INSN(mul_h01, MATCH_MUL_H01, MASK_MUL_H01) +DECLARE_INSN(mul_h11, MATCH_MUL_H11, MASK_MUL_H11) +DECLARE_INSN(mul_w00, MATCH_MUL_W00, MASK_MUL_W00) +DECLARE_INSN(mul_w01, MATCH_MUL_W01, MASK_MUL_W01) +DECLARE_INSN(mul_w11, MATCH_MUL_W11, MASK_MUL_W11) DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) +DECLARE_INSN(mulh_h0, MATCH_MULH_H0, MASK_MULH_H0) +DECLARE_INSN(mulh_h1, MATCH_MULH_H1, MASK_MULH_H1) +DECLARE_INSN(mulhr, MATCH_MULHR, MASK_MULHR) +DECLARE_INSN(mulhrsu, MATCH_MULHRSU, MASK_MULHRSU) +DECLARE_INSN(mulhru, MATCH_MULHRU, MASK_MULHRU) DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) +DECLARE_INSN(mulhsu_h0, MATCH_MULHSU_H0, MASK_MULHSU_H0) +DECLARE_INSN(mulhsu_h1, MATCH_MULHSU_H1, MASK_MULHSU_H1) DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) +DECLARE_INSN(mulq, MATCH_MULQ, MASK_MULQ) +DECLARE_INSN(mulqr, MATCH_MULQR, MASK_MULQR) +DECLARE_INSN(mulsu_h00, MATCH_MULSU_H00, MASK_MULSU_H00) +DECLARE_INSN(mulsu_h11, MATCH_MULSU_H11, MASK_MULSU_H11) +DECLARE_INSN(mulsu_w00, MATCH_MULSU_W00, MASK_MULSU_W00) +DECLARE_INSN(mulsu_w11, MATCH_MULSU_W11, MASK_MULSU_W11) +DECLARE_INSN(mulu_h00, MATCH_MULU_H00, MASK_MULU_H00) +DECLARE_INSN(mulu_h01, MATCH_MULU_H01, MASK_MULU_H01) +DECLARE_INSN(mulu_h11, MATCH_MULU_H11, MASK_MULU_H11) +DECLARE_INSN(mulu_w00, MATCH_MULU_W00, MASK_MULU_W00) +DECLARE_INSN(mulu_w01, MATCH_MULU_W01, MASK_MULU_W01) +DECLARE_INSN(mulu_w11, MATCH_MULU_W11, MASK_MULU_W11) DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) +DECLARE_INSN(mvm, MATCH_MVM, MASK_MVM) +DECLARE_INSN(mvmn, MATCH_MVMN, MASK_MVMN) +DECLARE_INSN(nclip, MATCH_NCLIP, MASK_NCLIP) +DECLARE_INSN(nclipi, MATCH_NCLIPI, MASK_NCLIPI) +DECLARE_INSN(nclipiu, MATCH_NCLIPIU, MASK_NCLIPIU) +DECLARE_INSN(nclipr, MATCH_NCLIPR, MASK_NCLIPR) +DECLARE_INSN(nclipri, MATCH_NCLIPRI, MASK_NCLIPRI) +DECLARE_INSN(nclipriu, MATCH_NCLIPRIU, MASK_NCLIPRIU) +DECLARE_INSN(nclipru, MATCH_NCLIPRU, MASK_NCLIPRU) +DECLARE_INSN(nclipu, MATCH_NCLIPU, MASK_NCLIPU) +DECLARE_INSN(nsra, MATCH_NSRA, MASK_NSRA) +DECLARE_INSN(nsrai, MATCH_NSRAI, MASK_NSRAI) +DECLARE_INSN(nsrar, MATCH_NSRAR, MASK_NSRAR) +DECLARE_INSN(nsrari, MATCH_NSRARI, MASK_NSRARI) +DECLARE_INSN(nsrl, MATCH_NSRL, MASK_NSRL) +DECLARE_INSN(nsrli, MATCH_NSRLI, MASK_NSRLI) DECLARE_INSN(or, MATCH_OR, MASK_OR) DECLARE_INSN(orc_b, MATCH_ORC_B, MASK_ORC_B) DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) DECLARE_INSN(orn, MATCH_ORN, MASK_ORN) +DECLARE_INSN(paadd_b, MATCH_PAADD_B, MASK_PAADD_B) +DECLARE_INSN(paadd_db, MATCH_PAADD_DB, MASK_PAADD_DB) +DECLARE_INSN(paadd_dh, MATCH_PAADD_DH, MASK_PAADD_DH) +DECLARE_INSN(paadd_dw, MATCH_PAADD_DW, MASK_PAADD_DW) +DECLARE_INSN(paadd_h, MATCH_PAADD_H, MASK_PAADD_H) +DECLARE_INSN(paadd_w, MATCH_PAADD_W, MASK_PAADD_W) +DECLARE_INSN(paaddu_b, MATCH_PAADDU_B, MASK_PAADDU_B) +DECLARE_INSN(paaddu_db, MATCH_PAADDU_DB, MASK_PAADDU_DB) +DECLARE_INSN(paaddu_dh, MATCH_PAADDU_DH, MASK_PAADDU_DH) +DECLARE_INSN(paaddu_dw, MATCH_PAADDU_DW, MASK_PAADDU_DW) +DECLARE_INSN(paaddu_h, MATCH_PAADDU_H, MASK_PAADDU_H) +DECLARE_INSN(paaddu_w, MATCH_PAADDU_W, MASK_PAADDU_W) +DECLARE_INSN(paas_dhx, MATCH_PAAS_DHX, MASK_PAAS_DHX) +DECLARE_INSN(paas_hx, MATCH_PAAS_HX, MASK_PAAS_HX) +DECLARE_INSN(paas_wx, MATCH_PAAS_WX, MASK_PAAS_WX) +DECLARE_INSN(pabd_b, MATCH_PABD_B, MASK_PABD_B) +DECLARE_INSN(pabd_db, MATCH_PABD_DB, MASK_PABD_DB) +DECLARE_INSN(pabd_dh, MATCH_PABD_DH, MASK_PABD_DH) +DECLARE_INSN(pabd_h, MATCH_PABD_H, MASK_PABD_H) +DECLARE_INSN(pabdsumau_b, MATCH_PABDSUMAU_B, MASK_PABDSUMAU_B) +DECLARE_INSN(pabdsumu_b, MATCH_PABDSUMU_B, MASK_PABDSUMU_B) +DECLARE_INSN(pabdu_b, MATCH_PABDU_B, MASK_PABDU_B) +DECLARE_INSN(pabdu_db, MATCH_PABDU_DB, MASK_PABDU_DB) +DECLARE_INSN(pabdu_dh, MATCH_PABDU_DH, MASK_PABDU_DH) +DECLARE_INSN(pabdu_h, MATCH_PABDU_H, MASK_PABDU_H) DECLARE_INSN(pack, MATCH_PACK, MASK_PACK) DECLARE_INSN(packh, MATCH_PACKH, MASK_PACKH) DECLARE_INSN(packw, MATCH_PACKW, MASK_PACKW) +DECLARE_INSN(padd_b, MATCH_PADD_B, MASK_PADD_B) +DECLARE_INSN(padd_bs, MATCH_PADD_BS, MASK_PADD_BS) +DECLARE_INSN(padd_db, MATCH_PADD_DB, MASK_PADD_DB) +DECLARE_INSN(padd_dbs, MATCH_PADD_DBS, MASK_PADD_DBS) +DECLARE_INSN(padd_dh, MATCH_PADD_DH, MASK_PADD_DH) +DECLARE_INSN(padd_dhs, MATCH_PADD_DHS, MASK_PADD_DHS) +DECLARE_INSN(padd_dw, MATCH_PADD_DW, MASK_PADD_DW) +DECLARE_INSN(padd_dws, MATCH_PADD_DWS, MASK_PADD_DWS) +DECLARE_INSN(padd_h, MATCH_PADD_H, MASK_PADD_H) +DECLARE_INSN(padd_hs, MATCH_PADD_HS, MASK_PADD_HS) +DECLARE_INSN(padd_w, MATCH_PADD_W, MASK_PADD_W) +DECLARE_INSN(padd_ws, MATCH_PADD_WS, MASK_PADD_WS) +DECLARE_INSN(pas_dhx, MATCH_PAS_DHX, MASK_PAS_DHX) +DECLARE_INSN(pas_hx, MATCH_PAS_HX, MASK_PAS_HX) +DECLARE_INSN(pas_wx, MATCH_PAS_WX, MASK_PAS_WX) +DECLARE_INSN(pasa_dhx, MATCH_PASA_DHX, MASK_PASA_DHX) +DECLARE_INSN(pasa_hx, MATCH_PASA_HX, MASK_PASA_HX) +DECLARE_INSN(pasa_wx, MATCH_PASA_WX, MASK_PASA_WX) +DECLARE_INSN(pasub_b, MATCH_PASUB_B, MASK_PASUB_B) +DECLARE_INSN(pasub_db, MATCH_PASUB_DB, MASK_PASUB_DB) +DECLARE_INSN(pasub_dh, MATCH_PASUB_DH, MASK_PASUB_DH) +DECLARE_INSN(pasub_dw, MATCH_PASUB_DW, MASK_PASUB_DW) +DECLARE_INSN(pasub_h, MATCH_PASUB_H, MASK_PASUB_H) +DECLARE_INSN(pasub_w, MATCH_PASUB_W, MASK_PASUB_W) +DECLARE_INSN(pasubu_b, MATCH_PASUBU_B, MASK_PASUBU_B) +DECLARE_INSN(pasubu_db, MATCH_PASUBU_DB, MASK_PASUBU_DB) +DECLARE_INSN(pasubu_dh, MATCH_PASUBU_DH, MASK_PASUBU_DH) +DECLARE_INSN(pasubu_dw, MATCH_PASUBU_DW, MASK_PASUBU_DW) +DECLARE_INSN(pasubu_h, MATCH_PASUBU_H, MASK_PASUBU_H) +DECLARE_INSN(pasubu_w, MATCH_PASUBU_W, MASK_PASUBU_W) DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE) +DECLARE_INSN(pli_b, MATCH_PLI_B, MASK_PLI_B) +DECLARE_INSN(pli_db, MATCH_PLI_DB, MASK_PLI_DB) +DECLARE_INSN(pli_dh, MATCH_PLI_DH, MASK_PLI_DH) +DECLARE_INSN(pli_h, MATCH_PLI_H, MASK_PLI_H) +DECLARE_INSN(pli_w, MATCH_PLI_W, MASK_PLI_W) +DECLARE_INSN(plui_dh, MATCH_PLUI_DH, MASK_PLUI_DH) +DECLARE_INSN(plui_h, MATCH_PLUI_H, MASK_PLUI_H) +DECLARE_INSN(plui_w, MATCH_PLUI_W, MASK_PLUI_W) +DECLARE_INSN(pm2add_h, MATCH_PM2ADD_H, MASK_PM2ADD_H) +DECLARE_INSN(pm2add_hx, MATCH_PM2ADD_HX, MASK_PM2ADD_HX) +DECLARE_INSN(pm2add_w, MATCH_PM2ADD_W, MASK_PM2ADD_W) +DECLARE_INSN(pm2add_wx, MATCH_PM2ADD_WX, MASK_PM2ADD_WX) +DECLARE_INSN(pm2adda_h, MATCH_PM2ADDA_H, MASK_PM2ADDA_H) +DECLARE_INSN(pm2adda_hx, MATCH_PM2ADDA_HX, MASK_PM2ADDA_HX) +DECLARE_INSN(pm2adda_w, MATCH_PM2ADDA_W, MASK_PM2ADDA_W) +DECLARE_INSN(pm2adda_wx, MATCH_PM2ADDA_WX, MASK_PM2ADDA_WX) +DECLARE_INSN(pm2addasu_h, MATCH_PM2ADDASU_H, MASK_PM2ADDASU_H) +DECLARE_INSN(pm2addasu_w, MATCH_PM2ADDASU_W, MASK_PM2ADDASU_W) +DECLARE_INSN(pm2addau_h, MATCH_PM2ADDAU_H, MASK_PM2ADDAU_H) +DECLARE_INSN(pm2addau_w, MATCH_PM2ADDAU_W, MASK_PM2ADDAU_W) +DECLARE_INSN(pm2addsu_h, MATCH_PM2ADDSU_H, MASK_PM2ADDSU_H) +DECLARE_INSN(pm2addsu_w, MATCH_PM2ADDSU_W, MASK_PM2ADDSU_W) +DECLARE_INSN(pm2addu_h, MATCH_PM2ADDU_H, MASK_PM2ADDU_H) +DECLARE_INSN(pm2addu_w, MATCH_PM2ADDU_W, MASK_PM2ADDU_W) +DECLARE_INSN(pm2sadd_h, MATCH_PM2SADD_H, MASK_PM2SADD_H) +DECLARE_INSN(pm2sadd_hx, MATCH_PM2SADD_HX, MASK_PM2SADD_HX) +DECLARE_INSN(pm2sub_h, MATCH_PM2SUB_H, MASK_PM2SUB_H) +DECLARE_INSN(pm2sub_hx, MATCH_PM2SUB_HX, MASK_PM2SUB_HX) +DECLARE_INSN(pm2sub_w, MATCH_PM2SUB_W, MASK_PM2SUB_W) +DECLARE_INSN(pm2sub_wx, MATCH_PM2SUB_WX, MASK_PM2SUB_WX) +DECLARE_INSN(pm2suba_h, MATCH_PM2SUBA_H, MASK_PM2SUBA_H) +DECLARE_INSN(pm2suba_hx, MATCH_PM2SUBA_HX, MASK_PM2SUBA_HX) +DECLARE_INSN(pm2suba_w, MATCH_PM2SUBA_W, MASK_PM2SUBA_W) +DECLARE_INSN(pm2suba_wx, MATCH_PM2SUBA_WX, MASK_PM2SUBA_WX) +DECLARE_INSN(pm2wadd_h, MATCH_PM2WADD_H, MASK_PM2WADD_H) +DECLARE_INSN(pm2wadd_hx, MATCH_PM2WADD_HX, MASK_PM2WADD_HX) +DECLARE_INSN(pm2wadda_h, MATCH_PM2WADDA_H, MASK_PM2WADDA_H) +DECLARE_INSN(pm2wadda_hx, MATCH_PM2WADDA_HX, MASK_PM2WADDA_HX) +DECLARE_INSN(pm2waddasu_h, MATCH_PM2WADDASU_H, MASK_PM2WADDASU_H) +DECLARE_INSN(pm2waddau_h, MATCH_PM2WADDAU_H, MASK_PM2WADDAU_H) +DECLARE_INSN(pm2waddsu_h, MATCH_PM2WADDSU_H, MASK_PM2WADDSU_H) +DECLARE_INSN(pm2waddu_h, MATCH_PM2WADDU_H, MASK_PM2WADDU_H) +DECLARE_INSN(pm2wsub_h, MATCH_PM2WSUB_H, MASK_PM2WSUB_H) +DECLARE_INSN(pm2wsub_hx, MATCH_PM2WSUB_HX, MASK_PM2WSUB_HX) +DECLARE_INSN(pm2wsuba_h, MATCH_PM2WSUBA_H, MASK_PM2WSUBA_H) +DECLARE_INSN(pm2wsuba_hx, MATCH_PM2WSUBA_HX, MASK_PM2WSUBA_HX) +DECLARE_INSN(pm4add_b, MATCH_PM4ADD_B, MASK_PM4ADD_B) +DECLARE_INSN(pm4add_h, MATCH_PM4ADD_H, MASK_PM4ADD_H) +DECLARE_INSN(pm4adda_b, MATCH_PM4ADDA_B, MASK_PM4ADDA_B) +DECLARE_INSN(pm4adda_h, MATCH_PM4ADDA_H, MASK_PM4ADDA_H) +DECLARE_INSN(pm4addasu_b, MATCH_PM4ADDASU_B, MASK_PM4ADDASU_B) +DECLARE_INSN(pm4addasu_h, MATCH_PM4ADDASU_H, MASK_PM4ADDASU_H) +DECLARE_INSN(pm4addau_b, MATCH_PM4ADDAU_B, MASK_PM4ADDAU_B) +DECLARE_INSN(pm4addau_h, MATCH_PM4ADDAU_H, MASK_PM4ADDAU_H) +DECLARE_INSN(pm4addsu_b, MATCH_PM4ADDSU_B, MASK_PM4ADDSU_B) +DECLARE_INSN(pm4addsu_h, MATCH_PM4ADDSU_H, MASK_PM4ADDSU_H) +DECLARE_INSN(pm4addu_b, MATCH_PM4ADDU_B, MASK_PM4ADDU_B) +DECLARE_INSN(pm4addu_h, MATCH_PM4ADDU_H, MASK_PM4ADDU_H) +DECLARE_INSN(pmacc_w_h00, MATCH_PMACC_W_H00, MASK_PMACC_W_H00) +DECLARE_INSN(pmacc_w_h01, MATCH_PMACC_W_H01, MASK_PMACC_W_H01) +DECLARE_INSN(pmacc_w_h11, MATCH_PMACC_W_H11, MASK_PMACC_W_H11) +DECLARE_INSN(pmaccsu_w_h00, MATCH_PMACCSU_W_H00, MASK_PMACCSU_W_H00) +DECLARE_INSN(pmaccsu_w_h11, MATCH_PMACCSU_W_H11, MASK_PMACCSU_W_H11) +DECLARE_INSN(pmaccu_w_h00, MATCH_PMACCU_W_H00, MASK_PMACCU_W_H00) +DECLARE_INSN(pmaccu_w_h01, MATCH_PMACCU_W_H01, MASK_PMACCU_W_H01) +DECLARE_INSN(pmaccu_w_h11, MATCH_PMACCU_W_H11, MASK_PMACCU_W_H11) +DECLARE_INSN(pmax_b, MATCH_PMAX_B, MASK_PMAX_B) +DECLARE_INSN(pmax_db, MATCH_PMAX_DB, MASK_PMAX_DB) +DECLARE_INSN(pmax_dh, MATCH_PMAX_DH, MASK_PMAX_DH) +DECLARE_INSN(pmax_dw, MATCH_PMAX_DW, MASK_PMAX_DW) +DECLARE_INSN(pmax_h, MATCH_PMAX_H, MASK_PMAX_H) +DECLARE_INSN(pmax_w, MATCH_PMAX_W, MASK_PMAX_W) +DECLARE_INSN(pmaxu_b, MATCH_PMAXU_B, MASK_PMAXU_B) +DECLARE_INSN(pmaxu_db, MATCH_PMAXU_DB, MASK_PMAXU_DB) +DECLARE_INSN(pmaxu_dh, MATCH_PMAXU_DH, MASK_PMAXU_DH) +DECLARE_INSN(pmaxu_dw, MATCH_PMAXU_DW, MASK_PMAXU_DW) +DECLARE_INSN(pmaxu_h, MATCH_PMAXU_H, MASK_PMAXU_H) +DECLARE_INSN(pmaxu_w, MATCH_PMAXU_W, MASK_PMAXU_W) +DECLARE_INSN(pmhacc_h, MATCH_PMHACC_H, MASK_PMHACC_H) +DECLARE_INSN(pmhacc_h_b0, MATCH_PMHACC_H_B0, MASK_PMHACC_H_B0) +DECLARE_INSN(pmhacc_h_b1, MATCH_PMHACC_H_B1, MASK_PMHACC_H_B1) +DECLARE_INSN(pmhacc_w, MATCH_PMHACC_W, MASK_PMHACC_W) +DECLARE_INSN(pmhacc_w_h0, MATCH_PMHACC_W_H0, MASK_PMHACC_W_H0) +DECLARE_INSN(pmhacc_w_h1, MATCH_PMHACC_W_H1, MASK_PMHACC_W_H1) +DECLARE_INSN(pmhaccsu_h, MATCH_PMHACCSU_H, MASK_PMHACCSU_H) +DECLARE_INSN(pmhaccsu_h_b0, MATCH_PMHACCSU_H_B0, MASK_PMHACCSU_H_B0) +DECLARE_INSN(pmhaccsu_h_b1, MATCH_PMHACCSU_H_B1, MASK_PMHACCSU_H_B1) +DECLARE_INSN(pmhaccsu_w, MATCH_PMHACCSU_W, MASK_PMHACCSU_W) +DECLARE_INSN(pmhaccsu_w_h0, MATCH_PMHACCSU_W_H0, MASK_PMHACCSU_W_H0) +DECLARE_INSN(pmhaccsu_w_h1, MATCH_PMHACCSU_W_H1, MASK_PMHACCSU_W_H1) +DECLARE_INSN(pmhaccu_h, MATCH_PMHACCU_H, MASK_PMHACCU_H) +DECLARE_INSN(pmhaccu_w, MATCH_PMHACCU_W, MASK_PMHACCU_W) +DECLARE_INSN(pmhracc_h, MATCH_PMHRACC_H, MASK_PMHRACC_H) +DECLARE_INSN(pmhracc_w, MATCH_PMHRACC_W, MASK_PMHRACC_W) +DECLARE_INSN(pmhraccsu_h, MATCH_PMHRACCSU_H, MASK_PMHRACCSU_H) +DECLARE_INSN(pmhraccsu_w, MATCH_PMHRACCSU_W, MASK_PMHRACCSU_W) +DECLARE_INSN(pmhraccu_h, MATCH_PMHRACCU_H, MASK_PMHRACCU_H) +DECLARE_INSN(pmhraccu_w, MATCH_PMHRACCU_W, MASK_PMHRACCU_W) +DECLARE_INSN(pmin_b, MATCH_PMIN_B, MASK_PMIN_B) +DECLARE_INSN(pmin_db, MATCH_PMIN_DB, MASK_PMIN_DB) +DECLARE_INSN(pmin_dh, MATCH_PMIN_DH, MASK_PMIN_DH) +DECLARE_INSN(pmin_dw, MATCH_PMIN_DW, MASK_PMIN_DW) +DECLARE_INSN(pmin_h, MATCH_PMIN_H, MASK_PMIN_H) +DECLARE_INSN(pmin_w, MATCH_PMIN_W, MASK_PMIN_W) +DECLARE_INSN(pminu_b, MATCH_PMINU_B, MASK_PMINU_B) +DECLARE_INSN(pminu_db, MATCH_PMINU_DB, MASK_PMINU_DB) +DECLARE_INSN(pminu_dh, MATCH_PMINU_DH, MASK_PMINU_DH) +DECLARE_INSN(pminu_dw, MATCH_PMINU_DW, MASK_PMINU_DW) +DECLARE_INSN(pminu_h, MATCH_PMINU_H, MASK_PMINU_H) +DECLARE_INSN(pminu_w, MATCH_PMINU_W, MASK_PMINU_W) +DECLARE_INSN(pmq2add_h, MATCH_PMQ2ADD_H, MASK_PMQ2ADD_H) +DECLARE_INSN(pmq2add_w, MATCH_PMQ2ADD_W, MASK_PMQ2ADD_W) +DECLARE_INSN(pmq2adda_h, MATCH_PMQ2ADDA_H, MASK_PMQ2ADDA_H) +DECLARE_INSN(pmq2adda_w, MATCH_PMQ2ADDA_W, MASK_PMQ2ADDA_W) +DECLARE_INSN(pmqacc_w_h00, MATCH_PMQACC_W_H00, MASK_PMQACC_W_H00) +DECLARE_INSN(pmqacc_w_h01, MATCH_PMQACC_W_H01, MASK_PMQACC_W_H01) +DECLARE_INSN(pmqacc_w_h11, MATCH_PMQACC_W_H11, MASK_PMQACC_W_H11) +DECLARE_INSN(pmqr2add_h, MATCH_PMQR2ADD_H, MASK_PMQR2ADD_H) +DECLARE_INSN(pmqr2add_w, MATCH_PMQR2ADD_W, MASK_PMQR2ADD_W) +DECLARE_INSN(pmqr2adda_h, MATCH_PMQR2ADDA_H, MASK_PMQR2ADDA_H) +DECLARE_INSN(pmqr2adda_w, MATCH_PMQR2ADDA_W, MASK_PMQR2ADDA_W) +DECLARE_INSN(pmqracc_w_h00, MATCH_PMQRACC_W_H00, MASK_PMQRACC_W_H00) +DECLARE_INSN(pmqracc_w_h01, MATCH_PMQRACC_W_H01, MASK_PMQRACC_W_H01) +DECLARE_INSN(pmqracc_w_h11, MATCH_PMQRACC_W_H11, MASK_PMQRACC_W_H11) +DECLARE_INSN(pmqrwacc_h, MATCH_PMQRWACC_H, MASK_PMQRWACC_H) +DECLARE_INSN(pmqwacc_h, MATCH_PMQWACC_H, MASK_PMQWACC_H) +DECLARE_INSN(pmseq_b, MATCH_PMSEQ_B, MASK_PMSEQ_B) +DECLARE_INSN(pmseq_db, MATCH_PMSEQ_DB, MASK_PMSEQ_DB) +DECLARE_INSN(pmseq_dh, MATCH_PMSEQ_DH, MASK_PMSEQ_DH) +DECLARE_INSN(pmseq_dw, MATCH_PMSEQ_DW, MASK_PMSEQ_DW) +DECLARE_INSN(pmseq_h, MATCH_PMSEQ_H, MASK_PMSEQ_H) +DECLARE_INSN(pmseq_w, MATCH_PMSEQ_W, MASK_PMSEQ_W) +DECLARE_INSN(pmslt_b, MATCH_PMSLT_B, MASK_PMSLT_B) +DECLARE_INSN(pmslt_db, MATCH_PMSLT_DB, MASK_PMSLT_DB) +DECLARE_INSN(pmslt_dh, MATCH_PMSLT_DH, MASK_PMSLT_DH) +DECLARE_INSN(pmslt_dw, MATCH_PMSLT_DW, MASK_PMSLT_DW) +DECLARE_INSN(pmslt_h, MATCH_PMSLT_H, MASK_PMSLT_H) +DECLARE_INSN(pmslt_w, MATCH_PMSLT_W, MASK_PMSLT_W) +DECLARE_INSN(pmsltu_b, MATCH_PMSLTU_B, MASK_PMSLTU_B) +DECLARE_INSN(pmsltu_db, MATCH_PMSLTU_DB, MASK_PMSLTU_DB) +DECLARE_INSN(pmsltu_dh, MATCH_PMSLTU_DH, MASK_PMSLTU_DH) +DECLARE_INSN(pmsltu_dw, MATCH_PMSLTU_DW, MASK_PMSLTU_DW) +DECLARE_INSN(pmsltu_h, MATCH_PMSLTU_H, MASK_PMSLTU_H) +DECLARE_INSN(pmsltu_w, MATCH_PMSLTU_W, MASK_PMSLTU_W) +DECLARE_INSN(pmul_h_b00, MATCH_PMUL_H_B00, MASK_PMUL_H_B00) +DECLARE_INSN(pmul_h_b01, MATCH_PMUL_H_B01, MASK_PMUL_H_B01) +DECLARE_INSN(pmul_h_b11, MATCH_PMUL_H_B11, MASK_PMUL_H_B11) +DECLARE_INSN(pmul_w_h00, MATCH_PMUL_W_H00, MASK_PMUL_W_H00) +DECLARE_INSN(pmul_w_h01, MATCH_PMUL_W_H01, MASK_PMUL_W_H01) +DECLARE_INSN(pmul_w_h11, MATCH_PMUL_W_H11, MASK_PMUL_W_H11) +DECLARE_INSN(pmulh_h, MATCH_PMULH_H, MASK_PMULH_H) +DECLARE_INSN(pmulh_h_b0, MATCH_PMULH_H_B0, MASK_PMULH_H_B0) +DECLARE_INSN(pmulh_h_b1, MATCH_PMULH_H_B1, MASK_PMULH_H_B1) +DECLARE_INSN(pmulh_w, MATCH_PMULH_W, MASK_PMULH_W) +DECLARE_INSN(pmulh_w_h0, MATCH_PMULH_W_H0, MASK_PMULH_W_H0) +DECLARE_INSN(pmulh_w_h1, MATCH_PMULH_W_H1, MASK_PMULH_W_H1) +DECLARE_INSN(pmulhr_h, MATCH_PMULHR_H, MASK_PMULHR_H) +DECLARE_INSN(pmulhr_w, MATCH_PMULHR_W, MASK_PMULHR_W) +DECLARE_INSN(pmulhrsu_h, MATCH_PMULHRSU_H, MASK_PMULHRSU_H) +DECLARE_INSN(pmulhrsu_w, MATCH_PMULHRSU_W, MASK_PMULHRSU_W) +DECLARE_INSN(pmulhru_h, MATCH_PMULHRU_H, MASK_PMULHRU_H) +DECLARE_INSN(pmulhru_w, MATCH_PMULHRU_W, MASK_PMULHRU_W) +DECLARE_INSN(pmulhsu_h, MATCH_PMULHSU_H, MASK_PMULHSU_H) +DECLARE_INSN(pmulhsu_h_b0, MATCH_PMULHSU_H_B0, MASK_PMULHSU_H_B0) +DECLARE_INSN(pmulhsu_h_b1, MATCH_PMULHSU_H_B1, MASK_PMULHSU_H_B1) +DECLARE_INSN(pmulhsu_w, MATCH_PMULHSU_W, MASK_PMULHSU_W) +DECLARE_INSN(pmulhsu_w_h0, MATCH_PMULHSU_W_H0, MASK_PMULHSU_W_H0) +DECLARE_INSN(pmulhsu_w_h1, MATCH_PMULHSU_W_H1, MASK_PMULHSU_W_H1) +DECLARE_INSN(pmulhu_h, MATCH_PMULHU_H, MASK_PMULHU_H) +DECLARE_INSN(pmulhu_w, MATCH_PMULHU_W, MASK_PMULHU_W) +DECLARE_INSN(pmulq_h, MATCH_PMULQ_H, MASK_PMULQ_H) +DECLARE_INSN(pmulq_w, MATCH_PMULQ_W, MASK_PMULQ_W) +DECLARE_INSN(pmulqr_h, MATCH_PMULQR_H, MASK_PMULQR_H) +DECLARE_INSN(pmulqr_w, MATCH_PMULQR_W, MASK_PMULQR_W) +DECLARE_INSN(pmulsu_h_b00, MATCH_PMULSU_H_B00, MASK_PMULSU_H_B00) +DECLARE_INSN(pmulsu_h_b11, MATCH_PMULSU_H_B11, MASK_PMULSU_H_B11) +DECLARE_INSN(pmulsu_w_h00, MATCH_PMULSU_W_H00, MASK_PMULSU_W_H00) +DECLARE_INSN(pmulsu_w_h11, MATCH_PMULSU_W_H11, MASK_PMULSU_W_H11) +DECLARE_INSN(pmulu_h_b00, MATCH_PMULU_H_B00, MASK_PMULU_H_B00) +DECLARE_INSN(pmulu_h_b01, MATCH_PMULU_H_B01, MASK_PMULU_H_B01) +DECLARE_INSN(pmulu_h_b11, MATCH_PMULU_H_B11, MASK_PMULU_H_B11) +DECLARE_INSN(pmulu_w_h00, MATCH_PMULU_W_H00, MASK_PMULU_W_H00) +DECLARE_INSN(pmulu_w_h01, MATCH_PMULU_W_H01, MASK_PMULU_W_H01) +DECLARE_INSN(pmulu_w_h11, MATCH_PMULU_W_H11, MASK_PMULU_W_H11) +DECLARE_INSN(pnclip_bs, MATCH_PNCLIP_BS, MASK_PNCLIP_BS) +DECLARE_INSN(pnclip_hs, MATCH_PNCLIP_HS, MASK_PNCLIP_HS) +DECLARE_INSN(pnclipi_b, MATCH_PNCLIPI_B, MASK_PNCLIPI_B) +DECLARE_INSN(pnclipi_h, MATCH_PNCLIPI_H, MASK_PNCLIPI_H) +DECLARE_INSN(pnclipiu_b, MATCH_PNCLIPIU_B, MASK_PNCLIPIU_B) +DECLARE_INSN(pnclipiu_h, MATCH_PNCLIPIU_H, MASK_PNCLIPIU_H) +DECLARE_INSN(pnclipp_b, MATCH_PNCLIPP_B, MASK_PNCLIPP_B) +DECLARE_INSN(pnclipp_h, MATCH_PNCLIPP_H, MASK_PNCLIPP_H) +DECLARE_INSN(pnclipp_w, MATCH_PNCLIPP_W, MASK_PNCLIPP_W) +DECLARE_INSN(pnclipr_bs, MATCH_PNCLIPR_BS, MASK_PNCLIPR_BS) +DECLARE_INSN(pnclipr_hs, MATCH_PNCLIPR_HS, MASK_PNCLIPR_HS) +DECLARE_INSN(pnclipri_b, MATCH_PNCLIPRI_B, MASK_PNCLIPRI_B) +DECLARE_INSN(pnclipri_h, MATCH_PNCLIPRI_H, MASK_PNCLIPRI_H) +DECLARE_INSN(pnclipriu_b, MATCH_PNCLIPRIU_B, MASK_PNCLIPRIU_B) +DECLARE_INSN(pnclipriu_h, MATCH_PNCLIPRIU_H, MASK_PNCLIPRIU_H) +DECLARE_INSN(pnclipru_bs, MATCH_PNCLIPRU_BS, MASK_PNCLIPRU_BS) +DECLARE_INSN(pnclipru_hs, MATCH_PNCLIPRU_HS, MASK_PNCLIPRU_HS) +DECLARE_INSN(pnclipu_bs, MATCH_PNCLIPU_BS, MASK_PNCLIPU_BS) +DECLARE_INSN(pnclipu_hs, MATCH_PNCLIPU_HS, MASK_PNCLIPU_HS) +DECLARE_INSN(pnclipup_b, MATCH_PNCLIPUP_B, MASK_PNCLIPUP_B) +DECLARE_INSN(pnclipup_h, MATCH_PNCLIPUP_H, MASK_PNCLIPUP_H) +DECLARE_INSN(pnclipup_w, MATCH_PNCLIPUP_W, MASK_PNCLIPUP_W) +DECLARE_INSN(pnsra_bs, MATCH_PNSRA_BS, MASK_PNSRA_BS) +DECLARE_INSN(pnsra_hs, MATCH_PNSRA_HS, MASK_PNSRA_HS) +DECLARE_INSN(pnsrai_b, MATCH_PNSRAI_B, MASK_PNSRAI_B) +DECLARE_INSN(pnsrai_h, MATCH_PNSRAI_H, MASK_PNSRAI_H) +DECLARE_INSN(pnsrar_bs, MATCH_PNSRAR_BS, MASK_PNSRAR_BS) +DECLARE_INSN(pnsrar_hs, MATCH_PNSRAR_HS, MASK_PNSRAR_HS) +DECLARE_INSN(pnsrari_b, MATCH_PNSRARI_B, MASK_PNSRARI_B) +DECLARE_INSN(pnsrari_h, MATCH_PNSRARI_H, MASK_PNSRARI_H) +DECLARE_INSN(pnsrl_bs, MATCH_PNSRL_BS, MASK_PNSRL_BS) +DECLARE_INSN(pnsrl_hs, MATCH_PNSRL_HS, MASK_PNSRL_HS) +DECLARE_INSN(pnsrli_b, MATCH_PNSRLI_B, MASK_PNSRLI_B) +DECLARE_INSN(pnsrli_h, MATCH_PNSRLI_H, MASK_PNSRLI_H) +DECLARE_INSN(ppaire_b, MATCH_PPAIRE_B, MASK_PPAIRE_B) +DECLARE_INSN(ppaire_db, MATCH_PPAIRE_DB, MASK_PPAIRE_DB) +DECLARE_INSN(ppaire_dh, MATCH_PPAIRE_DH, MASK_PPAIRE_DH) +DECLARE_INSN(ppaire_h, MATCH_PPAIRE_H, MASK_PPAIRE_H) +DECLARE_INSN(ppaireo_b, MATCH_PPAIREO_B, MASK_PPAIREO_B) +DECLARE_INSN(ppaireo_db, MATCH_PPAIREO_DB, MASK_PPAIREO_DB) +DECLARE_INSN(ppaireo_dh, MATCH_PPAIREO_DH, MASK_PPAIREO_DH) +DECLARE_INSN(ppaireo_h, MATCH_PPAIREO_H, MASK_PPAIREO_H) +DECLARE_INSN(ppaireo_w, MATCH_PPAIREO_W, MASK_PPAIREO_W) +DECLARE_INSN(ppairo_b, MATCH_PPAIRO_B, MASK_PPAIRO_B) +DECLARE_INSN(ppairo_db, MATCH_PPAIRO_DB, MASK_PPAIRO_DB) +DECLARE_INSN(ppairo_dh, MATCH_PPAIRO_DH, MASK_PPAIRO_DH) +DECLARE_INSN(ppairo_h, MATCH_PPAIRO_H, MASK_PPAIRO_H) +DECLARE_INSN(ppairo_w, MATCH_PPAIRO_W, MASK_PPAIRO_W) +DECLARE_INSN(ppairoe_b, MATCH_PPAIROE_B, MASK_PPAIROE_B) +DECLARE_INSN(ppairoe_db, MATCH_PPAIROE_DB, MASK_PPAIROE_DB) +DECLARE_INSN(ppairoe_dh, MATCH_PPAIROE_DH, MASK_PPAIROE_DH) +DECLARE_INSN(ppairoe_h, MATCH_PPAIROE_H, MASK_PPAIROE_H) +DECLARE_INSN(ppairoe_w, MATCH_PPAIROE_W, MASK_PPAIROE_W) +DECLARE_INSN(predsum_bs, MATCH_PREDSUM_BS, MASK_PREDSUM_BS) +DECLARE_INSN(predsum_dbs, MATCH_PREDSUM_DBS, MASK_PREDSUM_DBS) +DECLARE_INSN(predsum_dhs, MATCH_PREDSUM_DHS, MASK_PREDSUM_DHS) +DECLARE_INSN(predsum_hs, MATCH_PREDSUM_HS, MASK_PREDSUM_HS) +DECLARE_INSN(predsum_ws, MATCH_PREDSUM_WS, MASK_PREDSUM_WS) +DECLARE_INSN(predsumu_bs, MATCH_PREDSUMU_BS, MASK_PREDSUMU_BS) +DECLARE_INSN(predsumu_dbs, MATCH_PREDSUMU_DBS, MASK_PREDSUMU_DBS) +DECLARE_INSN(predsumu_dhs, MATCH_PREDSUMU_DHS, MASK_PREDSUMU_DHS) +DECLARE_INSN(predsumu_hs, MATCH_PREDSUMU_HS, MASK_PREDSUMU_HS) +DECLARE_INSN(predsumu_ws, MATCH_PREDSUMU_WS, MASK_PREDSUMU_WS) DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I) DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R) DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W) +DECLARE_INSN(psa_dhx, MATCH_PSA_DHX, MASK_PSA_DHX) +DECLARE_INSN(psa_hx, MATCH_PSA_HX, MASK_PSA_HX) +DECLARE_INSN(psa_wx, MATCH_PSA_WX, MASK_PSA_WX) +DECLARE_INSN(psabs_b, MATCH_PSABS_B, MASK_PSABS_B) +DECLARE_INSN(psabs_db, MATCH_PSABS_DB, MASK_PSABS_DB) +DECLARE_INSN(psabs_dh, MATCH_PSABS_DH, MASK_PSABS_DH) +DECLARE_INSN(psabs_h, MATCH_PSABS_H, MASK_PSABS_H) +DECLARE_INSN(psadd_b, MATCH_PSADD_B, MASK_PSADD_B) +DECLARE_INSN(psadd_db, MATCH_PSADD_DB, MASK_PSADD_DB) +DECLARE_INSN(psadd_dh, MATCH_PSADD_DH, MASK_PSADD_DH) +DECLARE_INSN(psadd_dw, MATCH_PSADD_DW, MASK_PSADD_DW) +DECLARE_INSN(psadd_h, MATCH_PSADD_H, MASK_PSADD_H) +DECLARE_INSN(psadd_w, MATCH_PSADD_W, MASK_PSADD_W) +DECLARE_INSN(psaddu_b, MATCH_PSADDU_B, MASK_PSADDU_B) +DECLARE_INSN(psaddu_db, MATCH_PSADDU_DB, MASK_PSADDU_DB) +DECLARE_INSN(psaddu_dh, MATCH_PSADDU_DH, MASK_PSADDU_DH) +DECLARE_INSN(psaddu_dw, MATCH_PSADDU_DW, MASK_PSADDU_DW) +DECLARE_INSN(psaddu_h, MATCH_PSADDU_H, MASK_PSADDU_H) +DECLARE_INSN(psaddu_w, MATCH_PSADDU_W, MASK_PSADDU_W) +DECLARE_INSN(psas_dhx, MATCH_PSAS_DHX, MASK_PSAS_DHX) +DECLARE_INSN(psas_hx, MATCH_PSAS_HX, MASK_PSAS_HX) +DECLARE_INSN(psas_wx, MATCH_PSAS_WX, MASK_PSAS_WX) +DECLARE_INSN(psati_dh, MATCH_PSATI_DH, MASK_PSATI_DH) +DECLARE_INSN(psati_dw, MATCH_PSATI_DW, MASK_PSATI_DW) +DECLARE_INSN(psati_h, MATCH_PSATI_H, MASK_PSATI_H) +DECLARE_INSN(psati_w, MATCH_PSATI_W, MASK_PSATI_W) +DECLARE_INSN(psext_dh_b, MATCH_PSEXT_DH_B, MASK_PSEXT_DH_B) +DECLARE_INSN(psext_dw_b, MATCH_PSEXT_DW_B, MASK_PSEXT_DW_B) +DECLARE_INSN(psext_dw_h, MATCH_PSEXT_DW_H, MASK_PSEXT_DW_H) +DECLARE_INSN(psext_h_b, MATCH_PSEXT_H_B, MASK_PSEXT_H_B) +DECLARE_INSN(psext_w_b, MATCH_PSEXT_W_B, MASK_PSEXT_W_B) +DECLARE_INSN(psext_w_h, MATCH_PSEXT_W_H, MASK_PSEXT_W_H) +DECLARE_INSN(psh1add_dh, MATCH_PSH1ADD_DH, MASK_PSH1ADD_DH) +DECLARE_INSN(psh1add_dw, MATCH_PSH1ADD_DW, MASK_PSH1ADD_DW) +DECLARE_INSN(psh1add_h, MATCH_PSH1ADD_H, MASK_PSH1ADD_H) +DECLARE_INSN(psh1add_w, MATCH_PSH1ADD_W, MASK_PSH1ADD_W) +DECLARE_INSN(psll_bs, MATCH_PSLL_BS, MASK_PSLL_BS) +DECLARE_INSN(psll_dbs, MATCH_PSLL_DBS, MASK_PSLL_DBS) +DECLARE_INSN(psll_dhs, MATCH_PSLL_DHS, MASK_PSLL_DHS) +DECLARE_INSN(psll_dws, MATCH_PSLL_DWS, MASK_PSLL_DWS) +DECLARE_INSN(psll_hs, MATCH_PSLL_HS, MASK_PSLL_HS) +DECLARE_INSN(psll_ws, MATCH_PSLL_WS, MASK_PSLL_WS) +DECLARE_INSN(pslli_b, MATCH_PSLLI_B, MASK_PSLLI_B) +DECLARE_INSN(pslli_db, MATCH_PSLLI_DB, MASK_PSLLI_DB) +DECLARE_INSN(pslli_dh, MATCH_PSLLI_DH, MASK_PSLLI_DH) +DECLARE_INSN(pslli_dw, MATCH_PSLLI_DW, MASK_PSLLI_DW) +DECLARE_INSN(pslli_h, MATCH_PSLLI_H, MASK_PSLLI_H) +DECLARE_INSN(pslli_w, MATCH_PSLLI_W, MASK_PSLLI_W) +DECLARE_INSN(psra_bs, MATCH_PSRA_BS, MASK_PSRA_BS) +DECLARE_INSN(psra_dbs, MATCH_PSRA_DBS, MASK_PSRA_DBS) +DECLARE_INSN(psra_dhs, MATCH_PSRA_DHS, MASK_PSRA_DHS) +DECLARE_INSN(psra_dws, MATCH_PSRA_DWS, MASK_PSRA_DWS) +DECLARE_INSN(psra_hs, MATCH_PSRA_HS, MASK_PSRA_HS) +DECLARE_INSN(psra_ws, MATCH_PSRA_WS, MASK_PSRA_WS) +DECLARE_INSN(psrai_b, MATCH_PSRAI_B, MASK_PSRAI_B) +DECLARE_INSN(psrai_db, MATCH_PSRAI_DB, MASK_PSRAI_DB) +DECLARE_INSN(psrai_dh, MATCH_PSRAI_DH, MASK_PSRAI_DH) +DECLARE_INSN(psrai_dw, MATCH_PSRAI_DW, MASK_PSRAI_DW) +DECLARE_INSN(psrai_h, MATCH_PSRAI_H, MASK_PSRAI_H) +DECLARE_INSN(psrai_w, MATCH_PSRAI_W, MASK_PSRAI_W) +DECLARE_INSN(psrari_dh, MATCH_PSRARI_DH, MASK_PSRARI_DH) +DECLARE_INSN(psrari_dw, MATCH_PSRARI_DW, MASK_PSRARI_DW) +DECLARE_INSN(psrari_h, MATCH_PSRARI_H, MASK_PSRARI_H) +DECLARE_INSN(psrari_w, MATCH_PSRARI_W, MASK_PSRARI_W) +DECLARE_INSN(psrl_bs, MATCH_PSRL_BS, MASK_PSRL_BS) +DECLARE_INSN(psrl_dbs, MATCH_PSRL_DBS, MASK_PSRL_DBS) +DECLARE_INSN(psrl_dhs, MATCH_PSRL_DHS, MASK_PSRL_DHS) +DECLARE_INSN(psrl_dws, MATCH_PSRL_DWS, MASK_PSRL_DWS) +DECLARE_INSN(psrl_hs, MATCH_PSRL_HS, MASK_PSRL_HS) +DECLARE_INSN(psrl_ws, MATCH_PSRL_WS, MASK_PSRL_WS) +DECLARE_INSN(psrli_b, MATCH_PSRLI_B, MASK_PSRLI_B) +DECLARE_INSN(psrli_db, MATCH_PSRLI_DB, MASK_PSRLI_DB) +DECLARE_INSN(psrli_dh, MATCH_PSRLI_DH, MASK_PSRLI_DH) +DECLARE_INSN(psrli_dw, MATCH_PSRLI_DW, MASK_PSRLI_DW) +DECLARE_INSN(psrli_h, MATCH_PSRLI_H, MASK_PSRLI_H) +DECLARE_INSN(psrli_w, MATCH_PSRLI_W, MASK_PSRLI_W) +DECLARE_INSN(pssa_dhx, MATCH_PSSA_DHX, MASK_PSSA_DHX) +DECLARE_INSN(pssa_hx, MATCH_PSSA_HX, MASK_PSSA_HX) +DECLARE_INSN(pssa_wx, MATCH_PSSA_WX, MASK_PSSA_WX) +DECLARE_INSN(pssh1sadd_dh, MATCH_PSSH1SADD_DH, MASK_PSSH1SADD_DH) +DECLARE_INSN(pssh1sadd_dw, MATCH_PSSH1SADD_DW, MASK_PSSH1SADD_DW) +DECLARE_INSN(pssh1sadd_h, MATCH_PSSH1SADD_H, MASK_PSSH1SADD_H) +DECLARE_INSN(pssh1sadd_w, MATCH_PSSH1SADD_W, MASK_PSSH1SADD_W) +DECLARE_INSN(pssha_dhs, MATCH_PSSHA_DHS, MASK_PSSHA_DHS) +DECLARE_INSN(pssha_dws, MATCH_PSSHA_DWS, MASK_PSSHA_DWS) +DECLARE_INSN(pssha_hs, MATCH_PSSHA_HS, MASK_PSSHA_HS) +DECLARE_INSN(pssha_ws, MATCH_PSSHA_WS, MASK_PSSHA_WS) +DECLARE_INSN(psshar_dhs, MATCH_PSSHAR_DHS, MASK_PSSHAR_DHS) +DECLARE_INSN(psshar_dws, MATCH_PSSHAR_DWS, MASK_PSSHAR_DWS) +DECLARE_INSN(psshar_hs, MATCH_PSSHAR_HS, MASK_PSSHAR_HS) +DECLARE_INSN(psshar_ws, MATCH_PSSHAR_WS, MASK_PSSHAR_WS) +DECLARE_INSN(psshl_dhs, MATCH_PSSHL_DHS, MASK_PSSHL_DHS) +DECLARE_INSN(psshl_dws, MATCH_PSSHL_DWS, MASK_PSSHL_DWS) +DECLARE_INSN(psshl_hs, MATCH_PSSHL_HS, MASK_PSSHL_HS) +DECLARE_INSN(psshl_ws, MATCH_PSSHL_WS, MASK_PSSHL_WS) +DECLARE_INSN(psshlr_dhs, MATCH_PSSHLR_DHS, MASK_PSSHLR_DHS) +DECLARE_INSN(psshlr_dws, MATCH_PSSHLR_DWS, MASK_PSSHLR_DWS) +DECLARE_INSN(psshlr_hs, MATCH_PSSHLR_HS, MASK_PSSHLR_HS) +DECLARE_INSN(psshlr_ws, MATCH_PSSHLR_WS, MASK_PSSHLR_WS) +DECLARE_INSN(psslai_dh, MATCH_PSSLAI_DH, MASK_PSSLAI_DH) +DECLARE_INSN(psslai_dw, MATCH_PSSLAI_DW, MASK_PSSLAI_DW) +DECLARE_INSN(psslai_h, MATCH_PSSLAI_H, MASK_PSSLAI_H) +DECLARE_INSN(psslai_w, MATCH_PSSLAI_W, MASK_PSSLAI_W) +DECLARE_INSN(pssub_b, MATCH_PSSUB_B, MASK_PSSUB_B) +DECLARE_INSN(pssub_db, MATCH_PSSUB_DB, MASK_PSSUB_DB) +DECLARE_INSN(pssub_dh, MATCH_PSSUB_DH, MASK_PSSUB_DH) +DECLARE_INSN(pssub_dw, MATCH_PSSUB_DW, MASK_PSSUB_DW) +DECLARE_INSN(pssub_h, MATCH_PSSUB_H, MASK_PSSUB_H) +DECLARE_INSN(pssub_w, MATCH_PSSUB_W, MASK_PSSUB_W) +DECLARE_INSN(pssubu_b, MATCH_PSSUBU_B, MASK_PSSUBU_B) +DECLARE_INSN(pssubu_db, MATCH_PSSUBU_DB, MASK_PSSUBU_DB) +DECLARE_INSN(pssubu_dh, MATCH_PSSUBU_DH, MASK_PSSUBU_DH) +DECLARE_INSN(pssubu_dw, MATCH_PSSUBU_DW, MASK_PSSUBU_DW) +DECLARE_INSN(pssubu_h, MATCH_PSSUBU_H, MASK_PSSUBU_H) +DECLARE_INSN(pssubu_w, MATCH_PSSUBU_W, MASK_PSSUBU_W) +DECLARE_INSN(psub_b, MATCH_PSUB_B, MASK_PSUB_B) +DECLARE_INSN(psub_db, MATCH_PSUB_DB, MASK_PSUB_DB) +DECLARE_INSN(psub_dh, MATCH_PSUB_DH, MASK_PSUB_DH) +DECLARE_INSN(psub_dw, MATCH_PSUB_DW, MASK_PSUB_DW) +DECLARE_INSN(psub_h, MATCH_PSUB_H, MASK_PSUB_H) +DECLARE_INSN(psub_w, MATCH_PSUB_W, MASK_PSUB_W) +DECLARE_INSN(pusati_dh, MATCH_PUSATI_DH, MASK_PUSATI_DH) +DECLARE_INSN(pusati_dw, MATCH_PUSATI_DW, MASK_PUSATI_DW) +DECLARE_INSN(pusati_h, MATCH_PUSATI_H, MASK_PUSATI_H) +DECLARE_INSN(pusati_w, MATCH_PUSATI_W, MASK_PUSATI_W) +DECLARE_INSN(pwadd_b, MATCH_PWADD_B, MASK_PWADD_B) +DECLARE_INSN(pwadd_h, MATCH_PWADD_H, MASK_PWADD_H) +DECLARE_INSN(pwadda_b, MATCH_PWADDA_B, MASK_PWADDA_B) +DECLARE_INSN(pwadda_h, MATCH_PWADDA_H, MASK_PWADDA_H) +DECLARE_INSN(pwaddau_b, MATCH_PWADDAU_B, MASK_PWADDAU_B) +DECLARE_INSN(pwaddau_h, MATCH_PWADDAU_H, MASK_PWADDAU_H) +DECLARE_INSN(pwaddu_b, MATCH_PWADDU_B, MASK_PWADDU_B) +DECLARE_INSN(pwaddu_h, MATCH_PWADDU_H, MASK_PWADDU_H) +DECLARE_INSN(pwmacc_h, MATCH_PWMACC_H, MASK_PWMACC_H) +DECLARE_INSN(pwmaccsu_h, MATCH_PWMACCSU_H, MASK_PWMACCSU_H) +DECLARE_INSN(pwmaccu_h, MATCH_PWMACCU_H, MASK_PWMACCU_H) +DECLARE_INSN(pwmul_b, MATCH_PWMUL_B, MASK_PWMUL_B) +DECLARE_INSN(pwmul_h, MATCH_PWMUL_H, MASK_PWMUL_H) +DECLARE_INSN(pwmulsu_b, MATCH_PWMULSU_B, MASK_PWMULSU_B) +DECLARE_INSN(pwmulsu_h, MATCH_PWMULSU_H, MASK_PWMULSU_H) +DECLARE_INSN(pwmulu_b, MATCH_PWMULU_B, MASK_PWMULU_B) +DECLARE_INSN(pwmulu_h, MATCH_PWMULU_H, MASK_PWMULU_H) +DECLARE_INSN(pwsla_bs, MATCH_PWSLA_BS, MASK_PWSLA_BS) +DECLARE_INSN(pwsla_hs, MATCH_PWSLA_HS, MASK_PWSLA_HS) +DECLARE_INSN(pwslai_b, MATCH_PWSLAI_B, MASK_PWSLAI_B) +DECLARE_INSN(pwslai_h, MATCH_PWSLAI_H, MASK_PWSLAI_H) +DECLARE_INSN(pwsll_bs, MATCH_PWSLL_BS, MASK_PWSLL_BS) +DECLARE_INSN(pwsll_hs, MATCH_PWSLL_HS, MASK_PWSLL_HS) +DECLARE_INSN(pwslli_b, MATCH_PWSLLI_B, MASK_PWSLLI_B) +DECLARE_INSN(pwslli_h, MATCH_PWSLLI_H, MASK_PWSLLI_H) +DECLARE_INSN(pwsub_b, MATCH_PWSUB_B, MASK_PWSUB_B) +DECLARE_INSN(pwsub_h, MATCH_PWSUB_H, MASK_PWSUB_H) +DECLARE_INSN(pwsuba_b, MATCH_PWSUBA_B, MASK_PWSUBA_B) +DECLARE_INSN(pwsuba_h, MATCH_PWSUBA_H, MASK_PWSUBA_H) +DECLARE_INSN(pwsubau_b, MATCH_PWSUBAU_B, MASK_PWSUBAU_B) +DECLARE_INSN(pwsubau_h, MATCH_PWSUBAU_H, MASK_PWSUBAU_H) +DECLARE_INSN(pwsubu_b, MATCH_PWSUBU_B, MASK_PWSUBU_B) +DECLARE_INSN(pwsubu_h, MATCH_PWSUBU_H, MASK_PWSUBU_H) DECLARE_INSN(rem, MATCH_REM, MASK_REM) DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) +DECLARE_INSN(rev, MATCH_REV, MASK_REV) +DECLARE_INSN(rev16, MATCH_REV16, MASK_REV16) DECLARE_INSN(rev8, MATCH_REV8, MASK_REV8) DECLARE_INSN(rev8_rv32, MATCH_REV8_RV32, MASK_REV8_RV32) +DECLARE_INSN(rev_rv32, MATCH_REV_RV32, MASK_REV_RV32) DECLARE_INSN(rol, MATCH_ROL, MASK_ROL) DECLARE_INSN(rolw, MATCH_ROLW, MASK_ROLW) DECLARE_INSN(ror, MATCH_ROR, MASK_ROR) DECLARE_INSN(rori, MATCH_RORI, MASK_RORI) DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW) DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW) +DECLARE_INSN(sadd, MATCH_SADD, MASK_SADD) +DECLARE_INSN(saddu, MATCH_SADDU, MASK_SADDU) +DECLARE_INSN(sati, MATCH_SATI, MASK_SATI) +DECLARE_INSN(sati_rv32, MATCH_SATI_RV32, MASK_SATI_RV32) DECLARE_INSN(sb, MATCH_SB, MASK_SB) DECLARE_INSN(sb_rl, MATCH_SB_RL, MASK_SB_RL) DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) @@ -3624,6 +5411,7 @@ DECLARE_INSN(sh2add_uw, MATCH_SH2ADD_UW, MASK_SH2ADD_UW) DECLARE_INSN(sh3add, MATCH_SH3ADD, MASK_SH3ADD) DECLARE_INSN(sh3add_uw, MATCH_SH3ADD_UW, MASK_SH3ADD_UW) DECLARE_INSN(sh_rl, MATCH_SH_RL, MASK_SH_RL) +DECLARE_INSN(sha, MATCH_SHA, MASK_SHA) DECLARE_INSN(sha256sig0, MATCH_SHA256SIG0, MASK_SHA256SIG0) DECLARE_INSN(sha256sig1, MATCH_SHA256SIG1, MASK_SHA256SIG1) DECLARE_INSN(sha256sum0, MATCH_SHA256SUM0, MASK_SHA256SUM0) @@ -3638,6 +5426,9 @@ DECLARE_INSN(sha512sum0, MATCH_SHA512SUM0, MASK_SHA512SUM0) DECLARE_INSN(sha512sum0r, MATCH_SHA512SUM0R, MASK_SHA512SUM0R) DECLARE_INSN(sha512sum1, MATCH_SHA512SUM1, MASK_SHA512SUM1) DECLARE_INSN(sha512sum1r, MATCH_SHA512SUM1R, MASK_SHA512SUM1R) +DECLARE_INSN(shar, MATCH_SHAR, MASK_SHAR) +DECLARE_INSN(shl, MATCH_SHL, MASK_SHL) +DECLARE_INSN(shlr, MATCH_SHLR, MASK_SHLR) DECLARE_INSN(sinval_vma, MATCH_SINVAL_VMA, MASK_SINVAL_VMA) DECLARE_INSN(sll, MATCH_SLL, MASK_SLL) DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI) @@ -3649,6 +5440,7 @@ DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU) +DECLARE_INSN(slx, MATCH_SLX, MASK_SLX) DECLARE_INSN(sm3p0, MATCH_SM3P0, MASK_SM3P0) DECLARE_INSN(sm3p1, MATCH_SM3P1, MASK_SM3P1) DECLARE_INSN(sm4ed, MATCH_SM4ED, MASK_SM4ED) @@ -3657,6 +5449,8 @@ DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32) DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW) +DECLARE_INSN(srari, MATCH_SRARI, MASK_SRARI) +DECLARE_INSN(srari_rv32, MATCH_SRARI_RV32, MASK_SRARI_RV32) DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW) DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) DECLARE_INSN(srl, MATCH_SRL, MASK_SRL) @@ -3664,18 +5458,34 @@ DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32) DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) +DECLARE_INSN(srx, MATCH_SRX, MASK_SRX) DECLARE_INSN(ssamoswap_d, MATCH_SSAMOSWAP_D, MASK_SSAMOSWAP_D) DECLARE_INSN(ssamoswap_w, MATCH_SSAMOSWAP_W, MASK_SSAMOSWAP_W) +DECLARE_INSN(ssh1sadd, MATCH_SSH1SADD, MASK_SSH1SADD) +DECLARE_INSN(ssha, MATCH_SSHA, MASK_SSHA) +DECLARE_INSN(sshar, MATCH_SSHAR, MASK_SSHAR) +DECLARE_INSN(sshl, MATCH_SSHL, MASK_SSHL) +DECLARE_INSN(sshlr, MATCH_SSHLR, MASK_SSHLR) +DECLARE_INSN(sslai, MATCH_SSLAI, MASK_SSLAI) DECLARE_INSN(sspopchk_x1, MATCH_SSPOPCHK_X1, MASK_SSPOPCHK_X1) DECLARE_INSN(sspopchk_x5, MATCH_SSPOPCHK_X5, MASK_SSPOPCHK_X5) DECLARE_INSN(sspush_x1, MATCH_SSPUSH_X1, MASK_SSPUSH_X1) DECLARE_INSN(sspush_x5, MATCH_SSPUSH_X5, MASK_SSPUSH_X5) DECLARE_INSN(ssrdp, MATCH_SSRDP, MASK_SSRDP) +DECLARE_INSN(ssub, MATCH_SSUB, MASK_SSUB) +DECLARE_INSN(ssubu, MATCH_SSUBU, MASK_SSUBU) DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) +DECLARE_INSN(subd, MATCH_SUBD, MASK_SUBD) DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) DECLARE_INSN(sw, MATCH_SW, MASK_SW) DECLARE_INSN(sw_rl, MATCH_SW_RL, MASK_SW_RL) DECLARE_INSN(unzip, MATCH_UNZIP, MASK_UNZIP) +DECLARE_INSN(unzip16hp, MATCH_UNZIP16HP, MASK_UNZIP16HP) +DECLARE_INSN(unzip16p, MATCH_UNZIP16P, MASK_UNZIP16P) +DECLARE_INSN(unzip8hp, MATCH_UNZIP8HP, MASK_UNZIP8HP) +DECLARE_INSN(unzip8p, MATCH_UNZIP8P, MASK_UNZIP8P) +DECLARE_INSN(usati, MATCH_USATI, MASK_USATI) +DECLARE_INSN(usati_rv32, MATCH_USATI_RV32, MASK_USATI_RV32) DECLARE_INSN(vaadd_vv, MATCH_VAADD_VV, MASK_VAADD_VV) DECLARE_INSN(vaadd_vx, MATCH_VAADD_VX, MASK_VAADD_VX) DECLARE_INSN(vaaddu_vv, MATCH_VAADDU_VV, MASK_VAADDU_VV) @@ -4128,9 +5938,29 @@ DECLARE_INSN(vzext_vf2, MATCH_VZEXT_VF2, MASK_VZEXT_VF2) DECLARE_INSN(vzext_vf4, MATCH_VZEXT_VF4, MASK_VZEXT_VF4) DECLARE_INSN(vzext_vf8, MATCH_VZEXT_VF8, MASK_VZEXT_VF8) DECLARE_INSN(vzip_vv, MATCH_VZIP_VV, MASK_VZIP_VV) +DECLARE_INSN(wadd, MATCH_WADD, MASK_WADD) +DECLARE_INSN(wadda, MATCH_WADDA, MASK_WADDA) +DECLARE_INSN(waddau, MATCH_WADDAU, MASK_WADDAU) +DECLARE_INSN(waddu, MATCH_WADDU, MASK_WADDU) DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) +DECLARE_INSN(wmacc, MATCH_WMACC, MASK_WMACC) +DECLARE_INSN(wmaccsu, MATCH_WMACCSU, MASK_WMACCSU) +DECLARE_INSN(wmaccu, MATCH_WMACCU, MASK_WMACCU) +DECLARE_INSN(wmul, MATCH_WMUL, MASK_WMUL) +DECLARE_INSN(wmulsu, MATCH_WMULSU, MASK_WMULSU) +DECLARE_INSN(wmulu, MATCH_WMULU, MASK_WMULU) DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO) DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO) +DECLARE_INSN(wsla, MATCH_WSLA, MASK_WSLA) +DECLARE_INSN(wslai, MATCH_WSLAI, MASK_WSLAI) +DECLARE_INSN(wsll, MATCH_WSLL, MASK_WSLL) +DECLARE_INSN(wslli, MATCH_WSLLI, MASK_WSLLI) +DECLARE_INSN(wsub, MATCH_WSUB, MASK_WSUB) +DECLARE_INSN(wsuba, MATCH_WSUBA, MASK_WSUBA) +DECLARE_INSN(wsubau, MATCH_WSUBAU, MASK_WSUBAU) +DECLARE_INSN(wsubu, MATCH_WSUBU, MASK_WSUBU) +DECLARE_INSN(wzip16p, MATCH_WZIP16P, MASK_WZIP16P) +DECLARE_INSN(wzip8p, MATCH_WZIP8P, MASK_WZIP8P) DECLARE_INSN(xnor, MATCH_XNOR, MASK_XNOR) DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) DECLARE_INSN(xori, MATCH_XORI, MASK_XORI) @@ -4139,6 +5969,10 @@ DECLARE_INSN(xperm32, MATCH_XPERM32, MASK_XPERM32) DECLARE_INSN(xperm4, MATCH_XPERM4, MASK_XPERM4) DECLARE_INSN(xperm8, MATCH_XPERM8, MASK_XPERM8) DECLARE_INSN(zip, MATCH_ZIP, MASK_ZIP) +DECLARE_INSN(zip16hp, MATCH_ZIP16HP, MASK_ZIP16HP) +DECLARE_INSN(zip16p, MATCH_ZIP16P, MASK_ZIP16P) +DECLARE_INSN(zip8hp, MATCH_ZIP8HP, MASK_ZIP8HP) +DECLARE_INSN(zip8p, MATCH_ZIP8P, MASK_ZIP8P) #endif #ifdef DECLARE_CSR DECLARE_CSR(fflags, CSR_FFLAGS) diff --git a/riscv/insn_template.h b/riscv/insn_template.h index bf9d9d74..7a9aadd8 100644 --- a/riscv/insn_template.h +++ b/riscv/insn_template.h @@ -7,6 +7,7 @@ #include "internals.h" #include "specialize.h" #include "tracer.h" +#include "p_ext_macros.h" #include "v_ext_macros.h" #include "debug_defines.h" #include <assert.h> diff --git a/riscv/insns/aadd.h b/riscv/insns/aadd.h new file mode 100644 index 00000000..5456cef6 --- /dev/null +++ b/riscv/insns/aadd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((RS1 + RS2)>>1);
\ No newline at end of file diff --git a/riscv/insns/aaddu.h b/riscv/insns/aaddu.h new file mode 100644 index 00000000..bf011496 --- /dev/null +++ b/riscv/insns/aaddu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((0ULL + (uint32_t)RS1 + (uint32_t)RS2)>>1);
\ No newline at end of file diff --git a/riscv/insns/abs.h b/riscv/insns/abs.h new file mode 100644 index 00000000..1b747ffe --- /dev/null +++ b/riscv/insns/abs.h @@ -0,0 +1,4 @@ +require_extension('P'); +reg_t s1 = RS1; +reg_t result = (int64_t(s1) < 0) ? -s1 : s1; +WRITE_RD(sext_xlen(result));
\ No newline at end of file diff --git a/riscv/insns/absw.h b/riscv/insns/absw.h new file mode 100644 index 00000000..e10240ff --- /dev/null +++ b/riscv/insns/absw.h @@ -0,0 +1,5 @@ +require_rv64; +require_extension('P'); +reg_t s1_w = sext32(RS1); +reg_t result = (int32_t(s1_w) < 0) ? -s1_w : s1_w; +WRITE_RD(sext_xlen(result)); diff --git a/riscv/insns/addd.h b/riscv/insns/addd.h new file mode 100644 index 00000000..0a4901f5 --- /dev/null +++ b/riscv/insns/addd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RS1_PAIR + P_RS2_PAIR);
\ No newline at end of file diff --git a/riscv/insns/asub.h b/riscv/insns/asub.h new file mode 100644 index 00000000..b7a7ab53 --- /dev/null +++ b/riscv/insns/asub.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((RS1 - RS2)>>1);
\ No newline at end of file diff --git a/riscv/insns/asubu.h b/riscv/insns/asubu.h new file mode 100644 index 00000000..6139feb2 --- /dev/null +++ b/riscv/insns/asubu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((0ULL + (uint32_t)RS1 - (uint32_t)RS2)>>1);
\ No newline at end of file diff --git a/riscv/insns/cls.h b/riscv/insns/cls.h new file mode 100644 index 00000000..3d80b618 --- /dev/null +++ b/riscv/insns/cls.h @@ -0,0 +1,10 @@ +require_extension('P'); +reg_t x = xlen - 1; +reg_t msb = (RS1 >> (xlen - 1)) & 1; +for (int i = 0; i < xlen - 1; i++) { + if (msb != ((RS1 >> (xlen - i - 2)) & 1)) { + x = i; + break; + } +} +WRITE_RD(sext_xlen(x));
\ No newline at end of file diff --git a/riscv/insns/clsw.h b/riscv/insns/clsw.h new file mode 100644 index 00000000..651f28af --- /dev/null +++ b/riscv/insns/clsw.h @@ -0,0 +1,11 @@ +require_rv64; +require_extension('P'); +reg_t x = 32 - 1; +reg_t msb = (RS1 >> (32 - 1)) & 1; +for (int i = 0; i < 32 - 1; i++) { + if (msb != ((RS1 >> (32 - i - 2)) & 1)) { + x = i; + break; + } +} +WRITE_RD(sext_xlen(x)); diff --git a/riscv/insns/macc_h00.h b/riscv/insns/macc_h00.h new file mode 100644 index 00000000..bddbc4cd --- /dev/null +++ b/riscv/insns/macc_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + sext(RS1, 16) * sext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/macc_h01.h b/riscv/insns/macc_h01.h new file mode 100644 index 00000000..551e4568 --- /dev/null +++ b/riscv/insns/macc_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + sext(RS1, 16) * sext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/macc_h11.h b/riscv/insns/macc_h11.h new file mode 100644 index 00000000..73104545 --- /dev/null +++ b/riscv/insns/macc_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + sext(RS1 >> 16, 16) * sext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/macc_w00.h b/riscv/insns/macc_w00.h new file mode 100644 index 00000000..2f82736d --- /dev/null +++ b/riscv/insns/macc_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + sext32(RS1) * sext32(RS2)); diff --git a/riscv/insns/macc_w01.h b/riscv/insns/macc_w01.h new file mode 100644 index 00000000..ab99bd81 --- /dev/null +++ b/riscv/insns/macc_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + sext32(RS1) * sext32(RS2 >> 32)); diff --git a/riscv/insns/macc_w11.h b/riscv/insns/macc_w11.h new file mode 100644 index 00000000..b3d76f08 --- /dev/null +++ b/riscv/insns/macc_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + sext32(RS1 >> 32) * sext32(RS2 >> 32)); diff --git a/riscv/insns/maccsu_h00.h b/riscv/insns/maccsu_h00.h new file mode 100644 index 00000000..4039c255 --- /dev/null +++ b/riscv/insns/maccsu_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + sext(RS1, 16) * zext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/maccsu_h11.h b/riscv/insns/maccsu_h11.h new file mode 100644 index 00000000..1bbde234 --- /dev/null +++ b/riscv/insns/maccsu_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + sext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/maccsu_w00.h b/riscv/insns/maccsu_w00.h new file mode 100644 index 00000000..d689c5b5 --- /dev/null +++ b/riscv/insns/maccsu_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + sext32(RS1) * zext32(RS2)); diff --git a/riscv/insns/maccsu_w11.h b/riscv/insns/maccsu_w11.h new file mode 100644 index 00000000..6a75ce7b --- /dev/null +++ b/riscv/insns/maccsu_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + sext32(RS1 >> 32) * zext32(RS2 >> 32)); diff --git a/riscv/insns/maccu_h00.h b/riscv/insns/maccu_h00.h new file mode 100644 index 00000000..22002959 --- /dev/null +++ b/riscv/insns/maccu_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + zext(RS1, 16) * zext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/maccu_h01.h b/riscv/insns/maccu_h01.h new file mode 100644 index 00000000..a35865bf --- /dev/null +++ b/riscv/insns/maccu_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + zext(RS1, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/maccu_h11.h b/riscv/insns/maccu_h11.h new file mode 100644 index 00000000..a30a8760 --- /dev/null +++ b/riscv/insns/maccu_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + zext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/maccu_w00.h b/riscv/insns/maccu_w00.h new file mode 100644 index 00000000..12c3cb6b --- /dev/null +++ b/riscv/insns/maccu_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + zext32(RS1) * zext32(RS2)); diff --git a/riscv/insns/maccu_w01.h b/riscv/insns/maccu_w01.h new file mode 100644 index 00000000..b469c387 --- /dev/null +++ b/riscv/insns/maccu_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + zext32(RS1) * zext32(RS2 >> 32)); diff --git a/riscv/insns/maccu_w11.h b/riscv/insns/maccu_w11.h new file mode 100644 index 00000000..eca1f711 --- /dev/null +++ b/riscv/insns/maccu_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + zext32(RS1 >> 32) * zext32(RS2 >> 32)); diff --git a/riscv/insns/merge.h b/riscv/insns/merge.h new file mode 100644 index 00000000..d184c5c8 --- /dev/null +++ b/riscv/insns/merge.h @@ -0,0 +1,2 @@ +require_extension('P'); +WRITE_RD((RS2 & RD) | (RS1 & ~RD));
\ No newline at end of file diff --git a/riscv/insns/mhacc.h b/riscv/insns/mhacc.h new file mode 100644 index 00000000..77de911d --- /dev/null +++ b/riscv/insns/mhacc.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * sext32(RS2); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhacc_h0.h b/riscv/insns/mhacc_h0.h new file mode 100644 index 00000000..699e9165 --- /dev/null +++ b/riscv/insns/mhacc_h0.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * sext32(P_FIELD(RS2, 0, 16)); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhacc_h1.h b/riscv/insns/mhacc_h1.h new file mode 100644 index 00000000..ea228fe6 --- /dev/null +++ b/riscv/insns/mhacc_h1.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * sext32(P_FIELD(RS2, 1, 16)); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhaccsu.h b/riscv/insns/mhaccsu.h new file mode 100644 index 00000000..328355c1 --- /dev/null +++ b/riscv/insns/mhaccsu.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * reg_t((uint32_t)RS2); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhaccsu_h0.h b/riscv/insns/mhaccsu_h0.h new file mode 100644 index 00000000..e89f309b --- /dev/null +++ b/riscv/insns/mhaccsu_h0.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 0, 16); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhaccsu_h1.h b/riscv/insns/mhaccsu_h1.h new file mode 100644 index 00000000..e49a15f6 --- /dev/null +++ b/riscv/insns/mhaccsu_h1.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 1, 16); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhaccu.h b/riscv/insns/mhaccu.h new file mode 100644 index 00000000..e9fb8020 --- /dev/null +++ b/riscv/insns/mhaccu.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +uint64_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2); +WRITE_RD(RD + (mres >> 32));
\ No newline at end of file diff --git a/riscv/insns/mhracc.h b/riscv/insns/mhracc.h new file mode 100644 index 00000000..902b0e56 --- /dev/null +++ b/riscv/insns/mhracc.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * sext32(RS2); +int32_t round = ((mres >> 31) + 1) >> 1; +WRITE_RD(RD + round);
\ No newline at end of file diff --git a/riscv/insns/mhraccsu.h b/riscv/insns/mhraccsu.h new file mode 100644 index 00000000..5d676ba6 --- /dev/null +++ b/riscv/insns/mhraccsu.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext(RS1,64) * reg_t((uint32_t)RS2); +int32_t round = ((mres >> 31) + 1) >> 1; +WRITE_RD(RD + round);
\ No newline at end of file diff --git a/riscv/insns/mhraccu.h b/riscv/insns/mhraccu.h new file mode 100644 index 00000000..9cf5e5a4 --- /dev/null +++ b/riscv/insns/mhraccu.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +reg_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2); +uint32_t round = ((mres >> 31) + 1) >> 1; +WRITE_RD(RD + round);
\ No newline at end of file diff --git a/riscv/insns/mqacc_h00.h b/riscv/insns/mqacc_h00.h new file mode 100644 index 00000000..7b4b8e7c --- /dev/null +++ b/riscv/insns/mqacc_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16)) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqacc_h01.h b/riscv/insns/mqacc_h01.h new file mode 100644 index 00000000..ff618720 --- /dev/null +++ b/riscv/insns/mqacc_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16)) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqacc_h11.h b/riscv/insns/mqacc_h11.h new file mode 100644 index 00000000..ac9e18bc --- /dev/null +++ b/riscv/insns/mqacc_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16)) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqacc_w00.h b/riscv/insns/mqacc_w00.h new file mode 100644 index 00000000..677b9bc4 --- /dev/null +++ b/riscv/insns/mqacc_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 0, 32)) >> 31)); diff --git a/riscv/insns/mqacc_w01.h b/riscv/insns/mqacc_w01.h new file mode 100644 index 00000000..d03020d5 --- /dev/null +++ b/riscv/insns/mqacc_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 1, 32)) >> 31)); diff --git a/riscv/insns/mqacc_w11.h b/riscv/insns/mqacc_w11.h new file mode 100644 index 00000000..30f93a8e --- /dev/null +++ b/riscv/insns/mqacc_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 1, 32) * P_FIELD(RS2, 1, 32)) >> 31)); diff --git a/riscv/insns/mqracc_h00.h b/riscv/insns/mqracc_h00.h new file mode 100644 index 00000000..37d49bde --- /dev/null +++ b/riscv/insns/mqracc_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 0, 16) + 0x4000) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqracc_h01.h b/riscv/insns/mqracc_h01.h new file mode 100644 index 00000000..3e7358e5 --- /dev/null +++ b/riscv/insns/mqracc_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 0, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqracc_h11.h b/riscv/insns/mqracc_h11.h new file mode 100644 index 00000000..c4eb4860 --- /dev/null +++ b/riscv/insns/mqracc_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RD + (((int32_t)P_FIELD(RS1, 1, 16) * P_FIELD(RS2, 1, 16) + 0x4000) >> 15));
\ No newline at end of file diff --git a/riscv/insns/mqracc_w00.h b/riscv/insns/mqracc_w00.h new file mode 100644 index 00000000..6426aa5c --- /dev/null +++ b/riscv/insns/mqracc_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 0, 32) + 0x40000000) >> 31)); diff --git a/riscv/insns/mqracc_w01.h b/riscv/insns/mqracc_w01.h new file mode 100644 index 00000000..ac315532 --- /dev/null +++ b/riscv/insns/mqracc_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 0, 32) * P_FIELD(RS2, 1, 32) + 0x40000000) >> 31)); diff --git a/riscv/insns/mqracc_w11.h b/riscv/insns/mqracc_w11.h new file mode 100644 index 00000000..0e9386c3 --- /dev/null +++ b/riscv/insns/mqracc_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(RD + (((sreg_t)P_FIELD(RS1, 1, 32) * P_FIELD(RS2, 1, 32) + 0x40000000) >> 31)); diff --git a/riscv/insns/mqrwacc.h b/riscv/insns/mqrwacc.h new file mode 100644 index 00000000..0aa2e73d --- /dev/null +++ b/riscv/insns/mqrwacc.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR + (((sreg_t)RS1*(sreg_t)RS2 + 0x40000000) >> 31));
\ No newline at end of file diff --git a/riscv/insns/mqwacc.h b/riscv/insns/mqwacc.h new file mode 100644 index 00000000..6f7cacdc --- /dev/null +++ b/riscv/insns/mqwacc.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR + (((sreg_t)RS1*(sreg_t)RS2) >> 31));
\ No newline at end of file diff --git a/riscv/insns/mseq.h b/riscv/insns/mseq.h new file mode 100644 index 00000000..cf540b20 --- /dev/null +++ b/riscv/insns/mseq.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(RS1 == RS2 ? -1 : 0);
\ No newline at end of file diff --git a/riscv/insns/mslt.h b/riscv/insns/mslt.h new file mode 100644 index 00000000..18aa387a --- /dev/null +++ b/riscv/insns/mslt.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((int32_t)RS1 < (int32_t)RS2 ? -1 : 0);
\ No newline at end of file diff --git a/riscv/insns/msltu.h b/riscv/insns/msltu.h new file mode 100644 index 00000000..062f12df --- /dev/null +++ b/riscv/insns/msltu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((uint32_t)RS1 < (uint32_t)RS2 ? -1 : 0);
\ No newline at end of file diff --git a/riscv/insns/mul_h00.h b/riscv/insns/mul_h00.h new file mode 100644 index 00000000..69bfaae6 --- /dev/null +++ b/riscv/insns/mul_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(sext(RS1, 16) * sext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/mul_h01.h b/riscv/insns/mul_h01.h new file mode 100644 index 00000000..ec95fe17 --- /dev/null +++ b/riscv/insns/mul_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(sext(RS1, 16) * sext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/mul_h11.h b/riscv/insns/mul_h11.h new file mode 100644 index 00000000..4ea0d680 --- /dev/null +++ b/riscv/insns/mul_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(sext(RS1 >> 16, 16) * sext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/mul_w00.h b/riscv/insns/mul_w00.h new file mode 100644 index 00000000..a338218e --- /dev/null +++ b/riscv/insns/mul_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(sext32(RS1) * sext32(RS2)); diff --git a/riscv/insns/mul_w01.h b/riscv/insns/mul_w01.h new file mode 100644 index 00000000..23c7f73c --- /dev/null +++ b/riscv/insns/mul_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(sext32(RS1) * sext32(RS2 >> 32)); diff --git a/riscv/insns/mul_w11.h b/riscv/insns/mul_w11.h new file mode 100644 index 00000000..d0233c11 --- /dev/null +++ b/riscv/insns/mul_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(sext32(RS1 >> 32) * sext32(RS2 >> 32)); diff --git a/riscv/insns/mulh_h0.h b/riscv/insns/mulh_h0.h new file mode 100644 index 00000000..2143d3d2 --- /dev/null +++ b/riscv/insns/mulh_h0.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 0, 16),64); +WRITE_RD(mres>>32);
\ No newline at end of file diff --git a/riscv/insns/mulh_h1.h b/riscv/insns/mulh_h1.h new file mode 100644 index 00000000..5e5bf994 --- /dev/null +++ b/riscv/insns/mulh_h1.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +int64_t mres = sext(RS1,64) * sext(P_FIELD(RS2, 1, 16),64); +WRITE_RD(mres>>32);
\ No newline at end of file diff --git a/riscv/insns/mulhr.h b/riscv/insns/mulhr.h new file mode 100644 index 00000000..527d2a2f --- /dev/null +++ b/riscv/insns/mulhr.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +int64_t mres = sext(RS1,64) * sext(RS2,64); +WRITE_RD(((mres >> 31) + 1) >> 1);
\ No newline at end of file diff --git a/riscv/insns/mulhrsu.h b/riscv/insns/mulhrsu.h new file mode 100644 index 00000000..bbd7619b --- /dev/null +++ b/riscv/insns/mulhrsu.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext(RS1,64) * reg_t((uint32_t)RS2); +WRITE_RD(((mres >> 31) + 1) >> 1);
\ No newline at end of file diff --git a/riscv/insns/mulhru.h b/riscv/insns/mulhru.h new file mode 100644 index 00000000..51cf38cb --- /dev/null +++ b/riscv/insns/mulhru.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = reg_t((uint32_t)RS1) * reg_t((uint32_t)RS2); +WRITE_RD(((mres >> 31) + 1) >> 1);
\ No newline at end of file diff --git a/riscv/insns/mulhsu_h0.h b/riscv/insns/mulhsu_h0.h new file mode 100644 index 00000000..2cdb292c --- /dev/null +++ b/riscv/insns/mulhsu_h0.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 0, 16); +WRITE_RD(mres >> 32);
\ No newline at end of file diff --git a/riscv/insns/mulhsu_h1.h b/riscv/insns/mulhsu_h1.h new file mode 100644 index 00000000..4cc9fc32 --- /dev/null +++ b/riscv/insns/mulhsu_h1.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +sreg_t mres = sext32(RS1) * (uint32_t)P_FIELD(RS2, 1, 16); +WRITE_RD(mres >> 32);
\ No newline at end of file diff --git a/riscv/insns/mulq.h b/riscv/insns/mulq.h new file mode 100644 index 00000000..256b7efd --- /dev/null +++ b/riscv/insns/mulq.h @@ -0,0 +1,8 @@ +require_extension('P'); +require_rv32; +if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) { + WRITE_RD((RS1 * RS2) >> 31); + } else { + WRITE_RD(INT32_MAX); + P.VU.vxsat->write(1); +} diff --git a/riscv/insns/mulqr.h b/riscv/insns/mulqr.h new file mode 100644 index 00000000..d024e9ff --- /dev/null +++ b/riscv/insns/mulqr.h @@ -0,0 +1,8 @@ +require_extension('P'); +require_rv32; +if ((RS1 != (reg_t)INT32_MIN) || (RS2 != (reg_t)INT32_MIN)) { + WRITE_RD((((RS1 * RS2) >> 30) + 1) >> 1); + } else { + WRITE_RD(INT32_MAX); + P.VU.vxsat->write(1); +} diff --git a/riscv/insns/mulsu_h00.h b/riscv/insns/mulsu_h00.h new file mode 100644 index 00000000..f02de759 --- /dev/null +++ b/riscv/insns/mulsu_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(sext(RS1, 16) * zext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/mulsu_h11.h b/riscv/insns/mulsu_h11.h new file mode 100644 index 00000000..d4954037 --- /dev/null +++ b/riscv/insns/mulsu_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(sext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/mulsu_w00.h b/riscv/insns/mulsu_w00.h new file mode 100644 index 00000000..0323688d --- /dev/null +++ b/riscv/insns/mulsu_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(sext32(RS1) * zext32(RS2)); diff --git a/riscv/insns/mulsu_w11.h b/riscv/insns/mulsu_w11.h new file mode 100644 index 00000000..21f0c004 --- /dev/null +++ b/riscv/insns/mulsu_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(sext32(RS1 >> 32) * zext32(RS2 >> 32)); diff --git a/riscv/insns/mulu_h00.h b/riscv/insns/mulu_h00.h new file mode 100644 index 00000000..d92c605b --- /dev/null +++ b/riscv/insns/mulu_h00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(zext(RS1, 16) * zext(RS2, 16));
\ No newline at end of file diff --git a/riscv/insns/mulu_h01.h b/riscv/insns/mulu_h01.h new file mode 100644 index 00000000..75a8302b --- /dev/null +++ b/riscv/insns/mulu_h01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(zext(RS1, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/mulu_h11.h b/riscv/insns/mulu_h11.h new file mode 100644 index 00000000..28db7c86 --- /dev/null +++ b/riscv/insns/mulu_h11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(zext(RS1 >> 16, 16) * zext(RS2 >> 16, 16));
\ No newline at end of file diff --git a/riscv/insns/mulu_w00.h b/riscv/insns/mulu_w00.h new file mode 100644 index 00000000..ce96de9c --- /dev/null +++ b/riscv/insns/mulu_w00.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(zext32(RS1) * zext32(RS2)); diff --git a/riscv/insns/mulu_w01.h b/riscv/insns/mulu_w01.h new file mode 100644 index 00000000..ee911eee --- /dev/null +++ b/riscv/insns/mulu_w01.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(zext32(RS1) * zext32(RS2 >> 32)); diff --git a/riscv/insns/mulu_w11.h b/riscv/insns/mulu_w11.h new file mode 100644 index 00000000..2111bebc --- /dev/null +++ b/riscv/insns/mulu_w11.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(zext32(RS1 >> 32) * zext32(RS2 >> 32)); diff --git a/riscv/insns/mvm.h b/riscv/insns/mvm.h new file mode 100644 index 00000000..bf2ddad1 --- /dev/null +++ b/riscv/insns/mvm.h @@ -0,0 +1,2 @@ +require_extension('P'); +WRITE_RD((RS1 & RS2) | (RD & ~RS2));
\ No newline at end of file diff --git a/riscv/insns/mvmn.h b/riscv/insns/mvmn.h new file mode 100644 index 00000000..8c863d91 --- /dev/null +++ b/riscv/insns/mvmn.h @@ -0,0 +1,2 @@ +require_extension('P'); +WRITE_RD((RD & RS2) | (RS1 & ~RS2));
\ No newline at end of file diff --git a/riscv/insns/nclip.h b/riscv/insns/nclip.h new file mode 100644 index 00000000..f1ecfc76 --- /dev/null +++ b/riscv/insns/nclip.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +sreg_t tmp = (sreg_t)P_RS1_PAIR >> (RS2 & 0x3f); +int32_t result = P_SAT(32, tmp); +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipi.h b/riscv/insns/nclipi.h new file mode 100644 index 00000000..79bc1f2a --- /dev/null +++ b/riscv/insns/nclipi.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +sreg_t tmp = (sreg_t)P_RS1_PAIR >> insn.shamtd(); +int32_t result = P_SAT(32, tmp); +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipiu.h b/riscv/insns/nclipiu.h new file mode 100644 index 00000000..d8608d10 --- /dev/null +++ b/riscv/insns/nclipiu.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +reg_t tmp = (reg_t)P_RS1_PAIR >> insn.shamtd(); +uint32_t result = P_USAT_FULL(32, (sreg_t)tmp); +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipr.h b/riscv/insns/nclipr.h new file mode 100644 index 00000000..e9aca14e --- /dev/null +++ b/riscv/insns/nclipr.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +sreg_t val = (sreg_t)P_RS1_PAIR; +uint32_t shamt = RS2 & 0x3f; +sreg_t result; +if (shamt == 0) { + result = P_SAT(32, val); +} else { + result = P_SAT(32, (val >> shamt) + ((val >> (shamt - 1)) & 1)); +} +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipri.h b/riscv/insns/nclipri.h new file mode 100644 index 00000000..17528201 --- /dev/null +++ b/riscv/insns/nclipri.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +sreg_t val = (sreg_t)P_RS1_PAIR; +uint32_t shamt = insn.shamtd(); +sreg_t result; +if (shamt == 0) { + result = P_SAT(32, val); +} else { + result = P_SAT(32, (val >> shamt) + ((val >> (shamt - 1)) & 1)); +} +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipriu.h b/riscv/insns/nclipriu.h new file mode 100644 index 00000000..2595dbc8 --- /dev/null +++ b/riscv/insns/nclipriu.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +reg_t val = (reg_t)P_RS1_PAIR; +uint32_t shamt = insn.shamtd(); +reg_t result; +if (shamt == 0) { + result = P_USAT_FULL(32, (sreg_t)val); +} else { + result = P_USAT_FULL(32, (sreg_t)((val >> shamt) + ((val >> (shamt - 1)) & 1))); +} +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipru.h b/riscv/insns/nclipru.h new file mode 100644 index 00000000..c8044ed0 --- /dev/null +++ b/riscv/insns/nclipru.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +reg_t val = (reg_t)P_RS1_PAIR; +uint32_t shamt = RS2 & 0x3f; +reg_t result; +if (shamt == 0) { + result = P_USAT_FULL(32, (sreg_t)val); +} else { + result = P_USAT_FULL(32, (sreg_t)((val >> shamt) + ((val >> (shamt - 1)) & 1))); +} +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nclipu.h b/riscv/insns/nclipu.h new file mode 100644 index 00000000..a1e6099d --- /dev/null +++ b/riscv/insns/nclipu.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +reg_t tmp = (reg_t)P_RS1_PAIR >> (RS2 & 0x3f); +uint32_t result = P_USAT_FULL(32, (sreg_t)tmp); +WRITE_RD(result);
\ No newline at end of file diff --git a/riscv/insns/nsra.h b/riscv/insns/nsra.h new file mode 100644 index 00000000..7cf9f39f --- /dev/null +++ b/riscv/insns/nsra.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((sreg_t)P_RS1_PAIR >> (RS2 & 0x3f));
\ No newline at end of file diff --git a/riscv/insns/nsrai.h b/riscv/insns/nsrai.h new file mode 100644 index 00000000..63e287ca --- /dev/null +++ b/riscv/insns/nsrai.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD((sreg_t)P_RS1_PAIR >> insn.shamtd());
\ No newline at end of file diff --git a/riscv/insns/nsrar.h b/riscv/insns/nsrar.h new file mode 100644 index 00000000..b0879d3f --- /dev/null +++ b/riscv/insns/nsrar.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +sreg_t val = (sreg_t)P_RS1_PAIR; +uint32_t shamt = RS2 & 0x3f; +sreg_t result; +if (shamt == 0) { + result = val; +} else { + result = (val >> shamt) + ((val >> (shamt - 1)) & 1); +} +WRITE_RD(result); diff --git a/riscv/insns/nsrari.h b/riscv/insns/nsrari.h new file mode 100644 index 00000000..4e5fb806 --- /dev/null +++ b/riscv/insns/nsrari.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv32; +sreg_t val = (sreg_t)P_RS1_PAIR; +uint32_t shamt = insn.shamtd(); +sreg_t result; +if (shamt == 0) { + result = val; +} else { + result = (val >> shamt) + ((val >> (shamt - 1)) & 1); +} +WRITE_RD(result); diff --git a/riscv/insns/nsrl.h b/riscv/insns/nsrl.h new file mode 100644 index 00000000..7de7e5b8 --- /dev/null +++ b/riscv/insns/nsrl.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_RS1_PAIR >> (RS2 & 0x3f));
\ No newline at end of file diff --git a/riscv/insns/nsrli.h b/riscv/insns/nsrli.h new file mode 100644 index 00000000..b85a84ee --- /dev/null +++ b/riscv/insns/nsrli.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_RS1_PAIR >> insn.shamtd());
\ No newline at end of file diff --git a/riscv/insns/paadd_b.h b/riscv/insns/paadd_b.h new file mode 100644 index 00000000..9f5f043c --- /dev/null +++ b/riscv/insns/paadd_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paadd_db.h b/riscv/insns/paadd_db.h new file mode 100644 index 00000000..4ce1e126 --- /dev/null +++ b/riscv/insns/paadd_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8,8,8, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paadd_dh.h b/riscv/insns/paadd_dh.h new file mode 100644 index 00000000..966921c6 --- /dev/null +++ b/riscv/insns/paadd_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16,16,16, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paadd_dw.h b/riscv/insns/paadd_dw.h new file mode 100644 index 00000000..2409cf55 --- /dev/null +++ b/riscv/insns/paadd_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32,32,32, { + p_rd = ((sreg_t)p_rs1 + (sreg_t)p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paadd_h.h b/riscv/insns/paadd_h.h new file mode 100644 index 00000000..bc01ea16 --- /dev/null +++ b/riscv/insns/paadd_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paadd_w.h b/riscv/insns/paadd_w.h new file mode 100644 index 00000000..6dd9811f --- /dev/null +++ b/riscv/insns/paadd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = ((int64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/paaddu_b.h b/riscv/insns/paaddu_b.h new file mode 100644 index 00000000..0a413d55 --- /dev/null +++ b/riscv/insns/paaddu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paaddu_db.h b/riscv/insns/paaddu_db.h new file mode 100644 index 00000000..71899a34 --- /dev/null +++ b/riscv/insns/paaddu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8,8,8, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paaddu_dh.h b/riscv/insns/paaddu_dh.h new file mode 100644 index 00000000..884b277e --- /dev/null +++ b/riscv/insns/paaddu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16,16,16, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paaddu_dw.h b/riscv/insns/paaddu_dw.h new file mode 100644 index 00000000..0ba41340 --- /dev/null +++ b/riscv/insns/paaddu_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32,32,32, { + p_rd = ((reg_t)p_rs1 + (reg_t)p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paaddu_h.h b/riscv/insns/paaddu_h.h new file mode 100644 index 00000000..dbef824b --- /dev/null +++ b/riscv/insns/paaddu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paaddu_w.h b/riscv/insns/paaddu_w.h new file mode 100644 index 00000000..fee391c7 --- /dev/null +++ b/riscv/insns/paaddu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/paas_dhx.h b/riscv/insns/paas_dhx.h new file mode 100644 index 00000000..43ff1a26 --- /dev/null +++ b/riscv/insns/paas_dhx.h @@ -0,0 +1,6 @@ +require_rv32; +P_CROSS_DW_LOOP(16, { + p_rd = (p_rs1 + p_rs2) >> 1; +}, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paas_hx.h b/riscv/insns/paas_hx.h new file mode 100644 index 00000000..5c393a85 --- /dev/null +++ b/riscv/insns/paas_hx.h @@ -0,0 +1,5 @@ +P_CROSS_LOOP(16, { + p_rd = (p_rs1 + p_rs2) >> 1; +}, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/paas_wx.h b/riscv/insns/paas_wx.h new file mode 100644 index 00000000..64565491 --- /dev/null +++ b/riscv/insns/paas_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = ((int64_t)p_rs1 + p_rs2) >> 1; +}, { + p_rd = ((int64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/pabd_b.h b/riscv/insns/pabd_b.h new file mode 100644 index 00000000..978adbac --- /dev/null +++ b/riscv/insns/pabd_b.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? (int8_t)((uint8_t)p_rs2 - (uint8_t)p_rs1) + : (int8_t)((uint8_t)p_rs1 - (uint8_t)p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pabd_db.h b/riscv/insns/pabd_db.h new file mode 100644 index 00000000..495f4aa1 --- /dev/null +++ b/riscv/insns/pabd_db.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? (int8_t)((uint8_t)p_rs2 - (uint8_t)p_rs1) + : (int8_t)((uint8_t)p_rs1 - (uint8_t)p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pabd_dh.h b/riscv/insns/pabd_dh.h new file mode 100644 index 00000000..035de401 --- /dev/null +++ b/riscv/insns/pabd_dh.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? (int16_t)((uint16_t)p_rs2 - (uint16_t)p_rs1) + : (int16_t)((uint16_t)p_rs1 - (uint16_t)p_rs2); +}) diff --git a/riscv/insns/pabd_h.h b/riscv/insns/pabd_h.h new file mode 100644 index 00000000..cd18fac7 --- /dev/null +++ b/riscv/insns/pabd_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? (int16_t)((uint16_t)p_rs2 - (uint16_t)p_rs1) + : (int16_t)((uint16_t)p_rs1 - (uint16_t)p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pabdsumau_b.h b/riscv/insns/pabdsumau_b.h new file mode 100644 index 00000000..6ffc6888 --- /dev/null +++ b/riscv/insns/pabdsumau_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(64, 8, true, false, { + p_res += (p_rs1 > p_rs2 ? p_rs1 - p_rs2 : p_rs2 - p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/pabdsumu_b.h b/riscv/insns/pabdsumu_b.h new file mode 100644 index 00000000..b7effa47 --- /dev/null +++ b/riscv/insns/pabdsumu_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(64, 8, false, false, { + p_res += (p_rs1 > p_rs2 ? p_rs1 - p_rs2 : p_rs2 - p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/pabdu_b.h b/riscv/insns/pabdu_b.h new file mode 100644 index 00000000..d0092550 --- /dev/null +++ b/riscv/insns/pabdu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pabdu_db.h b/riscv/insns/pabdu_db.h new file mode 100644 index 00000000..a60eef91 --- /dev/null +++ b/riscv/insns/pabdu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pabdu_dh.h b/riscv/insns/pabdu_dh.h new file mode 100644 index 00000000..6bff1079 --- /dev/null +++ b/riscv/insns/pabdu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pabdu_h.h b/riscv/insns/pabdu_h.h new file mode 100644 index 00000000..83b1445d --- /dev/null +++ b/riscv/insns/pabdu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? p_rs2 - p_rs1 : p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pack.h b/riscv/insns/pack.h index acc49877..25f5145b 100644 --- a/riscv/insns/pack.h +++ b/riscv/insns/pack.h @@ -1,6 +1,7 @@ // RV32Zbb contains zext.h but not general pack require(((xlen == 32) && (insn.rs2() == 0) && p->extension_enabled(EXT_ZBB)) - || p->extension_enabled(EXT_ZBKB)); + || p->extension_enabled(EXT_ZBKB) + || p->extension_enabled('P')); reg_t lo = zext_xlen(RS1 << (xlen/2)) >> (xlen/2); reg_t hi = zext_xlen(RS2 << (xlen/2)); -WRITE_RD(sext_xlen(lo | hi)); +WRITE_RD(sext_xlen(lo | hi));
\ No newline at end of file diff --git a/riscv/insns/padd_b.h b/riscv/insns/padd_b.h new file mode 100644 index 00000000..05f890ca --- /dev/null +++ b/riscv/insns/padd_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/padd_bs.h b/riscv/insns/padd_bs.h new file mode 100644 index 00000000..9070fc9b --- /dev/null +++ b/riscv/insns/padd_bs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(8, 8, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 8); +})
\ No newline at end of file diff --git a/riscv/insns/padd_db.h b/riscv/insns/padd_db.h new file mode 100644 index 00000000..6f0ae17e --- /dev/null +++ b/riscv/insns/padd_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/padd_dbs.h b/riscv/insns/padd_dbs.h new file mode 100644 index 00000000..9fc77320 --- /dev/null +++ b/riscv/insns/padd_dbs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 8); +})
\ No newline at end of file diff --git a/riscv/insns/padd_dh.h b/riscv/insns/padd_dh.h new file mode 100644 index 00000000..eec465cc --- /dev/null +++ b/riscv/insns/padd_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/padd_dhs.h b/riscv/insns/padd_dhs.h new file mode 100644 index 00000000..c268c755 --- /dev/null +++ b/riscv/insns/padd_dhs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 16); +})
\ No newline at end of file diff --git a/riscv/insns/padd_dw.h b/riscv/insns/padd_dw.h new file mode 100644 index 00000000..9bf943db --- /dev/null +++ b/riscv/insns/padd_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/padd_dws.h b/riscv/insns/padd_dws.h new file mode 100644 index 00000000..58f1dd47 --- /dev/null +++ b/riscv/insns/padd_dws.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 32); +})
\ No newline at end of file diff --git a/riscv/insns/padd_h.h b/riscv/insns/padd_h.h new file mode 100644 index 00000000..5ff1d324 --- /dev/null +++ b/riscv/insns/padd_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16, 16, 16, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/padd_hs.h b/riscv/insns/padd_hs.h new file mode 100644 index 00000000..e68d0044 --- /dev/null +++ b/riscv/insns/padd_hs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 16); +})
\ No newline at end of file diff --git a/riscv/insns/padd_w.h b/riscv/insns/padd_w.h new file mode 100644 index 00000000..9049c7c2 --- /dev/null +++ b/riscv/insns/padd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = p_rs1 + p_rs2; +} +) diff --git a/riscv/insns/padd_ws.h b/riscv/insns/padd_ws.h new file mode 100644 index 00000000..a3fc8b12 --- /dev/null +++ b/riscv/insns/padd_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 + P_FIELD(RS2, 0, 32); +} +) diff --git a/riscv/insns/pas_dhx.h b/riscv/insns/pas_dhx.h new file mode 100644 index 00000000..3c74af3b --- /dev/null +++ b/riscv/insns/pas_dhx.h @@ -0,0 +1,6 @@ +require_rv32; +P_CROSS_DW_LOOP(16, { + p_rd = p_rs1 + p_rs2; +}, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pas_hx.h b/riscv/insns/pas_hx.h new file mode 100644 index 00000000..fbe4a244 --- /dev/null +++ b/riscv/insns/pas_hx.h @@ -0,0 +1,5 @@ +P_CROSS_LOOP(16, { + p_rd = p_rs1 + p_rs2; +}, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pas_wx.h b/riscv/insns/pas_wx.h new file mode 100644 index 00000000..b1d6394d --- /dev/null +++ b/riscv/insns/pas_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = p_rs1 + p_rs2; +}, { + p_rd = p_rs1 - p_rs2; +} +) diff --git a/riscv/insns/pasa_dhx.h b/riscv/insns/pasa_dhx.h new file mode 100644 index 00000000..253c9c5b --- /dev/null +++ b/riscv/insns/pasa_dhx.h @@ -0,0 +1,6 @@ +require_rv32; +P_CROSS_DW_LOOP(16, { + p_rd = (p_rs1 - p_rs2) >> 1; +}, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasa_hx.h b/riscv/insns/pasa_hx.h new file mode 100644 index 00000000..eea09357 --- /dev/null +++ b/riscv/insns/pasa_hx.h @@ -0,0 +1,5 @@ +P_CROSS_LOOP(16, { + p_rd = (p_rs1 - p_rs2) >> 1; +}, { + p_rd = (p_rs1 + p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasa_wx.h b/riscv/insns/pasa_wx.h new file mode 100644 index 00000000..1ddcd3b0 --- /dev/null +++ b/riscv/insns/pasa_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1; +}, { + p_rd = ((uint64_t)p_rs1 + p_rs2) >> 1; +} +) diff --git a/riscv/insns/pasub_b.h b/riscv/insns/pasub_b.h new file mode 100644 index 00000000..48173164 --- /dev/null +++ b/riscv/insns/pasub_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasub_db.h b/riscv/insns/pasub_db.h new file mode 100644 index 00000000..b2f4674e --- /dev/null +++ b/riscv/insns/pasub_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8,8,8, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasub_dh.h b/riscv/insns/pasub_dh.h new file mode 100644 index 00000000..72fbf04d --- /dev/null +++ b/riscv/insns/pasub_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16,16,16, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasub_dw.h b/riscv/insns/pasub_dw.h new file mode 100644 index 00000000..4305989f --- /dev/null +++ b/riscv/insns/pasub_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32,32,32, { + p_rd = ((sreg_t)p_rs1 - (sreg_t)p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasub_h.h b/riscv/insns/pasub_h.h new file mode 100644 index 00000000..57c271ae --- /dev/null +++ b/riscv/insns/pasub_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasub_w.h b/riscv/insns/pasub_w.h new file mode 100644 index 00000000..55c24439 --- /dev/null +++ b/riscv/insns/pasub_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = ((int64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/pasubu_b.h b/riscv/insns/pasubu_b.h new file mode 100644 index 00000000..7543305a --- /dev/null +++ b/riscv/insns/pasubu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasubu_db.h b/riscv/insns/pasubu_db.h new file mode 100644 index 00000000..cafdcd2e --- /dev/null +++ b/riscv/insns/pasubu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8,8,8, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasubu_dh.h b/riscv/insns/pasubu_dh.h new file mode 100644 index 00000000..b6d1bff3 --- /dev/null +++ b/riscv/insns/pasubu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16,16,16, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasubu_dw.h b/riscv/insns/pasubu_dw.h new file mode 100644 index 00000000..415fc7f9 --- /dev/null +++ b/riscv/insns/pasubu_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32,32,32, { + p_rd = ((reg_t)p_rs1 - (reg_t)p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasubu_h.h b/riscv/insns/pasubu_h.h new file mode 100644 index 00000000..453fe57b --- /dev/null +++ b/riscv/insns/pasubu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + p_rd = (p_rs1 - p_rs2) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pasubu_w.h b/riscv/insns/pasubu_w.h new file mode 100644 index 00000000..39d4693f --- /dev/null +++ b/riscv/insns/pasubu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = ((uint64_t)p_rs1 - p_rs2) >> 1; +} +) diff --git a/riscv/insns/pli_b.h b/riscv/insns/pli_b.h new file mode 100644 index 00000000..b04452e3 --- /dev/null +++ b/riscv/insns/pli_b.h @@ -0,0 +1,3 @@ +P_RD_LOOP(8, { + p_rd = insn.p_imm8(); +})
\ No newline at end of file diff --git a/riscv/insns/pli_db.h b/riscv/insns/pli_db.h new file mode 100644 index 00000000..e411fe0f --- /dev/null +++ b/riscv/insns/pli_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_DW_LOOP(8, { + p_rd = insn.p_imm8(); +})
\ No newline at end of file diff --git a/riscv/insns/pli_dh.h b/riscv/insns/pli_dh.h new file mode 100644 index 00000000..215b03df --- /dev/null +++ b/riscv/insns/pli_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_DW_LOOP(16, { + p_rd = (insn.p_imm10csl() & 0x200) ? (0xfc00 | insn.p_imm10csl()) : insn.p_imm10csl(); +})
\ No newline at end of file diff --git a/riscv/insns/pli_h.h b/riscv/insns/pli_h.h new file mode 100644 index 00000000..4a891624 --- /dev/null +++ b/riscv/insns/pli_h.h @@ -0,0 +1,3 @@ +P_RD_LOOP(16, { + p_rd = (insn.p_imm10csl() & 0x200) ? (0xfc00 | insn.p_imm10csl()) : insn.p_imm10csl(); +})
\ No newline at end of file diff --git a/riscv/insns/pli_w.h b/riscv/insns/pli_w.h new file mode 100644 index 00000000..22a69c81 --- /dev/null +++ b/riscv/insns/pli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_LOOP(32, { + p_rd = (insn.p_imm10csl() & 0x200) ? (0xfffffc00 | insn.p_imm10csl()) : insn.p_imm10csl(); +} +) diff --git a/riscv/insns/plui_dh.h b/riscv/insns/plui_dh.h new file mode 100644 index 00000000..61f3d6b6 --- /dev/null +++ b/riscv/insns/plui_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_DW_LOOP(16, { + p_rd = insn.p_imm10csr(); +})
\ No newline at end of file diff --git a/riscv/insns/plui_h.h b/riscv/insns/plui_h.h new file mode 100644 index 00000000..c11af3e3 --- /dev/null +++ b/riscv/insns/plui_h.h @@ -0,0 +1,3 @@ +P_RD_LOOP(16, { + p_rd = insn.p_imm10csr(); +})
\ No newline at end of file diff --git a/riscv/insns/plui_w.h b/riscv/insns/plui_w.h new file mode 100644 index 00000000..64461192 --- /dev/null +++ b/riscv/insns/plui_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_LOOP(32, { + p_rd = insn.p_imm10csrw(); +} +) diff --git a/riscv/insns/pm2add_h.h b/riscv/insns/pm2add_h.h new file mode 100644 index 00000000..c0218159 --- /dev/null +++ b/riscv/insns/pm2add_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2add_hx.h b/riscv/insns/pm2add_hx.h new file mode 100644 index 00000000..a84dbcc7 --- /dev/null +++ b/riscv/insns/pm2add_hx.h @@ -0,0 +1,3 @@ +P_REDUCTION_CROSS_LOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2add_w.h b/riscv/insns/pm2add_w.h new file mode 100644 index 00000000..33efbd63 --- /dev/null +++ b/riscv/insns/pm2add_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, false, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2add_wx.h b/riscv/insns/pm2add_wx.h new file mode 100644 index 00000000..ea8dc10e --- /dev/null +++ b/riscv/insns/pm2add_wx.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_CROSS_LOOP(64, 32, false, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2adda_h.h b/riscv/insns/pm2adda_h.h new file mode 100644 index 00000000..ed2e0eb5 --- /dev/null +++ b/riscv/insns/pm2adda_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2adda_hx.h b/riscv/insns/pm2adda_hx.h new file mode 100644 index 00000000..2a5d96cb --- /dev/null +++ b/riscv/insns/pm2adda_hx.h @@ -0,0 +1,3 @@ +P_REDUCTION_CROSS_LOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2adda_w.h b/riscv/insns/pm2adda_w.h new file mode 100644 index 00000000..3bbb37ea --- /dev/null +++ b/riscv/insns/pm2adda_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, true, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2adda_wx.h b/riscv/insns/pm2adda_wx.h new file mode 100644 index 00000000..02bd918b --- /dev/null +++ b/riscv/insns/pm2adda_wx.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_CROSS_LOOP(64, 32, true, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2addasu_h.h b/riscv/insns/pm2addasu_h.h new file mode 100644 index 00000000..8ddbcf21 --- /dev/null +++ b/riscv/insns/pm2addasu_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_SULOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2addasu_w.h b/riscv/insns/pm2addasu_w.h new file mode 100644 index 00000000..4168bae3 --- /dev/null +++ b/riscv/insns/pm2addasu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_SULOOP(64, 32, true, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2addau_h.h b/riscv/insns/pm2addau_h.h new file mode 100644 index 00000000..bc8dba63 --- /dev/null +++ b/riscv/insns/pm2addau_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2addau_w.h b/riscv/insns/pm2addau_w.h new file mode 100644 index 00000000..ecc60c49 --- /dev/null +++ b/riscv/insns/pm2addau_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_ULOOP(64, 32, true, false, { + p_res += (reg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2addsu_h.h b/riscv/insns/pm2addsu_h.h new file mode 100644 index 00000000..dfbc5274 --- /dev/null +++ b/riscv/insns/pm2addsu_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_SULOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2addsu_w.h b/riscv/insns/pm2addsu_w.h new file mode 100644 index 00000000..8b36ddf2 --- /dev/null +++ b/riscv/insns/pm2addsu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_SULOOP(64, 32, false, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2addu_h.h b/riscv/insns/pm2addu_h.h new file mode 100644 index 00000000..97944410 --- /dev/null +++ b/riscv/insns/pm2addu_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2addu_w.h b/riscv/insns/pm2addu_w.h new file mode 100644 index 00000000..fb9b4bc8 --- /dev/null +++ b/riscv/insns/pm2addu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_ULOOP(64, 32, false, false, { + p_res += (reg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2sadd_h.h b/riscv/insns/pm2sadd_h.h new file mode 100644 index 00000000..01ba8c66 --- /dev/null +++ b/riscv/insns/pm2sadd_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, false, true, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2sadd_hx.h b/riscv/insns/pm2sadd_hx.h new file mode 100644 index 00000000..d7dca373 --- /dev/null +++ b/riscv/insns/pm2sadd_hx.h @@ -0,0 +1,3 @@ +P_REDUCTION_CROSS_LOOP(32, 16, false, true, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2sub_h.h b/riscv/insns/pm2sub_h.h new file mode 100644 index 00000000..48f6ce06 --- /dev/null +++ b/riscv/insns/pm2sub_h.h @@ -0,0 +1,6 @@ +P_REDUCTION_LOOP(32, 16, false, false, { + if (j & 1) + p_res -= p_rs1 * p_rs2; + else + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2sub_hx.h b/riscv/insns/pm2sub_hx.h new file mode 100644 index 00000000..1ff687c0 --- /dev/null +++ b/riscv/insns/pm2sub_hx.h @@ -0,0 +1,6 @@ +P_REDUCTION_CROSS_LOOP(32, 16, false, false, { + if (j & 1) + p_res -= p_rs1 * p_rs2; + else + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2sub_w.h b/riscv/insns/pm2sub_w.h new file mode 100644 index 00000000..4e7c8307 --- /dev/null +++ b/riscv/insns/pm2sub_w.h @@ -0,0 +1,8 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, false, false, { + if (j & 1) + p_res -= (sreg_t)p_rs1 * p_rs2; + else + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2sub_wx.h b/riscv/insns/pm2sub_wx.h new file mode 100644 index 00000000..f8b300f2 --- /dev/null +++ b/riscv/insns/pm2sub_wx.h @@ -0,0 +1,8 @@ +require_rv64; +P_REDUCTION_CROSS_LOOP(64, 32, false, false, { + if (j & 1) + p_res -= (sreg_t)p_rs1 * p_rs2; + else + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2suba_h.h b/riscv/insns/pm2suba_h.h new file mode 100644 index 00000000..d8c923e2 --- /dev/null +++ b/riscv/insns/pm2suba_h.h @@ -0,0 +1,6 @@ +P_REDUCTION_LOOP(32, 16, true, false, { + if (j & 1) + p_res -= p_rs1 * p_rs2; + else + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2suba_hx.h b/riscv/insns/pm2suba_hx.h new file mode 100644 index 00000000..13971e26 --- /dev/null +++ b/riscv/insns/pm2suba_hx.h @@ -0,0 +1,6 @@ +P_REDUCTION_CROSS_LOOP(32, 16, true, false, { + if (j & 1) + p_res -= p_rs1 * p_rs2; + else + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2suba_w.h b/riscv/insns/pm2suba_w.h new file mode 100644 index 00000000..f3f4dc96 --- /dev/null +++ b/riscv/insns/pm2suba_w.h @@ -0,0 +1,8 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, true, false, { + if (j & 1) + p_res -= (sreg_t)p_rs1 * p_rs2; + else + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2suba_wx.h b/riscv/insns/pm2suba_wx.h new file mode 100644 index 00000000..1a597259 --- /dev/null +++ b/riscv/insns/pm2suba_wx.h @@ -0,0 +1,8 @@ +require_rv64; +P_REDUCTION_CROSS_LOOP(64, 32, true, false, { + if (j & 1) + p_res -= (sreg_t)p_rs1 * p_rs2; + else + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm2wadd_h.h b/riscv/insns/pm2wadd_h.h new file mode 100644 index 00000000..be756fb7 --- /dev/null +++ b/riscv/insns/pm2wadd_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_LOOP(32, 16, false, false, { + p_res += sext32(p_rs1) * sext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pm2wadd_hx.h b/riscv/insns/pm2wadd_hx.h new file mode 100644 index 00000000..dd000bbf --- /dev/null +++ b/riscv/insns/pm2wadd_hx.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_CROSS_LOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wadda_h.h b/riscv/insns/pm2wadda_h.h new file mode 100644 index 00000000..a0a1bb65 --- /dev/null +++ b/riscv/insns/pm2wadda_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_LOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wadda_hx.h b/riscv/insns/pm2wadda_hx.h new file mode 100644 index 00000000..8ef3e387 --- /dev/null +++ b/riscv/insns/pm2wadda_hx.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_CROSS_LOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2waddasu_h.h b/riscv/insns/pm2waddasu_h.h new file mode 100644 index 00000000..b525feb4 --- /dev/null +++ b/riscv/insns/pm2waddasu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_SULOOP(32, 16, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2waddau_h.h b/riscv/insns/pm2waddau_h.h new file mode 100644 index 00000000..5e67a7a5 --- /dev/null +++ b/riscv/insns/pm2waddau_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_ULOOP(32, 16, true, false, { + p_res += (uint32_t)p_rs1 * (uint32_t)p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2waddsu_h.h b/riscv/insns/pm2waddsu_h.h new file mode 100644 index 00000000..8c845953 --- /dev/null +++ b/riscv/insns/pm2waddsu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_SULOOP(32, 16, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2waddu_h.h b/riscv/insns/pm2waddu_h.h new file mode 100644 index 00000000..30a4ad1f --- /dev/null +++ b/riscv/insns/pm2waddu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_REDUCTION_ULOOP(32, 16, false, false, { + p_res += (uint32_t)p_rs1 * (uint32_t)p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wsub_h.h b/riscv/insns/pm2wsub_h.h new file mode 100644 index 00000000..903cbe30 --- /dev/null +++ b/riscv/insns/pm2wsub_h.h @@ -0,0 +1,7 @@ +require_rv32; +P_WIDEN_REDUCTION_LOOP(32, 16, false, false, { + if (j & 1) + p_res += p_rs1 * p_rs2; + else + p_res -= p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wsub_hx.h b/riscv/insns/pm2wsub_hx.h new file mode 100644 index 00000000..81da3652 --- /dev/null +++ b/riscv/insns/pm2wsub_hx.h @@ -0,0 +1,7 @@ +require_rv32; +P_WIDEN_REDUCTION_CROSS_LOOP(32, 16, false, false, { + if (j & 1) + p_res += p_rs1 * p_rs2; + else + p_res -= p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wsuba_h.h b/riscv/insns/pm2wsuba_h.h new file mode 100644 index 00000000..600b77e2 --- /dev/null +++ b/riscv/insns/pm2wsuba_h.h @@ -0,0 +1,7 @@ +require_rv32; +P_WIDEN_REDUCTION_LOOP(32, 16, true, false, { + if (j & 1) + p_res += p_rs1 * p_rs2; + else + p_res -= p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm2wsuba_hx.h b/riscv/insns/pm2wsuba_hx.h new file mode 100644 index 00000000..58a99d03 --- /dev/null +++ b/riscv/insns/pm2wsuba_hx.h @@ -0,0 +1,7 @@ +require_rv32; +P_WIDEN_REDUCTION_CROSS_LOOP(32, 16, true, false, { + if (j & 1) + p_res += p_rs1 * p_rs2; + else + p_res -= p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4add_b.h b/riscv/insns/pm4add_b.h new file mode 100644 index 00000000..ac1c49ce --- /dev/null +++ b/riscv/insns/pm4add_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 8, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4add_h.h b/riscv/insns/pm4add_h.h new file mode 100644 index 00000000..ea9a82bf --- /dev/null +++ b/riscv/insns/pm4add_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 16, false, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm4adda_b.h b/riscv/insns/pm4adda_b.h new file mode 100644 index 00000000..d3e00eee --- /dev/null +++ b/riscv/insns/pm4adda_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 8, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4adda_h.h b/riscv/insns/pm4adda_h.h new file mode 100644 index 00000000..a3498cc4 --- /dev/null +++ b/riscv/insns/pm4adda_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 16, true, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm4addasu_b.h b/riscv/insns/pm4addasu_b.h new file mode 100644 index 00000000..cac07f07 --- /dev/null +++ b/riscv/insns/pm4addasu_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_SULOOP(32, 8, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4addasu_h.h b/riscv/insns/pm4addasu_h.h new file mode 100644 index 00000000..d0aafb61 --- /dev/null +++ b/riscv/insns/pm4addasu_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_SULOOP(64, 16, true, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm4addau_b.h b/riscv/insns/pm4addau_b.h new file mode 100644 index 00000000..37b29c33 --- /dev/null +++ b/riscv/insns/pm4addau_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(32, 8, true, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4addau_h.h b/riscv/insns/pm4addau_h.h new file mode 100644 index 00000000..1ce56684 --- /dev/null +++ b/riscv/insns/pm4addau_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_ULOOP(64, 16, true, false, { + p_res += (reg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm4addsu_b.h b/riscv/insns/pm4addsu_b.h new file mode 100644 index 00000000..02fb9b74 --- /dev/null +++ b/riscv/insns/pm4addsu_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_SULOOP(32, 8, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4addsu_h.h b/riscv/insns/pm4addsu_h.h new file mode 100644 index 00000000..1c0c6d8b --- /dev/null +++ b/riscv/insns/pm4addsu_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_SULOOP(64, 16, false, false, { + p_res += (sreg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pm4addu_b.h b/riscv/insns/pm4addu_b.h new file mode 100644 index 00000000..a6880e57 --- /dev/null +++ b/riscv/insns/pm4addu_b.h @@ -0,0 +1,3 @@ +P_REDUCTION_ULOOP(32, 8, false, false, { + p_res += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pm4addu_h.h b/riscv/insns/pm4addu_h.h new file mode 100644 index 00000000..b3ce1aa5 --- /dev/null +++ b/riscv/insns/pm4addu_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_ULOOP(64, 16, false, false, { + p_res += (reg_t)p_rs1 * p_rs2; +} +) diff --git a/riscv/insns/pmacc_w_h00.h b/riscv/insns/pmacc_w_h00.h new file mode 100644 index 00000000..086e8907 --- /dev/null +++ b/riscv/insns/pmacc_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_LOOP(32, 16, 16, { + p_rd += sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmacc_w_h01.h b/riscv/insns/pmacc_w_h01.h new file mode 100644 index 00000000..67557cf4 --- /dev/null +++ b/riscv/insns/pmacc_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_LOOP(32, 16, 16, { + p_rd += sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmacc_w_h11.h b/riscv/insns/pmacc_w_h11.h new file mode 100644 index 00000000..bd45540f --- /dev/null +++ b/riscv/insns/pmacc_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_LOOP(32, 16, 16, { + p_rd += sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmaccsu_w_h00.h b/riscv/insns/pmaccsu_w_h00.h new file mode 100644 index 00000000..d1c3cd54 --- /dev/null +++ b/riscv/insns/pmaccsu_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_SULOOP(32, 16, 16, { + p_rd += sext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmaccsu_w_h11.h b/riscv/insns/pmaccsu_w_h11.h new file mode 100644 index 00000000..dbe0b7fa --- /dev/null +++ b/riscv/insns/pmaccsu_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_SULOOP(32, 16, 16, { + p_rd += sext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmaccu_w_h00.h b/riscv/insns/pmaccu_w_h00.h new file mode 100644 index 00000000..001f7f42 --- /dev/null +++ b/riscv/insns/pmaccu_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_ULOOP(32, 16, 16, { + p_rd += zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmaccu_w_h01.h b/riscv/insns/pmaccu_w_h01.h new file mode 100644 index 00000000..da2a195c --- /dev/null +++ b/riscv/insns/pmaccu_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_ULOOP(32, 16, 16, { + p_rd += zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmaccu_w_h11.h b/riscv/insns/pmaccu_w_h11.h new file mode 100644 index 00000000..9aa94bd0 --- /dev/null +++ b/riscv/insns/pmaccu_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_ULOOP(32, 16, 16, { + p_rd += zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmax_b.h b/riscv/insns/pmax_b.h new file mode 100644 index 00000000..9ab92eb3 --- /dev/null +++ b/riscv/insns/pmax_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmax_db.h b/riscv/insns/pmax_db.h new file mode 100644 index 00000000..83c08cbb --- /dev/null +++ b/riscv/insns/pmax_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmax_dh.h b/riscv/insns/pmax_dh.h new file mode 100644 index 00000000..02b641aa --- /dev/null +++ b/riscv/insns/pmax_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmax_dw.h b/riscv/insns/pmax_dw.h new file mode 100644 index 00000000..e9df1181 --- /dev/null +++ b/riscv/insns/pmax_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmax_h.h b/riscv/insns/pmax_h.h new file mode 100644 index 00000000..b1e9c0ad --- /dev/null +++ b/riscv/insns/pmax_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmax_w.h b/riscv/insns/pmax_w.h new file mode 100644 index 00000000..ce11a5bb --- /dev/null +++ b/riscv/insns/pmax_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmaxu_b.h b/riscv/insns/pmaxu_b.h new file mode 100644 index 00000000..82b60f67 --- /dev/null +++ b/riscv/insns/pmaxu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmaxu_db.h b/riscv/insns/pmaxu_db.h new file mode 100644 index 00000000..43ad8537 --- /dev/null +++ b/riscv/insns/pmaxu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8, 8, 8, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmaxu_dh.h b/riscv/insns/pmaxu_dh.h new file mode 100644 index 00000000..7d04b443 --- /dev/null +++ b/riscv/insns/pmaxu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16, 16, 16, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmaxu_dw.h b/riscv/insns/pmaxu_dw.h new file mode 100644 index 00000000..5c3586d4 --- /dev/null +++ b/riscv/insns/pmaxu_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32, 32, 32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmaxu_h.h b/riscv/insns/pmaxu_h.h new file mode 100644 index 00000000..ac6f6028 --- /dev/null +++ b/riscv/insns/pmaxu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmaxu_w.h b/riscv/insns/pmaxu_w.h new file mode 100644 index 00000000..76648af7 --- /dev/null +++ b/riscv/insns/pmaxu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 > p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmhacc_h.h b/riscv/insns/pmhacc_h.h new file mode 100644 index 00000000..053c2858 --- /dev/null +++ b/riscv/insns/pmhacc_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + int32_t mres = sext32(p_rs1) * sext32(p_rs2); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhacc_h_b0.h b/riscv/insns/pmhacc_h_b0.h new file mode 100644 index 00000000..60a1d5c2 --- /dev/null +++ b/riscv/insns/pmhacc_h_b0.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_E_LOOP(16,16,8, { + int32_t mres = sext32(p_rs1) * sext32(p_rs2); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhacc_h_b1.h b/riscv/insns/pmhacc_h_b1.h new file mode 100644 index 00000000..c7aa4d7a --- /dev/null +++ b/riscv/insns/pmhacc_h_b1.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_O_LOOP(16,16,8, { + int32_t mres = sext32(p_rs1) * sext32(p_rs2); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhacc_w.h b/riscv/insns/pmhacc_w.h new file mode 100644 index 00000000..49f01c3f --- /dev/null +++ b/riscv/insns/pmhacc_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhacc_w_h0.h b/riscv/insns/pmhacc_w_h0.h new file mode 100644 index 00000000..76b33778 --- /dev/null +++ b/riscv/insns/pmhacc_w_h0.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_E_LOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhacc_w_h1.h b/riscv/insns/pmhacc_w_h1.h new file mode 100644 index 00000000..9f103ad6 --- /dev/null +++ b/riscv/insns/pmhacc_w_h1.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_O_LOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhaccsu_h.h b/riscv/insns/pmhaccsu_h.h new file mode 100644 index 00000000..10b0211c --- /dev/null +++ b/riscv/insns/pmhaccsu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_SULOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhaccsu_h_b0.h b/riscv/insns/pmhaccsu_h_b0.h new file mode 100644 index 00000000..3d14229b --- /dev/null +++ b/riscv/insns/pmhaccsu_h_b0.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_E_SULOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhaccsu_h_b1.h b/riscv/insns/pmhaccsu_h_b1.h new file mode 100644 index 00000000..6a5a478f --- /dev/null +++ b/riscv/insns/pmhaccsu_h_b1.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_O_SULOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhaccsu_w.h b/riscv/insns/pmhaccsu_w.h new file mode 100644 index 00000000..f82a283e --- /dev/null +++ b/riscv/insns/pmhaccsu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_SULOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhaccsu_w_h0.h b/riscv/insns/pmhaccsu_w_h0.h new file mode 100644 index 00000000..400eaa92 --- /dev/null +++ b/riscv/insns/pmhaccsu_w_h0.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_E_SULOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhaccsu_w_h1.h b/riscv/insns/pmhaccsu_w_h1.h new file mode 100644 index 00000000..55b07f20 --- /dev/null +++ b/riscv/insns/pmhaccsu_w_h1.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_O_SULOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhaccu_h.h b/riscv/insns/pmhaccu_h.h new file mode 100644 index 00000000..de1c6eb1 --- /dev/null +++ b/riscv/insns/pmhaccu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + uint32_t mres = zext(p_rs1,32) * zext(p_rs2,32); + p_rd += mres>>16; +})
\ No newline at end of file diff --git a/riscv/insns/pmhaccu_w.h b/riscv/insns/pmhaccu_w.h new file mode 100644 index 00000000..4e8950ac --- /dev/null +++ b/riscv/insns/pmhaccu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + reg_t mres = zext(p_rs1,64) * zext(p_rs2,64); + p_rd += mres>>32; +} +) diff --git a/riscv/insns/pmhracc_h.h b/riscv/insns/pmhracc_h.h new file mode 100644 index 00000000..1c79a71a --- /dev/null +++ b/riscv/insns/pmhracc_h.h @@ -0,0 +1,5 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * sext(p_rs2,32); + int16_t round = ((mres >> 15) + 1) >> 1; + p_rd += round; +})
\ No newline at end of file diff --git a/riscv/insns/pmhracc_w.h b/riscv/insns/pmhracc_w.h new file mode 100644 index 00000000..1a07d5a4 --- /dev/null +++ b/riscv/insns/pmhracc_w.h @@ -0,0 +1,7 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + int32_t round = ((mres >> 31) + 1) >> 1; + p_rd += round; +} +) diff --git a/riscv/insns/pmhraccsu_h.h b/riscv/insns/pmhraccsu_h.h new file mode 100644 index 00000000..c4302837 --- /dev/null +++ b/riscv/insns/pmhraccsu_h.h @@ -0,0 +1,5 @@ +P_RD_RS1_RS2_SULOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + int16_t round = ((mres >> 15) + 1) >> 1; + p_rd += round; +})
\ No newline at end of file diff --git a/riscv/insns/pmhraccsu_w.h b/riscv/insns/pmhraccsu_w.h new file mode 100644 index 00000000..7f1d648d --- /dev/null +++ b/riscv/insns/pmhraccsu_w.h @@ -0,0 +1,7 @@ +require_rv64; +P_RD_RS1_RS2_SULOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + int32_t round = ((mres >> 31) + 1) >> 1; + p_rd += round; +} +) diff --git a/riscv/insns/pmhraccu_h.h b/riscv/insns/pmhraccu_h.h new file mode 100644 index 00000000..41efaad8 --- /dev/null +++ b/riscv/insns/pmhraccu_h.h @@ -0,0 +1,5 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + uint32_t mres = zext(p_rs1,32) * zext(p_rs2,32); + uint16_t round = ((mres >> 15) + 1) >> 1; + p_rd += round; +})
\ No newline at end of file diff --git a/riscv/insns/pmhraccu_w.h b/riscv/insns/pmhraccu_w.h new file mode 100644 index 00000000..d25a0786 --- /dev/null +++ b/riscv/insns/pmhraccu_w.h @@ -0,0 +1,7 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + reg_t mres = zext(p_rs1,64) * zext(p_rs2,64); + uint32_t round = ((mres >> 31) + 1) >> 1; + p_rd += round; +} +) diff --git a/riscv/insns/pmin_b.h b/riscv/insns/pmin_b.h new file mode 100644 index 00000000..402301c0 --- /dev/null +++ b/riscv/insns/pmin_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmin_db.h b/riscv/insns/pmin_db.h new file mode 100644 index 00000000..7da8293a --- /dev/null +++ b/riscv/insns/pmin_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmin_dh.h b/riscv/insns/pmin_dh.h new file mode 100644 index 00000000..709f9d94 --- /dev/null +++ b/riscv/insns/pmin_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmin_dw.h b/riscv/insns/pmin_dw.h new file mode 100644 index 00000000..ba14e5ac --- /dev/null +++ b/riscv/insns/pmin_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmin_h.h b/riscv/insns/pmin_h.h new file mode 100644 index 00000000..2634f3cd --- /dev/null +++ b/riscv/insns/pmin_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pmin_w.h b/riscv/insns/pmin_w.h new file mode 100644 index 00000000..3afc921f --- /dev/null +++ b/riscv/insns/pmin_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pminu_b.h b/riscv/insns/pminu_b.h new file mode 100644 index 00000000..1156ff22 --- /dev/null +++ b/riscv/insns/pminu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pminu_db.h b/riscv/insns/pminu_db.h new file mode 100644 index 00000000..fd4a3799 --- /dev/null +++ b/riscv/insns/pminu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pminu_dh.h b/riscv/insns/pminu_dh.h new file mode 100644 index 00000000..8932cf0a --- /dev/null +++ b/riscv/insns/pminu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pminu_dw.h b/riscv/insns/pminu_dw.h new file mode 100644 index 00000000..051fcb94 --- /dev/null +++ b/riscv/insns/pminu_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32, 32, 32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pminu_h.h b/riscv/insns/pminu_h.h new file mode 100644 index 00000000..734339c8 --- /dev/null +++ b/riscv/insns/pminu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pminu_w.h b/riscv/insns/pminu_w.h new file mode 100644 index 00000000..a3b671d5 --- /dev/null +++ b/riscv/insns/pminu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? p_rs1 : p_rs2; +} +) diff --git a/riscv/insns/pmq2add_h.h b/riscv/insns/pmq2add_h.h new file mode 100644 index 00000000..efa6e8ff --- /dev/null +++ b/riscv/insns/pmq2add_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, false, false, { + p_res += (p_rs1 * p_rs2) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmq2add_w.h b/riscv/insns/pmq2add_w.h new file mode 100644 index 00000000..261dd846 --- /dev/null +++ b/riscv/insns/pmq2add_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, false, false, { + p_res += ((sreg_t)p_rs1 * p_rs2) >> 31; +} +) diff --git a/riscv/insns/pmq2adda_h.h b/riscv/insns/pmq2adda_h.h new file mode 100644 index 00000000..70e4a5c2 --- /dev/null +++ b/riscv/insns/pmq2adda_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, true, false, { + p_res += (p_rs1 * p_rs2) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmq2adda_w.h b/riscv/insns/pmq2adda_w.h new file mode 100644 index 00000000..5523d3f6 --- /dev/null +++ b/riscv/insns/pmq2adda_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, true, false, { + p_res += ((sreg_t)p_rs1 * p_rs2) >> 31; +} +) diff --git a/riscv/insns/pmqacc_w_h00.h b/riscv/insns/pmqacc_w_h00.h new file mode 100644 index 00000000..467eeedb --- /dev/null +++ b/riscv/insns/pmqacc_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2) >> 15; +}) + diff --git a/riscv/insns/pmqacc_w_h01.h b/riscv/insns/pmqacc_w_h01.h new file mode 100644 index 00000000..52e5fae0 --- /dev/null +++ b/riscv/insns/pmqacc_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2) >> 15; +}) + diff --git a/riscv/insns/pmqacc_w_h11.h b/riscv/insns/pmqacc_w_h11.h new file mode 100644 index 00000000..a377e1af --- /dev/null +++ b/riscv/insns/pmqacc_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2) >> 15; +}) + diff --git a/riscv/insns/pmqr2add_h.h b/riscv/insns/pmqr2add_h.h new file mode 100644 index 00000000..ee8ac64a --- /dev/null +++ b/riscv/insns/pmqr2add_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, false, false, { + p_res += ((p_rs1 * p_rs2) + 0x4000) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmqr2add_w.h b/riscv/insns/pmqr2add_w.h new file mode 100644 index 00000000..ab46915b --- /dev/null +++ b/riscv/insns/pmqr2add_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, false, false, { + p_res += (((sreg_t)p_rs1 * p_rs2) + 0x40000000) >> 31; +} +) diff --git a/riscv/insns/pmqr2adda_h.h b/riscv/insns/pmqr2adda_h.h new file mode 100644 index 00000000..7352e174 --- /dev/null +++ b/riscv/insns/pmqr2adda_h.h @@ -0,0 +1,3 @@ +P_REDUCTION_LOOP(32, 16, true, false, { + p_res += ((p_rs1 * p_rs2) + 0x4000) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmqr2adda_w.h b/riscv/insns/pmqr2adda_w.h new file mode 100644 index 00000000..36dce27e --- /dev/null +++ b/riscv/insns/pmqr2adda_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_REDUCTION_LOOP(64, 32, true, false, { + p_res += (((sreg_t)p_rs1 * p_rs2) + 0x40000000) >> 31; +} +) diff --git a/riscv/insns/pmqracc_w_h00.h b/riscv/insns/pmqracc_w_h00.h new file mode 100644 index 00000000..45b86be2 --- /dev/null +++ b/riscv/insns/pmqracc_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15; +} +) diff --git a/riscv/insns/pmqracc_w_h01.h b/riscv/insns/pmqracc_w_h01.h new file mode 100644 index 00000000..3dd8a325 --- /dev/null +++ b/riscv/insns/pmqracc_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15; +} +) diff --git a/riscv/insns/pmqracc_w_h11.h b/riscv/insns/pmqracc_w_h11.h new file mode 100644 index 00000000..a4250093 --- /dev/null +++ b/riscv/insns/pmqracc_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_LOOP(32, 16, 16, { + p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15; +} +) diff --git a/riscv/insns/pmqrwacc_h.h b/riscv/insns/pmqrwacc_h.h new file mode 100644 index 00000000..41ab71ea --- /dev/null +++ b/riscv/insns/pmqrwacc_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd += (p_rs1 * p_rs2 + 0x4000) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmqwacc_h.h b/riscv/insns/pmqwacc_h.h new file mode 100644 index 00000000..e6629270 --- /dev/null +++ b/riscv/insns/pmqwacc_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd += (p_rs1 * p_rs2) >> 15; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_b.h b/riscv/insns/pmseq_b.h new file mode 100644 index 00000000..bd66522d --- /dev/null +++ b/riscv/insns/pmseq_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_db.h b/riscv/insns/pmseq_db.h new file mode 100644 index 00000000..5013861a --- /dev/null +++ b/riscv/insns/pmseq_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_dh.h b/riscv/insns/pmseq_dh.h new file mode 100644 index 00000000..9abeae08 --- /dev/null +++ b/riscv/insns/pmseq_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_dw.h b/riscv/insns/pmseq_dw.h new file mode 100644 index 00000000..920020fd --- /dev/null +++ b/riscv/insns/pmseq_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_h.h b/riscv/insns/pmseq_h.h new file mode 100644 index 00000000..3a9b42f8 --- /dev/null +++ b/riscv/insns/pmseq_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmseq_w.h b/riscv/insns/pmseq_w.h new file mode 100644 index 00000000..9bf60850 --- /dev/null +++ b/riscv/insns/pmseq_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 == p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/pmslt_b.h b/riscv/insns/pmslt_b.h new file mode 100644 index 00000000..d0c1d1a6 --- /dev/null +++ b/riscv/insns/pmslt_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmslt_db.h b/riscv/insns/pmslt_db.h new file mode 100644 index 00000000..807f65b5 --- /dev/null +++ b/riscv/insns/pmslt_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmslt_dh.h b/riscv/insns/pmslt_dh.h new file mode 100644 index 00000000..6d6b997b --- /dev/null +++ b/riscv/insns/pmslt_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmslt_dw.h b/riscv/insns/pmslt_dw.h new file mode 100644 index 00000000..889a368f --- /dev/null +++ b/riscv/insns/pmslt_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmslt_h.h b/riscv/insns/pmslt_h.h new file mode 100644 index 00000000..73f71531 --- /dev/null +++ b/riscv/insns/pmslt_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmslt_w.h b/riscv/insns/pmslt_w.h new file mode 100644 index 00000000..41ca2410 --- /dev/null +++ b/riscv/insns/pmslt_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/pmsltu_b.h b/riscv/insns/pmsltu_b.h new file mode 100644 index 00000000..8e39925b --- /dev/null +++ b/riscv/insns/pmsltu_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmsltu_db.h b/riscv/insns/pmsltu_db.h new file mode 100644 index 00000000..e03d7e3a --- /dev/null +++ b/riscv/insns/pmsltu_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8 ,8 ,8, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmsltu_dh.h b/riscv/insns/pmsltu_dh.h new file mode 100644 index 00000000..84f3def2 --- /dev/null +++ b/riscv/insns/pmsltu_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16, 16, 16, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmsltu_dw.h b/riscv/insns/pmsltu_dw.h new file mode 100644 index 00000000..cc397ef9 --- /dev/null +++ b/riscv/insns/pmsltu_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32, 32, 32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmsltu_h.h b/riscv/insns/pmsltu_h.h new file mode 100644 index 00000000..90d21792 --- /dev/null +++ b/riscv/insns/pmsltu_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +})
\ No newline at end of file diff --git a/riscv/insns/pmsltu_w.h b/riscv/insns/pmsltu_w.h new file mode 100644 index 00000000..a96e0486 --- /dev/null +++ b/riscv/insns/pmsltu_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + p_rd = (p_rs1 < p_rs2) ? -1 : 0; +} +) diff --git a/riscv/insns/pmul_h_b00.h b/riscv/insns/pmul_h_b00.h new file mode 100644 index 00000000..41af6b34 --- /dev/null +++ b/riscv/insns/pmul_h_b00.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_EE_LOOP(16, 8, 8, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmul_h_b01.h b/riscv/insns/pmul_h_b01.h new file mode 100644 index 00000000..1cb85a1b --- /dev/null +++ b/riscv/insns/pmul_h_b01.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_EO_LOOP(16, 8, 8, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmul_h_b11.h b/riscv/insns/pmul_h_b11.h new file mode 100644 index 00000000..8a1765d2 --- /dev/null +++ b/riscv/insns/pmul_h_b11.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_OO_LOOP(16, 8, 8, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmul_w_h00.h b/riscv/insns/pmul_w_h00.h new file mode 100644 index 00000000..3181609f --- /dev/null +++ b/riscv/insns/pmul_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_LOOP(32, 16, 16, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmul_w_h01.h b/riscv/insns/pmul_w_h01.h new file mode 100644 index 00000000..c7468696 --- /dev/null +++ b/riscv/insns/pmul_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_LOOP(32, 16, 16, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmul_w_h11.h b/riscv/insns/pmul_w_h11.h new file mode 100644 index 00000000..4a719d04 --- /dev/null +++ b/riscv/insns/pmul_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_LOOP(32, 16, 16, { + p_rd = sext32(p_rs1) * sext32(p_rs2); +} +) diff --git a/riscv/insns/pmulh_h.h b/riscv/insns/pmulh_h.h new file mode 100644 index 00000000..0e199f7b --- /dev/null +++ b/riscv/insns/pmulh_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * sext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulh_h_b0.h b/riscv/insns/pmulh_h_b0.h new file mode 100644 index 00000000..5c69a9c6 --- /dev/null +++ b/riscv/insns/pmulh_h_b0.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_E_LOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * sext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulh_h_b1.h b/riscv/insns/pmulh_h_b1.h new file mode 100644 index 00000000..1cd5d680 --- /dev/null +++ b/riscv/insns/pmulh_h_b1.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_O_LOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * sext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulh_w.h b/riscv/insns/pmulh_w.h new file mode 100644 index 00000000..9e13219f --- /dev/null +++ b/riscv/insns/pmulh_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + int64_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulh_w_h0.h b/riscv/insns/pmulh_w_h0.h new file mode 100644 index 00000000..bff17442 --- /dev/null +++ b/riscv/insns/pmulh_w_h0.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_E_LOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulh_w_h1.h b/riscv/insns/pmulh_w_h1.h new file mode 100644 index 00000000..3a62a4aa --- /dev/null +++ b/riscv/insns/pmulh_w_h1.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_O_LOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulhr_h.h b/riscv/insns/pmulhr_h.h new file mode 100644 index 00000000..fbccf0fe --- /dev/null +++ b/riscv/insns/pmulhr_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * sext(p_rs2,32); + p_rd = ((mres >> 15) + 1) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhr_w.h b/riscv/insns/pmulhr_w.h new file mode 100644 index 00000000..24c32972 --- /dev/null +++ b/riscv/insns/pmulhr_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * sext(p_rs2,64); + p_rd = ((mres >> 31) + 1) >> 1; +} +) diff --git a/riscv/insns/pmulhrsu_h.h b/riscv/insns/pmulhrsu_h.h new file mode 100644 index 00000000..ab681ef0 --- /dev/null +++ b/riscv/insns/pmulhrsu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_SULOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd = ((mres >> 15) + 1) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhrsu_w.h b/riscv/insns/pmulhrsu_w.h new file mode 100644 index 00000000..2e163636 --- /dev/null +++ b/riscv/insns/pmulhrsu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_SULOOP(32,32,32, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd = ((mres >> 31) + 1) >> 1; +} +) diff --git a/riscv/insns/pmulhru_h.h b/riscv/insns/pmulhru_h.h new file mode 100644 index 00000000..82f1bfe5 --- /dev/null +++ b/riscv/insns/pmulhru_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + uint32_t mres = zext(p_rs1,32) * zext(p_rs2,32); + p_rd = ((mres >> 15) + 1) >> 1; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhru_w.h b/riscv/insns/pmulhru_w.h new file mode 100644 index 00000000..b067d3f1 --- /dev/null +++ b/riscv/insns/pmulhru_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + reg_t mres = zext(p_rs1,64) * zext(p_rs2,64); + p_rd = ((mres >> 31) + 1) >> 1; +} +) diff --git a/riscv/insns/pmulhsu_h.h b/riscv/insns/pmulhsu_h.h new file mode 100644 index 00000000..d4f07462 --- /dev/null +++ b/riscv/insns/pmulhsu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_SULOOP(16,16,16, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhsu_h_b0.h b/riscv/insns/pmulhsu_h_b0.h new file mode 100644 index 00000000..3cfdd4b4 --- /dev/null +++ b/riscv/insns/pmulhsu_h_b0.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_E_SULOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhsu_h_b1.h b/riscv/insns/pmulhsu_h_b1.h new file mode 100644 index 00000000..4e6b5bf3 --- /dev/null +++ b/riscv/insns/pmulhsu_h_b1.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_O_SULOOP(16,16,8, { + int32_t mres = sext(p_rs1,32) * zext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhsu_w.h b/riscv/insns/pmulhsu_w.h new file mode 100644 index 00000000..7dbca256 --- /dev/null +++ b/riscv/insns/pmulhsu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_SULOOP(32,32,32, { + int64_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulhsu_w_h0.h b/riscv/insns/pmulhsu_w_h0.h new file mode 100644 index 00000000..c4a28c74 --- /dev/null +++ b/riscv/insns/pmulhsu_w_h0.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_E_SULOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulhsu_w_h1.h b/riscv/insns/pmulhsu_w_h1.h new file mode 100644 index 00000000..fd5f2345 --- /dev/null +++ b/riscv/insns/pmulhsu_w_h1.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_O_SULOOP(32,32,16, { + sreg_t mres = sext(p_rs1,64) * zext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulhu_h.h b/riscv/insns/pmulhu_h.h new file mode 100644 index 00000000..32a1b280 --- /dev/null +++ b/riscv/insns/pmulhu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + uint32_t mres = zext(p_rs1,32) * zext(p_rs2,32); + p_rd = mres >> 16; +})
\ No newline at end of file diff --git a/riscv/insns/pmulhu_w.h b/riscv/insns/pmulhu_w.h new file mode 100644 index 00000000..a24e264e --- /dev/null +++ b/riscv/insns/pmulhu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + uint64_t mres = zext(p_rs1,64) * zext(p_rs2,64); + p_rd = mres >> 32; +} +) diff --git a/riscv/insns/pmulq_h.h b/riscv/insns/pmulq_h.h new file mode 100644 index 00000000..667f75bb --- /dev/null +++ b/riscv/insns/pmulq_h.h @@ -0,0 +1,8 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + if ((p_rs1 != INT16_MIN) | (p_rs2 != INT16_MIN)) { + p_rd = (p_rs1 * p_rs2) >> 15; + } else { + p_rd = INT16_MAX; + P.VU.vxsat->write(1); + } +})
\ No newline at end of file diff --git a/riscv/insns/pmulq_w.h b/riscv/insns/pmulq_w.h new file mode 100644 index 00000000..55d594ae --- /dev/null +++ b/riscv/insns/pmulq_w.h @@ -0,0 +1,10 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + if ((p_rs1 != INT32_MIN) | (p_rs2 != INT32_MIN)) { + p_rd = ((int64_t)p_rs1 * (int64_t)p_rs2) >> 31; + } else { + p_rd = INT32_MAX; + P.VU.vxsat->write(1); + } +} +) diff --git a/riscv/insns/pmulqr_h.h b/riscv/insns/pmulqr_h.h new file mode 100644 index 00000000..e6cd66a2 --- /dev/null +++ b/riscv/insns/pmulqr_h.h @@ -0,0 +1,8 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + if ((p_rs1 != INT16_MIN) | (p_rs2 != INT16_MIN)) { + p_rd = (((p_rs1 * p_rs2) >> 14) + 1) >> 1; + } else { + p_rd = INT16_MAX; + P.VU.vxsat->write(1); + } +})
\ No newline at end of file diff --git a/riscv/insns/pmulqr_w.h b/riscv/insns/pmulqr_w.h new file mode 100644 index 00000000..f52820ca --- /dev/null +++ b/riscv/insns/pmulqr_w.h @@ -0,0 +1,10 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + if ((p_rs1 != INT32_MIN) | (p_rs2 != INT32_MIN)) { + p_rd = ((((int64_t)p_rs1 * (int64_t)p_rs2) >> 30) + 1) >> 1; + } else { + p_rd = INT32_MAX; + P.VU.vxsat->write(1); + } +} +) diff --git a/riscv/insns/pmulsu_h_b00.h b/riscv/insns/pmulsu_h_b00.h new file mode 100644 index 00000000..4682257e --- /dev/null +++ b/riscv/insns/pmulsu_h_b00.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_EE_SULOOP(16, 8, 8, { + p_rd = sext32(p_rs1) * zext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmulsu_h_b11.h b/riscv/insns/pmulsu_h_b11.h new file mode 100644 index 00000000..57436181 --- /dev/null +++ b/riscv/insns/pmulsu_h_b11.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_OO_SULOOP(16, 8, 8, { + p_rd = sext32(p_rs1) * zext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmulsu_w_h00.h b/riscv/insns/pmulsu_w_h00.h new file mode 100644 index 00000000..2bb05fbd --- /dev/null +++ b/riscv/insns/pmulsu_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_SULOOP(32, 16, 16, { + p_rd = sext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmulsu_w_h11.h b/riscv/insns/pmulsu_w_h11.h new file mode 100644 index 00000000..ed08d452 --- /dev/null +++ b/riscv/insns/pmulsu_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_SULOOP(32, 16, 16, { + p_rd = sext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmulu_h_b00.h b/riscv/insns/pmulu_h_b00.h new file mode 100644 index 00000000..8ff863f0 --- /dev/null +++ b/riscv/insns/pmulu_h_b00.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_EE_ULOOP(16, 8, 8, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmulu_h_b01.h b/riscv/insns/pmulu_h_b01.h new file mode 100644 index 00000000..24d782cf --- /dev/null +++ b/riscv/insns/pmulu_h_b01.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_EO_ULOOP(16, 8, 8, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmulu_h_b11.h b/riscv/insns/pmulu_h_b11.h new file mode 100644 index 00000000..31316a1d --- /dev/null +++ b/riscv/insns/pmulu_h_b11.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_OO_ULOOP(16, 8, 8, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pmulu_w_h00.h b/riscv/insns/pmulu_w_h00.h new file mode 100644 index 00000000..441e46d6 --- /dev/null +++ b/riscv/insns/pmulu_w_h00.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EE_ULOOP(32, 16, 16, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmulu_w_h01.h b/riscv/insns/pmulu_w_h01.h new file mode 100644 index 00000000..36c83c97 --- /dev/null +++ b/riscv/insns/pmulu_w_h01.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_EO_ULOOP(32, 16, 16, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pmulu_w_h11.h b/riscv/insns/pmulu_w_h11.h new file mode 100644 index 00000000..05957239 --- /dev/null +++ b/riscv/insns/pmulu_w_h11.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_OO_ULOOP(32, 16, 16, { + p_rd = zext32(p_rs1) * zext32(p_rs2); +} +) diff --git a/riscv/insns/pnclip_bs.h b/riscv/insns/pnclip_bs.h new file mode 100644 index 00000000..267aac7c --- /dev/null +++ b/riscv/insns/pnclip_bs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + p_rd = P_SAT(8, p_rs1 >> (P_FIELD(RS2, 0, 8) & 0xF)); +})
\ No newline at end of file diff --git a/riscv/insns/pnclip_hs.h b/riscv/insns/pnclip_hs.h new file mode 100644 index 00000000..c0adb127 --- /dev/null +++ b/riscv/insns/pnclip_hs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + p_rd = P_SAT(16, p_rs1 >> (P_FIELD(RS2, 0, 16) & 0X1F)); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipi_b.h b/riscv/insns/pnclipi_b.h new file mode 100644 index 00000000..d18b3f4e --- /dev/null +++ b/riscv/insns/pnclipi_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + p_rd = P_SAT(8, p_rs1 >> insn.shamth()); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipi_h.h b/riscv/insns/pnclipi_h.h new file mode 100644 index 00000000..470afa04 --- /dev/null +++ b/riscv/insns/pnclipi_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + p_rd = P_SAT(16, p_rs1 >> insn.shamtw()); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipiu_b.h b/riscv/insns/pnclipiu_b.h new file mode 100644 index 00000000..fadf004d --- /dev/null +++ b/riscv/insns/pnclipiu_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + p_rd = P_USAT_FULL(8, (sreg_t)(p_rs1 >> insn.shamth())); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipiu_h.h b/riscv/insns/pnclipiu_h.h new file mode 100644 index 00000000..ac490333 --- /dev/null +++ b/riscv/insns/pnclipiu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + p_rd = P_USAT_FULL(16, (sreg_t)(p_rs1 >> insn.shamtw())); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipp_b.h b/riscv/insns/pnclipp_b.h new file mode 100644 index 00000000..4f4b1a01 --- /dev/null +++ b/riscv/insns/pnclipp_b.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +reg_t rd_tmp = 0; +reg_t s_low = RS1; +reg_t s_high = RS2; +for (int i = 0; i < 8; i++) { + sreg_t s_h = (i < 4) ? P_FIELD(s_low, i, 16) : P_FIELD(s_high, i - 4, 16); + sreg_t sat_val = P_SAT(8, s_h); + if (sat_val != s_h) P.VU.vxsat->write(1); + rd_tmp = set_field(rd_tmp, make_mask64(i * 8, 8), (uint8_t)sat_val); +} +WRITE_RD(rd_tmp); + diff --git a/riscv/insns/pnclipp_h.h b/riscv/insns/pnclipp_h.h new file mode 100644 index 00000000..6eee48e0 --- /dev/null +++ b/riscv/insns/pnclipp_h.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +reg_t rd_tmp = 0; +reg_t s_low = RS1; +reg_t s_high = RS2; +for (int i = 0; i < 4; i++) { + sreg_t s_w = (i < 2) ? P_FIELD(s_low, i, 32) : P_FIELD(s_high, i - 2, 32); + sreg_t sat_val = P_SAT(16, s_w); + if (sat_val != s_w) P.VU.vxsat->write(1); + rd_tmp = set_field(rd_tmp, make_mask64(i * 16, 16), (uint16_t)sat_val); +} +WRITE_RD(rd_tmp); + diff --git a/riscv/insns/pnclipp_w.h b/riscv/insns/pnclipp_w.h new file mode 100644 index 00000000..880a72af --- /dev/null +++ b/riscv/insns/pnclipp_w.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +int64_t s1 = (int64_t)RS1; +int64_t s2 = (int64_t)RS2; + +sreg_t sat_w0 = P_SAT(32, s1); +if (sat_w0 != s1) P.VU.vxsat->write(1); + +sreg_t sat_w1 = P_SAT(32, s2); +if (sat_w1 != s2) P.VU.vxsat->write(1); + +WRITE_RD(((uint64_t)(uint32_t)sat_w1 << 32) | (uint32_t)sat_w0); + diff --git a/riscv/insns/pnclipr_bs.h b/riscv/insns/pnclipr_bs.h new file mode 100644 index 00000000..0d668354 --- /dev/null +++ b/riscv/insns/pnclipr_bs.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + uint16_t shamt = P_FIELD(RS2, 0, 8) & 0xF; + sreg_t result; + if (shamt == 0) { + result = p_rs1; + } else { + sreg_t shifted = (sreg_t)p_rs1 >> shamt; + sreg_t roundbit = ((sreg_t)p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_SAT(8, result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipr_hs.h b/riscv/insns/pnclipr_hs.h new file mode 100644 index 00000000..3755a641 --- /dev/null +++ b/riscv/insns/pnclipr_hs.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + uint32_t shamt = P_FIELD(RS2, 0, 16) & 0x1F; + sreg_t result; + if (shamt == 0) { + result = p_rs1; + } else { + sreg_t shifted = (sreg_t)p_rs1 >> shamt; + sreg_t roundbit = ((sreg_t)p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_SAT(16, result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipri_b.h b/riscv/insns/pnclipri_b.h new file mode 100644 index 00000000..e2e21b63 --- /dev/null +++ b/riscv/insns/pnclipri_b.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + uint16_t shamt = insn.shamth(); + sreg_t result; + if (shamt == 0) { + result = p_rs1; + } else { + sreg_t shifted = (sreg_t)p_rs1 >> shamt; + sreg_t roundbit = ((sreg_t)p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_SAT(8, result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipri_h.h b/riscv/insns/pnclipri_h.h new file mode 100644 index 00000000..67bdcad9 --- /dev/null +++ b/riscv/insns/pnclipri_h.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + uint32_t shamt = insn.shamtw(); + sreg_t result; + if (shamt == 0) { + result = p_rs1; + } else { + sreg_t shifted = (sreg_t)p_rs1 >> shamt; + sreg_t roundbit = ((sreg_t)p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_SAT(16, result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipriu_b.h b/riscv/insns/pnclipriu_b.h new file mode 100644 index 00000000..bb55a149 --- /dev/null +++ b/riscv/insns/pnclipriu_b.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + uint32_t shamt = insn.shamth(); + uint32_t result; + if (shamt == 0) { + result = p_rs1; + } else { + uint32_t shifted = p_rs1 >> shamt; + uint32_t roundbit = (p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_USAT_FULL(8, (sreg_t)result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipriu_h.h b/riscv/insns/pnclipriu_h.h new file mode 100644 index 00000000..4d2dbd9b --- /dev/null +++ b/riscv/insns/pnclipriu_h.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + uint32_t shamt = insn.shamtw(); + uint32_t result; + if (shamt == 0) { + result = p_rs1; + } else { + uint32_t shifted = p_rs1 >> shamt; + uint32_t roundbit = (p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_USAT_FULL(16, (sreg_t)result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipru_bs.h b/riscv/insns/pnclipru_bs.h new file mode 100644 index 00000000..25921dc6 --- /dev/null +++ b/riscv/insns/pnclipru_bs.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + uint32_t shamt = P_UFIELD(RS2, 0, 8) & 0xF; + uint32_t result; + if (shamt == 0) { + result = p_rs1; + } else { + uint32_t shifted = p_rs1 >> shamt; + uint32_t roundbit = (p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_USAT_FULL(8, (sreg_t)result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipru_hs.h b/riscv/insns/pnclipru_hs.h new file mode 100644 index 00000000..d4f82e88 --- /dev/null +++ b/riscv/insns/pnclipru_hs.h @@ -0,0 +1,13 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + uint32_t shamt = P_UFIELD(RS2, 0, 16) & 0x1F; + uint32_t result; + if (shamt == 0) { + result = p_rs1; + } else { + uint32_t shifted = p_rs1 >> shamt; + uint32_t roundbit = (p_rs1 >> (shamt - 1)) & 1; + result = shifted + roundbit; + } + p_rd = P_USAT_FULL(16, (sreg_t)result); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipu_bs.h b/riscv/insns/pnclipu_bs.h new file mode 100644 index 00000000..af10838c --- /dev/null +++ b/riscv/insns/pnclipu_bs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + p_rd = P_USAT_FULL(8, (sreg_t)(p_rs1 >> (P_UFIELD(RS2, 0, 8) & 0xF))); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipu_hs.h b/riscv/insns/pnclipu_hs.h new file mode 100644 index 00000000..377bd407 --- /dev/null +++ b/riscv/insns/pnclipu_hs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + p_rd = P_USAT_FULL(16, (sreg_t)(p_rs1 >> (P_UFIELD(RS2, 0, 16) & 0X1F))); +})
\ No newline at end of file diff --git a/riscv/insns/pnclipup_b.h b/riscv/insns/pnclipup_b.h new file mode 100644 index 00000000..77e53e7b --- /dev/null +++ b/riscv/insns/pnclipup_b.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +reg_t rd_tmp = 0; +reg_t s_low = RS1; +reg_t s_high = RS2; +for (int i = 0; i < 8; i++) { + reg_t s_h = (i < 4) ? P_UFIELD(s_low, i, 16) : P_UFIELD(s_high, i - 4, 16); + reg_t sat_val = P_USAT_FULL(8, (sreg_t)s_h); + if (sat_val != s_h) P.VU.vxsat->write(1); + rd_tmp = set_field(rd_tmp, make_mask64(i * 8, 8), (uint8_t)sat_val); +} +WRITE_RD(rd_tmp); + diff --git a/riscv/insns/pnclipup_h.h b/riscv/insns/pnclipup_h.h new file mode 100644 index 00000000..e688ecf2 --- /dev/null +++ b/riscv/insns/pnclipup_h.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +reg_t rd_tmp = 0; +reg_t s_low = RS1; +reg_t s_high = RS2; +for (int i = 0; i < 4; i++) { + reg_t s_w = (i < 2) ? P_UFIELD(s_low, i, 32) : P_UFIELD(s_high, i - 2, 32); + reg_t sat_val = P_USAT_FULL(16, (sreg_t)s_w); + if (sat_val != s_w) P.VU.vxsat->write(1); + rd_tmp = set_field(rd_tmp, make_mask64(i * 16, 16), (uint16_t)sat_val); +} +WRITE_RD(rd_tmp); + diff --git a/riscv/insns/pnclipup_w.h b/riscv/insns/pnclipup_w.h new file mode 100644 index 00000000..72f8476b --- /dev/null +++ b/riscv/insns/pnclipup_w.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv64; +uint64_t s1 = RS1; +uint64_t s2 = RS2; + +reg_t sat_w0 = P_USAT_FULL(32, (sreg_t)s1); +if (sat_w0 != s1) P.VU.vxsat->write(1); + +reg_t sat_w1 = P_USAT_FULL(32, (sreg_t)s2); +if (sat_w1 != s2) P.VU.vxsat->write(1); + +WRITE_RD(((uint64_t)(uint32_t)sat_w1 << 32) | (uint32_t)sat_w0); + diff --git a/riscv/insns/pnsra_bs.h b/riscv/insns/pnsra_bs.h new file mode 100644 index 00000000..6a6ad366 --- /dev/null +++ b/riscv/insns/pnsra_bs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + p_rd = p_rs1 >> (P_FIELD(RS2, 0, 8) & 0xF); +})
\ No newline at end of file diff --git a/riscv/insns/pnsra_hs.h b/riscv/insns/pnsra_hs.h new file mode 100644 index 00000000..0b6ee714 --- /dev/null +++ b/riscv/insns/pnsra_hs.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + p_rd = p_rs1 >> (P_FIELD(RS2, 0, 16) & 0x1F); +})
\ No newline at end of file diff --git a/riscv/insns/pnsrai_b.h b/riscv/insns/pnsrai_b.h new file mode 100644 index 00000000..001bb3b3 --- /dev/null +++ b/riscv/insns/pnsrai_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + p_rd = p_rs1 >> insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/pnsrai_h.h b/riscv/insns/pnsrai_h.h new file mode 100644 index 00000000..d673a763 --- /dev/null +++ b/riscv/insns/pnsrai_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + p_rd = p_rs1 >> insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/pnsrar_bs.h b/riscv/insns/pnsrar_bs.h new file mode 100644 index 00000000..8b9291a9 --- /dev/null +++ b/riscv/insns/pnsrar_bs.h @@ -0,0 +1,12 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + uint32_t shamt = P_FIELD(RS2, 0, 8) & 0xF; + if (shamt != 0) { + sreg_t val = (sreg_t)p_rs1; + sreg_t shifted = val >> shamt; + sreg_t roundbit = (val >> (shamt - 1)) & 1; + p_rd = (shifted + roundbit) & 0xFF; + } else { + p_rd = p_rs1 & 0xFF; + } +})
\ No newline at end of file diff --git a/riscv/insns/pnsrar_hs.h b/riscv/insns/pnsrar_hs.h new file mode 100644 index 00000000..602bdd57 --- /dev/null +++ b/riscv/insns/pnsrar_hs.h @@ -0,0 +1,12 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + uint32_t shamt = P_FIELD(RS2, 0, 16) & 0x1F; + if (shamt != 0) { + sreg_t val = (sreg_t)p_rs1; + sreg_t shifted = val >> shamt; + sreg_t roundbit = (val >> (shamt - 1)) & 1; + p_rd = (shifted + roundbit) & 0xFFFF; + } else { + p_rd = p_rs1 & 0xFFFF; + } +})
\ No newline at end of file diff --git a/riscv/insns/pnsrari_b.h b/riscv/insns/pnsrari_b.h new file mode 100644 index 00000000..7ca82f5b --- /dev/null +++ b/riscv/insns/pnsrari_b.h @@ -0,0 +1,12 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(8, 16, { + uint32_t shamt = insn.shamth(); + if (shamt != 0) { + sreg_t val = (sreg_t)p_rs1; + sreg_t shifted = val >> shamt; + sreg_t roundbit = (val >> (shamt - 1)) & 1; + p_rd = (shifted + roundbit) & 0xFF; + } else { + p_rd = p_rs1 & 0xFF; + } +})
\ No newline at end of file diff --git a/riscv/insns/pnsrari_h.h b/riscv/insns/pnsrari_h.h new file mode 100644 index 00000000..84136826 --- /dev/null +++ b/riscv/insns/pnsrari_h.h @@ -0,0 +1,12 @@ +require_rv32; +P_NARROW_RD_RS1_LOOP(16, 32, { + uint32_t shamt = insn.shamtw(); + if (shamt != 0) { + sreg_t val = (sreg_t)p_rs1; + sreg_t shifted = val >> shamt; + sreg_t roundbit = (val >> (shamt - 1)) & 1; + p_rd = (shifted + roundbit) & 0xFFFF; + } else { + p_rd = p_rs1 & 0xFFFF; + } +})
\ No newline at end of file diff --git a/riscv/insns/pnsrl_bs.h b/riscv/insns/pnsrl_bs.h new file mode 100644 index 00000000..244bd6c9 --- /dev/null +++ b/riscv/insns/pnsrl_bs.h @@ -0,0 +1,5 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + uint8_t shamt = (uint8_t)(P_UFIELD(RS2, 0, 8) & 0xF); + p_rd = (uint8_t)((uint16_t)p_rs1 >> shamt); +}) diff --git a/riscv/insns/pnsrl_hs.h b/riscv/insns/pnsrl_hs.h new file mode 100644 index 00000000..42d28f5a --- /dev/null +++ b/riscv/insns/pnsrl_hs.h @@ -0,0 +1,5 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + uint16_t shamt = (uint16_t)(P_UFIELD(RS2, 0, 16) & 0x1F); + p_rd = (uint16_t)((uint32_t)p_rs1 >> shamt); +})
\ No newline at end of file diff --git a/riscv/insns/pnsrli_b.h b/riscv/insns/pnsrli_b.h new file mode 100644 index 00000000..55f19c6f --- /dev/null +++ b/riscv/insns/pnsrli_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(8, 16, { + p_rd = (uint8_t)((uint16_t)p_rs1 >> insn.shamth()); +})
\ No newline at end of file diff --git a/riscv/insns/pnsrli_h.h b/riscv/insns/pnsrli_h.h new file mode 100644 index 00000000..80f17245 --- /dev/null +++ b/riscv/insns/pnsrli_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_NARROW_RD_RS1_ULOOP(16, 32, { + p_rd = (uint16_t)((uint32_t)p_rs1 >> insn.shamtw()); +})
\ No newline at end of file diff --git a/riscv/insns/ppaire_b.h b/riscv/insns/ppaire_b.h new file mode 100644 index 00000000..a1b9665a --- /dev/null +++ b/riscv/insns/ppaire_b.h @@ -0,0 +1 @@ +P_PACK(8, 0, 0);
\ No newline at end of file diff --git a/riscv/insns/ppaire_db.h b/riscv/insns/ppaire_db.h new file mode 100644 index 00000000..64f7c1c0 --- /dev/null +++ b/riscv/insns/ppaire_db.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(8, 0, 0);
\ No newline at end of file diff --git a/riscv/insns/ppaire_dh.h b/riscv/insns/ppaire_dh.h new file mode 100644 index 00000000..ada431d1 --- /dev/null +++ b/riscv/insns/ppaire_dh.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(16, 0, 0);
\ No newline at end of file diff --git a/riscv/insns/ppaire_h.h b/riscv/insns/ppaire_h.h new file mode 100644 index 00000000..a1fef4a9 --- /dev/null +++ b/riscv/insns/ppaire_h.h @@ -0,0 +1 @@ +P_PACK(16, 0, 0);
\ No newline at end of file diff --git a/riscv/insns/ppaireo_b.h b/riscv/insns/ppaireo_b.h new file mode 100644 index 00000000..1e02dc4c --- /dev/null +++ b/riscv/insns/ppaireo_b.h @@ -0,0 +1 @@ +P_PACK(8, 0, 1);
\ No newline at end of file diff --git a/riscv/insns/ppaireo_db.h b/riscv/insns/ppaireo_db.h new file mode 100644 index 00000000..4b6e1158 --- /dev/null +++ b/riscv/insns/ppaireo_db.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(8, 0, 1);
\ No newline at end of file diff --git a/riscv/insns/ppaireo_dh.h b/riscv/insns/ppaireo_dh.h new file mode 100644 index 00000000..46ef708d --- /dev/null +++ b/riscv/insns/ppaireo_dh.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(16, 0, 1);
\ No newline at end of file diff --git a/riscv/insns/ppaireo_h.h b/riscv/insns/ppaireo_h.h new file mode 100644 index 00000000..c5f043f5 --- /dev/null +++ b/riscv/insns/ppaireo_h.h @@ -0,0 +1 @@ +P_PACK(16, 0, 1);
\ No newline at end of file diff --git a/riscv/insns/ppaireo_w.h b/riscv/insns/ppaireo_w.h new file mode 100644 index 00000000..5dd3e2ef --- /dev/null +++ b/riscv/insns/ppaireo_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 0, 1);
\ No newline at end of file diff --git a/riscv/insns/ppairo_b.h b/riscv/insns/ppairo_b.h new file mode 100644 index 00000000..c691850b --- /dev/null +++ b/riscv/insns/ppairo_b.h @@ -0,0 +1 @@ +P_PACK(8, 1, 1);
\ No newline at end of file diff --git a/riscv/insns/ppairo_db.h b/riscv/insns/ppairo_db.h new file mode 100644 index 00000000..ad04f358 --- /dev/null +++ b/riscv/insns/ppairo_db.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(8, 1, 1);
\ No newline at end of file diff --git a/riscv/insns/ppairo_dh.h b/riscv/insns/ppairo_dh.h new file mode 100644 index 00000000..d9291d87 --- /dev/null +++ b/riscv/insns/ppairo_dh.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(16, 1, 1);
\ No newline at end of file diff --git a/riscv/insns/ppairo_h.h b/riscv/insns/ppairo_h.h new file mode 100644 index 00000000..600ee873 --- /dev/null +++ b/riscv/insns/ppairo_h.h @@ -0,0 +1 @@ +P_PACK(16, 1, 1);
\ No newline at end of file diff --git a/riscv/insns/ppairo_w.h b/riscv/insns/ppairo_w.h new file mode 100644 index 00000000..38d2dfd0 --- /dev/null +++ b/riscv/insns/ppairo_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 1, 1); diff --git a/riscv/insns/ppairoe_b.h b/riscv/insns/ppairoe_b.h new file mode 100644 index 00000000..37df7381 --- /dev/null +++ b/riscv/insns/ppairoe_b.h @@ -0,0 +1 @@ +P_PACK(8, 1, 0);
\ No newline at end of file diff --git a/riscv/insns/ppairoe_db.h b/riscv/insns/ppairoe_db.h new file mode 100644 index 00000000..61a334d7 --- /dev/null +++ b/riscv/insns/ppairoe_db.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(8, 1, 0);
\ No newline at end of file diff --git a/riscv/insns/ppairoe_dh.h b/riscv/insns/ppairoe_dh.h new file mode 100644 index 00000000..f9467db8 --- /dev/null +++ b/riscv/insns/ppairoe_dh.h @@ -0,0 +1,2 @@ +require_rv32; +P_PACK_DW(16, 1, 0);
\ No newline at end of file diff --git a/riscv/insns/ppairoe_h.h b/riscv/insns/ppairoe_h.h new file mode 100644 index 00000000..ecca5386 --- /dev/null +++ b/riscv/insns/ppairoe_h.h @@ -0,0 +1 @@ +P_PACK(16, 1, 0);
\ No newline at end of file diff --git a/riscv/insns/ppairoe_w.h b/riscv/insns/ppairoe_w.h new file mode 100644 index 00000000..df6a6683 --- /dev/null +++ b/riscv/insns/ppairoe_w.h @@ -0,0 +1,2 @@ +require_rv64; +P_PACK(32, 1, 0);
\ No newline at end of file diff --git a/riscv/insns/predsum_bs.h b/riscv/insns/predsum_bs.h new file mode 100644 index 00000000..9f110b6d --- /dev/null +++ b/riscv/insns/predsum_bs.h @@ -0,0 +1,5 @@ +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(8) + P_RS1_PARAMS(8) + rd_tmp += sext_xlen(p_rs1); +P_RD_LOOP_END()
\ No newline at end of file diff --git a/riscv/insns/predsum_dbs.h b/riscv/insns/predsum_dbs.h new file mode 100644 index 00000000..0f8afe42 --- /dev/null +++ b/riscv/insns/predsum_dbs.h @@ -0,0 +1,5 @@ +require_rv32; +reg_t rd_tmp = RS2; +P_RS1_DW_LOOP(8, { + rd_tmp += sext_xlen(p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/predsum_dhs.h b/riscv/insns/predsum_dhs.h new file mode 100644 index 00000000..4c8e012c --- /dev/null +++ b/riscv/insns/predsum_dhs.h @@ -0,0 +1,5 @@ +require_rv32; +reg_t rd_tmp = RS2; +P_RS1_DW_LOOP(16, { + rd_tmp += sext_xlen(p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/predsum_hs.h b/riscv/insns/predsum_hs.h new file mode 100644 index 00000000..dd2c8242 --- /dev/null +++ b/riscv/insns/predsum_hs.h @@ -0,0 +1,5 @@ +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(16) + P_RS1_PARAMS(16) + rd_tmp += sext_xlen(p_rs1); +P_RD_LOOP_END()
\ No newline at end of file diff --git a/riscv/insns/predsum_ws.h b/riscv/insns/predsum_ws.h new file mode 100644 index 00000000..ba5fc69a --- /dev/null +++ b/riscv/insns/predsum_ws.h @@ -0,0 +1,6 @@ +require_rv64; +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(32) + P_RS1_PARAMS(32) + rd_tmp += sext_xlen(p_rs1); +P_RD_LOOP_END() diff --git a/riscv/insns/predsumu_bs.h b/riscv/insns/predsumu_bs.h new file mode 100644 index 00000000..e5c2f53a --- /dev/null +++ b/riscv/insns/predsumu_bs.h @@ -0,0 +1,5 @@ +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(8) + P_RS1_UPARAMS(8) + rd_tmp += zext_xlen(p_rs1); +P_RD_LOOP_END()
\ No newline at end of file diff --git a/riscv/insns/predsumu_dbs.h b/riscv/insns/predsumu_dbs.h new file mode 100644 index 00000000..26cb2d39 --- /dev/null +++ b/riscv/insns/predsumu_dbs.h @@ -0,0 +1,5 @@ +require_rv32; +reg_t rd_tmp = RS2; +P_RS1_DW_ULOOP(8, { + rd_tmp += zext_xlen(p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/predsumu_dhs.h b/riscv/insns/predsumu_dhs.h new file mode 100644 index 00000000..a9393eeb --- /dev/null +++ b/riscv/insns/predsumu_dhs.h @@ -0,0 +1,5 @@ +require_rv32; +reg_t rd_tmp = RS2; +P_RS1_DW_ULOOP(16, { + rd_tmp += zext_xlen(p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/predsumu_hs.h b/riscv/insns/predsumu_hs.h new file mode 100644 index 00000000..bf2dc457 --- /dev/null +++ b/riscv/insns/predsumu_hs.h @@ -0,0 +1,5 @@ +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(16) + P_RS1_UPARAMS(16) + rd_tmp += zext_xlen(p_rs1); +P_RD_LOOP_END()
\ No newline at end of file diff --git a/riscv/insns/predsumu_ws.h b/riscv/insns/predsumu_ws.h new file mode 100644 index 00000000..98a3aa91 --- /dev/null +++ b/riscv/insns/predsumu_ws.h @@ -0,0 +1,6 @@ +require_rv64; +reg_t rd_tmp = RS2; \ +P_RS1_LOOP_BASE(32) + P_RS1_UPARAMS(32) + rd_tmp += zext_xlen(p_rs1); +P_RD_LOOP_END() diff --git a/riscv/insns/psa_dhx.h b/riscv/insns/psa_dhx.h new file mode 100644 index 00000000..f7b30af5 --- /dev/null +++ b/riscv/insns/psa_dhx.h @@ -0,0 +1,6 @@ +require_rv32; +P_CROSS_DW_LOOP(16, { + p_rd = p_rs1 - p_rs2; +}, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psa_hx.h b/riscv/insns/psa_hx.h new file mode 100644 index 00000000..864671e4 --- /dev/null +++ b/riscv/insns/psa_hx.h @@ -0,0 +1,5 @@ +P_CROSS_LOOP(16, { + p_rd = p_rs1 - p_rs2; +}, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psa_wx.h b/riscv/insns/psa_wx.h new file mode 100644 index 00000000..b930d5ea --- /dev/null +++ b/riscv/insns/psa_wx.h @@ -0,0 +1,7 @@ +require_rv64; +P_CROSS_LOOP(32, { + p_rd = p_rs1 - p_rs2; +}, { + p_rd = p_rs1 + p_rs2; +} +) diff --git a/riscv/insns/psabs_b.h b/riscv/insns/psabs_b.h new file mode 100644 index 00000000..8ca5085b --- /dev/null +++ b/riscv/insns/psabs_b.h @@ -0,0 +1,5 @@ +P_RD_RS1_LOOP(8, 8, { + sreg_t abs_val = p_rs1 > 0 ? p_rs1 : -sext32(p_rs1); + p_rd = P_SAT(8, abs_val); + if (p_rd != abs_val) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psabs_db.h b/riscv/insns/psabs_db.h new file mode 100644 index 00000000..5efe61d3 --- /dev/null +++ b/riscv/insns/psabs_db.h @@ -0,0 +1,6 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + sreg_t abs_val = p_rs1 > 0 ? p_rs1 : -sext32(p_rs1); + p_rd = P_SAT(8, abs_val); + if (p_rd != abs_val) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psabs_dh.h b/riscv/insns/psabs_dh.h new file mode 100644 index 00000000..13411c9e --- /dev/null +++ b/riscv/insns/psabs_dh.h @@ -0,0 +1,6 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + sreg_t abs_val = p_rs1 > 0 ? p_rs1 : -sext32(p_rs1); + p_rd = P_SAT(16, abs_val); + if (p_rd != abs_val) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psabs_h.h b/riscv/insns/psabs_h.h new file mode 100644 index 00000000..54564afe --- /dev/null +++ b/riscv/insns/psabs_h.h @@ -0,0 +1,5 @@ +P_RD_RS1_LOOP(16, 16, { + sreg_t abs_val = p_rs1 > 0 ? p_rs1 : -sext32(p_rs1); + p_rd = P_SAT(16, abs_val); + if (p_rd != abs_val) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_b.h b/riscv/insns/psadd_b.h new file mode 100644 index 00000000..a024d4d0 --- /dev/null +++ b/riscv/insns/psadd_b.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + bool sat = false; + p_rd = (sat_add<int8_t, uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_db.h b/riscv/insns/psadd_db.h new file mode 100644 index 00000000..3c297868 --- /dev/null +++ b/riscv/insns/psadd_db.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8,8,8, { + bool sat = false; + p_rd = (sat_add<int8_t, uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_dh.h b/riscv/insns/psadd_dh.h new file mode 100644 index 00000000..bd14a581 --- /dev/null +++ b/riscv/insns/psadd_dh.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16,16,16, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_dw.h b/riscv/insns/psadd_dw.h new file mode 100644 index 00000000..5ec3466d --- /dev/null +++ b/riscv/insns/psadd_dw.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_h.h b/riscv/insns/psadd_h.h new file mode 100644 index 00000000..47af97ad --- /dev/null +++ b/riscv/insns/psadd_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psadd_w.h b/riscv/insns/psadd_w.h new file mode 100644 index 00000000..7702b936 --- /dev/null +++ b/riscv/insns/psadd_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psaddu_b.h b/riscv/insns/psaddu_b.h new file mode 100644 index 00000000..491fc2d3 --- /dev/null +++ b/riscv/insns/psaddu_b.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + bool sat = false; + p_rd = (sat_addu<uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psaddu_db.h b/riscv/insns/psaddu_db.h new file mode 100644 index 00000000..a181f24a --- /dev/null +++ b/riscv/insns/psaddu_db.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8,8,8, { + bool sat = false; + p_rd = (sat_addu<uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psaddu_dh.h b/riscv/insns/psaddu_dh.h new file mode 100644 index 00000000..035d91fc --- /dev/null +++ b/riscv/insns/psaddu_dh.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16,16,16, { + bool sat = false; + p_rd = (sat_addu<uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psaddu_dw.h b/riscv/insns/psaddu_dw.h new file mode 100644 index 00000000..ebc4d8bb --- /dev/null +++ b/riscv/insns/psaddu_dw.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_addu<uint32_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psaddu_h.h b/riscv/insns/psaddu_h.h new file mode 100644 index 00000000..f28d0f32 --- /dev/null +++ b/riscv/insns/psaddu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + bool sat = false; + p_rd = (sat_addu<uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/psaddu_w.h b/riscv/insns/psaddu_w.h new file mode 100644 index 00000000..4ff52136 --- /dev/null +++ b/riscv/insns/psaddu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_addu<uint32_t>(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psas_dhx.h b/riscv/insns/psas_dhx.h new file mode 100644 index 00000000..d14ccee6 --- /dev/null +++ b/riscv/insns/psas_dhx.h @@ -0,0 +1,10 @@ +require_rv32; +P_CROSS_DW_ULOOP(16, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psas_hx.h b/riscv/insns/psas_hx.h new file mode 100644 index 00000000..f1d8f189 --- /dev/null +++ b/riscv/insns/psas_hx.h @@ -0,0 +1,9 @@ +P_CROSS_ULOOP(16, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/psas_wx.h b/riscv/insns/psas_wx.h new file mode 100644 index 00000000..4673a6ce --- /dev/null +++ b/riscv/insns/psas_wx.h @@ -0,0 +1,11 @@ +require_rv64; +P_CROSS_ULOOP(32, { + bool sat = false; + p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +} +) diff --git a/riscv/insns/psati_dh.h b/riscv/insns/psati_dh.h new file mode 100644 index 00000000..f95fe6e5 --- /dev/null +++ b/riscv/insns/psati_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = P_SAT(insn.shamth() + 1, p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/psati_dw.h b/riscv/insns/psati_dw.h new file mode 100644 index 00000000..f49c44a0 --- /dev/null +++ b/riscv/insns/psati_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = P_SAT(insn.shamtw() + 1, p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/psati_h.h b/riscv/insns/psati_h.h new file mode 100644 index 00000000..b63f2233 --- /dev/null +++ b/riscv/insns/psati_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = P_SAT(insn.shamth() + 1, p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/psati_w.h b/riscv/insns/psati_w.h new file mode 100644 index 00000000..499beceb --- /dev/null +++ b/riscv/insns/psati_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_SAT(insn.shamtw() + 1, p_rs1); +} +) diff --git a/riscv/insns/psext_dh_b.h b/riscv/insns/psext_dh_b.h new file mode 100644 index 00000000..651246f9 --- /dev/null +++ b/riscv/insns/psext_dh_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = (int16_t)(int8_t)p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psext_dw_b.h b/riscv/insns/psext_dw_b.h new file mode 100644 index 00000000..996e00e0 --- /dev/null +++ b/riscv/insns/psext_dw_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = (int32_t)(int8_t)p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psext_dw_h.h b/riscv/insns/psext_dw_h.h new file mode 100644 index 00000000..e94d83bf --- /dev/null +++ b/riscv/insns/psext_dw_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = (int32_t)(int16_t)p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psext_h_b.h b/riscv/insns/psext_h_b.h new file mode 100644 index 00000000..1bc3dd0b --- /dev/null +++ b/riscv/insns/psext_h_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = (int16_t)(int8_t)p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psext_w_b.h b/riscv/insns/psext_w_b.h new file mode 100644 index 00000000..cb5217f3 --- /dev/null +++ b/riscv/insns/psext_w_b.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = (int32_t)(int8_t)p_rs1; +} +) diff --git a/riscv/insns/psext_w_h.h b/riscv/insns/psext_w_h.h new file mode 100644 index 00000000..a0a1ee09 --- /dev/null +++ b/riscv/insns/psext_w_h.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = (int32_t)(int16_t)p_rs1; +} +) diff --git a/riscv/insns/psh1add_dh.h b/riscv/insns/psh1add_dh.h new file mode 100644 index 00000000..33787153 --- /dev/null +++ b/riscv/insns/psh1add_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = (p_rs1 << 1) + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psh1add_dw.h b/riscv/insns/psh1add_dw.h new file mode 100644 index 00000000..e143e4b4 --- /dev/null +++ b/riscv/insns/psh1add_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = (p_rs1 << 1) + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psh1add_h.h b/riscv/insns/psh1add_h.h new file mode 100644 index 00000000..db41f6e4 --- /dev/null +++ b/riscv/insns/psh1add_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16, 16, 16, { + p_rd = (p_rs1 << 1) + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psh1add_w.h b/riscv/insns/psh1add_w.h new file mode 100644 index 00000000..8c280053 --- /dev/null +++ b/riscv/insns/psh1add_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = (p_rs1 << 1) + p_rs2; +} +) diff --git a/riscv/insns/psll_bs.h b/riscv/insns/psll_bs.h new file mode 100644 index 00000000..de0fa0df --- /dev/null +++ b/riscv/insns/psll_bs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(8, 8, { + p_rd = p_rs1 << (RS2 & (8 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psll_dbs.h b/riscv/insns/psll_dbs.h new file mode 100644 index 00000000..a5dea881 --- /dev/null +++ b/riscv/insns/psll_dbs.h @@ -0,0 +1,7 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + uint8_t m = P_FIELD(RS2, 0, 8); + const uint64_t maskN = 0xFFull; + if (m >= 8) p_rd = 0; + else p_rd = (uint8_t)((p_rs1 << m) & maskN); +})
\ No newline at end of file diff --git a/riscv/insns/psll_dhs.h b/riscv/insns/psll_dhs.h new file mode 100644 index 00000000..33e31738 --- /dev/null +++ b/riscv/insns/psll_dhs.h @@ -0,0 +1,7 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + uint8_t m = P_FIELD(RS2, 0, 8); + const uint64_t maskN = 0xFFFFull; + if (m >= 16) p_rd = 0; + else p_rd = (uint16_t)((p_rs1 << m) & maskN); +})
\ No newline at end of file diff --git a/riscv/insns/psll_dws.h b/riscv/insns/psll_dws.h new file mode 100644 index 00000000..ec71edbf --- /dev/null +++ b/riscv/insns/psll_dws.h @@ -0,0 +1,7 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + uint8_t m = P_FIELD(RS2, 0, 8); + const uint64_t maskN = 0xFFFFFFFFull; + if (m >= 32) p_rd = 0; + else p_rd = (uint32_t)((p_rs1 << m) & maskN); +})
\ No newline at end of file diff --git a/riscv/insns/psll_hs.h b/riscv/insns/psll_hs.h new file mode 100644 index 00000000..5470506f --- /dev/null +++ b/riscv/insns/psll_hs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = p_rs1 << (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psll_ws.h b/riscv/insns/psll_ws.h new file mode 100644 index 00000000..d86c2b46 --- /dev/null +++ b/riscv/insns/psll_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 << (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/pslli_b.h b/riscv/insns/pslli_b.h new file mode 100644 index 00000000..79f8ebc5 --- /dev/null +++ b/riscv/insns/pslli_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(8, 8, { + p_rd = p_rs1 << insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/pslli_db.h b/riscv/insns/pslli_db.h new file mode 100644 index 00000000..ab35e17c --- /dev/null +++ b/riscv/insns/pslli_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + p_rd = p_rs1 << insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/pslli_dh.h b/riscv/insns/pslli_dh.h new file mode 100644 index 00000000..06a0b8af --- /dev/null +++ b/riscv/insns/pslli_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = p_rs1 << insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/pslli_dw.h b/riscv/insns/pslli_dw.h new file mode 100644 index 00000000..2c654498 --- /dev/null +++ b/riscv/insns/pslli_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = p_rs1 << insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/pslli_h.h b/riscv/insns/pslli_h.h new file mode 100644 index 00000000..65127f7e --- /dev/null +++ b/riscv/insns/pslli_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = p_rs1 << insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/pslli_w.h b/riscv/insns/pslli_w.h new file mode 100644 index 00000000..cd19c7ac --- /dev/null +++ b/riscv/insns/pslli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 << insn.shamtw(); +} +) diff --git a/riscv/insns/psra_bs.h b/riscv/insns/psra_bs.h new file mode 100644 index 00000000..bdc00144 --- /dev/null +++ b/riscv/insns/psra_bs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(8, 8, { + p_rd = p_rs1 >> (RS2 & (8 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psra_dbs.h b/riscv/insns/psra_dbs.h new file mode 100644 index 00000000..f68e5488 --- /dev/null +++ b/riscv/insns/psra_dbs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + p_rd = p_rs1 >> (RS2 & (8 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psra_dhs.h b/riscv/insns/psra_dhs.h new file mode 100644 index 00000000..3689c9b1 --- /dev/null +++ b/riscv/insns/psra_dhs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = p_rs1 >> (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psra_dws.h b/riscv/insns/psra_dws.h new file mode 100644 index 00000000..47ab0d56 --- /dev/null +++ b/riscv/insns/psra_dws.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psra_hs.h b/riscv/insns/psra_hs.h new file mode 100644 index 00000000..3a719ac2 --- /dev/null +++ b/riscv/insns/psra_hs.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = p_rs1 >> (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psra_ws.h b/riscv/insns/psra_ws.h new file mode 100644 index 00000000..3fd1539d --- /dev/null +++ b/riscv/insns/psra_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/psrai_b.h b/riscv/insns/psrai_b.h new file mode 100644 index 00000000..dd109927 --- /dev/null +++ b/riscv/insns/psrai_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(8, 8, { + p_rd = p_rs1 >> insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/psrai_db.h b/riscv/insns/psrai_db.h new file mode 100644 index 00000000..1949e200 --- /dev/null +++ b/riscv/insns/psrai_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(8, 8, { + p_rd = p_rs1 >> insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/psrai_dh.h b/riscv/insns/psrai_dh.h new file mode 100644 index 00000000..f2066098 --- /dev/null +++ b/riscv/insns/psrai_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = p_rs1 >> insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/psrai_dw.h b/riscv/insns/psrai_dw.h new file mode 100644 index 00000000..0342780e --- /dev/null +++ b/riscv/insns/psrai_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/psrai_h.h b/riscv/insns/psrai_h.h new file mode 100644 index 00000000..89a1a686 --- /dev/null +++ b/riscv/insns/psrai_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = p_rs1 >> insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/psrai_w.h b/riscv/insns/psrai_w.h new file mode 100644 index 00000000..06d81812 --- /dev/null +++ b/riscv/insns/psrai_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +} +) diff --git a/riscv/insns/psrari_dh.h b/riscv/insns/psrari_dh.h new file mode 100644 index 00000000..4ccc49bd --- /dev/null +++ b/riscv/insns/psrari_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = insn.shamth() ? ((p_rs1 >> insn.shamth()) + ((p_rs1 >> (insn.shamth() - 1)) & 1)) : p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psrari_dw.h b/riscv/insns/psrari_dw.h new file mode 100644 index 00000000..c3c66216 --- /dev/null +++ b/riscv/insns/psrari_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = insn.shamtw() ? ((p_rs1 >> insn.shamtw()) + ((p_rs1 >> (insn.shamtw() - 1)) & 1)) : p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psrari_h.h b/riscv/insns/psrari_h.h new file mode 100644 index 00000000..ace18a9a --- /dev/null +++ b/riscv/insns/psrari_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = insn.shamth() ? ((p_rs1 >> insn.shamth()) + ((p_rs1 >> (insn.shamth() - 1)) & 1)) : p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/psrari_w.h b/riscv/insns/psrari_w.h new file mode 100644 index 00000000..a3d02f17 --- /dev/null +++ b/riscv/insns/psrari_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = insn.shamtw() ? ((p_rs1 >> insn.shamtw()) + ((p_rs1 >> (insn.shamtw() - 1)) & 1)) : p_rs1; +} +) diff --git a/riscv/insns/psrl_bs.h b/riscv/insns/psrl_bs.h new file mode 100644 index 00000000..5e3c5953 --- /dev/null +++ b/riscv/insns/psrl_bs.h @@ -0,0 +1,3 @@ +P_RD_RS1_ULOOP(8, 8, { + p_rd = p_rs1 >> (RS2 & (8 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psrl_dbs.h b/riscv/insns/psrl_dbs.h new file mode 100644 index 00000000..00d6b6d4 --- /dev/null +++ b/riscv/insns/psrl_dbs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(8, 8, { + p_rd = p_rs1 >> (RS2 & (8 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psrl_dhs.h b/riscv/insns/psrl_dhs.h new file mode 100644 index 00000000..add4b858 --- /dev/null +++ b/riscv/insns/psrl_dhs.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(16, 16, { + p_rd = p_rs1 >> (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psrl_dws.h b/riscv/insns/psrl_dws.h new file mode 100644 index 00000000..0f102d7e --- /dev/null +++ b/riscv/insns/psrl_dws.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psrl_hs.h b/riscv/insns/psrl_hs.h new file mode 100644 index 00000000..d3389c05 --- /dev/null +++ b/riscv/insns/psrl_hs.h @@ -0,0 +1,3 @@ +P_RD_RS1_ULOOP(16, 16, { + p_rd = p_rs1 >> (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psrl_ws.h b/riscv/insns/psrl_ws.h new file mode 100644 index 00000000..50f784d9 --- /dev/null +++ b/riscv/insns/psrl_ws.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_ULOOP(32, 32, { + p_rd = p_rs1 >> (RS2 & (32 - 1)); +} +) diff --git a/riscv/insns/psrli_b.h b/riscv/insns/psrli_b.h new file mode 100644 index 00000000..68b79e06 --- /dev/null +++ b/riscv/insns/psrli_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_ULOOP(8, 8, { + p_rd = p_rs1 >> insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/psrli_db.h b/riscv/insns/psrli_db.h new file mode 100644 index 00000000..91ef7964 --- /dev/null +++ b/riscv/insns/psrli_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(8, 8, { + p_rd = p_rs1 >> insn.shamtb(); +})
\ No newline at end of file diff --git a/riscv/insns/psrli_dh.h b/riscv/insns/psrli_dh.h new file mode 100644 index 00000000..c67229a5 --- /dev/null +++ b/riscv/insns/psrli_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(16, 16, { + p_rd = p_rs1 >> insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/psrli_dw.h b/riscv/insns/psrli_dw.h new file mode 100644 index 00000000..9702ff8c --- /dev/null +++ b/riscv/insns/psrli_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/psrli_h.h b/riscv/insns/psrli_h.h new file mode 100644 index 00000000..b7b2a763 --- /dev/null +++ b/riscv/insns/psrli_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_ULOOP(16, 16, { + p_rd = p_rs1 >> insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/psrli_w.h b/riscv/insns/psrli_w.h new file mode 100644 index 00000000..a29bdba1 --- /dev/null +++ b/riscv/insns/psrli_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_ULOOP(32, 32, { + p_rd = p_rs1 >> insn.shamtw(); +} +) diff --git a/riscv/insns/pssa_dhx.h b/riscv/insns/pssa_dhx.h new file mode 100644 index 00000000..d5a64700 --- /dev/null +++ b/riscv/insns/pssa_dhx.h @@ -0,0 +1,10 @@ +require_rv32; +P_CROSS_DW_ULOOP(16, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/pssa_hx.h b/riscv/insns/pssa_hx.h new file mode 100644 index 00000000..a5acf2fd --- /dev/null +++ b/riscv/insns/pssa_hx.h @@ -0,0 +1,9 @@ +P_CROSS_ULOOP(16, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_add<int16_t, uint16_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/pssa_wx.h b/riscv/insns/pssa_wx.h new file mode 100644 index 00000000..692d22a4 --- /dev/null +++ b/riscv/insns/pssa_wx.h @@ -0,0 +1,11 @@ +require_rv64; +P_CROSS_ULOOP(32, { + bool sat = false; + p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +}, { + bool sat = false; + p_rd = (sat_add<int32_t, uint32_t>(p_rs1, p_rs2, sat)); + if (sat) P.VU.vxsat->write(1); +} +) diff --git a/riscv/insns/pssh1sadd_dh.h b/riscv/insns/pssh1sadd_dh.h new file mode 100644 index 00000000..4939978d --- /dev/null +++ b/riscv/insns/pssh1sadd_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = P_SAT(16, P_SAT(16, p_rs1 << 1) + p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pssh1sadd_dw.h b/riscv/insns/pssh1sadd_dw.h new file mode 100644 index 00000000..4ae54950 --- /dev/null +++ b/riscv/insns/pssh1sadd_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = P_SAT(32, P_SAT(32, (sreg_t)p_rs1 << 1) + (sreg_t)p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pssh1sadd_h.h b/riscv/insns/pssh1sadd_h.h new file mode 100644 index 00000000..dead4c71 --- /dev/null +++ b/riscv/insns/pssh1sadd_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16, 16, 16, { + p_rd = P_SAT(16, P_SAT(16, p_rs1 << 1) + p_rs2); +})
\ No newline at end of file diff --git a/riscv/insns/pssh1sadd_w.h b/riscv/insns/pssh1sadd_w.h new file mode 100644 index 00000000..a84c17b0 --- /dev/null +++ b/riscv/insns/pssh1sadd_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = P_SAT(32, P_SAT(32, p_rs1 << 1) + p_rs2); +} +) diff --git a/riscv/insns/pssha_dhs.h b/riscv/insns/pssha_dhs.h new file mode 100644 index 00000000..a85d2a5a --- /dev/null +++ b/riscv/insns/pssha_dhs.h @@ -0,0 +1,45 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + uint64_t bits_SMIN = (uint64_t{1} << (16 - 1)); + uint64_t bits_SMAX = ((uint64_t{1} << (16 - 1)) - 1); + bool ov = false; + int8_t m = P_FIELD(RS2, 0, 8); + int8_t rev = static_cast<int8_t>(m); + rev = (m < 0) ? static_cast<uint8_t>(~m + 1u) : m; + uint64_t mask = ((uint64_t{1} << 16) - 1); + p_rs1 &= mask; + if(m < 0){ + unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev; + uint64_t sign = (p_rs1 >> (16 - 1)) & 1u; + + if(sh >= 16) p_rd = (uint16_t)(sign ? mask : 0u); + else{ + uint64_t shifted = (p_rs1 >> sh); + uint64_t fill = (~uint64_t{0}) << (16 - sh); + shifted |= fill; + p_rd = (uint16_t)(shifted & mask); + } + } + else{ + if(rev==0) p_rd = (uint16_t)p_rs1; + else if(rev >= 16){ + if(p_rs1==0) p_rd = 0; + else{ + ov = true; + uint64_t sign = (p_rs1 >> (16 - 1)) & 1u; + p_rd = (uint16_t)(sign ? bits_SMIN : bits_SMAX); + } + } + else{ + uint64_t sign = (p_rs1 >> (16 - 1)) & 1u; + uint64_t top = (p_rs1 >> (16 - rev)); + uint64_t need = sign ? ((uint64_t{1} << rev) - 1) : 0u; + ov = (top != need); + if(ov) + p_rd = (uint16_t)(sign ? bits_SMIN : bits_SMAX); + else + p_rd = (uint16_t)((p_rs1 << rev) & mask); + } + } + if (ov) P.VU.vxsat->write(1); +})
\ No newline at end of file diff --git a/riscv/insns/pssha_dws.h b/riscv/insns/pssha_dws.h new file mode 100644 index 00000000..6d861904 --- /dev/null +++ b/riscv/insns/pssha_dws.h @@ -0,0 +1,45 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + uint64_t bits_SMIN = (uint64_t{1} << (32 - 1)); + uint64_t bits_SMAX = ((uint64_t{1} << (32 - 1)) - 1); + bool ov = false; + int8_t m = P_FIELD(RS2, 0, 8); + int8_t rev = static_cast<int8_t>(m); + rev = (m < 0) ? static_cast<uint8_t>(~m + 1u) : m; + uint64_t mask = ((uint64_t{1} << 32) - 1); + p_rs1 &= mask; + if(m < 0){ + unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev; + uint64_t sign = (p_rs1 >> (32 - 1)) & 1u; + + if(sh >= 32) p_rd = (uint32_t)(sign ? mask : 0u); + else{ + uint64_t shifted = (p_rs1 >> sh); + uint64_t fill = (~uint64_t{0}) << (32 - sh); + shifted |= fill; + p_rd = (uint32_t)(shifted & mask); + } + } + else{ + if(rev==0) p_rd = (uint32_t)p_rs1; + else if(rev >= 32){ + if(p_rs1==0) p_rd = 0; + else{ + ov = true; + uint64_t sign = (p_rs1 >> (32 - 1)) & 1u; + p_rd = (uint32_t)(sign ? bits_SMIN : bits_SMAX); + } + } + else{ + uint64_t sign = (p_rs1 >> (32 - 1)) & 1u; + uint64_t top = (p_rs1 >> (32 - rev)); + uint64_t need = sign ? ((uint64_t{1} << rev) - 1) : 0u; + ov = (top != need); + if(ov) + p_rd = (uint32_t)(sign ? bits_SMIN : bits_SMAX); + else + p_rd = (uint32_t)((p_rs1 << rev) & mask); + } + } + if (ov) P.VU.vxsat->write(1); +}) diff --git a/riscv/insns/pssha_hs.h b/riscv/insns/pssha_hs.h new file mode 100644 index 00000000..d88c41d8 --- /dev/null +++ b/riscv/insns/pssha_hs.h @@ -0,0 +1,13 @@ +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(16, 16, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 16) { + p_rd = (p_rs1 & 0x8000) ? 0x8000 : 0x7fff; + P.VU.vxsat->write(1); + } + else if (sshamt <= -16) + p_rd = (p_rs1 & 0x8000) ? 0xffff : 0; + else + p_rd = sshamt >= 0 ? P_SAT(16, sext32(p_rs1) << sshamt) : (p_rs1 >> -sshamt); +})
\ No newline at end of file diff --git a/riscv/insns/pssha_ws.h b/riscv/insns/pssha_ws.h new file mode 100644 index 00000000..4229aa0f --- /dev/null +++ b/riscv/insns/pssha_ws.h @@ -0,0 +1,15 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 32) { + p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff; + P.VU.vxsat->write(1); + } + else if (sshamt <= -32) + p_rd = (p_rs1 & 0x80000000) ? 0xffffffff : 0; + else + p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : (p_rs1 >> -sshamt); +} +) diff --git a/riscv/insns/psshar_dhs.h b/riscv/insns/psshar_dhs.h new file mode 100644 index 00000000..e3116570 --- /dev/null +++ b/riscv/insns/psshar_dhs.h @@ -0,0 +1,64 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + uint64_t bits_SMIN = (uint64_t{1} << (16 - 1)); + uint64_t bits_SMAX = ((uint64_t{1} << (16 - 1)) - 1); + bool ov = false; + int8_t m = P_FIELD(RS2, 0, 8); + int8_t rev = static_cast<int8_t>(m); + rev = (m < 0) ? static_cast<uint8_t>(~m + 1u) : m; + uint64_t mask = ((uint64_t{1} << 16) - 1); + p_rs1 &= mask; + if(m < 0){ + if ((rev & 0xFFu) == 0u) + p_rd = (uint16_t)p_rs1; + else{ + int128_t v_sext; + bool neg = ((p_rs1 >> (16 - 1)) & 1u); + if(!neg) v_sext = static_cast<int128_t>(p_rs1); + else v_sext = static_cast<int128_t>((~static_cast<uint128_t>(0) << 16) | static_cast<uint128_t>(p_rs1)); + int128_t v_cat0 = v_sext << 1; + + unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev; + + int128_t sra_val; + if(sh == 0) + sra_val = v_cat0; + else if(sh >=127) + sra_val = (v_cat0 < 0) ? static_cast<int128_t>(-1) : static_cast<int128_t>(0); + else{ + int128_t ux = static_cast<uint128_t>(v_cat0); + int128_t shifted = ux >> sh; + if(v_cat0 < 0) + shifted |= (~static_cast<uint128_t>(0)) << (128 - sh); + sra_val = static_cast<int128_t>(shifted); + } + + int128_t plus1 = sra_val + static_cast<int128_t>(1); + uint128_t ures = static_cast<uint128_t>(plus1); + p_rd = (uint16_t)(static_cast<uint64_t>((ures >> 1) & static_cast<uint128_t>(mask))); + } + } + else{ + if(rev==0) p_rd = (uint16_t)p_rs1; + else if(rev >= 16){ + if(p_rs1==0) + p_rd = 0; + else{ + ov = true; + uint64_t sign = (p_rs1 >> (16 - 1)) & 1u; + p_rd = (uint16_t)(sign ? bits_SMIN : bits_SMAX); + } + } + else{ + uint64_t sign = (p_rs1 >> (16 - 1)) & 1u; + uint64_t top = (p_rs1 >> (16 - rev)); + uint64_t need = sign ? ((uint64_t{1} << rev) - 1) : 0u; + ov = (top != need); + if(ov) + p_rd = (uint16_t)(sign ? bits_SMIN : bits_SMAX); + else + p_rd = (uint16_t)((p_rs1 << rev) & mask); + } + } + if (ov) P.VU.vxsat->write(1); +}) diff --git a/riscv/insns/psshar_dws.h b/riscv/insns/psshar_dws.h new file mode 100644 index 00000000..1f530b39 --- /dev/null +++ b/riscv/insns/psshar_dws.h @@ -0,0 +1,64 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + uint64_t bits_SMIN = (uint64_t{1} << (32 - 1)); + uint64_t bits_SMAX = ((uint64_t{1} << (32 - 1)) - 1); + bool ov = false; + int8_t m = P_FIELD(RS2, 0, 8); + int8_t rev = static_cast<int8_t>(m); + rev = (m < 0) ? static_cast<uint8_t>(~m + 1u) : m; + uint64_t mask = ((uint64_t{1} << 32) - 1); + p_rs1 &= mask; + if(m < 0){ + if ((rev & 0xFFu) == 0u) + p_rd = (uint32_t)p_rs1; + else{ + int128_t v_sext; + bool neg = ((p_rs1 >> (32 - 1)) & 1u); + if(!neg) v_sext = static_cast<int128_t>(p_rs1); + else v_sext = static_cast<int128_t>((~static_cast<uint128_t>(0) << 32) | static_cast<uint128_t>(p_rs1)); + int128_t v_cat0 = v_sext << 1; + + unsigned sh = ((unsigned)(uint8_t)rev > 255u) ? 255u : (unsigned)(uint8_t)rev; + + int128_t sra_val; + if(sh == 0) + sra_val = v_cat0; + else if(sh >=127) + sra_val = (v_cat0 < 0) ? static_cast<int128_t>(-1) : static_cast<int128_t>(0); + else{ + int128_t ux = static_cast<uint128_t>(v_cat0); + int128_t shifted = ux >> sh; + if(v_cat0 < 0) + shifted |= (~static_cast<uint128_t>(0)) << (128 - sh); + sra_val = static_cast<int128_t>(shifted); + } + + int128_t plus1 = sra_val + static_cast<int128_t>(1); + uint128_t ures = static_cast<uint128_t>(plus1); + p_rd = (uint32_t)(static_cast<uint64_t>((ures >> 1) & static_cast<uint128_t>(mask))); + } + } + else{ + if(rev==0) p_rd = (uint32_t)p_rs1; + else if(rev >= 32){ + if(p_rs1==0) + p_rd = 0; + else{ + ov = true; + uint64_t sign = (p_rs1 >> (32 - 1)) & 1u; + p_rd = (uint32_t)(sign ? bits_SMIN : bits_SMAX); + } + } + else{ + uint64_t sign = (p_rs1 >> (32 - 1)) & 1u; + uint64_t top = (p_rs1 >> (32 - rev)); + uint64_t need = sign ? ((uint64_t{1} << rev) - 1) : 0u; + ov = (top != need); + if(ov) + p_rd = (uint32_t)(sign ? bits_SMIN : bits_SMAX); + else + p_rd = (uint32_t)((p_rs1 << rev) & mask); + } + } + if (ov) P.VU.vxsat->write(1); +}) diff --git a/riscv/insns/psshar_hs.h b/riscv/insns/psshar_hs.h new file mode 100644 index 00000000..581d1427 --- /dev/null +++ b/riscv/insns/psshar_hs.h @@ -0,0 +1,13 @@ +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(16, 16, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 16) { + p_rd = (p_rs1 & 0x8000) ? 0x8000 : 0x7fff; + P.VU.vxsat->write(1); + } + else if (sshamt <= -16) + p_rd = 0; + else + p_rd = sshamt >= 0 ? P_SAT(16, sext32(p_rs1) << sshamt) : ((p_rs1 >> -sshamt) + ((p_rs1 >> (-sshamt - 1)) & 1)); +})
\ No newline at end of file diff --git a/riscv/insns/psshar_ws.h b/riscv/insns/psshar_ws.h new file mode 100644 index 00000000..d34dd16e --- /dev/null +++ b/riscv/insns/psshar_ws.h @@ -0,0 +1,15 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (p_rs1 == 0) + p_rd = 0; + else if (sshamt >= 32) { + p_rd = (p_rs1 & 0x80000000) ? 0x80000000 : 0x7fffffff; + P.VU.vxsat->write(1); + } + else if (sshamt <= -32) + p_rd = 0; + else + p_rd = sshamt >= 0 ? P_SAT(32, sext32(p_rs1) << sshamt) : ((p_rs1 >> -sshamt) + ((p_rs1 >> (-sshamt - 1)) & 1)); +} +) diff --git a/riscv/insns/psshl_dhs.h b/riscv/insns/psshl_dhs.h new file mode 100644 index 00000000..d1fcade5 --- /dev/null +++ b/riscv/insns/psshl_dhs.h @@ -0,0 +1,19 @@ +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_DW_LOOP(16, 16, { + if (sshamt < 0) { + if (sshamt <= -16) + p_rd = 0; + else + p_rd = (uint16_t)p_rs1 >> (-sshamt); + } else { + uint32_t shx = (sshamt >= 16) ? ((uint32_t)(uint16_t)p_rs1 << 16) : ((uint32_t)(uint16_t)p_rs1 << sshamt); + if (shx > 0xFFFF) { + P.VU.vxsat->write(1); + p_rd = 0xFFFF; + } else { + p_rd = (uint16_t)shx; + } + } +}) + diff --git a/riscv/insns/psshl_dws.h b/riscv/insns/psshl_dws.h new file mode 100644 index 00000000..71569d2e --- /dev/null +++ b/riscv/insns/psshl_dws.h @@ -0,0 +1,19 @@ +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_DW_LOOP(32, 32, { + if (sshamt < 0) { + if (sshamt <= -32) + p_rd = 0; + else + p_rd = (uint32_t)p_rs1 >> (-sshamt); + } else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)(uint32_t)p_rs1 << 32) : ((uint64_t)(uint32_t)p_rs1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + p_rd = 0xFFFFFFFF; + } else { + p_rd = (uint32_t)shx; + } + } +}) + diff --git a/riscv/insns/psshl_hs.h b/riscv/insns/psshl_hs.h new file mode 100644 index 00000000..459289e1 --- /dev/null +++ b/riscv/insns/psshl_hs.h @@ -0,0 +1,18 @@ +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(16, 16, { + if (sshamt < 0) { + if (sshamt <= -16) + p_rd = 0; + else + p_rd = (uint16_t)p_rs1 >> (-sshamt); + } else { + uint32_t shx = (sshamt >= 16) ? ((uint32_t)(uint16_t)p_rs1 << 16) : ((uint32_t)(uint16_t)p_rs1 << sshamt); + if (shx > 0xFFFF) { + P.VU.vxsat->write(1); + p_rd = 0xFFFF; + } else { + p_rd = (uint16_t)shx; + } + } +}) + diff --git a/riscv/insns/psshl_ws.h b/riscv/insns/psshl_ws.h new file mode 100644 index 00000000..c67eddab --- /dev/null +++ b/riscv/insns/psshl_ws.h @@ -0,0 +1,19 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (sshamt < 0) { + if (sshamt <= -32) + p_rd = 0; + else + p_rd = (uint32_t)p_rs1 >> (-sshamt); + } else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)(uint32_t)p_rs1 << 32) : ((uint64_t)(uint32_t)p_rs1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + p_rd = 0xFFFFFFFF; + } else { + p_rd = (uint32_t)shx; + } + } +}) + diff --git a/riscv/insns/psshlr_dhs.h b/riscv/insns/psshlr_dhs.h new file mode 100644 index 00000000..d2616d6f --- /dev/null +++ b/riscv/insns/psshlr_dhs.h @@ -0,0 +1,23 @@ +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_DW_LOOP(16, 16, { + if (sshamt < 0) { + uint32_t shx; + if (sshamt < -16) + shx = 0; + else if (sshamt == -16) + shx = ((uint16_t)p_rs1 >> 15) & 1; + else + shx = ((uint32_t)(uint16_t)p_rs1 << 1) >> (-sshamt); + p_rd = (uint16_t)((shx + 1) >> 1); + } else { + uint32_t shx = (sshamt >= 16) ? ((uint32_t)(uint16_t)p_rs1 << 16) : ((uint32_t)(uint16_t)p_rs1 << sshamt); + if (shx > 0xFFFF) { + P.VU.vxsat->write(1); + p_rd = 0xFFFF; + } else { + p_rd = (uint16_t)shx; + } + } +}) + diff --git a/riscv/insns/psshlr_dws.h b/riscv/insns/psshlr_dws.h new file mode 100644 index 00000000..483d9d41 --- /dev/null +++ b/riscv/insns/psshlr_dws.h @@ -0,0 +1,23 @@ +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_DW_LOOP(32, 32, { + if (sshamt < 0) { + uint64_t shx; + if (sshamt < -32) + shx = 0; + else if (sshamt == -32) + shx = ((uint32_t)p_rs1 >> 31) & 1; + else + shx = ((uint64_t)(uint32_t)p_rs1 << 1) >> (-sshamt); + p_rd = (uint32_t)((shx + 1) >> 1); + } else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)(uint32_t)p_rs1 << 32) : ((uint64_t)(uint32_t)p_rs1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + p_rd = 0xFFFFFFFF; + } else { + p_rd = (uint32_t)shx; + } + } +}) + diff --git a/riscv/insns/psshlr_hs.h b/riscv/insns/psshlr_hs.h new file mode 100644 index 00000000..fd7df13d --- /dev/null +++ b/riscv/insns/psshlr_hs.h @@ -0,0 +1,22 @@ +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(16, 16, { + if (sshamt < 0) { + uint32_t shx; + if (sshamt < -16) + shx = 0; + else if (sshamt == -16) + shx = ((uint16_t)p_rs1 >> 15) & 1; + else + shx = ((uint32_t)(uint16_t)p_rs1 << 1) >> (-sshamt); + p_rd = (uint16_t)((shx + 1) >> 1); + } else { + uint32_t shx = (sshamt >= 16) ? ((uint32_t)(uint16_t)p_rs1 << 16) : ((uint32_t)(uint16_t)p_rs1 << sshamt); + if (shx > 0xFFFF) { + P.VU.vxsat->write(1); + p_rd = 0xFFFF; + } else { + p_rd = (uint16_t)shx; + } + } +}) + diff --git a/riscv/insns/psshlr_ws.h b/riscv/insns/psshlr_ws.h new file mode 100644 index 00000000..1935db20 --- /dev/null +++ b/riscv/insns/psshlr_ws.h @@ -0,0 +1,23 @@ +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +P_RD_RS1_LOOP(32, 32, { + if (sshamt < 0) { + uint64_t shx; + if (sshamt < -32) + shx = 0; + else if (sshamt == -32) + shx = ((uint32_t)p_rs1 >> 31) & 1; + else + shx = ((uint64_t)(uint32_t)p_rs1 << 1) >> (-sshamt); + p_rd = (uint32_t)((shx + 1) >> 1); + } else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)(uint32_t)p_rs1 << 32) : ((uint64_t)(uint32_t)p_rs1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + p_rd = 0xFFFFFFFF; + } else { + p_rd = (uint32_t)shx; + } + } +}) + diff --git a/riscv/insns/psslai_dh.h b/riscv/insns/psslai_dh.h new file mode 100644 index 00000000..43b7dc07 --- /dev/null +++ b/riscv/insns/psslai_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(16, 16, { + p_rd = P_SAT(16, sext32(p_rs1) << insn.shamth()); +})
\ No newline at end of file diff --git a/riscv/insns/psslai_dw.h b/riscv/insns/psslai_dw.h new file mode 100644 index 00000000..27280421 --- /dev/null +++ b/riscv/insns/psslai_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_DW_LOOP(32, 32, { + p_rd = P_SAT(32, sext32(p_rs1) << insn.shamtw()); +})
\ No newline at end of file diff --git a/riscv/insns/psslai_h.h b/riscv/insns/psslai_h.h new file mode 100644 index 00000000..b5ae37e1 --- /dev/null +++ b/riscv/insns/psslai_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = P_SAT(16, sext32(p_rs1) << insn.shamth()); +})
\ No newline at end of file diff --git a/riscv/insns/psslai_w.h b/riscv/insns/psslai_w.h new file mode 100644 index 00000000..d44cbada --- /dev/null +++ b/riscv/insns/psslai_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_SAT(32, sext32(p_rs1) << insn.shamtw()); +} +) diff --git a/riscv/insns/pssub_b.h b/riscv/insns/pssub_b.h new file mode 100644 index 00000000..91a89aa1 --- /dev/null +++ b/riscv/insns/pssub_b.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(8,8,8, { + bool sat = false; + p_rd = (sat_sub<int8_t, uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssub_db.h b/riscv/insns/pssub_db.h new file mode 100644 index 00000000..1fd3d79e --- /dev/null +++ b/riscv/insns/pssub_db.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8,8,8, { + bool sat = false; + p_rd = (sat_sub<int8_t, uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssub_dh.h b/riscv/insns/pssub_dh.h new file mode 100644 index 00000000..8c16a47c --- /dev/null +++ b/riscv/insns/pssub_dh.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16,16,16, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssub_dw.h b/riscv/insns/pssub_dw.h new file mode 100644 index 00000000..be55dc5a --- /dev/null +++ b/riscv/insns/pssub_dw.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssub_h.h b/riscv/insns/pssub_h.h new file mode 100644 index 00000000..db88d680 --- /dev/null +++ b/riscv/insns/pssub_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_LOOP(16,16,16, { + bool sat = false; + p_rd = (sat_sub<int16_t, uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssub_w.h b/riscv/insns/pssub_w.h new file mode 100644 index 00000000..0cfa1072 --- /dev/null +++ b/riscv/insns/pssub_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32,32,32, { + bool sat = false; + p_rd = (sat_sub<int32_t, uint32_t>(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/pssubu_b.h b/riscv/insns/pssubu_b.h new file mode 100644 index 00000000..3fd44bee --- /dev/null +++ b/riscv/insns/pssubu_b.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(8,8,8, { + bool sat = false; + p_rd = (sat_subu<uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssubu_db.h b/riscv/insns/pssubu_db.h new file mode 100644 index 00000000..fd564a5f --- /dev/null +++ b/riscv/insns/pssubu_db.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(8,8,8, { + bool sat = false; + p_rd = (sat_subu<uint8_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssubu_dh.h b/riscv/insns/pssubu_dh.h new file mode 100644 index 00000000..b910ce5d --- /dev/null +++ b/riscv/insns/pssubu_dh.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(16,16,16, { + bool sat = false; + p_rd = (sat_subu<uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssubu_dw.h b/riscv/insns/pssubu_dw.h new file mode 100644 index 00000000..aa9063a2 --- /dev/null +++ b/riscv/insns/pssubu_dw.h @@ -0,0 +1,5 @@ +require_rv32; +P_RD_RS1_RS2_DW_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_subu<uint32_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssubu_h.h b/riscv/insns/pssubu_h.h new file mode 100644 index 00000000..de3ff72a --- /dev/null +++ b/riscv/insns/pssubu_h.h @@ -0,0 +1,4 @@ +P_RD_RS1_RS2_ULOOP(16,16,16, { + bool sat = false; + p_rd = (sat_subu<uint16_t>(p_rs1, p_rs2, sat)); +})
\ No newline at end of file diff --git a/riscv/insns/pssubu_w.h b/riscv/insns/pssubu_w.h new file mode 100644 index 00000000..e4a42adc --- /dev/null +++ b/riscv/insns/pssubu_w.h @@ -0,0 +1,6 @@ +require_rv64; +P_RD_RS1_RS2_ULOOP(32,32,32, { + bool sat = false; + p_rd = (sat_subu<uint32_t>(p_rs1, p_rs2, sat)); +} +) diff --git a/riscv/insns/psub_b.h b/riscv/insns/psub_b.h new file mode 100644 index 00000000..1dce95cf --- /dev/null +++ b/riscv/insns/psub_b.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(8, 8, 8, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psub_db.h b/riscv/insns/psub_db.h new file mode 100644 index 00000000..9dd13238 --- /dev/null +++ b/riscv/insns/psub_db.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(8, 8, 8, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psub_dh.h b/riscv/insns/psub_dh.h new file mode 100644 index 00000000..ffb1c44e --- /dev/null +++ b/riscv/insns/psub_dh.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(16, 16, 16, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psub_dw.h b/riscv/insns/psub_dw.h new file mode 100644 index 00000000..cababad7 --- /dev/null +++ b/riscv/insns/psub_dw.h @@ -0,0 +1,4 @@ +require_rv32; +P_RD_RS1_RS2_DW_LOOP(32, 32, 32, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psub_h.h b/riscv/insns/psub_h.h new file mode 100644 index 00000000..a2d7c3b1 --- /dev/null +++ b/riscv/insns/psub_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_RS2_LOOP(16, 16, 16, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/psub_w.h b/riscv/insns/psub_w.h new file mode 100644 index 00000000..3ccffe29 --- /dev/null +++ b/riscv/insns/psub_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_RS2_LOOP(32, 32, 32, { + p_rd = p_rs1 - p_rs2; +} +) diff --git a/riscv/insns/pusati_dh.h b/riscv/insns/pusati_dh.h new file mode 100644 index 00000000..16eb4332 --- /dev/null +++ b/riscv/insns/pusati_dh.h @@ -0,0 +1,13 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(16, 16, { + uint64_t uint_max = insn.shamth() ? UINT64_MAX >> (64 - insn.shamth()) : 0; + int16_t s = (int16_t)p_rs1; + p_rd = p_rs1; + if (s < 0) { + p_rd = 0; + P.VU.vxsat->write(1); + } else if ((uint64_t)s > uint_max) { + p_rd = uint_max; + P.VU.vxsat->write(1); + } +})
\ No newline at end of file diff --git a/riscv/insns/pusati_dw.h b/riscv/insns/pusati_dw.h new file mode 100644 index 00000000..04f33a6c --- /dev/null +++ b/riscv/insns/pusati_dw.h @@ -0,0 +1,13 @@ +require_rv32; +P_RD_RS1_DW_ULOOP(32, 32, { + uint64_t uint_max = insn.shamtw() ? UINT64_MAX >> (64 - insn.shamtw()) : 0; + int32_t s = (int32_t)p_rs1; + p_rd = p_rs1; + if (s < 0) { + p_rd = 0; + P.VU.vxsat->write(1); + } else if ((uint64_t)s > uint_max) { + p_rd = uint_max; + P.VU.vxsat->write(1); + } +})
\ No newline at end of file diff --git a/riscv/insns/pusati_h.h b/riscv/insns/pusati_h.h new file mode 100644 index 00000000..d5857448 --- /dev/null +++ b/riscv/insns/pusati_h.h @@ -0,0 +1,3 @@ +P_RD_RS1_LOOP(16, 16, { + p_rd = P_USAT(insn.shamth() + 1, p_rs1); +})
\ No newline at end of file diff --git a/riscv/insns/pusati_w.h b/riscv/insns/pusati_w.h new file mode 100644 index 00000000..adc0bd28 --- /dev/null +++ b/riscv/insns/pusati_w.h @@ -0,0 +1,5 @@ +require_rv64; +P_RD_RS1_LOOP(32, 32, { + p_rd = P_USAT(insn.shamtw() + 1, p_rs1); +} +) diff --git a/riscv/insns/pwadd_b.h b/riscv/insns/pwadd_b.h new file mode 100644 index 00000000..2470b57e --- /dev/null +++ b/riscv/insns/pwadd_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(8, 8, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwadd_h.h b/riscv/insns/pwadd_h.h new file mode 100644 index 00000000..c139c3fc --- /dev/null +++ b/riscv/insns/pwadd_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwadda_b.h b/riscv/insns/pwadda_b.h new file mode 100644 index 00000000..492fdbe9 --- /dev/null +++ b/riscv/insns/pwadda_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(8, 8, { + p_rd += p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwadda_h.h b/riscv/insns/pwadda_h.h new file mode 100644 index 00000000..0fbfc16e --- /dev/null +++ b/riscv/insns/pwadda_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd += p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwaddau_b.h b/riscv/insns/pwaddau_b.h new file mode 100644 index 00000000..20e4b744 --- /dev/null +++ b/riscv/insns/pwaddau_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(8, 8, { + p_rd += p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwaddau_h.h b/riscv/insns/pwaddau_h.h new file mode 100644 index 00000000..25a5720c --- /dev/null +++ b/riscv/insns/pwaddau_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd += p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwaddu_b.h b/riscv/insns/pwaddu_b.h new file mode 100644 index 00000000..e08f5d30 --- /dev/null +++ b/riscv/insns/pwaddu_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(8, 8, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwaddu_h.h b/riscv/insns/pwaddu_h.h new file mode 100644 index 00000000..7da0db35 --- /dev/null +++ b/riscv/insns/pwaddu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd = p_rs1 + p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmacc_h.h b/riscv/insns/pwmacc_h.h new file mode 100644 index 00000000..fcd8bc69 --- /dev/null +++ b/riscv/insns/pwmacc_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmaccsu_h.h b/riscv/insns/pwmaccsu_h.h new file mode 100644 index 00000000..9e8a07af --- /dev/null +++ b/riscv/insns/pwmaccsu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_SULOOP(16, 16, { + p_rd += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmaccu_h.h b/riscv/insns/pwmaccu_h.h new file mode 100644 index 00000000..0bf6df37 --- /dev/null +++ b/riscv/insns/pwmaccu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd += p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmul_b.h b/riscv/insns/pwmul_b.h new file mode 100644 index 00000000..25fd0490 --- /dev/null +++ b/riscv/insns/pwmul_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(8, 8, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmul_h.h b/riscv/insns/pwmul_h.h new file mode 100644 index 00000000..5b7d431c --- /dev/null +++ b/riscv/insns/pwmul_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmulsu_b.h b/riscv/insns/pwmulsu_b.h new file mode 100644 index 00000000..f94f1e1c --- /dev/null +++ b/riscv/insns/pwmulsu_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_SULOOP(8, 8, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmulsu_h.h b/riscv/insns/pwmulsu_h.h new file mode 100644 index 00000000..0756787b --- /dev/null +++ b/riscv/insns/pwmulsu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_SULOOP(16, 16, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmulu_b.h b/riscv/insns/pwmulu_b.h new file mode 100644 index 00000000..886ac77e --- /dev/null +++ b/riscv/insns/pwmulu_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(8, 8, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwmulu_h.h b/riscv/insns/pwmulu_h.h new file mode 100644 index 00000000..ceeb9d56 --- /dev/null +++ b/riscv/insns/pwmulu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd = p_rs1 * p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsla_bs.h b/riscv/insns/pwsla_bs.h new file mode 100644 index 00000000..6e4ef920 --- /dev/null +++ b/riscv/insns/pwsla_bs.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_LOOP(8, { + p_rd = p_rs1 << (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/pwsla_hs.h b/riscv/insns/pwsla_hs.h new file mode 100644 index 00000000..c63b9f45 --- /dev/null +++ b/riscv/insns/pwsla_hs.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_LOOP(16, { + p_rd = p_rs1 << (RS2 & (32 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/pwslai_b.h b/riscv/insns/pwslai_b.h new file mode 100644 index 00000000..df0a143c --- /dev/null +++ b/riscv/insns/pwslai_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_LOOP(8, { + p_rd = p_rs1 << insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/pwslai_h.h b/riscv/insns/pwslai_h.h new file mode 100644 index 00000000..6504974a --- /dev/null +++ b/riscv/insns/pwslai_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_LOOP(16, { + p_rd = p_rs1 << insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/pwsll_bs.h b/riscv/insns/pwsll_bs.h new file mode 100644 index 00000000..24804320 --- /dev/null +++ b/riscv/insns/pwsll_bs.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_ULOOP(8, { + p_rd = p_rs1 << (RS2 & (16 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/pwsll_hs.h b/riscv/insns/pwsll_hs.h new file mode 100644 index 00000000..17a6326e --- /dev/null +++ b/riscv/insns/pwsll_hs.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_ULOOP(16, { + p_rd = p_rs1 << (RS2 & (32 - 1)); +})
\ No newline at end of file diff --git a/riscv/insns/pwslli_b.h b/riscv/insns/pwslli_b.h new file mode 100644 index 00000000..f2548cbe --- /dev/null +++ b/riscv/insns/pwslli_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_ULOOP(8, { + p_rd = (uint16_t)p_rs1 << insn.shamth(); +})
\ No newline at end of file diff --git a/riscv/insns/pwslli_h.h b/riscv/insns/pwslli_h.h new file mode 100644 index 00000000..59e8e41b --- /dev/null +++ b/riscv/insns/pwslli_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_ULOOP(16, { + p_rd = (uint32_t)p_rs1 << insn.shamtw(); +})
\ No newline at end of file diff --git a/riscv/insns/pwsub_b.h b/riscv/insns/pwsub_b.h new file mode 100644 index 00000000..97c09925 --- /dev/null +++ b/riscv/insns/pwsub_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(8, 8, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsub_h.h b/riscv/insns/pwsub_h.h new file mode 100644 index 00000000..1be15dee --- /dev/null +++ b/riscv/insns/pwsub_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsuba_b.h b/riscv/insns/pwsuba_b.h new file mode 100644 index 00000000..99ad5357 --- /dev/null +++ b/riscv/insns/pwsuba_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(8, 8, { + p_rd += p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsuba_h.h b/riscv/insns/pwsuba_h.h new file mode 100644 index 00000000..0107c690 --- /dev/null +++ b/riscv/insns/pwsuba_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_LOOP(16, 16, { + p_rd += p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsubau_b.h b/riscv/insns/pwsubau_b.h new file mode 100644 index 00000000..2b0b236a --- /dev/null +++ b/riscv/insns/pwsubau_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(8, 8, { + p_rd += p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsubau_h.h b/riscv/insns/pwsubau_h.h new file mode 100644 index 00000000..8281dcd1 --- /dev/null +++ b/riscv/insns/pwsubau_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd += p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsubu_b.h b/riscv/insns/pwsubu_b.h new file mode 100644 index 00000000..a53818cd --- /dev/null +++ b/riscv/insns/pwsubu_b.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(8, 8, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/pwsubu_h.h b/riscv/insns/pwsubu_h.h new file mode 100644 index 00000000..c944ea38 --- /dev/null +++ b/riscv/insns/pwsubu_h.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ULOOP(16, 16, { + p_rd = p_rs1 - p_rs2; +})
\ No newline at end of file diff --git a/riscv/insns/rev.h b/riscv/insns/rev.h new file mode 100644 index 00000000..c2f9dd42 --- /dev/null +++ b/riscv/insns/rev.h @@ -0,0 +1,3 @@ +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/rev16.h b/riscv/insns/rev16.h new file mode 100644 index 00000000..877a1a13 --- /dev/null +++ b/riscv/insns/rev16.h @@ -0,0 +1,4 @@ +require_rv64; +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/rev_rv32.h b/riscv/insns/rev_rv32.h new file mode 100644 index 00000000..c2f9dd42 --- /dev/null +++ b/riscv/insns/rev_rv32.h @@ -0,0 +1,3 @@ +require_extension('P'); + +#include "grevi.h" diff --git a/riscv/insns/sadd.h b/riscv/insns/sadd.h new file mode 100644 index 00000000..94cc264c --- /dev/null +++ b/riscv/insns/sadd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_SAT(xlen, sext_xlen((RS1 << 1) + RS2)));
\ No newline at end of file diff --git a/riscv/insns/saddu.h b/riscv/insns/saddu.h new file mode 100644 index 00000000..dec16b84 --- /dev/null +++ b/riscv/insns/saddu.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +bool sat = false; +WRITE_RD(sat_addu<uint32_t>(RS1, RS2, sat));
\ No newline at end of file diff --git a/riscv/insns/sati.h b/riscv/insns/sati.h new file mode 100644 index 00000000..bf8c4702 --- /dev/null +++ b/riscv/insns/sati.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(P_SAT(insn.shamtd() + 1, (sreg_t)RS1)); diff --git a/riscv/insns/sati_rv32.h b/riscv/insns/sati_rv32.h new file mode 100644 index 00000000..a950d95c --- /dev/null +++ b/riscv/insns/sati_rv32.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_SAT(insn.shamtw() + 1, (sreg_t)RS1));
\ No newline at end of file diff --git a/riscv/insns/sha.h b/riscv/insns/sha.h new file mode 100644 index 00000000..fcec6249 --- /dev/null +++ b/riscv/insns/sha.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 64) + WRITE_RD(0); +else if (sshamt <= -64) + WRITE_RD((RS1 & 0x8000000000000000) ? 0xffffffffffffffff : 0); +else + WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : ((sreg_t)RS1 >> -sshamt)); diff --git a/riscv/insns/shar.h b/riscv/insns/shar.h new file mode 100644 index 00000000..f6348277 --- /dev/null +++ b/riscv/insns/shar.h @@ -0,0 +1,11 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 64) + WRITE_RD(0); +else if (sshamt <= -64) + WRITE_RD(0); +else + WRITE_RD(sshamt >= 0 ? (RS1 << sshamt) : (((sreg_t)RS1 >> -sshamt) + ((RS1 >> (-sshamt - 1)) & 1))); diff --git a/riscv/insns/shl.h b/riscv/insns/shl.h new file mode 100644 index 00000000..ef112422 --- /dev/null +++ b/riscv/insns/shl.h @@ -0,0 +1,15 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (sshamt < 0) { + if (sshamt <= -64) + WRITE_RD(0); + else + WRITE_RD(RS1 >> (-sshamt)); +} else { + if (sshamt >= 64) + WRITE_RD(0); + else + WRITE_RD(RS1 << sshamt); +} + diff --git a/riscv/insns/shlr.h b/riscv/insns/shlr.h new file mode 100644 index 00000000..29801fa9 --- /dev/null +++ b/riscv/insns/shlr.h @@ -0,0 +1,19 @@ +require_extension('P'); +require_rv64; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (sshamt < 0) { + __uint128_t shx; + if (sshamt < -64) + shx = 0; + else if (sshamt == -64) + shx = (RS1 >> 63) & 1; + else + shx = ((__uint128_t)RS1 << 1) >> (-sshamt); + WRITE_RD((uint64_t)((shx + 1) >> 1)); +} else { + if (sshamt >= 64) + WRITE_RD(0); + else + WRITE_RD(RS1 << sshamt); +} + diff --git a/riscv/insns/slx.h b/riscv/insns/slx.h new file mode 100644 index 00000000..a6eb3e9c --- /dev/null +++ b/riscv/insns/slx.h @@ -0,0 +1,16 @@ +require_extension('P'); +if(xlen == 64){ + int shamt = RS2 & 63; + if(shamt == 0){ + WRITE_RD((uint64_t)RD); + }else{ + WRITE_RD(((uint64_t)RS1 >> (64 - shamt)) | ((uint64_t)RD << shamt)); + } +}else{ + int shamt = (uint32_t)RS2 & 31; + if (shamt == 0) { + WRITE_RD(sext_xlen((uint32_t)RD)); + } else { + WRITE_RD(sext_xlen(((uint32_t)RS1 >> (32 - shamt)) | ((uint32_t)RD << shamt))); + } +} diff --git a/riscv/insns/srari.h b/riscv/insns/srari.h new file mode 100644 index 00000000..02fe3a23 --- /dev/null +++ b/riscv/insns/srari.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(insn.shamtd() ? ((sext_xlen(RS1) >> insn.shamtd()) + ((sext_xlen(RS1) >> (insn.shamtd() - 1)) & 1)) : RS1); diff --git a/riscv/insns/srari_rv32.h b/riscv/insns/srari_rv32.h new file mode 100644 index 00000000..25d4bee4 --- /dev/null +++ b/riscv/insns/srari_rv32.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(insn.shamtw() ? ((sext_xlen(RS1) >> insn.shamtw()) + ((sext_xlen(RS1) >> (insn.shamtw() - 1)) & 1)) : RS1);
\ No newline at end of file diff --git a/riscv/insns/srx.h b/riscv/insns/srx.h new file mode 100644 index 00000000..19460c74 --- /dev/null +++ b/riscv/insns/srx.h @@ -0,0 +1,16 @@ +require_extension('P'); +if(xlen == 64){ + int shamt = RS2 & 63; + if(shamt == 0){ + WRITE_RD((uint64_t)RD); + }else{ + WRITE_RD(((uint64_t)RS1 << (64 - shamt)) | ((uint64_t)RD >> shamt)); + } +}else{ + int shamt = (uint32_t)RS2 & 31; + if (shamt == 0) { + WRITE_RD(sext_xlen((uint32_t)RD)); + } else { + WRITE_RD(sext_xlen(((uint32_t)RS1 << (32 - shamt)) | ((uint32_t)RD >> shamt))); + } +} diff --git a/riscv/insns/ssh1sadd.h b/riscv/insns/ssh1sadd.h new file mode 100644 index 00000000..94cc264c --- /dev/null +++ b/riscv/insns/ssh1sadd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_SAT(xlen, sext_xlen((RS1 << 1) + RS2)));
\ No newline at end of file diff --git a/riscv/insns/ssha.h b/riscv/insns/ssha.h new file mode 100644 index 00000000..44f7c009 --- /dev/null +++ b/riscv/insns/ssha.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 32) { + WRITE_RD((RS1 & 0x80000000) ? 0x80000000 : 0x7fffffff); + P.VU.vxsat->write(1); +} +else if (sshamt <= -32) + WRITE_RD((RS1 & 0x80000000) ? 0xffffffff : 0); +else + WRITE_RD(sshamt >= 0 ? P_SAT(32, static_cast<sreg_t> (RS1) << sshamt) : (RS1 >> -sshamt));
\ No newline at end of file diff --git a/riscv/insns/sshar.h b/riscv/insns/sshar.h new file mode 100644 index 00000000..2ebea187 --- /dev/null +++ b/riscv/insns/sshar.h @@ -0,0 +1,13 @@ +require_extension('P'); +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (RS1 == 0) + WRITE_RD(0); +else if (sshamt >= 32) { + WRITE_RD((RS1 & 0x80000000) ? 0x80000000 : 0x7fffffff); + P.VU.vxsat->write(1); +} +else if (sshamt <= -32) + WRITE_RD(0); +else + WRITE_RD(sshamt >= 0 ? P_SAT(32, static_cast<sreg_t> (RS1) << sshamt) : ((RS1 >> -sshamt) + ((RS1 >> (-sshamt - 1)) & 1)));
\ No newline at end of file diff --git a/riscv/insns/sshl.h b/riscv/insns/sshl.h new file mode 100644 index 00000000..d2ba309d --- /dev/null +++ b/riscv/insns/sshl.h @@ -0,0 +1,18 @@ +require_extension('P'); +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (sshamt < 0) { + if (sshamt <= -32) + WRITE_RD(0); + else + WRITE_RD(RS1 >> (-sshamt)); +} else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)RS1 << 32) : ((uint64_t)RS1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + WRITE_RD(0xFFFFFFFF); + } else { + WRITE_RD((uint32_t)shx); + } +} + diff --git a/riscv/insns/sshlr.h b/riscv/insns/sshlr.h new file mode 100644 index 00000000..d36b0052 --- /dev/null +++ b/riscv/insns/sshlr.h @@ -0,0 +1,22 @@ +require_extension('P'); +require_rv32; +sreg_t sshamt = P_FIELD(RS2, 0, 8); +if (sshamt < 0) { + uint64_t shx; + if (sshamt < -32) + shx = 0; + else if (sshamt == -32) + shx = (RS1 >> 31) & 1; + else + shx = ((uint64_t)RS1 << 1) >> (-sshamt); + WRITE_RD((uint32_t)((shx + 1) >> 1)); +} else { + uint64_t shx = (sshamt >= 32) ? ((uint64_t)RS1 << 32) : ((uint64_t)RS1 << sshamt); + if (shx > 0xFFFFFFFFULL) { + P.VU.vxsat->write(1); + WRITE_RD(0xFFFFFFFF); + } else { + WRITE_RD((uint32_t)shx); + } +} + diff --git a/riscv/insns/sslai.h b/riscv/insns/sslai.h new file mode 100644 index 00000000..5db6ab1a --- /dev/null +++ b/riscv/insns/sslai.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_SAT(32, static_cast<sreg_t> (RS1) << insn.shamtw()));
\ No newline at end of file diff --git a/riscv/insns/ssub.h b/riscv/insns/ssub.h new file mode 100644 index 00000000..f3db9b4b --- /dev/null +++ b/riscv/insns/ssub.h @@ -0,0 +1,5 @@ +require_extension('P'); +require_rv32; +bool sat = false; +int32_t p_rd = sat_sub<int32_t, uint32_t>(RS1, RS2, sat); +WRITE_RD(p_rd);
\ No newline at end of file diff --git a/riscv/insns/ssubu.h b/riscv/insns/ssubu.h new file mode 100644 index 00000000..c4aac5d3 --- /dev/null +++ b/riscv/insns/ssubu.h @@ -0,0 +1,4 @@ +require_extension('P'); +require_rv32; +bool sat = false; +WRITE_RD(sat_subu<uint32_t>(RS1, RS2, sat));
\ No newline at end of file diff --git a/riscv/insns/subd.h b/riscv/insns/subd.h new file mode 100644 index 00000000..768c8d40 --- /dev/null +++ b/riscv/insns/subd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RS1_PAIR - P_RS2_PAIR);
\ No newline at end of file diff --git a/riscv/insns/unzip16hp.h b/riscv/insns/unzip16hp.h new file mode 100644 index 00000000..15e2088d --- /dev/null +++ b/riscv/insns/unzip16hp.h @@ -0,0 +1 @@ +P_UNZIP(16, 1) diff --git a/riscv/insns/unzip16p.h b/riscv/insns/unzip16p.h new file mode 100644 index 00000000..6a3b7a06 --- /dev/null +++ b/riscv/insns/unzip16p.h @@ -0,0 +1 @@ +P_UNZIP(16, 0) diff --git a/riscv/insns/unzip8hp.h b/riscv/insns/unzip8hp.h new file mode 100644 index 00000000..365e9831 --- /dev/null +++ b/riscv/insns/unzip8hp.h @@ -0,0 +1 @@ +P_UNZIP(8, 1) diff --git a/riscv/insns/unzip8p.h b/riscv/insns/unzip8p.h new file mode 100644 index 00000000..d9b52d52 --- /dev/null +++ b/riscv/insns/unzip8p.h @@ -0,0 +1 @@ +P_UNZIP(8, 0) diff --git a/riscv/insns/usati.h b/riscv/insns/usati.h new file mode 100644 index 00000000..f08e9df7 --- /dev/null +++ b/riscv/insns/usati.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv64; +WRITE_RD(P_USAT(insn.shamtd() + 1, (sreg_t)RS1)); diff --git a/riscv/insns/usati_rv32.h b/riscv/insns/usati_rv32.h new file mode 100644 index 00000000..84ba83a1 --- /dev/null +++ b/riscv/insns/usati_rv32.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_RD(P_USAT(insn.shamtw() + 1, (sreg_t)RS1));
\ No newline at end of file diff --git a/riscv/insns/wadd.h b/riscv/insns/wadd.h new file mode 100644 index 00000000..351c8648 --- /dev/null +++ b/riscv/insns/wadd.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1+RS2);
\ No newline at end of file diff --git a/riscv/insns/wadda.h b/riscv/insns/wadda.h new file mode 100644 index 00000000..7b011792 --- /dev/null +++ b/riscv/insns/wadda.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR+RS1+RS2);
\ No newline at end of file diff --git a/riscv/insns/waddau.h b/riscv/insns/waddau.h new file mode 100644 index 00000000..33500295 --- /dev/null +++ b/riscv/insns/waddau.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR((reg_t)P_RD_PAIR+(uint32_t)RS1+(uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/waddu.h b/riscv/insns/waddu.h new file mode 100644 index 00000000..e7b8c092 --- /dev/null +++ b/riscv/insns/waddu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(0ULL + (uint32_t)RS1 + (uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/wmacc.h b/riscv/insns/wmacc.h new file mode 100644 index 00000000..e416e857 --- /dev/null +++ b/riscv/insns/wmacc.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR+RS1*RS2);
\ No newline at end of file diff --git a/riscv/insns/wmaccsu.h b/riscv/insns/wmaccsu.h new file mode 100644 index 00000000..6f5be847 --- /dev/null +++ b/riscv/insns/wmaccsu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR((sreg_t)P_RD_PAIR+RS1*(uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/wmaccu.h b/riscv/insns/wmaccu.h new file mode 100644 index 00000000..bb84fc7a --- /dev/null +++ b/riscv/insns/wmaccu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR((reg_t)P_RD_PAIR+zext32(RS1)*zext32(RS2));
\ No newline at end of file diff --git a/riscv/insns/wmul.h b/riscv/insns/wmul.h new file mode 100644 index 00000000..67a1f1d3 --- /dev/null +++ b/riscv/insns/wmul.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1*RS2);
\ No newline at end of file diff --git a/riscv/insns/wmulsu.h b/riscv/insns/wmulsu.h new file mode 100644 index 00000000..4447070a --- /dev/null +++ b/riscv/insns/wmulsu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1*(uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/wmulu.h b/riscv/insns/wmulu.h new file mode 100644 index 00000000..ffd284b6 --- /dev/null +++ b/riscv/insns/wmulu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(zext32(RS1)*zext32(RS2));
\ No newline at end of file diff --git a/riscv/insns/wsla.h b/riscv/insns/wsla.h new file mode 100644 index 00000000..6f8a6451 --- /dev/null +++ b/riscv/insns/wsla.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1 << (RS2 & (64 - 1)));
\ No newline at end of file diff --git a/riscv/insns/wslai.h b/riscv/insns/wslai.h new file mode 100644 index 00000000..41675a2b --- /dev/null +++ b/riscv/insns/wslai.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1 << insn.shamtd());
\ No newline at end of file diff --git a/riscv/insns/wsll.h b/riscv/insns/wsll.h new file mode 100644 index 00000000..7aaf14f0 --- /dev/null +++ b/riscv/insns/wsll.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR((uint64_t)(uint32_t)RS1 << (RS2 & (64 - 1)));
\ No newline at end of file diff --git a/riscv/insns/wslli.h b/riscv/insns/wslli.h new file mode 100644 index 00000000..cf9c9bec --- /dev/null +++ b/riscv/insns/wslli.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR((uint64_t)(uint32_t)RS1 << insn.shamtd());
\ No newline at end of file diff --git a/riscv/insns/wsub.h b/riscv/insns/wsub.h new file mode 100644 index 00000000..ea3250df --- /dev/null +++ b/riscv/insns/wsub.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(RS1-RS2);
\ No newline at end of file diff --git a/riscv/insns/wsuba.h b/riscv/insns/wsuba.h new file mode 100644 index 00000000..ca81a9ca --- /dev/null +++ b/riscv/insns/wsuba.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR+RS1-RS2);
\ No newline at end of file diff --git a/riscv/insns/wsubau.h b/riscv/insns/wsubau.h new file mode 100644 index 00000000..e668a33a --- /dev/null +++ b/riscv/insns/wsubau.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(P_RD_PAIR+(uint32_t)RS1-(uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/wsubu.h b/riscv/insns/wsubu.h new file mode 100644 index 00000000..b8de8368 --- /dev/null +++ b/riscv/insns/wsubu.h @@ -0,0 +1,3 @@ +require_extension('P'); +require_rv32; +WRITE_P_RD_PAIR(0ULL + (uint32_t)RS1-(uint32_t)RS2);
\ No newline at end of file diff --git a/riscv/insns/wzip16p.h b/riscv/insns/wzip16p.h new file mode 100644 index 00000000..a73e4197 --- /dev/null +++ b/riscv/insns/wzip16p.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ZIP_LOOP(16, 16, { + p_rd = p_rs2 << 16 | p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/wzip8p.h b/riscv/insns/wzip8p.h new file mode 100644 index 00000000..bfcf04e0 --- /dev/null +++ b/riscv/insns/wzip8p.h @@ -0,0 +1,4 @@ +require_rv32; +P_WIDEN_RD_RS1_RS2_ZIP_LOOP(8, 8, { + p_rd = p_rs2 << 8 | p_rs1; +})
\ No newline at end of file diff --git a/riscv/insns/zip16hp.h b/riscv/insns/zip16hp.h new file mode 100644 index 00000000..4090fc5c --- /dev/null +++ b/riscv/insns/zip16hp.h @@ -0,0 +1,6 @@ +require_extension('P'); +require_rv64; +P_RD_RS1_RS2_ZIP_LOOP(16, 16, 16, 1, { + p_rd = i % 2 ? p_rs2 : p_rs1; +} +) diff --git a/riscv/insns/zip16p.h b/riscv/insns/zip16p.h new file mode 100644 index 00000000..0bb2e9c7 --- /dev/null +++ b/riscv/insns/zip16p.h @@ -0,0 +1,6 @@ +require_extension('P'); +require_rv64; +P_RD_RS1_RS2_ZIP_LOOP(16, 16, 16, 0, { + p_rd = i % 2 ? p_rs2 : p_rs1; +} +) diff --git a/riscv/insns/zip8hp.h b/riscv/insns/zip8hp.h new file mode 100644 index 00000000..9d323ef7 --- /dev/null +++ b/riscv/insns/zip8hp.h @@ -0,0 +1,5 @@ +require_extension('P'); +P_RD_RS1_RS2_ZIP_LOOP(8, 8, 8, 1, { + p_rd = i % 2 ? p_rs2 : p_rs1; +} +) diff --git a/riscv/insns/zip8p.h b/riscv/insns/zip8p.h new file mode 100644 index 00000000..7f00c7a7 --- /dev/null +++ b/riscv/insns/zip8p.h @@ -0,0 +1,5 @@ +require_extension('P'); +P_RD_RS1_RS2_ZIP_LOOP(8, 8, 8, 0, { + p_rd = i % 2 ? p_rs2 : p_rs1; +} +) diff --git a/riscv/overlap_list.h b/riscv/overlap_list.h index 253be457..bf9b72e7 100644 --- a/riscv/overlap_list.h +++ b/riscv/overlap_list.h @@ -32,3 +32,66 @@ DECLARE_OVERLAP_INSN(sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspush_x1, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_sspopchk_x5, EXT_ZICFISS) DECLARE_OVERLAP_INSN(c_mop_N, EXT_ZCMOP) + +// rv64p overlap rv32p +DECLARE_OVERLAP_INSN(paadd_w, 'P') +DECLARE_OVERLAP_INSN(paaddu_w, 'P') +DECLARE_OVERLAP_INSN(pasub_w, 'P') +DECLARE_OVERLAP_INSN(pasubu_w, 'P') +DECLARE_OVERLAP_INSN(psadd_w, 'P') +DECLARE_OVERLAP_INSN(psaddu_w, 'P') +DECLARE_OVERLAP_INSN(pssh1sadd_w, 'P') +DECLARE_OVERLAP_INSN(pssub_w, 'P') +DECLARE_OVERLAP_INSN(pssubu_w, 'P') +DECLARE_OVERLAP_INSN(psati_w, 'P') +DECLARE_OVERLAP_INSN(pusati_w, 'P') +DECLARE_OVERLAP_INSN(psrari_w, 'P') +DECLARE_OVERLAP_INSN(pssha_ws, 'P') +DECLARE_OVERLAP_INSN(psshar_ws, 'P') +DECLARE_OVERLAP_INSN(psslai_w, 'P') +DECLARE_OVERLAP_INSN(pmseq_w, 'P') +DECLARE_OVERLAP_INSN(pmslt_w, 'P') +DECLARE_OVERLAP_INSN(pmsltu_w, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmul_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmulh_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmulh_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmulhr_w, 'P') +DECLARE_OVERLAP_INSN(pmulhrsu_w, 'P') +DECLARE_OVERLAP_INSN(pmulhru_w, 'P') +DECLARE_OVERLAP_INSN(pmulhsu_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmulhsu_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmulq_w, 'P') +DECLARE_OVERLAP_INSN(pmulqr_w, 'P') +DECLARE_OVERLAP_INSN(pmulsu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmulsu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmulu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmacc_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmaccsu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmaccsu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmaccu_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmhacc_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w_h0, 'P') +DECLARE_OVERLAP_INSN(pmhaccsu_w_h1, 'P') +DECLARE_OVERLAP_INSN(pmhaccu_w, 'P') +DECLARE_OVERLAP_INSN(pmhracc_w, 'P') +DECLARE_OVERLAP_INSN(pmhraccsu_w, 'P') +DECLARE_OVERLAP_INSN(pmhraccu_w, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmqacc_w_h11, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h00, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h01, 'P') +DECLARE_OVERLAP_INSN(pmqracc_w_h11, 'P') +DECLARE_OVERLAP_INSN(psshl_ws, 'P') +DECLARE_OVERLAP_INSN(psshlr_ws, 'P') diff --git a/riscv/p_ext_macros.h b/riscv/p_ext_macros.h new file mode 100644 index 00000000..2501300f --- /dev/null +++ b/riscv/p_ext_macros.h @@ -0,0 +1,804 @@ +#ifndef _RISCV_P_EXT_MACROS_H_ +#define _RISCV_P_EXT_MACROS_H_ + +// rd temp +#define WRITE_P_RD() \ + rd_tmp = set_field(rd_tmp, make_mask64((i * sizeof(p_rd) * 8), sizeof(p_rd) * 8), p_rd); + +// Field +#define P_FIELD(R, INDEX, SIZE) \ + (type_sew_t<SIZE>::type)get_field(R, make_mask64(((INDEX) * SIZE), SIZE)) + +#define P_UFIELD(R, INDEX, SIZE) \ + (type_usew_t<SIZE>::type)get_field(R, make_mask64(((INDEX) * SIZE), SIZE)) + +// Params +#define P_RD_PARAMS(BIT) \ + auto p_rd = P_FIELD(rd_tmp, i, BIT); + +#define P_RD_UPARAMS(BIT) \ + auto p_rd = P_UFIELD(rd_tmp, i, BIT); + +#define P_RS1_PARAMS(BIT) \ + auto p_rs1 = P_FIELD(rs1, i, BIT); + +#define P_RS1_UPARAMS(BIT) \ + auto p_rs1 = P_UFIELD(rs1, i, BIT); + +#define P_RS1_INNER_PARAMS(BIT_INNER) \ + auto p_rs1 = P_FIELD(rs1, j, BIT_INNER); + +#define P_RS1_INNER_UPARAMS(BIT_INNER) \ + auto p_rs1 = P_UFIELD(rs1, j, BIT_INNER); + +#define P_RS1_EVEN_PARAMS(BIT) \ + auto p_rs1 = P_FIELD(rs1, i * 2, BIT); + +#define P_RS1_ODD_PARAMS(BIT) \ + auto p_rs1 = P_FIELD(rs1, i * 2 + 1, BIT); + +#define P_RS1_EVEN_UPARAMS(BIT) \ + auto p_rs1 = P_UFIELD(rs1, i * 2, BIT); + +#define P_RS1_ODD_UPARAMS(BIT) \ + auto p_rs1 = P_UFIELD(rs1, i * 2 + 1, BIT); + +#define P_RS1_ZIP_PARAMS(BIT) \ + auto p_rs1 = P_UFIELD(rs1, i / 2 + pos, BIT); + +#define P_RS2_PARAMS(BIT) \ + auto p_rs2 = P_FIELD(rs2, i, BIT); + +#define P_RS2_UPARAMS(BIT) \ + auto p_rs2 = P_UFIELD(rs2, i, BIT); + +#define P_RS2_CROSS_PARAMS(BIT) \ + auto p_rs2 = P_FIELD(rs2, (i ^ 1), BIT); + +#define P_RS2_CROSS_UPARAMS(BIT) \ + auto p_rs2 = P_UFIELD(rs2, (i ^ 1), BIT); + +#define P_RS2_INNER_PARAMS(BIT_INNER) \ + auto p_rs2 = P_FIELD(rs2, j, BIT_INNER); + +#define P_RS2_INNER_UPARAMS(BIT_INNER) \ + auto p_rs2 = P_UFIELD(rs2, j, BIT_INNER); + +#define P_RS2_INNER_CROSS_PARAMS(BIT_INNER) \ + auto p_rs2 = P_FIELD(rs2, (j ^ 1), BIT_INNER); + +#define P_RS2_EVEN_PARAMS(BIT) \ + auto p_rs2 = P_FIELD(rs2, i * 2, BIT); + +#define P_RS2_ODD_PARAMS(BIT) \ + auto p_rs2 = P_FIELD(rs2, i * 2 + 1, BIT); + +#define P_RS2_EVEN_UPARAMS(BIT) \ + auto p_rs2 = P_UFIELD(rs2, i * 2, BIT); + +#define P_RS2_ODD_UPARAMS(BIT) \ + auto p_rs2 = P_UFIELD(rs2, i * 2 + 1, BIT); + +#define P_RS2_ZIP_PARAMS(BIT) \ + auto p_rs2 = P_UFIELD(rs2, i / 2 + pos, BIT); + +// Loop base +#define P_RD_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = RD; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RD_RS1_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = RD; \ + reg_t rs1 = RS1; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RD_RS1_RS2_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = RD; \ + reg_t rs1 = RS1; \ + reg_t rs2 = RS2; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RS1_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rs1 = RS1; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + require_extension('P'); \ + require(BIT == e16 || BIT == e32 || BIT == e64); \ + reg_t rd_tmp = USE_RD ? zext_xlen(RD) : 0; \ + reg_t rs1 = zext_xlen(RS1); \ + reg_t rs2 = zext_xlen(RS2); \ + sreg_t len = 64 / BIT; \ + sreg_t len_inner = BIT / BIT_INNER; \ + for (sreg_t i = len - 1; i >= 0; --i) { \ + sreg_t p_res = P_FIELD(rd_tmp, i, BIT); \ + for (sreg_t j = i * len_inner; j < (i + 1) * len_inner; ++j) { + +#define P_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \ + require_extension('P'); \ + require(BIT == e16 || BIT == e32 || BIT == e64); \ + reg_t rd_tmp = USE_RD ? zext_xlen(RD) : 0; \ + reg_t rs1 = zext_xlen(RS1); \ + reg_t rs2 = zext_xlen(RS2); \ + sreg_t len = 64 / BIT; \ + sreg_t len_inner = BIT / BIT_INNER; \ + for (sreg_t i = len - 1; i >= 0; --i) { \ + sreg_t p_res = P_UFIELD(rd_tmp, i, BIT); \ + for (sreg_t j = i * len_inner; j < (i + 1) * len_inner; ++j) { + +#define P_WIDEN_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + require_extension('P'); \ + require(BIT == e16 || BIT == e32 || BIT == e64); \ + reg_t rd_tmp = USE_RD ? zext_xlen_pair(P_RD_PAIR) : 0; \ + reg_t rs1 = zext_xlen(RS1); \ + reg_t rs2 = zext_xlen(RS2); \ + sreg_t len_inner = BIT / BIT_INNER; \ + sreg_t p_res = P_FIELD(rd_tmp, 0, BIT * 2); \ + for (sreg_t j = len_inner - 1; j >= 0 ; --j) { + +#define P_WIDEN_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \ + require_extension('P'); \ + require(BIT == e16 || BIT == e32 || BIT == e64); \ + reg_t rd_tmp = USE_RD ? zext_xlen_pair(P_RD_PAIR) : 0; \ + reg_t rs1 = zext_xlen(RS1); \ + reg_t rs2 = zext_xlen(RS2); \ + sreg_t len_inner = BIT / BIT_INNER; \ + sreg_t p_res = P_UFIELD(rd_tmp, 0, BIT * 2); \ + for (sreg_t j = 0; j < len_inner; ++j) { + +#define P_RD_DW_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + sreg_t len = xlen / (BIT) * 2; \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RD_RS1_DW_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + reg_t rs1 = P_RS1_PAIR; \ + sreg_t len = xlen / (BIT) * 2; \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RS1_DW_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rs1 = P_RS1_PAIR; \ + sreg_t len = xlen / (BIT) * 2; \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_WIDEN_RD_RS1_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + reg_t rs1 = RS1; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_WIDEN_RD_RS1_RS2_ZIP_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + reg_t rs1 = RS1; \ + reg_t rs2 = RS2; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_WIDEN_RD_RS1_RS2_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + reg_t rs1 = RS1; \ + reg_t rs2 = RS2; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RD_RS1_RS2_DW_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = P_RD_PAIR; \ + reg_t rs1 = P_RS1_PAIR; \ + reg_t rs2 = P_RS2_PAIR; \ + sreg_t len = xlen / (BIT) * 2; \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_NARROW_RD_RS1_LOOP_BASE(BIT) \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = RD; \ + reg_t rs1 = P_RS1_PAIR; \ + sreg_t len = xlen / (BIT); \ + for (sreg_t i = len - 1; i >= 0; --i) { + +#define P_RD_RS1_RS2_ZIP_LOOP_BASE(BIT, POS) \ + require_rv64; \ + require_extension('P'); \ + require((BIT) == e8 || (BIT) == e16 || (BIT) == e32); \ + reg_t rd_tmp = RD; \ + reg_t rs1 = RS1; \ + reg_t rs2 = RS2; \ + sreg_t len = xlen / (BIT); \ + sreg_t pos = POS * len / 2; \ + for (sreg_t i = len - 1; i >= 0; --i) { + +// Loop body +#define P_RD_LOOP_BODY(BIT, BODY) { \ + P_RD_PARAMS(BIT) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RS1_LOOP_BODY(BIT_RS1, BODY) { \ + P_RS1_PARAMS(BIT_RS1) \ + BODY \ +} + +#define P_RS1_ULOOP_BODY(BIT_RS1, BODY) { \ + P_RS1_UPARAMS(BIT_RS1) \ + BODY \ +} + +#define P_RD_RS1_LOOP_BODY(BIT_RD, BIT_RS1, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_ULOOP_BODY(BIT_RD, BIT_RS1, BODY) { \ + P_RD_UPARAMS(BIT_RD) \ + P_RS1_UPARAMS(BIT_RS1) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_UPARAMS(BIT_RD) \ + P_RS1_UPARAMS(BIT_RS1) \ + P_RS2_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_CROSS_LOOP_BODY(BIT, BODY) { \ + P_RD_PARAMS(BIT) \ + P_RS1_PARAMS(BIT) \ + P_RS2_CROSS_PARAMS(BIT) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_CROSS_ULOOP_BODY(BIT, BODY) { \ + P_RD_UPARAMS(BIT) \ + P_RS1_UPARAMS(BIT) \ + P_RS2_CROSS_UPARAMS(BIT) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_EE_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_EVEN_PARAMS(BIT_RS1) \ + P_RS2_EVEN_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_EO_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_EVEN_PARAMS(BIT_RS1) \ + P_RS2_ODD_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_OO_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_ODD_PARAMS(BIT_RS1) \ + P_RS2_ODD_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_EE_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_UPARAMS(BIT_RD) \ + P_RS1_EVEN_UPARAMS(BIT_RS1) \ + P_RS2_EVEN_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_EO_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_UPARAMS(BIT_RD) \ + P_RS1_EVEN_UPARAMS(BIT_RS1) \ + P_RS2_ODD_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_OO_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_UPARAMS(BIT_RD) \ + P_RS1_ODD_UPARAMS(BIT_RS1) \ + P_RS2_ODD_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_EE_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_EVEN_PARAMS(BIT_RS1) \ + P_RS2_EVEN_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_OO_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_ODD_PARAMS(BIT_RS1) \ + P_RS2_ODD_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_E_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_EVEN_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_O_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_ODD_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_E_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_EVEN_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_O_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_PARAMS(BIT_RS1) \ + P_RS2_ODD_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_WIDEN_RD_RS1_RS2_ZIP_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_UPARAMS(BIT_RS1) \ + P_RS2_UPARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +#define P_RD_RS1_RS2_ZIP_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) { \ + P_RD_PARAMS(BIT_RD) \ + P_RS1_ZIP_PARAMS(BIT_RS1) \ + P_RS2_ZIP_PARAMS(BIT_RS2) \ + BODY \ + WRITE_P_RD(); \ +} + +// Loop end +#define P_RD_LOOP_END() \ + } \ + WRITE_RD(sext_xlen(rd_tmp)); + +#define P_REDUCTION_LOOP_END(BIT, IS_SAT) \ + } \ + if (IS_SAT) { \ + p_res = P_SAT(BIT, p_res); \ + } \ + type_usew_t<BIT>::type p_rd = p_res; \ + WRITE_P_RD(); \ + } \ + WRITE_RD(sext_xlen(rd_tmp)); + +#define P_REDUCTION_ULOOP_END(BIT, IS_SAT) \ + } \ + type_usew_t<BIT>::type p_rd = p_res; \ + WRITE_P_RD(); \ + } \ + WRITE_RD(sext_xlen(rd_tmp)); + +#define P_REDUCTION_DW_LOOP_END(BIT, IS_SAT) \ + } \ + if (IS_SAT) { \ + p_res = P_SAT(BIT * 2, p_res); \ + } \ + WRITE_P_RD_PAIR(p_res); + +#define P_RD_DW_LOOP_END() \ + } \ + WRITE_P_RD_PAIR(rd_tmp); + +// Loop +#define P_RD_LOOP(BIT_RD, BODY) \ + P_RD_LOOP_BASE(BIT_RD) \ + P_RD_LOOP_BODY(BIT_RD, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_LOOP(BIT_RD, BIT_RS1, BODY) \ + P_RD_RS1_LOOP_BASE(BIT_RD) \ + P_RD_RS1_LOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_ULOOP(BIT_RD, BIT_RS1, BODY) \ + P_RD_RS1_LOOP_BASE(BIT_RD) \ + P_RD_RS1_ULOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_ULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_SULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_CROSS_LOOP(BIT, BODY1, BODY2) \ + P_RD_RS1_RS2_LOOP_BASE(BIT) \ + P_CROSS_LOOP_BODY(BIT, BODY1) \ + --i; \ + if (sizeof(#BODY2) == 1) { \ + P_CROSS_LOOP_BODY(BIT, BODY1) \ + } \ + else { \ + P_CROSS_LOOP_BODY(BIT, BODY2) \ + } \ + P_RD_LOOP_END() + +#define P_CROSS_ULOOP(BIT, BODY1, BODY2) \ + P_RD_RS1_RS2_LOOP_BASE(BIT) \ + P_CROSS_ULOOP_BODY(BIT, BODY1) \ + --i; \ + if (sizeof(#BODY2) == 1) { \ + P_CROSS_ULOOP_BODY(BIT, BODY1) \ + } \ + else { \ + P_CROSS_ULOOP_BODY(BIT, BODY2) \ + } \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_ZIP_LOOP(BIT_RD, BIT_RS1, BIT_RS2, POS, BODY) \ + P_RD_RS1_RS2_ZIP_LOOP_BASE(BIT_RD, POS) \ + P_RD_RS1_RS2_ZIP_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_UNZIP(BIT, HIGH) \ + require_rv64; \ + require_extension('P'); \ + require(BIT == e8 || BIT == e16); \ + reg_t rd_tmp = 0; \ + for (sreg_t i = 0; i < xlen / BIT / 2; i++) { \ + rd_tmp = set_field(rd_tmp, make_mask64(i * BIT, BIT), \ + P_UFIELD(RS1, i * 2 + HIGH, BIT)); \ + rd_tmp = set_field(rd_tmp, make_mask64(i * BIT + xlen / 2, BIT), \ + P_UFIELD(RS2, i * 2 + HIGH, BIT)); \ + } \ + WRITE_RD(sext_xlen(rd_tmp)); + +#define P_RD_RS1_RS2_EE_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_EE_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_EO_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_EO_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_OO_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_OO_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_EE_ULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_EE_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_EO_ULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_EO_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_OO_ULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_OO_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_EE_SULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_EE_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_OO_SULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_OO_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_E_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_E_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_O_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_O_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_E_SULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_E_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_RD_RS1_RS2_O_SULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_O_SULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_LOOP_END() + +#define P_REDUCTION_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_PARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_LOOP_END(BIT, IS_SAT) + +#define P_REDUCTION_SULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_UPARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_LOOP_END(BIT, IS_SAT) + +#define P_REDUCTION_ULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_UPARAMS(BIT_INNER) \ + P_RS2_INNER_UPARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_ULOOP_END(BIT, IS_SAT) + +#define P_REDUCTION_CROSS_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_CROSS_PARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_LOOP_END(BIT, IS_SAT) + +#define P_RD_DW_LOOP(BIT_RD, BODY) \ + P_RD_DW_LOOP_BASE(BIT_RD) \ + P_RD_LOOP_BODY(BIT_RD, BODY) \ + P_RD_DW_LOOP_END() + +#define P_RD_RS1_DW_LOOP(BIT_RD, BIT_RS1, BODY) \ + P_RD_RS1_DW_LOOP_BASE(BIT_RD) \ + P_RD_RS1_LOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_DW_LOOP_END() + +#define P_RS1_DW_LOOP(BIT_RS1, BODY) \ + P_RS1_DW_LOOP_BASE(BIT_RS1) \ + P_RS1_LOOP_BODY(BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_RS1_DW_ULOOP(BIT_RS1, BODY) \ + P_RS1_DW_LOOP_BASE(BIT_RS1) \ + P_RS1_ULOOP_BODY(BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_WIDEN_RD_RS1_LOOP(BIT_RS1, BODY) \ + P_WIDEN_RD_RS1_LOOP_BASE(BIT_RS1) \ + P_RD_RS1_LOOP_BODY((BIT_RS1) * 2, BIT_RS1, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_RD_RS1_ULOOP(BIT_RS1, BODY) \ + P_WIDEN_RD_RS1_LOOP_BASE(BIT_RS1) \ + P_RD_RS1_ULOOP_BODY((BIT_RS1) * 2, BIT_RS1, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_RD_RS1_RS2_ZIP_LOOP(BIT_RS1, BIT_RS2, BODY) \ + P_WIDEN_RD_RS1_RS2_ZIP_LOOP_BASE(BIT_RS1) \ + P_WIDEN_RD_RS1_RS2_ZIP_LOOP_BODY((BIT_RS1 * 2), BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_RD_RS1_RS2_LOOP(BIT_RS1, BIT_RS2, BODY) \ + P_WIDEN_RD_RS1_RS2_LOOP_BASE(BIT_RS1) \ + P_RD_RS1_RS2_LOOP_BODY((BIT_RS1) * 2, BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_RD_RS1_RS2_ULOOP(BIT_RS1, BIT_RS2, BODY) \ + P_WIDEN_RD_RS1_RS2_LOOP_BASE(BIT_RS1) \ + P_RD_RS1_RS2_ULOOP_BODY((BIT_RS1) * 2, BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_RD_RS1_RS2_SULOOP(BIT_RS1, BIT_RS2, BODY) \ + P_WIDEN_RD_RS1_RS2_LOOP_BASE(BIT_RS1) \ + P_RD_RS1_RS2_SULOOP_BODY((BIT_RS1) * 2, BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_WIDEN_REDUCTION_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_WIDEN_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_PARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_DW_LOOP_END(BIT, IS_SAT) + +#define P_WIDEN_REDUCTION_ULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_WIDEN_REDUCTION_ULOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_UPARAMS(BIT_INNER) \ + P_RS2_INNER_UPARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_DW_LOOP_END(BIT, IS_SAT) + +#define P_WIDEN_REDUCTION_SULOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_WIDEN_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_UPARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_DW_LOOP_END(BIT, IS_SAT) + +#define P_WIDEN_REDUCTION_CROSS_LOOP(BIT, BIT_INNER, USE_RD, IS_SAT, BODY) \ + P_WIDEN_REDUCTION_LOOP_BASE(BIT, BIT_INNER, USE_RD) \ + P_RS1_INNER_PARAMS(BIT_INNER) \ + P_RS2_INNER_CROSS_PARAMS(BIT_INNER) \ + BODY \ + P_REDUCTION_DW_LOOP_END(BIT, IS_SAT) + +#define P_RD_RS1_DW_LOOP(BIT_RD, BIT_RS1, BODY) \ + P_RD_RS1_DW_LOOP_BASE(BIT_RD) \ + P_RD_RS1_LOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_DW_LOOP_END() + +#define P_RD_RS1_DW_ULOOP(BIT_RD, BIT_RS1, BODY) \ + P_RD_RS1_DW_LOOP_BASE(BIT_RD) \ + P_RD_RS1_ULOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_DW_LOOP_END() + +#define P_RD_RS1_RS2_DW_LOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_DW_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_LOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_RD_RS1_RS2_DW_ULOOP(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_RS1_RS2_DW_LOOP_BASE(BIT_RD) \ + P_RD_RS1_RS2_ULOOP_BODY(BIT_RD, BIT_RS1, BIT_RS2, BODY) \ + P_RD_DW_LOOP_END() + +#define P_NARROW_RD_RS1_LOOP(BIT_RD, BIT_RS1, BODY) \ + P_NARROW_RD_RS1_LOOP_BASE(BIT_RD) \ + P_RD_RS1_LOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_NARROW_RD_RS1_ULOOP(BIT_RD, BIT_RS1, BODY) \ + P_NARROW_RD_RS1_LOOP_BASE(BIT_RD) \ + P_RD_RS1_ULOOP_BODY(BIT_RD, BIT_RS1, BODY) \ + P_RD_LOOP_END() + +#define P_CROSS_DW_LOOP(BIT, BODY1, BODY2) \ + P_RD_RS1_RS2_DW_LOOP_BASE(BIT) \ + P_CROSS_LOOP_BODY(BIT, BODY1) \ + --i; \ + if (sizeof(#BODY2) == 1) { \ + P_CROSS_LOOP_BODY(BIT, BODY1) \ + } \ + else { \ + P_CROSS_LOOP_BODY(BIT, BODY2) \ + } \ + P_RD_DW_LOOP_END() + +#define P_CROSS_DW_ULOOP(BIT, BODY1, BODY2) \ + P_RD_RS1_RS2_DW_LOOP_BASE(BIT) \ + P_CROSS_ULOOP_BODY(BIT, BODY1) \ + --i; \ + if (sizeof(#BODY2) == 1) { \ + P_CROSS_ULOOP_BODY(BIT, BODY1) \ + } \ + else { \ + P_CROSS_ULOOP_BODY(BIT, BODY2) \ + } \ + P_RD_DW_LOOP_END() + +// Misc +#define P_SAT(BIT, R) ({ \ + sreg_t _psat_in = (R); \ + sreg_t _psat_out; \ + if ((BIT) == 64) _psat_out = _psat_in; \ + else if (_psat_in > (sreg_t)((reg_t(1) << ((BIT) - 1)) - 1)) _psat_out = (sreg_t)((reg_t(1) << ((BIT) - 1)) - 1); \ + else if (_psat_in < (sreg_t)(reg_t(-1) << ((BIT) - 1))) _psat_out = (sreg_t)(reg_t(-1) << ((BIT) - 1)); \ + else _psat_out = _psat_in; \ + if (_psat_out != _psat_in) P.VU.vxsat->write(1); \ + _psat_out; \ +}) + +#define P_USAT(BIT, R) ({ \ + sreg_t _pusat_in = (R); \ + sreg_t _pusat_out; \ + if (_pusat_in < 0) _pusat_out = 0; \ + else if ((BIT) == 64) _pusat_out = _pusat_in; \ + else if (_pusat_in > (sreg_t)((reg_t(1) << ((BIT) - 1)) - 1)) _pusat_out = (sreg_t)((reg_t(1) << ((BIT) - 1)) - 1); \ + else _pusat_out = _pusat_in; \ + if (_pusat_out != _pusat_in) P.VU.vxsat->write(1); \ + _pusat_out; \ +}) + +#define P_USAT_FULL(BIT, R) ({ \ + sreg_t _pusatf_in = (R); \ + sreg_t _pusatf_out; \ + if (_pusatf_in < 0) _pusatf_out = 0; \ + else if ((BIT) >= 64) _pusatf_out = _pusatf_in; \ + else if (_pusatf_in > (sreg_t)((reg_t(1) << (BIT)) - 1)) _pusatf_out = (sreg_t)((reg_t(1) << (BIT)) - 1); \ + else _pusatf_out = _pusatf_in; \ + if (_pusatf_out != _pusatf_in) P.VU.vxsat->write(1); \ + _pusatf_out; \ +}) + +#define P_PACK(BIT, X, Y) \ + require_extension('P'); \ + require(BIT == e8 || BIT == e16 || BIT == e32); \ + reg_t rd_tmp = 0; \ + for (sreg_t i = 0; i < xlen / BIT / 2; i++) { \ + rd_tmp = set_field(rd_tmp, make_mask64((i * 2 + 1) * BIT, BIT), \ + P_UFIELD(RS2, i * 2 + Y, BIT)); \ + rd_tmp = set_field(rd_tmp, make_mask64(i * 2 * BIT, BIT), \ + P_UFIELD(RS1, i * 2 + X, BIT)); \ + } \ + WRITE_RD(sext_xlen(rd_tmp)); + +#define P_PACK_DW(BIT, X, Y) \ + require_extension('P'); \ + require(BIT == e8 || BIT == e16); \ + reg_t rd_tmp = 0, rs1 = P_RS1_PAIR, rs2 = P_RS2_PAIR; \ + for (sreg_t i = 0; i < 64 / BIT / 2; i++) { \ + rd_tmp = set_field(rd_tmp, make_mask64((i * 2 + 1) * BIT, BIT), \ + P_UFIELD(rs2, i * 2 + Y, BIT)); \ + rd_tmp = set_field(rd_tmp, make_mask64(i * 2 * BIT, BIT), \ + P_UFIELD(rs1, i * 2 + X, BIT)); \ + } \ + WRITE_P_RD_PAIR(rd_tmp); + +#endif
\ No newline at end of file diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index a996b889..b44fc288 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1150,6 +1150,616 @@ riscv_insn_ext_zvzip = \ vpaire_vv \ vpairo_vv \ +riscv_insn_ext_p = \ + pli_b \ + pli_h \ + plui_h \ + padd_bs \ + padd_hs \ + padd_b \ + padd_h \ + psub_b \ + psub_h \ + psadd_b \ + psadd_h \ + sadd \ + psaddu_b \ + psaddu_h \ + saddu \ + pssub_b \ + pssub_h \ + ssub \ + pssubu_b \ + pssubu_h \ + ssubu \ + paadd_b \ + paadd_h \ + aadd \ + paaddu_b \ + paaddu_h \ + aaddu \ + pasub_b \ + pasub_h \ + asub \ + pasubu_b \ + pasubu_h \ + asubu \ + psh1add_h \ + pssh1sadd_h \ + ssh1sadd \ + pas_hx \ + psa_hx \ + psas_hx \ + pssa_hx \ + paas_hx \ + pasa_hx \ + pabd_b \ + pabd_h \ + pabdu_b \ + pabdu_h \ + psabs_b \ + psabs_h \ + predsum_bs \ + predsum_hs \ + predsumu_bs \ + predsumu_hs \ + pabdsumu_b \ + pabdsumau_b \ + psext_h_b \ + psati_h \ + sati \ + sati_rv32 \ + pusati_h \ + usati \ + usati_rv32 \ + pslli_b \ + pslli_h \ + psll_bs \ + psll_hs \ + psrli_b \ + psrli_h \ + psrl_bs \ + psrl_hs \ + psrai_b \ + psrai_h \ + psra_bs \ + psra_hs \ + psslai_h \ + psrari_h \ + pssha_hs \ + psshar_hs \ + sslai \ + srari \ + srari_rv32 \ + ssha \ + sshar \ + pmin_b \ + pmin_h \ + pminu_b \ + pminu_h \ + pmax_b \ + pmax_h \ + pmaxu_b \ + pmaxu_h \ + pmseq_b \ + pmseq_h \ + mseq \ + pmslt_b \ + pmslt_h \ + mslt \ + pmsltu_b \ + pmsltu_h \ + msltu \ + ppaire_b \ + ppaireo_b \ + ppaireo_h \ + ppairoe_b \ + ppairoe_h \ + ppairo_b \ + ppairo_h \ + abs \ + cls \ + slx \ + srx \ + mvm \ + mvmn \ + merge \ + pmulh_h \ + pmulhr_h \ + pmulhsu_h \ + pmulhrsu_h \ + pmulhu_h \ + pmulhru_h \ + pmulq_h \ + pmulqr_h \ + mulhr \ + mulhrsu \ + mulhru \ + mulq \ + mulqr \ + pmul_h_b00 \ + pmul_h_b01 \ + pmul_h_b11 \ + pmulsu_h_b00 \ + pmulsu_h_b11 \ + pmulu_h_b00 \ + pmulu_h_b01 \ + pmulu_h_b11 \ + mul_h00 \ + mul_h01 \ + mul_h11 \ + mulsu_h00 \ + mulsu_h11 \ + mulu_h00 \ + mulu_h01 \ + mulu_h11 \ + pmulh_h_b0 \ + pmulh_h_b1 \ + pmulhsu_h_b0 \ + pmulhsu_h_b1 \ + mulh_h0 \ + mulh_h1 \ + mulhsu_h0 \ + mulhsu_h1 \ + pmhacc_h \ + pmhracc_h \ + pmhaccsu_h \ + pmhraccsu_h \ + pmhaccu_h \ + pmhraccu_h \ + mhacc \ + mhracc \ + mhaccsu \ + mhraccsu \ + mhaccu \ + mhraccu \ + mqacc_h00 \ + mqacc_h01 \ + mqacc_h11 \ + mqracc_h00 \ + mqracc_h01 \ + mqracc_h11 \ + macc_h00 \ + macc_h01 \ + macc_h11 \ + maccsu_h00 \ + maccsu_h11 \ + maccu_h00 \ + maccu_h01 \ + maccu_h11 \ + pmhacc_h_b0 \ + pmhacc_h_b1 \ + pmhaccsu_h_b0 \ + pmhaccsu_h_b1 \ + mhacc_h0 \ + mhacc_h1 \ + mhaccsu_h0 \ + mhaccsu_h1 \ + pmq2add_h \ + pmq2adda_h \ + pmqr2add_h \ + pmqr2adda_h \ + pm2add_h \ + pm2adda_h \ + pm2addsu_h \ + pm2addasu_h \ + pm2addu_h \ + pm2addau_h \ + pm2add_hx \ + pm2adda_hx \ + pm2sadd_h \ + pm2sadd_hx \ + pm2sub_h \ + pm2suba_h \ + pm2sub_hx \ + pm2suba_hx \ + pm4add_b \ + pm4adda_b \ + pm4addsu_b \ + pm4addasu_b \ + pm4addu_b \ + pm4addau_b \ + pli_db \ + pli_dh \ + plui_dh \ + pwadd_b \ + pwadd_h \ + wadd \ + pwadda_b \ + pwadda_h \ + wadda \ + pwaddu_b \ + pwaddu_h \ + waddu \ + pwaddau_b \ + pwaddau_h \ + waddau \ + pwsub_b \ + pwsub_h \ + wsub \ + pwsuba_b \ + pwsuba_h \ + wsuba \ + pwsubu_b \ + pwsubu_h \ + wsubu \ + pwsubau_b \ + pwsubau_h \ + wsubau \ + padd_db \ + padd_dh \ + padd_dw \ + psub_db \ + psub_dh \ + psub_dw \ + psadd_db \ + psadd_dh \ + psadd_dw \ + psaddu_db \ + psaddu_dh \ + psaddu_dw \ + pssub_db \ + pssub_dh \ + pssub_dw \ + pssubu_db \ + pssubu_dh \ + pssubu_dw \ + paadd_db \ + paadd_dh \ + paadd_dw \ + paaddu_db \ + paaddu_dh \ + paaddu_dw \ + pasub_db \ + pasub_dh \ + pasub_dw \ + pasubu_db \ + pasubu_dh \ + pasubu_dw \ + psh1add_dh \ + psh1add_dw \ + pssh1sadd_dh \ + pssh1sadd_dw \ + addd \ + subd \ + padd_dbs \ + padd_dhs \ + padd_dws \ + pas_dhx \ + psa_dhx \ + psas_dhx \ + pssa_dhx \ + paas_dhx \ + pasa_dhx \ + pabd_db \ + pabd_dh \ + pabdu_db \ + pabdu_dh \ + psabs_db \ + psabs_dh \ + predsum_dbs \ + predsum_dhs \ + predsumu_dbs \ + predsumu_dhs \ + psext_dh_b \ + psext_dw_b \ + psext_dw_h \ + psati_dh \ + psati_dw \ + pusati_dh \ + pusati_dw \ + pslli_db \ + pslli_dh \ + pslli_dw \ + psrli_db \ + psrli_dh \ + psrli_dw \ + psrai_db \ + psrai_dh \ + psrai_dw \ + psslai_dh \ + psslai_dw \ + psrari_dh \ + psrari_dw \ + psll_dbs \ + psll_dhs \ + psll_dws \ + psrl_dbs \ + psrl_dhs \ + psrl_dws \ + psra_dbs \ + psra_dhs \ + psra_dws \ + pssha_dhs \ + pssha_dws \ + psshar_dhs \ + psshar_dws \ + pwslli_b \ + pwslli_h \ + wslli \ + pwsll_bs \ + pwsll_hs \ + wsll \ + pwslai_b \ + pwslai_h \ + wslai \ + pwsla_bs \ + pwsla_hs \ + wsla \ + pmin_db \ + pmin_dh \ + pmin_dw \ + pminu_db \ + pminu_dh \ + pminu_dw \ + pmax_db \ + pmax_dh \ + pmax_dw \ + pmaxu_db \ + pmaxu_dh \ + pmaxu_dw \ + pmseq_db \ + pmseq_dh \ + pmseq_dw \ + pmslt_db \ + pmslt_dh \ + pmslt_dw \ + pmsltu_db \ + pmsltu_dh \ + pmsltu_dw \ + ppaire_db \ + ppaire_dh \ + ppaireo_db \ + ppaireo_dh \ + ppairoe_db \ + ppairoe_dh \ + ppairo_db \ + ppairo_dh \ + wzip8p \ + wzip16p \ + pnsrli_b \ + pnsrli_h \ + nsrli \ + pnsrl_bs \ + pnsrl_hs \ + nsrl \ + pnsrai_b \ + pnsrai_h \ + nsrai \ + pnsra_bs \ + pnsra_hs \ + nsra \ + pnsrari_b \ + pnsrari_h \ + nsrari \ + pnsrar_bs \ + pnsrar_hs \ + nsrar \ + pnclipi_b \ + pnclipi_h \ + nclipi \ + pnclip_bs \ + pnclip_hs \ + nclip \ + pnclipri_b \ + pnclipri_h \ + nclipri \ + pnclipr_bs \ + pnclipr_hs \ + nclipr \ + pnclipiu_b \ + pnclipiu_h \ + nclipiu \ + pnclipu_bs \ + pnclipu_hs \ + nclipu \ + pnclipriu_b \ + pnclipriu_h \ + nclipriu \ + pnclipru_bs \ + pnclipru_hs \ + nclipru \ + pwmul_b \ + pwmul_h \ + wmul \ + pwmulsu_b \ + pwmulsu_h \ + wmulsu \ + pwmulu_b \ + pwmulu_h \ + wmulu \ + pmqwacc_h \ + mqwacc \ + pmqrwacc_h \ + mqrwacc \ + pwmacc_h \ + wmacc \ + pwmaccsu_h \ + wmaccsu \ + pwmaccu_h \ + wmaccu \ + pm2wadd_h \ + pm2wadda_h \ + pm2waddsu_h \ + pm2waddasu_h \ + pm2waddu_h \ + pm2waddau_h \ + pm2wadd_hx \ + pm2wadda_hx \ + pm2wsub_h \ + pm2wsuba_h \ + pm2wsub_hx \ + pm2wsuba_hx \ + pli_w \ + plui_w \ + paadd_w \ + paaddu_w \ + padd_w \ + padd_ws \ + pasub_w \ + pasubu_w \ + psadd_w \ + psaddu_w \ + psh1add_w \ + pssh1sadd_w \ + pssub_w \ + pssubu_w \ + psub_w \ + paas_wx \ + pas_wx \ + pasa_wx \ + psa_wx \ + psas_wx \ + pssa_wx \ + predsum_ws \ + predsumu_ws \ + psati_w \ + psext_w_b \ + psext_w_h \ + pusati_w \ + psll_ws \ + pslli_w \ + psra_ws \ + psrai_w \ + psrari_w \ + psrl_ws \ + psrli_w \ + pssha_ws \ + psshar_ws \ + psslai_w \ + sha \ + shar \ + pmax_w \ + pmaxu_w \ + pmin_w \ + pminu_w \ + pmseq_w \ + pmslt_w \ + pmsltu_w \ + ppaire_h \ + ppaireo_w \ + ppairo_w \ + ppairoe_w \ + rev \ + rev16 \ + rev_rv32 \ + unzip16hp \ + unzip16p \ + unzip8hp \ + unzip8p \ + zip16hp \ + zip16p \ + zip8hp \ + zip8p \ + absw \ + clsw \ + mul_w00 \ + mul_w01 \ + mul_w11 \ + mulsu_w00 \ + mulsu_w11 \ + mulu_w00 \ + mulu_w01 \ + mulu_w11 \ + pmul_w_h00 \ + pmul_w_h01 \ + pmul_w_h11 \ + pmulh_w \ + pmulh_w_h0 \ + pmulh_w_h1 \ + pmulhr_w \ + pmulhrsu_w \ + pmulhru_w \ + pmulhsu_w \ + pmulhsu_w_h0 \ + pmulhsu_w_h1 \ + pmulhu_w \ + pmulq_w \ + pmulqr_w \ + pmulsu_w_h00 \ + pmulsu_w_h11 \ + pmulu_w_h00 \ + pmulu_w_h01 \ + pmulu_w_h11 \ + macc_w00 \ + macc_w01 \ + macc_w11 \ + maccsu_w00 \ + maccsu_w11 \ + maccu_w00 \ + maccu_w01 \ + maccu_w11 \ + mqacc_w00 \ + mqacc_w01 \ + mqacc_w11 \ + mqracc_w00 \ + mqracc_w01 \ + mqracc_w11 \ + pmacc_w_h00 \ + pmacc_w_h01 \ + pmacc_w_h11 \ + pmaccsu_w_h00 \ + pmaccsu_w_h11 \ + pmaccu_w_h00 \ + pmaccu_w_h01 \ + pmaccu_w_h11 \ + pmhacc_w \ + pmhacc_w_h0 \ + pmhacc_w_h1 \ + pmhaccsu_w \ + pmhaccsu_w_h0 \ + pmhaccsu_w_h1 \ + pmhaccu_w \ + pmhracc_w \ + pmhraccsu_w \ + pmhraccu_w \ + pmqacc_w_h00 \ + pmqacc_w_h01 \ + pmqacc_w_h11 \ + pmqracc_w_h00 \ + pmqracc_w_h01 \ + pmqracc_w_h11 \ + pm2add_w \ + pm2add_wx \ + pm2adda_w \ + pm2adda_wx \ + pm2addasu_w \ + pm2addau_w \ + pm2addsu_w \ + pm2addu_w \ + pm2sub_w \ + pm2sub_wx \ + pm2suba_w \ + pm2suba_wx \ + pm4add_h \ + pm4adda_h \ + pm4addasu_h \ + pm4addau_h \ + pm4addsu_h \ + pm4addu_h \ + pmq2add_w \ + pmq2adda_w \ + pmqr2add_w \ + pmqr2adda_w \ + sshl \ + sshlr \ + shl \ + shlr \ + psshl_hs \ + psshlr_hs \ + psshl_ws \ + psshlr_ws \ + psshl_dhs \ + psshlr_dhs \ + psshl_dws \ + psshlr_dws \ + pnclipp_b \ + pnclipp_h \ + pnclipp_w \ + pnclipup_b \ + pnclipup_h \ + pnclipup_w \ + riscv_insn_list = \ $(riscv_insn_ext_i) \ $(riscv_insn_ext_c) \ @@ -1165,6 +1775,7 @@ riscv_insn_list = \ $(riscv_insn_ext_cmo) \ $(riscv_insn_ext_d_zfa) \ $(riscv_insn_ext_f_zfa) \ + $(if $(HAVE_INT128),$(riscv_insn_ext_p)) \ $(riscv_insn_ext_h) \ $(riscv_insn_ext_k) \ $(if $(HAVE_INT128),$(riscv_insn_ext_q),) \ |