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Author
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Lines
2024-10-04
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell
11
-168
/
+267
2024-10-03
target/i386/kvm: Report which action failed in kvm_arch_put/get_registers
Julia Suvorova
1
-0
/
+23
2024-10-03
kvm: Allow kvm_arch_get/put_registers to accept Error**
Julia Suvorova
7
-14
/
+14
2024-10-03
target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest
Fabiano Rosas
1
-2
/
+2
2024-10-03
kvm/i386: replace identity_base variable with a constant
Paolo Bonzini
1
-18
/
+18
2024-10-03
kvm/i386: refactor kvm_arch_init and split it into smaller functions
Ani Sinha
1
-126
/
+201
2024-10-03
Merge tag 'warn-pull-request' of https://gitlab.com/marcandre.lureau/qemu int...
Peter Maydell
1
-12
/
+14
2024-10-02
Merge tag 'pull-riscv-to-apply-20241002' of https://github.com/alistair23/qem...
Peter Maydell
11
-17
/
+160
2024-10-02
target/loongarch: fix -Werror=maybe-uninitialized false-positive
Marc-André Lureau
1
-12
/
+14
2024-10-02
kvm/i386: fix return values of is_host_cpu_intel()
Ani Sinha
2
-4
/
+4
2024-10-02
kvm/i386: make kvm_filter_msr() and related definitions private to kvm module
Ani Sinha
2
-12
/
+11
2024-10-02
target/i386: Raise the highest index value used for any VMCS encoding
Lei Wang
2
-1
/
+9
2024-10-02
target/i386: Add VMX control bits for nested FRED support
Xin Li (Intel)
1
-2
/
+2
2024-10-02
target/i386: Delete duplicated macro definition CR4_FRED_MASK
Xin Li (Intel)
1
-6
/
+0
2024-10-02
target/riscv/cpu_helper: Fix linking problem with semihosting disabled
Thomas Huth
2
-2
/
+4
2024-10-02
target/riscv32: Fix masking of physical address
Andrew Jones
1
-3
/
+3
2024-10-02
target: riscv: Add Svvptc extension support
Alexandre Ghiti
2
-0
/
+3
2024-10-02
target/riscv: Add textra matching condition for the triggers
Alvin Chang
2
-1
/
+47
2024-10-02
target/riscv: Preliminary textra trigger CSR writting support
Alvin Chang
2
-6
/
+73
2024-10-02
target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
Maria Klauchek
1
-0
/
+6
2024-10-02
target/riscv: Stop timer with infinite timecmp
Andrew Jones
1
-0
/
+1
2024-10-02
target/riscv/kvm: Fix the group bit setting of AIA
Andrew Jones
1
-1
/
+3
2024-10-02
target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
Alistair Francis
1
-0
/
+5
2024-10-02
target/riscv: fix za64rs enabling
Vladimir Isaev
1
-1
/
+1
2024-10-02
target/riscv/tcg/tcg-cpu.c: consider MISA bit choice in implied rule
Daniel Henrique Barboza
1
-3
/
+10
2024-10-02
target/riscv: Add a property to set vl to ceil(AVL/2)
Jason Chien
3
-0
/
+4
2024-10-01
target/arm: Avoid target_ulong for physical address lookups
Ard Biesheuvel
2
-10
/
+10
2024-09-28
Merge tag 'pull-request-2024-09-25' of https://gitlab.com/thuth/qemu into sta...
Peter Maydell
6
-11
/
+7
2024-09-27
Merge tag 'pull-tcg-20240922' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell
1
-1
/
+1
2024-09-24
target/riscv: remove break after g_assert_not_reached()
Pierrick Bouvier
2
-3
/
+0
2024-09-24
target/arm: remove break after g_assert_not_reached()
Pierrick Bouvier
1
-1
/
+0
2024-09-24
target/i386/kvm: replace assert(false) with g_assert_not_reached()
Pierrick Bouvier
1
-2
/
+2
2024-09-24
target/ppc: replace assert(0) with g_assert_not_reached()
Pierrick Bouvier
2
-5
/
+5
2024-09-22
target/ppc: Fix lxvx/stxvx facility check
Fabiano Rosas
1
-1
/
+1
2024-09-20
license: Update deprecated SPDX tag GPL-2.0+ to GPL-2.0-or-later
Philippe Mathieu-Daudé
2
-2
/
+2
2024-09-20
license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later
Philippe Mathieu-Daudé
12
-12
/
+12
2024-09-20
target/hexagon: Rename macros.inc -> macros.h.inc
Philippe Mathieu-Daudé
4
-4
/
+4
2024-09-20
mark <zlib.h> with for-crc32 in a consistent manner
Michael Tokarev
3
-3
/
+3
2024-09-19
target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1
Peter Maydell
1
-1
/
+1
2024-09-19
target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree
Richard Henderson
2
-127
/
+63
2024-09-19
target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree
Richard Henderson
2
-14
/
+186
2024-09-19
target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree
Richard Henderson
2
-131
/
+128
2024-09-19
target/arm: Widen NeonGenNarrowEnvFn return to 64 bits
Richard Henderson
5
-78
/
+93
2024-09-19
target/arm: Convert VQSHL, VQSHLU to gvec
Richard Henderson
6
-110
/
+94
2024-09-19
target/arm: Convert handle_scalar_simd_shli to decodetree
Richard Henderson
2
-35
/
+13
2024-09-19
target/arm: Convert handle_scalar_simd_shri to decodetree
Richard Henderson
2
-70
/
+86
2024-09-19
target/arm: Convert SHRN, RSHRN to decodetree
Richard Henderson
2
-48
/
+55
2024-09-19
target/arm: Split out subroutines of handle_shri_with_rndacc
Richard Henderson
1
-56
/
+82
2024-09-19
target/arm: Push tcg_rnd into handle_shri_with_rndacc
Richard Henderson
1
-26
/
+6
2024-09-19
target/arm: Convert SSHLL, USHLL to decodetree
Richard Henderson
2
-44
/
+45
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