Age | Commit message (Expand) | Author | Files | Lines |
2021-11-09 | target/ppc: cntlzdm/cnttzdm implementation without brcond | Matheus Ferst | 1 | -15/+16 |
2021-11-09 | target/ppc: Implement lxvkq instruction | Matheus Ferst | 2 | -0/+50 |
2021-11-09 | target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions | Matheus Ferst | 4 | -0/+93 |
2021-11-09 | target/ppc: implemented XXSPLTIDP instruction | Bruno Larsen (billionai) | 2 | -0/+12 |
2021-11-09 | target/ppc: Implemented XXSPLTIW using decodetree | Bruno Larsen (billionai) | 2 | -0/+16 |
2021-11-09 | target/ppc: implemented XXSPLTI32DX | Bruno Larsen (billionai) | 2 | -0/+28 |
2021-11-09 | target/ppc: moved XXSPLTIB to using decodetree | Bruno Larsen (billionai) | 3 | -15/+11 |
2021-11-09 | target/ppc: moved XXSPLTW to using decodetree | Bruno Larsen (billionai) | 3 | -12/+15 |
2021-11-09 | target/ppc: added the instructions PLXVP and PSTXVP | Lucas Mateus Castro (alqotel) | 2 | -0/+11 |
2021-11-09 | target/ppc: added the instructions PLXV and PSTXV | Lucas Mateus Castro (alqotel) | 2 | -0/+26 |
2021-11-09 | target/ppc: added the instructions LXVPX and STXVPX | Lucas Mateus Castro (alqotel) | 2 | -6/+15 |
2021-11-09 | target/ppc: added the instructions LXVP and STXVP | Lucas Mateus Castro (alqotel) | 2 | -12/+48 |
2021-11-09 | target/ppc: moved stxvx and lxvx from legacy to decodtree | Lucas Mateus Castro (alqotel) | 3 | -108/+20 |
2021-11-09 | target/ppc: moved stxv and lxv from legacy to decodtree | Lucas Mateus Castro (alqotel) | 3 | -17/+59 |
2021-11-09 | target/ppc: receive high/low as argument in get/set_cpu_vsr | Matheus Ferst | 1 | -171/+146 |
2021-11-09 | target/ppc: Introduce REQUIRE_VSX macro | Bruno Larsen (billionai) | 1 | -0/+8 |
2021-11-09 | target/ppc: Implement Vector Extract Double to VSR using GPR index insns | Matheus Ferst | 4 | -0/+92 |
2021-11-09 | target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree | Matheus Ferst | 5 | -42/+30 |
2021-11-09 | target/ppc: Implement Vector Insert from VSR using GPR index insns | Matheus Ferst | 2 | -0/+39 |
2021-11-09 | target/ppc: Implement Vector Insert Word from GPR using Immediate insns | Matheus Ferst | 2 | -0/+43 |
2021-11-09 | target/ppc: Implement Vector Insert from GPR using GPR index insns | Matheus Ferst | 4 | -0/+93 |
2021-11-09 | target/ppc: Implement vsldbi/vsrdbi instructions | Matheus Ferst | 2 | -0/+74 |
2021-11-09 | target/ppc: Implement vpdepd/vpextd instruction | Matheus Ferst | 4 | -3/+35 |
2021-11-09 | target/ppc: Implement vclzdm/vctzdm instructions | Matheus Ferst | 3 | -3/+35 |
2021-11-09 | target/ppc: Move vcfuged to vmx-impl.c.inc | Matheus Ferst | 6 | -52/+19 |
2021-11-09 | target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree | Luis Pires | 6 | -87/+68 |
2021-11-09 | target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetree | Luis Pires | 5 | -70/+69 |
2021-11-09 | target/ppc: Move dqua[q], drrnd[q] to decodetree | Luis Pires | 5 | -62/+47 |
2021-11-09 | target/ppc: Move dquai[q], drint{x,n}[q] to decodetree | Luis Pires | 5 | -58/+58 |
2021-11-09 | target/ppc: Move dcmp{u,o}[q],dts{tex,tsf,tsfi}[q] to decodetree | Luis Pires | 5 | -91/+83 |
2021-11-09 | target/ppc: Move d{add,sub,mul,div,iex}[q] to decodetree | Luis Pires | 5 | -70/+76 |
2021-11-09 | target/ppc: Move dtstdc[q]/dtstdg[q] to decodetree | Luis Pires | 5 | -38/+37 |
2021-11-09 | target/ppc: Do not update nip on DFP instructions | Luis Pires | 1 | -8/+0 |
2021-11-09 | target/ppc: Implement DCTFIXQQ | Luis Pires | 4 | -0/+75 |
2021-11-09 | target/ppc: Implement DCFFIXQQ | Luis Pires | 5 | -0/+43 |
2021-11-09 | target/ppc: Introduce REQUIRE_FPU | Fernando Valle | 1 | -0/+8 |
2021-11-09 | target/ppc: Move REQUIRE_ALTIVEC/VECTOR to translate.c | Bruno Larsen | 2 | -9/+9 |
2021-11-09 | target/ppc: Implement pextd instruction | Matheus Ferst | 4 | -0/+32 |
2021-11-09 | target/ppc: Implement pdepd instruction | Matheus Ferst | 4 | -0/+34 |
2021-11-09 | target/ppc: Implement cnttzdm | Luis Pires | 2 | -4/+25 |
2021-11-09 | target/ppc: Implement cntlzdm | Luis Pires | 2 | -0/+37 |
2021-11-09 | target/ppc: Implement PLQ and PSTQ | Matheus Ferst | 2 | -0/+16 |
2021-11-09 | target/ppc: Move LQ and STQ to decodetree | Matheus Ferst | 3 | -151/+113 |
2021-11-09 | target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions | Fernando Eckhardt Valle | 2 | -0/+25 |
2021-11-09 | target/ppc: Move load and store floating point instructions to decodetree | Fernando Eckhardt Valle | 3 | -205/+95 |
2021-11-09 | target/ppc: move resolve_PLS_D to translate.c | Fernando Eckhardt Valle | 2 | -19/+19 |
2021-11-09 | target/ppc: introduce do_ea_calc | Fernando Eckhardt Valle | 2 | -9/+15 |
2021-11-08 | target-i386: mmu: fix handling of noncanonical virtual addresses | Paolo Bonzini | 1 | -9/+12 |
2021-11-08 | target-i386: mmu: use pg_mode instead of HF_LMA_MASK | Paolo Bonzini | 1 | -2/+2 |
2021-11-04 | Merge remote-tracking branch 'remotes/quic/tags/pull-hex-20211103' into staging | Richard Henderson | 38 | -47/+7557 |