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| author | Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> | 2021-11-04 09:37:15 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-11-09 10:32:53 +1100 |
| commit | ec10f73eb92c0f72891808e58d4d47932e39797b (patch) | |
| tree | 538f1c1d8c06c7823898847ab86225682667a411 /target | |
| parent | aa4592fab7cc28ef230ecab5c7e5b4d3936917ce (diff) | |
| download | qemu-ec10f73eb92c0f72891808e58d4d47932e39797b.zip qemu-ec10f73eb92c0f72891808e58d4d47932e39797b.tar.gz qemu-ec10f73eb92c0f72891808e58d4d47932e39797b.tar.bz2 | |
target/ppc: Implemented XXSPLTIW using decodetree
Implemented the XXSPLTIW instruction, using decodetree.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-22-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/insn64.decode | 6 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-impl.c.inc | 10 |
2 files changed, 16 insertions, 0 deletions
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 134bc60..bd71f61 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -39,6 +39,10 @@ @8RR_D_IX ...... .. .... .. .. ................ \ ...... ..... ... ix:1 . ................ \ &8RR_D_IX si=%8rr_si xt=%8rr_xt +&8RR_D xt si:int32_t +@8RR_D ...... .. .... .. .. ................ \ + ...... ..... .... . ................ \ + &8RR_D si=%8rr_si xt=%8rr_xt ### Fixed-Point Load Instructions @@ -165,5 +169,7 @@ PLXVP 000001 00 0--.-- .................. \ PSTXVP 000001 00 0--.-- .................. \ 111110 ..... ..... ................ @8LS_D_TSXP +XXSPLTIW 000001 01 0000 -- -- ................ \ + 100000 ..... 0011 . ................ @8RR_D XXSPLTI32DX 000001 01 0000 -- -- ................ \ 100000 ..... 000 .. ................ @8RR_D_IX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 360593a..7116141 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1466,6 +1466,16 @@ static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8 *a) return true; } +static bool trans_XXSPLTIW(DisasContext *ctx, arg_8RR_D *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + tcg_gen_gvec_dup_imm(MO_32, vsr_full_offset(a->xt), 16, 16, a->si); + + return true; +} + static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a) { TCGv_i32 imm; |