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2020-08-24
Merge remote-tracking branch 'remotes/edgar/tags/edgar/xilinx-next-2020-08-24...
Peter Maydell
1
-10
/
+28
2020-08-24
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200824'...
Peter Maydell
16
-265
/
+437
2020-08-24
target/arm: Use correct FPST for VCMLA, VCADD on fp16
Peter Maydell
1
-3
/
+3
2020-08-24
target/arm: Implement FPST_STD_F16 fpstatus
Peter Maydell
4
-2
/
+18
2020-08-24
target/arm: Make A32/T32 use new fpstatus_ptr() API
Peter Maydell
3
-49
/
+36
2020-08-24
target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()
Peter Maydell
4
-72
/
+103
2020-08-24
target/arm: Delete unused ARM_FEATURE_CRC
Peter Maydell
1
-1
/
+0
2020-08-24
target/arm/translate.c: Delete/amend incorrect comments
Peter Maydell
1
-2
/
+2
2020-08-24
target/arm: Delete unused VFP_DREG macros
Peter Maydell
1
-15
/
+0
2020-08-24
target/arm: Remove ARCH macro
Peter Maydell
1
-5
/
+9
2020-08-24
target/arm: Convert T32 coprocessor insns to decodetree
Peter Maydell
2
-62
/
+21
2020-08-24
target/arm: Do M-profile NOCP checks early and via decodetree
Peter Maydell
5
-27
/
+100
2020-08-24
target/arm: Tidy up disas_arm_insn()
Peter Maydell
1
-17
/
+9
2020-08-24
target/arm: Convert A32 coprocessor insns to decodetree
Peter Maydell
3
-11
/
+111
2020-08-24
target/arm: Separate decode from handling of coproc insns
Peter Maydell
1
-32
/
+44
2020-08-24
target/arm: Pull handling of XScale insns out of disas_coproc_insn()
Peter Maydell
1
-15
/
+29
2020-08-24
target/microblaze: mbar: Trap sleeps from user-space
Edgar E. Iglesias
1
-0
/
+5
2020-08-24
target/microblaze: swx: Use atomic_cmpxchg
Edgar E. Iglesias
1
-8
/
+13
2020-08-24
target/microblaze: mbar: Add support for data-access barriers
Edgar E. Iglesias
1
-0
/
+5
2020-08-24
target/microblaze: mbar: Move LOG_DIS to before sleep
Edgar E. Iglesias
1
-1
/
+2
2020-08-24
target/microblaze: mbar: Transfer dc->rd to mbar_imm
Edgar E. Iglesias
1
-2
/
+4
2020-08-24
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200818' into...
Peter Maydell
8
-54
/
+197
2020-08-23
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...
Peter Maydell
8
-83
/
+245
2020-08-21
target/riscv: Change the TLB page size depends on PMP entries.
Zong Li
3
-2
/
+62
2020-08-21
target/riscv: Fix the translation of physical address
Zong Li
1
-2
/
+3
2020-08-21
riscv: Fix bug in setting pmpcfg CSR for RISCV64
Hou Weiying
1
-3
/
+2
2020-08-21
target/riscv: check before allocating TCG temps
LIU Zhiwei
2
-8
/
+8
2020-08-21
target/riscv: Clean up fmv.w.x
LIU Zhiwei
1
-5
/
+1
2020-08-21
target/riscv: Check nanboxed inputs in trans_rvf.inc.c
Richard Henderson
2
-16
/
+73
2020-08-21
target/riscv: Check nanboxed inputs to fp helpers
Richard Henderson
2
-18
/
+57
2020-08-21
target/riscv: Generate nanboxed results from trans_rvf.inc.c
Richard Henderson
1
-0
/
+4
2020-08-21
target/riscv: Generalize gen_nanbox_fpr to gen_nanbox_s
Richard Henderson
2
-15
/
+12
2020-08-21
target/riscv: Generate nanboxed results from fp helpers
Richard Henderson
2
-19
/
+28
2020-08-21
target/s390x: fix meson.build issue
Paolo Bonzini
1
-1
/
+1
2020-08-21
meson: link emulators without Makefile.target
Paolo Bonzini
1
-0
/
+13
2020-08-21
meson: target
Paolo Bonzini
57
-320
/
+575
2020-08-21
meson: convert target/s390x/gen-features.h
Marc-André Lureau
5
-22
/
+12
2020-08-21
meson: rename .inc.h files to .h.inc
Paolo Bonzini
3
-2
/
+2
2020-08-21
meson: rename included C source files to .c.inc
Paolo Bonzini
67
-95
/
+95
2020-08-21
trace: switch position of headers to what Meson requires
Paolo Bonzini
8
-0
/
+8
2020-08-13
target/ppc: Integrate icount to purr, vtb, and tbu40
Gustavo Romero
1
-0
/
+30
2020-08-12
target/ppc: Fix SPE unavailable exception triggering
Matthieu Bucchianeri
1
-33
/
+64
2020-08-12
target/ppc: add vmulh{su}d instructions
Lijun Pan
4
-0
/
+22
2020-08-12
target/ppc: add vmulh{su}w instructions
Lijun Pan
4
-2
/
+29
2020-08-12
target/ppc: add vmulld instruction
Lijun Pan
2
-0
/
+5
2020-08-12
target/ppc: convert vmuluwm to tcg_gen_gvec_mul
Lijun Pan
3
-15
/
+1
2020-08-12
target/ppc: add byte-reverse br[dwh] instructions
Lijun Pan
1
-0
/
+40
2020-08-12
target/ppc: Enable Power ISA 3.1
Lijun Pan
2
-2
/
+2
2020-08-12
target/ppc: Introduce Power ISA 3.1 flag
Lijun Pan
1
-0
/
+2
2020-08-12
target/ppc: Fix TCG leak with the evmwsmiaa instruction
Matthieu Bucchianeri
1
-2
/
+2
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