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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2020-08-13 17:27:09 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2020-08-24 10:47:27 +0200
commitbadcbf9d30c70e6701fdcf7ea80e0cf9e9faf837 (patch)
treef0e9c60494d7396b5fc97a44562ccefa120310ca /target
parent8367a77c4d3f6e1e60890f5510304feb2c621611 (diff)
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target/microblaze: mbar: Transfer dc->rd to mbar_imm
Transfer dc->rd to mbar_imm to improve the readability when comparing to the specs. No functional change. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target')
-rw-r--r--target/microblaze/translate.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index f6ff259..47637f1 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1229,8 +1229,10 @@ static void dec_br(DisasContext *dc)
/* Memory barrier. */
mbar = (dc->ir >> 16) & 31;
if (mbar == 2 && dc->imm == 4) {
+ uint16_t mbar_imm = dc->rd;
+
/* mbar IMM & 16 decodes to sleep. */
- if (dc->rd & 16) {
+ if (mbar_imm & 16) {
TCGv_i32 tmp_hlt = tcg_const_i32(EXCP_HLT);
TCGv_i32 tmp_1 = tcg_const_i32(1);
@@ -1246,7 +1248,7 @@ static void dec_br(DisasContext *dc)
tcg_temp_free_i32(tmp_1);
return;
}
- LOG_DIS("mbar %d\n", dc->rd);
+ LOG_DIS("mbar %d\n", mbar_imm);
/* Break the TB. */
dc->cpustate_changed = 1;
return;