diff options
| author | Lijun Pan <ljp@linux.ibm.com> | 2020-07-01 18:43:37 -0500 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-08-12 13:16:27 +1000 |
| commit | 9495edb08d9d7cd5674a237d95dbabfa7b355340 (patch) | |
| tree | d515e5b89f32d24444071bd1b32aa3b635ca8318 /target | |
| parent | ca7a2fdaa19ebbe91598d13fedbced43d47fff99 (diff) | |
| download | qemu-9495edb08d9d7cd5674a237d95dbabfa7b355340.zip qemu-9495edb08d9d7cd5674a237d95dbabfa7b355340.tar.gz qemu-9495edb08d9d7cd5674a237d95dbabfa7b355340.tar.bz2 | |
target/ppc: Enable Power ISA 3.1
This patch enables the Power ISA 3.1 in QEMU.
Signed-off-by: Lijun Pan <ljp@linux.ibm.com>
Message-Id: <20200701234344.91843-3-ljp@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target')
| -rw-r--r-- | target/ppc/cpu.h | 2 | ||||
| -rw-r--r-- | target/ppc/translate_init.inc.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 7bfee82..3c4e1b3 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2201,7 +2201,7 @@ enum { PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \ PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \ - PPC2_ISA300) + PPC2_ISA300 | PPC2_ISA310) }; /*****************************************************************************/ diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 7e66822..5134123 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -9201,7 +9201,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL; + PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_HV) | (1ull << MSR_TM) | |