riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-11-07	hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()	Philippe Mathieu-Daudé	1	-2/+1
2023-11-07	target: Move ArchCPUClass definition to 'cpu.h'	Philippe Mathieu-Daudé	2	-10/+6
2023-11-07	target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'	Philippe Mathieu-Daudé	2	-2/+5
2023-11-07	target: Unify QOM style	Philippe Mathieu-Daudé	2	-4/+0
2023-10-22	target/tricore: Use tcg_gen_*extract_tl	Richard Henderson	1	-16/+4
2023-10-11	hw/core/cpu: Return static value with gdb_arch_name()	Akihiko Odaki	1	-2/+2
2023-10-07	meson: Rename target_softmmu_arch -> target_system_arch	Philippe Mathieu-Daudé	1	-1/+1
2023-10-04	accel/tcg: Remove cpu_set_cpustate_pointers	Richard Henderson	1	-9/+0
2023-10-04	accel/tcg: Replace CPUState.env_ptr with cpu_env()	Richard Henderson	1	-2/+2
2023-10-03	tcg: Rename cpu_env to tcg_env	Richard Henderson	1	-113/+113
2023-10-03	accel/tcg: Move CPUNegativeOffsetState into CPUState	Richard Henderson	1	-1/+0
2023-10-03	target/*: Add instance_align to all cpu base classes	Richard Henderson	1	-0/+1
2023-10-02	Merge tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru into sta...	Stefan Hajnoczi	1	-3/+3
2023-09-29	target/tricore: Clean up local variable shadowing	Philippe Mathieu-Daudé	1	-3/+3
2023-09-29	target/tricore: Change effective address (ea) to target_ulong	Bastian Koppelmann	1	-8/+8
2023-09-29	target/tricore: Remove CSFRs from cpu.h	Bastian Koppelmann	1	-134/+9
2023-09-28	target/tricore: Fix FTOUZ being ISA v1.3.1 up	Bastian Koppelmann	1	-1/+5
2023-09-28	target/tricore: Replace cpu__code with translator_	Bastian Koppelmann	1	-3/+4
2023-09-28	target/tricore: Swap src and dst reg for RCRR_INSERT	Bastian Koppelmann	1	-4/+4
2023-09-28	target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0	Bastian Koppelmann	1	-2/+8
2023-09-28	target/tricore: Implement hptof insn	Bastian Koppelmann	4	-0/+45
2023-09-28	target/tricore: Implement ftohp insn	Bastian Koppelmann	5	-0/+48
2023-09-28	target/tricore: Clarify special case for FTOUZ insn	Bastian Koppelmann	1	-0/+5
2023-09-28	target/tricore: Implement FTOU insn	Bastian Koppelmann	3	-0/+36
2023-09-28	target/tricore: Correctly handle FPU RM from PSW	Bastian Koppelmann	1	-2/+16
2023-09-28	target/tricore: Implement CRCN insn	Bastian Koppelmann	4	-0/+73
2023-08-24	target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl	Richard Henderson	1	-10/+6
2023-07-25	target/tricore: Rename tricore_feature	Bastian Koppelmann	4	-9/+9
2023-07-25	other architectures: spelling fixes	Michael Tokarev	3	-6/+6
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	1	-2/+2
2023-06-21	target/tricore: Fix ICR.IE offset in RESTORE insn	Bastian Koppelmann	1	-1/+3
2023-06-21	target/tricore: Honour privilege changes on PSW write	Bastian Koppelmann	1	-1/+1
2023-06-21	target/tricore: Implement privilege level for all insns	Bastian Koppelmann	1	-10/+33
2023-06-21	target/tricore: Introduce priv tb flag	Bastian Koppelmann	2	-11/+20
2023-06-21	target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr()	Bastian Koppelmann	1	-1/+6
2023-06-21	target/tricore: ENABLE exit to main-loop	Bastian Koppelmann	1	-0/+5
2023-06-21	target/tricore: Introduce DISAS_TARGET_EXIT	Bastian Koppelmann	1	-13/+12
2023-06-21	target/tricore: Fix RR_JLI clobbering reg A[11]	Bastian Koppelmann	1	-1/+1
2023-06-21	target/tricore: Fix helper_ret() not correctly restoring PSW	Bastian Koppelmann	1	-4/+4
2023-06-21	target/tricore: Add CHECK_REG_PAIR() for insn accessing 64 bit regs	Bastian Koppelmann	1	-2/+9
2023-06-21	target/tricore: Correctly fix saving PSW.CDE to CSA on call	Bastian Koppelmann	1	-1/+6
2023-06-21	target/tricore: Fix out-of-bounds index in imask instruction	Siqi Chen	1	-0/+1
2023-06-21	target/tricore: Add DISABLE insn variant	Bastian Koppelmann	2	-1/+11
2023-06-21	target/tricore: Implement SYCSCALL insn	Bastian Koppelmann	1	-1/+1
2023-06-21	target/tricore: Add shuffle insn	Bastian Koppelmann	4	-0/+46
2023-06-21	target/tricore: Add crc32.b insn	Bastian Koppelmann	4	-0/+17
2023-06-21	target/tricore: Add crc32l.w insn	Bastian Koppelmann	4	-5/+23
2023-06-21	target/tricore: Add LHA insn	Bastian Koppelmann	2	-3/+20
2023-06-21	target/tricore: Add popcnt.w insn	Bastian Koppelmann	2	-0/+8
2023-06-21	target/tricore: Introduce ISA 1.6.2 feature	Bastian Koppelmann	2	-0/+14