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author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-14 12:00:34 +0200 |
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committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-21 17:56:45 +0200 |
commit | 73f874d9fe67bc0395d629d4d1ce083f61605ba5 (patch) | |
tree | 35ba42327f29e3390c62d8d21b381e0a5b59f99c /target/tricore | |
parent | fd6f446a5e34f160cbdc9bb300d326cec0eca6c6 (diff) | |
download | qemu-73f874d9fe67bc0395d629d4d1ce083f61605ba5.zip qemu-73f874d9fe67bc0395d629d4d1ce083f61605ba5.tar.gz qemu-73f874d9fe67bc0395d629d4d1ce083f61605ba5.tar.bz2 |
target/tricore: Add LHA insn
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230614100039.1337971-4-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target/tricore')
-rw-r--r-- | target/tricore/translate.c | 14 | ||||
-rw-r--r-- | target/tricore/tricore-opcodes.h | 9 |
2 files changed, 20 insertions, 3 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 26b284b..898557d 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -7931,7 +7931,7 @@ static void decode_sys_interrupts(DisasContext *ctx) static void decode_32Bit_opc(DisasContext *ctx) { - int op1; + int op1, op2; int32_t r1, r2, r3; int32_t address, const16; int8_t b, const4; @@ -7982,9 +7982,19 @@ static void decode_32Bit_opc(DisasContext *ctx) tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], temp, ctx->mem_idx, MO_LEUW); tcg_gen_shli_tl(cpu_gpr_d[r1], cpu_gpr_d[r1], 16); break; - case OPC1_32_ABS_LEA: + case OPCM_32_ABS_LEA_LHA: address = MASK_OP_ABS_OFF18(ctx->opcode); r1 = MASK_OP_ABS_S1D(ctx->opcode); + + if (has_feature(ctx, TRICORE_FEATURE_162)) { + op2 = MASK_OP_ABS_OP2(ctx->opcode); + if (op2 == OPC2_32_ABS_LHA) { + tcg_gen_movi_tl(cpu_gpr_a[r1], address << 14); + break; + } + /* otherwise translate regular LEA */ + } + tcg_gen_movi_tl(cpu_gpr_a[r1], EA_ABS_FORMAT(address)); break; /* ABSB-format */ diff --git a/target/tricore/tricore-opcodes.h b/target/tricore/tricore-opcodes.h index 59aa39a..9fab4bd 100644 --- a/target/tricore/tricore-opcodes.h +++ b/target/tricore/tricore-opcodes.h @@ -430,7 +430,7 @@ enum { OPCM_32_ABS_STOREB_H = 0x25, OPC1_32_ABS_STOREQ = 0x65, OPC1_32_ABS_LD_Q = 0x45, - OPC1_32_ABS_LEA = 0xc5, + OPCM_32_ABS_LEA_LHA = 0xc5, /* ABSB Format */ OPC1_32_ABSB_ST_T = 0xd5, /* B Format */ @@ -592,6 +592,13 @@ enum { OPC2_32_ABS_ST_B = 0x00, OPC2_32_ABS_ST_H = 0x02, }; + +/* OPCM_32_ABS_LEA_LHA */ +enum { + OPC2_32_ABS_LEA = 0x00, + OPC2_32_ABS_LHA = 0x01, +}; + /* * Bit Format */ |