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path: root/target/riscv/csr.c
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2023-07-10target/riscv: update cur_pmbase/pmmask based on mode affected by MPRVWeiwei Li1-7/+20
2023-07-10target/riscv: Remove redundant assignment to SXLWeiwei Li1-4/+0
2023-07-10target/riscv: Support MSTATUS.MPV/GVA only when RVH is enabledWeiwei Li1-6/+4
2023-06-13target/riscv: smstateen check for fcsrMayuresh Chitale1-0/+15
2023-06-13target/riscv: Update cur_pmmask/base when xl changesWeiwei Li1-1/+8
2023-06-13target/riscv: rework write_misa()Daniel Henrique Barboza1-27/+24
2023-05-05target/riscv: Restore the predicate() NULL check behaviorBin Meng1-2/+9
2023-05-05target/riscv: Set MMU_2STAGE_BIT in riscv_cpu_mmu_indexRichard Henderson1-5/+1
2023-05-05target/riscv: Reduce overhead of MSTATUS_SUM changeFei Wu1-2/+1
2023-05-05target/riscv: Add a general status enum for extensionsLIU Zhiwei1-7/+7
2023-05-05target/riscv: fix H extension TVM trapYi Chen1-21/+35
2023-05-05target/riscv: Legalize MPP value in write_mstatusWeiwei Li1-0/+32
2023-05-05target/riscv: Fix lines with over 80 charactersWeiwei Li1-17/+21
2023-05-05target/riscv: Fix format for commentsWeiwei Li1-3/+3
2023-05-05target/riscv: Remove riscv_cpu_virt_enabled()Weiwei Li1-23/+23
2023-05-05target/riscv: add support for Zcmt extensionWeiwei Li1-2/+34
2023-05-05target/riscv: Simplify arguments for riscv_csrrw_checkWeiwei Li1-8/+4
2023-05-05target/riscv: Simplify type conversion for CPURISCVStateWeiwei Li1-24/+11
2023-05-05target/riscv: Avoid env_archcpu() when reading RISCVCPUConfigWeiwei Li1-28/+12
2023-03-07includes: move tb_flush into its own headerAlex Bennée1-0/+1
2023-03-06riscv: Allow user to set the satp modeAlexandre Ghiti1-7/+5
2023-03-06riscv: Change type of valid_vm_1_10_[32|64] to boolAlexandre Ghiti1-10/+11
2023-03-01Merge patch series "RISCVCPUConfig related cleanups"Palmer Dabbelt1-61/+48
2023-03-01target/riscv/csr.c: avoid env_archcpu() usages when reading RISCVCPUConfigDaniel Henrique Barboza1-23/+9
2023-03-01target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cpu() pointersDaniel Henrique Barboza1-38/+12
2023-03-01target/riscv/csr.c: simplify mctr()Daniel Henrique Barboza1-3/+2
2023-03-01target/riscv/csr.c: use env_archcpu() in ctr()Daniel Henrique Barboza1-2/+1
2023-03-01Merge patch series "target/riscv: Add support for Svadu extension"Palmer Dabbelt1-6/+20
2023-03-01target/riscv: Add csr support for svaduWeiwei Li1-6/+11
2023-03-01target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and h...Weiwei Li1-4/+9
2023-03-01target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc...Weiwei Li1-2/+6
2023-03-01Merge patch series "target/riscv: Various fixes to gdbstub and CSR access"Palmer Dabbelt1-160/+181
2023-03-01target/riscv: Group all predicate() routines togetherBin Meng1-90/+87
2023-03-01target/riscv: Drop priv level check in mseccfg predicate()Bin Meng1-1/+1
2023-03-01target/riscv: Allow debugger to access sstc CSRsBin Meng1-5/+14
2023-03-01target/riscv: Allow debugger to access {h, s}stateen CSRsBin Meng1-2/+20
2023-03-01target/riscv: Allow debugger to access seed CSRBin Meng1-0/+4
2023-03-01target/riscv: Allow debugger to access user timer and counter CSRsBin Meng1-0/+4
2023-03-01target/riscv: Avoid reporting odd-numbered pmpcfgX in the CSR XML for RV64Bin Meng1-15/+9
2023-03-01target/riscv: Simplify getting RISCVCPU pointer from envBin Meng1-24/+12
2023-03-01target/riscv: Simplify {read, write}_pmpcfg() a little bitBin Meng1-2/+2
2023-03-01target/riscv: Use 'bool' type for read_onlyBin Meng1-1/+1
2023-03-01target/riscv: Coding style fixes in csr.cBin Meng1-30/+32
2023-03-01target/riscv: Use g_assert() for the predicate() NULL checkBin Meng1-5/+1
2023-03-01target/riscv: Add some comments to clarify the priority policy of riscv_csrrw...Bin Meng1-1/+10
2023-03-01Merge patch series "target/riscv: Some updates to float point related extensi...Palmer Dabbelt1-2/+1
2023-03-01target/riscv: Simplify check for Zve32f and Zve64fWeiwei Li1-2/+1
2023-03-01target/riscv: remove RISCV_FEATURE_MMUDaniel Henrique Barboza1-2/+2
2023-03-01target/riscv: remove RISCV_FEATURE_PMPDaniel Henrique Barboza1-1/+1
2023-03-01target/riscv: remove RISCV_FEATURE_EPMPDaniel Henrique Barboza1-1/+1