riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-10-22	hw/riscv: spike: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+2
2021-09-21	hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT	Anup Patel	1	-5/+9
2021-09-21	hw/intc: Rename sifive_clint sources to riscv_aclint sources	Anup Patel	1	-1/+1
2021-08-26	arch_init.h: Don't include arch_init.h unnecessarily	Peter Maydell	1	-1/+0
2021-06-08	hw/riscv: Use macros for BIOS image names	Bin Meng	1	-4/+2
2021-06-08	hw/riscv: Support the official CLINT DT bindings	Bin Meng	1	-1/+5
2021-05-02	hw: Do not include qemu/log.h if it is not necessary	Thomas Huth	1	-1/+0
2021-03-09	qtest: delete superfluous inclusions of qtest.h	Chen Qun	1	-1/+0
2021-03-04	hw/riscv: Drop 'struct MemmapEntry'	Bin Meng	1	-6/+3
2021-01-16	riscv: Pass RISCVHartArrayState by pointer	Alistair Francis	1	-4/+4
2020-12-17	hw/riscv: Use the CPU to determine if 32-bit	Alistair Francis	1	-4/+4
2020-12-17	hw/riscv: spike: Remove compile time XLEN checks	Alistair Francis	1	-21/+24
2020-12-17	hw/riscv: boot: Remove compile time XLEN checks	Alistair Francis	1	-1/+2
2020-12-17	riscv: spike: Remove target macro conditionals	Alistair Francis	1	-1/+1
2020-10-22	hw/riscv: Load the kernel after the firmware	Alistair Francis	1	-3/+8
2020-09-09	hw/riscv: Move riscv_htif model to hw/char	Bin Meng	1	-1/+1
2020-09-09	hw/riscv: Move sifive_clint model to hw/intc	Bin Meng	1	-1/+1
2020-09-09	hw/riscv: clint: Avoid using hard-coded timebase frequency	Bin Meng	1	-1/+2
2020-08-25	hw/riscv: spike: Allow creating multiple NUMA sockets	Anup Patel	1	-74/+158
2020-08-25	hw/riscv: Allow creating multiple instances of CLINT	Anup Patel	1	-1/+1
2020-08-21	hw/riscv: spike: Change the default bios to use generic platform image	Bin Meng	1	-2/+7
2020-07-13	hw/riscv: Modify MROM size to end at 0x10000	Bin Meng	1	-1/+1
2020-07-13	riscv: Add opensbi firmware dynamic support	Atish Patra	1	-3/+10
2020-07-13	RISC-V: Copy the fdt in dram instead of ROM	Atish Patra	1	-1/+6
2020-07-13	riscv: Unify Qemu's reset vector code path	Atish Patra	1	-38/+3
2020-07-10	qom: Put name parameter before value / visitor parameter	Markus Armbruster	1	-2/+2
2020-06-15	sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1	Markus Armbruster	1	-4/+3
2020-06-15	riscv: Fix to put "riscv.hart_array" devices on sysbus	Markus Armbruster	1	-2/+2
2020-06-03	hw/riscv: spike: Remove deprecated ISA specific machines	Alistair Francis	1	-217/+0
2020-04-29	hw/riscv/spike: Allow more than one CPUs	Anup Patel	1	-1/+1
2020-04-29	hw/riscv/spike: Allow loading firmware separately using -bios option	Anup Patel	1	-1/+23
2020-04-29	hw/riscv: Generate correct "mmu-type" for 32-bit machines	Bin Meng	1	-0/+4
2020-03-03	Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf3' i...	Peter Maydell	1	-3/+6
2020-02-28	hw: Make MachineClass::is_default a boolean type	Philippe Mathieu-Daudé	1	-1/+1
2020-02-27	hw/riscv: Provide rdtime callback for TCG in CLINT emulation	Anup Patel	1	-3/+6
2019-11-25	hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()	Zhuang, Siwei (Data61, Kensington NSW)	1	-3/+3
2019-10-28	riscv: hw: Drop "clock-frequency" property of cpu nodes	Bin Meng	1	-2/+0
2019-09-17	riscv: hw: Remove superfluous "linux, phandle" property	Bin Meng	1	-1/+0
2019-08-16	Include sysemu/sysemu.h a lot less	Markus Armbruster	1	-0/+1
2019-08-16	Include hw/hw.h exactly where needed	Markus Armbruster	1	-1/+0
2019-07-05	hw/riscv: Replace global smp variables with machine smp properties	Like Xu	1	-0/+3
2019-06-27	hw/riscv: Split out the boot functions	Alistair Francis	1	-17/+4
2019-05-24	riscv: spike: Add a generic spike machine	Alistair Francis	1	-1/+105
2019-02-11	riscv: Ensure the kernel start address is correctly cast	Alistair Francis	1	-1/+1
2019-02-05	elf: Add optional function ptr to load_elf() to parse ELF notes	Liam Merwick	1	-1/+1
2018-11-08	riscv: spike: Fix memory leak in the board init	Alistair Francis	1	-3/+3
2018-10-17	RISC-V: Don't add NULL bootargs to device-tree	Michael Clark	1	-2/+4
2018-09-25	Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2018-09-24' into...	Peter Maydell	1	-1/+1
2018-09-24	Drop "qemu:" prefix from error_report() arguments	Mao Zhongyi	1	-1/+1
2018-09-05	hw/riscv/spike: Set the soc device tree node as a simple-bus	Alistair Francis	1	-1/+1