riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-10-30	hw/intc/sh_intc: Remove excessive parenthesis	BALATON Zoltan	1	-4/+5
2021-10-30	hw/intc/sh_intc: Move sh_intc_register() closer to its only user	BALATON Zoltan	1	-30/+30
2021-10-30	hw/intc/sh_intc: Drop another useless macro	BALATON Zoltan	1	-11/+4
2021-10-30	hw/intc/sh_intc: Rename iomem region	BALATON Zoltan	1	-7/+4
2021-10-30	hw/intc/sh_intc: Turn some defines into an enum	BALATON Zoltan	1	-24/+18
2021-10-30	hw/intc/sh_intc: Use existing macro instead of local one	BALATON Zoltan	1	-7/+5
2021-10-30	hw/char/sh_serial: Add device id to trace output	BALATON Zoltan	2	-4/+6
2021-10-30	hw/char/sh_serial: QOM-ify	BALATON Zoltan	2	-54/+100
2021-10-30	hw/char/sh_serial: Split off sh_serial_reset() from sh_serial_init()	BALATON Zoltan	1	-12/+17
2021-10-30	hw/char/sh_serial: Embed QEMUTimer in state struct	BALATON Zoltan	1	-5/+5
2021-10-30	hw/char/sh_serial: Rename type sh_serial_state to SHSerialState	BALATON Zoltan	1	-13/+11
2021-10-30	hw/char/sh_serial: Do not abort on invalid access	BALATON Zoltan	1	-9/+10
2021-10-30	hw/sh4/r2d: Use error_report instead of fprintf to stderr	BALATON Zoltan	1	-2/+3
2021-10-30	hw/sh4: Change debug printfs to traces	BALATON Zoltan	9	-92/+51
2021-10-30	hw/sh4: Fix typos in a comment	BALATON Zoltan	1	-1/+1
2021-10-30	hw/sh4: Coding style: Remove unnecessary casts	BALATON Zoltan	1	-2/+2
2021-10-30	hw/sh4: Coding style: Add missing braces	BALATON Zoltan	6	-81/+118
2021-10-30	hw/sh4: Coding style: White space fixes	BALATON Zoltan	9	-85/+99
2021-10-30	hw/sh4: Coding style: Fix multi-line comments	BALATON Zoltan	7	-278/+286
2021-10-30	hw/sh4: Coding style: Remove tabs	BALATON Zoltan	5	-1253/+1252
2021-10-28	hw/riscv: opentitan: Fixup the PLIC context addresses	Alistair Francis	1	-2/+2
2021-10-28	hw/riscv: virt: Use the PLIC config helper function	Alistair Francis	1	-19/+1
2021-10-28	hw/riscv: microchip_pfsoc: Use the PLIC config helper function	Alistair Francis	1	-13/+1
2021-10-28	hw/riscv: sifive_u: Use the PLIC config helper function	Alistair Francis	1	-13/+1
2021-10-28	hw/riscv: boot: Add a PLIC config string function	Alistair Francis	1	-0/+25
2021-10-28	hw/riscv: virt: Don't use a macro for the PLIC configuration	Alistair Francis	1	-1/+1
2021-10-27	9pfs: use P9Array in v9fs_walk()	Christian Schoenebeck	1	-12/+5
2021-10-27	9pfs: make V9fsPath usable via P9Array API	Christian Schoenebeck	1	-0/+2
2021-10-27	9pfs: simplify blksize_to_iounit()	Christian Schoenebeck	1	-2/+1
2021-10-27	9pfs: deduplicate iounit code	Christian Schoenebeck	1	-21/+20
2021-10-27	9pfs: fix wrong I/O block size in Rgetattr	Christian Schoenebeck	1	-1/+20
2021-10-23	Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull...	Richard Henderson	3	-14/+33
2021-10-23	hw/nvram: Fix Memory Leak in Xilinx ZynqMP eFuse device	Tong Ho	1	-6/+12
2021-10-23	hw/nvram: Fix Memory Leak in Xilinx Versal eFuse device	Tong Ho	1	-5/+15
2021-10-23	hw/nvram: Fix Memory Leak in Xilinx eFuse QOM	Tong Ho	1	-3/+6
2021-10-22	Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...	Richard Henderson	11	-396/+113
2021-10-22	Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211022' into sta...	Richard Henderson	4	-4/+90
2021-10-22	Merge remote-tracking branch 'remotes/vivier-m68k/tags/q800-pull-request' int...	Richard Henderson	3	-5/+188
2021-10-22	hw/riscv: spike: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+2
2021-10-22	hw/riscv: sifive_u: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+2
2021-10-22	hw/riscv: sifive_e: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+12
2021-10-22	hw/riscv: shakti_c: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+2
2021-10-22	hw/riscv: opentitan: Use MachineState::ram and MachineClass::default_ram_id	Bin Meng	1	-4/+12
2021-10-22	hw/riscv: microchip_pfsoc: Use MachineState::ram and MachineClass::default_ra...	Bin Meng	1	-16/+20
2021-10-22	hw/intc: sifive_plic: Cleanup the irq_request function	Alistair Francis	1	-6/+4
2021-10-22	hw/intc: sifive_plic: Cleanup the realize function	Alistair Francis	1	-21/+24
2021-10-22	hw/intc: sifive_plic: Move the properties	Alistair Francis	1	-15/+15
2021-10-22	hw/intc: Remove the Ibex PLIC	Alistair Francis	2	-308/+0
2021-10-22	hw/riscv: opentitan: Update to the latest build	Alistair Francis	1	-5/+17
2021-10-22	speed/sdhci: Add trace events	Cédric Le Goater	2	-0/+9