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path: root/llvm/test/Transforms/LoopVectorize
AgeCommit message (Expand)AuthorFilesLines
4 hours[LV] Pre-commit test for sinking the recipe into vector early exit block. nfc...Mel Chen2-0/+180
5 hours[VPlan] Create SCEV before any VPIRInstructions to check for overflow (#177911)Jim Lin1-0/+53
13 hours[AArch64] Align nontemporal store/load little-endian checks (#177468)Tomer Shafir1-65/+115
13 hours[RISCV] Set the reciprocal throughtput cost for division to TTI::TCC_Expensiv...Ryan Buchner1-2/+2
35 hours[LV] Precommit extra argmin/argmax tests for #170223.Florian Hahn2-0/+136
2 days[LV] Add additional tests for early-exit loops loads not known deref.Florian Hahn3-0/+406
4 days[LV] capture branch weights for constant trip counts (#175096)Mircea Trofin2-9/+39
5 days[LV] Separate runtime check cost from total overhead in profitability check (...Mel Chen5-15/+10
5 days[LV] Skip FindLast reductions in collectInLoopReductions.Florian Hahn1-0/+1
6 days[VPlan] Replace ComputeFindIVRes with ComputeRdxRes + cmp + sel (NFC) (#176672)Florian Hahn1-1/+3
7 days[LV] Add replicating load/store cost tests for Apple CPUs.Florian Hahn1-0/+813
8 days[LV] Consider UserIC when limiting VF. (#174573)Florian Hahn1-31/+35
8 days[LV][NFC] Update low trip count tail-folding tests (#176898)David Sherwood2-1/+117
8 days[VPlan] Fall back to legacy cost if operands may be force-scalarized.Florian Hahn1-0/+44
9 days[LV] Add extra tests with sink-able recipes.Florian Hahn2-205/+472
9 days[LV] Add single-iteration epilogue test with de-generate reduction.Florian Hahn1-316/+393
9 days[LV] Allow loops with multiple early exits in legality checks. (#176403)Florian Hahn3-8/+10
10 daysRecommit "[VPlan] Only use isAddressSCEVForCost in legacy getAddressAccSCEV"Florian Hahn2-24/+41
10 days[VPlan] Match inverted logical AND/OR for select costs.Florian Hahn1-8/+8
10 days[LV] Add missing coverage for LV cost model code paths.Florian Hahn3-24/+336
11 days[VPlan] Normalize selects to always select the data op when cond is true.Florian Hahn3-18/+18
11 days[LV] Add additional tests for miscompile caused by 2abd6d6d7a.Florian Hahn1-0/+199
11 days [VPlan] Replace PhiR operand of ComputeFindIVResult with VPIRFlags. #174026 ...Florian Hahn1-1/+1
12 days[LV] Precommit additional early-exit tests from #174864.Florian Hahn4-88/+444
12 days[SCEV] Add initial support for ptrtoaddr. (#158032)Florian Hahn1-0/+47
12 days[LoopVectorize] Support vectorization of overflow intrinsics (#174835)Vishruth Thimmaiah3-17/+560
12 days[LV] Prevent `extract-lane` generate unused IRs with single vector operand. ...Elvis Wang6-18/+0
12 days[NFC] use UTC for LoopVectorize/tripcount.ll (#175095)Mircea Trofin1-36/+220
12 days[VPlan] Fold boolean select to xor if possible.Florian Hahn1-1/+1
13 days[VPlan] Bail out when rdx result cannot be found in handleFindLast.Florian Hahn1-0/+41
13 days[VPlan] Explicitly test EVL recipe has "evl" name. NFCLuke Lau1-6/+6
13 days[LV] Add additional cost and folding test coverage. (NFC)Florian Hahn4-56/+733
14 days[VPlan] Handle min/max recur kinds in ::printFlags.Florian Hahn1-1/+1
14 days[VPlan] Add printing test for UMax reduction (NFC).Florian Hahn1-0/+52
14 daysRequire asserts for a debug printing testGraham Hunter1-0/+2
14 days[LV] Vectorize conditional scalar assignments (#158088)Graham Hunter10-255/+3230
2026-01-14[VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (#174026)Florian Hahn4-22/+22
2026-01-14[LV] Fix bug in setVectorizedCallDecision (#175742)David Sherwood1-29/+29
2026-01-13[VPlan] Optimize BranchOnTwoConds to chain of 2 simple branches. (#174016)Florian Hahn11-342/+280
2026-01-13[VPlan] Allow VPInstruction::PtrAdd as a user of EVL (#175506)Luke Lau1-0/+47
2026-01-13[LV][NFC] Follow-up fix for #173262 (#175513)Mel Chen1-7/+6
2026-01-12[profcheck] Fix encoding of 0 loopEstimatedTrip count (#174896)Mircea Trofin2-7/+7
2026-01-12[IVDesc] Fix off-by-one error in FindFirstIV ranges (#174441)Ramkumar Ramachandra2-144/+254
2026-01-12[AArch64] Define cost of i16->i32 udot/sdot instructions (#174102)Sander de Smalen1-0/+66
2026-01-12[VPlan] Remove verifier check that EVL can only be used by VPInstruction with...Luke Lau1-0/+64
2026-01-12[VPlan] Don't fold UDiv in replicate regions. (#175460)Florian Hahn1-0/+265
2026-01-12[WebAssembly] vi8 mul cost modelling. (#175177)Sam Parker1-54/+46
2026-01-12[LV] Simplify extract-lane with scalar operand to the scalar value itself. (#...Elvis Wang4-28/+6
2026-01-11[VPlan] Add missing sext(sub) SCEV fold to getSCEVExprForVPValue.Florian Hahn1-0/+255
2026-01-11[LV] Handle live-ins in findRecipe.Florian Hahn1-0/+99
generated by cgit v1.1 at 2026-01-28 08:16:25 +0000