aboutsummaryrefslogtreecommitdiff
path: root/llvm/test/Transforms
AgeCommit message (Expand)AuthorFilesLines
2025-12-09Revert "[LV] Mark checks as never succeeding for high cost cutoff."Aiden Grossman1-14/+25
2025-12-09[LV] Mark checks as never succeeding for high cost cutoff.Florian Hahn1-25/+14
2025-12-09[LV] Add test with threshold=0 and metadata forcing vectorization.Florian Hahn1-0/+109
2025-12-09[VPlan] Use SCEV to prove non-aliasing for stores at different offsets. (#170...Florian Hahn1-30/+18
2025-12-09[AArch64][ARM] Optimize more `tbl`/`tbx` calls into `shufflevector` (#169748)valadaptive4-100/+476
2025-12-09[FMV][AArch64] Allow user to override version priority. (#150267)Alexandros Lamprineas1-1/+71
2025-12-09[VPlan] Remove ExtractLastLane for plans with scalar VFs. (#171145)Florian Hahn1-2/+1
2025-12-09[LV] Return getPredBlockCostDivisor in uint64_tLuke Lau1-0/+49
2025-12-09[InferAlign] Eliminate `and ptr, -align` pattern (#171147)Nikita Popov1-0/+42
2025-12-08[LTT] Bias branch weights as "expected" when lowering type tests with conditi...Mircea Trofin1-10/+13
2025-12-09[RISCV] Don't unroll vectorized loops with vector operands (#171089)Pengcheng Wang1-98/+17
2025-12-09[RISCV] Precommit test for unrolling loops with vector operandsPengcheng Wang1-7/+210
2025-12-08[NFC] Run UTC --check-globals on LowerTypeTests/import.ll (#170755)Mircea Trofin1-136/+154
2025-12-08AMDGPU: Precommit a test (#171208)Nicolai Hähnle1-0/+50
2025-12-08Reland "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" (#169614)Fei Peng9-13/+830
2025-12-08[LoadStoreVectorizer] Fill gaps in load/store chains to enable vectorization ...Drew Kersnar10-60/+1512
2025-12-08[MemProf] Merge all callee guids for indirect call VP metadata (#170964)Teresa Johnson1-2/+14
2025-12-08[LV] Simplify IR for gather-cost.ll, auto-generate checks. (NFC)Florian Hahn3-212/+243
2025-12-08[AMDGPU][UnifyLoopExits] Fix duplicate successor handling (#170759)Robert Imschweiler1-8/+35
2025-12-08Scalarizer : Fix vector shuffle issue when can't aligned to customized minBit...Chow2-21/+50
2025-12-08[SLP]Prefer instructions, ued outside the block, as the initial main copyable...Alexey Bataev2-3/+42
2025-12-08[Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (#171082)Kevin Sala Penades18-290/+290
2025-12-08[VPlan] Use nuw when computing {VF,VScale}xUF (#170710)Ramkumar Ramachandra9-31/+31
2025-12-08[VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (#158690)Luke Lau7-5/+397
2025-12-08[InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} ...Tirthankar Mazumder1-0/+76
2025-12-08[AMDGPU] Apply alignment attr for make.buffer.rsrc (#166914)Shoreshen1-2/+2
2025-12-07[VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (#1...Florian Hahn4-14/+28
2025-12-07[Clang]: Support opt-in speculative devirtualization (#159685)Hassnaa Hamdi2-0/+124
2025-12-06[VPlan] Remove stray space before ops when printing vector-ptr (NFC)Florian Hahn1-22/+22
2025-12-06[SimplifyCFG] Hoist common code for switch multi-case destinations (#165700)Kunqiu Chen1-5/+35
2025-12-05[MemProf] Add option to print function GUIDs during matching (#170946)Teresa Johnson1-2/+5
2025-12-05[AA] Improve precision for monotonic atomic load/store operations (#158169)Jin Huang2-49/+67
2025-12-05[MemProf] Add remarks for matched allocs and calls (#170379)Teresa Johnson2-2/+15
2025-12-05[VPlan] Use strict whitespace checks for VPlan printing test.Florian Hahn1-37/+37
2025-12-05[AArch64] Add isAppleMLike helper to check for M cores and aligned CPUs. (#17...Florian Hahn1-201/+2
2025-12-05[InstCombine] Fix profile metadata when folding implied conditionals (#170756)Aiden Grossman1-1/+1
2025-12-05[SimplifyLibCalls] Recognize and simplify f[min/max]imumnum (#170699)valadaptive1-10/+4
2025-12-05[profcheck][test] Use quotes for when not using the internal lit shell (#170873)Jordan Rupprecht2-2/+2
2025-12-05[VectorCombine] Fold permute of intrinsics into intrinsic of permutes: shuffl...Jerry Dang3-9/+151
2025-12-05PowerPC: Add vec_malloc functions to AIX in RuntimeLibcalls (#167089)Matt Arsenault1-0/+7
2025-12-05AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (#141068)anjenner8-379/+4056
2025-12-05[LLVM][AArch64] Add "u" variants of SVE saturating/rounding shift left intrin...Paul Walker2-12/+66
2025-12-05[ConstantFolding] Handle roundeven libcalls (#170692)valadaptive1-16/+8
2025-12-05[InstCombine] Add regression tests for f[min][max]imum_num libcalls (#170695)valadaptive1-0/+36
2025-12-05[InferFunctionAttrs] Fix check linesNikita Popov1-154/+154
2025-12-05[InferAttrs] Handle f[min/max]imum_num like other libm functions (#170697)valadaptive1-0/+18
2025-12-04[profcheck] Fix missing profile metadata in ExpandMemCmp (#169979)Jin Huang3-17/+44
2025-12-04[VPlan] Don't try to hoist multi-defs for first-order recurrences.Florian Hahn1-1/+49
2025-12-04[profcheck] Don't verify generated global ctors/dtors (#170597)Mircea Trofin3-2/+15
2025-12-05[JumpThread] Fix `JumpThreading` pass to skip merging when both blocks contai...Lucie Choi1-0/+68
generated by cgit v1.1 at 2026-01-07 15:56:52 +0000