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path: root/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
AgeCommit message (Expand)AuthorFilesLines
8 hours[RISCV] Teach getIntImmCostInst about (X & -(1 << C1) & 0xffffffff) == C2 << ...Craig Topper1-0/+39
3 daysRevert "[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)"ShihPo Hung1-11/+0
3 days[ASan][RISCV] Teach AddressSanitizer to support indexed load/store. (#160443)Hank Chang1-0/+38
4 days[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#160470)Shih-Po Hung1-0/+11
7 days[TTI][ASan][RISCV] reland Move InterestingMemoryOperand to Analysis and embed...Hank Chang1-0/+77
11 daysRevert "[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embe...Florian Mayer1-77/+0
11 days[TTI][ASan][RISCV] Move InterestingMemoryOperand to Analysis and embed in Mem...Hank Chang1-0/+77
2025-09-12[RISCV] Use hasCPOPLike in isCtpopFast and getPopcntSupport (#158371)Craig Topper1-3/+1
2025-09-02[Reland] "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. #1...Elvis Wang1-0/+12
2025-08-30[RISCV] Unaligned vec mem => prefer alt opc vecMikhail Gudim1-0/+4
2025-08-27Revert "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI." (#1...Elvis Wang1-12/+0
2025-08-27[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. (#149955)Elvis Wang1-0/+12
2025-08-19[LV][TTI] Calculate cost of extracting last index in a scalable vector (#144086)David Sherwood1-0/+18
2025-08-18[RISCV] Remove ST->hasVInstructions() from getIntrinsicInstrCost for cttz/ctl...Jim Lin1-1/+1
2025-08-12[RISCV] Cost casts with illegal types that can't be legalized (#153030)Luke Lau1-0/+1
2025-08-05[RISCV][TTI] Enable masked interleave access (#151665)Mel Chen1-5/+5
2025-07-31[RISCV] Adjust unroll prefs for loops with vectors (#151525)Ramkumar Ramachandra1-8/+7
2025-07-30[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)Ramkumar Ramachandra1-2/+7
2025-07-29[RISCV] Fix build failure in getIntrinsicInstrCost (#151210)Ramkumar Ramachandra1-1/+1
2025-07-29[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)Ramkumar Ramachandra1-8/+37
2025-07-25Revert "[RISCV][TTI] Enable masked interleave access for scalable vector (#14...Alex Bradbury1-6/+4
2025-07-25[RISCV][TTI] Enable masked interleave access for scalable vector (#149981)Mel Chen1-4/+6
2025-07-23[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)Elvis Wang1-0/+28
2025-07-10[RISCV] Unify non-vp and vp rounding intrinsic costing (#147872)Luke Lau1-41/+0
2025-07-10[TTI] Move vp.{select,merge} costing from RISCV to BasicTTIImpl. NFC (#147870)Luke Lau1-11/+0
2025-06-21[CostModel] Add a DstTy to getShuffleCost (#141634)David Green1-33/+47
2025-06-19[TTI] Plumb CostKind through getPartialReductionCost (#144953)Philip Reames1-5/+4
2025-06-18[TTI] Remove PPC hasActiveVectorLength impl, simplify interface (NFC). (#142310)Florian Hahn1-1/+1
2025-06-18[RISCV] Support non-power-of-2 types when expanding memcmpPengcheng Wang1-14/+7
2025-06-17[RISCV] Consolidate both copies of getLMUL1VT [nfc] (#144568)Philip Reames1-10/+1
2025-06-16[RISCV] Use RISCV::RVVBitsPerBlock instead of 64 in getLMUL1VT. NFC (#144401)Craig Topper1-1/+1
2025-06-16[RISCV][TTI] Refine reverse shuffle costing for high LMUL (#144155)Philip Reames1-22/+62
2025-06-13[RISCV] Support memcmp expansion for vectorsPengcheng Wang1-0/+17
2025-06-10[RISCV][TTI] Allow partial reduce with mismatched extends (#143608)Philip Reames1-2/+1
2025-05-30[RISCV][TTI] Discount slide cost if ri.vinsert/ri.vextract are available (#14...Philip Reames1-1/+4
2025-05-26[RISCV][TTI] Adjust costing in getPartialReductionCost for zvqdotq (#141430)Philip Reames1-2/+2
2025-05-23[RISCV][TTI] Implement getPartialReductionCost for the vqdotq cases (#140974)Philip Reames1-0/+23
2025-05-01[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)David Green1-2/+3
2025-04-30[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830)Jonas Paulsson1-1/+2
2025-04-27[RISCV] Sink vp.splat operands of VP intrinsic. (#133245)MingYan1-7/+15
2025-04-23[CostModel] Remove optional from InstructionCost::getValue() (#135596)David Green1-1/+1
2025-04-22Fix build error introduced by 1c722fcPhilip Reames1-2/+2
2025-04-22[RISCV][TTI] Use processShuffleMask for shuffle legalization estimate (#136191)Philip Reames1-41/+62
2025-04-22[TTI] Fix discrepancies in prototypes between interface and implementations (...Sergei Barannikov1-1/+1
2025-04-22[TTI] Make all interface methods const (NFCI) (#136598)Sergei Barannikov1-15/+16
2025-04-21[TTI] Constify BasicTTIImplBase::thisT() (NFCI) (#136575)Sergei Barannikov1-27/+28
2025-04-21[RISCV] Handle scalarized reductions in getArithmeticReductionCostLuke Lau1-3/+2
2025-03-29[RISCV][TTI] Adjust VLS shuffle costing to account for sub-mask reuse (#129793)Philip Reames1-0/+4
2025-03-28[RISCV] Don't vectorize for loops with small trip count (#132176)Pengcheng Wang1-0/+10
2025-03-19[TTI] Align optional FMFs in getExtendedReductionCost() to getArithmeticReduc...Elvis Wang1-1/+1
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