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path: root/llvm/lib/Target/RISCV/MCTargetDesc
AgeCommit message (Expand)AuthorFilesLines
2026-02-04[RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (#179615)Craig Topper2-2/+67
2026-01-30[RISCV] Rename ConstraintMask->RVVConstraintMask. NFC (#178963)Craig Topper1-6/+6
2026-01-30[RISC-V][Mach-O] Use RISCV_RELOC_ADDEND for large pc-relative offset. (#178699)Francesco Petrogalli1-8/+22
2026-01-26[RISC-V][Mach-O] Add assembler support for Mach-O relocations. (#177446)Francesco Petrogalli8-14/+459
2026-01-23[RISCV][llvm-objdump] Support --symbolize-operands (#166656)Sam Elliott1-0/+5
2026-01-22[RISCV] Improve vector pseudo table's experiences on translating between two ...Min-Yih Hsu1-2/+8
2026-01-20[RISC-V][MC] Handle YGPR registers in RISCVMCInstrAnalysisAlexander Richardson1-2/+12
2026-01-13[RISCV] AI Foundry ET extensions for RISC-V (#174571)Abel Bernabeu1-0/+1
2026-01-08[TableGen] Support RegClassByHwMode in CompressPatAlexander Richardson1-0/+1
2026-01-08[RISCV] Mark More Relocs as Relaxable (#151422)Sam Elliott2-17/+29
2026-01-08[RISC-V][Mach-O] Print immediate operands in hexadecimal format. (#174505)Francesco Petrogalli2-1/+19
2026-01-08[RISC-V] Ensure MCTargetStreamer is initialized. (#174800)Francesco Petrogalli1-1/+1
2026-01-08[RISC-V][ELF] Move emitNoteGnuPropertySection to RISCVTargetELFStreamer. [NFC...Francesco Petrogalli4-42/+42
2026-01-05[RISCV,CMake] Add BinaryFormat dependency after #141682Fangrui Song1-0/+1
2026-01-05[RISCV] Add basic Mach-O triple support. (#141682)Francesco Petrogalli8-1/+115
2025-12-24[llvm][RISCV] Support Zvfofp8min llvm intrinsics and codegen (#172585)Brandon Wu1-1/+3
2025-12-19[RISCV] Use pli.b and pli.h in RISCVMatInt with P extension on RV32. (#172803)Craig Topper1-1/+1
2025-12-17[RISCV] Prefer li over pli in RISCVMatInt. (#172778)Craig Topper1-1/+1
2025-12-17[RISCV] Enable use of PACK in RISCVMatInt with P extension. (#172760)Craig Topper1-1/+2
2025-12-11[RISCV] Add an OperandType to VMaskOp. NFC (#171926)Craig Topper1-0/+2
2025-12-10[RISCV] Add an OperandType for ordering for atomic pseudos. (#171744)Craig Topper1-0/+2
2025-12-10[RISCV] Add OperandType for XSfmm TWiden. (#171572)Craig Topper1-1/+3
2025-12-04[RISCV] Make RISCVInstrInfo::verifyInstruction stricter for immediate-only op...Craig Topper1-3/+9
2025-11-11[RISCV] Remove implicit conversions of MCRegister to unsigned. NFC (#167588)Craig Topper2-2/+2
2025-11-11Remove unused <utility> inclusionserge-sans-paille1-1/+0
2025-11-11[RISCV][llvm] Preliminary P extension codegen support (#162668)Brandon Wu2-1/+30
2025-11-03[RISCV] Removed unused OPERAND_SIMM8. NFC (#166215)Craig Topper1-1/+0
2025-10-28[RISCV] fixup_riscv_rvc_imm may be linker relaxable (#161797)Sam Elliott2-0/+2
2025-10-21[RISCV][MC] Introduce XSfvfexp* and XSfvfbfexpa* extensions and their MC supp...Min-Yih Hsu1-1/+2
2025-10-13[RISCV] Fix a warningKazu Hirata1-1/+1
2025-10-13[RISCV] Add XSfmm pseudo instruction and vset* insertion support (#143068)Brandon Wu1-2/+64
2025-09-21[RISCV] Use SignExtend64<32> instead of ORing in 32 1s into upper bits in RIS...Craig Topper1-4/+4
2025-09-19[RISCV] Update comments in RISCVMatInt to reflect we don't always use ADDIW a...Craig Topper1-14/+15
2025-09-12[RISCV][MC] Add MC support of Zibi experimental extension (#127463)Boyao Wang2-0/+18
2025-08-29[llvm] Support building with c++23 (#154372)Kyle Krüger2-2/+7
2025-08-28[RISCV] Implement MC support for Zvfbfa extension (#151106)Jim Lin1-2/+5
2025-08-23MCAssembler: Simplify fragment relaxationFangrui Song2-13/+4
2025-08-22[RISCV] Add initial assembler/MC layer support for big-endian (#146534)Djordje Todorovic4-11/+35
2025-08-21[RISCV] Correct the OperandType for simm8_unsigned and simm10_unsigned. (#154...Craig Topper1-0/+2
2025-08-17[RISCV] Remove an unnecessary cast (NFC) (#154049)Kazu Hirata1-1/+1
2025-08-17[RISCV] Accept [-128,255] instead of [0, 255] for pli.b (#153913)Craig Topper1-0/+1
2025-08-15[RISCV] Add TSFlag for reading past VL behaviour. NFCI (#149704)Luke Lau1-0/+9
2025-08-12[RISCV] Track Linker Relaxable through Assembly Relaxation (#152602)Sam Elliott2-13/+58
2025-08-07MC: Refine ALIGN relocation conditionsFangrui Song1-8/+22
2025-08-07[RISCV] Basic Objdump Mapping Symbol Support (#151452)Sam Elliott1-0/+2
2025-08-04[RISCV] Improvements to .note.gnu.property section. (#151436)Craig Topper1-13/+6
2025-08-03MCSymbolELF: Migrate away from classofFangrui Song2-3/+4
2025-08-03MCSymbolELF: Migrate away from classofFangrui Song1-2/+2
2025-08-02RISCVAsmBackend::relaxDwarflineAddr: Try special opcodeFangrui Song1-7/+7
2025-08-02RISCVAsmBackend: Simplify relaxDwarfLineAddr and remove getRelocPairForSizeFangrui Song2-40/+8
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