| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 3 days | [TTI] Add VectorInstrContext for context-aware insert/extract costs. (#175982) | Florian Hahn | 2 | -11/+12 |
| 3 days | [PowerPC] Fix XXPERMDI peephole and ISEL LiveVariables bugs (#172122) | Maryam Moghadas | 3 | -4/+17 |
| 7 days | [PowerPC] Fix instruction sizes / branch relaxation (#175556) | Nikita Popov | 4 | -10/+58 |
| 7 days | [NFC][MI] Tidy Up RegState enum use (2/2) (#177090) | Sam Elliott | 5 | -14/+15 |
| 7 days | [PPC64] Convert assert in patchpoint emission to usage error. (#177453) | Sean Fertile | 1 | -2/+10 |
| 8 days | [NFCI] replace getValueType with new getGlobalSize query (#177186) | Jameson Nash | 1 | -3/+3 |
| 9 days | [PPC] Fix suspicious AltiVec VAVG patterns (#176891) | Simon Pilgrim | 2 | -12/+14 |
| 9 days | [LLVM][CodeGen] Remove pass initialization calls from pass constructors (#173... | Rahul Joshi | 6 | -0/+6 |
| 9 days | [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUS... | Aditi Medhane | 3 | -0/+65 |
| 9 days | [PowerPC] cost modeling for length type VP intrinsic load/store (#168938) | RolandF77 | 2 | -1/+111 |
| 10 days | FastISel: Thread LibcallLoweringInfo through (#176799) | Matt Arsenault | 3 | -18/+24 |
| 11 days | [PowerPC] Add support for AMO store builtins (#170933) | Maryam Moghadas | 3 | -4/+24 |
| 13 days | Reland "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176277) | Sam Elliott | 2 | -2/+2 |
| 14 days | [PowerPC] Add AMO load builtins for conditional increment/decrement (#169435) | Maryam Moghadas | 3 | -0/+38 |
| 2026-01-15 | [NFC][TargetLowering] Make shouldExpandAtomicRMWInIR and shouldExpandAtomicCm... | Akshay Deodhar | 2 | -4/+5 |
| 2026-01-15 | Make MachineBlockFrequencyInfo a required pass for the MachineScheduler pass.... | Tony Linthicum | 1 | -0/+2 |
| 2026-01-15 | [PowerPC] using milicode call for strstr instead of lib call (#176002) | zhijian lin | 2 | -0/+11 |
| 2026-01-15 | Revert "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176190) | Sam Elliott | 2 | -2/+2 |
| 2026-01-15 | [NFC][MI] Tidy Up RegState enum use (1/2) (#176091) | Sam Elliott | 2 | -2/+2 |
| 2026-01-13 | [CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr... | Christudasan Devadasan | 2 | -3/+2 |
| 2026-01-12 | [PowerPC] using milicode call for strcpy instead of lib call (#174782) | zhijian lin | 2 | -0/+18 |
| 2026-01-12 | [PowerPC] Optimize not equal compares against zero vectors (#150422) | Himadhith | 1 | -0/+14 |
| 2026-01-11 | [TargetLowering] Change the `softPromoteHalfType` default to `true` (#175149) | Trevor Gross | 1 | -2/+0 |
| 2026-01-09 | XCOFF associated metadata (#159096) | Sean Fertile | 1 | -1/+26 |
| 2026-01-08 | [PowerPC] Add type checking for DMF insert (#172078) | RolandF77 | 2 | -28/+47 |
| 2026-01-08 | [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (#15... | Trevor Gross | 1 | -0/+2 |
| 2025-12-25 | [PowerPC] Check isPhysical() before converting Register to MCRegister. NFC (#... | Craig Topper | 1 | -6/+6 |
| 2025-12-18 | [PowerPC]: Add check for cast when shufflevector (#172443) | Kevin Per | 1 | -0/+4 |
| 2025-12-16 | [CodeGen] expand-fp: Change frem expansion criterion (#158285) | Frederik Harwath | 1 | -4/+4 |
| 2025-12-12 | Fixes non-functional changes found static analyzer (#171197) | Seraphimt | 1 | -4/+1 |
| 2025-12-11 | [SCEVExp] Get DL from SE, strip constructor arg (NFC) (#171823) | Ramkumar Ramachandra | 1 | -6/+2 |
| 2025-12-11 | [NFC] isOSGlibc: musl is not glibc. (#171734) | Harald van Dijk | 1 | -1/+2 |
| 2025-12-09 | [PowerPC] Use the same lowering rule for vector rounding instructions (#166307) | paperchalice | 1 | -2/+2 |
| 2025-12-08 | Fix VarArgs FixedStack object on AIX. (#170240) | Sean Fertile | 1 | -8/+28 |
| 2025-12-08 | Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineO... | zhijian lin | 1 | -9/+37 |
| 2025-12-08 | PowerPC/VSX: Select FMINNUM and FMAXNUM (#135739) | YunQiang Su | 2 | -27/+32 |
| 2025-12-03 | [PowerPC] Add initial support for AMO load builtins (#168746) | Maryam Moghadas | 4 | -9/+65 |
| 2025-12-02 | [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter ... | Robert Imschweiler | 2 | -3/+2 |
| 2025-12-02 | [PowerPC][MC] Diagnose out of range branch fixups (#165859) | Nikita Popov | 1 | -2/+22 |
| 2025-11-27 | [PowerPC] Implement paddis (#161572) | Lei Huang | 8 | -0/+96 |
| 2025-11-26 | CodeGen: Make all targets override pseudos with pointers (#159881) | Matt Arsenault | 2 | -0/+6 |
| 2025-11-25 | [PowerPC] Fix a warning | Kazu Hirata | 1 | -1/+2 |
| 2025-11-25 | [PowerPC ]convert `(setcc (and X, 1), 0, eq)` to `XORI (and X, 1), 1` (#168... | zhijian lin | 1 | -0/+69 |
| 2025-11-21 | [PowerPC] Replace vspltisw+vadduwm instructions with xxleqv+vsubuwm for addin... | Himadhith | 1 | -0/+45 |
| 2025-11-21 | [PowerPC] Fix Wparentheses warning | Jim Lin | 1 | -2/+2 |
| 2025-11-19 | CodeGen: Add subtarget to TargetLoweringBase constructor (#168620) | Matt Arsenault | 1 | -1/+1 |
| 2025-11-19 | [PowerPC] Add custom lowering for SADD overflow for i32 and i64 (#159255) | Aditi Medhane | 2 | -1/+38 |
| 2025-11-17 | [PowerPC] TableGen-erate SDNode descriptions (#168108) | Sergei Barannikov | 10 | -794/+477 |
| 2025-11-13 | [PowerPC] fold i128 equality/inequality compares of two loads into a vectoriz... | zhijian lin | 2 | -1/+138 |
| 2025-11-12 | [PowerPC] Add intrinsic support for xvrlw (#167349) | Lei Huang | 2 | -2/+9 |
