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2026-02-04[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)Jay Foad3-25/+24
2026-02-02[CodeGen] Refactor targets to override the new getTgtMemIntrinsic overload (N...Nicolai Hähnle2-9/+11
2026-01-30[LoongArch] Support `preserve_none` calling convention (#178566)hev3-7/+48
2026-01-30[LoongArch] Add option to disable scheduling of instructions with target flagswanglei1-0/+12
2026-01-29[LoongArch][DAG] Custom lowering for vector SETCC operations (#177904)woruyu2-1/+33
2026-01-23[NFC][MI] Tidy Up RegState enum use (2/2) (#177090)Sam Elliott2-2/+2
2026-01-21[LoongArch] Remove DAG combination for extractelement (#177083)ZhaoQi1-43/+0
2026-01-20Revert "[LoongArch] Lowering flog2 to flogb (#162978)"wanglei5-16/+2
2026-01-19[LoongArch] Convert ld to fld when result is only used by sitofp (#165523)Zhaoxin Yang3-0/+52
2026-01-17[clang][LoongArch] Add support for LoongArch32 (#172619)hev2-6/+5
2026-01-16Reland "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176277)Sam Elliott1-2/+1
2026-01-15[NFC][TargetLowering] Make shouldExpandAtomicRMWInIR and shouldExpandAtomicCm...Akshay Deodhar2-4/+5
2026-01-15Revert "[NFC][MI] Tidy Up RegState enum use (1/2)" (#176190)Sam Elliott1-1/+2
2026-01-15[NFC][MI] Tidy Up RegState enum use (1/2) (#176091)Sam Elliott1-2/+1
2026-01-14[NFC] Implicit container copy cleanup (#174702)Henry1-1/+1
2026-01-14[llvm][LoongArch] Add PC-relative address materialization using pcadd instruc...hev8-120/+447
2026-01-14[llvm][LoongArch] Add call and tail macro instruction support (#175357)hev6-30/+53
2026-01-13[llvm][LoongArch] Add call30 and tail30 macro instruction support (#175356)hev7-13/+76
2026-01-13[LoongArch] Enable tail calls for sret and byval functions (#168506)hev2-25/+93
2026-01-13[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subr...Christudasan Devadasan2-1/+2
2026-01-12[LoongArch] Disable strict node mutation to fix strict FP lowering crash (#17...hev1-0/+3
2026-01-11[TargetLowering] Change the `softPromoteHalfType` default to `true` (#175149)Trevor Gross1-2/+0
2025-12-20[LoongArch] Use getShiftAmountConstant. NFCCraig Topper1-1/+1
2025-12-20[LoongArch] Fix assertion when combining SETCC with wide constants (#172975)hev1-2/+2
2025-12-18[LoongArch][NFC] Partial revert "Custom lowering for vector logical right shi...WANG Rui4-81/+24
2025-12-18[LoongArch] Fix OptimizeW crash when MI operand is not a virtual register (#1...hev1-1/+2
2025-12-16[CodeGen] expand-fp: Change frem expansion criterion (#158285)Frederik Harwath1-2/+2
2025-12-11[LoongArch] Add support for the ud macro instruction (#171583)hev3-7/+46
2025-12-10[LoongArch] Custom lowering for vector logical right shifts of integers (#171...hev4-24/+81
2025-12-02[NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter ...Robert Imschweiler2-2/+2
2025-11-28[LoongArch] Make rotl/rotr custom for lsx/lasx (#161154)Zhaoxin Yang4-0/+70
2025-11-26CodeGen: Make all targets override pseudos with pointers (#159881)Matt Arsenault1-0/+2
2025-11-25[LoongArch][DAGCombiner] Combine vand (vnot ..) to vandn (#161037)Zhaoxin Yang3-26/+175
2025-11-25[LoongArch] Fix for `VLDREPL` node validation (#168993)ZhaoQi3-18/+7
2025-11-20[LoongArch] TableGen-erate SDNode descriptions (#168129)Sergei Barannikov13-303/+141
2025-11-19CodeGen: Add subtarget to TargetLoweringBase constructor (#168620)Matt Arsenault1-1/+1
2025-11-12Reland "[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction mot...hev2-18/+30
2025-11-11Revert "[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction mot...hev2-30/+18
2025-11-10CodeGen: Remove TRI arguments from stack load/store hooks (#158240)Matt Arsenault3-13/+11
2025-11-10CodeGen: Remove TRI argument from getRegClass (#158225)Matt Arsenault1-2/+1
2025-11-10CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)Matt Arsenault4-5/+8
2025-11-10[LoongArch] Initial implementation for `enableMemCmpExpansion` hook (#166526)ZhaoQi2-2/+24
2025-11-07[LoongArch] Add `isSafeToMove` hook to prevent unsafe instruction motion (#16...hev2-18/+30
2025-11-06[LoongArch] Override hooks to enable sink-and-fold support in MachineSink (#1...ZhaoQi3-1/+163
2025-11-05[llvm][LoongArch] Introduce LASX and LSX conversion intrinsics (#157818)hev2-0/+36
2025-11-03[LoongArch] Make fminnum/fmaxnum legal for lsx/lasx (#162768)Zhaoxin Yang3-0/+12
2025-11-02[llvm] Use "= default" (NFC) (#166088)Kazu Hirata2-2/+2
2025-11-01[LoongArch] Make ceil,floor,trunc,roundeven legal for lsx/lasx (#165217)Zhaoxin Yang3-0/+19
2025-10-31[LoongArch] Add patterns to support vector type average instructions generati...ZhaoQi2-0/+48
2025-10-31[LoongArch] Lowering flog2 to flogb (#162978)Zhaoxin Yang5-2/+16
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