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2025-12-09AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw (#105553)HEADmainanjenner7-78/+19
2025-12-09[AMDGPU] Scavenge a VGPR to eliminate a frame index (#166979)Anshil Gandhi1-3/+29
2025-12-09Revert "[AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (#162077)"pvanhout1-310/+281
2025-12-09[NFC][AMDGPU] Remove unused TableGen generated enum (#171170)Mirko Brkušanin1-6/+0
2025-12-09[AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking (#162077)Pierre van Houtryve1-281/+310
2025-12-09[llvm] Use ConstantInt::getAllOnesValue()Nikita Popov2-2/+3
2025-12-09[AMDGPU][NPM] Enable SIModeRegister and SIInsertHardclauses passes (#168831)Vikram Hegde1-4/+3
2025-12-09[AMDGPU][NFC] cleanup whitespace in debug log of SIInsertWaitcntsSameer Sahasrabuddhe1-13/+13
2025-12-09[AMDGPU][NFC] fix function names in debug log for SIInsertWaitcntsSameer Sahasrabuddhe1-4/+4
2025-12-08AMDGPU: Fix truncstore from v6f32 to v6f16 (#171212)Matt Arsenault1-0/+1
2025-12-08[AMDGPU] Fix a crash when a bool variable is used in inline asm (#171004)Shilei Tian1-0/+4
2025-12-08[AMDGPU][NFC] Update a comment about FLAT v/s LDSDMASameer Sahasrabuddhe1-6/+5
2025-12-08[AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (#170886)Dark Steve7-33/+103
2025-12-08[AMDGPU] Do not generate V_FMAC_DX9_ZERO_F32 on GFX12 (#171116)Jay Foad3-3/+6
2025-12-08[AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing st...Pierre van Houtryve1-5/+17
2025-12-08[AMDGPU] Common up some unsafe fexp lowering. NFC. (#170841)Jay Foad1-14/+7
2025-12-08AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (#170708)Petar Avramovic2-17/+90
2025-12-08Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (#171087)Jan Patrick Lehr1-18/+3
2025-12-08[AMDGPU] Apply alignment attr for make.buffer.rsrc (#166914)Shoreshen1-1/+5
2025-12-08[AMDGPU] Enable i8 GEP promotion for vector allocas (#166132)Harrison Hao1-3/+18
2025-12-06[CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (#17...Philip Reames2-17/+9
2025-12-06Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (#170956)Nicolai Hähnle1-6/+7
2025-12-06[AMDGPU] Eliminate InstCombineTables.td. NFC. (#170857)Jay Foad4-15/+10
2025-12-06Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (#1...Nicolai Hähnle1-46/+36
2025-12-05Revert "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)"Nicolai Hähnle1-34/+46
2025-12-05Revert "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)"Nicolai Hähnle1-7/+6
2025-12-05AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)Nicolai Hähnle1-6/+7
2025-12-05AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)Nicolai Hähnle1-46/+34
2025-12-05[AMDGPU] Inherit constructors from WaitcntGenerator. NFC. (#170845)Jay Foad1-8/+3
2025-12-05[AMDGPU] Add an assertion. NFCI.Jay Foad1-0/+1
2025-12-05[AMDGPU] Make rotr illegal (#166558)Jay Foad5-37/+7
2025-12-05AMDGPU: Add codegen for atomicrmw operations usub_cond and usub_sat (#141068)anjenner15-20/+109
2025-12-05AMDGPU: Improve exp10 lowering for f16 (#170771)Matt Arsenault2-13/+29
2025-12-04[AMDGPU] Add verifier for flat_scr_base_hi read hazard (#170550)Stanislav Mekhanoshin1-0/+11
2025-12-04[AMDGPU] Update log lowering to remove contract for AMDGCN backend (#168916)Adel Ejjeh2-13/+21
2025-12-04[AMDGPU] Emit amdgpu.max_num_named_barrier resource symbol (#169851)PMylon3-8/+11
2025-12-04AMDGPU: Create a dummy call sequence when emitting call error (#170656)Matt Arsenault1-1/+6
2025-12-04[LangRef] Specify icmp on pointers to only compare address (#163936)Nikita Popov1-11/+1
2025-12-04AMDGPU: Use correct chain when emitting error on a call (#170645)Matt Arsenault1-1/+1
2025-12-04[AMDGPU][Waitcnts] Don't create a pending flat event for LDS DMA (#170263)Sameer Sahasrabuddhe1-4/+7
2025-12-04AMDGPU: Fix broken exp10 lowering for f16 (#170582)Matt Arsenault1-3/+7
2025-12-03AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (#170509)Nicolai Hähnle1-17/+28
2025-12-03[AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (#170567)Stanislav Mekhanoshin1-2/+11
2025-12-03[AMDGPU] Take BUF instructions into account in mayAccessScratchThroughFlat (#...Pierre van Houtryve3-8/+7
2025-12-02[AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (#170395)Stanislav Mekhanoshin1-1/+2
2025-12-02[AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (#170373)Stanislav Mekhanoshin2-0/+17
2025-12-02Revert "[LSV] Merge contiguous chains across scalar types" (#170381)Drew Kersnar1-1/+1
2025-12-02[NFC][AMDGPU] Remove trailing white spaces in `AMDGPU.td`Shilei Tian1-21/+21
2025-12-02AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (#1...Petar Avramovic5-100/+175
2025-12-02[AMDGPU][NFC] Put gfx125x common features into 12_50_Common (#170338)Changpeng Fang1-8/+8
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