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108 min.Revert "[AMDGPU] Replace AMDGPUISD::FFBH_I32 with ISD::CTLS" (#178837)Kewen Meng5-18/+6
6 hours[AMDGPU] Remove `NoSignedZerosFPMath` uses (#178343)paperchalice7-27/+6
6 hours[AMDGPU] Fix crash in SIWholeQuadMode with debug instructions. (#178282)Daniil Fukalov1-6/+11
7 hours[AMDGPU] Replace AMDGPUISD::FFBH_I32 with ISD::CTLS (#178420)Dmitry Sidorov5-6/+18
11 hours[AMDGPU] Fix DEALLOC_VGPRS in the presence of spills to scratch (#178461)Jay Foad1-4/+5
12 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for groupstaticsize (#178618)vangthao951-0/+2
12 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for global_load_tr_b* (#178545)vangthao952-1/+10
12 hours[AMDGPU][GlobalISel] Add RegBankLegalize rules for buffer store variants (#17...vangthao953-7/+25
14 hours[AMDGPU] Teach SILateBranchLowering pass to preserve MachineLoopInfo (#178276)Dark Steve1-8/+23
15 hours[AMDGPU] Move WaitcntBrackets::simplifyXcnt near other simplify functions. NF...Jay Foad1-21/+21
16 hours[AMDGPU] Ensure v_mfma_scale_f32_{16x16x128|32x32x64}_f8f6f4 instructions are...Frederik Harwath1-2/+3
19 hours[AMDGPU] Add braces around a switch case. NFC. (#178637)Jay Foad1-1/+2
21 hours[AMDGPU] Remove obsolete comment againJay Foad1-2/+0
22 hours[AMDGPU] Change scale_src2 encoding from vgpr0 to literal 0 (#178404)Jay Foad2-16/+3
22 hours[AMDGPU][GFX1250] Implement offset handling in s.buffer.load (#178389)Carl Ritson2-3/+11
35 hours[AMDGPU][SIInsertWaitcnts] Cleanup: Remove WaitEventMaskForInst member variab...vporpo1-12/+10
38 hoursAMDGPU: Perform zero/any extend combine into permute (#177370)macurtis-amd2-6/+47
42 hours[AMDGPU] Fix buggy insertion of DEALLOC_VGPRS message (#178401)Jay Foad1-20/+18
45 hours[AMDGPU] Skip printf runtime binding if function signature is unexpected (#17...Steffen Larsen1-0/+11
45 hours[AMDGPU] Fix legacy index in fmed3 optimization (#177426)Steffen Larsen1-1/+1
45 hours[AMDGPU] Use FPImmLeaf for float constants, fix build_vector patterns (#178018)Mirko Brkušanin3-28/+14
2 days[AMDGPU] revertScheduling must behave the same with or without debug (#177483)LU-JOHN1-2/+9
3 days[AMDGPU][GlobalISel] Add RegBankLegalize support for G_ATOMIC_CMPXCHG (#178066)vangthao953-3/+46
3 days[TTI] Add VectorInstrContext for context-aware insert/extract costs. (#175982)Florian Hahn4-23/+24
3 days[regalloc][LiveRegMatrix][AMDGPU] Fix LiveInterval dangling pointers in LiveR...Valery Pykhtin1-2/+4
3 days[AMDGPU] Add SOP1 support for gfx13 (#177618)Mariusz Sikora2-108/+158
3 days[AMDGPU] Add VOP1 support for gfx13 (#177603)Mariusz Sikora4-154/+226
3 days[AMDGPU] Pre-GFX10 does not need added latency for workgroup fences (#177157)Carl Ritson2-0/+11
3 daysR600: Really remove softPromoteHalfType (#178040)Matt Arsenault1-2/+0
3 days[AMDGPU][SIInsertWaitcnts][NFC] Move static array definition (#178014)vporpo1-35/+31
4 daysValueTracking: Extract isKnownIntegral out of AMDGPU (#177912)Matt Arsenault1-88/+14
4 daysReapply "R600: Remove softPromoteHalfType (#177420)" (#178013)Matt Arsenault1-4/+11
4 days[AMDGPU] Update patterns for v_cvt_flr and v_cvt_rpi (#177962)Mirko Brkušanin1-9/+11
4 days[AMDGPU][GlobalISel] Add frexp_mant/fract intrinsic RegBankLegalize r… (#17...vangthao951-0/+8
4 days[AMDGPU] Cleanup: Use unique_ptr for WCG and remove unnecessary class members...vporpo1-12/+7
4 days[AMDGPU] Improve crash message when S_WAITCNT_DEPCTR is missing its operand (...vporpo1-0/+3
4 daysRevert "R600: Remove softPromoteHalfType (#177420)"Aiden Grossman1-3/+0
4 days[AMDGPU][SILoadStoreOptimizer] Fix unused variable warning (#177969)Walter Lee1-2/+0
4 days[AMDGPU] Simplify legalization of PHI operands (#177352)Jay Foad1-37/+5
4 days[AMDGPU] Propagate debug locations to si-wqm instructions (#168573)Aleksandar Spasojevic1-15/+19
4 daysR600: Remove softPromoteHalfType (#177420)Matt Arsenault1-0/+3
4 daysAMDGPU: Move softPromoteHalfType override to R600 only (#177419)Matt Arsenault2-2/+2
4 days[AMDGPU] Add FeatureGFX13 and SMEM encoding for gfx13 (#177567)Mariusz Sikora20-43/+265
4 days[AMDGPU][NFC] Refine the representation of MODE register values. (#177574)Ivan Kosarev1-56/+55
4 days[AMDGPU][SILoadStoreOptimizer] Fix lds address operand offset (#176816)Ryan Mitchell4-50/+144
5 days[NFCI][AMDGPU] Use `GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h` and `R600Sub...Shilei Tian8-362/+53
5 days[AMDGPU] Fix DomTree preservation in SILowerControlFlow when nodes are remove...Vikram Hegde1-0/+5
6 days[NFCI][AMDGPU] Move more attributes from `AMDGPUSubtarget` to `GCNSubtarget` ...Shilei Tian4-38/+15
6 days[AMDGPU][GFX1250] Optimize s_wait_xcnt for back-to-back atomic RMWs (#177620)Christudasan Devadasan1-2/+71
6 daysAMDGPU: Disable scheduler mfma rewrite stage by default for now (#177624)Tony Linthicum1-1/+1
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