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2024-03-18Arm64: check matching operands for predicated B16B16 insnsJan Beulich2-17/+17
2024-03-18Arm64: correct B16B16 indexed bf{mla,mls,mul}Jan Beulich1-3/+3
2024-03-15x86/APX: legacy promoted insns can't access %xmm16-%xmm31Jan Beulich1-0/+5
2024-03-13opcodes: Fix build verbosityChristophe Lyon2-8/+8
2024-03-08RISC-V: Support Zabha extension.Jiawei1-0/+74
2024-03-01s390: Print base register 0 as "0" in disassemblyJens Remus1-4/+13
2024-03-01s390: Warn when register name type does not match operandJens Remus1-31/+31
2024-03-01s390: Add test cases for base/index register 0Jens Remus1-2/+3
2024-03-01s390: Use proper string lengths when parsing opcode table flagsJens Remus1-3/+3
2024-03-01s390: Whitespace fixes in conditional branch flavor descriptionsJens Remus1-3/+3
2024-03-01x86/APX: optimize certain XOR and SUB formsJan Beulich2-4/+4
2024-02-29aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions.Srinath Parvathaneni1-2/+2
2024-02-29PR21739, Inconsistent diagnosticsAlan Modra1-0/+2
2024-02-29RISC-V: Add assembly support for TLSDESC.Tatsuyuki Ishi1-0/+1
2024-02-27aarch64: rename internals related to PAuth feature to use pauth in their nami...Matthieu Longo1-38/+38
2024-02-23x86: also permit YMM/ZMM use in CFI directivesJan Beulich2-128/+129
2024-02-23x86/APX: INV{EPT,PCID,VPID} are WIGJan Beulich2-6/+6
2024-02-20kvx: gas: missing aliases for $r14r15 in assembler.Paul Iannetta1-10653/+10659
2024-02-20kvx: enable magic immediates for integer multiply-accumulate and CMOVE*Paul Iannetta1-39/+1490
2024-02-20kvx: gas: rename: or -> ior, xor -> eorPaul Iannetta1-2396/+5257
2024-02-20kvx: gas: move the splat modifier to the immediatePaul Iannetta1-1083/+1134
2024-02-19aarch64: Add support for the id_aa64isar3_el1 system registerYury Khrustalev1-0/+1
2024-02-16x86/APX: drop stray IgnoreSizeJan Beulich2-22/+22
2024-02-16x86: don't use VexWIG in SSE2AVX templatesJan Beulich2-8/+8
2024-02-16x86: drop redundant XmmwordJan Beulich1-8/+8
2024-02-15objdump, as: add callx support for BPF CPU v1Will Hawkins2-1/+5
2024-02-14arc: Put DBNZ instruction to a separate classYuriy Kolerov3-1/+7
2024-02-09PowerPC: Add support for Power11 optionsPeter Bergner1-1/+11
2024-02-09x86/APX: with REX2 map 1 doesn't "chain" to maps 2 or 3Jan Beulich1-7/+5
2024-02-09x86/APX: V{BROADCAST,EXTRACT,INSERT}{F,I}128 can also be expressedJan Beulich2-201/+285
2024-02-09x86/APX: VROUND{P,S}{S,D} encodings require AVX512{F,VL}Jan Beulich2-6/+6
2024-02-09x86: change type of Dwarf2 register numbers in register tableJan Beulich1-2/+2
2024-01-29bpf: there is no ldinddw nor ldabsdw instructionsJose E. Marchesi2-4/+5
2024-01-26aarch64: move SHA512 instructions to +sha3Andrew Carlotti1-5/+5
2024-01-26x86/APX: TILE{RELEASE,ZERO} have no EVEX encodingsJan Beulich2-2/+11
2024-01-26x86/APX: no need to have decode go through x86_64_table[]Jan Beulich3-76/+27
2024-01-26x86/APX: optimize MOVBEJan Beulich2-36/+38
2024-01-26LoongArch: gas: Add support for s9 registermengqinggang1-0/+9
2024-01-24aarch64: Eliminate unused variable warnings with -DNDEBUGAndrew Carlotti3-8/+8
2024-01-22Updated Serbian translations for th bfd, gold and opcodes directoriesNick Clifton1-312/+371
2024-01-22opcodes: tic4x_disassemble swap xcalloc argumentsMark Wielaard1-2/+2
2024-01-19x86-64: Dwarf2 register numbers for %bnd<N>Jan Beulich2-8/+8
2024-01-19x86/APX: VROUND{P,S}{S,D} can generally be encodedJan Beulich2-147/+203
2024-01-19x86/APX: be consistent with insn suffixesJan Beulich1-5/+5
2024-01-19x86: drop redundant EVex128 from PUSH2/POP2Jan Beulich1-4/+4
2024-01-19x86: support APX forms of U{RD,WR}MSRJan Beulich5-12/+55
2024-01-18Add note to translators not to translate z/ArchitectureNick Clifton1-0/+1
2024-01-18Updated translations for various sub-directoriesNick Clifton4-1512/+1762
2024-01-15Change version to 2.42.50 and regenerate filesNick Clifton3-117/+130
2024-01-15Add markers for 2.42 branchNick Clifton1-0/+4