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2024-05-08RISC-V: Support B, Zaamo and Zalrsc extensions.Nelson Chu1-88/+88
2024-05-06x86: Drop using extension_opcode to encode vvvv registerCui, Lili2-115/+117
2024-05-06x86: Drop SwapSourcesCui, Lili3-319/+319
2024-05-06x86: Use vexvvvv as the switch state to encode the vvvv registerCui, Lili3-655/+657
2024-05-03x86: tidy <sse*> templatesJan Beulich1-20/+20
2024-05-03x86/APX: further extend SSE2AVX coverageJan Beulich2-230/+261
2024-05-03x86/APX: extend SSE2AVX coverageJan Beulich2-653/+1987
2024-05-03x86: zap value-less Disp8MemShift from non-EVEX templatesJan Beulich1-7/+19
2024-04-23arm: Fix MVE vmla encodingClaudio Bantaloukas1-1/+1
2024-04-22aarch64: Fix coding style issue in `aarch64-dis.c'Victor Do Nascimento1-1/+1
2024-04-22x86/APX: Add invalid check for APX EVEX.X4.Cui, Lili1-0/+3
2024-04-19mmix disassemble memory leakAlan Modra1-0/+1
2024-04-17aarch64: Remove asserts from operand qualifier decoders [PR31595]Victor Do Nascimento1-18/+80
2024-04-17Add W table for USER_MSR under MAP4.Hu, Lin14-3/+13
2024-04-09aarch64: Treat operand "SME list of ZA tiles" as immediate (PR 31561)Jens Remus1-1/+1
2024-04-09s390: Flag conditional branch relative insns as condjumpJens Remus1-4/+4
2024-04-09arm: Fix disassembly of MVE vq[r]shr[u]nAlex Coplan1-0/+4
2024-04-09arm: Refactor condition for print_mve_shift_nAlex Coplan1-10/+25
2024-04-09RISC-V: Support Zcmp push/pop instructions.Jiawei2-0/+71
2024-04-09Support {evex} pseudo prefix for decode evex promoted insns without egpr32.Hu, Lin12-42/+74
2024-04-07Support APX NFCui, Lili7-397/+825
2024-04-06Revert "x86: Restore APX shift-double instructions with omitted shift count"H.J. Lu2-309/+284
2024-04-05Add missing install-dvi and install-ps Makefie targets.Christophe Lyon1-0/+2
2024-04-04x86: Restore APX shift-double instructions with omitted shift countH.J. Lu2-284/+309
2024-04-03Arm64: check tied operand specifier in aarch64-genJan Beulich2-1/+38
2024-04-03x86: add missing No_qSuf to non-64-bit PTWRITEJan Beulich2-2/+2
2024-04-03x86: drop stray Size64 from WRSSQJan Beulich2-4/+4
2024-04-03x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4Cui, Lili5-313/+72
2024-03-28x86: templatize RAO-INT insnsJan Beulich1-8/+4
2024-03-28x86: templatize ADX insnsJan Beulich1-6/+5
2024-03-28x86: templatize shift-double insnsJan Beulich2-331/+303
2024-03-28x86: templatize shift/rotate insnsJan Beulich2-264/+379
2024-03-28x86: templatize binary ALU insnsJan Beulich2-449/+473
2024-03-28x86: templatize unary ALU insnsJan Beulich2-16/+22
2024-03-28x86: templatize INC/DECJan Beulich3-68/+80
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha4-2486/+2626
2024-03-18Regenerate AArch64 opcodes filesNick Clifton3-468/+583
2024-03-18aarch64: Add support for SVE ADDPT, SUBPT, MADPT, MLAPT instructionsYury Khrustalev1-0/+18
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev6-1/+78
2024-03-18Arm64: check matching operands for predicated B16B16 insnsJan Beulich2-17/+17
2024-03-18Arm64: correct B16B16 indexed bf{mla,mls,mul}Jan Beulich1-3/+3
2024-03-15x86/APX: legacy promoted insns can't access %xmm16-%xmm31Jan Beulich1-0/+5
2024-03-13opcodes: Fix build verbosityChristophe Lyon2-8/+8
2024-03-08RISC-V: Support Zabha extension.Jiawei1-0/+74
2024-03-01s390: Print base register 0 as "0" in disassemblyJens Remus1-4/+13
2024-03-01s390: Warn when register name type does not match operandJens Remus1-31/+31
2024-03-01s390: Add test cases for base/index register 0Jens Remus1-2/+3
2024-03-01s390: Use proper string lengths when parsing opcode table flagsJens Remus1-3/+3
2024-03-01s390: Whitespace fixes in conditional branch flavor descriptionsJens Remus1-3/+3
2024-03-01x86/APX: optimize certain XOR and SUB formsJan Beulich2-4/+4