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2023-03-31RISC-V: Allocate "various" operand typeTsukasa OI2-8/+24
2023-03-31x86: parse VEX and alike specifiers for .insnJan Beulich1-0/+2
2023-03-31x86: introduce .insn directiveJan Beulich3-0/+5
2023-03-30aarch64: Add the RPRFM instructionRichard Sandiford6-885/+925
2023-03-30aarch64: Add the SVE FCLAMP instructionRichard Sandiford2-759/+771
2023-03-30aarch64: Add new SVE shift instructionsRichard Sandiford2-873/+909
2023-03-30aarch64: Add new SVE saturating conversion instructionsRichard Sandiford2-752/+788
2023-03-30aarch64: Add new SVE dot-product instructionsRichard Sandiford6-841/+923
2023-03-30aarch64: Add the SVE BFMLSL instructionsRichard Sandiford2-742/+793
2023-03-30aarch64: Add the SME2 UZP and ZIP instructionsRichard Sandiford2-338/+438
2023-03-30aarch64: Add the SME2 UNPK instructionsRichard Sandiford2-709/+757
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford9-505/+679
2023-03-30aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford6-468/+592
2023-03-30aarch64: Add the SME2 FP<->FP conversion instructionsRichard Sandiford2-948/+1000
2023-03-30aarch64: Add the SME2 FP<->int conversion instructionsRichard Sandiford2-749/+945
2023-03-30aarch64: Add the SME2 CLAMP instructionsRichard Sandiford2-820/+892
2023-03-30aarch64: Add the SME2 MOPA and MOPS instructionsRichard Sandiford2-717/+789
2023-03-30aarch64: Add the SME2 vertical dot-product instructionsRichard Sandiford2-669/+789
2023-03-30aarch64: Add the SME2 dot-product instructionsRichard Sandiford2-753/+1353
2023-03-30aarch64: Add the SME2 MLALL and MLSLL instructionsRichard Sandiford6-851/+1599
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford8-665/+1485
2023-03-30aarch64: Add the SME2 FMLA and FMLS instructionsRichard Sandiford6-529/+753
2023-03-30aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford4-439/+979
2023-03-30aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford8-487/+750
2023-03-30aarch64: Add the SME2 ZT0 instructionsRichard Sandiford8-397/+686
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford10-821/+1270
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford10-448/+2088
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford10-312/+674
2023-03-30aarch64: Add support for predicate-as-counter registersRichard Sandiford6-1597/+1647
2023-03-30aarch64; Add support for vector offset rangesRichard Sandiford1-9/+48
2023-03-30aarch64: Add support for vgx2 and vgx4Richard Sandiford1-8/+41
2023-03-30aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_arrayRichard Sandiford3-7/+7
2023-03-30aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford6-8/+8
2023-03-30aarch64: Prefer register ranges & support wrappingRichard Sandiford1-1/+1
2023-03-30aarch64: Add support for strided register listsRichard Sandiford2-23/+56
2023-03-30aarch64: Sort fields alphanumericallyRichard Sandiford2-163/+164
2023-03-30aarch64: Resync field namesRichard Sandiford1-7/+7
2023-03-30aarch64: Regularise FLD_* suffixesRichard Sandiford6-55/+55
2023-03-30aarch64: Add a aarch64_cpu_supports_inst_p helperRichard Sandiford1-0/+13
2023-03-30aarch64: Reorder some OP_SVE_* macrosRichard Sandiford1-16/+16
2023-03-30aarch64: Rename aarch64-tbl.h OP_SME_* macrosRichard Sandiford1-81/+77
2023-03-30aarch64: Try to report invalid variants against the closest matchRichard Sandiford3-19/+30
2023-03-30aarch64: Make AARCH64_OPDE_REG_LIST take a bitfieldRichard Sandiford1-1/+1
2023-03-30aarch64: Add an operand class for SVE register listsRichard Sandiford3-14/+13
2023-03-30aarch64: Commonise checks for index operandsRichard Sandiford1-18/+32
2023-03-30aarch64: Add an error code for out-of-range registersRichard Sandiford1-6/+14
2023-03-30aarch64: Move w12-w15 range check to libopcodesRichard Sandiford1-6/+20
2023-03-30aarch64: Move ZA range checks to aarch64-opc.cRichard Sandiford3-25/+67
2023-03-30aarch64: Make indexed_za use 64-bit immediatesRichard Sandiford1-3/+3
2023-03-30aarch64: Rename za_tile_vector to za_indexRichard Sandiford3-36/+36