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2022-04-04
opcodes/riscv: implement style support in the disassembler
Andrew Burgess
1
-72
/
+121
2022-03-18
RISC-V: Prefetch hint instructions and operand set
Tsukasa OI
1
-0
/
+4
2022-01-02
Update year range in copyright notice of binutils files
Alan Modra
1
-1
/
+1
2021-11-30
RISC-V: The vtype immediate with more than the defined 8 bits are preserved.
Nelson Chu
1
-1
/
+1
2021-11-30
RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved.
Nelson Chu
1
-1
/
+3
2021-11-26
opcodes/riscv: add disassembler options support to libopcodes
Andrew Burgess
1
-9
/
+138
2021-11-18
RISC-V: Add instructions and operand set for z[fdq]inx
jiawei
1
-0
/
+4
2021-11-17
RISC-V: Support rvv extension with released version 1.0.
Nelson Chu
1
-0
/
+67
2021-11-16
RISC-V: Scalar crypto instructions and operand set.
jiawei
1
-0
/
+8
2021-11-11
RISC-V: Dump objects according to the elf architecture attribute.
Nelson Chu
1
-6
/
+26
2021-10-27
RISC-V: Tidy riscv assembler and disassembler.
Nelson Chu
1
-8
/
+10
2021-09-20
riscv: print .2byte or .4byte before an unknown instruction encoding
Andrew Burgess
1
-1
/
+23
2021-09-08
RISC-V: Pretty print values formed with lui and addiw.
Jim Wilson
1
-5
/
+18
2021-08-30
RISC-V: PR28291, Fix the gdb fails that PR27916 caused.
Nelson Chu
1
-2
/
+2
2021-08-30
RISC-V: PR27916, Support mapping symbols.
Nelson Chu
1
-12
/
+233
2021-05-18
RISC-V: PR27814, Objdump crashes when disassembling a non-ELF RISC-V binary.
Job Noorman
1
-10
/
+14
2021-03-31
Use bool in opcodes
Alan Modra
1
-7
/
+7
2021-03-31
Remove bfd_stdint.h
Alan Modra
1
-1
/
+1
2021-02-19
RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.
Nelson Chu
1
-20
/
+17
2021-02-18
RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.
Nelson Chu
1
-8
/
+13
2021-01-15
RISC-V: Error and warning messages tidy.
Nelson Chu
1
-1
/
+1
2021-01-15
RISC-V: Comments tidy and improvement.
Nelson Chu
1
-15
/
+13
2021-01-01
Update year range in copyright notice of binutils files
Alan Modra
1
-1
/
+1
2020-12-10
RISC-V: Dump CSR according to the elf privileged spec attributes.
Nelson Chu
1
-3
/
+34
2020-06-30
RISC-V: Support debug and float CSR as the unprivileged ones.
Nelson Chu
1
-3
/
+6
2020-06-22
RISC-V: Report warning when linking the objects with different priv specs.
Nelson Chu
1
-0
/
+1
2020-05-20
[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...
Nelson Chu
1
-10
/
+70
2020-02-20
RISC-V: Support the ISA-dependent CSR checking.
Nelson Chu
1
-1
/
+1
2020-01-01
Update year range in copyright notice of binutils files
Alan Modra
1
-1
/
+1
2019-06-26
RISC-V: Make objdump disassembly work right for binary files.
Jim Wilson
1
-1
/
+5
2019-01-01
Update year range in copyright notice of binutils files
Alan Modra
1
-1
/
+1
2018-12-18
Include bfd_stdint.h in bfd.h
Alan Modra
1
-1
/
+1
2018-12-06
opcodes/riscv: Hide '.L0 ' fake symbols
Andrew Burgess
1
-0
/
+17
2018-12-03
RISC-V: Accept version, supervisor ext and more than one NSE for -march.
Jim Wilson
1
-1
/
+1
2018-08-30
RISC-V: Allow instruction require more than one extension
Jim Wilson
1
-1
/
+1
2018-07-30
RISC-V: Set insn info fields correctly when disassembling.
Jim Wilson
1
-0
/
+26
2018-03-03
opcodes error messages
Alan Modra
1
-2
/
+2
2018-01-09
RISC-V: Disassemble x0 based addresses as 0.
Jim Wilson
1
-1
/
+1
2018-01-05
RISC-V: Print symbol address for jalr w/ zero offset.
Jim Wilson
1
-0
/
+2
2018-01-03
Update year range in copyright notice of binutils files
Alan Modra
1
-1
/
+1
2017-07-25
Fix typos in error and option messages in OPCODES library.
Nick Clifton
1
-1
/
+1
2017-05-24
Move print_insn_XXX to an opcodes internal header
Yao Qi
1
-1
/
+1
2017-05-04
RISC-V: Fix disassemble for c.li, c.andi and c.addiw
Kito Cheng
1
-0
/
+1
2017-04-04
RISC-V: Resurrect GP-relative disassembly hints
Palmer Dabbelt
1
-1
/
+1
2017-01-03
Add fall through comment.
Dilyan Palauzov
1
-0
/
+1
2017-01-02
Update year range in copyright notice of all files.
Alan Modra
1
-1
/
+1
2016-12-20
Re-work RISC-V gas flags: now we just support -mabi and -march
Andrew Waterman
1
-2
/
+6
2016-11-01
Add support for RISC-V architecture.
Nick Clifton
1
-0
/
+502