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authorAlan Modra <amodra@gmail.com>2021-03-31 10:36:19 +1030
committerAlan Modra <amodra@gmail.com>2021-03-31 10:49:23 +1030
commit78933a4ad9ae9c2e274d41e6b3036ea582c47810 (patch)
treed88281747f95a9e279e16043aaf57c7093481d85 /opcodes/riscv-dis.c
parent0a1b45a20eaa98d4d9026dc1fd17e79e741183af (diff)
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Use bool in opcodes
cpu/ * frv.opc: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout. opcodes/ * sysdep.h (POISON_BFD_BOOLEAN): Define. * aarch64-asm-2.c, * aarch64-asm.c, * aarch64-asm.h, * aarch64-dis-2.c, * aarch64-dis.c, * aarch64-dis.h, * aarch64-gen.c, * aarch64-opc.c, * aarch64-opc.h, * arc-dis.c, * arc-dis.h, * arc-fxi.h, * arc-opc.c, * arm-dis.c, * bfin-dis.c, * cris-dis.c, * csky-dis.c, * csky-opc.h, * dis-buf.c, * disassemble.c, * frv-opc.c, * frv-opc.h, * h8300-dis.c, * i386-dis.c, * m68k-dis.c, * metag-dis.c, * microblaze-dis.c, * microblaze-dis.h, * micromips-opc.c, * mips-dis.c, * mips-formats.h, * mips-opc.c, * mips16-opc.c, * mmix-dis.c, * msp430-dis.c, * nds32-dis.c, * nfp-dis.c, * nios2-dis.c, * ppc-dis.c, * riscv-dis.c, * score-dis.c, * score7-dis.c, * tic6x-dis.c, * v850-dis.c, * vax-dis.c, * wasm32-dis.c, * xtensa-dis.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout.
Diffstat (limited to 'opcodes/riscv-dis.c')
-rw-r--r--opcodes/riscv-dis.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 7ef4d4d..025d134 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -55,7 +55,7 @@ set_default_riscv_dis_options (void)
no_aliases = 0;
}
-static bfd_boolean
+static bool
parse_riscv_dis_option_without_args (const char *option)
{
if (strcmp (option, "no-aliases") == 0)
@@ -66,8 +66,8 @@ parse_riscv_dis_option_without_args (const char *option)
riscv_fpr_names = riscv_fpr_names_numeric;
}
else
- return FALSE;
- return TRUE;
+ return false;
+ return true;
}
static void
@@ -374,7 +374,7 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
case 'E':
{
static const char *riscv_csr_hash[4096]; /* Total 2^12 CSRs. */
- static bfd_boolean init_csr = FALSE;
+ static bool init_csr = false;
unsigned int csr = EXTRACT_OPERAND (CSR, l);
if (!init_csr)
@@ -429,7 +429,7 @@ static int
riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
{
const struct riscv_opcode *op;
- static bfd_boolean init = 0;
+ static bool init = 0;
static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1];
struct riscv_private_data *pd;
int insnlen;
@@ -616,14 +616,14 @@ riscv_get_disassembler (bfd *abfd)
/* Prevent use of the fake labels that are generated as part of the DWARF
and for relaxable relocations in the assembler. */
-bfd_boolean
+bool
riscv_symbol_is_valid (asymbol * sym,
struct disassemble_info * info ATTRIBUTE_UNUSED)
{
const char * name;
if (sym == NULL)
- return FALSE;
+ return false;
name = bfd_asymbol_name (sym);