Age | Commit message (Expand) | Author | Files | Lines |
2022-12-22 | sim: drop unused SIM_ADDR type [PR sim/7504] | Mike Frysinger | 1 | -6/+0 |
2022-12-22 | sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504] | Mike Frysinger | 1 | -2/+4 |
2022-12-22 | sframe.h: add support for .cfi_b_key_frame | Indu Bhagat | 1 | -6/+19 |
2022-12-20 | sim: move register headers into sim/ namespace [PR sim/29869] | Mike Frysinger | 15 | -0/+0 |
2022-12-16 | libsframe: provide new access API for mangled RA bit | Indu Bhagat | 1 | -0/+7 |
2022-12-16 | sframe.h: add support for .cfi_negate_ra_state | Indu Bhagat | 1 | -8/+15 |
2022-12-15 | libsframe asan: avoid generating misaligned loads | Indu Bhagat | 1 | -2/+6 |
2022-12-09 | libsframe: rename API sframe_fde_func_info to sframe_fde_create_func_info | Indu Bhagat | 1 | -2/+2 |
2022-12-09 | sframe: gas: libsframe: define constants and remove magic numbers | Indu Bhagat | 1 | -0/+15 |
2022-12-09 | sframe.h: make some macros more precise | Indu Bhagat | 1 | -3/+4 |
2022-12-07 | Compression tidy and fixes | Alan Modra | 1 | -3/+0 |
2022-11-28 | xtensa: allow dynamic configuration | Max Filippov | 1 | -0/+442 |
2022-11-25 | riscv: Add AIA extension support (Smaia, Ssaia) | Christoph Müllner | 1 | -0/+68 |
2022-11-19 | RISC-V: Add 'Ssstateen' extension and its CSRs | Tsukasa OI | 1 | -13/+13 |
2022-11-17 | RISC-V: Add T-Head Int vendor extension | Christoph Müllner | 2 | -0/+9 |
2022-11-17 | RISC-V: Add T-Head Fmv vendor extension | Christoph Müllner | 2 | -0/+9 |
2022-11-15 | readelf/objdump: support for SFrame section | Indu Bhagat | 1 | -0/+3 |
2022-11-15 | bfd: linker: merge .sframe sections | Indu Bhagat | 3 | -1/+3 |
2022-11-15 | libsframe: add the SFrame library | Weimin Pan | 1 | -0/+231 |
2022-11-15 | sframe.h: Add SFrame format definition | Indu Bhagat | 1 | -0/+303 |
2022-11-14 | aarch64: Add support for Common Short Sequence Compression extension | Andre Vieira | 1 | -1/+5 |
2022-11-08 | sim: drop unused CORE_ADDR_TYPE | Mike Frysinger | 1 | -7/+0 |
2022-11-02 | sim: common: change sim_{fetch,store}_register helpers to use void* buffers | Mike Frysinger | 1 | -3/+2 |
2022-10-31 | sim: reg: constify store helper | Mike Frysinger | 1 | -1/+2 |
2022-10-31 | sim: common: change sim_read & sim_write to use void* buffers | Mike Frysinger | 1 | -2/+2 |
2022-10-28 | include: Define macro to ignore -Wdeprecated-declarations on GCC | Tsukasa OI | 1 | -0/+3 |
2022-10-27 | PowerPC: Add support for RFC02653 - Dense Math Facility | Peter Bergner | 1 | -15/+18 |
2022-10-19 | aarch64-pe support for LD, GAS and BFD | Jedidiah Thompson | 1 | -0/+22 |
2022-10-14 | e200 LSP support | Alan Modra | 1 | -0/+5 |
2022-10-14 | RISC-V: Move certain arrays to riscv-opc.c | Tsukasa OI | 1 | -11/+2 |
2022-10-04 | RISC-V: Fix buffer overflow on print_insn_riscv | Tsukasa OI | 1 | -0/+2 |
2022-10-04 | RISC-V: Renamed INSN_CLASS for floating point in integer extensions. | Nelson Chu | 1 | -7/+7 |
2022-10-04 | RISC-V/gas: allow generating up to 176-bit instructions with .insn | Jan Beulich | 1 | -0/+3 |
2022-10-03 | Fix self-move warning check for GCC 13+ | Jan-Benedict Glaw | 2 | -0/+8 |
2022-09-30 | LoongArch: Update ELF e_flags handling according to specification. | liuzhensong | 1 | -23/+21 |
2022-09-23 | Support AT_USRSTACKBASE and AT_USRSTACKLIM. | John Baldwin | 1 | -0/+2 |
2022-09-23 | RISC-V: Add Zawrs ISA extension support | Christoph Müllner | 2 | -0/+9 |
2022-09-22 | RISC-V: Add T-Head MemPair vendor extension | Christoph Müllner | 2 | -0/+18 |
2022-09-22 | RISC-V: Add T-Head MemIdx vendor extension | Christoph Müllner | 2 | -0/+135 |
2022-09-22 | RISC-V: Add T-Head FMemIdx vendor extension | Christoph Müllner | 2 | -0/+27 |
2022-09-22 | RISC-V: Add T-Head MAC vendor extension | Christoph Müllner | 2 | -0/+21 |
2022-09-22 | RISC-V: Add T-Head CondMov vendor extension | Christoph Müllner | 2 | -0/+9 |
2022-09-22 | RISC-V: Add T-Head Bitmanip vendor extension | Christoph Müllner | 2 | -0/+42 |
2022-09-22 | RISC-V: Add support for arbitrary immediate encoding formats | Christoph Müllner | 1 | -0/+17 |
2022-09-22 | RISC-V: Add T-Head SYNC vendor extension | Christoph Müllner | 2 | -0/+18 |
2022-09-22 | RISC-V: Add T-Head CMO vendor extension | Christoph Müllner | 2 | -0/+66 |
2022-09-22 | include: Add macro to ignore -Wunused-but-set-variable | Tsukasa OI | 1 | -0/+14 |
2022-09-22 | include: Add macro to ignore -Wuser-defined-warnings | Tsukasa OI | 1 | -0/+9 |
2022-09-21 | gdbsupport: move include/gdb/fileio.h contents to fileio.h | Simon Marchi | 1 | -144/+0 |
2022-09-21 | RISC-V: Implement Ztso extension | Shihua | 1 | -0/+3 |