| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-08-30 | RISC-V: Allow instruction require more than one extension | Jim Wilson | 1 | -2/+8 |
| 2018-07-30 | RISC-V: Set insn info fields correctly when disassembling. | Jim Wilson | 1 | -0/+26 |
| 2018-03-14 | RISC-V: Add .insn support. | Jim Wilson | 1 | -0/+21 |
| 2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2017-10-24 | RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2 | Andrew Waterman | 1 | -1/+1 |
| 2017-01-03 | Add support for the Q extension to the RISCV ISA. | Kito Cheng | 1 | -0/+2 |
| 2017-01-02 | Update year range in copyright notice of all files. | Alan Modra | 1 | -1/+1 |
| 2016-11-01 | Add support for RISC-V architecture. | Nick Clifton | 1 | -0/+342 |
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index : riscv-gnu-toolchain/gdb.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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