riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-01-15	RISC-V: Indent and GNU coding standards tidy, also aligned the code.	Nelson Chu	1	-44/+51
2021-01-15	RISC-V: Comments tidy and improvement.	Nelson Chu	1	-23/+9
2021-01-07	RISC-V: Add pause hint instruction.	Philipp Tomsich	1	-0/+1
2021-01-07	RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructions (v0.93).	Claire Xenia Wolf	1	-1/+6
2021-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2020-12-10	RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions.	Nelson Chu	1	-0/+4
2020-12-10	RISC-V: Control fence.i and csr instructions by zifencei and zicsr.	Nelson Chu	1	-2/+4
2020-12-01	RISC-V: Support to add implicit extensions for G.	Nelson Chu	1	-0/+2
2020-12-01	RISC-V: Improve the version parsing for arch string.	Nelson Chu	1	-2/+2
2020-08-31	PR26493 UBSAN: elfnn-riscv.c left shift of negative value	Alan Modra	1	-4/+4
2020-06-30	RISC-V: Support debug and float CSR as the unprivileged ones.	Nelson Chu	1	-0/+1
2020-06-22	RISC-V: Report warning when linking the objects with different priv specs.	Nelson Chu	1	-4/+0
2020-06-12	RISC-V: Drop the privileged spec v1.9 support.	Nelson Chu	1	-1/+0
2020-06-03	RISC-V: Fix the error when building RISC-V linux native gdbserver.	Nelson Chu	1	-3/+2
2020-05-20	[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...	Nelson Chu	1	-0/+76
2020-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2019-09-17	RISC-V: Gate opcode tables by enum rather than string.	Jim Wilson	1	-3/+20
2019-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2018-12-06	opcodes/riscv: Hide '.L0 ' fake symbols	Andrew Burgess	1	-0/+6
2018-12-03	RISC-V: Accept version, supervisor ext and more than one NSE for -march.	Jim Wilson	1	-1/+1
2018-11-27	RISC-V: Add .insn CA support.	Jim Wilson	1	-0/+4
2018-08-30	RISC-V: Allow instruction require more than one extension	Jim Wilson	1	-2/+8
2018-07-30	RISC-V: Set insn info fields correctly when disassembling.	Jim Wilson	1	-0/+26
2018-03-14	RISC-V: Add .insn support.	Jim Wilson	1	-0/+21
2018-01-03	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2017-10-24	RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2	Andrew Waterman	1	-1/+1
2017-01-03	Add support for the Q extension to the RISCV ISA.	Kito Cheng	1	-0/+2
2017-01-02	Update year range in copyright notice of all files.	Alan Modra	1	-1/+1
2016-11-01	Add support for RISC-V architecture.	Nick Clifton	1	-0/+342