| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-03-19 | LoongArch: Add relaxation for R_LARCH_CALL36 | mengqinggang | 5 | -147/+175 |
| 2024-03-18 | aarch64: Add support for SVE ADDPT, SUBPT, MADPT, MLAPT instructions | Yury Khrustalev | 9 | -2/+311 |
| 2024-03-18 | aarch64: Add support for (M)ADDPT and (M)SUBPT instructions | Yury Khrustalev | 9 | -0/+232 |
| 2024-03-18 | Arm64: check matching operands for predicated B16B16 insns | Jan Beulich | 6 | -36/+62 |
| 2024-03-18 | Arm64: correct B16B16 indexed bf{mla,mls,mul} | Jan Beulich | 1 | -18/+18 |
| 2024-03-18 | RISC-V: Tidy smstateen and ssstateen testcases. | Nelson Chu | 4 | -57/+6 |
| 2024-03-15 | gas/NEWS: Remove mention of AArch64 B16B16 extension | Andrew Carlotti | 1 | -3/+0 |
| 2024-03-15 | x86/APX: legacy promoted insns can't access %xmm16-%xmm31 | Jan Beulich | 9 | -139/+119 |
| 2024-03-13 | RISC-V: Add -march=help for gas | Hau Hsu | 3 | -0/+126 |
| 2024-03-12 | LoongArch: Scan all illegal operand instructions without interruption | Lulu Cai | 8 | -7/+269 |
| 2024-03-12 | LoongArch: Fix gas and ld test cases | Lulu Cai | 2 | -0/+6 |
| 2024-03-11 | x86: KeyLocker insn interaction with -msse-check / .sse_check | Jan Beulich | 6 | -3/+49 |
| 2024-03-11 | x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128 | Jan Beulich | 1 | -1/+3 |
| 2024-03-11 | x86: don't open-code REG_{SP,FP} | Jan Beulich | 1 | -2/+2 |
| 2024-03-08 | gas: Fix x86 build with GCC 6.4 | H.J. Lu | 1 | -1/+1 |
| 2024-03-08 | RISC-V: Support Zabha extension. | Jiawei | 3 | -0/+235 |
| 2024-03-06 | LoongArch: Fix some test cases for TLS transition and relax | Lulu Cai | 10 | -46/+41 |
| 2024-03-06 | LoongArch: Delete extra instructions when TLS type transition | Lulu Cai | 1 | -5/+26 |
| 2024-03-05 | LoongArch: Add gas testsuit for LA32 relocations | Lulu Cai | 2 | -0/+136 |
| 2024-03-05 | LoongArch: Add gas testsuit for LA64 relocations | Lulu Cai | 2 | -0/+253 |
| 2024-03-05 | LoongArch: Add gas testsuit for LA32 int/float instructions | Lulu Cai | 4 | -0/+609 |
| 2024-03-05 | LoongArch: Add gas testsuit for LA64 int/float instructions | Lulu Cai | 4 | -0/+1192 |
| 2024-03-05 | LoongArch: Add gas testsuit for lsx/lasx instructions | Lulu Cai | 4 | -0/+2938 |
| 2024-03-05 | LoongArch: Add gas testsuit for lbt/lvz instructions | Lulu Cai | 4 | -0/+382 |
| 2024-03-05 | LoongArch: Add gas testsuit for alias instructions | Lulu Cai | 4 | -0/+60 |
| 2024-03-01 | s390: Be more verbose about missing operand type | Jens Remus | 3 | -18/+54 |
| 2024-03-01 | s390: Provide operand number in assembler warning and error messages | Jens Remus | 6 | -165/+206 |
| 2024-03-01 | s390: Allow to explicitly omit base register operand in assembly | Jens Remus | 10 | -165/+120 |
| 2024-03-01 | s390: Print base register 0 as "0" in disassembly | Jens Remus | 2 | -35/+35 |
| 2024-03-01 | s390: Warn when register name type does not match operand | Jens Remus | 12 | -22/+204 |
| 2024-03-01 | s390: Revise s390-specific assembler option descriptions | Jens Remus | 1 | -10/+18 |
| 2024-03-01 | s390: Add test case for disassembler option warn-areg-zero | Jens Remus | 3 | -0/+182 |
| 2024-03-01 | s390: Add test cases for base/index register 0 | Jens Remus | 5 | -0/+394 |
| 2024-03-01 | s390: Add comments to assembler operand parsing logic | Jens Remus | 1 | -6/+25 |
| 2024-03-01 | s390: Assemble processor specific test cases for their processor | Jens Remus | 1 | -2/+2 |
| 2024-03-01 | s390: Correct setting of highgprs flag in ELF output | Jens Remus | 10 | -6/+143 |
| 2024-03-01 | s390: Do not erroneously use base operand value for length operand | Jens Remus | 6 | -17/+110 |
| 2024-03-01 | s390: Enhance handling of syntax errors in assembler | Jens Remus | 1 | -2/+4 |
| 2024-03-01 | s390: Lower severity of assembler syntax errors from fatal to error | Jens Remus | 2 | -7/+7 |
| 2024-03-01 | x86: adjust which Dwarf2 register numbers to use | Jan Beulich | 2 | -23/+9 |
| 2024-03-01 | gas/NEWS: drop mention of Arm64's SVE2.1 and SME2.1 | Jan Beulich | 1 | -5/+1 |
| 2024-03-01 | x86/APX: honor -mevexwig= for byte-size insns | Jan Beulich | 3 | -0/+171 |
| 2024-03-01 | x86/APX: optimize certain XOR and SUB forms | Jan Beulich | 3 | -0/+76 |
| 2024-03-01 | x86/APX: correct .insn opcode space determination when REX2 is needed | Jan Beulich | 4 | -28/+97 |
| 2024-03-01 | x86/APX: respect {vex}/{vex3} | Jan Beulich | 4 | -137/+234 |
| 2024-02-29 | aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions. | Srinath Parvathaneni | 3 | -49/+49 |
| 2024-02-29 | RISC-V: Add assembly support for TLSDESC. | Tatsuyuki Ishi | 3 | -5/+73 |
| 2024-02-29 | PR23877, bad value (n32r5900) for default CPU | Alan Modra | 1 | -1/+3 |
| 2024-02-27 | aarch64: rename internals related to PAuth feature to use pauth in their nami... | Matthieu Longo | 1 | -2/+2 |
| 2024-02-24 | PR25333, GAS is slow processing -fdebug-types-sections | Alan Modra | 9 | -126/+173 |
