aarch64: Add support for (M)ADDPT and (M)SUBPT instructions

The following instructions are added in this patch:

 - ADDPT and SUBPT - Add/Subtract checked pointer
 - MADDPT and MSUBPT - Multiply Add/Subtract checked pointer

These instructions are part of Checked Pointer Arithmetic extension.
This patch adds assembler and disassembler support for these instructions
with relevant checks. Tests are included as well.

A new flag "+cpa" added to documentation. This flag enables CPA extension.

Regression tested on the aarch64-none-linux-gnu target and no regressions
have been found.

9 files changed, 232 insertions, 0 deletions

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 4380de3..d6dab86 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3748,6 +3748,41 @@ parse_shifter_operand (char **str, aarch64_opnd_info *operand,
   return parse_shifter_operand_imm (str, operand, mode);
 }
 
+static bool
+parse_reg_lsl_shifter_operand (char **str, aarch64_opnd_info *operand)
+{
+  aarch64_opnd_qualifier_t qualifier;
+  const reg_entry *reg = aarch64_reg_parse_32_64 (str, &qualifier);
+
+  if (reg)
+    {
+      if (!aarch64_check_reg_type (reg, REG_TYPE_R_ZR))
+	{
+	  set_expected_reg_error (REG_TYPE_R_ZR, reg, 0);
+	  return false;
+	}
+
+      operand->reg.regno = reg->number;
+      operand->qualifier = qualifier;
+
+      /* Accept optional LSL shift operation on register.  */
+      if (!skip_past_comma (str))
+	return true;
+
+      if (!parse_shift (str, operand, SHIFTED_LSL))
+	return false;
+
+      return true;
+    }
+  else
+    {
+      set_syntax_error
+	(_("integer register expected in the shifted operand "
+	   "register"));
+      return false;
+    }
+}
+
 /* Return TRUE on success; return FALSE otherwise.  */
 
 static bool
@@ -6593,6 +6628,17 @@ parse_operands (char *str, const aarch64_opcode *opcode)
 	    }
 	  break;
 
+	case AARCH64_OPND_Rm_LSL:
+	  po_misc_or_fail (parse_reg_lsl_shifter_operand (&str, info));
+	  if (!info->shifter.operator_present)
+	    {
+	      /* Default to LSL #0 if not present. */
+	      gas_assert (info->shifter.kind == AARCH64_MOD_NONE);
+	      info->shifter.kind = AARCH64_MOD_LSL;
+	      info->shifter.amount = 0;
+	    }
+	  break;
+
 	case AARCH64_OPND_Fd:
 	case AARCH64_OPND_Fn:
 	case AARCH64_OPND_Fm:
@@ -10429,6 +10475,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"sme2p1",		AARCH64_FEATURE (SME2p1), AARCH64_FEATURE (SME2)},
   {"sve2p1",		AARCH64_FEATURE (SVE2p1), AARCH64_FEATURE (SVE2)},
   {"rcpc3",		AARCH64_FEATURE (RCPC3), AARCH64_FEATURE (RCPC2)},
+  {"cpa",		AARCH64_FEATURE (CPA), AARCH64_NO_FEATURES},
   {NULL,		AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
 };
 
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 4f97768..3756948 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -289,6 +289,8 @@ automatically cause those extensions to be disabled.
  @tab Enable @code{wfet} and @code{wfit} instructions.
 @item @code{xs} @tab
  @tab Enable the XS memory attribute extension.
+@item @code{cpa} @tab
+ @tab Enable the Checked Pointer Arithmetic extension.
 @end multitable
 
 @multitable @columnfractions .20 .80
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-bad.d b/gas/testsuite/gas/aarch64/cpa-addsub-bad.d
new file mode 100644
index 0000000..0fbcfe3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-bad.d
@@ -0,0 +1,4 @@
+#name: Incorrect input test for CPA instructions ((M)ADDPT and (M)SUBPT).
+#as: -march=armv8-a+cpa
+#source: cpa-addsub-bad.s
+#error_output: cpa-addsub-bad.l
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-bad.l b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l
new file mode 100644
index 0000000..f5e8967
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l
@@ -0,0 +1,50 @@
+.*: Assembler messages:
+.*: Error: operand mismatch -- `addpt w5,w8,w0'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+addpt x5, x8, x0
+.*: Error: only 'LSL' shift is permitted at operand 3 -- `addpt x5,x8,x0,asr#6'
+.*: Error: shift amount out of range 0 to 7 at operand 3 -- `addpt x5,x8,x0,lsl#9'
+.*: Error: expected an integer or zero register at operand 3 -- `addpt x5,x8,sp,lsl#5'
+.*: Error: expected an integer or stack pointer register at operand 1 -- `addpt xzr,x8,x0,lsl#3'
+
+.*: Error: operand mismatch -- `subpt w5,w8,w0'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+subpt x5, x8, x0
+.*: Error: only 'LSL' shift is permitted at operand 3 -- `subpt x5,x8,x0,asr#6'
+.*: Error: shift amount out of range 0 to 7 at operand 3 -- `subpt x5,x8,x0,lsl#9'
+.*: Error: expected an integer or zero register at operand 3 -- `subpt x5,x8,sp,lsl#5'
+.*: Error: expected an integer or stack pointer register at operand 1 -- `subpt xzr,x8,x0,lsl#3'
+
+.*: Error: operand mismatch -- `maddpt w1,x2,x3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+maddpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `maddpt x1,w2,x3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+maddpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `maddpt x1,x2,w3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+maddpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `maddpt x1,x2,x3,w4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+maddpt x1, x2, x3, x4
+.*: Error: expected an integer or zero register at operand 1 -- `maddpt sp,x2,x3,x4'
+.*: Error: expected an integer or zero register at operand 2 -- `maddpt x1,sp,x3,x4'
+.*: Error: expected an integer or zero register at operand 3 -- `maddpt x1,x2,sp,x4'
+.*: Error: expected an integer or zero register at operand 4 -- `maddpt x1,x2,x3,sp'
+
+.*: Error: operand mismatch -- `msubpt w1,x2,x3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+msubpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `msubpt x1,w2,x3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+msubpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `msubpt x1,x2,w3,x4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+msubpt x1, x2, x3, x4
+.*: Error: operand mismatch -- `msubpt x1,x2,x3,w4'
+.*: Info:\s+did you mean this\?
+.*: Info:\s+msubpt x1, x2, x3, x4
+.*: Error: expected an integer or zero register at operand 1 -- `msubpt sp,x2,x3,x4'
+.*: Error: expected an integer or zero register at operand 2 -- `msubpt x1,sp,x3,x4'
+.*: Error: expected an integer or zero register at operand 3 -- `msubpt x1,x2,sp,x4'
+.*: Error: expected an integer or zero register at operand 4 -- `msubpt x1,x2,x3,sp'
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-bad.s b/gas/testsuite/gas/aarch64/cpa-addsub-bad.s
new file mode 100644
index 0000000..dec18c3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-bad.s
@@ -0,0 +1,29 @@
+addpt	w5, w8, w0
+addpt	x5, x8, x0, asr #6
+addpt	x5, x8, x0, lsl #9
+addpt	x5, x8, sp, lsl #5
+addpt	xzr, x8, x0, lsl #3
+
+subpt	w5, w8, w0
+subpt	x5, x8, x0, asr #6
+subpt	x5, x8, x0, lsl #9
+subpt	x5, x8, sp, lsl #5
+subpt	xzr, x8, x0, lsl #3
+
+maddpt	w1, x2, x3, x4
+maddpt	x1, w2, x3, x4
+maddpt	x1, x2, w3, x4
+maddpt	x1, x2, x3, w4
+maddpt	sp, x2, x3, x4
+maddpt	x1, sp, x3, x4
+maddpt	x1, x2, sp, x4
+maddpt	x1, x2, x3, sp
+
+msubpt	w1, x2, x3, x4
+msubpt	x1, w2, x3, x4
+msubpt	x1, x2, w3, x4
+msubpt	x1, x2, x3, w4
+msubpt	sp, x2, x3, x4
+msubpt	x1, sp, x3, x4
+msubpt	x1, x2, sp, x4
+msubpt	x1, x2, x3, sp
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-neg.d b/gas/testsuite/gas/aarch64/cpa-addsub-neg.d
new file mode 100644
index 0000000..0a1d118
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-neg.d
@@ -0,0 +1,5 @@
+#name: Negative test for CPA instructions ((M)ADDPT and (M)SUBPT).
+#as: -march=armv8-a
+#as: -march=armv9-a
+#source: cpa-addsub.s
+#error_output: cpa-addsub-neg.l
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-neg.l b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l
new file mode 100644
index 0000000..44a7236
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l
@@ -0,0 +1,27 @@
+.*: Assembler messages:
+.*: Error: selected processor does not support `addpt x0,x0,x0'
+.*: Error: selected processor does not support `addpt sp,x0,x0'
+.*: Error: selected processor does not support `addpt x0,sp,x0'
+.*: Error: selected processor does not support `addpt x0,x0,xzr'
+.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#0'
+.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#7'
+.*: Error: selected processor does not support `addpt x8,x13,x29,lsl#5'
+.*: Error: selected processor does not support `subpt x0,x0,x0'
+.*: Error: selected processor does not support `subpt sp,x0,x0'
+.*: Error: selected processor does not support `subpt x0,sp,x0'
+.*: Error: selected processor does not support `subpt x0,x0,xzr'
+.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#0'
+.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#7'
+.*: Error: selected processor does not support `subpt x1,x10,x22,lsl#2'
+.*: Error: selected processor does not support `maddpt x0,x0,x0,x0'
+.*: Error: selected processor does not support `maddpt xzr,x0,x0,x0'
+.*: Error: selected processor does not support `maddpt x0,xzr,x0,x0'
+.*: Error: selected processor does not support `maddpt x0,x0,xzr,x0'
+.*: Error: selected processor does not support `maddpt x0,x0,x0,xzr'
+.*: Error: selected processor does not support `maddpt x19,x10,x1,x28'
+.*: Error: selected processor does not support `msubpt x0,x0,x0,x0'
+.*: Error: selected processor does not support `msubpt xzr,x0,x0,x0'
+.*: Error: selected processor does not support `msubpt x0,xzr,x0,x0'
+.*: Error: selected processor does not support `msubpt x0,x0,xzr,x0'
+.*: Error: selected processor does not support `msubpt x0,x0,x0,xzr'
+.*: Error: selected processor does not support `msubpt x4,x13,x9,x21'
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub.d b/gas/testsuite/gas/aarch64/cpa-addsub.d
new file mode 100644
index 0000000..73e9ea2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub.d
@@ -0,0 +1,39 @@
+#name: Tests for CPA instructions ((M)ADDPT and (M)SUBPT).
+#as: -march=armv8-a+cpa
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+.*:	9a002000 	addpt	x0, x0, x0
+.*:	9a00201f 	addpt	sp, x0, x0
+.*:	9a0023e0 	addpt	x0, sp, x0
+.*:	9a1f2000 	addpt	x0, x0, xzr
+.*:	9a002000 	addpt	x0, x0, x0
+.*:	9a003c00 	addpt	x0, x0, x0, lsl #7
+.*:	9a1d35a8 	addpt	x8, x13, x29, lsl #5
+
+.*:	da002000 	subpt	x0, x0, x0
+.*:	da00201f 	subpt	sp, x0, x0
+.*:	da0023e0 	subpt	x0, sp, x0
+.*:	da1f2000 	subpt	x0, x0, xzr
+.*:	da002000 	subpt	x0, x0, x0
+.*:	da003c00 	subpt	x0, x0, x0, lsl #7
+.*:	da162941 	subpt	x1, x10, x22, lsl #2
+
+.*:	9b600000 	maddpt	x0, x0, x0, x0
+.*:	9b60001f 	maddpt	xzr, x0, x0, x0
+.*:	9b6003e0 	maddpt	x0, xzr, x0, x0
+.*:	9b7f0000 	maddpt	x0, x0, xzr, x0
+.*:	9b607c00 	maddpt	x0, x0, x0, xzr
+.*:	9b617153 	maddpt	x19, x10, x1, x28
+
+.*:	9b608000 	msubpt	x0, x0, x0, x0
+.*:	9b60801f 	msubpt	xzr, x0, x0, x0
+.*:	9b6083e0 	msubpt	x0, xzr, x0, x0
+.*:	9b7f8000 	msubpt	x0, x0, xzr, x0
+.*:	9b60fc00 	msubpt	x0, x0, x0, xzr
+.*:	9b69d5a4 	msubpt	x4, x13, x9, x21
diff --git a/gas/testsuite/gas/aarch64/cpa-addsub.s b/gas/testsuite/gas/aarch64/cpa-addsub.s
new file mode 100644
index 0000000..8d64dd8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/cpa-addsub.s
@@ -0,0 +1,29 @@
+addpt   x0, x0, x0
+addpt   sp, x0, x0
+addpt   x0, sp, x0
+addpt   x0, x0, xzr
+addpt   x0, x0, x0, lsl #0
+addpt   x0, x0, x0, lsl #7
+addpt   x8, x13, x29, lsl #5
+
+subpt   x0, x0, x0
+subpt   sp, x0, x0
+subpt   x0, sp, x0
+subpt   x0, x0, xzr
+subpt   x0, x0, x0, lsl #0
+subpt   x0, x0, x0, lsl #7
+subpt   x1, x10, x22, lsl #2
+
+maddpt  x0, x0, x0, x0
+maddpt  xzr, x0, x0, x0
+maddpt  x0, xzr, x0, x0
+maddpt  x0, x0, xzr, x0
+maddpt  x0, x0, x0, xzr
+maddpt  x19, x10, x1, x28
+
+msubpt  x0, x0, x0, x0
+msubpt  xzr, x0, x0, x0
+msubpt  x0, xzr, x0, x0
+msubpt  x0, x0, xzr, x0
+msubpt  x0, x0, x0, xzr
+msubpt  x4, x13, x9, x21