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authorJiawei <jiawei@iscas.ac.cn>2024-02-28 16:27:17 +0800
committerNelson Chu <nelson@rivosinc.com>2024-03-08 10:04:25 +0800
commitdac0b8a4af48e1c5739a19cd5501c7a81bc44ab0 (patch)
tree227d87a28af1ea66c635a72e0252864c18502d6b /gas
parentacab5b12b9765d856d8618c11e4f54115396fda7 (diff)
downloadgdb-dac0b8a4af48e1c5739a19cd5501c7a81bc44ab0.zip
gdb-dac0b8a4af48e1c5739a19cd5501c7a81bc44ab0.tar.gz
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RISC-V: Support Zabha extension.
The Zabha extension[1] supports for byte and halfword atomic memory operations. This patch add all instructions include in Zabha. Further work is waiting Zacas[2] merge. [1] https://github.com/riscv/riscv-zabha/tags [2] https://sourceware.org/pipermail/binutils/2023-May/127700.html Version log: Add new imply relation that Zabha extension implies A extension. bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): New imply. (riscv_multi_subset_supports): New extension. (riscv_multi_subset_supports_ext): Ditto. gas/ChangeLog: * testsuite/gas/riscv/zabha-32.d: New test. * testsuite/gas/riscv/zabha.d: New test. * testsuite/gas/riscv/zabha.s: New test. include/ChangeLog: * opcode/riscv-opc.h (MATCH_AMOADD_B): New opcodes. (MASK_AMOADD_B): Ditto. (MATCH_AMOXOR_B): Ditto. (MASK_AMOXOR_B): Ditto. (MATCH_AMOOR_B): Ditto. (MASK_AMOOR_B): Ditto. (MATCH_AMOAND_B): Ditto. (MASK_AMOAND_B): Ditto. (MATCH_AMOMIN_B): Ditto. (MASK_AMOMIN_B): Ditto. (MATCH_AMOMAX_B): Ditto. (MASK_AMOMAX_B): Ditto. (MATCH_AMOMINU_B): Ditto. (MASK_AMOMINU_B): Ditto. (MATCH_AMOMAXU_B): Ditto. (MASK_AMOMAXU_B): Ditto. (MATCH_AMOSWAP_B): Ditto. (MASK_AMOSWAP_B): Ditto. (MATCH_AMOADD_H): Ditto. (MASK_AMOADD_H): Ditto. (MATCH_AMOXOR_H): Ditto. (MASK_AMOXOR_H): Ditto. (MATCH_AMOOR_H): Ditto. (MASK_AMOOR_H): Ditto. (MATCH_AMOAND_H): Ditto. (MASK_AMOAND_H): Ditto. (MATCH_AMOMIN_H): Ditto. (MASK_AMOMIN_H): Ditto. (MATCH_AMOMAX_H): Ditto. (MASK_AMOMAX_H): Ditto. (MATCH_AMOMINU_H): Ditto. (MASK_AMOMINU_H): Ditto. (MATCH_AMOMAXU_H): Ditto. (MASK_AMOMAXU_H): Ditto. (MATCH_AMOSWAP_H): Ditto. (MASK_AMOSWAP_H): Ditto. (DECLARE_INSN): New declare. * opcode/riscv.h (enum riscv_insn_class): New class. opcodes/ChangeLog: * riscv-opc.c: New instructions.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/gas/riscv/zabha-32.d81
-rw-r--r--gas/testsuite/gas/riscv/zabha.d81
-rw-r--r--gas/testsuite/gas/riscv/zabha.s73
3 files changed, 235 insertions, 0 deletions
diff --git a/gas/testsuite/gas/riscv/zabha-32.d b/gas/testsuite/gas/riscv/zabha-32.d
new file mode 100644
index 0000000..1e6427e
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha-32.d
@@ -0,0 +1,81 @@
+#as: -march=rv32i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[ ]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
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diff --git a/gas/testsuite/gas/riscv/zabha.d b/gas/testsuite/gas/riscv/zabha.d
new file mode 100644
index 0000000..7000452
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.d
@@ -0,0 +1,81 @@
+#as: -march=rv64i_zabha
+#source: zabha.s
+#objdump: -d -Mno-aliases
+
+.*:[ ]+file format .*
+
+Disassembly of section .text:
+
+0+000 <target>:
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diff --git a/gas/testsuite/gas/riscv/zabha.s b/gas/testsuite/gas/riscv/zabha.s
new file mode 100644
index 0000000..82b811a
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zabha.s
@@ -0,0 +1,73 @@
+target:
+ amoadd.b a0, a0, 0(a0)
+ amoswap.b a0, a0, 0(a0)
+ amoand.b a0, a0, 0(a0)
+ amoor.b a0, a0, 0(a0)
+ amoxor.b a0, a0, 0(a0)
+ amomax.b a0, a0, 0(a0)
+ amomaxu.b a0, a0, 0(a0)
+ amomin.b a0, a0, 0(a0)
+ amominu.b a0, a0, 0(a0)
+ amoadd.b.aq a0, a0, 0(a0)
+ amoswap.b.aq a0, a0, 0(a0)
+ amoand.b.aq a0, a0, 0(a0)
+ amoor.b.aq a0, a0, 0(a0)
+ amoxor.b.aq a0, a0, 0(a0)
+ amomax.b.aq a0, a0, 0(a0)
+ amomaxu.b.aq a0, a0, 0(a0)
+ amomin.b.aq a0, a0, 0(a0)
+ amominu.b.aq a0, a0, 0(a0)
+ amoadd.b.rl a0, a0, 0(a0)
+ amoswap.b.rl a0, a0, 0(a0)
+ amoand.b.rl a0, a0, 0(a0)
+ amoor.b.rl a0, a0, 0(a0)
+ amoxor.b.rl a0, a0, 0(a0)
+ amomax.b.rl a0, a0, 0(a0)
+ amomaxu.b.rl a0, a0, 0(a0)
+ amomin.b.rl a0, a0, 0(a0)
+ amominu.b.rl a0, a0, 0(a0)
+ amoadd.b.aqrl a0, a0, 0(a0)
+ amoswap.b.aqrl a0, a0, 0(a0)
+ amoand.b.aqrl a0, a0, 0(a0)
+ amoor.b.aqrl a0, a0, 0(a0)
+ amoxor.b.aqrl a0, a0, 0(a0)
+ amomax.b.aqrl a0, a0, 0(a0)
+ amomaxu.b.aqrl a0, a0, 0(a0)
+ amomin.b.aqrl a0, a0, 0(a0)
+ amominu.b.aqrl a0, a0, 0(a0)
+ amoadd.h a0, a0, 0(a0)
+ amoswap.h a0, a0, 0(a0)
+ amoand.h a0, a0, 0(a0)
+ amoor.h a0, a0, 0(a0)
+ amoxor.h a0, a0, 0(a0)
+ amomax.h a0, a0, 0(a0)
+ amomaxu.h a0, a0, 0(a0)
+ amomin.h a0, a0, 0(a0)
+ amominu.h a0, a0, 0(a0)
+ amoadd.h.aq a0, a0, 0(a0)
+ amoswap.h.aq a0, a0, 0(a0)
+ amoand.h.aq a0, a0, 0(a0)
+ amoor.h.aq a0, a0, 0(a0)
+ amoxor.h.aq a0, a0, 0(a0)
+ amomax.h.aq a0, a0, 0(a0)
+ amomaxu.h.aq a0, a0, 0(a0)
+ amomin.h.aq a0, a0, 0(a0)
+ amominu.h.aq a0, a0, 0(a0)
+ amoadd.h.rl a0, a0, 0(a0)
+ amoswap.h.rl a0, a0, 0(a0)
+ amoand.h.rl a0, a0, 0(a0)
+ amoor.h.rl a0, a0, 0(a0)
+ amoxor.h.rl a0, a0, 0(a0)
+ amomax.h.rl a0, a0, 0(a0)
+ amomaxu.h.rl a0, a0, 0(a0)
+ amomin.h.rl a0, a0, 0(a0)
+ amominu.h.rl a0, a0, 0(a0)
+ amoadd.h.aqrl a0, a0, 0(a0)
+ amoswap.h.aqrl a0, a0, 0(a0)
+ amoand.h.aqrl a0, a0, 0(a0)
+ amoor.h.aqrl a0, a0, 0(a0)
+ amoxor.h.aqrl a0, a0, 0(a0)
+ amomax.h.aqrl a0, a0, 0(a0)
+ amomaxu.h.aqrl a0, a0, 0(a0)
+ amomin.h.aqrl a0, a0, 0(a0)
+ amominu.h.aqrl a0, a0, 0(a0)