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4 hoursgas/doc/riscv: Fixed typo of `.insn cj' formatHEADmasterNelson Chu1-1/+1
5 hoursx86-64: Support APX NF TLS IE with 2 operandsLingling Kong3-2/+22
5 hoursgas/doc/riscv: Fixed syntax of `.option arch' when reseting whole architectureNelson Chu1-2/+2
25 hoursx86-64: Verify that TLS IE works with APX NFkonglin12-2/+10
5 daysaarch64: Add support for Armv9.5-A architectureClaudio Bantaloukas12-4/+34
5 daysx86/APX: apply NDD-to-legacy transformation to further CMOVcc formsJan Beulich3-1/+48
5 daysx86/APX: extend TEST-by-imm7 optimization to CTESTccJan Beulich4-18/+118
5 daysx86/APX: optimize {nf}-form IMUL-by-power-of-2 to SHLJan Beulich4-0/+252
5 daysx86-64: restrict by-imm31 optimizationJan Beulich4-18/+21
5 daysx86/APX: optimize certain {nf}-form insns to LEAJan Beulich5-8/+1812
5 daysx86/APX: optimize {nf}-form rotate-by-width-less-1Jan Beulich3-1/+73
5 daysx86/APX: optimize {nf} forms of ADD/SUB with specific immediatesJan Beulich6-2/+1628
5 daysgas: .irp/.irpc are macro-likeJan Beulich1-2/+2
5 daysRISC-V: Add Zabha extension CAS instructions.Jiawei3-2/+26
7 daysaarch64: FP8 scale and convert - Implement minor improvementsVictor Do Nascimento6-201/+166
8 daysaarch64: Treat operand ADDR_SIMPLE as address with base registerJens Remus1-3/+3
8 daysaarch64: Fix FEAT_B16B16 sve2 instruction constraints.Srinath Parvathaneni12-26/+456
8 daysaarch64: Add extra tests for sve2p1 min max instructions.Srinath Parvathaneni6-201/+524
8 daysarch64: Fix the wrong constraint used for sve2p1 instructions.Srinath Parvathaneni3-0/+131
8 daysaarch64: Fix sve2p1 ld[1-4]/st[1-4]q instruction operands.Srinath Parvathaneni13-118/+630
8 daysaarch64: Fix sve2p1 extq instruction operands.Srinath Parvathaneni9-19/+87
8 daysaarch64: Fix sve2p1 dupq instruction operands.Srinath Parvathaneni6-7/+129
8 daysaarch64: Enable mandatory feature bits for v9.4-A.Srinath Parvathaneni5-2/+9
9 daysaarch64: Add SME FP8 multiplication instructionsAndrew Carlotti33-6/+1088
9 daysaarch64: Add FP8 Neon and SVE multiplication instructionsAndrew Carlotti21-6/+515
9 daysaarch64: Add support for virtual featuresAndrew Carlotti1-19/+45
9 daysaarch64: Move struct definition towards its usageAndrew Carlotti1-8/+8
9 daysgas, aarch64: Add SME2 lutv2 extensionsaurabh.jha@arm.com11-11/+331
10 daysaarch64: Enable +cssc for armv8.9-aAndrew Carlotti1-0/+1
12 daysx86: optimize {,V}PEXTR{D,Q} with immediate of 0Jan Beulich10-0/+158
12 daysx86: optimize left-shift-by-1Jan Beulich6-0/+214
12 daysx86: %riz, %rip, and %eip don't require REXJan Beulich3-2/+7
12 daysx86: don't suppress errors when optimizingJan Beulich4-1/+27
12 daysgas: terminate buffer SB in do_repeat()Jan Beulich1-3/+4
13 daysRevert "Remove LIBINTL_DEP"Alan Modra3-4/+7
13 daysRemove LIBINTL_DEPAlan Modra3-7/+4
2024-06-18RISC-V: Fixed typo from smscrind to smcsrind in riscv_implicit_subsets.Nelson Chu1-0/+6
2024-06-18RISC-V: Updated gas/NEWS and gas/doc/c-riscv.texi for vendor extensions.Nelson Chu2-10/+15
2024-06-18RISC-V: Add SiFive cease extension v1.0Hau Hsu4-0/+13
2024-06-18RISC-V: Support Zacas extension.Gianluca Guida10-0/+139
2024-06-18Support APX CCMP and CTESTCui, Lili9-17/+865
2024-06-18LoongArch: add .option directiveLulu Cai6-0/+119
2024-06-17GAS/testsuite: Make a copy of none.s before operating on it as outputMaciej W. Rozycki1-2/+11
2024-06-17GAS/testsuite: Add a helper for paths outside the source dirMaciej W. Rozycki1-0/+13
2024-06-14aarch64: add SPMU system registers missed in f01ae0392edMatthieu Longo3-1/+539
2024-06-12aarch64: add Branch Record Buffer extension instructionsClaudio Bantaloukas11-0/+64
2024-06-12RISC-V: Support S[sm]csrind extension csrs.Jiawei10-36/+549
2024-06-11MIPS/opcodes: Add MIPS Allegrex DBREAK instructionDavid Guillen Fandos2-1/+3
2024-06-11MIPS/opcodes: Exclude trap instructions for MIPS AllegrexDavid Guillen Fandos4-0/+30
2024-06-10aarch64: warn on unpredictable results for new rcpc3 instructionsMatthieu Longo6-26/+306