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33 hoursx86: default to not accepting MPX insnsJan Beulich28-30/+36
33 hoursx86: always set ISA_1_BASELINE property for 64-bit objectsJan Beulich2-3/+4
33 hoursx86/COFF: support section-index relocations in insn operandsJan Beulich6-2/+63
33 hoursx86/COFF: support RVA (image-relative) relocations in insn operandsJan Beulich7-2/+154
40 hoursRISC-V: Add support for ssdbltrp and smdbltrp extension.Dongyan Chen4-2/+9
4 dayss390: Simplify parsing of omitted index register operandJens Remus1-16/+8
4 dayss390: Treat addressing operand sequence as one in disassemblerJens Remus1-1/+1
4 dayss390: Treat addressing operand sequence as one in assemblerJens Remus1-14/+34
4 dayss390: Fix disassembly of optional addressing operandsJens Remus2-8/+84
4 daysx86: restrict gas'es recognition of -s to SolarisJan Beulich1-3/+8
4 daysx86/Solaris: support Sun form of CMOVccJan Beulich4-0/+80
4 daysx86: purge most *avx512*ig*-intel testsJan Beulich24-6996/+4
7 daysRe: nios2: Remove binutils support for Nios II targetAlan Modra1-2/+0
7 daysnios2: Remove binutils support for Nios II target.Sandra Loosemore233-11682/+3
8 daysUpdated Bulgarian, Romanian and French translations for various sub-directori...Nick Clifton1-4192/+3762
12 daysRISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclip...Nelson Chu7-2/+59
13 daysPowerPC: Add support for RFC02677 - VSX Vector Rotate Left WordPeter Bergner2-0/+2
13 daysarm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M MainlineAndre Vieira3-1/+231
14 daysRISC-V: Add Zcmt instructions and csr.Jiawei14-0/+93
2024-11-19Support x86 Intel MSR_IMMHu, Lin112-11/+145
2024-11-18x86: rename SPACE_{,E}VEX_MAP<N>Jan Beulich1-21/+21
2024-11-18x86: VP2INTERSECT{D,Q} have mask register destination groupJan Beulich16-244/+293
2024-11-18x86: generalize "implicit quad group" handlingJan Beulich6-33/+67
2024-11-18gas: move had_errors() invocation in finishing of subsegsJan Beulich1-6/+6
2024-11-18ELF: SHF_STRINGS isn't really tied to SHF_MERGEJan Beulich3-23/+28
2024-11-18ELF: SHF_MERGE vs SHT_NOBITSJan Beulich1-0/+3
2024-11-18gas/ELF: also reject merge entity size being zeroJan Beulich1-1/+1
2024-11-18s390: Add arch15 Concurrent-Functions Facility insnsJens Remus2-0/+8
2024-11-13gas: add .cv_ucomp and .cv_scomp pseudo-directivesMark Harmstone8-1/+356
2024-11-08aarch64: testsuite: remove hard-coded instruction addressesMatthieu Longo1-26/+26
2024-11-08aarch64: remove redundant register type R_NMatthieu Longo1-5/+1
2024-11-08aarch64: constify unchanged char* argumentsMatthieu Longo1-1/+1
2024-11-08arm, objdump: print obsolote warning when 26-bit set in instructionsAndre Vieira5-76/+36
2024-11-08arm, objdump: Make objdump use bfd's machine detection to drive disassemblyAndre Vieira4-17/+19
2024-11-07arm: Skip two failing tests for wince & pe targetsAndre Simoes Dias Vieira2-0/+2
2024-11-06PowerPC: Merge rfc2655 and rfc2656 test cases into one future test casePeter Bergner5-32/+18
2024-10-31gas/doc/riscv: Fixed misaligned instruction tableNelson Chu1-42/+42
2024-10-30x86: add a helper to copy insn operand infoJan Beulich1-133/+44
2024-10-30x86/APX: support JMPABS also in assemblerJan Beulich5-8/+51
2024-10-30x86/APX: squash REX prefix when REX2 is being emittedJan Beulich3-1/+13
2024-10-29LoongArch: Corrected to GNU style codeLulu Cai1-10/+10
2024-10-29gas: make fix_new_exp()'s "exp" parameter constJan Beulich2-16/+4
2024-10-29gas: constify md_{short,long}opts and md_longopts_sizeJan Beulich78-237/+232
2024-10-29RISC-V: Update the doc to match ISA manualKito Cheng1-36/+36
2024-10-28RISC-V: Fix typo in gas/testsuite/gas/riscv/mapping.sJim Lin3-6/+6
2024-10-24Replace uses of asprintf with xasprintfAlan Modra7-49/+11
2024-10-22LoongArch: Force relocation for every reference to the global offset tableLulu Cai4-0/+75
2024-10-18x86: Support x86 ZHAOXIN GMI instructionsMayShao-oc6-2/+28
2024-10-16Support Intel AVX10.2 convert instructionsLiwei Xu14-0/+1292
2024-10-15x86: Refine instruction check in x86_check_tls_relocationCui, Lili1-10/+11
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