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AgeCommit message (Expand)AuthorFilesLines
2019-07-04x86: correct "-Q" option handlingJan Beulich2-1/+9
2019-07-04gas/ELF: don't accumulate .type settingsJan Beulich8-1/+118
2019-07-03Fix assembler tests to work with toolchains that have been configured with --...Nick Clifton93-64/+194
2019-07-02This patch fixes a bug in the AArch64 assembler where an incorrect structural...Barnaby Wilks6-1/+29
2019-07-02[AArch64] Allow MOVPRFX to be used with FMOVRichard Sandiford3-0/+30
2019-07-02[AArch64] Add missing C_MAX_ELEM flags for SVE conversionsRichard Sandiford4-7/+80
2019-07-02[AArch64] Fix bogus MOVPRFX warning for GPR form of CPYRichard Sandiford4-3/+9
2019-07-01Fix bug when generating REL type relocs for assembler generated build notes.Nick Clifton2-10/+21
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson7-11/+43
2019-07-01Document the .value directive supported by the x86 and x86_64 assemblers.Nick Clifton2-0/+12
2019-07-01Correct a typo in the description of the Align and P2align directives.Nick Clifton2-2/+9
2019-07-01Fix spelling error in assembler documentation.Nick Clifton2-1/+6
2019-07-01x86: drop Vec_Imm4Jan Beulich2-25/+19
2019-07-01x86: limit ImmExt abuseJan Beulich2-13/+17
2019-07-01x86: optimize AND/OR with twice the same registerJan Beulich10-1/+435
2019-07-01x86-64: optimize certain commutative VEX-encoded insnsJan Beulich14-1246/+1048
2019-07-01x86: StaticRounding implies SAEJan Beulich2-6/+8
2019-07-01x86: optimize EVEX packed integer logical instructionsJan Beulich24-17/+955
2019-07-01x86: add missing pseudo ops for VPCLMULQDQ ISA extensionJan Beulich19-18/+145
2019-07-01x86: use encoding_length() also elsewhereJan Beulich2-32/+8
2019-07-01x86: warn about insns exceeding the 15-byte limitJan Beulich7-0/+146
2019-06-27i386: Check vector length for scatter/gather prefetch instructionsH.J. Lu1-0/+9
2019-06-27This fixes a bug in the ARm assembler where an immediate operand larger than ...Barnaby Wilk s9-10/+54
2019-06-27x86: add missing testJan Beulich2-0/+174
2019-06-27x86: allow VEX et al encodings in 16-bit (protected) modeJan Beulich15-4/+16793
2019-06-26Fix a few non-dash safe xstormy16 shell scripts.Jim Wilson3-2/+8
2019-06-26i386: Document memory size reference in assemblerLili Cui2-5/+16
2019-06-25MIPS/gas: Fix order of instructions in LI macro expansionFaraz Shahbazker7-37/+140
2019-06-25x86: correct / adjust debug printingJan Beulich2-9/+19
2019-06-25x86: document certain command line options as "dangerous"Jan Beulich2-0/+11
2019-06-25x86: don't open code is_any_vex_encoding()Jan Beulich2-3/+5
2019-06-25x86: fix (dis)assembly of certain SSE2 insns in 16-bit modeJan Beulich4-0/+181
2019-06-25x86-64: also optimize ANDQ with immediate fitting in 7 bitsJan Beulich4-1/+25
2019-06-25x86: add CVT{,T}PS2PI cases to xmmwords testJan Beulich3-0/+12
2019-06-25Fix logical expression in last commitAlan Modra2-1/+5
2019-06-25PowerPC nopsAlan Modra6-19/+106
2019-06-19i386: Check vector length for EVEX broadcast instructionsH.J. Lu5-4/+20
2019-06-17i386: Check vector length for vshufXXX/vinsertXXX/vextractXXXH.J. Lu5-2/+19
2019-06-14Regenerate with approved autotools versionAlan Modra4-22/+14
2019-06-12Add missing ChangeLog entriesPeter Bergner1-0/+5
2019-06-12Remove the ldmx mnemonic that never made it into POWER9.Peter Bergner2-4/+0
2019-06-06gas: Add .enqcmd and noenqcmd directivesH.J. Lu3-0/+10
2019-06-06gas: Correct ChangeLog for commit 5d79adc4b22b0abdH.J. Lu1-12/+14
2019-06-05i386: Check vector length for EVEX vextractfXX and vinsertfXXH.J. Lu5-2/+21
2019-06-04i386: Check for reserved VEX.vvvv and EVEX.vvvvH.J. Lu5-0/+22
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu18-1/+425
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu13-1/+183
2019-05-30RISC-V: Fix lui argument parsing.Jim Wilson4-5/+16
2019-05-28x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVLH.J. Lu5-0/+27
2019-05-27Fix failure on powerpc 32-bit only targetsAlan Modra3-51/+140
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