Add support for Intel ENQCMD[S] instructions

This patch enables support for ENQCMD[S] in binutils.  Please refer to

https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

for ENQCMD[S] details.

Make check-gas is ok.

gas/ChangeLog:

2019-06-04  Xuepeng Guo  <xuepeng.guo@intel.com>
	    Lili Cui  <lili.cui@intel.com>

	* doc/c-i386.texi: Document enqcmd.
	* testsuite/gas/i386/enqcmd-intel.d: New file.
	* testsuite/gas/i386/enqcmd-inval.l: Likewise.
	* testsuite/gas/i386/enqcmd-inval.s: Likewise.
	* testsuite/gas/i386/enqcmd.d: Likewise.
	* testsuite/gas/i386/enqcmd.s: Likewise.
	* testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-enqcmd-inval.l: Likewise.
	* testsuite/gas/i386/x86-64-enqcmd-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
	* testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run enqcmd-intel, enqcmd-inval,
	enqcmd, x86-64-enqcmd-intel, x86-64-enqcmd-inval,
	and x86-64-enqcmd.

opcodes/ChangeLog:

2019-06-04  Xuepeng Guo  <xuepeng.guo@intel.com>
	    Lili Cui  <lili.cui@intel.com>

	* i386-dis.c (enum): Add MOD_0F38F8_PREFIX_1 and
	MOD_0F38F8_PREFIX_3.
	(prefix_table): New instructions (see prefix above).
	(mod_table): New instructions (see prefix above).
	* i386-gen.c (cpu_flag_init): Add entries for enqcmd.
	(cpu_flags): Add a bitfield for enqmcd.
	* i386-init.h: Regenerated.
	* i386-opc.h (enum): Add CpuENQCMD.
	(i386_cpu_flags): Add a bitfield for cpuenqcmd.
	* i386-opc.tbl: Add enqcmd and enqcmds instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

13 files changed, 183 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d460265..0c3c7cc 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2019-06-04  Xuepeng Guo  <xuepeng.guo@intel.com>
+	    Lili Cui  <lili.cui@intel.com>
+
+	* i386-dis.c (enum): Add MOD_0F38F8_PREFIX_1 and
+	MOD_0F38F8_PREFIX_3.
+	(prefix_table): New instructions (see prefix above).
+	(mod_table): New instructions (see prefix above).
+	* i386-gen.c (cpu_flag_init): Add entries for enqcmd.
+	(cpu_flags): Add a bitfield for enqmcd.
+	* i386-init.h: Regenerated.
+	* i386-opc.h (enum): Add CpuENQCMD.
+	(i386_cpu_flags): Add a bitfield for cpuenqcmd.
+	* i386-opc.tbl: Add enqcmd and enqcmds instructions.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Regenerated.
+
 2019-05-30  Jim Wilson  <jimw@sifive.com>
 
 	* config/tc-riscv.c (riscv_ip) <'u'>: Move O_constant check inside if
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 86cde79..77e6684 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -183,6 +183,7 @@ accept various extension mnemonics.  For example,
 @code{clwb},
 @code{movdiri},
 @code{movdir64b},
+@code{enqcmd},
 @code{avx512f},
 @code{avx512cd},
 @code{avx512er},
@@ -1309,7 +1310,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
-@item @samp{.movdiri} @tab @samp{.movdir64b}
+@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/gas/i386/enqcmd-intel.d b/gas/testsuite/gas/i386/enqcmd-intel.d
new file mode 100644
index 0000000..b38c3ed
--- /dev/null
+++ b/gas/testsuite/gas/i386/enqcmd-intel.d
@@ -0,0 +1,20 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 ENQCMD[S] insns (Intel disassembly)
+#source: enqcmd.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 04[ 	]*enqcmd ax,\[si\]
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 04[ 	]*enqcmds ax,\[si\]
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 04[ 	]*enqcmd ax,\[si\]
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 04[ 	]*enqcmds ax,\[si\]
+#pass
diff --git a/gas/testsuite/gas/i386/enqcmd-inval.l b/gas/testsuite/gas/i386/enqcmd-inval.l
new file mode 100644
index 0000000..e5af4c7
--- /dev/null
+++ b/gas/testsuite/gas/i386/enqcmd-inval.l
@@ -0,0 +1,10 @@
+.*: Assembler messages:
+.*:6: Error: invalid register operand size for `enqcmd'
+.*:7: Error: invalid register operand size for `enqcmd'
+.*:8: Error: invalid register operand size for `enqcmds'
+.*:9: Error: invalid register operand size for `enqcmds'
+.*:12: Error: invalid register operand size for `enqcmd'
+.*:13: Error: invalid register operand size for `enqcmd'
+.*:14: Error: invalid register operand size for `enqcmds'
+.*:15: Error: invalid register operand size for `enqcmds'
+
diff --git a/gas/testsuite/gas/i386/enqcmd-inval.s b/gas/testsuite/gas/i386/enqcmd-inval.s
new file mode 100644
index 0000000..33eb6c8
--- /dev/null
+++ b/gas/testsuite/gas/i386/enqcmd-inval.s
@@ -0,0 +1,15 @@
+# Check error for ENQCMD[S] 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	enqcmd (%si),%eax
+	enqcmd (%esi),%ax
+	enqcmds (%si),%eax
+	enqcmds (%esi),%ax
+
+	.intel_syntax noprefix
+	enqcmd eax,[si]
+	enqcmd ax,[esi]
+	enqcmds eax,[si]
+	enqcmds ax,[esi]
diff --git a/gas/testsuite/gas/i386/enqcmd.d b/gas/testsuite/gas/i386/enqcmd.d
new file mode 100644
index 0000000..c601185
--- /dev/null
+++ b/gas/testsuite/gas/i386/enqcmd.d
@@ -0,0 +1,20 @@
+#as:
+#objdump: -dw
+#name: i386 ENQCMD[S] insns
+#source: enqcmd.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 04[ 	]*enqcmd \(%si\),%ax
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 04[ 	]*enqcmds \(%si\),%ax
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 04[ 	]*enqcmd \(%si\),%ax
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 04[ 	]*enqcmds \(%si\),%ax
+#pass
diff --git a/gas/testsuite/gas/i386/enqcmd.s b/gas/testsuite/gas/i386/enqcmd.s
new file mode 100644
index 0000000..0a23b25
--- /dev/null
+++ b/gas/testsuite/gas/i386/enqcmd.s
@@ -0,0 +1,15 @@
+# Check ENQCMD[S] 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	enqcmd (%ecx),%eax
+	enqcmd (%si),%ax
+	enqcmds (%ecx),%eax
+	enqcmds (%si),%ax
+
+	.intel_syntax noprefix
+	enqcmd eax,[ecx]
+	enqcmd ax,[si]
+	enqcmds eax,[ecx]
+	enqcmds ax,[si]
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index aa0ad7d..359dfdc 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -453,6 +453,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "movdir"
     run_dump_test "movdir-intel"
     run_list_test "movdir64b-reg"
+    run_dump_test "enqcmd"
+    run_dump_test "enqcmd-intel"
+    run_list_test "enqcmd-inval"
     run_list_test "avx512vl-1" "-al"
     run_list_test "avx512vl-2" "-al"
     run_list_test "avx512vl-plain" "-al"
@@ -969,6 +972,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-movdir"
     run_dump_test "x86-64-movdir-intel"
     run_list_test "x86-64-movdir64b-reg"
+    run_dump_test "x86-64-enqcmd"
+    run_dump_test "x86-64-enqcmd-intel"
+    run_list_test "x86-64-enqcmd-inval"
     run_dump_test "x86-64-fence-as-lock-add-yes"
     run_dump_test "x86-64-fence-as-lock-add-no"
     run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d b/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
new file mode 100644
index 0000000..e483d57
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-enqcmd-intel.d
@@ -0,0 +1,20 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 ENQCMD[S] insns (Intel disassembly)
+#source: x86-64-enqcmd.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 01[ 	]*enqcmd eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 01[ 	]*enqcmds eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 01[ 	]*enqcmd eax,\[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds rax,\[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 01[ 	]*enqcmds eax,\[ecx\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-enqcmd-inval.l b/gas/testsuite/gas/i386/x86-64-enqcmd-inval.l
new file mode 100644
index 0000000..6b7b671
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-enqcmd-inval.l
@@ -0,0 +1,9 @@
+.* Assembler messages:
+.*6: Error: invalid register operand size for `enqcmd'
+.*7: Error: invalid register operand size for `enqcmd'
+.*8: Error: invalid register operand size for `enqcmds'
+.*9: Error: invalid register operand size for `enqcmds'
+.*12: Error: invalid register operand size for `enqcmd'
+.*13: Error: invalid register operand size for `enqcmd'
+.*14: Error: invalid register operand size for `enqcmds'
+.*15: Error: invalid register operand size for `enqcmds'
diff --git a/gas/testsuite/gas/i386/x86-64-enqcmd-inval.s b/gas/testsuite/gas/i386/x86-64-enqcmd-inval.s
new file mode 100644
index 0000000..2055c4d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-enqcmd-inval.s
@@ -0,0 +1,15 @@
+# Check error for ENQCMD[S] 32-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	enqcmd (%esi),%rax
+	enqcmd (%rsi),%eax
+	enqcmds (%esi),%rax
+	enqcmds (%rsi),%eax
+
+	.intel_syntax noprefix
+	enqcmd rax,[esi]
+	enqcmd eax,[rsi]
+	enqcmds rax,[esi]
+	enqcmds eax,[rsi]
diff --git a/gas/testsuite/gas/i386/x86-64-enqcmd.d b/gas/testsuite/gas/i386/x86-64-enqcmd.d
new file mode 100644
index 0000000..337febf
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-enqcmd.d
@@ -0,0 +1,20 @@
+#as:
+#objdump: -dw
+#name: x86_64 ENQCMD[S] insns
+#source: x86-64-enqcmd.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 01[ 	]*enqcmd \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 01[ 	]*enqcmds \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*f2 0f 38 f8 01[ 	]*enqcmd \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 f2 0f 38 f8 01[ 	]*enqcmd \(%ecx\),%eax
+[ 	]*[a-f0-9]+:[ 	]*f3 0f 38 f8 01[ 	]*enqcmds \(%rcx\),%rax
+[ 	]*[a-f0-9]+:[ 	]*67 f3 0f 38 f8 01[ 	]*enqcmds \(%ecx\),%eax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-enqcmd.s b/gas/testsuite/gas/i386/x86-64-enqcmd.s
new file mode 100644
index 0000000..f790b28
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-enqcmd.s
@@ -0,0 +1,15 @@
+# Check ENQCMD[S] 64-bit instructions
+
+	.allow_index_reg
+	.text
+_start:
+	enqcmd (%rcx),%rax
+	enqcmd (%ecx),%eax
+	enqcmds (%rcx),%rax
+	enqcmds (%ecx),%eax
+
+	.intel_syntax noprefix
+	enqcmd rax,[rcx]
+	enqcmd eax,[ecx]
+	enqcmds rax,[rcx]
+	enqcmds eax,[ecx]