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AgeCommit message (Expand)AuthorFilesLines
2024-03-22x86: fix Solaris testsuite failuresJan Beulich2-7/+4
2024-03-21New Romanian translation for gas sub-directoryNick Clifton1-0/+23890
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha23-0/+1119
2024-03-19LoongArch: Add relaxation for R_LARCH_CALL36mengqinggang5-147/+175
2024-03-18aarch64: Add support for SVE ADDPT, SUBPT, MADPT, MLAPT instructionsYury Khrustalev9-2/+311
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev9-0/+232
2024-03-18Arm64: check matching operands for predicated B16B16 insnsJan Beulich6-36/+62
2024-03-18Arm64: correct B16B16 indexed bf{mla,mls,mul}Jan Beulich1-18/+18
2024-03-18RISC-V: Tidy smstateen and ssstateen testcases.Nelson Chu4-57/+6
2024-03-15gas/NEWS: Remove mention of AArch64 B16B16 extensionAndrew Carlotti1-3/+0
2024-03-15x86/APX: legacy promoted insns can't access %xmm16-%xmm31Jan Beulich9-139/+119
2024-03-13RISC-V: Add -march=help for gasHau Hsu3-0/+126
2024-03-12LoongArch: Scan all illegal operand instructions without interruptionLulu Cai8-7/+269
2024-03-12LoongArch: Fix gas and ld test casesLulu Cai2-0/+6
2024-03-11x86: KeyLocker insn interaction with -msse-check / .sse_checkJan Beulich6-3/+49
2024-03-11x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128Jan Beulich1-1/+3
2024-03-11x86: don't open-code REG_{SP,FP}Jan Beulich1-2/+2
2024-03-08gas: Fix x86 build with GCC 6.4H.J. Lu1-1/+1
2024-03-08RISC-V: Support Zabha extension.Jiawei3-0/+235
2024-03-06LoongArch: Fix some test cases for TLS transition and relaxLulu Cai10-46/+41
2024-03-06LoongArch: Delete extra instructions when TLS type transitionLulu Cai1-5/+26
2024-03-05LoongArch: Add gas testsuit for LA32 relocationsLulu Cai2-0/+136
2024-03-05LoongArch: Add gas testsuit for LA64 relocationsLulu Cai2-0/+253
2024-03-05LoongArch: Add gas testsuit for LA32 int/float instructionsLulu Cai4-0/+609
2024-03-05LoongArch: Add gas testsuit for LA64 int/float instructionsLulu Cai4-0/+1192
2024-03-05LoongArch: Add gas testsuit for lsx/lasx instructionsLulu Cai4-0/+2938
2024-03-05LoongArch: Add gas testsuit for lbt/lvz instructionsLulu Cai4-0/+382
2024-03-05LoongArch: Add gas testsuit for alias instructionsLulu Cai4-0/+60
2024-03-01s390: Be more verbose about missing operand typeJens Remus3-18/+54
2024-03-01s390: Provide operand number in assembler warning and error messagesJens Remus6-165/+206
2024-03-01s390: Allow to explicitly omit base register operand in assemblyJens Remus10-165/+120
2024-03-01s390: Print base register 0 as "0" in disassemblyJens Remus2-35/+35
2024-03-01s390: Warn when register name type does not match operandJens Remus12-22/+204
2024-03-01s390: Revise s390-specific assembler option descriptionsJens Remus1-10/+18
2024-03-01s390: Add test case for disassembler option warn-areg-zeroJens Remus3-0/+182
2024-03-01s390: Add test cases for base/index register 0Jens Remus5-0/+394
2024-03-01s390: Add comments to assembler operand parsing logicJens Remus1-6/+25
2024-03-01s390: Assemble processor specific test cases for their processorJens Remus1-2/+2
2024-03-01s390: Correct setting of highgprs flag in ELF outputJens Remus10-6/+143
2024-03-01s390: Do not erroneously use base operand value for length operandJens Remus6-17/+110
2024-03-01s390: Enhance handling of syntax errors in assemblerJens Remus1-2/+4
2024-03-01s390: Lower severity of assembler syntax errors from fatal to errorJens Remus2-7/+7
2024-03-01x86: adjust which Dwarf2 register numbers to useJan Beulich2-23/+9
2024-03-01gas/NEWS: drop mention of Arm64's SVE2.1 and SME2.1Jan Beulich1-5/+1
2024-03-01x86/APX: honor -mevexwig= for byte-size insnsJan Beulich3-0/+171
2024-03-01x86/APX: optimize certain XOR and SUB formsJan Beulich3-0/+76
2024-03-01x86/APX: correct .insn opcode space determination when REX2 is neededJan Beulich4-28/+97
2024-03-01x86/APX: respect {vex}/{vex3}Jan Beulich4-137/+234
2024-02-29aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions.Srinath Parvathaneni3-49/+49
2024-02-29RISC-V: Add assembly support for TLSDESC.Tatsuyuki Ishi3-5/+73
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