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2017-11-22Update docs on filling text with nops.Jim Wilson1-3/+3
2017-11-16Add new AArch64 FP16 FM{A|S} instructions.Tamar Christina1-0/+3
2017-11-16Update documentation for Arvm8.4-A changes to AArch64.Tamar Christina1-3/+11
2017-11-15Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a int...Tamar Christina1-0/+2
2017-11-08Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang1-0/+1
2017-11-03Add option for Qualcomm Saphira partSiddhesh Poyarekar1-0/+1
2017-10-23Enable Intel AVX512_BITALG instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel AVX512_VNNI instructions.Igor Tsimbalist1-1/+3
2017-10-23Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist1-1/+2
2017-10-23Enable Intel VAES instructions.Igor Tsimbalist1-0/+2
2017-10-23Enable Intel GFNI instructions.Igor Tsimbalist1-1/+2
2017-10-23Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist1-2/+4
2017-10-20Improve handling of REPT pseudo op with a negative count.Nick Clifton1-0/+3
2017-08-29Improve MSP430 section placement.Jozef Lawrynowicz1-0/+13
2017-08-24[PowerPC VLE] Add SPE2 and EFS2 instructions supportAlexander Fedotov2-1/+4
2017-08-15[Patch AArch64] Turn lr, fp, ip0 and ip1 into proper aliasesRamana Radhakrishnan1-0/+3
2017-07-21This patch introduces support for specifing views in .loc directives, so that...Alexandre Oliva1-0/+13
2017-07-21S/390: Support z14 as CPU name.Andreas Krebbel2-2/+2
2017-07-17Update assembler documentation on some AVR cores.Georg-Johann Lay1-3/+6
2017-07-05[ARM] Add support for Cortex-A55 and Cortex-A75.James Greenhalgh1-0/+2
2017-06-30Add support for a __gcc_isr pseudo isntruction to the AVR assembler.Georg-Johann Lay1-0/+62
2017-06-28[AArch64] Add dot product support for AArch64 to binutilsTamar Christina1-0/+2
2017-06-28[ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang1-0/+1
2017-06-28MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor supportMaciej W. Rozycki1-0/+1
2017-06-24[ARM] Add support for ARM Cortex-R52 processorThomas Preud'homme1-0/+1
2017-06-24[ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme1-0/+1
2017-06-21Add support for the Cortex-A55 and Cortex-A75 versions of the AArch64 archite...James Greenhalgh1-0/+2
2017-06-05Drop arm support for falkor/qdf24xx targets, not present in released hardware.Jim Wilson1-2/+0
2017-05-19binutils: support for the SPARC M8 processorJose E. Marchesi1-9/+19
2017-05-15MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki2-0/+23
2017-05-15MIPS/GAS/doc: Refer to `.module' rather than `.set'Maciej W. Rozycki2-12/+12
2017-05-10[ARC] Object attributes.Claudiu Zissulescu1-0/+16
2017-04-04Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXXH.J. Lu1-0/+2
2017-03-30Add support for the WebAssembly file format and the wasm32 ELF conversion to ...Pip Cet3-1/+128
2017-03-22Sanitize RISC-V GAS help text, documentationPalmer Dabbelt1-0/+8
2017-03-20Update descriptions of the .2byte, .4byte and .8byte directives.Nick Clifton1-14/+18
2017-03-20[arm] Document missing -mfpu entries.Richard Earnshaw1-1/+3
2017-03-10Document that the .2byte and .4byte directives warn about overlarge values.Nick Clifton1-10/+15
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu1-4/+24
2017-03-07Correct @section placement for makeinfo 4.13Alan Modra1-3/+3
2017-03-07Document .Nbyte assembler directivesAlan Modra2-0/+40
2017-03-06Add support for Intel CET instructionsH.J. Lu1-0/+2
2017-03-01[AArch64] Document +rcpc weak release consistency extensionSzabolcs Nagy1-0/+2
2017-02-24[AArch64] Additional SVE instructionsRichard Sandiford1-2/+3
2017-02-24[AArch64] Add a "compnum" featureRichard Sandiford1-0/+3
2017-02-23S/390: Add support for new cpu architecture - arch12.Andreas Krebbel2-4/+4
2017-02-15[AArch64] Fix +sve documentationRichard Sandiford1-2/+2
2017-02-02MIPS/GAS/doc: Include MIPS options in the man pageMaciej W. Rozycki1-0/+2
2017-01-30MIPS: Add options to control branch ISA checksMaciej W. Rozycki2-0/+43
2017-01-23Fix spelling mistakes and typos in the GAS sources.Nick Clifton20-34/+34