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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-20 23:52:52 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-23 15:58:18 +0300 |
| commit | 8cfcb7659cb844dff00efbbb644c15b650fb7e8b (patch) | |
| tree | e9139b9cde353c68cfb9b963743cb73453e6d81c /gas/doc | |
| parent | ff1982d53a1fba573e7f9a3b455f7644440cb336 (diff) | |
| download | gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.zip gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.tar.gz gdb-8cfcb7659cb844dff00efbbb644c15b650fb7e8b.tar.bz2 | |
Enable Intel AVX512_VNNI instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gas/
* config/tc-i386.c (cpu_arch): Add .avx512_vnni.
(cpu_noarch): Add noavx512_vnni.
* doc/c-i386.texi: Document .avx512_vnni.
* testsuite/gas/i386/i386.exp: Add AVX512_VNNI tests.
* testsuite/gas/i386/avx512vnni-intel.d: New test.
* testsuite/gas/i386/avx512vnni.d: Likewise.
* testsuite/gas/i386/avx512vnni.s: Likewise.
* testsuite/gas/i386/avx512vnni_vl-intel.d: Likewise.
* testsuite/gas/i386/avx512vnni_vl.d: Likewise.
* testsuite/gas/i386/avx512vnni_vl.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vnni_vl.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_EVEX_0F3850, PREFIX_EVEX_0F3851.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_VNNI,
CPU_ANY_AVX512_VNNI_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_VNNI.
* i386-opc.h (enum): Add CpuAVX512_VNNI.
(i386_cpu_flags): Add cpuavx512_vnni.
* i386-opc.tbl Add Intel AVX512_VNNI instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 44ade83..f2e8f4e 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -188,6 +188,7 @@ accept various extension mnemonics. For example, @code{avx512_4vnniw}, @code{avx512_vpopcntdq}, @code{avx512_vbmi2}, +@code{avx512_vnni}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -201,6 +202,7 @@ accept various extension mnemonics. For example, @code{noavx512_4vnniw}, @code{noavx512_vpopcntdq}, @code{noavx512_vbmi2}, +@code{noavx512_vnni}, @code{vmx}, @code{vmfunc}, @code{smx}, @@ -1223,7 +1225,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf} @item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma} @item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.avx512_4vnniw} -@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} +@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.cet} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} |