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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-20 23:56:30 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2017-10-23 15:58:18 +0300 |
| commit | ee6872beb1912af41a506c8aea34af7d2f873d04 (patch) | |
| tree | 608938241e7f350c09c13fcee234f5c89aebf687 /gas/doc | |
| parent | 8cfcb7659cb844dff00efbbb644c15b650fb7e8b (diff) | |
| download | gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.zip gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.tar.gz gdb-ee6872beb1912af41a506c8aea34af7d2f873d04.tar.bz2 | |
Enable Intel AVX512_BITALG instructions.
Intel has disclosed a set of new instructions. The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gas/
* config/tc-i386.c (cpu_arch): Add .avx512_bitalg.
(cpu_noarch): noavx512_bitalg.
* doc/c-i386.texi: Document .avx512_bitalg, noavx512_bitalg.
* testsuite/gas/i386/i386.exp: Add AVX512_BITALG tests.
* testsuite/gas/i386/avx512f_bitalg-intel.d: New test.
* testsuite/gas/i386/avx512f_bitalg.d: Likewise.
* testsuite/gas/i386/avx512f_bitalg.s: Likewise.
* testsuite/gas/i386/avx512vl_bitalg-intel.d: Likewise.
* testsuite/gas/i386/avx512vl_bitalg.d: Likewise.
* testsuite/gas/i386/avx512vl_bitalg.s: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg.d: Likewise.
* testsuite/gas/i386/x86-64-avx512f_bitalg.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg.d: Likewise.
* testsuite/gas/i386/x86-64-avx512vl_bitalg.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_EVEX_0F3854, PREFIX_EVEX_0F388F.
(enum): Add EVEX_W_0F3854_P_2.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BITALG,
CPU_ANY_AVX512_BITALG_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_BITALG.
* i386-opc.h (enum): Add CpuAVX512_BITALG.
(i386_cpu_flags): Add cpuavx512_bitalg..
* i386-opc.tbl: Add Intel AVX512_BITALG instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index f2e8f4e..a1d33bd 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{avx512_vpopcntdq}, @code{avx512_vbmi2}, @code{avx512_vnni}, +@code{avx512_bitalg}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -203,6 +204,7 @@ accept various extension mnemonics. For example, @code{noavx512_vpopcntdq}, @code{noavx512_vbmi2}, @code{noavx512_vnni}, +@code{noavx512_bitalg}, @code{vmx}, @code{vmfunc}, @code{smx}, @@ -1226,6 +1228,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma} @item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.avx512_4vnniw} @item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni} +@item @samp{.avx512_bitalg} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.cet} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} |